1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-125" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 MODULE_ALIAS("cciss"); 85 86 static int hpsa_simple_mode; 87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 88 MODULE_PARM_DESC(hpsa_simple_mode, 89 "Use 'simple mode' rather than 'performant mode'"); 90 91 /* define the PCI info for the cards we can control */ 92 static const struct pci_device_id hpsa_pci_device_id[] = { 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150 {0,} 151 }; 152 153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 154 155 /* board_id = Subsystem Device ID & Vendor ID 156 * product = Marketing Name for the board 157 * access = Address of the struct of function pointers 158 */ 159 static struct board_type products[] = { 160 {0x40700E11, "Smart Array 5300", &SA5A_access}, 161 {0x40800E11, "Smart Array 5i", &SA5B_access}, 162 {0x40820E11, "Smart Array 532", &SA5B_access}, 163 {0x40830E11, "Smart Array 5312", &SA5B_access}, 164 {0x409A0E11, "Smart Array 641", &SA5A_access}, 165 {0x409B0E11, "Smart Array 642", &SA5A_access}, 166 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 168 {0x40910E11, "Smart Array 6i", &SA5A_access}, 169 {0x3225103C, "Smart Array P600", &SA5A_access}, 170 {0x3223103C, "Smart Array P800", &SA5A_access}, 171 {0x3234103C, "Smart Array P400", &SA5A_access}, 172 {0x3235103C, "Smart Array P400i", &SA5A_access}, 173 {0x3211103C, "Smart Array E200i", &SA5A_access}, 174 {0x3212103C, "Smart Array E200", &SA5A_access}, 175 {0x3213103C, "Smart Array E200i", &SA5A_access}, 176 {0x3214103C, "Smart Array E200i", &SA5A_access}, 177 {0x3215103C, "Smart Array E200i", &SA5A_access}, 178 {0x3237103C, "Smart Array E500", &SA5A_access}, 179 {0x323D103C, "Smart Array P700m", &SA5A_access}, 180 {0x3241103C, "Smart Array P212", &SA5_access}, 181 {0x3243103C, "Smart Array P410", &SA5_access}, 182 {0x3245103C, "Smart Array P410i", &SA5_access}, 183 {0x3247103C, "Smart Array P411", &SA5_access}, 184 {0x3249103C, "Smart Array P812", &SA5_access}, 185 {0x324A103C, "Smart Array P712m", &SA5_access}, 186 {0x324B103C, "Smart Array P711m", &SA5_access}, 187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 188 {0x3350103C, "Smart Array P222", &SA5_access}, 189 {0x3351103C, "Smart Array P420", &SA5_access}, 190 {0x3352103C, "Smart Array P421", &SA5_access}, 191 {0x3353103C, "Smart Array P822", &SA5_access}, 192 {0x3354103C, "Smart Array P420i", &SA5_access}, 193 {0x3355103C, "Smart Array P220i", &SA5_access}, 194 {0x3356103C, "Smart Array P721m", &SA5_access}, 195 {0x1920103C, "Smart Array P430i", &SA5_access}, 196 {0x1921103C, "Smart Array P830i", &SA5_access}, 197 {0x1922103C, "Smart Array P430", &SA5_access}, 198 {0x1923103C, "Smart Array P431", &SA5_access}, 199 {0x1924103C, "Smart Array P830", &SA5_access}, 200 {0x1925103C, "Smart Array P831", &SA5_access}, 201 {0x1926103C, "Smart Array P731m", &SA5_access}, 202 {0x1928103C, "Smart Array P230i", &SA5_access}, 203 {0x1929103C, "Smart Array P530", &SA5_access}, 204 {0x21BD103C, "Smart Array P244br", &SA5_access}, 205 {0x21BE103C, "Smart Array P741m", &SA5_access}, 206 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 207 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 208 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 209 {0x21C2103C, "Smart Array P440", &SA5_access}, 210 {0x21C3103C, "Smart Array P441", &SA5_access}, 211 {0x21C4103C, "Smart Array", &SA5_access}, 212 {0x21C5103C, "Smart Array P841", &SA5_access}, 213 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 214 {0x21C7103C, "Smart HBA H240", &SA5_access}, 215 {0x21C8103C, "Smart HBA H241", &SA5_access}, 216 {0x21C9103C, "Smart Array", &SA5_access}, 217 {0x21CA103C, "Smart Array P246br", &SA5_access}, 218 {0x21CB103C, "Smart Array P840", &SA5_access}, 219 {0x21CC103C, "Smart Array", &SA5_access}, 220 {0x21CD103C, "Smart Array", &SA5_access}, 221 {0x21CE103C, "Smart HBA", &SA5_access}, 222 {0x05809005, "SmartHBA-SA", &SA5_access}, 223 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 225 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 226 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 233 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 234 }; 235 236 static struct scsi_transport_template *hpsa_sas_transport_template; 237 static int hpsa_add_sas_host(struct ctlr_info *h); 238 static void hpsa_delete_sas_host(struct ctlr_info *h); 239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 240 struct hpsa_scsi_dev_t *device); 241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 242 static struct hpsa_scsi_dev_t 243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 244 struct sas_rphy *rphy); 245 246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 247 static const struct scsi_cmnd hpsa_cmd_busy; 248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 249 static const struct scsi_cmnd hpsa_cmd_idle; 250 static int number_of_controllers; 251 252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 255 256 #ifdef CONFIG_COMPAT 257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 258 void __user *arg); 259 #endif 260 261 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 262 static struct CommandList *cmd_alloc(struct ctlr_info *h); 263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 265 struct scsi_cmnd *scmd); 266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 268 int cmd_type); 269 static void hpsa_free_cmd_pool(struct ctlr_info *h); 270 #define VPD_PAGE (1 << 8) 271 #define HPSA_SIMPLE_ERROR_BITS 0x03 272 273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 274 static void hpsa_scan_start(struct Scsi_Host *); 275 static int hpsa_scan_finished(struct Scsi_Host *sh, 276 unsigned long elapsed_time); 277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 278 279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 280 static int hpsa_slave_alloc(struct scsi_device *sdev); 281 static int hpsa_slave_configure(struct scsi_device *sdev); 282 static void hpsa_slave_destroy(struct scsi_device *sdev); 283 284 static void hpsa_update_scsi_devices(struct ctlr_info *h); 285 static int check_for_unit_attention(struct ctlr_info *h, 286 struct CommandList *c); 287 static void check_ioctl_unit_attention(struct ctlr_info *h, 288 struct CommandList *c); 289 /* performant mode helper functions */ 290 static void calc_bucket_map(int *bucket, int num_buckets, 291 int nsgs, int min_blocks, u32 *bucket_map); 292 static void hpsa_free_performant_mode(struct ctlr_info *h); 293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 294 static inline u32 next_command(struct ctlr_info *h, u8 q); 295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 296 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 297 u64 *cfg_offset); 298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 299 unsigned long *memory_bar); 300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 301 bool *legacy_board); 302 static int wait_for_device_to_become_ready(struct ctlr_info *h, 303 unsigned char lunaddr[], 304 int reply_queue); 305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 306 int wait_for_ready); 307 static inline void finish_cmd(struct CommandList *c); 308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 309 #define BOARD_NOT_READY 0 310 #define BOARD_READY 1 311 static void hpsa_drain_accel_commands(struct ctlr_info *h); 312 static void hpsa_flush_cache(struct ctlr_info *h); 313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 316 static void hpsa_command_resubmit_worker(struct work_struct *work); 317 static u32 lockup_detected(struct ctlr_info *h); 318 static int detect_controller_lockup(struct ctlr_info *h); 319 static void hpsa_disable_rld_caching(struct ctlr_info *h); 320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 321 struct ReportExtendedLUNdata *buf, int bufsize); 322 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 323 unsigned char scsi3addr[], u8 page); 324 static int hpsa_luns_changed(struct ctlr_info *h); 325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 326 struct hpsa_scsi_dev_t *dev, 327 unsigned char *scsi3addr); 328 329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 330 { 331 unsigned long *priv = shost_priv(sdev->host); 332 return (struct ctlr_info *) *priv; 333 } 334 335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 336 { 337 unsigned long *priv = shost_priv(sh); 338 return (struct ctlr_info *) *priv; 339 } 340 341 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 342 { 343 return c->scsi_cmd == SCSI_CMD_IDLE; 344 } 345 346 static inline bool hpsa_is_pending_event(struct CommandList *c) 347 { 348 return c->reset_pending; 349 } 350 351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 352 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 353 u8 *sense_key, u8 *asc, u8 *ascq) 354 { 355 struct scsi_sense_hdr sshdr; 356 bool rc; 357 358 *sense_key = -1; 359 *asc = -1; 360 *ascq = -1; 361 362 if (sense_data_len < 1) 363 return; 364 365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 366 if (rc) { 367 *sense_key = sshdr.sense_key; 368 *asc = sshdr.asc; 369 *ascq = sshdr.ascq; 370 } 371 } 372 373 static int check_for_unit_attention(struct ctlr_info *h, 374 struct CommandList *c) 375 { 376 u8 sense_key, asc, ascq; 377 int sense_len; 378 379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 380 sense_len = sizeof(c->err_info->SenseInfo); 381 else 382 sense_len = c->err_info->SenseLen; 383 384 decode_sense_data(c->err_info->SenseInfo, sense_len, 385 &sense_key, &asc, &ascq); 386 if (sense_key != UNIT_ATTENTION || asc == 0xff) 387 return 0; 388 389 switch (asc) { 390 case STATE_CHANGED: 391 dev_warn(&h->pdev->dev, 392 "%s: a state change detected, command retried\n", 393 h->devname); 394 break; 395 case LUN_FAILED: 396 dev_warn(&h->pdev->dev, 397 "%s: LUN failure detected\n", h->devname); 398 break; 399 case REPORT_LUNS_CHANGED: 400 dev_warn(&h->pdev->dev, 401 "%s: report LUN data changed\n", h->devname); 402 /* 403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 404 * target (array) devices. 405 */ 406 break; 407 case POWER_OR_RESET: 408 dev_warn(&h->pdev->dev, 409 "%s: a power on or device reset detected\n", 410 h->devname); 411 break; 412 case UNIT_ATTENTION_CLEARED: 413 dev_warn(&h->pdev->dev, 414 "%s: unit attention cleared by another initiator\n", 415 h->devname); 416 break; 417 default: 418 dev_warn(&h->pdev->dev, 419 "%s: unknown unit attention detected\n", 420 h->devname); 421 break; 422 } 423 return 1; 424 } 425 426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 427 { 428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 429 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 431 return 0; 432 dev_warn(&h->pdev->dev, HPSA "device busy"); 433 return 1; 434 } 435 436 static u32 lockup_detected(struct ctlr_info *h); 437 static ssize_t host_show_lockup_detected(struct device *dev, 438 struct device_attribute *attr, char *buf) 439 { 440 int ld; 441 struct ctlr_info *h; 442 struct Scsi_Host *shost = class_to_shost(dev); 443 444 h = shost_to_hba(shost); 445 ld = lockup_detected(h); 446 447 return sprintf(buf, "ld=%d\n", ld); 448 } 449 450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 451 struct device_attribute *attr, 452 const char *buf, size_t count) 453 { 454 int status, len; 455 struct ctlr_info *h; 456 struct Scsi_Host *shost = class_to_shost(dev); 457 char tmpbuf[10]; 458 459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 460 return -EACCES; 461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 462 strncpy(tmpbuf, buf, len); 463 tmpbuf[len] = '\0'; 464 if (sscanf(tmpbuf, "%d", &status) != 1) 465 return -EINVAL; 466 h = shost_to_hba(shost); 467 h->acciopath_status = !!status; 468 dev_warn(&h->pdev->dev, 469 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 470 h->acciopath_status ? "enabled" : "disabled"); 471 return count; 472 } 473 474 static ssize_t host_store_raid_offload_debug(struct device *dev, 475 struct device_attribute *attr, 476 const char *buf, size_t count) 477 { 478 int debug_level, len; 479 struct ctlr_info *h; 480 struct Scsi_Host *shost = class_to_shost(dev); 481 char tmpbuf[10]; 482 483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 484 return -EACCES; 485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 486 strncpy(tmpbuf, buf, len); 487 tmpbuf[len] = '\0'; 488 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 489 return -EINVAL; 490 if (debug_level < 0) 491 debug_level = 0; 492 h = shost_to_hba(shost); 493 h->raid_offload_debug = debug_level; 494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 495 h->raid_offload_debug); 496 return count; 497 } 498 499 static ssize_t host_store_rescan(struct device *dev, 500 struct device_attribute *attr, 501 const char *buf, size_t count) 502 { 503 struct ctlr_info *h; 504 struct Scsi_Host *shost = class_to_shost(dev); 505 h = shost_to_hba(shost); 506 hpsa_scan_start(h->scsi_host); 507 return count; 508 } 509 510 static ssize_t host_show_firmware_revision(struct device *dev, 511 struct device_attribute *attr, char *buf) 512 { 513 struct ctlr_info *h; 514 struct Scsi_Host *shost = class_to_shost(dev); 515 unsigned char *fwrev; 516 517 h = shost_to_hba(shost); 518 if (!h->hba_inquiry_data) 519 return 0; 520 fwrev = &h->hba_inquiry_data[32]; 521 return snprintf(buf, 20, "%c%c%c%c\n", 522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 523 } 524 525 static ssize_t host_show_commands_outstanding(struct device *dev, 526 struct device_attribute *attr, char *buf) 527 { 528 struct Scsi_Host *shost = class_to_shost(dev); 529 struct ctlr_info *h = shost_to_hba(shost); 530 531 return snprintf(buf, 20, "%d\n", 532 atomic_read(&h->commands_outstanding)); 533 } 534 535 static ssize_t host_show_transport_mode(struct device *dev, 536 struct device_attribute *attr, char *buf) 537 { 538 struct ctlr_info *h; 539 struct Scsi_Host *shost = class_to_shost(dev); 540 541 h = shost_to_hba(shost); 542 return snprintf(buf, 20, "%s\n", 543 h->transMethod & CFGTBL_Trans_Performant ? 544 "performant" : "simple"); 545 } 546 547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 548 struct device_attribute *attr, char *buf) 549 { 550 struct ctlr_info *h; 551 struct Scsi_Host *shost = class_to_shost(dev); 552 553 h = shost_to_hba(shost); 554 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 555 (h->acciopath_status == 1) ? "enabled" : "disabled"); 556 } 557 558 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 559 static u32 unresettable_controller[] = { 560 0x324a103C, /* Smart Array P712m */ 561 0x324b103C, /* Smart Array P711m */ 562 0x3223103C, /* Smart Array P800 */ 563 0x3234103C, /* Smart Array P400 */ 564 0x3235103C, /* Smart Array P400i */ 565 0x3211103C, /* Smart Array E200i */ 566 0x3212103C, /* Smart Array E200 */ 567 0x3213103C, /* Smart Array E200i */ 568 0x3214103C, /* Smart Array E200i */ 569 0x3215103C, /* Smart Array E200i */ 570 0x3237103C, /* Smart Array E500 */ 571 0x323D103C, /* Smart Array P700m */ 572 0x40800E11, /* Smart Array 5i */ 573 0x409C0E11, /* Smart Array 6400 */ 574 0x409D0E11, /* Smart Array 6400 EM */ 575 0x40700E11, /* Smart Array 5300 */ 576 0x40820E11, /* Smart Array 532 */ 577 0x40830E11, /* Smart Array 5312 */ 578 0x409A0E11, /* Smart Array 641 */ 579 0x409B0E11, /* Smart Array 642 */ 580 0x40910E11, /* Smart Array 6i */ 581 }; 582 583 /* List of controllers which cannot even be soft reset */ 584 static u32 soft_unresettable_controller[] = { 585 0x40800E11, /* Smart Array 5i */ 586 0x40700E11, /* Smart Array 5300 */ 587 0x40820E11, /* Smart Array 532 */ 588 0x40830E11, /* Smart Array 5312 */ 589 0x409A0E11, /* Smart Array 641 */ 590 0x409B0E11, /* Smart Array 642 */ 591 0x40910E11, /* Smart Array 6i */ 592 /* Exclude 640x boards. These are two pci devices in one slot 593 * which share a battery backed cache module. One controls the 594 * cache, the other accesses the cache through the one that controls 595 * it. If we reset the one controlling the cache, the other will 596 * likely not be happy. Just forbid resetting this conjoined mess. 597 * The 640x isn't really supported by hpsa anyway. 598 */ 599 0x409C0E11, /* Smart Array 6400 */ 600 0x409D0E11, /* Smart Array 6400 EM */ 601 }; 602 603 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 604 { 605 int i; 606 607 for (i = 0; i < nelems; i++) 608 if (a[i] == board_id) 609 return 1; 610 return 0; 611 } 612 613 static int ctlr_is_hard_resettable(u32 board_id) 614 { 615 return !board_id_in_array(unresettable_controller, 616 ARRAY_SIZE(unresettable_controller), board_id); 617 } 618 619 static int ctlr_is_soft_resettable(u32 board_id) 620 { 621 return !board_id_in_array(soft_unresettable_controller, 622 ARRAY_SIZE(soft_unresettable_controller), board_id); 623 } 624 625 static int ctlr_is_resettable(u32 board_id) 626 { 627 return ctlr_is_hard_resettable(board_id) || 628 ctlr_is_soft_resettable(board_id); 629 } 630 631 static ssize_t host_show_resettable(struct device *dev, 632 struct device_attribute *attr, char *buf) 633 { 634 struct ctlr_info *h; 635 struct Scsi_Host *shost = class_to_shost(dev); 636 637 h = shost_to_hba(shost); 638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 639 } 640 641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 642 { 643 return (scsi3addr[3] & 0xC0) == 0x40; 644 } 645 646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 647 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 648 }; 649 #define HPSA_RAID_0 0 650 #define HPSA_RAID_4 1 651 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 652 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 653 #define HPSA_RAID_51 4 654 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 658 659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 660 { 661 return !device->physical_device; 662 } 663 664 static ssize_t raid_level_show(struct device *dev, 665 struct device_attribute *attr, char *buf) 666 { 667 ssize_t l = 0; 668 unsigned char rlevel; 669 struct ctlr_info *h; 670 struct scsi_device *sdev; 671 struct hpsa_scsi_dev_t *hdev; 672 unsigned long flags; 673 674 sdev = to_scsi_device(dev); 675 h = sdev_to_hba(sdev); 676 spin_lock_irqsave(&h->lock, flags); 677 hdev = sdev->hostdata; 678 if (!hdev) { 679 spin_unlock_irqrestore(&h->lock, flags); 680 return -ENODEV; 681 } 682 683 /* Is this even a logical drive? */ 684 if (!is_logical_device(hdev)) { 685 spin_unlock_irqrestore(&h->lock, flags); 686 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 687 return l; 688 } 689 690 rlevel = hdev->raid_level; 691 spin_unlock_irqrestore(&h->lock, flags); 692 if (rlevel > RAID_UNKNOWN) 693 rlevel = RAID_UNKNOWN; 694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 695 return l; 696 } 697 698 static ssize_t lunid_show(struct device *dev, 699 struct device_attribute *attr, char *buf) 700 { 701 struct ctlr_info *h; 702 struct scsi_device *sdev; 703 struct hpsa_scsi_dev_t *hdev; 704 unsigned long flags; 705 unsigned char lunid[8]; 706 707 sdev = to_scsi_device(dev); 708 h = sdev_to_hba(sdev); 709 spin_lock_irqsave(&h->lock, flags); 710 hdev = sdev->hostdata; 711 if (!hdev) { 712 spin_unlock_irqrestore(&h->lock, flags); 713 return -ENODEV; 714 } 715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 716 spin_unlock_irqrestore(&h->lock, flags); 717 return snprintf(buf, 20, "0x%8phN\n", lunid); 718 } 719 720 static ssize_t unique_id_show(struct device *dev, 721 struct device_attribute *attr, char *buf) 722 { 723 struct ctlr_info *h; 724 struct scsi_device *sdev; 725 struct hpsa_scsi_dev_t *hdev; 726 unsigned long flags; 727 unsigned char sn[16]; 728 729 sdev = to_scsi_device(dev); 730 h = sdev_to_hba(sdev); 731 spin_lock_irqsave(&h->lock, flags); 732 hdev = sdev->hostdata; 733 if (!hdev) { 734 spin_unlock_irqrestore(&h->lock, flags); 735 return -ENODEV; 736 } 737 memcpy(sn, hdev->device_id, sizeof(sn)); 738 spin_unlock_irqrestore(&h->lock, flags); 739 return snprintf(buf, 16 * 2 + 2, 740 "%02X%02X%02X%02X%02X%02X%02X%02X" 741 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 742 sn[0], sn[1], sn[2], sn[3], 743 sn[4], sn[5], sn[6], sn[7], 744 sn[8], sn[9], sn[10], sn[11], 745 sn[12], sn[13], sn[14], sn[15]); 746 } 747 748 static ssize_t sas_address_show(struct device *dev, 749 struct device_attribute *attr, char *buf) 750 { 751 struct ctlr_info *h; 752 struct scsi_device *sdev; 753 struct hpsa_scsi_dev_t *hdev; 754 unsigned long flags; 755 u64 sas_address; 756 757 sdev = to_scsi_device(dev); 758 h = sdev_to_hba(sdev); 759 spin_lock_irqsave(&h->lock, flags); 760 hdev = sdev->hostdata; 761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 762 spin_unlock_irqrestore(&h->lock, flags); 763 return -ENODEV; 764 } 765 sas_address = hdev->sas_address; 766 spin_unlock_irqrestore(&h->lock, flags); 767 768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 769 } 770 771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 772 struct device_attribute *attr, char *buf) 773 { 774 struct ctlr_info *h; 775 struct scsi_device *sdev; 776 struct hpsa_scsi_dev_t *hdev; 777 unsigned long flags; 778 int offload_enabled; 779 780 sdev = to_scsi_device(dev); 781 h = sdev_to_hba(sdev); 782 spin_lock_irqsave(&h->lock, flags); 783 hdev = sdev->hostdata; 784 if (!hdev) { 785 spin_unlock_irqrestore(&h->lock, flags); 786 return -ENODEV; 787 } 788 offload_enabled = hdev->offload_enabled; 789 spin_unlock_irqrestore(&h->lock, flags); 790 791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 792 return snprintf(buf, 20, "%d\n", offload_enabled); 793 else 794 return snprintf(buf, 40, "%s\n", 795 "Not applicable for a controller"); 796 } 797 798 #define MAX_PATHS 8 799 static ssize_t path_info_show(struct device *dev, 800 struct device_attribute *attr, char *buf) 801 { 802 struct ctlr_info *h; 803 struct scsi_device *sdev; 804 struct hpsa_scsi_dev_t *hdev; 805 unsigned long flags; 806 int i; 807 int output_len = 0; 808 u8 box; 809 u8 bay; 810 u8 path_map_index = 0; 811 char *active; 812 unsigned char phys_connector[2]; 813 814 sdev = to_scsi_device(dev); 815 h = sdev_to_hba(sdev); 816 spin_lock_irqsave(&h->devlock, flags); 817 hdev = sdev->hostdata; 818 if (!hdev) { 819 spin_unlock_irqrestore(&h->devlock, flags); 820 return -ENODEV; 821 } 822 823 bay = hdev->bay; 824 for (i = 0; i < MAX_PATHS; i++) { 825 path_map_index = 1<<i; 826 if (i == hdev->active_path_index) 827 active = "Active"; 828 else if (hdev->path_map & path_map_index) 829 active = "Inactive"; 830 else 831 continue; 832 833 output_len += scnprintf(buf + output_len, 834 PAGE_SIZE - output_len, 835 "[%d:%d:%d:%d] %20.20s ", 836 h->scsi_host->host_no, 837 hdev->bus, hdev->target, hdev->lun, 838 scsi_device_type(hdev->devtype)); 839 840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 841 output_len += scnprintf(buf + output_len, 842 PAGE_SIZE - output_len, 843 "%s\n", active); 844 continue; 845 } 846 847 box = hdev->box[i]; 848 memcpy(&phys_connector, &hdev->phys_connector[i], 849 sizeof(phys_connector)); 850 if (phys_connector[0] < '0') 851 phys_connector[0] = '0'; 852 if (phys_connector[1] < '0') 853 phys_connector[1] = '0'; 854 output_len += scnprintf(buf + output_len, 855 PAGE_SIZE - output_len, 856 "PORT: %.2s ", 857 phys_connector); 858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 859 hdev->expose_device) { 860 if (box == 0 || box == 0xFF) { 861 output_len += scnprintf(buf + output_len, 862 PAGE_SIZE - output_len, 863 "BAY: %hhu %s\n", 864 bay, active); 865 } else { 866 output_len += scnprintf(buf + output_len, 867 PAGE_SIZE - output_len, 868 "BOX: %hhu BAY: %hhu %s\n", 869 box, bay, active); 870 } 871 } else if (box != 0 && box != 0xFF) { 872 output_len += scnprintf(buf + output_len, 873 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 874 box, active); 875 } else 876 output_len += scnprintf(buf + output_len, 877 PAGE_SIZE - output_len, "%s\n", active); 878 } 879 880 spin_unlock_irqrestore(&h->devlock, flags); 881 return output_len; 882 } 883 884 static ssize_t host_show_ctlr_num(struct device *dev, 885 struct device_attribute *attr, char *buf) 886 { 887 struct ctlr_info *h; 888 struct Scsi_Host *shost = class_to_shost(dev); 889 890 h = shost_to_hba(shost); 891 return snprintf(buf, 20, "%d\n", h->ctlr); 892 } 893 894 static ssize_t host_show_legacy_board(struct device *dev, 895 struct device_attribute *attr, char *buf) 896 { 897 struct ctlr_info *h; 898 struct Scsi_Host *shost = class_to_shost(dev); 899 900 h = shost_to_hba(shost); 901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 902 } 903 904 static DEVICE_ATTR_RO(raid_level); 905 static DEVICE_ATTR_RO(lunid); 906 static DEVICE_ATTR_RO(unique_id); 907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 908 static DEVICE_ATTR_RO(sas_address); 909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 910 host_show_hp_ssd_smart_path_enabled, NULL); 911 static DEVICE_ATTR_RO(path_info); 912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 913 host_show_hp_ssd_smart_path_status, 914 host_store_hp_ssd_smart_path_status); 915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 916 host_store_raid_offload_debug); 917 static DEVICE_ATTR(firmware_revision, S_IRUGO, 918 host_show_firmware_revision, NULL); 919 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 920 host_show_commands_outstanding, NULL); 921 static DEVICE_ATTR(transport_mode, S_IRUGO, 922 host_show_transport_mode, NULL); 923 static DEVICE_ATTR(resettable, S_IRUGO, 924 host_show_resettable, NULL); 925 static DEVICE_ATTR(lockup_detected, S_IRUGO, 926 host_show_lockup_detected, NULL); 927 static DEVICE_ATTR(ctlr_num, S_IRUGO, 928 host_show_ctlr_num, NULL); 929 static DEVICE_ATTR(legacy_board, S_IRUGO, 930 host_show_legacy_board, NULL); 931 932 static struct device_attribute *hpsa_sdev_attrs[] = { 933 &dev_attr_raid_level, 934 &dev_attr_lunid, 935 &dev_attr_unique_id, 936 &dev_attr_hp_ssd_smart_path_enabled, 937 &dev_attr_path_info, 938 &dev_attr_sas_address, 939 NULL, 940 }; 941 942 static struct device_attribute *hpsa_shost_attrs[] = { 943 &dev_attr_rescan, 944 &dev_attr_firmware_revision, 945 &dev_attr_commands_outstanding, 946 &dev_attr_transport_mode, 947 &dev_attr_resettable, 948 &dev_attr_hp_ssd_smart_path_status, 949 &dev_attr_raid_offload_debug, 950 &dev_attr_lockup_detected, 951 &dev_attr_ctlr_num, 952 &dev_attr_legacy_board, 953 NULL, 954 }; 955 956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 957 HPSA_MAX_CONCURRENT_PASSTHRUS) 958 959 static struct scsi_host_template hpsa_driver_template = { 960 .module = THIS_MODULE, 961 .name = HPSA, 962 .proc_name = HPSA, 963 .queuecommand = hpsa_scsi_queue_command, 964 .scan_start = hpsa_scan_start, 965 .scan_finished = hpsa_scan_finished, 966 .change_queue_depth = hpsa_change_queue_depth, 967 .this_id = -1, 968 .use_clustering = ENABLE_CLUSTERING, 969 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 970 .ioctl = hpsa_ioctl, 971 .slave_alloc = hpsa_slave_alloc, 972 .slave_configure = hpsa_slave_configure, 973 .slave_destroy = hpsa_slave_destroy, 974 #ifdef CONFIG_COMPAT 975 .compat_ioctl = hpsa_compat_ioctl, 976 #endif 977 .sdev_attrs = hpsa_sdev_attrs, 978 .shost_attrs = hpsa_shost_attrs, 979 .max_sectors = 2048, 980 .no_write_same = 1, 981 }; 982 983 static inline u32 next_command(struct ctlr_info *h, u8 q) 984 { 985 u32 a; 986 struct reply_queue_buffer *rq = &h->reply_queue[q]; 987 988 if (h->transMethod & CFGTBL_Trans_io_accel1) 989 return h->access.command_completed(h, q); 990 991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 992 return h->access.command_completed(h, q); 993 994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 995 a = rq->head[rq->current_entry]; 996 rq->current_entry++; 997 atomic_dec(&h->commands_outstanding); 998 } else { 999 a = FIFO_EMPTY; 1000 } 1001 /* Check for wraparound */ 1002 if (rq->current_entry == h->max_commands) { 1003 rq->current_entry = 0; 1004 rq->wraparound ^= 1; 1005 } 1006 return a; 1007 } 1008 1009 /* 1010 * There are some special bits in the bus address of the 1011 * command that we have to set for the controller to know 1012 * how to process the command: 1013 * 1014 * Normal performant mode: 1015 * bit 0: 1 means performant mode, 0 means simple mode. 1016 * bits 1-3 = block fetch table entry 1017 * bits 4-6 = command type (== 0) 1018 * 1019 * ioaccel1 mode: 1020 * bit 0 = "performant mode" bit. 1021 * bits 1-3 = block fetch table entry 1022 * bits 4-6 = command type (== 110) 1023 * (command type is needed because ioaccel1 mode 1024 * commands are submitted through the same register as normal 1025 * mode commands, so this is how the controller knows whether 1026 * the command is normal mode or ioaccel1 mode.) 1027 * 1028 * ioaccel2 mode: 1029 * bit 0 = "performant mode" bit. 1030 * bits 1-4 = block fetch table entry (note extra bit) 1031 * bits 4-6 = not needed, because ioaccel2 mode has 1032 * a separate special register for submitting commands. 1033 */ 1034 1035 /* 1036 * set_performant_mode: Modify the tag for cciss performant 1037 * set bit 0 for pull model, bits 3-1 for block fetch 1038 * register number 1039 */ 1040 #define DEFAULT_REPLY_QUEUE (-1) 1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1042 int reply_queue) 1043 { 1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1046 if (unlikely(!h->msix_vectors)) 1047 return; 1048 c->Header.ReplyQueue = reply_queue; 1049 } 1050 } 1051 1052 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1053 struct CommandList *c, 1054 int reply_queue) 1055 { 1056 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1057 1058 /* 1059 * Tell the controller to post the reply to the queue for this 1060 * processor. This seems to give the best I/O throughput. 1061 */ 1062 cp->ReplyQueue = reply_queue; 1063 /* 1064 * Set the bits in the address sent down to include: 1065 * - performant mode bit (bit 0) 1066 * - pull count (bits 1-3) 1067 * - command type (bits 4-6) 1068 */ 1069 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1070 IOACCEL1_BUSADDR_CMDTYPE; 1071 } 1072 1073 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1074 struct CommandList *c, 1075 int reply_queue) 1076 { 1077 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1078 &h->ioaccel2_cmd_pool[c->cmdindex]; 1079 1080 /* Tell the controller to post the reply to the queue for this 1081 * processor. This seems to give the best I/O throughput. 1082 */ 1083 cp->reply_queue = reply_queue; 1084 /* Set the bits in the address sent down to include: 1085 * - performant mode bit not used in ioaccel mode 2 1086 * - pull count (bits 0-3) 1087 * - command type isn't needed for ioaccel2 1088 */ 1089 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1090 } 1091 1092 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1093 struct CommandList *c, 1094 int reply_queue) 1095 { 1096 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1097 1098 /* 1099 * Tell the controller to post the reply to the queue for this 1100 * processor. This seems to give the best I/O throughput. 1101 */ 1102 cp->reply_queue = reply_queue; 1103 /* 1104 * Set the bits in the address sent down to include: 1105 * - performant mode bit not used in ioaccel mode 2 1106 * - pull count (bits 0-3) 1107 * - command type isn't needed for ioaccel2 1108 */ 1109 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1110 } 1111 1112 static int is_firmware_flash_cmd(u8 *cdb) 1113 { 1114 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1115 } 1116 1117 /* 1118 * During firmware flash, the heartbeat register may not update as frequently 1119 * as it should. So we dial down lockup detection during firmware flash. and 1120 * dial it back up when firmware flash completes. 1121 */ 1122 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1123 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1124 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1125 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1126 struct CommandList *c) 1127 { 1128 if (!is_firmware_flash_cmd(c->Request.CDB)) 1129 return; 1130 atomic_inc(&h->firmware_flash_in_progress); 1131 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1132 } 1133 1134 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1135 struct CommandList *c) 1136 { 1137 if (is_firmware_flash_cmd(c->Request.CDB) && 1138 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1139 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1140 } 1141 1142 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1143 struct CommandList *c, int reply_queue) 1144 { 1145 dial_down_lockup_detection_during_fw_flash(h, c); 1146 atomic_inc(&h->commands_outstanding); 1147 1148 reply_queue = h->reply_map[raw_smp_processor_id()]; 1149 switch (c->cmd_type) { 1150 case CMD_IOACCEL1: 1151 set_ioaccel1_performant_mode(h, c, reply_queue); 1152 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1153 break; 1154 case CMD_IOACCEL2: 1155 set_ioaccel2_performant_mode(h, c, reply_queue); 1156 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1157 break; 1158 case IOACCEL2_TMF: 1159 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1160 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1161 break; 1162 default: 1163 set_performant_mode(h, c, reply_queue); 1164 h->access.submit_command(h, c); 1165 } 1166 } 1167 1168 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1169 { 1170 if (unlikely(hpsa_is_pending_event(c))) 1171 return finish_cmd(c); 1172 1173 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1174 } 1175 1176 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1177 { 1178 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1179 } 1180 1181 static inline int is_scsi_rev_5(struct ctlr_info *h) 1182 { 1183 if (!h->hba_inquiry_data) 1184 return 0; 1185 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1186 return 1; 1187 return 0; 1188 } 1189 1190 static int hpsa_find_target_lun(struct ctlr_info *h, 1191 unsigned char scsi3addr[], int bus, int *target, int *lun) 1192 { 1193 /* finds an unused bus, target, lun for a new physical device 1194 * assumes h->devlock is held 1195 */ 1196 int i, found = 0; 1197 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1198 1199 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1200 1201 for (i = 0; i < h->ndevices; i++) { 1202 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1203 __set_bit(h->dev[i]->target, lun_taken); 1204 } 1205 1206 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1207 if (i < HPSA_MAX_DEVICES) { 1208 /* *bus = 1; */ 1209 *target = i; 1210 *lun = 0; 1211 found = 1; 1212 } 1213 return !found; 1214 } 1215 1216 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1217 struct hpsa_scsi_dev_t *dev, char *description) 1218 { 1219 #define LABEL_SIZE 25 1220 char label[LABEL_SIZE]; 1221 1222 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1223 return; 1224 1225 switch (dev->devtype) { 1226 case TYPE_RAID: 1227 snprintf(label, LABEL_SIZE, "controller"); 1228 break; 1229 case TYPE_ENCLOSURE: 1230 snprintf(label, LABEL_SIZE, "enclosure"); 1231 break; 1232 case TYPE_DISK: 1233 case TYPE_ZBC: 1234 if (dev->external) 1235 snprintf(label, LABEL_SIZE, "external"); 1236 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1237 snprintf(label, LABEL_SIZE, "%s", 1238 raid_label[PHYSICAL_DRIVE]); 1239 else 1240 snprintf(label, LABEL_SIZE, "RAID-%s", 1241 dev->raid_level > RAID_UNKNOWN ? "?" : 1242 raid_label[dev->raid_level]); 1243 break; 1244 case TYPE_ROM: 1245 snprintf(label, LABEL_SIZE, "rom"); 1246 break; 1247 case TYPE_TAPE: 1248 snprintf(label, LABEL_SIZE, "tape"); 1249 break; 1250 case TYPE_MEDIUM_CHANGER: 1251 snprintf(label, LABEL_SIZE, "changer"); 1252 break; 1253 default: 1254 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1255 break; 1256 } 1257 1258 dev_printk(level, &h->pdev->dev, 1259 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1260 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1261 description, 1262 scsi_device_type(dev->devtype), 1263 dev->vendor, 1264 dev->model, 1265 label, 1266 dev->offload_config ? '+' : '-', 1267 dev->offload_to_be_enabled ? '+' : '-', 1268 dev->expose_device); 1269 } 1270 1271 /* Add an entry into h->dev[] array. */ 1272 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1273 struct hpsa_scsi_dev_t *device, 1274 struct hpsa_scsi_dev_t *added[], int *nadded) 1275 { 1276 /* assumes h->devlock is held */ 1277 int n = h->ndevices; 1278 int i; 1279 unsigned char addr1[8], addr2[8]; 1280 struct hpsa_scsi_dev_t *sd; 1281 1282 if (n >= HPSA_MAX_DEVICES) { 1283 dev_err(&h->pdev->dev, "too many devices, some will be " 1284 "inaccessible.\n"); 1285 return -1; 1286 } 1287 1288 /* physical devices do not have lun or target assigned until now. */ 1289 if (device->lun != -1) 1290 /* Logical device, lun is already assigned. */ 1291 goto lun_assigned; 1292 1293 /* If this device a non-zero lun of a multi-lun device 1294 * byte 4 of the 8-byte LUN addr will contain the logical 1295 * unit no, zero otherwise. 1296 */ 1297 if (device->scsi3addr[4] == 0) { 1298 /* This is not a non-zero lun of a multi-lun device */ 1299 if (hpsa_find_target_lun(h, device->scsi3addr, 1300 device->bus, &device->target, &device->lun) != 0) 1301 return -1; 1302 goto lun_assigned; 1303 } 1304 1305 /* This is a non-zero lun of a multi-lun device. 1306 * Search through our list and find the device which 1307 * has the same 8 byte LUN address, excepting byte 4 and 5. 1308 * Assign the same bus and target for this new LUN. 1309 * Use the logical unit number from the firmware. 1310 */ 1311 memcpy(addr1, device->scsi3addr, 8); 1312 addr1[4] = 0; 1313 addr1[5] = 0; 1314 for (i = 0; i < n; i++) { 1315 sd = h->dev[i]; 1316 memcpy(addr2, sd->scsi3addr, 8); 1317 addr2[4] = 0; 1318 addr2[5] = 0; 1319 /* differ only in byte 4 and 5? */ 1320 if (memcmp(addr1, addr2, 8) == 0) { 1321 device->bus = sd->bus; 1322 device->target = sd->target; 1323 device->lun = device->scsi3addr[4]; 1324 break; 1325 } 1326 } 1327 if (device->lun == -1) { 1328 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1329 " suspect firmware bug or unsupported hardware " 1330 "configuration.\n"); 1331 return -1; 1332 } 1333 1334 lun_assigned: 1335 1336 h->dev[n] = device; 1337 h->ndevices++; 1338 added[*nadded] = device; 1339 (*nadded)++; 1340 hpsa_show_dev_msg(KERN_INFO, h, device, 1341 device->expose_device ? "added" : "masked"); 1342 return 0; 1343 } 1344 1345 /* 1346 * Called during a scan operation. 1347 * 1348 * Update an entry in h->dev[] array. 1349 */ 1350 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1351 int entry, struct hpsa_scsi_dev_t *new_entry) 1352 { 1353 /* assumes h->devlock is held */ 1354 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1355 1356 /* Raid level changed. */ 1357 h->dev[entry]->raid_level = new_entry->raid_level; 1358 1359 /* 1360 * ioacccel_handle may have changed for a dual domain disk 1361 */ 1362 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1363 1364 /* Raid offload parameters changed. Careful about the ordering. */ 1365 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1366 /* 1367 * if drive is newly offload_enabled, we want to copy the 1368 * raid map data first. If previously offload_enabled and 1369 * offload_config were set, raid map data had better be 1370 * the same as it was before. If raid map data has changed 1371 * then it had better be the case that 1372 * h->dev[entry]->offload_enabled is currently 0. 1373 */ 1374 h->dev[entry]->raid_map = new_entry->raid_map; 1375 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1376 } 1377 if (new_entry->offload_to_be_enabled) { 1378 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1379 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1380 } 1381 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1382 h->dev[entry]->offload_config = new_entry->offload_config; 1383 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1384 h->dev[entry]->queue_depth = new_entry->queue_depth; 1385 1386 /* 1387 * We can turn off ioaccel offload now, but need to delay turning 1388 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1389 * can't do that until all the devices are updated. 1390 */ 1391 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1392 1393 /* 1394 * turn ioaccel off immediately if told to do so. 1395 */ 1396 if (!new_entry->offload_to_be_enabled) 1397 h->dev[entry]->offload_enabled = 0; 1398 1399 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1400 } 1401 1402 /* Replace an entry from h->dev[] array. */ 1403 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1404 int entry, struct hpsa_scsi_dev_t *new_entry, 1405 struct hpsa_scsi_dev_t *added[], int *nadded, 1406 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1407 { 1408 /* assumes h->devlock is held */ 1409 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1410 removed[*nremoved] = h->dev[entry]; 1411 (*nremoved)++; 1412 1413 /* 1414 * New physical devices won't have target/lun assigned yet 1415 * so we need to preserve the values in the slot we are replacing. 1416 */ 1417 if (new_entry->target == -1) { 1418 new_entry->target = h->dev[entry]->target; 1419 new_entry->lun = h->dev[entry]->lun; 1420 } 1421 1422 h->dev[entry] = new_entry; 1423 added[*nadded] = new_entry; 1424 (*nadded)++; 1425 1426 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1427 } 1428 1429 /* Remove an entry from h->dev[] array. */ 1430 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1431 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1432 { 1433 /* assumes h->devlock is held */ 1434 int i; 1435 struct hpsa_scsi_dev_t *sd; 1436 1437 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1438 1439 sd = h->dev[entry]; 1440 removed[*nremoved] = h->dev[entry]; 1441 (*nremoved)++; 1442 1443 for (i = entry; i < h->ndevices-1; i++) 1444 h->dev[i] = h->dev[i+1]; 1445 h->ndevices--; 1446 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1447 } 1448 1449 #define SCSI3ADDR_EQ(a, b) ( \ 1450 (a)[7] == (b)[7] && \ 1451 (a)[6] == (b)[6] && \ 1452 (a)[5] == (b)[5] && \ 1453 (a)[4] == (b)[4] && \ 1454 (a)[3] == (b)[3] && \ 1455 (a)[2] == (b)[2] && \ 1456 (a)[1] == (b)[1] && \ 1457 (a)[0] == (b)[0]) 1458 1459 static void fixup_botched_add(struct ctlr_info *h, 1460 struct hpsa_scsi_dev_t *added) 1461 { 1462 /* called when scsi_add_device fails in order to re-adjust 1463 * h->dev[] to match the mid layer's view. 1464 */ 1465 unsigned long flags; 1466 int i, j; 1467 1468 spin_lock_irqsave(&h->lock, flags); 1469 for (i = 0; i < h->ndevices; i++) { 1470 if (h->dev[i] == added) { 1471 for (j = i; j < h->ndevices-1; j++) 1472 h->dev[j] = h->dev[j+1]; 1473 h->ndevices--; 1474 break; 1475 } 1476 } 1477 spin_unlock_irqrestore(&h->lock, flags); 1478 kfree(added); 1479 } 1480 1481 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1482 struct hpsa_scsi_dev_t *dev2) 1483 { 1484 /* we compare everything except lun and target as these 1485 * are not yet assigned. Compare parts likely 1486 * to differ first 1487 */ 1488 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1489 sizeof(dev1->scsi3addr)) != 0) 1490 return 0; 1491 if (memcmp(dev1->device_id, dev2->device_id, 1492 sizeof(dev1->device_id)) != 0) 1493 return 0; 1494 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1495 return 0; 1496 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1497 return 0; 1498 if (dev1->devtype != dev2->devtype) 1499 return 0; 1500 if (dev1->bus != dev2->bus) 1501 return 0; 1502 return 1; 1503 } 1504 1505 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1506 struct hpsa_scsi_dev_t *dev2) 1507 { 1508 /* Device attributes that can change, but don't mean 1509 * that the device is a different device, nor that the OS 1510 * needs to be told anything about the change. 1511 */ 1512 if (dev1->raid_level != dev2->raid_level) 1513 return 1; 1514 if (dev1->offload_config != dev2->offload_config) 1515 return 1; 1516 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1517 return 1; 1518 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1519 if (dev1->queue_depth != dev2->queue_depth) 1520 return 1; 1521 /* 1522 * This can happen for dual domain devices. An active 1523 * path change causes the ioaccel handle to change 1524 * 1525 * for example note the handle differences between p0 and p1 1526 * Device WWN ,WWN hash,Handle 1527 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1528 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1529 */ 1530 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1531 return 1; 1532 return 0; 1533 } 1534 1535 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1536 * and return needle location in *index. If scsi3addr matches, but not 1537 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1538 * location in *index. 1539 * In the case of a minor device attribute change, such as RAID level, just 1540 * return DEVICE_UPDATED, along with the updated device's location in index. 1541 * If needle not found, return DEVICE_NOT_FOUND. 1542 */ 1543 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1544 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1545 int *index) 1546 { 1547 int i; 1548 #define DEVICE_NOT_FOUND 0 1549 #define DEVICE_CHANGED 1 1550 #define DEVICE_SAME 2 1551 #define DEVICE_UPDATED 3 1552 if (needle == NULL) 1553 return DEVICE_NOT_FOUND; 1554 1555 for (i = 0; i < haystack_size; i++) { 1556 if (haystack[i] == NULL) /* previously removed. */ 1557 continue; 1558 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1559 *index = i; 1560 if (device_is_the_same(needle, haystack[i])) { 1561 if (device_updated(needle, haystack[i])) 1562 return DEVICE_UPDATED; 1563 return DEVICE_SAME; 1564 } else { 1565 /* Keep offline devices offline */ 1566 if (needle->volume_offline) 1567 return DEVICE_NOT_FOUND; 1568 return DEVICE_CHANGED; 1569 } 1570 } 1571 } 1572 *index = -1; 1573 return DEVICE_NOT_FOUND; 1574 } 1575 1576 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1577 unsigned char scsi3addr[]) 1578 { 1579 struct offline_device_entry *device; 1580 unsigned long flags; 1581 1582 /* Check to see if device is already on the list */ 1583 spin_lock_irqsave(&h->offline_device_lock, flags); 1584 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1585 if (memcmp(device->scsi3addr, scsi3addr, 1586 sizeof(device->scsi3addr)) == 0) { 1587 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1588 return; 1589 } 1590 } 1591 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1592 1593 /* Device is not on the list, add it. */ 1594 device = kmalloc(sizeof(*device), GFP_KERNEL); 1595 if (!device) 1596 return; 1597 1598 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1599 spin_lock_irqsave(&h->offline_device_lock, flags); 1600 list_add_tail(&device->offline_list, &h->offline_device_list); 1601 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1602 } 1603 1604 /* Print a message explaining various offline volume states */ 1605 static void hpsa_show_volume_status(struct ctlr_info *h, 1606 struct hpsa_scsi_dev_t *sd) 1607 { 1608 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1609 dev_info(&h->pdev->dev, 1610 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1611 h->scsi_host->host_no, 1612 sd->bus, sd->target, sd->lun); 1613 switch (sd->volume_offline) { 1614 case HPSA_LV_OK: 1615 break; 1616 case HPSA_LV_UNDERGOING_ERASE: 1617 dev_info(&h->pdev->dev, 1618 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1619 h->scsi_host->host_no, 1620 sd->bus, sd->target, sd->lun); 1621 break; 1622 case HPSA_LV_NOT_AVAILABLE: 1623 dev_info(&h->pdev->dev, 1624 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1625 h->scsi_host->host_no, 1626 sd->bus, sd->target, sd->lun); 1627 break; 1628 case HPSA_LV_UNDERGOING_RPI: 1629 dev_info(&h->pdev->dev, 1630 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1631 h->scsi_host->host_no, 1632 sd->bus, sd->target, sd->lun); 1633 break; 1634 case HPSA_LV_PENDING_RPI: 1635 dev_info(&h->pdev->dev, 1636 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1637 h->scsi_host->host_no, 1638 sd->bus, sd->target, sd->lun); 1639 break; 1640 case HPSA_LV_ENCRYPTED_NO_KEY: 1641 dev_info(&h->pdev->dev, 1642 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1643 h->scsi_host->host_no, 1644 sd->bus, sd->target, sd->lun); 1645 break; 1646 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1647 dev_info(&h->pdev->dev, 1648 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1649 h->scsi_host->host_no, 1650 sd->bus, sd->target, sd->lun); 1651 break; 1652 case HPSA_LV_UNDERGOING_ENCRYPTION: 1653 dev_info(&h->pdev->dev, 1654 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1655 h->scsi_host->host_no, 1656 sd->bus, sd->target, sd->lun); 1657 break; 1658 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1659 dev_info(&h->pdev->dev, 1660 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1661 h->scsi_host->host_no, 1662 sd->bus, sd->target, sd->lun); 1663 break; 1664 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1665 dev_info(&h->pdev->dev, 1666 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1667 h->scsi_host->host_no, 1668 sd->bus, sd->target, sd->lun); 1669 break; 1670 case HPSA_LV_PENDING_ENCRYPTION: 1671 dev_info(&h->pdev->dev, 1672 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1673 h->scsi_host->host_no, 1674 sd->bus, sd->target, sd->lun); 1675 break; 1676 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1677 dev_info(&h->pdev->dev, 1678 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1679 h->scsi_host->host_no, 1680 sd->bus, sd->target, sd->lun); 1681 break; 1682 } 1683 } 1684 1685 /* 1686 * Figure the list of physical drive pointers for a logical drive with 1687 * raid offload configured. 1688 */ 1689 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1690 struct hpsa_scsi_dev_t *dev[], int ndevices, 1691 struct hpsa_scsi_dev_t *logical_drive) 1692 { 1693 struct raid_map_data *map = &logical_drive->raid_map; 1694 struct raid_map_disk_data *dd = &map->data[0]; 1695 int i, j; 1696 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1697 le16_to_cpu(map->metadata_disks_per_row); 1698 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1699 le16_to_cpu(map->layout_map_count) * 1700 total_disks_per_row; 1701 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1702 total_disks_per_row; 1703 int qdepth; 1704 1705 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1706 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1707 1708 logical_drive->nphysical_disks = nraid_map_entries; 1709 1710 qdepth = 0; 1711 for (i = 0; i < nraid_map_entries; i++) { 1712 logical_drive->phys_disk[i] = NULL; 1713 if (!logical_drive->offload_config) 1714 continue; 1715 for (j = 0; j < ndevices; j++) { 1716 if (dev[j] == NULL) 1717 continue; 1718 if (dev[j]->devtype != TYPE_DISK && 1719 dev[j]->devtype != TYPE_ZBC) 1720 continue; 1721 if (is_logical_device(dev[j])) 1722 continue; 1723 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1724 continue; 1725 1726 logical_drive->phys_disk[i] = dev[j]; 1727 if (i < nphys_disk) 1728 qdepth = min(h->nr_cmds, qdepth + 1729 logical_drive->phys_disk[i]->queue_depth); 1730 break; 1731 } 1732 1733 /* 1734 * This can happen if a physical drive is removed and 1735 * the logical drive is degraded. In that case, the RAID 1736 * map data will refer to a physical disk which isn't actually 1737 * present. And in that case offload_enabled should already 1738 * be 0, but we'll turn it off here just in case 1739 */ 1740 if (!logical_drive->phys_disk[i]) { 1741 dev_warn(&h->pdev->dev, 1742 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1743 __func__, 1744 h->scsi_host->host_no, logical_drive->bus, 1745 logical_drive->target, logical_drive->lun); 1746 logical_drive->offload_enabled = 0; 1747 logical_drive->offload_to_be_enabled = 0; 1748 logical_drive->queue_depth = 8; 1749 } 1750 } 1751 if (nraid_map_entries) 1752 /* 1753 * This is correct for reads, too high for full stripe writes, 1754 * way too high for partial stripe writes 1755 */ 1756 logical_drive->queue_depth = qdepth; 1757 else { 1758 if (logical_drive->external) 1759 logical_drive->queue_depth = EXTERNAL_QD; 1760 else 1761 logical_drive->queue_depth = h->nr_cmds; 1762 } 1763 } 1764 1765 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1766 struct hpsa_scsi_dev_t *dev[], int ndevices) 1767 { 1768 int i; 1769 1770 for (i = 0; i < ndevices; i++) { 1771 if (dev[i] == NULL) 1772 continue; 1773 if (dev[i]->devtype != TYPE_DISK && 1774 dev[i]->devtype != TYPE_ZBC) 1775 continue; 1776 if (!is_logical_device(dev[i])) 1777 continue; 1778 1779 /* 1780 * If offload is currently enabled, the RAID map and 1781 * phys_disk[] assignment *better* not be changing 1782 * because we would be changing ioaccel phsy_disk[] pointers 1783 * on a ioaccel volume processing I/O requests. 1784 * 1785 * If an ioaccel volume status changed, initially because it was 1786 * re-configured and thus underwent a transformation, or 1787 * a drive failed, we would have received a state change 1788 * request and ioaccel should have been turned off. When the 1789 * transformation completes, we get another state change 1790 * request to turn ioaccel back on. In this case, we need 1791 * to update the ioaccel information. 1792 * 1793 * Thus: If it is not currently enabled, but will be after 1794 * the scan completes, make sure the ioaccel pointers 1795 * are up to date. 1796 */ 1797 1798 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1799 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1800 } 1801 } 1802 1803 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1804 { 1805 int rc = 0; 1806 1807 if (!h->scsi_host) 1808 return 1; 1809 1810 if (is_logical_device(device)) /* RAID */ 1811 rc = scsi_add_device(h->scsi_host, device->bus, 1812 device->target, device->lun); 1813 else /* HBA */ 1814 rc = hpsa_add_sas_device(h->sas_host, device); 1815 1816 return rc; 1817 } 1818 1819 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1820 struct hpsa_scsi_dev_t *dev) 1821 { 1822 int i; 1823 int count = 0; 1824 1825 for (i = 0; i < h->nr_cmds; i++) { 1826 struct CommandList *c = h->cmd_pool + i; 1827 int refcount = atomic_inc_return(&c->refcount); 1828 1829 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1830 dev->scsi3addr)) { 1831 unsigned long flags; 1832 1833 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1834 if (!hpsa_is_cmd_idle(c)) 1835 ++count; 1836 spin_unlock_irqrestore(&h->lock, flags); 1837 } 1838 1839 cmd_free(h, c); 1840 } 1841 1842 return count; 1843 } 1844 1845 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1846 struct hpsa_scsi_dev_t *device) 1847 { 1848 int cmds = 0; 1849 int waits = 0; 1850 1851 while (1) { 1852 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1853 if (cmds == 0) 1854 break; 1855 if (++waits > 20) 1856 break; 1857 msleep(1000); 1858 } 1859 1860 if (waits > 20) 1861 dev_warn(&h->pdev->dev, 1862 "%s: removing device with %d outstanding commands!\n", 1863 __func__, cmds); 1864 } 1865 1866 static void hpsa_remove_device(struct ctlr_info *h, 1867 struct hpsa_scsi_dev_t *device) 1868 { 1869 struct scsi_device *sdev = NULL; 1870 1871 if (!h->scsi_host) 1872 return; 1873 1874 /* 1875 * Allow for commands to drain 1876 */ 1877 device->removed = 1; 1878 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1879 1880 if (is_logical_device(device)) { /* RAID */ 1881 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1882 device->target, device->lun); 1883 if (sdev) { 1884 scsi_remove_device(sdev); 1885 scsi_device_put(sdev); 1886 } else { 1887 /* 1888 * We don't expect to get here. Future commands 1889 * to this device will get a selection timeout as 1890 * if the device were gone. 1891 */ 1892 hpsa_show_dev_msg(KERN_WARNING, h, device, 1893 "didn't find device for removal."); 1894 } 1895 } else { /* HBA */ 1896 1897 hpsa_remove_sas_device(device); 1898 } 1899 } 1900 1901 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1902 struct hpsa_scsi_dev_t *sd[], int nsds) 1903 { 1904 /* sd contains scsi3 addresses and devtypes, and inquiry 1905 * data. This function takes what's in sd to be the current 1906 * reality and updates h->dev[] to reflect that reality. 1907 */ 1908 int i, entry, device_change, changes = 0; 1909 struct hpsa_scsi_dev_t *csd; 1910 unsigned long flags; 1911 struct hpsa_scsi_dev_t **added, **removed; 1912 int nadded, nremoved; 1913 1914 /* 1915 * A reset can cause a device status to change 1916 * re-schedule the scan to see what happened. 1917 */ 1918 spin_lock_irqsave(&h->reset_lock, flags); 1919 if (h->reset_in_progress) { 1920 h->drv_req_rescan = 1; 1921 spin_unlock_irqrestore(&h->reset_lock, flags); 1922 return; 1923 } 1924 spin_unlock_irqrestore(&h->reset_lock, flags); 1925 1926 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 1927 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1928 1929 if (!added || !removed) { 1930 dev_warn(&h->pdev->dev, "out of memory in " 1931 "adjust_hpsa_scsi_table\n"); 1932 goto free_and_out; 1933 } 1934 1935 spin_lock_irqsave(&h->devlock, flags); 1936 1937 /* find any devices in h->dev[] that are not in 1938 * sd[] and remove them from h->dev[], and for any 1939 * devices which have changed, remove the old device 1940 * info and add the new device info. 1941 * If minor device attributes change, just update 1942 * the existing device structure. 1943 */ 1944 i = 0; 1945 nremoved = 0; 1946 nadded = 0; 1947 while (i < h->ndevices) { 1948 csd = h->dev[i]; 1949 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1950 if (device_change == DEVICE_NOT_FOUND) { 1951 changes++; 1952 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1953 continue; /* remove ^^^, hence i not incremented */ 1954 } else if (device_change == DEVICE_CHANGED) { 1955 changes++; 1956 hpsa_scsi_replace_entry(h, i, sd[entry], 1957 added, &nadded, removed, &nremoved); 1958 /* Set it to NULL to prevent it from being freed 1959 * at the bottom of hpsa_update_scsi_devices() 1960 */ 1961 sd[entry] = NULL; 1962 } else if (device_change == DEVICE_UPDATED) { 1963 hpsa_scsi_update_entry(h, i, sd[entry]); 1964 } 1965 i++; 1966 } 1967 1968 /* Now, make sure every device listed in sd[] is also 1969 * listed in h->dev[], adding them if they aren't found 1970 */ 1971 1972 for (i = 0; i < nsds; i++) { 1973 if (!sd[i]) /* if already added above. */ 1974 continue; 1975 1976 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1977 * as the SCSI mid-layer does not handle such devices well. 1978 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1979 * at 160Hz, and prevents the system from coming up. 1980 */ 1981 if (sd[i]->volume_offline) { 1982 hpsa_show_volume_status(h, sd[i]); 1983 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1984 continue; 1985 } 1986 1987 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1988 h->ndevices, &entry); 1989 if (device_change == DEVICE_NOT_FOUND) { 1990 changes++; 1991 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1992 break; 1993 sd[i] = NULL; /* prevent from being freed later. */ 1994 } else if (device_change == DEVICE_CHANGED) { 1995 /* should never happen... */ 1996 changes++; 1997 dev_warn(&h->pdev->dev, 1998 "device unexpectedly changed.\n"); 1999 /* but if it does happen, we just ignore that device */ 2000 } 2001 } 2002 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2003 2004 /* 2005 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2006 * any logical drives that need it enabled. 2007 * 2008 * The raid map should be current by now. 2009 * 2010 * We are updating the device list used for I/O requests. 2011 */ 2012 for (i = 0; i < h->ndevices; i++) { 2013 if (h->dev[i] == NULL) 2014 continue; 2015 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2016 } 2017 2018 spin_unlock_irqrestore(&h->devlock, flags); 2019 2020 /* Monitor devices which are in one of several NOT READY states to be 2021 * brought online later. This must be done without holding h->devlock, 2022 * so don't touch h->dev[] 2023 */ 2024 for (i = 0; i < nsds; i++) { 2025 if (!sd[i]) /* if already added above. */ 2026 continue; 2027 if (sd[i]->volume_offline) 2028 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2029 } 2030 2031 /* Don't notify scsi mid layer of any changes the first time through 2032 * (or if there are no changes) scsi_scan_host will do it later the 2033 * first time through. 2034 */ 2035 if (!changes) 2036 goto free_and_out; 2037 2038 /* Notify scsi mid layer of any removed devices */ 2039 for (i = 0; i < nremoved; i++) { 2040 if (removed[i] == NULL) 2041 continue; 2042 if (removed[i]->expose_device) 2043 hpsa_remove_device(h, removed[i]); 2044 kfree(removed[i]); 2045 removed[i] = NULL; 2046 } 2047 2048 /* Notify scsi mid layer of any added devices */ 2049 for (i = 0; i < nadded; i++) { 2050 int rc = 0; 2051 2052 if (added[i] == NULL) 2053 continue; 2054 if (!(added[i]->expose_device)) 2055 continue; 2056 rc = hpsa_add_device(h, added[i]); 2057 if (!rc) 2058 continue; 2059 dev_warn(&h->pdev->dev, 2060 "addition failed %d, device not added.", rc); 2061 /* now we have to remove it from h->dev, 2062 * since it didn't get added to scsi mid layer 2063 */ 2064 fixup_botched_add(h, added[i]); 2065 h->drv_req_rescan = 1; 2066 } 2067 2068 free_and_out: 2069 kfree(added); 2070 kfree(removed); 2071 } 2072 2073 /* 2074 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2075 * Assume's h->devlock is held. 2076 */ 2077 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2078 int bus, int target, int lun) 2079 { 2080 int i; 2081 struct hpsa_scsi_dev_t *sd; 2082 2083 for (i = 0; i < h->ndevices; i++) { 2084 sd = h->dev[i]; 2085 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2086 return sd; 2087 } 2088 return NULL; 2089 } 2090 2091 static int hpsa_slave_alloc(struct scsi_device *sdev) 2092 { 2093 struct hpsa_scsi_dev_t *sd = NULL; 2094 unsigned long flags; 2095 struct ctlr_info *h; 2096 2097 h = sdev_to_hba(sdev); 2098 spin_lock_irqsave(&h->devlock, flags); 2099 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2100 struct scsi_target *starget; 2101 struct sas_rphy *rphy; 2102 2103 starget = scsi_target(sdev); 2104 rphy = target_to_rphy(starget); 2105 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2106 if (sd) { 2107 sd->target = sdev_id(sdev); 2108 sd->lun = sdev->lun; 2109 } 2110 } 2111 if (!sd) 2112 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2113 sdev_id(sdev), sdev->lun); 2114 2115 if (sd && sd->expose_device) { 2116 atomic_set(&sd->ioaccel_cmds_out, 0); 2117 sdev->hostdata = sd; 2118 } else 2119 sdev->hostdata = NULL; 2120 spin_unlock_irqrestore(&h->devlock, flags); 2121 return 0; 2122 } 2123 2124 /* configure scsi device based on internal per-device structure */ 2125 static int hpsa_slave_configure(struct scsi_device *sdev) 2126 { 2127 struct hpsa_scsi_dev_t *sd; 2128 int queue_depth; 2129 2130 sd = sdev->hostdata; 2131 sdev->no_uld_attach = !sd || !sd->expose_device; 2132 2133 if (sd) { 2134 if (sd->external) 2135 queue_depth = EXTERNAL_QD; 2136 else 2137 queue_depth = sd->queue_depth != 0 ? 2138 sd->queue_depth : sdev->host->can_queue; 2139 } else 2140 queue_depth = sdev->host->can_queue; 2141 2142 scsi_change_queue_depth(sdev, queue_depth); 2143 2144 return 0; 2145 } 2146 2147 static void hpsa_slave_destroy(struct scsi_device *sdev) 2148 { 2149 /* nothing to do. */ 2150 } 2151 2152 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2153 { 2154 int i; 2155 2156 if (!h->ioaccel2_cmd_sg_list) 2157 return; 2158 for (i = 0; i < h->nr_cmds; i++) { 2159 kfree(h->ioaccel2_cmd_sg_list[i]); 2160 h->ioaccel2_cmd_sg_list[i] = NULL; 2161 } 2162 kfree(h->ioaccel2_cmd_sg_list); 2163 h->ioaccel2_cmd_sg_list = NULL; 2164 } 2165 2166 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2167 { 2168 int i; 2169 2170 if (h->chainsize <= 0) 2171 return 0; 2172 2173 h->ioaccel2_cmd_sg_list = 2174 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2175 GFP_KERNEL); 2176 if (!h->ioaccel2_cmd_sg_list) 2177 return -ENOMEM; 2178 for (i = 0; i < h->nr_cmds; i++) { 2179 h->ioaccel2_cmd_sg_list[i] = 2180 kmalloc_array(h->maxsgentries, 2181 sizeof(*h->ioaccel2_cmd_sg_list[i]), 2182 GFP_KERNEL); 2183 if (!h->ioaccel2_cmd_sg_list[i]) 2184 goto clean; 2185 } 2186 return 0; 2187 2188 clean: 2189 hpsa_free_ioaccel2_sg_chain_blocks(h); 2190 return -ENOMEM; 2191 } 2192 2193 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2194 { 2195 int i; 2196 2197 if (!h->cmd_sg_list) 2198 return; 2199 for (i = 0; i < h->nr_cmds; i++) { 2200 kfree(h->cmd_sg_list[i]); 2201 h->cmd_sg_list[i] = NULL; 2202 } 2203 kfree(h->cmd_sg_list); 2204 h->cmd_sg_list = NULL; 2205 } 2206 2207 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2208 { 2209 int i; 2210 2211 if (h->chainsize <= 0) 2212 return 0; 2213 2214 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 2215 GFP_KERNEL); 2216 if (!h->cmd_sg_list) 2217 return -ENOMEM; 2218 2219 for (i = 0; i < h->nr_cmds; i++) { 2220 h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 2221 sizeof(*h->cmd_sg_list[i]), 2222 GFP_KERNEL); 2223 if (!h->cmd_sg_list[i]) 2224 goto clean; 2225 2226 } 2227 return 0; 2228 2229 clean: 2230 hpsa_free_sg_chain_blocks(h); 2231 return -ENOMEM; 2232 } 2233 2234 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2235 struct io_accel2_cmd *cp, struct CommandList *c) 2236 { 2237 struct ioaccel2_sg_element *chain_block; 2238 u64 temp64; 2239 u32 chain_size; 2240 2241 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2242 chain_size = le32_to_cpu(cp->sg[0].length); 2243 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 2244 DMA_TO_DEVICE); 2245 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2246 /* prevent subsequent unmapping */ 2247 cp->sg->address = 0; 2248 return -1; 2249 } 2250 cp->sg->address = cpu_to_le64(temp64); 2251 return 0; 2252 } 2253 2254 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2255 struct io_accel2_cmd *cp) 2256 { 2257 struct ioaccel2_sg_element *chain_sg; 2258 u64 temp64; 2259 u32 chain_size; 2260 2261 chain_sg = cp->sg; 2262 temp64 = le64_to_cpu(chain_sg->address); 2263 chain_size = le32_to_cpu(cp->sg[0].length); 2264 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2265 } 2266 2267 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2268 struct CommandList *c) 2269 { 2270 struct SGDescriptor *chain_sg, *chain_block; 2271 u64 temp64; 2272 u32 chain_len; 2273 2274 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2275 chain_block = h->cmd_sg_list[c->cmdindex]; 2276 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2277 chain_len = sizeof(*chain_sg) * 2278 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2279 chain_sg->Len = cpu_to_le32(chain_len); 2280 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 2281 DMA_TO_DEVICE); 2282 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2283 /* prevent subsequent unmapping */ 2284 chain_sg->Addr = cpu_to_le64(0); 2285 return -1; 2286 } 2287 chain_sg->Addr = cpu_to_le64(temp64); 2288 return 0; 2289 } 2290 2291 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2292 struct CommandList *c) 2293 { 2294 struct SGDescriptor *chain_sg; 2295 2296 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2297 return; 2298 2299 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2300 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 2301 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 2302 } 2303 2304 2305 /* Decode the various types of errors on ioaccel2 path. 2306 * Return 1 for any error that should generate a RAID path retry. 2307 * Return 0 for errors that don't require a RAID path retry. 2308 */ 2309 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2310 struct CommandList *c, 2311 struct scsi_cmnd *cmd, 2312 struct io_accel2_cmd *c2, 2313 struct hpsa_scsi_dev_t *dev) 2314 { 2315 int data_len; 2316 int retry = 0; 2317 u32 ioaccel2_resid = 0; 2318 2319 switch (c2->error_data.serv_response) { 2320 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2321 switch (c2->error_data.status) { 2322 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2323 break; 2324 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2325 cmd->result |= SAM_STAT_CHECK_CONDITION; 2326 if (c2->error_data.data_present != 2327 IOACCEL2_SENSE_DATA_PRESENT) { 2328 memset(cmd->sense_buffer, 0, 2329 SCSI_SENSE_BUFFERSIZE); 2330 break; 2331 } 2332 /* copy the sense data */ 2333 data_len = c2->error_data.sense_data_len; 2334 if (data_len > SCSI_SENSE_BUFFERSIZE) 2335 data_len = SCSI_SENSE_BUFFERSIZE; 2336 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2337 data_len = 2338 sizeof(c2->error_data.sense_data_buff); 2339 memcpy(cmd->sense_buffer, 2340 c2->error_data.sense_data_buff, data_len); 2341 retry = 1; 2342 break; 2343 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2344 retry = 1; 2345 break; 2346 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2347 retry = 1; 2348 break; 2349 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2350 retry = 1; 2351 break; 2352 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2353 retry = 1; 2354 break; 2355 default: 2356 retry = 1; 2357 break; 2358 } 2359 break; 2360 case IOACCEL2_SERV_RESPONSE_FAILURE: 2361 switch (c2->error_data.status) { 2362 case IOACCEL2_STATUS_SR_IO_ERROR: 2363 case IOACCEL2_STATUS_SR_IO_ABORTED: 2364 case IOACCEL2_STATUS_SR_OVERRUN: 2365 retry = 1; 2366 break; 2367 case IOACCEL2_STATUS_SR_UNDERRUN: 2368 cmd->result = (DID_OK << 16); /* host byte */ 2369 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2370 ioaccel2_resid = get_unaligned_le32( 2371 &c2->error_data.resid_cnt[0]); 2372 scsi_set_resid(cmd, ioaccel2_resid); 2373 break; 2374 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2375 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2376 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2377 /* 2378 * Did an HBA disk disappear? We will eventually 2379 * get a state change event from the controller but 2380 * in the meantime, we need to tell the OS that the 2381 * HBA disk is no longer there and stop I/O 2382 * from going down. This allows the potential re-insert 2383 * of the disk to get the same device node. 2384 */ 2385 if (dev->physical_device && dev->expose_device) { 2386 cmd->result = DID_NO_CONNECT << 16; 2387 dev->removed = 1; 2388 h->drv_req_rescan = 1; 2389 dev_warn(&h->pdev->dev, 2390 "%s: device is gone!\n", __func__); 2391 } else 2392 /* 2393 * Retry by sending down the RAID path. 2394 * We will get an event from ctlr to 2395 * trigger rescan regardless. 2396 */ 2397 retry = 1; 2398 break; 2399 default: 2400 retry = 1; 2401 } 2402 break; 2403 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2404 break; 2405 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2406 break; 2407 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2408 retry = 1; 2409 break; 2410 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2411 break; 2412 default: 2413 retry = 1; 2414 break; 2415 } 2416 2417 return retry; /* retry on raid path? */ 2418 } 2419 2420 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2421 struct CommandList *c) 2422 { 2423 bool do_wake = false; 2424 2425 /* 2426 * Reset c->scsi_cmd here so that the reset handler will know 2427 * this command has completed. Then, check to see if the handler is 2428 * waiting for this command, and, if so, wake it. 2429 */ 2430 c->scsi_cmd = SCSI_CMD_IDLE; 2431 mb(); /* Declare command idle before checking for pending events. */ 2432 if (c->reset_pending) { 2433 unsigned long flags; 2434 struct hpsa_scsi_dev_t *dev; 2435 2436 /* 2437 * There appears to be a reset pending; lock the lock and 2438 * reconfirm. If so, then decrement the count of outstanding 2439 * commands and wake the reset command if this is the last one. 2440 */ 2441 spin_lock_irqsave(&h->lock, flags); 2442 dev = c->reset_pending; /* Re-fetch under the lock. */ 2443 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2444 do_wake = true; 2445 c->reset_pending = NULL; 2446 spin_unlock_irqrestore(&h->lock, flags); 2447 } 2448 2449 if (do_wake) 2450 wake_up_all(&h->event_sync_wait_queue); 2451 } 2452 2453 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2454 struct CommandList *c) 2455 { 2456 hpsa_cmd_resolve_events(h, c); 2457 cmd_tagged_free(h, c); 2458 } 2459 2460 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2461 struct CommandList *c, struct scsi_cmnd *cmd) 2462 { 2463 hpsa_cmd_resolve_and_free(h, c); 2464 if (cmd && cmd->scsi_done) 2465 cmd->scsi_done(cmd); 2466 } 2467 2468 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2469 { 2470 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2471 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2472 } 2473 2474 static void process_ioaccel2_completion(struct ctlr_info *h, 2475 struct CommandList *c, struct scsi_cmnd *cmd, 2476 struct hpsa_scsi_dev_t *dev) 2477 { 2478 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2479 2480 /* check for good status */ 2481 if (likely(c2->error_data.serv_response == 0 && 2482 c2->error_data.status == 0)) 2483 return hpsa_cmd_free_and_done(h, c, cmd); 2484 2485 /* 2486 * Any RAID offload error results in retry which will use 2487 * the normal I/O path so the controller can handle whatever is 2488 * wrong. 2489 */ 2490 if (is_logical_device(dev) && 2491 c2->error_data.serv_response == 2492 IOACCEL2_SERV_RESPONSE_FAILURE) { 2493 if (c2->error_data.status == 2494 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2495 dev->offload_enabled = 0; 2496 dev->offload_to_be_enabled = 0; 2497 } 2498 2499 return hpsa_retry_cmd(h, c); 2500 } 2501 2502 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2503 return hpsa_retry_cmd(h, c); 2504 2505 return hpsa_cmd_free_and_done(h, c, cmd); 2506 } 2507 2508 /* Returns 0 on success, < 0 otherwise. */ 2509 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2510 struct CommandList *cp) 2511 { 2512 u8 tmf_status = cp->err_info->ScsiStatus; 2513 2514 switch (tmf_status) { 2515 case CISS_TMF_COMPLETE: 2516 /* 2517 * CISS_TMF_COMPLETE never happens, instead, 2518 * ei->CommandStatus == 0 for this case. 2519 */ 2520 case CISS_TMF_SUCCESS: 2521 return 0; 2522 case CISS_TMF_INVALID_FRAME: 2523 case CISS_TMF_NOT_SUPPORTED: 2524 case CISS_TMF_FAILED: 2525 case CISS_TMF_WRONG_LUN: 2526 case CISS_TMF_OVERLAPPED_TAG: 2527 break; 2528 default: 2529 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2530 tmf_status); 2531 break; 2532 } 2533 return -tmf_status; 2534 } 2535 2536 static void complete_scsi_command(struct CommandList *cp) 2537 { 2538 struct scsi_cmnd *cmd; 2539 struct ctlr_info *h; 2540 struct ErrorInfo *ei; 2541 struct hpsa_scsi_dev_t *dev; 2542 struct io_accel2_cmd *c2; 2543 2544 u8 sense_key; 2545 u8 asc; /* additional sense code */ 2546 u8 ascq; /* additional sense code qualifier */ 2547 unsigned long sense_data_size; 2548 2549 ei = cp->err_info; 2550 cmd = cp->scsi_cmd; 2551 h = cp->h; 2552 2553 if (!cmd->device) { 2554 cmd->result = DID_NO_CONNECT << 16; 2555 return hpsa_cmd_free_and_done(h, cp, cmd); 2556 } 2557 2558 dev = cmd->device->hostdata; 2559 if (!dev) { 2560 cmd->result = DID_NO_CONNECT << 16; 2561 return hpsa_cmd_free_and_done(h, cp, cmd); 2562 } 2563 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2564 2565 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2566 if ((cp->cmd_type == CMD_SCSI) && 2567 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2568 hpsa_unmap_sg_chain_block(h, cp); 2569 2570 if ((cp->cmd_type == CMD_IOACCEL2) && 2571 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2572 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2573 2574 cmd->result = (DID_OK << 16); /* host byte */ 2575 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2576 2577 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2578 if (dev->physical_device && dev->expose_device && 2579 dev->removed) { 2580 cmd->result = DID_NO_CONNECT << 16; 2581 return hpsa_cmd_free_and_done(h, cp, cmd); 2582 } 2583 if (likely(cp->phys_disk != NULL)) 2584 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2585 } 2586 2587 /* 2588 * We check for lockup status here as it may be set for 2589 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2590 * fail_all_oustanding_cmds() 2591 */ 2592 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2593 /* DID_NO_CONNECT will prevent a retry */ 2594 cmd->result = DID_NO_CONNECT << 16; 2595 return hpsa_cmd_free_and_done(h, cp, cmd); 2596 } 2597 2598 if ((unlikely(hpsa_is_pending_event(cp)))) 2599 if (cp->reset_pending) 2600 return hpsa_cmd_free_and_done(h, cp, cmd); 2601 2602 if (cp->cmd_type == CMD_IOACCEL2) 2603 return process_ioaccel2_completion(h, cp, cmd, dev); 2604 2605 scsi_set_resid(cmd, ei->ResidualCnt); 2606 if (ei->CommandStatus == 0) 2607 return hpsa_cmd_free_and_done(h, cp, cmd); 2608 2609 /* For I/O accelerator commands, copy over some fields to the normal 2610 * CISS header used below for error handling. 2611 */ 2612 if (cp->cmd_type == CMD_IOACCEL1) { 2613 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2614 cp->Header.SGList = scsi_sg_count(cmd); 2615 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2616 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2617 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2618 cp->Header.tag = c->tag; 2619 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2620 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2621 2622 /* Any RAID offload error results in retry which will use 2623 * the normal I/O path so the controller can handle whatever's 2624 * wrong. 2625 */ 2626 if (is_logical_device(dev)) { 2627 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2628 dev->offload_enabled = 0; 2629 return hpsa_retry_cmd(h, cp); 2630 } 2631 } 2632 2633 /* an error has occurred */ 2634 switch (ei->CommandStatus) { 2635 2636 case CMD_TARGET_STATUS: 2637 cmd->result |= ei->ScsiStatus; 2638 /* copy the sense data */ 2639 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2640 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2641 else 2642 sense_data_size = sizeof(ei->SenseInfo); 2643 if (ei->SenseLen < sense_data_size) 2644 sense_data_size = ei->SenseLen; 2645 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2646 if (ei->ScsiStatus) 2647 decode_sense_data(ei->SenseInfo, sense_data_size, 2648 &sense_key, &asc, &ascq); 2649 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2650 if (sense_key == ABORTED_COMMAND) { 2651 cmd->result |= DID_SOFT_ERROR << 16; 2652 break; 2653 } 2654 break; 2655 } 2656 /* Problem was not a check condition 2657 * Pass it up to the upper layers... 2658 */ 2659 if (ei->ScsiStatus) { 2660 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2661 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2662 "Returning result: 0x%x\n", 2663 cp, ei->ScsiStatus, 2664 sense_key, asc, ascq, 2665 cmd->result); 2666 } else { /* scsi status is zero??? How??? */ 2667 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2668 "Returning no connection.\n", cp), 2669 2670 /* Ordinarily, this case should never happen, 2671 * but there is a bug in some released firmware 2672 * revisions that allows it to happen if, for 2673 * example, a 4100 backplane loses power and 2674 * the tape drive is in it. We assume that 2675 * it's a fatal error of some kind because we 2676 * can't show that it wasn't. We will make it 2677 * look like selection timeout since that is 2678 * the most common reason for this to occur, 2679 * and it's severe enough. 2680 */ 2681 2682 cmd->result = DID_NO_CONNECT << 16; 2683 } 2684 break; 2685 2686 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2687 break; 2688 case CMD_DATA_OVERRUN: 2689 dev_warn(&h->pdev->dev, 2690 "CDB %16phN data overrun\n", cp->Request.CDB); 2691 break; 2692 case CMD_INVALID: { 2693 /* print_bytes(cp, sizeof(*cp), 1, 0); 2694 print_cmd(cp); */ 2695 /* We get CMD_INVALID if you address a non-existent device 2696 * instead of a selection timeout (no response). You will 2697 * see this if you yank out a drive, then try to access it. 2698 * This is kind of a shame because it means that any other 2699 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2700 * missing target. */ 2701 cmd->result = DID_NO_CONNECT << 16; 2702 } 2703 break; 2704 case CMD_PROTOCOL_ERR: 2705 cmd->result = DID_ERROR << 16; 2706 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2707 cp->Request.CDB); 2708 break; 2709 case CMD_HARDWARE_ERR: 2710 cmd->result = DID_ERROR << 16; 2711 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2712 cp->Request.CDB); 2713 break; 2714 case CMD_CONNECTION_LOST: 2715 cmd->result = DID_ERROR << 16; 2716 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2717 cp->Request.CDB); 2718 break; 2719 case CMD_ABORTED: 2720 cmd->result = DID_ABORT << 16; 2721 break; 2722 case CMD_ABORT_FAILED: 2723 cmd->result = DID_ERROR << 16; 2724 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2725 cp->Request.CDB); 2726 break; 2727 case CMD_UNSOLICITED_ABORT: 2728 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2729 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2730 cp->Request.CDB); 2731 break; 2732 case CMD_TIMEOUT: 2733 cmd->result = DID_TIME_OUT << 16; 2734 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2735 cp->Request.CDB); 2736 break; 2737 case CMD_UNABORTABLE: 2738 cmd->result = DID_ERROR << 16; 2739 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2740 break; 2741 case CMD_TMF_STATUS: 2742 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2743 cmd->result = DID_ERROR << 16; 2744 break; 2745 case CMD_IOACCEL_DISABLED: 2746 /* This only handles the direct pass-through case since RAID 2747 * offload is handled above. Just attempt a retry. 2748 */ 2749 cmd->result = DID_SOFT_ERROR << 16; 2750 dev_warn(&h->pdev->dev, 2751 "cp %p had HP SSD Smart Path error\n", cp); 2752 break; 2753 default: 2754 cmd->result = DID_ERROR << 16; 2755 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2756 cp, ei->CommandStatus); 2757 } 2758 2759 return hpsa_cmd_free_and_done(h, cp, cmd); 2760 } 2761 2762 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 2763 int sg_used, enum dma_data_direction data_direction) 2764 { 2765 int i; 2766 2767 for (i = 0; i < sg_used; i++) 2768 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 2769 le32_to_cpu(c->SG[i].Len), 2770 data_direction); 2771 } 2772 2773 static int hpsa_map_one(struct pci_dev *pdev, 2774 struct CommandList *cp, 2775 unsigned char *buf, 2776 size_t buflen, 2777 enum dma_data_direction data_direction) 2778 { 2779 u64 addr64; 2780 2781 if (buflen == 0 || data_direction == DMA_NONE) { 2782 cp->Header.SGList = 0; 2783 cp->Header.SGTotal = cpu_to_le16(0); 2784 return 0; 2785 } 2786 2787 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2788 if (dma_mapping_error(&pdev->dev, addr64)) { 2789 /* Prevent subsequent unmap of something never mapped */ 2790 cp->Header.SGList = 0; 2791 cp->Header.SGTotal = cpu_to_le16(0); 2792 return -1; 2793 } 2794 cp->SG[0].Addr = cpu_to_le64(addr64); 2795 cp->SG[0].Len = cpu_to_le32(buflen); 2796 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2797 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2798 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2799 return 0; 2800 } 2801 2802 #define NO_TIMEOUT ((unsigned long) -1) 2803 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2804 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2805 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2806 { 2807 DECLARE_COMPLETION_ONSTACK(wait); 2808 2809 c->waiting = &wait; 2810 __enqueue_cmd_and_start_io(h, c, reply_queue); 2811 if (timeout_msecs == NO_TIMEOUT) { 2812 /* TODO: get rid of this no-timeout thing */ 2813 wait_for_completion_io(&wait); 2814 return IO_OK; 2815 } 2816 if (!wait_for_completion_io_timeout(&wait, 2817 msecs_to_jiffies(timeout_msecs))) { 2818 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2819 return -ETIMEDOUT; 2820 } 2821 return IO_OK; 2822 } 2823 2824 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2825 int reply_queue, unsigned long timeout_msecs) 2826 { 2827 if (unlikely(lockup_detected(h))) { 2828 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2829 return IO_OK; 2830 } 2831 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2832 } 2833 2834 static u32 lockup_detected(struct ctlr_info *h) 2835 { 2836 int cpu; 2837 u32 rc, *lockup_detected; 2838 2839 cpu = get_cpu(); 2840 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2841 rc = *lockup_detected; 2842 put_cpu(); 2843 return rc; 2844 } 2845 2846 #define MAX_DRIVER_CMD_RETRIES 25 2847 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2848 struct CommandList *c, enum dma_data_direction data_direction, 2849 unsigned long timeout_msecs) 2850 { 2851 int backoff_time = 10, retry_count = 0; 2852 int rc; 2853 2854 do { 2855 memset(c->err_info, 0, sizeof(*c->err_info)); 2856 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2857 timeout_msecs); 2858 if (rc) 2859 break; 2860 retry_count++; 2861 if (retry_count > 3) { 2862 msleep(backoff_time); 2863 if (backoff_time < 1000) 2864 backoff_time *= 2; 2865 } 2866 } while ((check_for_unit_attention(h, c) || 2867 check_for_busy(h, c)) && 2868 retry_count <= MAX_DRIVER_CMD_RETRIES); 2869 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2870 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2871 rc = -EIO; 2872 return rc; 2873 } 2874 2875 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2876 struct CommandList *c) 2877 { 2878 const u8 *cdb = c->Request.CDB; 2879 const u8 *lun = c->Header.LUN.LunAddrBytes; 2880 2881 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2882 txt, lun, cdb); 2883 } 2884 2885 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2886 struct CommandList *cp) 2887 { 2888 const struct ErrorInfo *ei = cp->err_info; 2889 struct device *d = &cp->h->pdev->dev; 2890 u8 sense_key, asc, ascq; 2891 int sense_len; 2892 2893 switch (ei->CommandStatus) { 2894 case CMD_TARGET_STATUS: 2895 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2896 sense_len = sizeof(ei->SenseInfo); 2897 else 2898 sense_len = ei->SenseLen; 2899 decode_sense_data(ei->SenseInfo, sense_len, 2900 &sense_key, &asc, &ascq); 2901 hpsa_print_cmd(h, "SCSI status", cp); 2902 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2903 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2904 sense_key, asc, ascq); 2905 else 2906 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2907 if (ei->ScsiStatus == 0) 2908 dev_warn(d, "SCSI status is abnormally zero. " 2909 "(probably indicates selection timeout " 2910 "reported incorrectly due to a known " 2911 "firmware bug, circa July, 2001.)\n"); 2912 break; 2913 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2914 break; 2915 case CMD_DATA_OVERRUN: 2916 hpsa_print_cmd(h, "overrun condition", cp); 2917 break; 2918 case CMD_INVALID: { 2919 /* controller unfortunately reports SCSI passthru's 2920 * to non-existent targets as invalid commands. 2921 */ 2922 hpsa_print_cmd(h, "invalid command", cp); 2923 dev_warn(d, "probably means device no longer present\n"); 2924 } 2925 break; 2926 case CMD_PROTOCOL_ERR: 2927 hpsa_print_cmd(h, "protocol error", cp); 2928 break; 2929 case CMD_HARDWARE_ERR: 2930 hpsa_print_cmd(h, "hardware error", cp); 2931 break; 2932 case CMD_CONNECTION_LOST: 2933 hpsa_print_cmd(h, "connection lost", cp); 2934 break; 2935 case CMD_ABORTED: 2936 hpsa_print_cmd(h, "aborted", cp); 2937 break; 2938 case CMD_ABORT_FAILED: 2939 hpsa_print_cmd(h, "abort failed", cp); 2940 break; 2941 case CMD_UNSOLICITED_ABORT: 2942 hpsa_print_cmd(h, "unsolicited abort", cp); 2943 break; 2944 case CMD_TIMEOUT: 2945 hpsa_print_cmd(h, "timed out", cp); 2946 break; 2947 case CMD_UNABORTABLE: 2948 hpsa_print_cmd(h, "unabortable", cp); 2949 break; 2950 case CMD_CTLR_LOCKUP: 2951 hpsa_print_cmd(h, "controller lockup detected", cp); 2952 break; 2953 default: 2954 hpsa_print_cmd(h, "unknown status", cp); 2955 dev_warn(d, "Unknown command status %x\n", 2956 ei->CommandStatus); 2957 } 2958 } 2959 2960 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2961 u8 page, u8 *buf, size_t bufsize) 2962 { 2963 int rc = IO_OK; 2964 struct CommandList *c; 2965 struct ErrorInfo *ei; 2966 2967 c = cmd_alloc(h); 2968 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 2969 page, scsi3addr, TYPE_CMD)) { 2970 rc = -1; 2971 goto out; 2972 } 2973 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 2974 NO_TIMEOUT); 2975 if (rc) 2976 goto out; 2977 ei = c->err_info; 2978 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2979 hpsa_scsi_interpret_error(h, c); 2980 rc = -1; 2981 } 2982 out: 2983 cmd_free(h, c); 2984 return rc; 2985 } 2986 2987 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 2988 u8 *scsi3addr) 2989 { 2990 u8 *buf; 2991 u64 sa = 0; 2992 int rc = 0; 2993 2994 buf = kzalloc(1024, GFP_KERNEL); 2995 if (!buf) 2996 return 0; 2997 2998 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 2999 buf, 1024); 3000 3001 if (rc) 3002 goto out; 3003 3004 sa = get_unaligned_be64(buf+12); 3005 3006 out: 3007 kfree(buf); 3008 return sa; 3009 } 3010 3011 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3012 u16 page, unsigned char *buf, 3013 unsigned char bufsize) 3014 { 3015 int rc = IO_OK; 3016 struct CommandList *c; 3017 struct ErrorInfo *ei; 3018 3019 c = cmd_alloc(h); 3020 3021 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3022 page, scsi3addr, TYPE_CMD)) { 3023 rc = -1; 3024 goto out; 3025 } 3026 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3027 NO_TIMEOUT); 3028 if (rc) 3029 goto out; 3030 ei = c->err_info; 3031 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3032 hpsa_scsi_interpret_error(h, c); 3033 rc = -1; 3034 } 3035 out: 3036 cmd_free(h, c); 3037 return rc; 3038 } 3039 3040 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3041 u8 reset_type, int reply_queue) 3042 { 3043 int rc = IO_OK; 3044 struct CommandList *c; 3045 struct ErrorInfo *ei; 3046 3047 c = cmd_alloc(h); 3048 3049 3050 /* fill_cmd can't fail here, no data buffer to map. */ 3051 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 3052 scsi3addr, TYPE_MSG); 3053 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3054 if (rc) { 3055 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3056 goto out; 3057 } 3058 /* no unmap needed here because no data xfer. */ 3059 3060 ei = c->err_info; 3061 if (ei->CommandStatus != 0) { 3062 hpsa_scsi_interpret_error(h, c); 3063 rc = -1; 3064 } 3065 out: 3066 cmd_free(h, c); 3067 return rc; 3068 } 3069 3070 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3071 struct hpsa_scsi_dev_t *dev, 3072 unsigned char *scsi3addr) 3073 { 3074 int i; 3075 bool match = false; 3076 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3077 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3078 3079 if (hpsa_is_cmd_idle(c)) 3080 return false; 3081 3082 switch (c->cmd_type) { 3083 case CMD_SCSI: 3084 case CMD_IOCTL_PEND: 3085 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3086 sizeof(c->Header.LUN.LunAddrBytes)); 3087 break; 3088 3089 case CMD_IOACCEL1: 3090 case CMD_IOACCEL2: 3091 if (c->phys_disk == dev) { 3092 /* HBA mode match */ 3093 match = true; 3094 } else { 3095 /* Possible RAID mode -- check each phys dev. */ 3096 /* FIXME: Do we need to take out a lock here? If 3097 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3098 * instead. */ 3099 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3100 /* FIXME: an alternate test might be 3101 * 3102 * match = dev->phys_disk[i]->ioaccel_handle 3103 * == c2->scsi_nexus; */ 3104 match = dev->phys_disk[i] == c->phys_disk; 3105 } 3106 } 3107 break; 3108 3109 case IOACCEL2_TMF: 3110 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3111 match = dev->phys_disk[i]->ioaccel_handle == 3112 le32_to_cpu(ac->it_nexus); 3113 } 3114 break; 3115 3116 case 0: /* The command is in the middle of being initialized. */ 3117 match = false; 3118 break; 3119 3120 default: 3121 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3122 c->cmd_type); 3123 BUG(); 3124 } 3125 3126 return match; 3127 } 3128 3129 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3130 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3131 { 3132 int i; 3133 int rc = 0; 3134 3135 /* We can really only handle one reset at a time */ 3136 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3137 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3138 return -EINTR; 3139 } 3140 3141 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3142 3143 for (i = 0; i < h->nr_cmds; i++) { 3144 struct CommandList *c = h->cmd_pool + i; 3145 int refcount = atomic_inc_return(&c->refcount); 3146 3147 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3148 unsigned long flags; 3149 3150 /* 3151 * Mark the target command as having a reset pending, 3152 * then lock a lock so that the command cannot complete 3153 * while we're considering it. If the command is not 3154 * idle then count it; otherwise revoke the event. 3155 */ 3156 c->reset_pending = dev; 3157 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3158 if (!hpsa_is_cmd_idle(c)) 3159 atomic_inc(&dev->reset_cmds_out); 3160 else 3161 c->reset_pending = NULL; 3162 spin_unlock_irqrestore(&h->lock, flags); 3163 } 3164 3165 cmd_free(h, c); 3166 } 3167 3168 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3169 if (!rc) 3170 wait_event(h->event_sync_wait_queue, 3171 atomic_read(&dev->reset_cmds_out) == 0 || 3172 lockup_detected(h)); 3173 3174 if (unlikely(lockup_detected(h))) { 3175 dev_warn(&h->pdev->dev, 3176 "Controller lockup detected during reset wait\n"); 3177 rc = -ENODEV; 3178 } 3179 3180 if (unlikely(rc)) 3181 atomic_set(&dev->reset_cmds_out, 0); 3182 else 3183 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3184 3185 mutex_unlock(&h->reset_mutex); 3186 return rc; 3187 } 3188 3189 static void hpsa_get_raid_level(struct ctlr_info *h, 3190 unsigned char *scsi3addr, unsigned char *raid_level) 3191 { 3192 int rc; 3193 unsigned char *buf; 3194 3195 *raid_level = RAID_UNKNOWN; 3196 buf = kzalloc(64, GFP_KERNEL); 3197 if (!buf) 3198 return; 3199 3200 if (!hpsa_vpd_page_supported(h, scsi3addr, 3201 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3202 goto exit; 3203 3204 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3205 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3206 3207 if (rc == 0) 3208 *raid_level = buf[8]; 3209 if (*raid_level > RAID_UNKNOWN) 3210 *raid_level = RAID_UNKNOWN; 3211 exit: 3212 kfree(buf); 3213 return; 3214 } 3215 3216 #define HPSA_MAP_DEBUG 3217 #ifdef HPSA_MAP_DEBUG 3218 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3219 struct raid_map_data *map_buff) 3220 { 3221 struct raid_map_disk_data *dd = &map_buff->data[0]; 3222 int map, row, col; 3223 u16 map_cnt, row_cnt, disks_per_row; 3224 3225 if (rc != 0) 3226 return; 3227 3228 /* Show details only if debugging has been activated. */ 3229 if (h->raid_offload_debug < 2) 3230 return; 3231 3232 dev_info(&h->pdev->dev, "structure_size = %u\n", 3233 le32_to_cpu(map_buff->structure_size)); 3234 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3235 le32_to_cpu(map_buff->volume_blk_size)); 3236 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3237 le64_to_cpu(map_buff->volume_blk_cnt)); 3238 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3239 map_buff->phys_blk_shift); 3240 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3241 map_buff->parity_rotation_shift); 3242 dev_info(&h->pdev->dev, "strip_size = %u\n", 3243 le16_to_cpu(map_buff->strip_size)); 3244 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3245 le64_to_cpu(map_buff->disk_starting_blk)); 3246 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3247 le64_to_cpu(map_buff->disk_blk_cnt)); 3248 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3249 le16_to_cpu(map_buff->data_disks_per_row)); 3250 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3251 le16_to_cpu(map_buff->metadata_disks_per_row)); 3252 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3253 le16_to_cpu(map_buff->row_cnt)); 3254 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3255 le16_to_cpu(map_buff->layout_map_count)); 3256 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3257 le16_to_cpu(map_buff->flags)); 3258 dev_info(&h->pdev->dev, "encryption = %s\n", 3259 le16_to_cpu(map_buff->flags) & 3260 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3261 dev_info(&h->pdev->dev, "dekindex = %u\n", 3262 le16_to_cpu(map_buff->dekindex)); 3263 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3264 for (map = 0; map < map_cnt; map++) { 3265 dev_info(&h->pdev->dev, "Map%u:\n", map); 3266 row_cnt = le16_to_cpu(map_buff->row_cnt); 3267 for (row = 0; row < row_cnt; row++) { 3268 dev_info(&h->pdev->dev, " Row%u:\n", row); 3269 disks_per_row = 3270 le16_to_cpu(map_buff->data_disks_per_row); 3271 for (col = 0; col < disks_per_row; col++, dd++) 3272 dev_info(&h->pdev->dev, 3273 " D%02u: h=0x%04x xor=%u,%u\n", 3274 col, dd->ioaccel_handle, 3275 dd->xor_mult[0], dd->xor_mult[1]); 3276 disks_per_row = 3277 le16_to_cpu(map_buff->metadata_disks_per_row); 3278 for (col = 0; col < disks_per_row; col++, dd++) 3279 dev_info(&h->pdev->dev, 3280 " M%02u: h=0x%04x xor=%u,%u\n", 3281 col, dd->ioaccel_handle, 3282 dd->xor_mult[0], dd->xor_mult[1]); 3283 } 3284 } 3285 } 3286 #else 3287 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3288 __attribute__((unused)) int rc, 3289 __attribute__((unused)) struct raid_map_data *map_buff) 3290 { 3291 } 3292 #endif 3293 3294 static int hpsa_get_raid_map(struct ctlr_info *h, 3295 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3296 { 3297 int rc = 0; 3298 struct CommandList *c; 3299 struct ErrorInfo *ei; 3300 3301 c = cmd_alloc(h); 3302 3303 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3304 sizeof(this_device->raid_map), 0, 3305 scsi3addr, TYPE_CMD)) { 3306 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3307 cmd_free(h, c); 3308 return -1; 3309 } 3310 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3311 NO_TIMEOUT); 3312 if (rc) 3313 goto out; 3314 ei = c->err_info; 3315 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3316 hpsa_scsi_interpret_error(h, c); 3317 rc = -1; 3318 goto out; 3319 } 3320 cmd_free(h, c); 3321 3322 /* @todo in the future, dynamically allocate RAID map memory */ 3323 if (le32_to_cpu(this_device->raid_map.structure_size) > 3324 sizeof(this_device->raid_map)) { 3325 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3326 rc = -1; 3327 } 3328 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3329 return rc; 3330 out: 3331 cmd_free(h, c); 3332 return rc; 3333 } 3334 3335 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3336 unsigned char scsi3addr[], u16 bmic_device_index, 3337 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3338 { 3339 int rc = IO_OK; 3340 struct CommandList *c; 3341 struct ErrorInfo *ei; 3342 3343 c = cmd_alloc(h); 3344 3345 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3346 0, RAID_CTLR_LUNID, TYPE_CMD); 3347 if (rc) 3348 goto out; 3349 3350 c->Request.CDB[2] = bmic_device_index & 0xff; 3351 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3352 3353 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3354 NO_TIMEOUT); 3355 if (rc) 3356 goto out; 3357 ei = c->err_info; 3358 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3359 hpsa_scsi_interpret_error(h, c); 3360 rc = -1; 3361 } 3362 out: 3363 cmd_free(h, c); 3364 return rc; 3365 } 3366 3367 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3368 struct bmic_identify_controller *buf, size_t bufsize) 3369 { 3370 int rc = IO_OK; 3371 struct CommandList *c; 3372 struct ErrorInfo *ei; 3373 3374 c = cmd_alloc(h); 3375 3376 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3377 0, RAID_CTLR_LUNID, TYPE_CMD); 3378 if (rc) 3379 goto out; 3380 3381 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3382 NO_TIMEOUT); 3383 if (rc) 3384 goto out; 3385 ei = c->err_info; 3386 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3387 hpsa_scsi_interpret_error(h, c); 3388 rc = -1; 3389 } 3390 out: 3391 cmd_free(h, c); 3392 return rc; 3393 } 3394 3395 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3396 unsigned char scsi3addr[], u16 bmic_device_index, 3397 struct bmic_identify_physical_device *buf, size_t bufsize) 3398 { 3399 int rc = IO_OK; 3400 struct CommandList *c; 3401 struct ErrorInfo *ei; 3402 3403 c = cmd_alloc(h); 3404 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3405 0, RAID_CTLR_LUNID, TYPE_CMD); 3406 if (rc) 3407 goto out; 3408 3409 c->Request.CDB[2] = bmic_device_index & 0xff; 3410 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3411 3412 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3413 NO_TIMEOUT); 3414 ei = c->err_info; 3415 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3416 hpsa_scsi_interpret_error(h, c); 3417 rc = -1; 3418 } 3419 out: 3420 cmd_free(h, c); 3421 3422 return rc; 3423 } 3424 3425 /* 3426 * get enclosure information 3427 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3428 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3429 * Uses id_physical_device to determine the box_index. 3430 */ 3431 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3432 unsigned char *scsi3addr, 3433 struct ReportExtendedLUNdata *rlep, int rle_index, 3434 struct hpsa_scsi_dev_t *encl_dev) 3435 { 3436 int rc = -1; 3437 struct CommandList *c = NULL; 3438 struct ErrorInfo *ei = NULL; 3439 struct bmic_sense_storage_box_params *bssbp = NULL; 3440 struct bmic_identify_physical_device *id_phys = NULL; 3441 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3442 u16 bmic_device_index = 0; 3443 3444 encl_dev->eli = 3445 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3446 3447 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3448 3449 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3450 rc = IO_OK; 3451 goto out; 3452 } 3453 3454 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3455 rc = IO_OK; 3456 goto out; 3457 } 3458 3459 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3460 if (!bssbp) 3461 goto out; 3462 3463 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3464 if (!id_phys) 3465 goto out; 3466 3467 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3468 id_phys, sizeof(*id_phys)); 3469 if (rc) { 3470 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3471 __func__, encl_dev->external, bmic_device_index); 3472 goto out; 3473 } 3474 3475 c = cmd_alloc(h); 3476 3477 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3478 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3479 3480 if (rc) 3481 goto out; 3482 3483 if (id_phys->phys_connector[1] == 'E') 3484 c->Request.CDB[5] = id_phys->box_index; 3485 else 3486 c->Request.CDB[5] = 0; 3487 3488 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3489 NO_TIMEOUT); 3490 if (rc) 3491 goto out; 3492 3493 ei = c->err_info; 3494 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3495 rc = -1; 3496 goto out; 3497 } 3498 3499 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3500 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3501 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3502 3503 rc = IO_OK; 3504 out: 3505 kfree(bssbp); 3506 kfree(id_phys); 3507 3508 if (c) 3509 cmd_free(h, c); 3510 3511 if (rc != IO_OK) 3512 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3513 "Error, could not get enclosure information"); 3514 } 3515 3516 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3517 unsigned char *scsi3addr) 3518 { 3519 struct ReportExtendedLUNdata *physdev; 3520 u32 nphysicals; 3521 u64 sa = 0; 3522 int i; 3523 3524 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3525 if (!physdev) 3526 return 0; 3527 3528 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3529 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3530 kfree(physdev); 3531 return 0; 3532 } 3533 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3534 3535 for (i = 0; i < nphysicals; i++) 3536 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3537 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3538 break; 3539 } 3540 3541 kfree(physdev); 3542 3543 return sa; 3544 } 3545 3546 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3547 struct hpsa_scsi_dev_t *dev) 3548 { 3549 int rc; 3550 u64 sa = 0; 3551 3552 if (is_hba_lunid(scsi3addr)) { 3553 struct bmic_sense_subsystem_info *ssi; 3554 3555 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3556 if (!ssi) 3557 return; 3558 3559 rc = hpsa_bmic_sense_subsystem_information(h, 3560 scsi3addr, 0, ssi, sizeof(*ssi)); 3561 if (rc == 0) { 3562 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3563 h->sas_address = sa; 3564 } 3565 3566 kfree(ssi); 3567 } else 3568 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3569 3570 dev->sas_address = sa; 3571 } 3572 3573 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3574 struct ReportExtendedLUNdata *physdev) 3575 { 3576 u32 nphysicals; 3577 int i; 3578 3579 if (h->discovery_polling) 3580 return; 3581 3582 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3583 3584 for (i = 0; i < nphysicals; i++) { 3585 if (physdev->LUN[i].device_type == 3586 BMIC_DEVICE_TYPE_CONTROLLER 3587 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3588 dev_info(&h->pdev->dev, 3589 "External controller present, activate discovery polling and disable rld caching\n"); 3590 hpsa_disable_rld_caching(h); 3591 h->discovery_polling = 1; 3592 break; 3593 } 3594 } 3595 } 3596 3597 /* Get a device id from inquiry page 0x83 */ 3598 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3599 unsigned char scsi3addr[], u8 page) 3600 { 3601 int rc; 3602 int i; 3603 int pages; 3604 unsigned char *buf, bufsize; 3605 3606 buf = kzalloc(256, GFP_KERNEL); 3607 if (!buf) 3608 return false; 3609 3610 /* Get the size of the page list first */ 3611 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3612 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3613 buf, HPSA_VPD_HEADER_SZ); 3614 if (rc != 0) 3615 goto exit_unsupported; 3616 pages = buf[3]; 3617 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3618 bufsize = pages + HPSA_VPD_HEADER_SZ; 3619 else 3620 bufsize = 255; 3621 3622 /* Get the whole VPD page list */ 3623 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3624 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3625 buf, bufsize); 3626 if (rc != 0) 3627 goto exit_unsupported; 3628 3629 pages = buf[3]; 3630 for (i = 1; i <= pages; i++) 3631 if (buf[3 + i] == page) 3632 goto exit_supported; 3633 exit_unsupported: 3634 kfree(buf); 3635 return false; 3636 exit_supported: 3637 kfree(buf); 3638 return true; 3639 } 3640 3641 /* 3642 * Called during a scan operation. 3643 * Sets ioaccel status on the new device list, not the existing device list 3644 * 3645 * The device list used during I/O will be updated later in 3646 * adjust_hpsa_scsi_table. 3647 */ 3648 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3649 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3650 { 3651 int rc; 3652 unsigned char *buf; 3653 u8 ioaccel_status; 3654 3655 this_device->offload_config = 0; 3656 this_device->offload_enabled = 0; 3657 this_device->offload_to_be_enabled = 0; 3658 3659 buf = kzalloc(64, GFP_KERNEL); 3660 if (!buf) 3661 return; 3662 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3663 goto out; 3664 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3665 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3666 if (rc != 0) 3667 goto out; 3668 3669 #define IOACCEL_STATUS_BYTE 4 3670 #define OFFLOAD_CONFIGURED_BIT 0x01 3671 #define OFFLOAD_ENABLED_BIT 0x02 3672 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3673 this_device->offload_config = 3674 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3675 if (this_device->offload_config) { 3676 this_device->offload_to_be_enabled = 3677 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3678 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3679 this_device->offload_to_be_enabled = 0; 3680 } 3681 3682 out: 3683 kfree(buf); 3684 return; 3685 } 3686 3687 /* Get the device id from inquiry page 0x83 */ 3688 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3689 unsigned char *device_id, int index, int buflen) 3690 { 3691 int rc; 3692 unsigned char *buf; 3693 3694 /* Does controller have VPD for device id? */ 3695 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3696 return 1; /* not supported */ 3697 3698 buf = kzalloc(64, GFP_KERNEL); 3699 if (!buf) 3700 return -ENOMEM; 3701 3702 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3703 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3704 if (rc == 0) { 3705 if (buflen > 16) 3706 buflen = 16; 3707 memcpy(device_id, &buf[8], buflen); 3708 } 3709 3710 kfree(buf); 3711 3712 return rc; /*0 - got id, otherwise, didn't */ 3713 } 3714 3715 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3716 void *buf, int bufsize, 3717 int extended_response) 3718 { 3719 int rc = IO_OK; 3720 struct CommandList *c; 3721 unsigned char scsi3addr[8]; 3722 struct ErrorInfo *ei; 3723 3724 c = cmd_alloc(h); 3725 3726 /* address the controller */ 3727 memset(scsi3addr, 0, sizeof(scsi3addr)); 3728 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3729 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3730 rc = -EAGAIN; 3731 goto out; 3732 } 3733 if (extended_response) 3734 c->Request.CDB[1] = extended_response; 3735 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3736 NO_TIMEOUT); 3737 if (rc) 3738 goto out; 3739 ei = c->err_info; 3740 if (ei->CommandStatus != 0 && 3741 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3742 hpsa_scsi_interpret_error(h, c); 3743 rc = -EIO; 3744 } else { 3745 struct ReportLUNdata *rld = buf; 3746 3747 if (rld->extended_response_flag != extended_response) { 3748 if (!h->legacy_board) { 3749 dev_err(&h->pdev->dev, 3750 "report luns requested format %u, got %u\n", 3751 extended_response, 3752 rld->extended_response_flag); 3753 rc = -EINVAL; 3754 } else 3755 rc = -EOPNOTSUPP; 3756 } 3757 } 3758 out: 3759 cmd_free(h, c); 3760 return rc; 3761 } 3762 3763 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3764 struct ReportExtendedLUNdata *buf, int bufsize) 3765 { 3766 int rc; 3767 struct ReportLUNdata *lbuf; 3768 3769 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3770 HPSA_REPORT_PHYS_EXTENDED); 3771 if (!rc || rc != -EOPNOTSUPP) 3772 return rc; 3773 3774 /* REPORT PHYS EXTENDED is not supported */ 3775 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3776 if (!lbuf) 3777 return -ENOMEM; 3778 3779 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3780 if (!rc) { 3781 int i; 3782 u32 nphys; 3783 3784 /* Copy ReportLUNdata header */ 3785 memcpy(buf, lbuf, 8); 3786 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3787 for (i = 0; i < nphys; i++) 3788 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3789 } 3790 kfree(lbuf); 3791 return rc; 3792 } 3793 3794 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3795 struct ReportLUNdata *buf, int bufsize) 3796 { 3797 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3798 } 3799 3800 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3801 int bus, int target, int lun) 3802 { 3803 device->bus = bus; 3804 device->target = target; 3805 device->lun = lun; 3806 } 3807 3808 /* Use VPD inquiry to get details of volume status */ 3809 static int hpsa_get_volume_status(struct ctlr_info *h, 3810 unsigned char scsi3addr[]) 3811 { 3812 int rc; 3813 int status; 3814 int size; 3815 unsigned char *buf; 3816 3817 buf = kzalloc(64, GFP_KERNEL); 3818 if (!buf) 3819 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3820 3821 /* Does controller have VPD for logical volume status? */ 3822 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3823 goto exit_failed; 3824 3825 /* Get the size of the VPD return buffer */ 3826 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3827 buf, HPSA_VPD_HEADER_SZ); 3828 if (rc != 0) 3829 goto exit_failed; 3830 size = buf[3]; 3831 3832 /* Now get the whole VPD buffer */ 3833 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3834 buf, size + HPSA_VPD_HEADER_SZ); 3835 if (rc != 0) 3836 goto exit_failed; 3837 status = buf[4]; /* status byte */ 3838 3839 kfree(buf); 3840 return status; 3841 exit_failed: 3842 kfree(buf); 3843 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3844 } 3845 3846 /* Determine offline status of a volume. 3847 * Return either: 3848 * 0 (not offline) 3849 * 0xff (offline for unknown reasons) 3850 * # (integer code indicating one of several NOT READY states 3851 * describing why a volume is to be kept offline) 3852 */ 3853 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3854 unsigned char scsi3addr[]) 3855 { 3856 struct CommandList *c; 3857 unsigned char *sense; 3858 u8 sense_key, asc, ascq; 3859 int sense_len; 3860 int rc, ldstat = 0; 3861 u16 cmd_status; 3862 u8 scsi_status; 3863 #define ASC_LUN_NOT_READY 0x04 3864 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3865 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3866 3867 c = cmd_alloc(h); 3868 3869 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3870 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3871 NO_TIMEOUT); 3872 if (rc) { 3873 cmd_free(h, c); 3874 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3875 } 3876 sense = c->err_info->SenseInfo; 3877 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3878 sense_len = sizeof(c->err_info->SenseInfo); 3879 else 3880 sense_len = c->err_info->SenseLen; 3881 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3882 cmd_status = c->err_info->CommandStatus; 3883 scsi_status = c->err_info->ScsiStatus; 3884 cmd_free(h, c); 3885 3886 /* Determine the reason for not ready state */ 3887 ldstat = hpsa_get_volume_status(h, scsi3addr); 3888 3889 /* Keep volume offline in certain cases: */ 3890 switch (ldstat) { 3891 case HPSA_LV_FAILED: 3892 case HPSA_LV_UNDERGOING_ERASE: 3893 case HPSA_LV_NOT_AVAILABLE: 3894 case HPSA_LV_UNDERGOING_RPI: 3895 case HPSA_LV_PENDING_RPI: 3896 case HPSA_LV_ENCRYPTED_NO_KEY: 3897 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3898 case HPSA_LV_UNDERGOING_ENCRYPTION: 3899 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3900 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3901 return ldstat; 3902 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3903 /* If VPD status page isn't available, 3904 * use ASC/ASCQ to determine state 3905 */ 3906 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3907 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3908 return ldstat; 3909 break; 3910 default: 3911 break; 3912 } 3913 return HPSA_LV_OK; 3914 } 3915 3916 static int hpsa_update_device_info(struct ctlr_info *h, 3917 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3918 unsigned char *is_OBDR_device) 3919 { 3920 3921 #define OBDR_SIG_OFFSET 43 3922 #define OBDR_TAPE_SIG "$DR-10" 3923 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3924 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3925 3926 unsigned char *inq_buff; 3927 unsigned char *obdr_sig; 3928 int rc = 0; 3929 3930 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3931 if (!inq_buff) { 3932 rc = -ENOMEM; 3933 goto bail_out; 3934 } 3935 3936 /* Do an inquiry to the device to see what it is. */ 3937 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3938 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3939 dev_err(&h->pdev->dev, 3940 "%s: inquiry failed, device will be skipped.\n", 3941 __func__); 3942 rc = HPSA_INQUIRY_FAILED; 3943 goto bail_out; 3944 } 3945 3946 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3947 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3948 3949 this_device->devtype = (inq_buff[0] & 0x1f); 3950 memcpy(this_device->scsi3addr, scsi3addr, 8); 3951 memcpy(this_device->vendor, &inq_buff[8], 3952 sizeof(this_device->vendor)); 3953 memcpy(this_device->model, &inq_buff[16], 3954 sizeof(this_device->model)); 3955 this_device->rev = inq_buff[2]; 3956 memset(this_device->device_id, 0, 3957 sizeof(this_device->device_id)); 3958 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3959 sizeof(this_device->device_id)) < 0) 3960 dev_err(&h->pdev->dev, 3961 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3962 h->ctlr, __func__, 3963 h->scsi_host->host_no, 3964 this_device->target, this_device->lun, 3965 scsi_device_type(this_device->devtype), 3966 this_device->model); 3967 3968 if ((this_device->devtype == TYPE_DISK || 3969 this_device->devtype == TYPE_ZBC) && 3970 is_logical_dev_addr_mode(scsi3addr)) { 3971 unsigned char volume_offline; 3972 3973 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3974 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3975 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3976 volume_offline = hpsa_volume_offline(h, scsi3addr); 3977 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3978 h->legacy_board) { 3979 /* 3980 * Legacy boards might not support volume status 3981 */ 3982 dev_info(&h->pdev->dev, 3983 "C0:T%d:L%d Volume status not available, assuming online.\n", 3984 this_device->target, this_device->lun); 3985 volume_offline = 0; 3986 } 3987 this_device->volume_offline = volume_offline; 3988 if (volume_offline == HPSA_LV_FAILED) { 3989 rc = HPSA_LV_FAILED; 3990 dev_err(&h->pdev->dev, 3991 "%s: LV failed, device will be skipped.\n", 3992 __func__); 3993 goto bail_out; 3994 } 3995 } else { 3996 this_device->raid_level = RAID_UNKNOWN; 3997 this_device->offload_config = 0; 3998 this_device->offload_enabled = 0; 3999 this_device->offload_to_be_enabled = 0; 4000 this_device->hba_ioaccel_enabled = 0; 4001 this_device->volume_offline = 0; 4002 this_device->queue_depth = h->nr_cmds; 4003 } 4004 4005 if (this_device->external) 4006 this_device->queue_depth = EXTERNAL_QD; 4007 4008 if (is_OBDR_device) { 4009 /* See if this is a One-Button-Disaster-Recovery device 4010 * by looking for "$DR-10" at offset 43 in inquiry data. 4011 */ 4012 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4013 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4014 strncmp(obdr_sig, OBDR_TAPE_SIG, 4015 OBDR_SIG_LEN) == 0); 4016 } 4017 kfree(inq_buff); 4018 return 0; 4019 4020 bail_out: 4021 kfree(inq_buff); 4022 return rc; 4023 } 4024 4025 /* 4026 * Helper function to assign bus, target, lun mapping of devices. 4027 * Logical drive target and lun are assigned at this time, but 4028 * physical device lun and target assignment are deferred (assigned 4029 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4030 */ 4031 static void figure_bus_target_lun(struct ctlr_info *h, 4032 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4033 { 4034 u32 lunid = get_unaligned_le32(lunaddrbytes); 4035 4036 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4037 /* physical device, target and lun filled in later */ 4038 if (is_hba_lunid(lunaddrbytes)) { 4039 int bus = HPSA_HBA_BUS; 4040 4041 if (!device->rev) 4042 bus = HPSA_LEGACY_HBA_BUS; 4043 hpsa_set_bus_target_lun(device, 4044 bus, 0, lunid & 0x3fff); 4045 } else 4046 /* defer target, lun assignment for physical devices */ 4047 hpsa_set_bus_target_lun(device, 4048 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4049 return; 4050 } 4051 /* It's a logical device */ 4052 if (device->external) { 4053 hpsa_set_bus_target_lun(device, 4054 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4055 lunid & 0x00ff); 4056 return; 4057 } 4058 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4059 0, lunid & 0x3fff); 4060 } 4061 4062 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4063 int i, int nphysicals, int nlocal_logicals) 4064 { 4065 /* In report logicals, local logicals are listed first, 4066 * then any externals. 4067 */ 4068 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4069 4070 if (i == raid_ctlr_position) 4071 return 0; 4072 4073 if (i < logicals_start) 4074 return 0; 4075 4076 /* i is in logicals range, but still within local logicals */ 4077 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4078 return 0; 4079 4080 return 1; /* it's an external lun */ 4081 } 4082 4083 /* 4084 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4085 * logdev. The number of luns in physdev and logdev are returned in 4086 * *nphysicals and *nlogicals, respectively. 4087 * Returns 0 on success, -1 otherwise. 4088 */ 4089 static int hpsa_gather_lun_info(struct ctlr_info *h, 4090 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4091 struct ReportLUNdata *logdev, u32 *nlogicals) 4092 { 4093 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4094 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4095 return -1; 4096 } 4097 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4098 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4099 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4100 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4101 *nphysicals = HPSA_MAX_PHYS_LUN; 4102 } 4103 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4104 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4105 return -1; 4106 } 4107 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4108 /* Reject Logicals in excess of our max capability. */ 4109 if (*nlogicals > HPSA_MAX_LUN) { 4110 dev_warn(&h->pdev->dev, 4111 "maximum logical LUNs (%d) exceeded. " 4112 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4113 *nlogicals - HPSA_MAX_LUN); 4114 *nlogicals = HPSA_MAX_LUN; 4115 } 4116 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4117 dev_warn(&h->pdev->dev, 4118 "maximum logical + physical LUNs (%d) exceeded. " 4119 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4120 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4121 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4122 } 4123 return 0; 4124 } 4125 4126 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4127 int i, int nphysicals, int nlogicals, 4128 struct ReportExtendedLUNdata *physdev_list, 4129 struct ReportLUNdata *logdev_list) 4130 { 4131 /* Helper function, figure out where the LUN ID info is coming from 4132 * given index i, lists of physical and logical devices, where in 4133 * the list the raid controller is supposed to appear (first or last) 4134 */ 4135 4136 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4137 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4138 4139 if (i == raid_ctlr_position) 4140 return RAID_CTLR_LUNID; 4141 4142 if (i < logicals_start) 4143 return &physdev_list->LUN[i - 4144 (raid_ctlr_position == 0)].lunid[0]; 4145 4146 if (i < last_device) 4147 return &logdev_list->LUN[i - nphysicals - 4148 (raid_ctlr_position == 0)][0]; 4149 BUG(); 4150 return NULL; 4151 } 4152 4153 /* get physical drive ioaccel handle and queue depth */ 4154 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4155 struct hpsa_scsi_dev_t *dev, 4156 struct ReportExtendedLUNdata *rlep, int rle_index, 4157 struct bmic_identify_physical_device *id_phys) 4158 { 4159 int rc; 4160 struct ext_report_lun_entry *rle; 4161 4162 rle = &rlep->LUN[rle_index]; 4163 4164 dev->ioaccel_handle = rle->ioaccel_handle; 4165 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4166 dev->hba_ioaccel_enabled = 1; 4167 memset(id_phys, 0, sizeof(*id_phys)); 4168 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4169 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4170 sizeof(*id_phys)); 4171 if (!rc) 4172 /* Reserve space for FW operations */ 4173 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4174 #define DRIVE_QUEUE_DEPTH 7 4175 dev->queue_depth = 4176 le16_to_cpu(id_phys->current_queue_depth_limit) - 4177 DRIVE_CMDS_RESERVED_FOR_FW; 4178 else 4179 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4180 } 4181 4182 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4183 struct ReportExtendedLUNdata *rlep, int rle_index, 4184 struct bmic_identify_physical_device *id_phys) 4185 { 4186 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4187 4188 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4189 this_device->hba_ioaccel_enabled = 1; 4190 4191 memcpy(&this_device->active_path_index, 4192 &id_phys->active_path_number, 4193 sizeof(this_device->active_path_index)); 4194 memcpy(&this_device->path_map, 4195 &id_phys->redundant_path_present_map, 4196 sizeof(this_device->path_map)); 4197 memcpy(&this_device->box, 4198 &id_phys->alternate_paths_phys_box_on_port, 4199 sizeof(this_device->box)); 4200 memcpy(&this_device->phys_connector, 4201 &id_phys->alternate_paths_phys_connector, 4202 sizeof(this_device->phys_connector)); 4203 memcpy(&this_device->bay, 4204 &id_phys->phys_bay_in_box, 4205 sizeof(this_device->bay)); 4206 } 4207 4208 /* get number of local logical disks. */ 4209 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4210 struct bmic_identify_controller *id_ctlr, 4211 u32 *nlocals) 4212 { 4213 int rc; 4214 4215 if (!id_ctlr) { 4216 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4217 __func__); 4218 return -ENOMEM; 4219 } 4220 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4221 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4222 if (!rc) 4223 if (id_ctlr->configured_logical_drive_count < 255) 4224 *nlocals = id_ctlr->configured_logical_drive_count; 4225 else 4226 *nlocals = le16_to_cpu( 4227 id_ctlr->extended_logical_unit_count); 4228 else 4229 *nlocals = -1; 4230 return rc; 4231 } 4232 4233 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4234 { 4235 struct bmic_identify_physical_device *id_phys; 4236 bool is_spare = false; 4237 int rc; 4238 4239 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4240 if (!id_phys) 4241 return false; 4242 4243 rc = hpsa_bmic_id_physical_device(h, 4244 lunaddrbytes, 4245 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4246 id_phys, sizeof(*id_phys)); 4247 if (rc == 0) 4248 is_spare = (id_phys->more_flags >> 6) & 0x01; 4249 4250 kfree(id_phys); 4251 return is_spare; 4252 } 4253 4254 #define RPL_DEV_FLAG_NON_DISK 0x1 4255 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4256 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4257 4258 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4259 4260 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4261 struct ext_report_lun_entry *rle) 4262 { 4263 u8 device_flags; 4264 u8 device_type; 4265 4266 if (!MASKED_DEVICE(lunaddrbytes)) 4267 return false; 4268 4269 device_flags = rle->device_flags; 4270 device_type = rle->device_type; 4271 4272 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4273 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4274 return false; 4275 return true; 4276 } 4277 4278 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4279 return false; 4280 4281 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4282 return false; 4283 4284 /* 4285 * Spares may be spun down, we do not want to 4286 * do an Inquiry to a RAID set spare drive as 4287 * that would have them spun up, that is a 4288 * performance hit because I/O to the RAID device 4289 * stops while the spin up occurs which can take 4290 * over 50 seconds. 4291 */ 4292 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4293 return true; 4294 4295 return false; 4296 } 4297 4298 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4299 { 4300 /* the idea here is we could get notified 4301 * that some devices have changed, so we do a report 4302 * physical luns and report logical luns cmd, and adjust 4303 * our list of devices accordingly. 4304 * 4305 * The scsi3addr's of devices won't change so long as the 4306 * adapter is not reset. That means we can rescan and 4307 * tell which devices we already know about, vs. new 4308 * devices, vs. disappearing devices. 4309 */ 4310 struct ReportExtendedLUNdata *physdev_list = NULL; 4311 struct ReportLUNdata *logdev_list = NULL; 4312 struct bmic_identify_physical_device *id_phys = NULL; 4313 struct bmic_identify_controller *id_ctlr = NULL; 4314 u32 nphysicals = 0; 4315 u32 nlogicals = 0; 4316 u32 nlocal_logicals = 0; 4317 u32 ndev_allocated = 0; 4318 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4319 int ncurrent = 0; 4320 int i, n_ext_target_devs, ndevs_to_allocate; 4321 int raid_ctlr_position; 4322 bool physical_device; 4323 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4324 4325 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 4326 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4327 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4328 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4329 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4330 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4331 4332 if (!currentsd || !physdev_list || !logdev_list || 4333 !tmpdevice || !id_phys || !id_ctlr) { 4334 dev_err(&h->pdev->dev, "out of memory\n"); 4335 goto out; 4336 } 4337 memset(lunzerobits, 0, sizeof(lunzerobits)); 4338 4339 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4340 4341 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4342 logdev_list, &nlogicals)) { 4343 h->drv_req_rescan = 1; 4344 goto out; 4345 } 4346 4347 /* Set number of local logicals (non PTRAID) */ 4348 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4349 dev_warn(&h->pdev->dev, 4350 "%s: Can't determine number of local logical devices.\n", 4351 __func__); 4352 } 4353 4354 /* We might see up to the maximum number of logical and physical disks 4355 * plus external target devices, and a device for the local RAID 4356 * controller. 4357 */ 4358 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4359 4360 hpsa_ext_ctrl_present(h, physdev_list); 4361 4362 /* Allocate the per device structures */ 4363 for (i = 0; i < ndevs_to_allocate; i++) { 4364 if (i >= HPSA_MAX_DEVICES) { 4365 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4366 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4367 ndevs_to_allocate - HPSA_MAX_DEVICES); 4368 break; 4369 } 4370 4371 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4372 if (!currentsd[i]) { 4373 h->drv_req_rescan = 1; 4374 goto out; 4375 } 4376 ndev_allocated++; 4377 } 4378 4379 if (is_scsi_rev_5(h)) 4380 raid_ctlr_position = 0; 4381 else 4382 raid_ctlr_position = nphysicals + nlogicals; 4383 4384 /* adjust our table of devices */ 4385 n_ext_target_devs = 0; 4386 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4387 u8 *lunaddrbytes, is_OBDR = 0; 4388 int rc = 0; 4389 int phys_dev_index = i - (raid_ctlr_position == 0); 4390 bool skip_device = false; 4391 4392 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4393 4394 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4395 4396 /* Figure out where the LUN ID info is coming from */ 4397 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4398 i, nphysicals, nlogicals, physdev_list, logdev_list); 4399 4400 /* Determine if this is a lun from an external target array */ 4401 tmpdevice->external = 4402 figure_external_status(h, raid_ctlr_position, i, 4403 nphysicals, nlocal_logicals); 4404 4405 /* 4406 * Skip over some devices such as a spare. 4407 */ 4408 if (!tmpdevice->external && physical_device) { 4409 skip_device = hpsa_skip_device(h, lunaddrbytes, 4410 &physdev_list->LUN[phys_dev_index]); 4411 if (skip_device) 4412 continue; 4413 } 4414 4415 /* Get device type, vendor, model, device id, raid_map */ 4416 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4417 &is_OBDR); 4418 if (rc == -ENOMEM) { 4419 dev_warn(&h->pdev->dev, 4420 "Out of memory, rescan deferred.\n"); 4421 h->drv_req_rescan = 1; 4422 goto out; 4423 } 4424 if (rc) { 4425 h->drv_req_rescan = 1; 4426 continue; 4427 } 4428 4429 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4430 this_device = currentsd[ncurrent]; 4431 4432 *this_device = *tmpdevice; 4433 this_device->physical_device = physical_device; 4434 4435 /* 4436 * Expose all devices except for physical devices that 4437 * are masked. 4438 */ 4439 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4440 this_device->expose_device = 0; 4441 else 4442 this_device->expose_device = 1; 4443 4444 4445 /* 4446 * Get the SAS address for physical devices that are exposed. 4447 */ 4448 if (this_device->physical_device && this_device->expose_device) 4449 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4450 4451 switch (this_device->devtype) { 4452 case TYPE_ROM: 4453 /* We don't *really* support actual CD-ROM devices, 4454 * just "One Button Disaster Recovery" tape drive 4455 * which temporarily pretends to be a CD-ROM drive. 4456 * So we check that the device is really an OBDR tape 4457 * device by checking for "$DR-10" in bytes 43-48 of 4458 * the inquiry data. 4459 */ 4460 if (is_OBDR) 4461 ncurrent++; 4462 break; 4463 case TYPE_DISK: 4464 case TYPE_ZBC: 4465 if (this_device->physical_device) { 4466 /* The disk is in HBA mode. */ 4467 /* Never use RAID mapper in HBA mode. */ 4468 this_device->offload_enabled = 0; 4469 hpsa_get_ioaccel_drive_info(h, this_device, 4470 physdev_list, phys_dev_index, id_phys); 4471 hpsa_get_path_info(this_device, 4472 physdev_list, phys_dev_index, id_phys); 4473 } 4474 ncurrent++; 4475 break; 4476 case TYPE_TAPE: 4477 case TYPE_MEDIUM_CHANGER: 4478 ncurrent++; 4479 break; 4480 case TYPE_ENCLOSURE: 4481 if (!this_device->external) 4482 hpsa_get_enclosure_info(h, lunaddrbytes, 4483 physdev_list, phys_dev_index, 4484 this_device); 4485 ncurrent++; 4486 break; 4487 case TYPE_RAID: 4488 /* Only present the Smartarray HBA as a RAID controller. 4489 * If it's a RAID controller other than the HBA itself 4490 * (an external RAID controller, MSA500 or similar) 4491 * don't present it. 4492 */ 4493 if (!is_hba_lunid(lunaddrbytes)) 4494 break; 4495 ncurrent++; 4496 break; 4497 default: 4498 break; 4499 } 4500 if (ncurrent >= HPSA_MAX_DEVICES) 4501 break; 4502 } 4503 4504 if (h->sas_host == NULL) { 4505 int rc = 0; 4506 4507 rc = hpsa_add_sas_host(h); 4508 if (rc) { 4509 dev_warn(&h->pdev->dev, 4510 "Could not add sas host %d\n", rc); 4511 goto out; 4512 } 4513 } 4514 4515 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4516 out: 4517 kfree(tmpdevice); 4518 for (i = 0; i < ndev_allocated; i++) 4519 kfree(currentsd[i]); 4520 kfree(currentsd); 4521 kfree(physdev_list); 4522 kfree(logdev_list); 4523 kfree(id_ctlr); 4524 kfree(id_phys); 4525 } 4526 4527 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4528 struct scatterlist *sg) 4529 { 4530 u64 addr64 = (u64) sg_dma_address(sg); 4531 unsigned int len = sg_dma_len(sg); 4532 4533 desc->Addr = cpu_to_le64(addr64); 4534 desc->Len = cpu_to_le32(len); 4535 desc->Ext = 0; 4536 } 4537 4538 /* 4539 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4540 * dma mapping and fills in the scatter gather entries of the 4541 * hpsa command, cp. 4542 */ 4543 static int hpsa_scatter_gather(struct ctlr_info *h, 4544 struct CommandList *cp, 4545 struct scsi_cmnd *cmd) 4546 { 4547 struct scatterlist *sg; 4548 int use_sg, i, sg_limit, chained, last_sg; 4549 struct SGDescriptor *curr_sg; 4550 4551 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4552 4553 use_sg = scsi_dma_map(cmd); 4554 if (use_sg < 0) 4555 return use_sg; 4556 4557 if (!use_sg) 4558 goto sglist_finished; 4559 4560 /* 4561 * If the number of entries is greater than the max for a single list, 4562 * then we have a chained list; we will set up all but one entry in the 4563 * first list (the last entry is saved for link information); 4564 * otherwise, we don't have a chained list and we'll set up at each of 4565 * the entries in the one list. 4566 */ 4567 curr_sg = cp->SG; 4568 chained = use_sg > h->max_cmd_sg_entries; 4569 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4570 last_sg = scsi_sg_count(cmd) - 1; 4571 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4572 hpsa_set_sg_descriptor(curr_sg, sg); 4573 curr_sg++; 4574 } 4575 4576 if (chained) { 4577 /* 4578 * Continue with the chained list. Set curr_sg to the chained 4579 * list. Modify the limit to the total count less the entries 4580 * we've already set up. Resume the scan at the list entry 4581 * where the previous loop left off. 4582 */ 4583 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4584 sg_limit = use_sg - sg_limit; 4585 for_each_sg(sg, sg, sg_limit, i) { 4586 hpsa_set_sg_descriptor(curr_sg, sg); 4587 curr_sg++; 4588 } 4589 } 4590 4591 /* Back the pointer up to the last entry and mark it as "last". */ 4592 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4593 4594 if (use_sg + chained > h->maxSG) 4595 h->maxSG = use_sg + chained; 4596 4597 if (chained) { 4598 cp->Header.SGList = h->max_cmd_sg_entries; 4599 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4600 if (hpsa_map_sg_chain_block(h, cp)) { 4601 scsi_dma_unmap(cmd); 4602 return -1; 4603 } 4604 return 0; 4605 } 4606 4607 sglist_finished: 4608 4609 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4610 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4611 return 0; 4612 } 4613 4614 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4615 u8 *cdb, int cdb_len, 4616 const char *func) 4617 { 4618 dev_warn(&h->pdev->dev, 4619 "%s: Blocking zero-length request: CDB:%*phN\n", 4620 func, cdb_len, cdb); 4621 } 4622 4623 #define IO_ACCEL_INELIGIBLE 1 4624 /* zero-length transfers trigger hardware errors. */ 4625 static bool is_zero_length_transfer(u8 *cdb) 4626 { 4627 u32 block_cnt; 4628 4629 /* Block zero-length transfer sizes on certain commands. */ 4630 switch (cdb[0]) { 4631 case READ_10: 4632 case WRITE_10: 4633 case VERIFY: /* 0x2F */ 4634 case WRITE_VERIFY: /* 0x2E */ 4635 block_cnt = get_unaligned_be16(&cdb[7]); 4636 break; 4637 case READ_12: 4638 case WRITE_12: 4639 case VERIFY_12: /* 0xAF */ 4640 case WRITE_VERIFY_12: /* 0xAE */ 4641 block_cnt = get_unaligned_be32(&cdb[6]); 4642 break; 4643 case READ_16: 4644 case WRITE_16: 4645 case VERIFY_16: /* 0x8F */ 4646 block_cnt = get_unaligned_be32(&cdb[10]); 4647 break; 4648 default: 4649 return false; 4650 } 4651 4652 return block_cnt == 0; 4653 } 4654 4655 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4656 { 4657 int is_write = 0; 4658 u32 block; 4659 u32 block_cnt; 4660 4661 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4662 switch (cdb[0]) { 4663 case WRITE_6: 4664 case WRITE_12: 4665 is_write = 1; 4666 case READ_6: 4667 case READ_12: 4668 if (*cdb_len == 6) { 4669 block = (((cdb[1] & 0x1F) << 16) | 4670 (cdb[2] << 8) | 4671 cdb[3]); 4672 block_cnt = cdb[4]; 4673 if (block_cnt == 0) 4674 block_cnt = 256; 4675 } else { 4676 BUG_ON(*cdb_len != 12); 4677 block = get_unaligned_be32(&cdb[2]); 4678 block_cnt = get_unaligned_be32(&cdb[6]); 4679 } 4680 if (block_cnt > 0xffff) 4681 return IO_ACCEL_INELIGIBLE; 4682 4683 cdb[0] = is_write ? WRITE_10 : READ_10; 4684 cdb[1] = 0; 4685 cdb[2] = (u8) (block >> 24); 4686 cdb[3] = (u8) (block >> 16); 4687 cdb[4] = (u8) (block >> 8); 4688 cdb[5] = (u8) (block); 4689 cdb[6] = 0; 4690 cdb[7] = (u8) (block_cnt >> 8); 4691 cdb[8] = (u8) (block_cnt); 4692 cdb[9] = 0; 4693 *cdb_len = 10; 4694 break; 4695 } 4696 return 0; 4697 } 4698 4699 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4700 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4701 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4702 { 4703 struct scsi_cmnd *cmd = c->scsi_cmd; 4704 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4705 unsigned int len; 4706 unsigned int total_len = 0; 4707 struct scatterlist *sg; 4708 u64 addr64; 4709 int use_sg, i; 4710 struct SGDescriptor *curr_sg; 4711 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4712 4713 /* TODO: implement chaining support */ 4714 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4715 atomic_dec(&phys_disk->ioaccel_cmds_out); 4716 return IO_ACCEL_INELIGIBLE; 4717 } 4718 4719 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4720 4721 if (is_zero_length_transfer(cdb)) { 4722 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4723 atomic_dec(&phys_disk->ioaccel_cmds_out); 4724 return IO_ACCEL_INELIGIBLE; 4725 } 4726 4727 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4728 atomic_dec(&phys_disk->ioaccel_cmds_out); 4729 return IO_ACCEL_INELIGIBLE; 4730 } 4731 4732 c->cmd_type = CMD_IOACCEL1; 4733 4734 /* Adjust the DMA address to point to the accelerated command buffer */ 4735 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4736 (c->cmdindex * sizeof(*cp)); 4737 BUG_ON(c->busaddr & 0x0000007F); 4738 4739 use_sg = scsi_dma_map(cmd); 4740 if (use_sg < 0) { 4741 atomic_dec(&phys_disk->ioaccel_cmds_out); 4742 return use_sg; 4743 } 4744 4745 if (use_sg) { 4746 curr_sg = cp->SG; 4747 scsi_for_each_sg(cmd, sg, use_sg, i) { 4748 addr64 = (u64) sg_dma_address(sg); 4749 len = sg_dma_len(sg); 4750 total_len += len; 4751 curr_sg->Addr = cpu_to_le64(addr64); 4752 curr_sg->Len = cpu_to_le32(len); 4753 curr_sg->Ext = cpu_to_le32(0); 4754 curr_sg++; 4755 } 4756 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4757 4758 switch (cmd->sc_data_direction) { 4759 case DMA_TO_DEVICE: 4760 control |= IOACCEL1_CONTROL_DATA_OUT; 4761 break; 4762 case DMA_FROM_DEVICE: 4763 control |= IOACCEL1_CONTROL_DATA_IN; 4764 break; 4765 case DMA_NONE: 4766 control |= IOACCEL1_CONTROL_NODATAXFER; 4767 break; 4768 default: 4769 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4770 cmd->sc_data_direction); 4771 BUG(); 4772 break; 4773 } 4774 } else { 4775 control |= IOACCEL1_CONTROL_NODATAXFER; 4776 } 4777 4778 c->Header.SGList = use_sg; 4779 /* Fill out the command structure to submit */ 4780 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4781 cp->transfer_len = cpu_to_le32(total_len); 4782 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4783 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4784 cp->control = cpu_to_le32(control); 4785 memcpy(cp->CDB, cdb, cdb_len); 4786 memcpy(cp->CISS_LUN, scsi3addr, 8); 4787 /* Tag was already set at init time. */ 4788 enqueue_cmd_and_start_io(h, c); 4789 return 0; 4790 } 4791 4792 /* 4793 * Queue a command directly to a device behind the controller using the 4794 * I/O accelerator path. 4795 */ 4796 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4797 struct CommandList *c) 4798 { 4799 struct scsi_cmnd *cmd = c->scsi_cmd; 4800 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4801 4802 if (!dev) 4803 return -1; 4804 4805 c->phys_disk = dev; 4806 4807 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4808 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4809 } 4810 4811 /* 4812 * Set encryption parameters for the ioaccel2 request 4813 */ 4814 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4815 struct CommandList *c, struct io_accel2_cmd *cp) 4816 { 4817 struct scsi_cmnd *cmd = c->scsi_cmd; 4818 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4819 struct raid_map_data *map = &dev->raid_map; 4820 u64 first_block; 4821 4822 /* Are we doing encryption on this device */ 4823 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4824 return; 4825 /* Set the data encryption key index. */ 4826 cp->dekindex = map->dekindex; 4827 4828 /* Set the encryption enable flag, encoded into direction field. */ 4829 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4830 4831 /* Set encryption tweak values based on logical block address 4832 * If block size is 512, tweak value is LBA. 4833 * For other block sizes, tweak is (LBA * block size)/ 512) 4834 */ 4835 switch (cmd->cmnd[0]) { 4836 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4837 case READ_6: 4838 case WRITE_6: 4839 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4840 (cmd->cmnd[2] << 8) | 4841 cmd->cmnd[3]); 4842 break; 4843 case WRITE_10: 4844 case READ_10: 4845 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4846 case WRITE_12: 4847 case READ_12: 4848 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4849 break; 4850 case WRITE_16: 4851 case READ_16: 4852 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4853 break; 4854 default: 4855 dev_err(&h->pdev->dev, 4856 "ERROR: %s: size (0x%x) not supported for encryption\n", 4857 __func__, cmd->cmnd[0]); 4858 BUG(); 4859 break; 4860 } 4861 4862 if (le32_to_cpu(map->volume_blk_size) != 512) 4863 first_block = first_block * 4864 le32_to_cpu(map->volume_blk_size)/512; 4865 4866 cp->tweak_lower = cpu_to_le32(first_block); 4867 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4868 } 4869 4870 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4871 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4872 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4873 { 4874 struct scsi_cmnd *cmd = c->scsi_cmd; 4875 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4876 struct ioaccel2_sg_element *curr_sg; 4877 int use_sg, i; 4878 struct scatterlist *sg; 4879 u64 addr64; 4880 u32 len; 4881 u32 total_len = 0; 4882 4883 if (!cmd->device) 4884 return -1; 4885 4886 if (!cmd->device->hostdata) 4887 return -1; 4888 4889 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4890 4891 if (is_zero_length_transfer(cdb)) { 4892 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4893 atomic_dec(&phys_disk->ioaccel_cmds_out); 4894 return IO_ACCEL_INELIGIBLE; 4895 } 4896 4897 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4898 atomic_dec(&phys_disk->ioaccel_cmds_out); 4899 return IO_ACCEL_INELIGIBLE; 4900 } 4901 4902 c->cmd_type = CMD_IOACCEL2; 4903 /* Adjust the DMA address to point to the accelerated command buffer */ 4904 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4905 (c->cmdindex * sizeof(*cp)); 4906 BUG_ON(c->busaddr & 0x0000007F); 4907 4908 memset(cp, 0, sizeof(*cp)); 4909 cp->IU_type = IOACCEL2_IU_TYPE; 4910 4911 use_sg = scsi_dma_map(cmd); 4912 if (use_sg < 0) { 4913 atomic_dec(&phys_disk->ioaccel_cmds_out); 4914 return use_sg; 4915 } 4916 4917 if (use_sg) { 4918 curr_sg = cp->sg; 4919 if (use_sg > h->ioaccel_maxsg) { 4920 addr64 = le64_to_cpu( 4921 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4922 curr_sg->address = cpu_to_le64(addr64); 4923 curr_sg->length = 0; 4924 curr_sg->reserved[0] = 0; 4925 curr_sg->reserved[1] = 0; 4926 curr_sg->reserved[2] = 0; 4927 curr_sg->chain_indicator = 0x80; 4928 4929 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4930 } 4931 scsi_for_each_sg(cmd, sg, use_sg, i) { 4932 addr64 = (u64) sg_dma_address(sg); 4933 len = sg_dma_len(sg); 4934 total_len += len; 4935 curr_sg->address = cpu_to_le64(addr64); 4936 curr_sg->length = cpu_to_le32(len); 4937 curr_sg->reserved[0] = 0; 4938 curr_sg->reserved[1] = 0; 4939 curr_sg->reserved[2] = 0; 4940 curr_sg->chain_indicator = 0; 4941 curr_sg++; 4942 } 4943 4944 switch (cmd->sc_data_direction) { 4945 case DMA_TO_DEVICE: 4946 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4947 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4948 break; 4949 case DMA_FROM_DEVICE: 4950 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4951 cp->direction |= IOACCEL2_DIR_DATA_IN; 4952 break; 4953 case DMA_NONE: 4954 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4955 cp->direction |= IOACCEL2_DIR_NO_DATA; 4956 break; 4957 default: 4958 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4959 cmd->sc_data_direction); 4960 BUG(); 4961 break; 4962 } 4963 } else { 4964 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4965 cp->direction |= IOACCEL2_DIR_NO_DATA; 4966 } 4967 4968 /* Set encryption parameters, if necessary */ 4969 set_encrypt_ioaccel2(h, c, cp); 4970 4971 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4972 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4973 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4974 4975 cp->data_len = cpu_to_le32(total_len); 4976 cp->err_ptr = cpu_to_le64(c->busaddr + 4977 offsetof(struct io_accel2_cmd, error_data)); 4978 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4979 4980 /* fill in sg elements */ 4981 if (use_sg > h->ioaccel_maxsg) { 4982 cp->sg_count = 1; 4983 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4984 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4985 atomic_dec(&phys_disk->ioaccel_cmds_out); 4986 scsi_dma_unmap(cmd); 4987 return -1; 4988 } 4989 } else 4990 cp->sg_count = (u8) use_sg; 4991 4992 enqueue_cmd_and_start_io(h, c); 4993 return 0; 4994 } 4995 4996 /* 4997 * Queue a command to the correct I/O accelerator path. 4998 */ 4999 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5000 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5001 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5002 { 5003 if (!c->scsi_cmd->device) 5004 return -1; 5005 5006 if (!c->scsi_cmd->device->hostdata) 5007 return -1; 5008 5009 /* Try to honor the device's queue depth */ 5010 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5011 phys_disk->queue_depth) { 5012 atomic_dec(&phys_disk->ioaccel_cmds_out); 5013 return IO_ACCEL_INELIGIBLE; 5014 } 5015 if (h->transMethod & CFGTBL_Trans_io_accel1) 5016 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5017 cdb, cdb_len, scsi3addr, 5018 phys_disk); 5019 else 5020 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5021 cdb, cdb_len, scsi3addr, 5022 phys_disk); 5023 } 5024 5025 static void raid_map_helper(struct raid_map_data *map, 5026 int offload_to_mirror, u32 *map_index, u32 *current_group) 5027 { 5028 if (offload_to_mirror == 0) { 5029 /* use physical disk in the first mirrored group. */ 5030 *map_index %= le16_to_cpu(map->data_disks_per_row); 5031 return; 5032 } 5033 do { 5034 /* determine mirror group that *map_index indicates */ 5035 *current_group = *map_index / 5036 le16_to_cpu(map->data_disks_per_row); 5037 if (offload_to_mirror == *current_group) 5038 continue; 5039 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5040 /* select map index from next group */ 5041 *map_index += le16_to_cpu(map->data_disks_per_row); 5042 (*current_group)++; 5043 } else { 5044 /* select map index from first group */ 5045 *map_index %= le16_to_cpu(map->data_disks_per_row); 5046 *current_group = 0; 5047 } 5048 } while (offload_to_mirror != *current_group); 5049 } 5050 5051 /* 5052 * Attempt to perform offload RAID mapping for a logical volume I/O. 5053 */ 5054 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5055 struct CommandList *c) 5056 { 5057 struct scsi_cmnd *cmd = c->scsi_cmd; 5058 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5059 struct raid_map_data *map = &dev->raid_map; 5060 struct raid_map_disk_data *dd = &map->data[0]; 5061 int is_write = 0; 5062 u32 map_index; 5063 u64 first_block, last_block; 5064 u32 block_cnt; 5065 u32 blocks_per_row; 5066 u64 first_row, last_row; 5067 u32 first_row_offset, last_row_offset; 5068 u32 first_column, last_column; 5069 u64 r0_first_row, r0_last_row; 5070 u32 r5or6_blocks_per_row; 5071 u64 r5or6_first_row, r5or6_last_row; 5072 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5073 u32 r5or6_first_column, r5or6_last_column; 5074 u32 total_disks_per_row; 5075 u32 stripesize; 5076 u32 first_group, last_group, current_group; 5077 u32 map_row; 5078 u32 disk_handle; 5079 u64 disk_block; 5080 u32 disk_block_cnt; 5081 u8 cdb[16]; 5082 u8 cdb_len; 5083 u16 strip_size; 5084 #if BITS_PER_LONG == 32 5085 u64 tmpdiv; 5086 #endif 5087 int offload_to_mirror; 5088 5089 if (!dev) 5090 return -1; 5091 5092 /* check for valid opcode, get LBA and block count */ 5093 switch (cmd->cmnd[0]) { 5094 case WRITE_6: 5095 is_write = 1; 5096 case READ_6: 5097 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5098 (cmd->cmnd[2] << 8) | 5099 cmd->cmnd[3]); 5100 block_cnt = cmd->cmnd[4]; 5101 if (block_cnt == 0) 5102 block_cnt = 256; 5103 break; 5104 case WRITE_10: 5105 is_write = 1; 5106 case READ_10: 5107 first_block = 5108 (((u64) cmd->cmnd[2]) << 24) | 5109 (((u64) cmd->cmnd[3]) << 16) | 5110 (((u64) cmd->cmnd[4]) << 8) | 5111 cmd->cmnd[5]; 5112 block_cnt = 5113 (((u32) cmd->cmnd[7]) << 8) | 5114 cmd->cmnd[8]; 5115 break; 5116 case WRITE_12: 5117 is_write = 1; 5118 case READ_12: 5119 first_block = 5120 (((u64) cmd->cmnd[2]) << 24) | 5121 (((u64) cmd->cmnd[3]) << 16) | 5122 (((u64) cmd->cmnd[4]) << 8) | 5123 cmd->cmnd[5]; 5124 block_cnt = 5125 (((u32) cmd->cmnd[6]) << 24) | 5126 (((u32) cmd->cmnd[7]) << 16) | 5127 (((u32) cmd->cmnd[8]) << 8) | 5128 cmd->cmnd[9]; 5129 break; 5130 case WRITE_16: 5131 is_write = 1; 5132 case READ_16: 5133 first_block = 5134 (((u64) cmd->cmnd[2]) << 56) | 5135 (((u64) cmd->cmnd[3]) << 48) | 5136 (((u64) cmd->cmnd[4]) << 40) | 5137 (((u64) cmd->cmnd[5]) << 32) | 5138 (((u64) cmd->cmnd[6]) << 24) | 5139 (((u64) cmd->cmnd[7]) << 16) | 5140 (((u64) cmd->cmnd[8]) << 8) | 5141 cmd->cmnd[9]; 5142 block_cnt = 5143 (((u32) cmd->cmnd[10]) << 24) | 5144 (((u32) cmd->cmnd[11]) << 16) | 5145 (((u32) cmd->cmnd[12]) << 8) | 5146 cmd->cmnd[13]; 5147 break; 5148 default: 5149 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5150 } 5151 last_block = first_block + block_cnt - 1; 5152 5153 /* check for write to non-RAID-0 */ 5154 if (is_write && dev->raid_level != 0) 5155 return IO_ACCEL_INELIGIBLE; 5156 5157 /* check for invalid block or wraparound */ 5158 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5159 last_block < first_block) 5160 return IO_ACCEL_INELIGIBLE; 5161 5162 /* calculate stripe information for the request */ 5163 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5164 le16_to_cpu(map->strip_size); 5165 strip_size = le16_to_cpu(map->strip_size); 5166 #if BITS_PER_LONG == 32 5167 tmpdiv = first_block; 5168 (void) do_div(tmpdiv, blocks_per_row); 5169 first_row = tmpdiv; 5170 tmpdiv = last_block; 5171 (void) do_div(tmpdiv, blocks_per_row); 5172 last_row = tmpdiv; 5173 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5174 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5175 tmpdiv = first_row_offset; 5176 (void) do_div(tmpdiv, strip_size); 5177 first_column = tmpdiv; 5178 tmpdiv = last_row_offset; 5179 (void) do_div(tmpdiv, strip_size); 5180 last_column = tmpdiv; 5181 #else 5182 first_row = first_block / blocks_per_row; 5183 last_row = last_block / blocks_per_row; 5184 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5185 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5186 first_column = first_row_offset / strip_size; 5187 last_column = last_row_offset / strip_size; 5188 #endif 5189 5190 /* if this isn't a single row/column then give to the controller */ 5191 if ((first_row != last_row) || (first_column != last_column)) 5192 return IO_ACCEL_INELIGIBLE; 5193 5194 /* proceeding with driver mapping */ 5195 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5196 le16_to_cpu(map->metadata_disks_per_row); 5197 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5198 le16_to_cpu(map->row_cnt); 5199 map_index = (map_row * total_disks_per_row) + first_column; 5200 5201 switch (dev->raid_level) { 5202 case HPSA_RAID_0: 5203 break; /* nothing special to do */ 5204 case HPSA_RAID_1: 5205 /* Handles load balance across RAID 1 members. 5206 * (2-drive R1 and R10 with even # of drives.) 5207 * Appropriate for SSDs, not optimal for HDDs 5208 */ 5209 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5210 if (dev->offload_to_mirror) 5211 map_index += le16_to_cpu(map->data_disks_per_row); 5212 dev->offload_to_mirror = !dev->offload_to_mirror; 5213 break; 5214 case HPSA_RAID_ADM: 5215 /* Handles N-way mirrors (R1-ADM) 5216 * and R10 with # of drives divisible by 3.) 5217 */ 5218 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5219 5220 offload_to_mirror = dev->offload_to_mirror; 5221 raid_map_helper(map, offload_to_mirror, 5222 &map_index, ¤t_group); 5223 /* set mirror group to use next time */ 5224 offload_to_mirror = 5225 (offload_to_mirror >= 5226 le16_to_cpu(map->layout_map_count) - 1) 5227 ? 0 : offload_to_mirror + 1; 5228 dev->offload_to_mirror = offload_to_mirror; 5229 /* Avoid direct use of dev->offload_to_mirror within this 5230 * function since multiple threads might simultaneously 5231 * increment it beyond the range of dev->layout_map_count -1. 5232 */ 5233 break; 5234 case HPSA_RAID_5: 5235 case HPSA_RAID_6: 5236 if (le16_to_cpu(map->layout_map_count) <= 1) 5237 break; 5238 5239 /* Verify first and last block are in same RAID group */ 5240 r5or6_blocks_per_row = 5241 le16_to_cpu(map->strip_size) * 5242 le16_to_cpu(map->data_disks_per_row); 5243 BUG_ON(r5or6_blocks_per_row == 0); 5244 stripesize = r5or6_blocks_per_row * 5245 le16_to_cpu(map->layout_map_count); 5246 #if BITS_PER_LONG == 32 5247 tmpdiv = first_block; 5248 first_group = do_div(tmpdiv, stripesize); 5249 tmpdiv = first_group; 5250 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5251 first_group = tmpdiv; 5252 tmpdiv = last_block; 5253 last_group = do_div(tmpdiv, stripesize); 5254 tmpdiv = last_group; 5255 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5256 last_group = tmpdiv; 5257 #else 5258 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5259 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5260 #endif 5261 if (first_group != last_group) 5262 return IO_ACCEL_INELIGIBLE; 5263 5264 /* Verify request is in a single row of RAID 5/6 */ 5265 #if BITS_PER_LONG == 32 5266 tmpdiv = first_block; 5267 (void) do_div(tmpdiv, stripesize); 5268 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5269 tmpdiv = last_block; 5270 (void) do_div(tmpdiv, stripesize); 5271 r5or6_last_row = r0_last_row = tmpdiv; 5272 #else 5273 first_row = r5or6_first_row = r0_first_row = 5274 first_block / stripesize; 5275 r5or6_last_row = r0_last_row = last_block / stripesize; 5276 #endif 5277 if (r5or6_first_row != r5or6_last_row) 5278 return IO_ACCEL_INELIGIBLE; 5279 5280 5281 /* Verify request is in a single column */ 5282 #if BITS_PER_LONG == 32 5283 tmpdiv = first_block; 5284 first_row_offset = do_div(tmpdiv, stripesize); 5285 tmpdiv = first_row_offset; 5286 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5287 r5or6_first_row_offset = first_row_offset; 5288 tmpdiv = last_block; 5289 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5290 tmpdiv = r5or6_last_row_offset; 5291 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5292 tmpdiv = r5or6_first_row_offset; 5293 (void) do_div(tmpdiv, map->strip_size); 5294 first_column = r5or6_first_column = tmpdiv; 5295 tmpdiv = r5or6_last_row_offset; 5296 (void) do_div(tmpdiv, map->strip_size); 5297 r5or6_last_column = tmpdiv; 5298 #else 5299 first_row_offset = r5or6_first_row_offset = 5300 (u32)((first_block % stripesize) % 5301 r5or6_blocks_per_row); 5302 5303 r5or6_last_row_offset = 5304 (u32)((last_block % stripesize) % 5305 r5or6_blocks_per_row); 5306 5307 first_column = r5or6_first_column = 5308 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5309 r5or6_last_column = 5310 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5311 #endif 5312 if (r5or6_first_column != r5or6_last_column) 5313 return IO_ACCEL_INELIGIBLE; 5314 5315 /* Request is eligible */ 5316 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5317 le16_to_cpu(map->row_cnt); 5318 5319 map_index = (first_group * 5320 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5321 (map_row * total_disks_per_row) + first_column; 5322 break; 5323 default: 5324 return IO_ACCEL_INELIGIBLE; 5325 } 5326 5327 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5328 return IO_ACCEL_INELIGIBLE; 5329 5330 c->phys_disk = dev->phys_disk[map_index]; 5331 if (!c->phys_disk) 5332 return IO_ACCEL_INELIGIBLE; 5333 5334 disk_handle = dd[map_index].ioaccel_handle; 5335 disk_block = le64_to_cpu(map->disk_starting_blk) + 5336 first_row * le16_to_cpu(map->strip_size) + 5337 (first_row_offset - first_column * 5338 le16_to_cpu(map->strip_size)); 5339 disk_block_cnt = block_cnt; 5340 5341 /* handle differing logical/physical block sizes */ 5342 if (map->phys_blk_shift) { 5343 disk_block <<= map->phys_blk_shift; 5344 disk_block_cnt <<= map->phys_blk_shift; 5345 } 5346 BUG_ON(disk_block_cnt > 0xffff); 5347 5348 /* build the new CDB for the physical disk I/O */ 5349 if (disk_block > 0xffffffff) { 5350 cdb[0] = is_write ? WRITE_16 : READ_16; 5351 cdb[1] = 0; 5352 cdb[2] = (u8) (disk_block >> 56); 5353 cdb[3] = (u8) (disk_block >> 48); 5354 cdb[4] = (u8) (disk_block >> 40); 5355 cdb[5] = (u8) (disk_block >> 32); 5356 cdb[6] = (u8) (disk_block >> 24); 5357 cdb[7] = (u8) (disk_block >> 16); 5358 cdb[8] = (u8) (disk_block >> 8); 5359 cdb[9] = (u8) (disk_block); 5360 cdb[10] = (u8) (disk_block_cnt >> 24); 5361 cdb[11] = (u8) (disk_block_cnt >> 16); 5362 cdb[12] = (u8) (disk_block_cnt >> 8); 5363 cdb[13] = (u8) (disk_block_cnt); 5364 cdb[14] = 0; 5365 cdb[15] = 0; 5366 cdb_len = 16; 5367 } else { 5368 cdb[0] = is_write ? WRITE_10 : READ_10; 5369 cdb[1] = 0; 5370 cdb[2] = (u8) (disk_block >> 24); 5371 cdb[3] = (u8) (disk_block >> 16); 5372 cdb[4] = (u8) (disk_block >> 8); 5373 cdb[5] = (u8) (disk_block); 5374 cdb[6] = 0; 5375 cdb[7] = (u8) (disk_block_cnt >> 8); 5376 cdb[8] = (u8) (disk_block_cnt); 5377 cdb[9] = 0; 5378 cdb_len = 10; 5379 } 5380 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5381 dev->scsi3addr, 5382 dev->phys_disk[map_index]); 5383 } 5384 5385 /* 5386 * Submit commands down the "normal" RAID stack path 5387 * All callers to hpsa_ciss_submit must check lockup_detected 5388 * beforehand, before (opt.) and after calling cmd_alloc 5389 */ 5390 static int hpsa_ciss_submit(struct ctlr_info *h, 5391 struct CommandList *c, struct scsi_cmnd *cmd, 5392 unsigned char scsi3addr[]) 5393 { 5394 cmd->host_scribble = (unsigned char *) c; 5395 c->cmd_type = CMD_SCSI; 5396 c->scsi_cmd = cmd; 5397 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5398 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5399 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5400 5401 /* Fill in the request block... */ 5402 5403 c->Request.Timeout = 0; 5404 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5405 c->Request.CDBLen = cmd->cmd_len; 5406 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5407 switch (cmd->sc_data_direction) { 5408 case DMA_TO_DEVICE: 5409 c->Request.type_attr_dir = 5410 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5411 break; 5412 case DMA_FROM_DEVICE: 5413 c->Request.type_attr_dir = 5414 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5415 break; 5416 case DMA_NONE: 5417 c->Request.type_attr_dir = 5418 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5419 break; 5420 case DMA_BIDIRECTIONAL: 5421 /* This can happen if a buggy application does a scsi passthru 5422 * and sets both inlen and outlen to non-zero. ( see 5423 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5424 */ 5425 5426 c->Request.type_attr_dir = 5427 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5428 /* This is technically wrong, and hpsa controllers should 5429 * reject it with CMD_INVALID, which is the most correct 5430 * response, but non-fibre backends appear to let it 5431 * slide by, and give the same results as if this field 5432 * were set correctly. Either way is acceptable for 5433 * our purposes here. 5434 */ 5435 5436 break; 5437 5438 default: 5439 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5440 cmd->sc_data_direction); 5441 BUG(); 5442 break; 5443 } 5444 5445 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5446 hpsa_cmd_resolve_and_free(h, c); 5447 return SCSI_MLQUEUE_HOST_BUSY; 5448 } 5449 enqueue_cmd_and_start_io(h, c); 5450 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5451 return 0; 5452 } 5453 5454 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5455 struct CommandList *c) 5456 { 5457 dma_addr_t cmd_dma_handle, err_dma_handle; 5458 5459 /* Zero out all of commandlist except the last field, refcount */ 5460 memset(c, 0, offsetof(struct CommandList, refcount)); 5461 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5462 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5463 c->err_info = h->errinfo_pool + index; 5464 memset(c->err_info, 0, sizeof(*c->err_info)); 5465 err_dma_handle = h->errinfo_pool_dhandle 5466 + index * sizeof(*c->err_info); 5467 c->cmdindex = index; 5468 c->busaddr = (u32) cmd_dma_handle; 5469 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5470 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5471 c->h = h; 5472 c->scsi_cmd = SCSI_CMD_IDLE; 5473 } 5474 5475 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5476 { 5477 int i; 5478 5479 for (i = 0; i < h->nr_cmds; i++) { 5480 struct CommandList *c = h->cmd_pool + i; 5481 5482 hpsa_cmd_init(h, i, c); 5483 atomic_set(&c->refcount, 0); 5484 } 5485 } 5486 5487 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5488 struct CommandList *c) 5489 { 5490 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5491 5492 BUG_ON(c->cmdindex != index); 5493 5494 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5495 memset(c->err_info, 0, sizeof(*c->err_info)); 5496 c->busaddr = (u32) cmd_dma_handle; 5497 } 5498 5499 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5500 struct CommandList *c, struct scsi_cmnd *cmd, 5501 unsigned char *scsi3addr) 5502 { 5503 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5504 int rc = IO_ACCEL_INELIGIBLE; 5505 5506 if (!dev) 5507 return SCSI_MLQUEUE_HOST_BUSY; 5508 5509 cmd->host_scribble = (unsigned char *) c; 5510 5511 if (dev->offload_enabled) { 5512 hpsa_cmd_init(h, c->cmdindex, c); 5513 c->cmd_type = CMD_SCSI; 5514 c->scsi_cmd = cmd; 5515 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5516 if (rc < 0) /* scsi_dma_map failed. */ 5517 rc = SCSI_MLQUEUE_HOST_BUSY; 5518 } else if (dev->hba_ioaccel_enabled) { 5519 hpsa_cmd_init(h, c->cmdindex, c); 5520 c->cmd_type = CMD_SCSI; 5521 c->scsi_cmd = cmd; 5522 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5523 if (rc < 0) /* scsi_dma_map failed. */ 5524 rc = SCSI_MLQUEUE_HOST_BUSY; 5525 } 5526 return rc; 5527 } 5528 5529 static void hpsa_command_resubmit_worker(struct work_struct *work) 5530 { 5531 struct scsi_cmnd *cmd; 5532 struct hpsa_scsi_dev_t *dev; 5533 struct CommandList *c = container_of(work, struct CommandList, work); 5534 5535 cmd = c->scsi_cmd; 5536 dev = cmd->device->hostdata; 5537 if (!dev) { 5538 cmd->result = DID_NO_CONNECT << 16; 5539 return hpsa_cmd_free_and_done(c->h, c, cmd); 5540 } 5541 if (c->reset_pending) 5542 return hpsa_cmd_free_and_done(c->h, c, cmd); 5543 if (c->cmd_type == CMD_IOACCEL2) { 5544 struct ctlr_info *h = c->h; 5545 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5546 int rc; 5547 5548 if (c2->error_data.serv_response == 5549 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5550 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5551 if (rc == 0) 5552 return; 5553 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5554 /* 5555 * If we get here, it means dma mapping failed. 5556 * Try again via scsi mid layer, which will 5557 * then get SCSI_MLQUEUE_HOST_BUSY. 5558 */ 5559 cmd->result = DID_IMM_RETRY << 16; 5560 return hpsa_cmd_free_and_done(h, c, cmd); 5561 } 5562 /* else, fall thru and resubmit down CISS path */ 5563 } 5564 } 5565 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5566 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5567 /* 5568 * If we get here, it means dma mapping failed. Try 5569 * again via scsi mid layer, which will then get 5570 * SCSI_MLQUEUE_HOST_BUSY. 5571 * 5572 * hpsa_ciss_submit will have already freed c 5573 * if it encountered a dma mapping failure. 5574 */ 5575 cmd->result = DID_IMM_RETRY << 16; 5576 cmd->scsi_done(cmd); 5577 } 5578 } 5579 5580 /* Running in struct Scsi_Host->host_lock less mode */ 5581 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5582 { 5583 struct ctlr_info *h; 5584 struct hpsa_scsi_dev_t *dev; 5585 unsigned char scsi3addr[8]; 5586 struct CommandList *c; 5587 int rc = 0; 5588 5589 /* Get the ptr to our adapter structure out of cmd->host. */ 5590 h = sdev_to_hba(cmd->device); 5591 5592 BUG_ON(cmd->request->tag < 0); 5593 5594 dev = cmd->device->hostdata; 5595 if (!dev) { 5596 cmd->result = DID_NO_CONNECT << 16; 5597 cmd->scsi_done(cmd); 5598 return 0; 5599 } 5600 5601 if (dev->removed) { 5602 cmd->result = DID_NO_CONNECT << 16; 5603 cmd->scsi_done(cmd); 5604 return 0; 5605 } 5606 5607 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5608 5609 if (unlikely(lockup_detected(h))) { 5610 cmd->result = DID_NO_CONNECT << 16; 5611 cmd->scsi_done(cmd); 5612 return 0; 5613 } 5614 c = cmd_tagged_alloc(h, cmd); 5615 5616 /* 5617 * Call alternate submit routine for I/O accelerated commands. 5618 * Retries always go down the normal I/O path. 5619 */ 5620 if (likely(cmd->retries == 0 && 5621 !blk_rq_is_passthrough(cmd->request) && 5622 h->acciopath_status)) { 5623 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5624 if (rc == 0) 5625 return 0; 5626 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5627 hpsa_cmd_resolve_and_free(h, c); 5628 return SCSI_MLQUEUE_HOST_BUSY; 5629 } 5630 } 5631 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5632 } 5633 5634 static void hpsa_scan_complete(struct ctlr_info *h) 5635 { 5636 unsigned long flags; 5637 5638 spin_lock_irqsave(&h->scan_lock, flags); 5639 h->scan_finished = 1; 5640 wake_up(&h->scan_wait_queue); 5641 spin_unlock_irqrestore(&h->scan_lock, flags); 5642 } 5643 5644 static void hpsa_scan_start(struct Scsi_Host *sh) 5645 { 5646 struct ctlr_info *h = shost_to_hba(sh); 5647 unsigned long flags; 5648 5649 /* 5650 * Don't let rescans be initiated on a controller known to be locked 5651 * up. If the controller locks up *during* a rescan, that thread is 5652 * probably hosed, but at least we can prevent new rescan threads from 5653 * piling up on a locked up controller. 5654 */ 5655 if (unlikely(lockup_detected(h))) 5656 return hpsa_scan_complete(h); 5657 5658 /* 5659 * If a scan is already waiting to run, no need to add another 5660 */ 5661 spin_lock_irqsave(&h->scan_lock, flags); 5662 if (h->scan_waiting) { 5663 spin_unlock_irqrestore(&h->scan_lock, flags); 5664 return; 5665 } 5666 5667 spin_unlock_irqrestore(&h->scan_lock, flags); 5668 5669 /* wait until any scan already in progress is finished. */ 5670 while (1) { 5671 spin_lock_irqsave(&h->scan_lock, flags); 5672 if (h->scan_finished) 5673 break; 5674 h->scan_waiting = 1; 5675 spin_unlock_irqrestore(&h->scan_lock, flags); 5676 wait_event(h->scan_wait_queue, h->scan_finished); 5677 /* Note: We don't need to worry about a race between this 5678 * thread and driver unload because the midlayer will 5679 * have incremented the reference count, so unload won't 5680 * happen if we're in here. 5681 */ 5682 } 5683 h->scan_finished = 0; /* mark scan as in progress */ 5684 h->scan_waiting = 0; 5685 spin_unlock_irqrestore(&h->scan_lock, flags); 5686 5687 if (unlikely(lockup_detected(h))) 5688 return hpsa_scan_complete(h); 5689 5690 /* 5691 * Do the scan after a reset completion 5692 */ 5693 spin_lock_irqsave(&h->reset_lock, flags); 5694 if (h->reset_in_progress) { 5695 h->drv_req_rescan = 1; 5696 spin_unlock_irqrestore(&h->reset_lock, flags); 5697 hpsa_scan_complete(h); 5698 return; 5699 } 5700 spin_unlock_irqrestore(&h->reset_lock, flags); 5701 5702 hpsa_update_scsi_devices(h); 5703 5704 hpsa_scan_complete(h); 5705 } 5706 5707 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5708 { 5709 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5710 5711 if (!logical_drive) 5712 return -ENODEV; 5713 5714 if (qdepth < 1) 5715 qdepth = 1; 5716 else if (qdepth > logical_drive->queue_depth) 5717 qdepth = logical_drive->queue_depth; 5718 5719 return scsi_change_queue_depth(sdev, qdepth); 5720 } 5721 5722 static int hpsa_scan_finished(struct Scsi_Host *sh, 5723 unsigned long elapsed_time) 5724 { 5725 struct ctlr_info *h = shost_to_hba(sh); 5726 unsigned long flags; 5727 int finished; 5728 5729 spin_lock_irqsave(&h->scan_lock, flags); 5730 finished = h->scan_finished; 5731 spin_unlock_irqrestore(&h->scan_lock, flags); 5732 return finished; 5733 } 5734 5735 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5736 { 5737 struct Scsi_Host *sh; 5738 5739 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5740 if (sh == NULL) { 5741 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5742 return -ENOMEM; 5743 } 5744 5745 sh->io_port = 0; 5746 sh->n_io_port = 0; 5747 sh->this_id = -1; 5748 sh->max_channel = 3; 5749 sh->max_cmd_len = MAX_COMMAND_SIZE; 5750 sh->max_lun = HPSA_MAX_LUN; 5751 sh->max_id = HPSA_MAX_LUN; 5752 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5753 sh->cmd_per_lun = sh->can_queue; 5754 sh->sg_tablesize = h->maxsgentries; 5755 sh->transportt = hpsa_sas_transport_template; 5756 sh->hostdata[0] = (unsigned long) h; 5757 sh->irq = pci_irq_vector(h->pdev, 0); 5758 sh->unique_id = sh->irq; 5759 5760 h->scsi_host = sh; 5761 return 0; 5762 } 5763 5764 static int hpsa_scsi_add_host(struct ctlr_info *h) 5765 { 5766 int rv; 5767 5768 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5769 if (rv) { 5770 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5771 return rv; 5772 } 5773 scsi_scan_host(h->scsi_host); 5774 return 0; 5775 } 5776 5777 /* 5778 * The block layer has already gone to the trouble of picking out a unique, 5779 * small-integer tag for this request. We use an offset from that value as 5780 * an index to select our command block. (The offset allows us to reserve the 5781 * low-numbered entries for our own uses.) 5782 */ 5783 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5784 { 5785 int idx = scmd->request->tag; 5786 5787 if (idx < 0) 5788 return idx; 5789 5790 /* Offset to leave space for internal cmds. */ 5791 return idx += HPSA_NRESERVED_CMDS; 5792 } 5793 5794 /* 5795 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5796 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5797 */ 5798 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5799 struct CommandList *c, unsigned char lunaddr[], 5800 int reply_queue) 5801 { 5802 int rc; 5803 5804 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5805 (void) fill_cmd(c, TEST_UNIT_READY, h, 5806 NULL, 0, 0, lunaddr, TYPE_CMD); 5807 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5808 if (rc) 5809 return rc; 5810 /* no unmap needed here because no data xfer. */ 5811 5812 /* Check if the unit is already ready. */ 5813 if (c->err_info->CommandStatus == CMD_SUCCESS) 5814 return 0; 5815 5816 /* 5817 * The first command sent after reset will receive "unit attention" to 5818 * indicate that the LUN has been reset...this is actually what we're 5819 * looking for (but, success is good too). 5820 */ 5821 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5822 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5823 (c->err_info->SenseInfo[2] == NO_SENSE || 5824 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5825 return 0; 5826 5827 return 1; 5828 } 5829 5830 /* 5831 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5832 * returns zero when the unit is ready, and non-zero when giving up. 5833 */ 5834 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5835 struct CommandList *c, 5836 unsigned char lunaddr[], int reply_queue) 5837 { 5838 int rc; 5839 int count = 0; 5840 int waittime = 1; /* seconds */ 5841 5842 /* Send test unit ready until device ready, or give up. */ 5843 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5844 5845 /* 5846 * Wait for a bit. do this first, because if we send 5847 * the TUR right away, the reset will just abort it. 5848 */ 5849 msleep(1000 * waittime); 5850 5851 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5852 if (!rc) 5853 break; 5854 5855 /* Increase wait time with each try, up to a point. */ 5856 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5857 waittime *= 2; 5858 5859 dev_warn(&h->pdev->dev, 5860 "waiting %d secs for device to become ready.\n", 5861 waittime); 5862 } 5863 5864 return rc; 5865 } 5866 5867 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5868 unsigned char lunaddr[], 5869 int reply_queue) 5870 { 5871 int first_queue; 5872 int last_queue; 5873 int rq; 5874 int rc = 0; 5875 struct CommandList *c; 5876 5877 c = cmd_alloc(h); 5878 5879 /* 5880 * If no specific reply queue was requested, then send the TUR 5881 * repeatedly, requesting a reply on each reply queue; otherwise execute 5882 * the loop exactly once using only the specified queue. 5883 */ 5884 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5885 first_queue = 0; 5886 last_queue = h->nreply_queues - 1; 5887 } else { 5888 first_queue = reply_queue; 5889 last_queue = reply_queue; 5890 } 5891 5892 for (rq = first_queue; rq <= last_queue; rq++) { 5893 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5894 if (rc) 5895 break; 5896 } 5897 5898 if (rc) 5899 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5900 else 5901 dev_warn(&h->pdev->dev, "device is ready.\n"); 5902 5903 cmd_free(h, c); 5904 return rc; 5905 } 5906 5907 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5908 * complaining. Doing a host- or bus-reset can't do anything good here. 5909 */ 5910 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5911 { 5912 int rc = SUCCESS; 5913 struct ctlr_info *h; 5914 struct hpsa_scsi_dev_t *dev; 5915 u8 reset_type; 5916 char msg[48]; 5917 unsigned long flags; 5918 5919 /* find the controller to which the command to be aborted was sent */ 5920 h = sdev_to_hba(scsicmd->device); 5921 if (h == NULL) /* paranoia */ 5922 return FAILED; 5923 5924 spin_lock_irqsave(&h->reset_lock, flags); 5925 h->reset_in_progress = 1; 5926 spin_unlock_irqrestore(&h->reset_lock, flags); 5927 5928 if (lockup_detected(h)) { 5929 rc = FAILED; 5930 goto return_reset_status; 5931 } 5932 5933 dev = scsicmd->device->hostdata; 5934 if (!dev) { 5935 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5936 rc = FAILED; 5937 goto return_reset_status; 5938 } 5939 5940 if (dev->devtype == TYPE_ENCLOSURE) { 5941 rc = SUCCESS; 5942 goto return_reset_status; 5943 } 5944 5945 /* if controller locked up, we can guarantee command won't complete */ 5946 if (lockup_detected(h)) { 5947 snprintf(msg, sizeof(msg), 5948 "cmd %d RESET FAILED, lockup detected", 5949 hpsa_get_cmd_index(scsicmd)); 5950 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5951 rc = FAILED; 5952 goto return_reset_status; 5953 } 5954 5955 /* this reset request might be the result of a lockup; check */ 5956 if (detect_controller_lockup(h)) { 5957 snprintf(msg, sizeof(msg), 5958 "cmd %d RESET FAILED, new lockup detected", 5959 hpsa_get_cmd_index(scsicmd)); 5960 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5961 rc = FAILED; 5962 goto return_reset_status; 5963 } 5964 5965 /* Do not attempt on controller */ 5966 if (is_hba_lunid(dev->scsi3addr)) { 5967 rc = SUCCESS; 5968 goto return_reset_status; 5969 } 5970 5971 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5972 reset_type = HPSA_DEVICE_RESET_MSG; 5973 else 5974 reset_type = HPSA_PHYS_TARGET_RESET; 5975 5976 sprintf(msg, "resetting %s", 5977 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5978 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5979 5980 /* send a reset to the SCSI LUN which the command was sent to */ 5981 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5982 DEFAULT_REPLY_QUEUE); 5983 if (rc == 0) 5984 rc = SUCCESS; 5985 else 5986 rc = FAILED; 5987 5988 sprintf(msg, "reset %s %s", 5989 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5990 rc == SUCCESS ? "completed successfully" : "failed"); 5991 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5992 5993 return_reset_status: 5994 spin_lock_irqsave(&h->reset_lock, flags); 5995 h->reset_in_progress = 0; 5996 spin_unlock_irqrestore(&h->reset_lock, flags); 5997 return rc; 5998 } 5999 6000 /* 6001 * For operations with an associated SCSI command, a command block is allocated 6002 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6003 * block request tag as an index into a table of entries. cmd_tagged_free() is 6004 * the complement, although cmd_free() may be called instead. 6005 */ 6006 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6007 struct scsi_cmnd *scmd) 6008 { 6009 int idx = hpsa_get_cmd_index(scmd); 6010 struct CommandList *c = h->cmd_pool + idx; 6011 6012 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6013 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6014 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6015 /* The index value comes from the block layer, so if it's out of 6016 * bounds, it's probably not our bug. 6017 */ 6018 BUG(); 6019 } 6020 6021 atomic_inc(&c->refcount); 6022 if (unlikely(!hpsa_is_cmd_idle(c))) { 6023 /* 6024 * We expect that the SCSI layer will hand us a unique tag 6025 * value. Thus, there should never be a collision here between 6026 * two requests...because if the selected command isn't idle 6027 * then someone is going to be very disappointed. 6028 */ 6029 dev_err(&h->pdev->dev, 6030 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6031 idx); 6032 if (c->scsi_cmd != NULL) 6033 scsi_print_command(c->scsi_cmd); 6034 scsi_print_command(scmd); 6035 } 6036 6037 hpsa_cmd_partial_init(h, idx, c); 6038 return c; 6039 } 6040 6041 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6042 { 6043 /* 6044 * Release our reference to the block. We don't need to do anything 6045 * else to free it, because it is accessed by index. 6046 */ 6047 (void)atomic_dec(&c->refcount); 6048 } 6049 6050 /* 6051 * For operations that cannot sleep, a command block is allocated at init, 6052 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6053 * which ones are free or in use. Lock must be held when calling this. 6054 * cmd_free() is the complement. 6055 * This function never gives up and returns NULL. If it hangs, 6056 * another thread must call cmd_free() to free some tags. 6057 */ 6058 6059 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6060 { 6061 struct CommandList *c; 6062 int refcount, i; 6063 int offset = 0; 6064 6065 /* 6066 * There is some *extremely* small but non-zero chance that that 6067 * multiple threads could get in here, and one thread could 6068 * be scanning through the list of bits looking for a free 6069 * one, but the free ones are always behind him, and other 6070 * threads sneak in behind him and eat them before he can 6071 * get to them, so that while there is always a free one, a 6072 * very unlucky thread might be starved anyway, never able to 6073 * beat the other threads. In reality, this happens so 6074 * infrequently as to be indistinguishable from never. 6075 * 6076 * Note that we start allocating commands before the SCSI host structure 6077 * is initialized. Since the search starts at bit zero, this 6078 * all works, since we have at least one command structure available; 6079 * however, it means that the structures with the low indexes have to be 6080 * reserved for driver-initiated requests, while requests from the block 6081 * layer will use the higher indexes. 6082 */ 6083 6084 for (;;) { 6085 i = find_next_zero_bit(h->cmd_pool_bits, 6086 HPSA_NRESERVED_CMDS, 6087 offset); 6088 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6089 offset = 0; 6090 continue; 6091 } 6092 c = h->cmd_pool + i; 6093 refcount = atomic_inc_return(&c->refcount); 6094 if (unlikely(refcount > 1)) { 6095 cmd_free(h, c); /* already in use */ 6096 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6097 continue; 6098 } 6099 set_bit(i & (BITS_PER_LONG - 1), 6100 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6101 break; /* it's ours now. */ 6102 } 6103 hpsa_cmd_partial_init(h, i, c); 6104 return c; 6105 } 6106 6107 /* 6108 * This is the complementary operation to cmd_alloc(). Note, however, in some 6109 * corner cases it may also be used to free blocks allocated by 6110 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6111 * the clear-bit is harmless. 6112 */ 6113 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6114 { 6115 if (atomic_dec_and_test(&c->refcount)) { 6116 int i; 6117 6118 i = c - h->cmd_pool; 6119 clear_bit(i & (BITS_PER_LONG - 1), 6120 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6121 } 6122 } 6123 6124 #ifdef CONFIG_COMPAT 6125 6126 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6127 void __user *arg) 6128 { 6129 IOCTL32_Command_struct __user *arg32 = 6130 (IOCTL32_Command_struct __user *) arg; 6131 IOCTL_Command_struct arg64; 6132 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6133 int err; 6134 u32 cp; 6135 6136 memset(&arg64, 0, sizeof(arg64)); 6137 err = 0; 6138 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6139 sizeof(arg64.LUN_info)); 6140 err |= copy_from_user(&arg64.Request, &arg32->Request, 6141 sizeof(arg64.Request)); 6142 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6143 sizeof(arg64.error_info)); 6144 err |= get_user(arg64.buf_size, &arg32->buf_size); 6145 err |= get_user(cp, &arg32->buf); 6146 arg64.buf = compat_ptr(cp); 6147 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6148 6149 if (err) 6150 return -EFAULT; 6151 6152 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6153 if (err) 6154 return err; 6155 err |= copy_in_user(&arg32->error_info, &p->error_info, 6156 sizeof(arg32->error_info)); 6157 if (err) 6158 return -EFAULT; 6159 return err; 6160 } 6161 6162 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6163 int cmd, void __user *arg) 6164 { 6165 BIG_IOCTL32_Command_struct __user *arg32 = 6166 (BIG_IOCTL32_Command_struct __user *) arg; 6167 BIG_IOCTL_Command_struct arg64; 6168 BIG_IOCTL_Command_struct __user *p = 6169 compat_alloc_user_space(sizeof(arg64)); 6170 int err; 6171 u32 cp; 6172 6173 memset(&arg64, 0, sizeof(arg64)); 6174 err = 0; 6175 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6176 sizeof(arg64.LUN_info)); 6177 err |= copy_from_user(&arg64.Request, &arg32->Request, 6178 sizeof(arg64.Request)); 6179 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6180 sizeof(arg64.error_info)); 6181 err |= get_user(arg64.buf_size, &arg32->buf_size); 6182 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6183 err |= get_user(cp, &arg32->buf); 6184 arg64.buf = compat_ptr(cp); 6185 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6186 6187 if (err) 6188 return -EFAULT; 6189 6190 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6191 if (err) 6192 return err; 6193 err |= copy_in_user(&arg32->error_info, &p->error_info, 6194 sizeof(arg32->error_info)); 6195 if (err) 6196 return -EFAULT; 6197 return err; 6198 } 6199 6200 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6201 { 6202 switch (cmd) { 6203 case CCISS_GETPCIINFO: 6204 case CCISS_GETINTINFO: 6205 case CCISS_SETINTINFO: 6206 case CCISS_GETNODENAME: 6207 case CCISS_SETNODENAME: 6208 case CCISS_GETHEARTBEAT: 6209 case CCISS_GETBUSTYPES: 6210 case CCISS_GETFIRMVER: 6211 case CCISS_GETDRIVVER: 6212 case CCISS_REVALIDVOLS: 6213 case CCISS_DEREGDISK: 6214 case CCISS_REGNEWDISK: 6215 case CCISS_REGNEWD: 6216 case CCISS_RESCANDISK: 6217 case CCISS_GETLUNINFO: 6218 return hpsa_ioctl(dev, cmd, arg); 6219 6220 case CCISS_PASSTHRU32: 6221 return hpsa_ioctl32_passthru(dev, cmd, arg); 6222 case CCISS_BIG_PASSTHRU32: 6223 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6224 6225 default: 6226 return -ENOIOCTLCMD; 6227 } 6228 } 6229 #endif 6230 6231 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6232 { 6233 struct hpsa_pci_info pciinfo; 6234 6235 if (!argp) 6236 return -EINVAL; 6237 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6238 pciinfo.bus = h->pdev->bus->number; 6239 pciinfo.dev_fn = h->pdev->devfn; 6240 pciinfo.board_id = h->board_id; 6241 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6242 return -EFAULT; 6243 return 0; 6244 } 6245 6246 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6247 { 6248 DriverVer_type DriverVer; 6249 unsigned char vmaj, vmin, vsubmin; 6250 int rc; 6251 6252 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6253 &vmaj, &vmin, &vsubmin); 6254 if (rc != 3) { 6255 dev_info(&h->pdev->dev, "driver version string '%s' " 6256 "unrecognized.", HPSA_DRIVER_VERSION); 6257 vmaj = 0; 6258 vmin = 0; 6259 vsubmin = 0; 6260 } 6261 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6262 if (!argp) 6263 return -EINVAL; 6264 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6265 return -EFAULT; 6266 return 0; 6267 } 6268 6269 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6270 { 6271 IOCTL_Command_struct iocommand; 6272 struct CommandList *c; 6273 char *buff = NULL; 6274 u64 temp64; 6275 int rc = 0; 6276 6277 if (!argp) 6278 return -EINVAL; 6279 if (!capable(CAP_SYS_RAWIO)) 6280 return -EPERM; 6281 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6282 return -EFAULT; 6283 if ((iocommand.buf_size < 1) && 6284 (iocommand.Request.Type.Direction != XFER_NONE)) { 6285 return -EINVAL; 6286 } 6287 if (iocommand.buf_size > 0) { 6288 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6289 if (buff == NULL) 6290 return -ENOMEM; 6291 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6292 /* Copy the data into the buffer we created */ 6293 if (copy_from_user(buff, iocommand.buf, 6294 iocommand.buf_size)) { 6295 rc = -EFAULT; 6296 goto out_kfree; 6297 } 6298 } else { 6299 memset(buff, 0, iocommand.buf_size); 6300 } 6301 } 6302 c = cmd_alloc(h); 6303 6304 /* Fill in the command type */ 6305 c->cmd_type = CMD_IOCTL_PEND; 6306 c->scsi_cmd = SCSI_CMD_BUSY; 6307 /* Fill in Command Header */ 6308 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6309 if (iocommand.buf_size > 0) { /* buffer to fill */ 6310 c->Header.SGList = 1; 6311 c->Header.SGTotal = cpu_to_le16(1); 6312 } else { /* no buffers to fill */ 6313 c->Header.SGList = 0; 6314 c->Header.SGTotal = cpu_to_le16(0); 6315 } 6316 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6317 6318 /* Fill in Request block */ 6319 memcpy(&c->Request, &iocommand.Request, 6320 sizeof(c->Request)); 6321 6322 /* Fill in the scatter gather information */ 6323 if (iocommand.buf_size > 0) { 6324 temp64 = dma_map_single(&h->pdev->dev, buff, 6325 iocommand.buf_size, DMA_BIDIRECTIONAL); 6326 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6327 c->SG[0].Addr = cpu_to_le64(0); 6328 c->SG[0].Len = cpu_to_le32(0); 6329 rc = -ENOMEM; 6330 goto out; 6331 } 6332 c->SG[0].Addr = cpu_to_le64(temp64); 6333 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6334 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6335 } 6336 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6337 NO_TIMEOUT); 6338 if (iocommand.buf_size > 0) 6339 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6340 check_ioctl_unit_attention(h, c); 6341 if (rc) { 6342 rc = -EIO; 6343 goto out; 6344 } 6345 6346 /* Copy the error information out */ 6347 memcpy(&iocommand.error_info, c->err_info, 6348 sizeof(iocommand.error_info)); 6349 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6350 rc = -EFAULT; 6351 goto out; 6352 } 6353 if ((iocommand.Request.Type.Direction & XFER_READ) && 6354 iocommand.buf_size > 0) { 6355 /* Copy the data out of the buffer we created */ 6356 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6357 rc = -EFAULT; 6358 goto out; 6359 } 6360 } 6361 out: 6362 cmd_free(h, c); 6363 out_kfree: 6364 kfree(buff); 6365 return rc; 6366 } 6367 6368 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6369 { 6370 BIG_IOCTL_Command_struct *ioc; 6371 struct CommandList *c; 6372 unsigned char **buff = NULL; 6373 int *buff_size = NULL; 6374 u64 temp64; 6375 BYTE sg_used = 0; 6376 int status = 0; 6377 u32 left; 6378 u32 sz; 6379 BYTE __user *data_ptr; 6380 6381 if (!argp) 6382 return -EINVAL; 6383 if (!capable(CAP_SYS_RAWIO)) 6384 return -EPERM; 6385 ioc = vmemdup_user(argp, sizeof(*ioc)); 6386 if (IS_ERR(ioc)) { 6387 status = PTR_ERR(ioc); 6388 goto cleanup1; 6389 } 6390 if ((ioc->buf_size < 1) && 6391 (ioc->Request.Type.Direction != XFER_NONE)) { 6392 status = -EINVAL; 6393 goto cleanup1; 6394 } 6395 /* Check kmalloc limits using all SGs */ 6396 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6397 status = -EINVAL; 6398 goto cleanup1; 6399 } 6400 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6401 status = -EINVAL; 6402 goto cleanup1; 6403 } 6404 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6405 if (!buff) { 6406 status = -ENOMEM; 6407 goto cleanup1; 6408 } 6409 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6410 if (!buff_size) { 6411 status = -ENOMEM; 6412 goto cleanup1; 6413 } 6414 left = ioc->buf_size; 6415 data_ptr = ioc->buf; 6416 while (left) { 6417 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6418 buff_size[sg_used] = sz; 6419 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6420 if (buff[sg_used] == NULL) { 6421 status = -ENOMEM; 6422 goto cleanup1; 6423 } 6424 if (ioc->Request.Type.Direction & XFER_WRITE) { 6425 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6426 status = -EFAULT; 6427 goto cleanup1; 6428 } 6429 } else 6430 memset(buff[sg_used], 0, sz); 6431 left -= sz; 6432 data_ptr += sz; 6433 sg_used++; 6434 } 6435 c = cmd_alloc(h); 6436 6437 c->cmd_type = CMD_IOCTL_PEND; 6438 c->scsi_cmd = SCSI_CMD_BUSY; 6439 c->Header.ReplyQueue = 0; 6440 c->Header.SGList = (u8) sg_used; 6441 c->Header.SGTotal = cpu_to_le16(sg_used); 6442 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6443 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6444 if (ioc->buf_size > 0) { 6445 int i; 6446 for (i = 0; i < sg_used; i++) { 6447 temp64 = dma_map_single(&h->pdev->dev, buff[i], 6448 buff_size[i], DMA_BIDIRECTIONAL); 6449 if (dma_mapping_error(&h->pdev->dev, 6450 (dma_addr_t) temp64)) { 6451 c->SG[i].Addr = cpu_to_le64(0); 6452 c->SG[i].Len = cpu_to_le32(0); 6453 hpsa_pci_unmap(h->pdev, c, i, 6454 DMA_BIDIRECTIONAL); 6455 status = -ENOMEM; 6456 goto cleanup0; 6457 } 6458 c->SG[i].Addr = cpu_to_le64(temp64); 6459 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6460 c->SG[i].Ext = cpu_to_le32(0); 6461 } 6462 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6463 } 6464 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6465 NO_TIMEOUT); 6466 if (sg_used) 6467 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6468 check_ioctl_unit_attention(h, c); 6469 if (status) { 6470 status = -EIO; 6471 goto cleanup0; 6472 } 6473 6474 /* Copy the error information out */ 6475 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6476 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6477 status = -EFAULT; 6478 goto cleanup0; 6479 } 6480 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6481 int i; 6482 6483 /* Copy the data out of the buffer we created */ 6484 BYTE __user *ptr = ioc->buf; 6485 for (i = 0; i < sg_used; i++) { 6486 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6487 status = -EFAULT; 6488 goto cleanup0; 6489 } 6490 ptr += buff_size[i]; 6491 } 6492 } 6493 status = 0; 6494 cleanup0: 6495 cmd_free(h, c); 6496 cleanup1: 6497 if (buff) { 6498 int i; 6499 6500 for (i = 0; i < sg_used; i++) 6501 kfree(buff[i]); 6502 kfree(buff); 6503 } 6504 kfree(buff_size); 6505 kvfree(ioc); 6506 return status; 6507 } 6508 6509 static void check_ioctl_unit_attention(struct ctlr_info *h, 6510 struct CommandList *c) 6511 { 6512 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6513 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6514 (void) check_for_unit_attention(h, c); 6515 } 6516 6517 /* 6518 * ioctl 6519 */ 6520 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6521 { 6522 struct ctlr_info *h; 6523 void __user *argp = (void __user *)arg; 6524 int rc; 6525 6526 h = sdev_to_hba(dev); 6527 6528 switch (cmd) { 6529 case CCISS_DEREGDISK: 6530 case CCISS_REGNEWDISK: 6531 case CCISS_REGNEWD: 6532 hpsa_scan_start(h->scsi_host); 6533 return 0; 6534 case CCISS_GETPCIINFO: 6535 return hpsa_getpciinfo_ioctl(h, argp); 6536 case CCISS_GETDRIVVER: 6537 return hpsa_getdrivver_ioctl(h, argp); 6538 case CCISS_PASSTHRU: 6539 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6540 return -EAGAIN; 6541 rc = hpsa_passthru_ioctl(h, argp); 6542 atomic_inc(&h->passthru_cmds_avail); 6543 return rc; 6544 case CCISS_BIG_PASSTHRU: 6545 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6546 return -EAGAIN; 6547 rc = hpsa_big_passthru_ioctl(h, argp); 6548 atomic_inc(&h->passthru_cmds_avail); 6549 return rc; 6550 default: 6551 return -ENOTTY; 6552 } 6553 } 6554 6555 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6556 u8 reset_type) 6557 { 6558 struct CommandList *c; 6559 6560 c = cmd_alloc(h); 6561 6562 /* fill_cmd can't fail here, no data buffer to map */ 6563 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6564 RAID_CTLR_LUNID, TYPE_MSG); 6565 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6566 c->waiting = NULL; 6567 enqueue_cmd_and_start_io(h, c); 6568 /* Don't wait for completion, the reset won't complete. Don't free 6569 * the command either. This is the last command we will send before 6570 * re-initializing everything, so it doesn't matter and won't leak. 6571 */ 6572 return; 6573 } 6574 6575 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6576 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6577 int cmd_type) 6578 { 6579 enum dma_data_direction dir = DMA_NONE; 6580 6581 c->cmd_type = CMD_IOCTL_PEND; 6582 c->scsi_cmd = SCSI_CMD_BUSY; 6583 c->Header.ReplyQueue = 0; 6584 if (buff != NULL && size > 0) { 6585 c->Header.SGList = 1; 6586 c->Header.SGTotal = cpu_to_le16(1); 6587 } else { 6588 c->Header.SGList = 0; 6589 c->Header.SGTotal = cpu_to_le16(0); 6590 } 6591 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6592 6593 if (cmd_type == TYPE_CMD) { 6594 switch (cmd) { 6595 case HPSA_INQUIRY: 6596 /* are we trying to read a vital product page */ 6597 if (page_code & VPD_PAGE) { 6598 c->Request.CDB[1] = 0x01; 6599 c->Request.CDB[2] = (page_code & 0xff); 6600 } 6601 c->Request.CDBLen = 6; 6602 c->Request.type_attr_dir = 6603 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6604 c->Request.Timeout = 0; 6605 c->Request.CDB[0] = HPSA_INQUIRY; 6606 c->Request.CDB[4] = size & 0xFF; 6607 break; 6608 case RECEIVE_DIAGNOSTIC: 6609 c->Request.CDBLen = 6; 6610 c->Request.type_attr_dir = 6611 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6612 c->Request.Timeout = 0; 6613 c->Request.CDB[0] = cmd; 6614 c->Request.CDB[1] = 1; 6615 c->Request.CDB[2] = 1; 6616 c->Request.CDB[3] = (size >> 8) & 0xFF; 6617 c->Request.CDB[4] = size & 0xFF; 6618 break; 6619 case HPSA_REPORT_LOG: 6620 case HPSA_REPORT_PHYS: 6621 /* Talking to controller so It's a physical command 6622 mode = 00 target = 0. Nothing to write. 6623 */ 6624 c->Request.CDBLen = 12; 6625 c->Request.type_attr_dir = 6626 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6627 c->Request.Timeout = 0; 6628 c->Request.CDB[0] = cmd; 6629 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6630 c->Request.CDB[7] = (size >> 16) & 0xFF; 6631 c->Request.CDB[8] = (size >> 8) & 0xFF; 6632 c->Request.CDB[9] = size & 0xFF; 6633 break; 6634 case BMIC_SENSE_DIAG_OPTIONS: 6635 c->Request.CDBLen = 16; 6636 c->Request.type_attr_dir = 6637 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6638 c->Request.Timeout = 0; 6639 /* Spec says this should be BMIC_WRITE */ 6640 c->Request.CDB[0] = BMIC_READ; 6641 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6642 break; 6643 case BMIC_SET_DIAG_OPTIONS: 6644 c->Request.CDBLen = 16; 6645 c->Request.type_attr_dir = 6646 TYPE_ATTR_DIR(cmd_type, 6647 ATTR_SIMPLE, XFER_WRITE); 6648 c->Request.Timeout = 0; 6649 c->Request.CDB[0] = BMIC_WRITE; 6650 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6651 break; 6652 case HPSA_CACHE_FLUSH: 6653 c->Request.CDBLen = 12; 6654 c->Request.type_attr_dir = 6655 TYPE_ATTR_DIR(cmd_type, 6656 ATTR_SIMPLE, XFER_WRITE); 6657 c->Request.Timeout = 0; 6658 c->Request.CDB[0] = BMIC_WRITE; 6659 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6660 c->Request.CDB[7] = (size >> 8) & 0xFF; 6661 c->Request.CDB[8] = size & 0xFF; 6662 break; 6663 case TEST_UNIT_READY: 6664 c->Request.CDBLen = 6; 6665 c->Request.type_attr_dir = 6666 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6667 c->Request.Timeout = 0; 6668 break; 6669 case HPSA_GET_RAID_MAP: 6670 c->Request.CDBLen = 12; 6671 c->Request.type_attr_dir = 6672 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6673 c->Request.Timeout = 0; 6674 c->Request.CDB[0] = HPSA_CISS_READ; 6675 c->Request.CDB[1] = cmd; 6676 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6677 c->Request.CDB[7] = (size >> 16) & 0xFF; 6678 c->Request.CDB[8] = (size >> 8) & 0xFF; 6679 c->Request.CDB[9] = size & 0xFF; 6680 break; 6681 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6682 c->Request.CDBLen = 10; 6683 c->Request.type_attr_dir = 6684 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6685 c->Request.Timeout = 0; 6686 c->Request.CDB[0] = BMIC_READ; 6687 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6688 c->Request.CDB[7] = (size >> 16) & 0xFF; 6689 c->Request.CDB[8] = (size >> 8) & 0xFF; 6690 break; 6691 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6692 c->Request.CDBLen = 10; 6693 c->Request.type_attr_dir = 6694 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6695 c->Request.Timeout = 0; 6696 c->Request.CDB[0] = BMIC_READ; 6697 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6698 c->Request.CDB[7] = (size >> 16) & 0xFF; 6699 c->Request.CDB[8] = (size >> 8) & 0XFF; 6700 break; 6701 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6702 c->Request.CDBLen = 10; 6703 c->Request.type_attr_dir = 6704 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6705 c->Request.Timeout = 0; 6706 c->Request.CDB[0] = BMIC_READ; 6707 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6708 c->Request.CDB[7] = (size >> 16) & 0xFF; 6709 c->Request.CDB[8] = (size >> 8) & 0XFF; 6710 break; 6711 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6712 c->Request.CDBLen = 10; 6713 c->Request.type_attr_dir = 6714 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6715 c->Request.Timeout = 0; 6716 c->Request.CDB[0] = BMIC_READ; 6717 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6718 c->Request.CDB[7] = (size >> 16) & 0xFF; 6719 c->Request.CDB[8] = (size >> 8) & 0XFF; 6720 break; 6721 case BMIC_IDENTIFY_CONTROLLER: 6722 c->Request.CDBLen = 10; 6723 c->Request.type_attr_dir = 6724 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6725 c->Request.Timeout = 0; 6726 c->Request.CDB[0] = BMIC_READ; 6727 c->Request.CDB[1] = 0; 6728 c->Request.CDB[2] = 0; 6729 c->Request.CDB[3] = 0; 6730 c->Request.CDB[4] = 0; 6731 c->Request.CDB[5] = 0; 6732 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6733 c->Request.CDB[7] = (size >> 16) & 0xFF; 6734 c->Request.CDB[8] = (size >> 8) & 0XFF; 6735 c->Request.CDB[9] = 0; 6736 break; 6737 default: 6738 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6739 BUG(); 6740 } 6741 } else if (cmd_type == TYPE_MSG) { 6742 switch (cmd) { 6743 6744 case HPSA_PHYS_TARGET_RESET: 6745 c->Request.CDBLen = 16; 6746 c->Request.type_attr_dir = 6747 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6748 c->Request.Timeout = 0; /* Don't time out */ 6749 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6750 c->Request.CDB[0] = HPSA_RESET; 6751 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6752 /* Physical target reset needs no control bytes 4-7*/ 6753 c->Request.CDB[4] = 0x00; 6754 c->Request.CDB[5] = 0x00; 6755 c->Request.CDB[6] = 0x00; 6756 c->Request.CDB[7] = 0x00; 6757 break; 6758 case HPSA_DEVICE_RESET_MSG: 6759 c->Request.CDBLen = 16; 6760 c->Request.type_attr_dir = 6761 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6762 c->Request.Timeout = 0; /* Don't time out */ 6763 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6764 c->Request.CDB[0] = cmd; 6765 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6766 /* If bytes 4-7 are zero, it means reset the */ 6767 /* LunID device */ 6768 c->Request.CDB[4] = 0x00; 6769 c->Request.CDB[5] = 0x00; 6770 c->Request.CDB[6] = 0x00; 6771 c->Request.CDB[7] = 0x00; 6772 break; 6773 default: 6774 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6775 cmd); 6776 BUG(); 6777 } 6778 } else { 6779 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6780 BUG(); 6781 } 6782 6783 switch (GET_DIR(c->Request.type_attr_dir)) { 6784 case XFER_READ: 6785 dir = DMA_FROM_DEVICE; 6786 break; 6787 case XFER_WRITE: 6788 dir = DMA_TO_DEVICE; 6789 break; 6790 case XFER_NONE: 6791 dir = DMA_NONE; 6792 break; 6793 default: 6794 dir = DMA_BIDIRECTIONAL; 6795 } 6796 if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6797 return -1; 6798 return 0; 6799 } 6800 6801 /* 6802 * Map (physical) PCI mem into (virtual) kernel space 6803 */ 6804 static void __iomem *remap_pci_mem(ulong base, ulong size) 6805 { 6806 ulong page_base = ((ulong) base) & PAGE_MASK; 6807 ulong page_offs = ((ulong) base) - page_base; 6808 void __iomem *page_remapped = ioremap_nocache(page_base, 6809 page_offs + size); 6810 6811 return page_remapped ? (page_remapped + page_offs) : NULL; 6812 } 6813 6814 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6815 { 6816 return h->access.command_completed(h, q); 6817 } 6818 6819 static inline bool interrupt_pending(struct ctlr_info *h) 6820 { 6821 return h->access.intr_pending(h); 6822 } 6823 6824 static inline long interrupt_not_for_us(struct ctlr_info *h) 6825 { 6826 return (h->access.intr_pending(h) == 0) || 6827 (h->interrupts_enabled == 0); 6828 } 6829 6830 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6831 u32 raw_tag) 6832 { 6833 if (unlikely(tag_index >= h->nr_cmds)) { 6834 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6835 return 1; 6836 } 6837 return 0; 6838 } 6839 6840 static inline void finish_cmd(struct CommandList *c) 6841 { 6842 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6843 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6844 || c->cmd_type == CMD_IOACCEL2)) 6845 complete_scsi_command(c); 6846 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6847 complete(c->waiting); 6848 } 6849 6850 /* process completion of an indexed ("direct lookup") command */ 6851 static inline void process_indexed_cmd(struct ctlr_info *h, 6852 u32 raw_tag) 6853 { 6854 u32 tag_index; 6855 struct CommandList *c; 6856 6857 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6858 if (!bad_tag(h, tag_index, raw_tag)) { 6859 c = h->cmd_pool + tag_index; 6860 finish_cmd(c); 6861 } 6862 } 6863 6864 /* Some controllers, like p400, will give us one interrupt 6865 * after a soft reset, even if we turned interrupts off. 6866 * Only need to check for this in the hpsa_xxx_discard_completions 6867 * functions. 6868 */ 6869 static int ignore_bogus_interrupt(struct ctlr_info *h) 6870 { 6871 if (likely(!reset_devices)) 6872 return 0; 6873 6874 if (likely(h->interrupts_enabled)) 6875 return 0; 6876 6877 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6878 "(known firmware bug.) Ignoring.\n"); 6879 6880 return 1; 6881 } 6882 6883 /* 6884 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6885 * Relies on (h-q[x] == x) being true for x such that 6886 * 0 <= x < MAX_REPLY_QUEUES. 6887 */ 6888 static struct ctlr_info *queue_to_hba(u8 *queue) 6889 { 6890 return container_of((queue - *queue), struct ctlr_info, q[0]); 6891 } 6892 6893 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6894 { 6895 struct ctlr_info *h = queue_to_hba(queue); 6896 u8 q = *(u8 *) queue; 6897 u32 raw_tag; 6898 6899 if (ignore_bogus_interrupt(h)) 6900 return IRQ_NONE; 6901 6902 if (interrupt_not_for_us(h)) 6903 return IRQ_NONE; 6904 h->last_intr_timestamp = get_jiffies_64(); 6905 while (interrupt_pending(h)) { 6906 raw_tag = get_next_completion(h, q); 6907 while (raw_tag != FIFO_EMPTY) 6908 raw_tag = next_command(h, q); 6909 } 6910 return IRQ_HANDLED; 6911 } 6912 6913 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6914 { 6915 struct ctlr_info *h = queue_to_hba(queue); 6916 u32 raw_tag; 6917 u8 q = *(u8 *) queue; 6918 6919 if (ignore_bogus_interrupt(h)) 6920 return IRQ_NONE; 6921 6922 h->last_intr_timestamp = get_jiffies_64(); 6923 raw_tag = get_next_completion(h, q); 6924 while (raw_tag != FIFO_EMPTY) 6925 raw_tag = next_command(h, q); 6926 return IRQ_HANDLED; 6927 } 6928 6929 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6930 { 6931 struct ctlr_info *h = queue_to_hba((u8 *) queue); 6932 u32 raw_tag; 6933 u8 q = *(u8 *) queue; 6934 6935 if (interrupt_not_for_us(h)) 6936 return IRQ_NONE; 6937 h->last_intr_timestamp = get_jiffies_64(); 6938 while (interrupt_pending(h)) { 6939 raw_tag = get_next_completion(h, q); 6940 while (raw_tag != FIFO_EMPTY) { 6941 process_indexed_cmd(h, raw_tag); 6942 raw_tag = next_command(h, q); 6943 } 6944 } 6945 return IRQ_HANDLED; 6946 } 6947 6948 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 6949 { 6950 struct ctlr_info *h = queue_to_hba(queue); 6951 u32 raw_tag; 6952 u8 q = *(u8 *) queue; 6953 6954 h->last_intr_timestamp = get_jiffies_64(); 6955 raw_tag = get_next_completion(h, q); 6956 while (raw_tag != FIFO_EMPTY) { 6957 process_indexed_cmd(h, raw_tag); 6958 raw_tag = next_command(h, q); 6959 } 6960 return IRQ_HANDLED; 6961 } 6962 6963 /* Send a message CDB to the firmware. Careful, this only works 6964 * in simple mode, not performant mode due to the tag lookup. 6965 * We only ever use this immediately after a controller reset. 6966 */ 6967 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6968 unsigned char type) 6969 { 6970 struct Command { 6971 struct CommandListHeader CommandHeader; 6972 struct RequestBlock Request; 6973 struct ErrDescriptor ErrorDescriptor; 6974 }; 6975 struct Command *cmd; 6976 static const size_t cmd_sz = sizeof(*cmd) + 6977 sizeof(cmd->ErrorDescriptor); 6978 dma_addr_t paddr64; 6979 __le32 paddr32; 6980 u32 tag; 6981 void __iomem *vaddr; 6982 int i, err; 6983 6984 vaddr = pci_ioremap_bar(pdev, 0); 6985 if (vaddr == NULL) 6986 return -ENOMEM; 6987 6988 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6989 * CCISS commands, so they must be allocated from the lower 4GiB of 6990 * memory. 6991 */ 6992 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 6993 if (err) { 6994 iounmap(vaddr); 6995 return err; 6996 } 6997 6998 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 6999 if (cmd == NULL) { 7000 iounmap(vaddr); 7001 return -ENOMEM; 7002 } 7003 7004 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7005 * although there's no guarantee, we assume that the address is at 7006 * least 4-byte aligned (most likely, it's page-aligned). 7007 */ 7008 paddr32 = cpu_to_le32(paddr64); 7009 7010 cmd->CommandHeader.ReplyQueue = 0; 7011 cmd->CommandHeader.SGList = 0; 7012 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7013 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7014 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7015 7016 cmd->Request.CDBLen = 16; 7017 cmd->Request.type_attr_dir = 7018 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7019 cmd->Request.Timeout = 0; /* Don't time out */ 7020 cmd->Request.CDB[0] = opcode; 7021 cmd->Request.CDB[1] = type; 7022 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7023 cmd->ErrorDescriptor.Addr = 7024 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7025 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7026 7027 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7028 7029 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7030 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7031 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7032 break; 7033 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7034 } 7035 7036 iounmap(vaddr); 7037 7038 /* we leak the DMA buffer here ... no choice since the controller could 7039 * still complete the command. 7040 */ 7041 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7042 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7043 opcode, type); 7044 return -ETIMEDOUT; 7045 } 7046 7047 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7048 7049 if (tag & HPSA_ERROR_BIT) { 7050 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7051 opcode, type); 7052 return -EIO; 7053 } 7054 7055 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7056 opcode, type); 7057 return 0; 7058 } 7059 7060 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7061 7062 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7063 void __iomem *vaddr, u32 use_doorbell) 7064 { 7065 7066 if (use_doorbell) { 7067 /* For everything after the P600, the PCI power state method 7068 * of resetting the controller doesn't work, so we have this 7069 * other way using the doorbell register. 7070 */ 7071 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7072 writel(use_doorbell, vaddr + SA5_DOORBELL); 7073 7074 /* PMC hardware guys tell us we need a 10 second delay after 7075 * doorbell reset and before any attempt to talk to the board 7076 * at all to ensure that this actually works and doesn't fall 7077 * over in some weird corner cases. 7078 */ 7079 msleep(10000); 7080 } else { /* Try to do it the PCI power state way */ 7081 7082 /* Quoting from the Open CISS Specification: "The Power 7083 * Management Control/Status Register (CSR) controls the power 7084 * state of the device. The normal operating state is D0, 7085 * CSR=00h. The software off state is D3, CSR=03h. To reset 7086 * the controller, place the interface device in D3 then to D0, 7087 * this causes a secondary PCI reset which will reset the 7088 * controller." */ 7089 7090 int rc = 0; 7091 7092 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7093 7094 /* enter the D3hot power management state */ 7095 rc = pci_set_power_state(pdev, PCI_D3hot); 7096 if (rc) 7097 return rc; 7098 7099 msleep(500); 7100 7101 /* enter the D0 power management state */ 7102 rc = pci_set_power_state(pdev, PCI_D0); 7103 if (rc) 7104 return rc; 7105 7106 /* 7107 * The P600 requires a small delay when changing states. 7108 * Otherwise we may think the board did not reset and we bail. 7109 * This for kdump only and is particular to the P600. 7110 */ 7111 msleep(500); 7112 } 7113 return 0; 7114 } 7115 7116 static void init_driver_version(char *driver_version, int len) 7117 { 7118 memset(driver_version, 0, len); 7119 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7120 } 7121 7122 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7123 { 7124 char *driver_version; 7125 int i, size = sizeof(cfgtable->driver_version); 7126 7127 driver_version = kmalloc(size, GFP_KERNEL); 7128 if (!driver_version) 7129 return -ENOMEM; 7130 7131 init_driver_version(driver_version, size); 7132 for (i = 0; i < size; i++) 7133 writeb(driver_version[i], &cfgtable->driver_version[i]); 7134 kfree(driver_version); 7135 return 0; 7136 } 7137 7138 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7139 unsigned char *driver_ver) 7140 { 7141 int i; 7142 7143 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7144 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7145 } 7146 7147 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7148 { 7149 7150 char *driver_ver, *old_driver_ver; 7151 int rc, size = sizeof(cfgtable->driver_version); 7152 7153 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7154 if (!old_driver_ver) 7155 return -ENOMEM; 7156 driver_ver = old_driver_ver + size; 7157 7158 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7159 * should have been changed, otherwise we know the reset failed. 7160 */ 7161 init_driver_version(old_driver_ver, size); 7162 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7163 rc = !memcmp(driver_ver, old_driver_ver, size); 7164 kfree(old_driver_ver); 7165 return rc; 7166 } 7167 /* This does a hard reset of the controller using PCI power management 7168 * states or the using the doorbell register. 7169 */ 7170 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7171 { 7172 u64 cfg_offset; 7173 u32 cfg_base_addr; 7174 u64 cfg_base_addr_index; 7175 void __iomem *vaddr; 7176 unsigned long paddr; 7177 u32 misc_fw_support; 7178 int rc; 7179 struct CfgTable __iomem *cfgtable; 7180 u32 use_doorbell; 7181 u16 command_register; 7182 7183 /* For controllers as old as the P600, this is very nearly 7184 * the same thing as 7185 * 7186 * pci_save_state(pci_dev); 7187 * pci_set_power_state(pci_dev, PCI_D3hot); 7188 * pci_set_power_state(pci_dev, PCI_D0); 7189 * pci_restore_state(pci_dev); 7190 * 7191 * For controllers newer than the P600, the pci power state 7192 * method of resetting doesn't work so we have another way 7193 * using the doorbell register. 7194 */ 7195 7196 if (!ctlr_is_resettable(board_id)) { 7197 dev_warn(&pdev->dev, "Controller not resettable\n"); 7198 return -ENODEV; 7199 } 7200 7201 /* if controller is soft- but not hard resettable... */ 7202 if (!ctlr_is_hard_resettable(board_id)) 7203 return -ENOTSUPP; /* try soft reset later. */ 7204 7205 /* Save the PCI command register */ 7206 pci_read_config_word(pdev, 4, &command_register); 7207 pci_save_state(pdev); 7208 7209 /* find the first memory BAR, so we can find the cfg table */ 7210 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7211 if (rc) 7212 return rc; 7213 vaddr = remap_pci_mem(paddr, 0x250); 7214 if (!vaddr) 7215 return -ENOMEM; 7216 7217 /* find cfgtable in order to check if reset via doorbell is supported */ 7218 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7219 &cfg_base_addr_index, &cfg_offset); 7220 if (rc) 7221 goto unmap_vaddr; 7222 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7223 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7224 if (!cfgtable) { 7225 rc = -ENOMEM; 7226 goto unmap_vaddr; 7227 } 7228 rc = write_driver_ver_to_cfgtable(cfgtable); 7229 if (rc) 7230 goto unmap_cfgtable; 7231 7232 /* If reset via doorbell register is supported, use that. 7233 * There are two such methods. Favor the newest method. 7234 */ 7235 misc_fw_support = readl(&cfgtable->misc_fw_support); 7236 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7237 if (use_doorbell) { 7238 use_doorbell = DOORBELL_CTLR_RESET2; 7239 } else { 7240 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7241 if (use_doorbell) { 7242 dev_warn(&pdev->dev, 7243 "Soft reset not supported. Firmware update is required.\n"); 7244 rc = -ENOTSUPP; /* try soft reset */ 7245 goto unmap_cfgtable; 7246 } 7247 } 7248 7249 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7250 if (rc) 7251 goto unmap_cfgtable; 7252 7253 pci_restore_state(pdev); 7254 pci_write_config_word(pdev, 4, command_register); 7255 7256 /* Some devices (notably the HP Smart Array 5i Controller) 7257 need a little pause here */ 7258 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7259 7260 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7261 if (rc) { 7262 dev_warn(&pdev->dev, 7263 "Failed waiting for board to become ready after hard reset\n"); 7264 goto unmap_cfgtable; 7265 } 7266 7267 rc = controller_reset_failed(vaddr); 7268 if (rc < 0) 7269 goto unmap_cfgtable; 7270 if (rc) { 7271 dev_warn(&pdev->dev, "Unable to successfully reset " 7272 "controller. Will try soft reset.\n"); 7273 rc = -ENOTSUPP; 7274 } else { 7275 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7276 } 7277 7278 unmap_cfgtable: 7279 iounmap(cfgtable); 7280 7281 unmap_vaddr: 7282 iounmap(vaddr); 7283 return rc; 7284 } 7285 7286 /* 7287 * We cannot read the structure directly, for portability we must use 7288 * the io functions. 7289 * This is for debug only. 7290 */ 7291 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7292 { 7293 #ifdef HPSA_DEBUG 7294 int i; 7295 char temp_name[17]; 7296 7297 dev_info(dev, "Controller Configuration information\n"); 7298 dev_info(dev, "------------------------------------\n"); 7299 for (i = 0; i < 4; i++) 7300 temp_name[i] = readb(&(tb->Signature[i])); 7301 temp_name[4] = '\0'; 7302 dev_info(dev, " Signature = %s\n", temp_name); 7303 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7304 dev_info(dev, " Transport methods supported = 0x%x\n", 7305 readl(&(tb->TransportSupport))); 7306 dev_info(dev, " Transport methods active = 0x%x\n", 7307 readl(&(tb->TransportActive))); 7308 dev_info(dev, " Requested transport Method = 0x%x\n", 7309 readl(&(tb->HostWrite.TransportRequest))); 7310 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7311 readl(&(tb->HostWrite.CoalIntDelay))); 7312 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7313 readl(&(tb->HostWrite.CoalIntCount))); 7314 dev_info(dev, " Max outstanding commands = %d\n", 7315 readl(&(tb->CmdsOutMax))); 7316 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7317 for (i = 0; i < 16; i++) 7318 temp_name[i] = readb(&(tb->ServerName[i])); 7319 temp_name[16] = '\0'; 7320 dev_info(dev, " Server Name = %s\n", temp_name); 7321 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7322 readl(&(tb->HeartBeat))); 7323 #endif /* HPSA_DEBUG */ 7324 } 7325 7326 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7327 { 7328 int i, offset, mem_type, bar_type; 7329 7330 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7331 return 0; 7332 offset = 0; 7333 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7334 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7335 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7336 offset += 4; 7337 else { 7338 mem_type = pci_resource_flags(pdev, i) & 7339 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7340 switch (mem_type) { 7341 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7342 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7343 offset += 4; /* 32 bit */ 7344 break; 7345 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7346 offset += 8; 7347 break; 7348 default: /* reserved in PCI 2.2 */ 7349 dev_warn(&pdev->dev, 7350 "base address is invalid\n"); 7351 return -1; 7352 break; 7353 } 7354 } 7355 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7356 return i + 1; 7357 } 7358 return -1; 7359 } 7360 7361 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7362 { 7363 pci_free_irq_vectors(h->pdev); 7364 h->msix_vectors = 0; 7365 } 7366 7367 static void hpsa_setup_reply_map(struct ctlr_info *h) 7368 { 7369 const struct cpumask *mask; 7370 unsigned int queue, cpu; 7371 7372 for (queue = 0; queue < h->msix_vectors; queue++) { 7373 mask = pci_irq_get_affinity(h->pdev, queue); 7374 if (!mask) 7375 goto fallback; 7376 7377 for_each_cpu(cpu, mask) 7378 h->reply_map[cpu] = queue; 7379 } 7380 return; 7381 7382 fallback: 7383 for_each_possible_cpu(cpu) 7384 h->reply_map[cpu] = 0; 7385 } 7386 7387 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7388 * controllers that are capable. If not, we use legacy INTx mode. 7389 */ 7390 static int hpsa_interrupt_mode(struct ctlr_info *h) 7391 { 7392 unsigned int flags = PCI_IRQ_LEGACY; 7393 int ret; 7394 7395 /* Some boards advertise MSI but don't really support it */ 7396 switch (h->board_id) { 7397 case 0x40700E11: 7398 case 0x40800E11: 7399 case 0x40820E11: 7400 case 0x40830E11: 7401 break; 7402 default: 7403 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7404 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7405 if (ret > 0) { 7406 h->msix_vectors = ret; 7407 return 0; 7408 } 7409 7410 flags |= PCI_IRQ_MSI; 7411 break; 7412 } 7413 7414 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7415 if (ret < 0) 7416 return ret; 7417 return 0; 7418 } 7419 7420 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7421 bool *legacy_board) 7422 { 7423 int i; 7424 u32 subsystem_vendor_id, subsystem_device_id; 7425 7426 subsystem_vendor_id = pdev->subsystem_vendor; 7427 subsystem_device_id = pdev->subsystem_device; 7428 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7429 subsystem_vendor_id; 7430 7431 if (legacy_board) 7432 *legacy_board = false; 7433 for (i = 0; i < ARRAY_SIZE(products); i++) 7434 if (*board_id == products[i].board_id) { 7435 if (products[i].access != &SA5A_access && 7436 products[i].access != &SA5B_access) 7437 return i; 7438 dev_warn(&pdev->dev, 7439 "legacy board ID: 0x%08x\n", 7440 *board_id); 7441 if (legacy_board) 7442 *legacy_board = true; 7443 return i; 7444 } 7445 7446 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7447 if (legacy_board) 7448 *legacy_board = true; 7449 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7450 } 7451 7452 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7453 unsigned long *memory_bar) 7454 { 7455 int i; 7456 7457 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7458 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7459 /* addressing mode bits already removed */ 7460 *memory_bar = pci_resource_start(pdev, i); 7461 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7462 *memory_bar); 7463 return 0; 7464 } 7465 dev_warn(&pdev->dev, "no memory BAR found\n"); 7466 return -ENODEV; 7467 } 7468 7469 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7470 int wait_for_ready) 7471 { 7472 int i, iterations; 7473 u32 scratchpad; 7474 if (wait_for_ready) 7475 iterations = HPSA_BOARD_READY_ITERATIONS; 7476 else 7477 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7478 7479 for (i = 0; i < iterations; i++) { 7480 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7481 if (wait_for_ready) { 7482 if (scratchpad == HPSA_FIRMWARE_READY) 7483 return 0; 7484 } else { 7485 if (scratchpad != HPSA_FIRMWARE_READY) 7486 return 0; 7487 } 7488 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7489 } 7490 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7491 return -ENODEV; 7492 } 7493 7494 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7495 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7496 u64 *cfg_offset) 7497 { 7498 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7499 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7500 *cfg_base_addr &= (u32) 0x0000ffff; 7501 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7502 if (*cfg_base_addr_index == -1) { 7503 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7504 return -ENODEV; 7505 } 7506 return 0; 7507 } 7508 7509 static void hpsa_free_cfgtables(struct ctlr_info *h) 7510 { 7511 if (h->transtable) { 7512 iounmap(h->transtable); 7513 h->transtable = NULL; 7514 } 7515 if (h->cfgtable) { 7516 iounmap(h->cfgtable); 7517 h->cfgtable = NULL; 7518 } 7519 } 7520 7521 /* Find and map CISS config table and transfer table 7522 + * several items must be unmapped (freed) later 7523 + * */ 7524 static int hpsa_find_cfgtables(struct ctlr_info *h) 7525 { 7526 u64 cfg_offset; 7527 u32 cfg_base_addr; 7528 u64 cfg_base_addr_index; 7529 u32 trans_offset; 7530 int rc; 7531 7532 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7533 &cfg_base_addr_index, &cfg_offset); 7534 if (rc) 7535 return rc; 7536 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7537 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7538 if (!h->cfgtable) { 7539 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7540 return -ENOMEM; 7541 } 7542 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7543 if (rc) 7544 return rc; 7545 /* Find performant mode table. */ 7546 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7547 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7548 cfg_base_addr_index)+cfg_offset+trans_offset, 7549 sizeof(*h->transtable)); 7550 if (!h->transtable) { 7551 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7552 hpsa_free_cfgtables(h); 7553 return -ENOMEM; 7554 } 7555 return 0; 7556 } 7557 7558 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7559 { 7560 #define MIN_MAX_COMMANDS 16 7561 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7562 7563 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7564 7565 /* Limit commands in memory limited kdump scenario. */ 7566 if (reset_devices && h->max_commands > 32) 7567 h->max_commands = 32; 7568 7569 if (h->max_commands < MIN_MAX_COMMANDS) { 7570 dev_warn(&h->pdev->dev, 7571 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7572 h->max_commands, 7573 MIN_MAX_COMMANDS); 7574 h->max_commands = MIN_MAX_COMMANDS; 7575 } 7576 } 7577 7578 /* If the controller reports that the total max sg entries is greater than 512, 7579 * then we know that chained SG blocks work. (Original smart arrays did not 7580 * support chained SG blocks and would return zero for max sg entries.) 7581 */ 7582 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7583 { 7584 return h->maxsgentries > 512; 7585 } 7586 7587 /* Interrogate the hardware for some limits: 7588 * max commands, max SG elements without chaining, and with chaining, 7589 * SG chain block size, etc. 7590 */ 7591 static void hpsa_find_board_params(struct ctlr_info *h) 7592 { 7593 hpsa_get_max_perf_mode_cmds(h); 7594 h->nr_cmds = h->max_commands; 7595 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7596 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7597 if (hpsa_supports_chained_sg_blocks(h)) { 7598 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7599 h->max_cmd_sg_entries = 32; 7600 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7601 h->maxsgentries--; /* save one for chain pointer */ 7602 } else { 7603 /* 7604 * Original smart arrays supported at most 31 s/g entries 7605 * embedded inline in the command (trying to use more 7606 * would lock up the controller) 7607 */ 7608 h->max_cmd_sg_entries = 31; 7609 h->maxsgentries = 31; /* default to traditional values */ 7610 h->chainsize = 0; 7611 } 7612 7613 /* Find out what task management functions are supported and cache */ 7614 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7615 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7616 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7617 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7618 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7619 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7620 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7621 } 7622 7623 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7624 { 7625 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7626 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7627 return false; 7628 } 7629 return true; 7630 } 7631 7632 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7633 { 7634 u32 driver_support; 7635 7636 driver_support = readl(&(h->cfgtable->driver_support)); 7637 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7638 #ifdef CONFIG_X86 7639 driver_support |= ENABLE_SCSI_PREFETCH; 7640 #endif 7641 driver_support |= ENABLE_UNIT_ATTN; 7642 writel(driver_support, &(h->cfgtable->driver_support)); 7643 } 7644 7645 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7646 * in a prefetch beyond physical memory. 7647 */ 7648 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7649 { 7650 u32 dma_prefetch; 7651 7652 if (h->board_id != 0x3225103C) 7653 return; 7654 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7655 dma_prefetch |= 0x8000; 7656 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7657 } 7658 7659 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7660 { 7661 int i; 7662 u32 doorbell_value; 7663 unsigned long flags; 7664 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7665 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7666 spin_lock_irqsave(&h->lock, flags); 7667 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7668 spin_unlock_irqrestore(&h->lock, flags); 7669 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7670 goto done; 7671 /* delay and try again */ 7672 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7673 } 7674 return -ENODEV; 7675 done: 7676 return 0; 7677 } 7678 7679 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7680 { 7681 int i; 7682 u32 doorbell_value; 7683 unsigned long flags; 7684 7685 /* under certain very rare conditions, this can take awhile. 7686 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7687 * as we enter this code.) 7688 */ 7689 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7690 if (h->remove_in_progress) 7691 goto done; 7692 spin_lock_irqsave(&h->lock, flags); 7693 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7694 spin_unlock_irqrestore(&h->lock, flags); 7695 if (!(doorbell_value & CFGTBL_ChangeReq)) 7696 goto done; 7697 /* delay and try again */ 7698 msleep(MODE_CHANGE_WAIT_INTERVAL); 7699 } 7700 return -ENODEV; 7701 done: 7702 return 0; 7703 } 7704 7705 /* return -ENODEV or other reason on error, 0 on success */ 7706 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7707 { 7708 u32 trans_support; 7709 7710 trans_support = readl(&(h->cfgtable->TransportSupport)); 7711 if (!(trans_support & SIMPLE_MODE)) 7712 return -ENOTSUPP; 7713 7714 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7715 7716 /* Update the field, and then ring the doorbell */ 7717 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7718 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7719 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7720 if (hpsa_wait_for_mode_change_ack(h)) 7721 goto error; 7722 print_cfg_table(&h->pdev->dev, h->cfgtable); 7723 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7724 goto error; 7725 h->transMethod = CFGTBL_Trans_Simple; 7726 return 0; 7727 error: 7728 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7729 return -ENODEV; 7730 } 7731 7732 /* free items allocated or mapped by hpsa_pci_init */ 7733 static void hpsa_free_pci_init(struct ctlr_info *h) 7734 { 7735 hpsa_free_cfgtables(h); /* pci_init 4 */ 7736 iounmap(h->vaddr); /* pci_init 3 */ 7737 h->vaddr = NULL; 7738 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7739 /* 7740 * call pci_disable_device before pci_release_regions per 7741 * Documentation/PCI/pci.txt 7742 */ 7743 pci_disable_device(h->pdev); /* pci_init 1 */ 7744 pci_release_regions(h->pdev); /* pci_init 2 */ 7745 } 7746 7747 /* several items must be freed later */ 7748 static int hpsa_pci_init(struct ctlr_info *h) 7749 { 7750 int prod_index, err; 7751 bool legacy_board; 7752 7753 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7754 if (prod_index < 0) 7755 return prod_index; 7756 h->product_name = products[prod_index].product_name; 7757 h->access = *(products[prod_index].access); 7758 h->legacy_board = legacy_board; 7759 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7760 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7761 7762 err = pci_enable_device(h->pdev); 7763 if (err) { 7764 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7765 pci_disable_device(h->pdev); 7766 return err; 7767 } 7768 7769 err = pci_request_regions(h->pdev, HPSA); 7770 if (err) { 7771 dev_err(&h->pdev->dev, 7772 "failed to obtain PCI resources\n"); 7773 pci_disable_device(h->pdev); 7774 return err; 7775 } 7776 7777 pci_set_master(h->pdev); 7778 7779 err = hpsa_interrupt_mode(h); 7780 if (err) 7781 goto clean1; 7782 7783 /* setup mapping between CPU and reply queue */ 7784 hpsa_setup_reply_map(h); 7785 7786 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7787 if (err) 7788 goto clean2; /* intmode+region, pci */ 7789 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7790 if (!h->vaddr) { 7791 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7792 err = -ENOMEM; 7793 goto clean2; /* intmode+region, pci */ 7794 } 7795 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7796 if (err) 7797 goto clean3; /* vaddr, intmode+region, pci */ 7798 err = hpsa_find_cfgtables(h); 7799 if (err) 7800 goto clean3; /* vaddr, intmode+region, pci */ 7801 hpsa_find_board_params(h); 7802 7803 if (!hpsa_CISS_signature_present(h)) { 7804 err = -ENODEV; 7805 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7806 } 7807 hpsa_set_driver_support_bits(h); 7808 hpsa_p600_dma_prefetch_quirk(h); 7809 err = hpsa_enter_simple_mode(h); 7810 if (err) 7811 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7812 return 0; 7813 7814 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7815 hpsa_free_cfgtables(h); 7816 clean3: /* vaddr, intmode+region, pci */ 7817 iounmap(h->vaddr); 7818 h->vaddr = NULL; 7819 clean2: /* intmode+region, pci */ 7820 hpsa_disable_interrupt_mode(h); 7821 clean1: 7822 /* 7823 * call pci_disable_device before pci_release_regions per 7824 * Documentation/PCI/pci.txt 7825 */ 7826 pci_disable_device(h->pdev); 7827 pci_release_regions(h->pdev); 7828 return err; 7829 } 7830 7831 static void hpsa_hba_inquiry(struct ctlr_info *h) 7832 { 7833 int rc; 7834 7835 #define HBA_INQUIRY_BYTE_COUNT 64 7836 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7837 if (!h->hba_inquiry_data) 7838 return; 7839 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7840 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7841 if (rc != 0) { 7842 kfree(h->hba_inquiry_data); 7843 h->hba_inquiry_data = NULL; 7844 } 7845 } 7846 7847 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7848 { 7849 int rc, i; 7850 void __iomem *vaddr; 7851 7852 if (!reset_devices) 7853 return 0; 7854 7855 /* kdump kernel is loading, we don't know in which state is 7856 * the pci interface. The dev->enable_cnt is equal zero 7857 * so we call enable+disable, wait a while and switch it on. 7858 */ 7859 rc = pci_enable_device(pdev); 7860 if (rc) { 7861 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7862 return -ENODEV; 7863 } 7864 pci_disable_device(pdev); 7865 msleep(260); /* a randomly chosen number */ 7866 rc = pci_enable_device(pdev); 7867 if (rc) { 7868 dev_warn(&pdev->dev, "failed to enable device.\n"); 7869 return -ENODEV; 7870 } 7871 7872 pci_set_master(pdev); 7873 7874 vaddr = pci_ioremap_bar(pdev, 0); 7875 if (vaddr == NULL) { 7876 rc = -ENOMEM; 7877 goto out_disable; 7878 } 7879 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7880 iounmap(vaddr); 7881 7882 /* Reset the controller with a PCI power-cycle or via doorbell */ 7883 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7884 7885 /* -ENOTSUPP here means we cannot reset the controller 7886 * but it's already (and still) up and running in 7887 * "performant mode". Or, it might be 640x, which can't reset 7888 * due to concerns about shared bbwc between 6402/6404 pair. 7889 */ 7890 if (rc) 7891 goto out_disable; 7892 7893 /* Now try to get the controller to respond to a no-op */ 7894 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7895 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7896 if (hpsa_noop(pdev) == 0) 7897 break; 7898 else 7899 dev_warn(&pdev->dev, "no-op failed%s\n", 7900 (i < 11 ? "; re-trying" : "")); 7901 } 7902 7903 out_disable: 7904 7905 pci_disable_device(pdev); 7906 return rc; 7907 } 7908 7909 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7910 { 7911 kfree(h->cmd_pool_bits); 7912 h->cmd_pool_bits = NULL; 7913 if (h->cmd_pool) { 7914 dma_free_coherent(&h->pdev->dev, 7915 h->nr_cmds * sizeof(struct CommandList), 7916 h->cmd_pool, 7917 h->cmd_pool_dhandle); 7918 h->cmd_pool = NULL; 7919 h->cmd_pool_dhandle = 0; 7920 } 7921 if (h->errinfo_pool) { 7922 dma_free_coherent(&h->pdev->dev, 7923 h->nr_cmds * sizeof(struct ErrorInfo), 7924 h->errinfo_pool, 7925 h->errinfo_pool_dhandle); 7926 h->errinfo_pool = NULL; 7927 h->errinfo_pool_dhandle = 0; 7928 } 7929 } 7930 7931 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 7932 { 7933 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 7934 sizeof(unsigned long), 7935 GFP_KERNEL); 7936 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 7937 h->nr_cmds * sizeof(*h->cmd_pool), 7938 &h->cmd_pool_dhandle, GFP_KERNEL); 7939 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 7940 h->nr_cmds * sizeof(*h->errinfo_pool), 7941 &h->errinfo_pool_dhandle, GFP_KERNEL); 7942 if ((h->cmd_pool_bits == NULL) 7943 || (h->cmd_pool == NULL) 7944 || (h->errinfo_pool == NULL)) { 7945 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 7946 goto clean_up; 7947 } 7948 hpsa_preinitialize_commands(h); 7949 return 0; 7950 clean_up: 7951 hpsa_free_cmd_pool(h); 7952 return -ENOMEM; 7953 } 7954 7955 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7956 static void hpsa_free_irqs(struct ctlr_info *h) 7957 { 7958 int i; 7959 7960 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7961 /* Single reply queue, only one irq to free */ 7962 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7963 h->q[h->intr_mode] = 0; 7964 return; 7965 } 7966 7967 for (i = 0; i < h->msix_vectors; i++) { 7968 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7969 h->q[i] = 0; 7970 } 7971 for (; i < MAX_REPLY_QUEUES; i++) 7972 h->q[i] = 0; 7973 } 7974 7975 /* returns 0 on success; cleans up and returns -Enn on error */ 7976 static int hpsa_request_irqs(struct ctlr_info *h, 7977 irqreturn_t (*msixhandler)(int, void *), 7978 irqreturn_t (*intxhandler)(int, void *)) 7979 { 7980 int rc, i; 7981 7982 /* 7983 * initialize h->q[x] = x so that interrupt handlers know which 7984 * queue to process. 7985 */ 7986 for (i = 0; i < MAX_REPLY_QUEUES; i++) 7987 h->q[i] = (u8) i; 7988 7989 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7990 /* If performant mode and MSI-X, use multiple reply queues */ 7991 for (i = 0; i < h->msix_vectors; i++) { 7992 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7993 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 7994 0, h->intrname[i], 7995 &h->q[i]); 7996 if (rc) { 7997 int j; 7998 7999 dev_err(&h->pdev->dev, 8000 "failed to get irq %d for %s\n", 8001 pci_irq_vector(h->pdev, i), h->devname); 8002 for (j = 0; j < i; j++) { 8003 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8004 h->q[j] = 0; 8005 } 8006 for (; j < MAX_REPLY_QUEUES; j++) 8007 h->q[j] = 0; 8008 return rc; 8009 } 8010 } 8011 } else { 8012 /* Use single reply pool */ 8013 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8014 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8015 h->msix_vectors ? "x" : ""); 8016 rc = request_irq(pci_irq_vector(h->pdev, 0), 8017 msixhandler, 0, 8018 h->intrname[0], 8019 &h->q[h->intr_mode]); 8020 } else { 8021 sprintf(h->intrname[h->intr_mode], 8022 "%s-intx", h->devname); 8023 rc = request_irq(pci_irq_vector(h->pdev, 0), 8024 intxhandler, IRQF_SHARED, 8025 h->intrname[0], 8026 &h->q[h->intr_mode]); 8027 } 8028 } 8029 if (rc) { 8030 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8031 pci_irq_vector(h->pdev, 0), h->devname); 8032 hpsa_free_irqs(h); 8033 return -ENODEV; 8034 } 8035 return 0; 8036 } 8037 8038 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8039 { 8040 int rc; 8041 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8042 8043 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8044 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8045 if (rc) { 8046 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8047 return rc; 8048 } 8049 8050 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8051 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8052 if (rc) { 8053 dev_warn(&h->pdev->dev, "Board failed to become ready " 8054 "after soft reset.\n"); 8055 return rc; 8056 } 8057 8058 return 0; 8059 } 8060 8061 static void hpsa_free_reply_queues(struct ctlr_info *h) 8062 { 8063 int i; 8064 8065 for (i = 0; i < h->nreply_queues; i++) { 8066 if (!h->reply_queue[i].head) 8067 continue; 8068 dma_free_coherent(&h->pdev->dev, 8069 h->reply_queue_size, 8070 h->reply_queue[i].head, 8071 h->reply_queue[i].busaddr); 8072 h->reply_queue[i].head = NULL; 8073 h->reply_queue[i].busaddr = 0; 8074 } 8075 h->reply_queue_size = 0; 8076 } 8077 8078 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8079 { 8080 hpsa_free_performant_mode(h); /* init_one 7 */ 8081 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8082 hpsa_free_cmd_pool(h); /* init_one 5 */ 8083 hpsa_free_irqs(h); /* init_one 4 */ 8084 scsi_host_put(h->scsi_host); /* init_one 3 */ 8085 h->scsi_host = NULL; /* init_one 3 */ 8086 hpsa_free_pci_init(h); /* init_one 2_5 */ 8087 free_percpu(h->lockup_detected); /* init_one 2 */ 8088 h->lockup_detected = NULL; /* init_one 2 */ 8089 if (h->resubmit_wq) { 8090 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8091 h->resubmit_wq = NULL; 8092 } 8093 if (h->rescan_ctlr_wq) { 8094 destroy_workqueue(h->rescan_ctlr_wq); 8095 h->rescan_ctlr_wq = NULL; 8096 } 8097 kfree(h); /* init_one 1 */ 8098 } 8099 8100 /* Called when controller lockup detected. */ 8101 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8102 { 8103 int i, refcount; 8104 struct CommandList *c; 8105 int failcount = 0; 8106 8107 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8108 for (i = 0; i < h->nr_cmds; i++) { 8109 c = h->cmd_pool + i; 8110 refcount = atomic_inc_return(&c->refcount); 8111 if (refcount > 1) { 8112 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8113 finish_cmd(c); 8114 atomic_dec(&h->commands_outstanding); 8115 failcount++; 8116 } 8117 cmd_free(h, c); 8118 } 8119 dev_warn(&h->pdev->dev, 8120 "failed %d commands in fail_all\n", failcount); 8121 } 8122 8123 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8124 { 8125 int cpu; 8126 8127 for_each_online_cpu(cpu) { 8128 u32 *lockup_detected; 8129 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8130 *lockup_detected = value; 8131 } 8132 wmb(); /* be sure the per-cpu variables are out to memory */ 8133 } 8134 8135 static void controller_lockup_detected(struct ctlr_info *h) 8136 { 8137 unsigned long flags; 8138 u32 lockup_detected; 8139 8140 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8141 spin_lock_irqsave(&h->lock, flags); 8142 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8143 if (!lockup_detected) { 8144 /* no heartbeat, but controller gave us a zero. */ 8145 dev_warn(&h->pdev->dev, 8146 "lockup detected after %d but scratchpad register is zero\n", 8147 h->heartbeat_sample_interval / HZ); 8148 lockup_detected = 0xffffffff; 8149 } 8150 set_lockup_detected_for_all_cpus(h, lockup_detected); 8151 spin_unlock_irqrestore(&h->lock, flags); 8152 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8153 lockup_detected, h->heartbeat_sample_interval / HZ); 8154 if (lockup_detected == 0xffff0000) { 8155 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8156 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8157 } 8158 pci_disable_device(h->pdev); 8159 fail_all_outstanding_cmds(h); 8160 } 8161 8162 static int detect_controller_lockup(struct ctlr_info *h) 8163 { 8164 u64 now; 8165 u32 heartbeat; 8166 unsigned long flags; 8167 8168 now = get_jiffies_64(); 8169 /* If we've received an interrupt recently, we're ok. */ 8170 if (time_after64(h->last_intr_timestamp + 8171 (h->heartbeat_sample_interval), now)) 8172 return false; 8173 8174 /* 8175 * If we've already checked the heartbeat recently, we're ok. 8176 * This could happen if someone sends us a signal. We 8177 * otherwise don't care about signals in this thread. 8178 */ 8179 if (time_after64(h->last_heartbeat_timestamp + 8180 (h->heartbeat_sample_interval), now)) 8181 return false; 8182 8183 /* If heartbeat has not changed since we last looked, we're not ok. */ 8184 spin_lock_irqsave(&h->lock, flags); 8185 heartbeat = readl(&h->cfgtable->HeartBeat); 8186 spin_unlock_irqrestore(&h->lock, flags); 8187 if (h->last_heartbeat == heartbeat) { 8188 controller_lockup_detected(h); 8189 return true; 8190 } 8191 8192 /* We're ok. */ 8193 h->last_heartbeat = heartbeat; 8194 h->last_heartbeat_timestamp = now; 8195 return false; 8196 } 8197 8198 /* 8199 * Set ioaccel status for all ioaccel volumes. 8200 * 8201 * Called from monitor controller worker (hpsa_event_monitor_worker) 8202 * 8203 * A Volume (or Volumes that comprise an Array set may be undergoing a 8204 * transformation, so we will be turning off ioaccel for all volumes that 8205 * make up the Array. 8206 */ 8207 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8208 { 8209 int rc; 8210 int i; 8211 u8 ioaccel_status; 8212 unsigned char *buf; 8213 struct hpsa_scsi_dev_t *device; 8214 8215 if (!h) 8216 return; 8217 8218 buf = kmalloc(64, GFP_KERNEL); 8219 if (!buf) 8220 return; 8221 8222 /* 8223 * Run through current device list used during I/O requests. 8224 */ 8225 for (i = 0; i < h->ndevices; i++) { 8226 device = h->dev[i]; 8227 8228 if (!device) 8229 continue; 8230 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8231 HPSA_VPD_LV_IOACCEL_STATUS)) 8232 continue; 8233 8234 memset(buf, 0, 64); 8235 8236 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8237 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8238 buf, 64); 8239 if (rc != 0) 8240 continue; 8241 8242 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8243 device->offload_config = 8244 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8245 if (device->offload_config) 8246 device->offload_to_be_enabled = 8247 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8248 8249 /* 8250 * Immediately turn off ioaccel for any volume the 8251 * controller tells us to. Some of the reasons could be: 8252 * transformation - change to the LVs of an Array. 8253 * degraded volume - component failure 8254 * 8255 * If ioaccel is to be re-enabled, re-enable later during the 8256 * scan operation so the driver can get a fresh raidmap 8257 * before turning ioaccel back on. 8258 * 8259 */ 8260 if (!device->offload_to_be_enabled) 8261 device->offload_enabled = 0; 8262 } 8263 8264 kfree(buf); 8265 } 8266 8267 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8268 { 8269 char *event_type; 8270 8271 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8272 return; 8273 8274 /* Ask the controller to clear the events we're handling. */ 8275 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8276 | CFGTBL_Trans_io_accel2)) && 8277 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8278 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8279 8280 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8281 event_type = "state change"; 8282 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8283 event_type = "configuration change"; 8284 /* Stop sending new RAID offload reqs via the IO accelerator */ 8285 scsi_block_requests(h->scsi_host); 8286 hpsa_set_ioaccel_status(h); 8287 hpsa_drain_accel_commands(h); 8288 /* Set 'accelerator path config change' bit */ 8289 dev_warn(&h->pdev->dev, 8290 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8291 h->events, event_type); 8292 writel(h->events, &(h->cfgtable->clear_event_notify)); 8293 /* Set the "clear event notify field update" bit 6 */ 8294 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8295 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8296 hpsa_wait_for_clear_event_notify_ack(h); 8297 scsi_unblock_requests(h->scsi_host); 8298 } else { 8299 /* Acknowledge controller notification events. */ 8300 writel(h->events, &(h->cfgtable->clear_event_notify)); 8301 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8302 hpsa_wait_for_clear_event_notify_ack(h); 8303 } 8304 return; 8305 } 8306 8307 /* Check a register on the controller to see if there are configuration 8308 * changes (added/changed/removed logical drives, etc.) which mean that 8309 * we should rescan the controller for devices. 8310 * Also check flag for driver-initiated rescan. 8311 */ 8312 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8313 { 8314 if (h->drv_req_rescan) { 8315 h->drv_req_rescan = 0; 8316 return 1; 8317 } 8318 8319 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8320 return 0; 8321 8322 h->events = readl(&(h->cfgtable->event_notify)); 8323 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8324 } 8325 8326 /* 8327 * Check if any of the offline devices have become ready 8328 */ 8329 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8330 { 8331 unsigned long flags; 8332 struct offline_device_entry *d; 8333 struct list_head *this, *tmp; 8334 8335 spin_lock_irqsave(&h->offline_device_lock, flags); 8336 list_for_each_safe(this, tmp, &h->offline_device_list) { 8337 d = list_entry(this, struct offline_device_entry, 8338 offline_list); 8339 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8340 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8341 spin_lock_irqsave(&h->offline_device_lock, flags); 8342 list_del(&d->offline_list); 8343 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8344 return 1; 8345 } 8346 spin_lock_irqsave(&h->offline_device_lock, flags); 8347 } 8348 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8349 return 0; 8350 } 8351 8352 static int hpsa_luns_changed(struct ctlr_info *h) 8353 { 8354 int rc = 1; /* assume there are changes */ 8355 struct ReportLUNdata *logdev = NULL; 8356 8357 /* if we can't find out if lun data has changed, 8358 * assume that it has. 8359 */ 8360 8361 if (!h->lastlogicals) 8362 return rc; 8363 8364 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8365 if (!logdev) 8366 return rc; 8367 8368 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8369 dev_warn(&h->pdev->dev, 8370 "report luns failed, can't track lun changes.\n"); 8371 goto out; 8372 } 8373 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8374 dev_info(&h->pdev->dev, 8375 "Lun changes detected.\n"); 8376 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8377 goto out; 8378 } else 8379 rc = 0; /* no changes detected. */ 8380 out: 8381 kfree(logdev); 8382 return rc; 8383 } 8384 8385 static void hpsa_perform_rescan(struct ctlr_info *h) 8386 { 8387 struct Scsi_Host *sh = NULL; 8388 unsigned long flags; 8389 8390 /* 8391 * Do the scan after the reset 8392 */ 8393 spin_lock_irqsave(&h->reset_lock, flags); 8394 if (h->reset_in_progress) { 8395 h->drv_req_rescan = 1; 8396 spin_unlock_irqrestore(&h->reset_lock, flags); 8397 return; 8398 } 8399 spin_unlock_irqrestore(&h->reset_lock, flags); 8400 8401 sh = scsi_host_get(h->scsi_host); 8402 if (sh != NULL) { 8403 hpsa_scan_start(sh); 8404 scsi_host_put(sh); 8405 h->drv_req_rescan = 0; 8406 } 8407 } 8408 8409 /* 8410 * watch for controller events 8411 */ 8412 static void hpsa_event_monitor_worker(struct work_struct *work) 8413 { 8414 struct ctlr_info *h = container_of(to_delayed_work(work), 8415 struct ctlr_info, event_monitor_work); 8416 unsigned long flags; 8417 8418 spin_lock_irqsave(&h->lock, flags); 8419 if (h->remove_in_progress) { 8420 spin_unlock_irqrestore(&h->lock, flags); 8421 return; 8422 } 8423 spin_unlock_irqrestore(&h->lock, flags); 8424 8425 if (hpsa_ctlr_needs_rescan(h)) { 8426 hpsa_ack_ctlr_events(h); 8427 hpsa_perform_rescan(h); 8428 } 8429 8430 spin_lock_irqsave(&h->lock, flags); 8431 if (!h->remove_in_progress) 8432 schedule_delayed_work(&h->event_monitor_work, 8433 HPSA_EVENT_MONITOR_INTERVAL); 8434 spin_unlock_irqrestore(&h->lock, flags); 8435 } 8436 8437 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8438 { 8439 unsigned long flags; 8440 struct ctlr_info *h = container_of(to_delayed_work(work), 8441 struct ctlr_info, rescan_ctlr_work); 8442 8443 spin_lock_irqsave(&h->lock, flags); 8444 if (h->remove_in_progress) { 8445 spin_unlock_irqrestore(&h->lock, flags); 8446 return; 8447 } 8448 spin_unlock_irqrestore(&h->lock, flags); 8449 8450 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8451 hpsa_perform_rescan(h); 8452 } else if (h->discovery_polling) { 8453 if (hpsa_luns_changed(h)) { 8454 dev_info(&h->pdev->dev, 8455 "driver discovery polling rescan.\n"); 8456 hpsa_perform_rescan(h); 8457 } 8458 } 8459 spin_lock_irqsave(&h->lock, flags); 8460 if (!h->remove_in_progress) 8461 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8462 h->heartbeat_sample_interval); 8463 spin_unlock_irqrestore(&h->lock, flags); 8464 } 8465 8466 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8467 { 8468 unsigned long flags; 8469 struct ctlr_info *h = container_of(to_delayed_work(work), 8470 struct ctlr_info, monitor_ctlr_work); 8471 8472 detect_controller_lockup(h); 8473 if (lockup_detected(h)) 8474 return; 8475 8476 spin_lock_irqsave(&h->lock, flags); 8477 if (!h->remove_in_progress) 8478 schedule_delayed_work(&h->monitor_ctlr_work, 8479 h->heartbeat_sample_interval); 8480 spin_unlock_irqrestore(&h->lock, flags); 8481 } 8482 8483 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8484 char *name) 8485 { 8486 struct workqueue_struct *wq = NULL; 8487 8488 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8489 if (!wq) 8490 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8491 8492 return wq; 8493 } 8494 8495 static void hpda_free_ctlr_info(struct ctlr_info *h) 8496 { 8497 kfree(h->reply_map); 8498 kfree(h); 8499 } 8500 8501 static struct ctlr_info *hpda_alloc_ctlr_info(void) 8502 { 8503 struct ctlr_info *h; 8504 8505 h = kzalloc(sizeof(*h), GFP_KERNEL); 8506 if (!h) 8507 return NULL; 8508 8509 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 8510 if (!h->reply_map) { 8511 kfree(h); 8512 return NULL; 8513 } 8514 return h; 8515 } 8516 8517 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8518 { 8519 int dac, rc; 8520 struct ctlr_info *h; 8521 int try_soft_reset = 0; 8522 unsigned long flags; 8523 u32 board_id; 8524 8525 if (number_of_controllers == 0) 8526 printk(KERN_INFO DRIVER_NAME "\n"); 8527 8528 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8529 if (rc < 0) { 8530 dev_warn(&pdev->dev, "Board ID not found\n"); 8531 return rc; 8532 } 8533 8534 rc = hpsa_init_reset_devices(pdev, board_id); 8535 if (rc) { 8536 if (rc != -ENOTSUPP) 8537 return rc; 8538 /* If the reset fails in a particular way (it has no way to do 8539 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8540 * a soft reset once we get the controller configured up to the 8541 * point that it can accept a command. 8542 */ 8543 try_soft_reset = 1; 8544 rc = 0; 8545 } 8546 8547 reinit_after_soft_reset: 8548 8549 /* Command structures must be aligned on a 32-byte boundary because 8550 * the 5 lower bits of the address are used by the hardware. and by 8551 * the driver. See comments in hpsa.h for more info. 8552 */ 8553 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8554 h = hpda_alloc_ctlr_info(); 8555 if (!h) { 8556 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8557 return -ENOMEM; 8558 } 8559 8560 h->pdev = pdev; 8561 8562 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8563 INIT_LIST_HEAD(&h->offline_device_list); 8564 spin_lock_init(&h->lock); 8565 spin_lock_init(&h->offline_device_lock); 8566 spin_lock_init(&h->scan_lock); 8567 spin_lock_init(&h->reset_lock); 8568 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8569 8570 /* Allocate and clear per-cpu variable lockup_detected */ 8571 h->lockup_detected = alloc_percpu(u32); 8572 if (!h->lockup_detected) { 8573 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8574 rc = -ENOMEM; 8575 goto clean1; /* aer/h */ 8576 } 8577 set_lockup_detected_for_all_cpus(h, 0); 8578 8579 rc = hpsa_pci_init(h); 8580 if (rc) 8581 goto clean2; /* lu, aer/h */ 8582 8583 /* relies on h-> settings made by hpsa_pci_init, including 8584 * interrupt_mode h->intr */ 8585 rc = hpsa_scsi_host_alloc(h); 8586 if (rc) 8587 goto clean2_5; /* pci, lu, aer/h */ 8588 8589 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8590 h->ctlr = number_of_controllers; 8591 number_of_controllers++; 8592 8593 /* configure PCI DMA stuff */ 8594 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8595 if (rc == 0) { 8596 dac = 1; 8597 } else { 8598 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8599 if (rc == 0) { 8600 dac = 0; 8601 } else { 8602 dev_err(&pdev->dev, "no suitable DMA available\n"); 8603 goto clean3; /* shost, pci, lu, aer/h */ 8604 } 8605 } 8606 8607 /* make sure the board interrupts are off */ 8608 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8609 8610 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8611 if (rc) 8612 goto clean3; /* shost, pci, lu, aer/h */ 8613 rc = hpsa_alloc_cmd_pool(h); 8614 if (rc) 8615 goto clean4; /* irq, shost, pci, lu, aer/h */ 8616 rc = hpsa_alloc_sg_chain_blocks(h); 8617 if (rc) 8618 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8619 init_waitqueue_head(&h->scan_wait_queue); 8620 init_waitqueue_head(&h->event_sync_wait_queue); 8621 mutex_init(&h->reset_mutex); 8622 h->scan_finished = 1; /* no scan currently in progress */ 8623 h->scan_waiting = 0; 8624 8625 pci_set_drvdata(pdev, h); 8626 h->ndevices = 0; 8627 8628 spin_lock_init(&h->devlock); 8629 rc = hpsa_put_ctlr_into_performant_mode(h); 8630 if (rc) 8631 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8632 8633 /* create the resubmit workqueue */ 8634 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8635 if (!h->rescan_ctlr_wq) { 8636 rc = -ENOMEM; 8637 goto clean7; 8638 } 8639 8640 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8641 if (!h->resubmit_wq) { 8642 rc = -ENOMEM; 8643 goto clean7; /* aer/h */ 8644 } 8645 8646 /* 8647 * At this point, the controller is ready to take commands. 8648 * Now, if reset_devices and the hard reset didn't work, try 8649 * the soft reset and see if that works. 8650 */ 8651 if (try_soft_reset) { 8652 8653 /* This is kind of gross. We may or may not get a completion 8654 * from the soft reset command, and if we do, then the value 8655 * from the fifo may or may not be valid. So, we wait 10 secs 8656 * after the reset throwing away any completions we get during 8657 * that time. Unregister the interrupt handler and register 8658 * fake ones to scoop up any residual completions. 8659 */ 8660 spin_lock_irqsave(&h->lock, flags); 8661 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8662 spin_unlock_irqrestore(&h->lock, flags); 8663 hpsa_free_irqs(h); 8664 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8665 hpsa_intx_discard_completions); 8666 if (rc) { 8667 dev_warn(&h->pdev->dev, 8668 "Failed to request_irq after soft reset.\n"); 8669 /* 8670 * cannot goto clean7 or free_irqs will be called 8671 * again. Instead, do its work 8672 */ 8673 hpsa_free_performant_mode(h); /* clean7 */ 8674 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8675 hpsa_free_cmd_pool(h); /* clean5 */ 8676 /* 8677 * skip hpsa_free_irqs(h) clean4 since that 8678 * was just called before request_irqs failed 8679 */ 8680 goto clean3; 8681 } 8682 8683 rc = hpsa_kdump_soft_reset(h); 8684 if (rc) 8685 /* Neither hard nor soft reset worked, we're hosed. */ 8686 goto clean7; 8687 8688 dev_info(&h->pdev->dev, "Board READY.\n"); 8689 dev_info(&h->pdev->dev, 8690 "Waiting for stale completions to drain.\n"); 8691 h->access.set_intr_mask(h, HPSA_INTR_ON); 8692 msleep(10000); 8693 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8694 8695 rc = controller_reset_failed(h->cfgtable); 8696 if (rc) 8697 dev_info(&h->pdev->dev, 8698 "Soft reset appears to have failed.\n"); 8699 8700 /* since the controller's reset, we have to go back and re-init 8701 * everything. Easiest to just forget what we've done and do it 8702 * all over again. 8703 */ 8704 hpsa_undo_allocations_after_kdump_soft_reset(h); 8705 try_soft_reset = 0; 8706 if (rc) 8707 /* don't goto clean, we already unallocated */ 8708 return -ENODEV; 8709 8710 goto reinit_after_soft_reset; 8711 } 8712 8713 /* Enable Accelerated IO path at driver layer */ 8714 h->acciopath_status = 1; 8715 /* Disable discovery polling.*/ 8716 h->discovery_polling = 0; 8717 8718 8719 /* Turn the interrupts on so we can service requests */ 8720 h->access.set_intr_mask(h, HPSA_INTR_ON); 8721 8722 hpsa_hba_inquiry(h); 8723 8724 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8725 if (!h->lastlogicals) 8726 dev_info(&h->pdev->dev, 8727 "Can't track change to report lun data\n"); 8728 8729 /* hook into SCSI subsystem */ 8730 rc = hpsa_scsi_add_host(h); 8731 if (rc) 8732 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8733 8734 /* Monitor the controller for firmware lockups */ 8735 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8736 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8737 schedule_delayed_work(&h->monitor_ctlr_work, 8738 h->heartbeat_sample_interval); 8739 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8740 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8741 h->heartbeat_sample_interval); 8742 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8743 schedule_delayed_work(&h->event_monitor_work, 8744 HPSA_EVENT_MONITOR_INTERVAL); 8745 return 0; 8746 8747 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8748 hpsa_free_performant_mode(h); 8749 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8750 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8751 hpsa_free_sg_chain_blocks(h); 8752 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8753 hpsa_free_cmd_pool(h); 8754 clean4: /* irq, shost, pci, lu, aer/h */ 8755 hpsa_free_irqs(h); 8756 clean3: /* shost, pci, lu, aer/h */ 8757 scsi_host_put(h->scsi_host); 8758 h->scsi_host = NULL; 8759 clean2_5: /* pci, lu, aer/h */ 8760 hpsa_free_pci_init(h); 8761 clean2: /* lu, aer/h */ 8762 if (h->lockup_detected) { 8763 free_percpu(h->lockup_detected); 8764 h->lockup_detected = NULL; 8765 } 8766 clean1: /* wq/aer/h */ 8767 if (h->resubmit_wq) { 8768 destroy_workqueue(h->resubmit_wq); 8769 h->resubmit_wq = NULL; 8770 } 8771 if (h->rescan_ctlr_wq) { 8772 destroy_workqueue(h->rescan_ctlr_wq); 8773 h->rescan_ctlr_wq = NULL; 8774 } 8775 kfree(h); 8776 return rc; 8777 } 8778 8779 static void hpsa_flush_cache(struct ctlr_info *h) 8780 { 8781 char *flush_buf; 8782 struct CommandList *c; 8783 int rc; 8784 8785 if (unlikely(lockup_detected(h))) 8786 return; 8787 flush_buf = kzalloc(4, GFP_KERNEL); 8788 if (!flush_buf) 8789 return; 8790 8791 c = cmd_alloc(h); 8792 8793 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8794 RAID_CTLR_LUNID, TYPE_CMD)) { 8795 goto out; 8796 } 8797 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8798 DEFAULT_TIMEOUT); 8799 if (rc) 8800 goto out; 8801 if (c->err_info->CommandStatus != 0) 8802 out: 8803 dev_warn(&h->pdev->dev, 8804 "error flushing cache on controller\n"); 8805 cmd_free(h, c); 8806 kfree(flush_buf); 8807 } 8808 8809 /* Make controller gather fresh report lun data each time we 8810 * send down a report luns request 8811 */ 8812 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8813 { 8814 u32 *options; 8815 struct CommandList *c; 8816 int rc; 8817 8818 /* Don't bother trying to set diag options if locked up */ 8819 if (unlikely(h->lockup_detected)) 8820 return; 8821 8822 options = kzalloc(sizeof(*options), GFP_KERNEL); 8823 if (!options) 8824 return; 8825 8826 c = cmd_alloc(h); 8827 8828 /* first, get the current diag options settings */ 8829 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8830 RAID_CTLR_LUNID, TYPE_CMD)) 8831 goto errout; 8832 8833 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8834 NO_TIMEOUT); 8835 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8836 goto errout; 8837 8838 /* Now, set the bit for disabling the RLD caching */ 8839 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8840 8841 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8842 RAID_CTLR_LUNID, TYPE_CMD)) 8843 goto errout; 8844 8845 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8846 NO_TIMEOUT); 8847 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8848 goto errout; 8849 8850 /* Now verify that it got set: */ 8851 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8852 RAID_CTLR_LUNID, TYPE_CMD)) 8853 goto errout; 8854 8855 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8856 NO_TIMEOUT); 8857 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8858 goto errout; 8859 8860 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8861 goto out; 8862 8863 errout: 8864 dev_err(&h->pdev->dev, 8865 "Error: failed to disable report lun data caching.\n"); 8866 out: 8867 cmd_free(h, c); 8868 kfree(options); 8869 } 8870 8871 static void __hpsa_shutdown(struct pci_dev *pdev) 8872 { 8873 struct ctlr_info *h; 8874 8875 h = pci_get_drvdata(pdev); 8876 /* Turn board interrupts off and send the flush cache command 8877 * sendcmd will turn off interrupt, and send the flush... 8878 * To write all data in the battery backed cache to disks 8879 */ 8880 hpsa_flush_cache(h); 8881 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8882 hpsa_free_irqs(h); /* init_one 4 */ 8883 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8884 } 8885 8886 static void hpsa_shutdown(struct pci_dev *pdev) 8887 { 8888 __hpsa_shutdown(pdev); 8889 pci_disable_device(pdev); 8890 } 8891 8892 static void hpsa_free_device_info(struct ctlr_info *h) 8893 { 8894 int i; 8895 8896 for (i = 0; i < h->ndevices; i++) { 8897 kfree(h->dev[i]); 8898 h->dev[i] = NULL; 8899 } 8900 } 8901 8902 static void hpsa_remove_one(struct pci_dev *pdev) 8903 { 8904 struct ctlr_info *h; 8905 unsigned long flags; 8906 8907 if (pci_get_drvdata(pdev) == NULL) { 8908 dev_err(&pdev->dev, "unable to remove device\n"); 8909 return; 8910 } 8911 h = pci_get_drvdata(pdev); 8912 8913 /* Get rid of any controller monitoring work items */ 8914 spin_lock_irqsave(&h->lock, flags); 8915 h->remove_in_progress = 1; 8916 spin_unlock_irqrestore(&h->lock, flags); 8917 cancel_delayed_work_sync(&h->monitor_ctlr_work); 8918 cancel_delayed_work_sync(&h->rescan_ctlr_work); 8919 cancel_delayed_work_sync(&h->event_monitor_work); 8920 destroy_workqueue(h->rescan_ctlr_wq); 8921 destroy_workqueue(h->resubmit_wq); 8922 8923 hpsa_delete_sas_host(h); 8924 8925 /* 8926 * Call before disabling interrupts. 8927 * scsi_remove_host can trigger I/O operations especially 8928 * when multipath is enabled. There can be SYNCHRONIZE CACHE 8929 * operations which cannot complete and will hang the system. 8930 */ 8931 if (h->scsi_host) 8932 scsi_remove_host(h->scsi_host); /* init_one 8 */ 8933 /* includes hpsa_free_irqs - init_one 4 */ 8934 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8935 __hpsa_shutdown(pdev); 8936 8937 hpsa_free_device_info(h); /* scan */ 8938 8939 kfree(h->hba_inquiry_data); /* init_one 10 */ 8940 h->hba_inquiry_data = NULL; /* init_one 10 */ 8941 hpsa_free_ioaccel2_sg_chain_blocks(h); 8942 hpsa_free_performant_mode(h); /* init_one 7 */ 8943 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8944 hpsa_free_cmd_pool(h); /* init_one 5 */ 8945 kfree(h->lastlogicals); 8946 8947 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8948 8949 scsi_host_put(h->scsi_host); /* init_one 3 */ 8950 h->scsi_host = NULL; /* init_one 3 */ 8951 8952 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8953 hpsa_free_pci_init(h); /* init_one 2.5 */ 8954 8955 free_percpu(h->lockup_detected); /* init_one 2 */ 8956 h->lockup_detected = NULL; /* init_one 2 */ 8957 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8958 8959 hpda_free_ctlr_info(h); /* init_one 1 */ 8960 } 8961 8962 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8963 __attribute__((unused)) pm_message_t state) 8964 { 8965 return -ENOSYS; 8966 } 8967 8968 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8969 { 8970 return -ENOSYS; 8971 } 8972 8973 static struct pci_driver hpsa_pci_driver = { 8974 .name = HPSA, 8975 .probe = hpsa_init_one, 8976 .remove = hpsa_remove_one, 8977 .id_table = hpsa_pci_device_id, /* id_table */ 8978 .shutdown = hpsa_shutdown, 8979 .suspend = hpsa_suspend, 8980 .resume = hpsa_resume, 8981 }; 8982 8983 /* Fill in bucket_map[], given nsgs (the max number of 8984 * scatter gather elements supported) and bucket[], 8985 * which is an array of 8 integers. The bucket[] array 8986 * contains 8 different DMA transfer sizes (in 16 8987 * byte increments) which the controller uses to fetch 8988 * commands. This function fills in bucket_map[], which 8989 * maps a given number of scatter gather elements to one of 8990 * the 8 DMA transfer sizes. The point of it is to allow the 8991 * controller to only do as much DMA as needed to fetch the 8992 * command, with the DMA transfer size encoded in the lower 8993 * bits of the command address. 8994 */ 8995 static void calc_bucket_map(int bucket[], int num_buckets, 8996 int nsgs, int min_blocks, u32 *bucket_map) 8997 { 8998 int i, j, b, size; 8999 9000 /* Note, bucket_map must have nsgs+1 entries. */ 9001 for (i = 0; i <= nsgs; i++) { 9002 /* Compute size of a command with i SG entries */ 9003 size = i + min_blocks; 9004 b = num_buckets; /* Assume the biggest bucket */ 9005 /* Find the bucket that is just big enough */ 9006 for (j = 0; j < num_buckets; j++) { 9007 if (bucket[j] >= size) { 9008 b = j; 9009 break; 9010 } 9011 } 9012 /* for a command with i SG entries, use bucket b. */ 9013 bucket_map[i] = b; 9014 } 9015 } 9016 9017 /* 9018 * return -ENODEV on err, 0 on success (or no action) 9019 * allocates numerous items that must be freed later 9020 */ 9021 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9022 { 9023 int i; 9024 unsigned long register_value; 9025 unsigned long transMethod = CFGTBL_Trans_Performant | 9026 (trans_support & CFGTBL_Trans_use_short_tags) | 9027 CFGTBL_Trans_enable_directed_msix | 9028 (trans_support & (CFGTBL_Trans_io_accel1 | 9029 CFGTBL_Trans_io_accel2)); 9030 struct access_method access = SA5_performant_access; 9031 9032 /* This is a bit complicated. There are 8 registers on 9033 * the controller which we write to to tell it 8 different 9034 * sizes of commands which there may be. It's a way of 9035 * reducing the DMA done to fetch each command. Encoded into 9036 * each command's tag are 3 bits which communicate to the controller 9037 * which of the eight sizes that command fits within. The size of 9038 * each command depends on how many scatter gather entries there are. 9039 * Each SG entry requires 16 bytes. The eight registers are programmed 9040 * with the number of 16-byte blocks a command of that size requires. 9041 * The smallest command possible requires 5 such 16 byte blocks. 9042 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9043 * blocks. Note, this only extends to the SG entries contained 9044 * within the command block, and does not extend to chained blocks 9045 * of SG elements. bft[] contains the eight values we write to 9046 * the registers. They are not evenly distributed, but have more 9047 * sizes for small commands, and fewer sizes for larger commands. 9048 */ 9049 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9050 #define MIN_IOACCEL2_BFT_ENTRY 5 9051 #define HPSA_IOACCEL2_HEADER_SZ 4 9052 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9053 13, 14, 15, 16, 17, 18, 19, 9054 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9055 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9056 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9057 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9058 16 * MIN_IOACCEL2_BFT_ENTRY); 9059 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9060 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9061 /* 5 = 1 s/g entry or 4k 9062 * 6 = 2 s/g entry or 8k 9063 * 8 = 4 s/g entry or 16k 9064 * 10 = 6 s/g entry or 24k 9065 */ 9066 9067 /* If the controller supports either ioaccel method then 9068 * we can also use the RAID stack submit path that does not 9069 * perform the superfluous readl() after each command submission. 9070 */ 9071 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9072 access = SA5_performant_access_no_read; 9073 9074 /* Controller spec: zero out this buffer. */ 9075 for (i = 0; i < h->nreply_queues; i++) 9076 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9077 9078 bft[7] = SG_ENTRIES_IN_CMD + 4; 9079 calc_bucket_map(bft, ARRAY_SIZE(bft), 9080 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9081 for (i = 0; i < 8; i++) 9082 writel(bft[i], &h->transtable->BlockFetch[i]); 9083 9084 /* size of controller ring buffer */ 9085 writel(h->max_commands, &h->transtable->RepQSize); 9086 writel(h->nreply_queues, &h->transtable->RepQCount); 9087 writel(0, &h->transtable->RepQCtrAddrLow32); 9088 writel(0, &h->transtable->RepQCtrAddrHigh32); 9089 9090 for (i = 0; i < h->nreply_queues; i++) { 9091 writel(0, &h->transtable->RepQAddr[i].upper); 9092 writel(h->reply_queue[i].busaddr, 9093 &h->transtable->RepQAddr[i].lower); 9094 } 9095 9096 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9097 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9098 /* 9099 * enable outbound interrupt coalescing in accelerator mode; 9100 */ 9101 if (trans_support & CFGTBL_Trans_io_accel1) { 9102 access = SA5_ioaccel_mode1_access; 9103 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9104 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9105 } else 9106 if (trans_support & CFGTBL_Trans_io_accel2) 9107 access = SA5_ioaccel_mode2_access; 9108 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9109 if (hpsa_wait_for_mode_change_ack(h)) { 9110 dev_err(&h->pdev->dev, 9111 "performant mode problem - doorbell timeout\n"); 9112 return -ENODEV; 9113 } 9114 register_value = readl(&(h->cfgtable->TransportActive)); 9115 if (!(register_value & CFGTBL_Trans_Performant)) { 9116 dev_err(&h->pdev->dev, 9117 "performant mode problem - transport not active\n"); 9118 return -ENODEV; 9119 } 9120 /* Change the access methods to the performant access methods */ 9121 h->access = access; 9122 h->transMethod = transMethod; 9123 9124 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9125 (trans_support & CFGTBL_Trans_io_accel2))) 9126 return 0; 9127 9128 if (trans_support & CFGTBL_Trans_io_accel1) { 9129 /* Set up I/O accelerator mode */ 9130 for (i = 0; i < h->nreply_queues; i++) { 9131 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9132 h->reply_queue[i].current_entry = 9133 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9134 } 9135 bft[7] = h->ioaccel_maxsg + 8; 9136 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9137 h->ioaccel1_blockFetchTable); 9138 9139 /* initialize all reply queue entries to unused */ 9140 for (i = 0; i < h->nreply_queues; i++) 9141 memset(h->reply_queue[i].head, 9142 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9143 h->reply_queue_size); 9144 9145 /* set all the constant fields in the accelerator command 9146 * frames once at init time to save CPU cycles later. 9147 */ 9148 for (i = 0; i < h->nr_cmds; i++) { 9149 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9150 9151 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9152 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9153 (i * sizeof(struct ErrorInfo))); 9154 cp->err_info_len = sizeof(struct ErrorInfo); 9155 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9156 cp->host_context_flags = 9157 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9158 cp->timeout_sec = 0; 9159 cp->ReplyQueue = 0; 9160 cp->tag = 9161 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9162 cp->host_addr = 9163 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9164 (i * sizeof(struct io_accel1_cmd))); 9165 } 9166 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9167 u64 cfg_offset, cfg_base_addr_index; 9168 u32 bft2_offset, cfg_base_addr; 9169 int rc; 9170 9171 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9172 &cfg_base_addr_index, &cfg_offset); 9173 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9174 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9175 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9176 4, h->ioaccel2_blockFetchTable); 9177 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9178 BUILD_BUG_ON(offsetof(struct CfgTable, 9179 io_accel_request_size_offset) != 0xb8); 9180 h->ioaccel2_bft2_regs = 9181 remap_pci_mem(pci_resource_start(h->pdev, 9182 cfg_base_addr_index) + 9183 cfg_offset + bft2_offset, 9184 ARRAY_SIZE(bft2) * 9185 sizeof(*h->ioaccel2_bft2_regs)); 9186 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9187 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9188 } 9189 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9190 if (hpsa_wait_for_mode_change_ack(h)) { 9191 dev_err(&h->pdev->dev, 9192 "performant mode problem - enabling ioaccel mode\n"); 9193 return -ENODEV; 9194 } 9195 return 0; 9196 } 9197 9198 /* Free ioaccel1 mode command blocks and block fetch table */ 9199 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9200 { 9201 if (h->ioaccel_cmd_pool) { 9202 pci_free_consistent(h->pdev, 9203 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9204 h->ioaccel_cmd_pool, 9205 h->ioaccel_cmd_pool_dhandle); 9206 h->ioaccel_cmd_pool = NULL; 9207 h->ioaccel_cmd_pool_dhandle = 0; 9208 } 9209 kfree(h->ioaccel1_blockFetchTable); 9210 h->ioaccel1_blockFetchTable = NULL; 9211 } 9212 9213 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9214 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9215 { 9216 h->ioaccel_maxsg = 9217 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9218 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9219 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9220 9221 /* Command structures must be aligned on a 128-byte boundary 9222 * because the 7 lower bits of the address are used by the 9223 * hardware. 9224 */ 9225 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9226 IOACCEL1_COMMANDLIST_ALIGNMENT); 9227 h->ioaccel_cmd_pool = 9228 dma_alloc_coherent(&h->pdev->dev, 9229 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9230 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9231 9232 h->ioaccel1_blockFetchTable = 9233 kmalloc(((h->ioaccel_maxsg + 1) * 9234 sizeof(u32)), GFP_KERNEL); 9235 9236 if ((h->ioaccel_cmd_pool == NULL) || 9237 (h->ioaccel1_blockFetchTable == NULL)) 9238 goto clean_up; 9239 9240 memset(h->ioaccel_cmd_pool, 0, 9241 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9242 return 0; 9243 9244 clean_up: 9245 hpsa_free_ioaccel1_cmd_and_bft(h); 9246 return -ENOMEM; 9247 } 9248 9249 /* Free ioaccel2 mode command blocks and block fetch table */ 9250 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9251 { 9252 hpsa_free_ioaccel2_sg_chain_blocks(h); 9253 9254 if (h->ioaccel2_cmd_pool) { 9255 pci_free_consistent(h->pdev, 9256 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9257 h->ioaccel2_cmd_pool, 9258 h->ioaccel2_cmd_pool_dhandle); 9259 h->ioaccel2_cmd_pool = NULL; 9260 h->ioaccel2_cmd_pool_dhandle = 0; 9261 } 9262 kfree(h->ioaccel2_blockFetchTable); 9263 h->ioaccel2_blockFetchTable = NULL; 9264 } 9265 9266 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9267 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9268 { 9269 int rc; 9270 9271 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9272 9273 h->ioaccel_maxsg = 9274 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9275 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9276 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9277 9278 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9279 IOACCEL2_COMMANDLIST_ALIGNMENT); 9280 h->ioaccel2_cmd_pool = 9281 dma_alloc_coherent(&h->pdev->dev, 9282 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9283 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9284 9285 h->ioaccel2_blockFetchTable = 9286 kmalloc(((h->ioaccel_maxsg + 1) * 9287 sizeof(u32)), GFP_KERNEL); 9288 9289 if ((h->ioaccel2_cmd_pool == NULL) || 9290 (h->ioaccel2_blockFetchTable == NULL)) { 9291 rc = -ENOMEM; 9292 goto clean_up; 9293 } 9294 9295 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9296 if (rc) 9297 goto clean_up; 9298 9299 memset(h->ioaccel2_cmd_pool, 0, 9300 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9301 return 0; 9302 9303 clean_up: 9304 hpsa_free_ioaccel2_cmd_and_bft(h); 9305 return rc; 9306 } 9307 9308 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9309 static void hpsa_free_performant_mode(struct ctlr_info *h) 9310 { 9311 kfree(h->blockFetchTable); 9312 h->blockFetchTable = NULL; 9313 hpsa_free_reply_queues(h); 9314 hpsa_free_ioaccel1_cmd_and_bft(h); 9315 hpsa_free_ioaccel2_cmd_and_bft(h); 9316 } 9317 9318 /* return -ENODEV on error, 0 on success (or no action) 9319 * allocates numerous items that must be freed later 9320 */ 9321 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9322 { 9323 u32 trans_support; 9324 unsigned long transMethod = CFGTBL_Trans_Performant | 9325 CFGTBL_Trans_use_short_tags; 9326 int i, rc; 9327 9328 if (hpsa_simple_mode) 9329 return 0; 9330 9331 trans_support = readl(&(h->cfgtable->TransportSupport)); 9332 if (!(trans_support & PERFORMANT_MODE)) 9333 return 0; 9334 9335 /* Check for I/O accelerator mode support */ 9336 if (trans_support & CFGTBL_Trans_io_accel1) { 9337 transMethod |= CFGTBL_Trans_io_accel1 | 9338 CFGTBL_Trans_enable_directed_msix; 9339 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9340 if (rc) 9341 return rc; 9342 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9343 transMethod |= CFGTBL_Trans_io_accel2 | 9344 CFGTBL_Trans_enable_directed_msix; 9345 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9346 if (rc) 9347 return rc; 9348 } 9349 9350 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9351 hpsa_get_max_perf_mode_cmds(h); 9352 /* Performant mode ring buffer and supporting data structures */ 9353 h->reply_queue_size = h->max_commands * sizeof(u64); 9354 9355 for (i = 0; i < h->nreply_queues; i++) { 9356 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9357 h->reply_queue_size, 9358 &h->reply_queue[i].busaddr, 9359 GFP_KERNEL); 9360 if (!h->reply_queue[i].head) { 9361 rc = -ENOMEM; 9362 goto clean1; /* rq, ioaccel */ 9363 } 9364 h->reply_queue[i].size = h->max_commands; 9365 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9366 h->reply_queue[i].current_entry = 0; 9367 } 9368 9369 /* Need a block fetch table for performant mode */ 9370 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9371 sizeof(u32)), GFP_KERNEL); 9372 if (!h->blockFetchTable) { 9373 rc = -ENOMEM; 9374 goto clean1; /* rq, ioaccel */ 9375 } 9376 9377 rc = hpsa_enter_performant_mode(h, trans_support); 9378 if (rc) 9379 goto clean2; /* bft, rq, ioaccel */ 9380 return 0; 9381 9382 clean2: /* bft, rq, ioaccel */ 9383 kfree(h->blockFetchTable); 9384 h->blockFetchTable = NULL; 9385 clean1: /* rq, ioaccel */ 9386 hpsa_free_reply_queues(h); 9387 hpsa_free_ioaccel1_cmd_and_bft(h); 9388 hpsa_free_ioaccel2_cmd_and_bft(h); 9389 return rc; 9390 } 9391 9392 static int is_accelerated_cmd(struct CommandList *c) 9393 { 9394 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9395 } 9396 9397 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9398 { 9399 struct CommandList *c = NULL; 9400 int i, accel_cmds_out; 9401 int refcount; 9402 9403 do { /* wait for all outstanding ioaccel commands to drain out */ 9404 accel_cmds_out = 0; 9405 for (i = 0; i < h->nr_cmds; i++) { 9406 c = h->cmd_pool + i; 9407 refcount = atomic_inc_return(&c->refcount); 9408 if (refcount > 1) /* Command is allocated */ 9409 accel_cmds_out += is_accelerated_cmd(c); 9410 cmd_free(h, c); 9411 } 9412 if (accel_cmds_out <= 0) 9413 break; 9414 msleep(100); 9415 } while (1); 9416 } 9417 9418 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9419 struct hpsa_sas_port *hpsa_sas_port) 9420 { 9421 struct hpsa_sas_phy *hpsa_sas_phy; 9422 struct sas_phy *phy; 9423 9424 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9425 if (!hpsa_sas_phy) 9426 return NULL; 9427 9428 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9429 hpsa_sas_port->next_phy_index); 9430 if (!phy) { 9431 kfree(hpsa_sas_phy); 9432 return NULL; 9433 } 9434 9435 hpsa_sas_port->next_phy_index++; 9436 hpsa_sas_phy->phy = phy; 9437 hpsa_sas_phy->parent_port = hpsa_sas_port; 9438 9439 return hpsa_sas_phy; 9440 } 9441 9442 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9443 { 9444 struct sas_phy *phy = hpsa_sas_phy->phy; 9445 9446 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9447 if (hpsa_sas_phy->added_to_port) 9448 list_del(&hpsa_sas_phy->phy_list_entry); 9449 sas_phy_delete(phy); 9450 kfree(hpsa_sas_phy); 9451 } 9452 9453 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9454 { 9455 int rc; 9456 struct hpsa_sas_port *hpsa_sas_port; 9457 struct sas_phy *phy; 9458 struct sas_identify *identify; 9459 9460 hpsa_sas_port = hpsa_sas_phy->parent_port; 9461 phy = hpsa_sas_phy->phy; 9462 9463 identify = &phy->identify; 9464 memset(identify, 0, sizeof(*identify)); 9465 identify->sas_address = hpsa_sas_port->sas_address; 9466 identify->device_type = SAS_END_DEVICE; 9467 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9468 identify->target_port_protocols = SAS_PROTOCOL_STP; 9469 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9470 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9471 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9472 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9473 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9474 9475 rc = sas_phy_add(hpsa_sas_phy->phy); 9476 if (rc) 9477 return rc; 9478 9479 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9480 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9481 &hpsa_sas_port->phy_list_head); 9482 hpsa_sas_phy->added_to_port = true; 9483 9484 return 0; 9485 } 9486 9487 static int 9488 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9489 struct sas_rphy *rphy) 9490 { 9491 struct sas_identify *identify; 9492 9493 identify = &rphy->identify; 9494 identify->sas_address = hpsa_sas_port->sas_address; 9495 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9496 identify->target_port_protocols = SAS_PROTOCOL_STP; 9497 9498 return sas_rphy_add(rphy); 9499 } 9500 9501 static struct hpsa_sas_port 9502 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9503 u64 sas_address) 9504 { 9505 int rc; 9506 struct hpsa_sas_port *hpsa_sas_port; 9507 struct sas_port *port; 9508 9509 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9510 if (!hpsa_sas_port) 9511 return NULL; 9512 9513 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9514 hpsa_sas_port->parent_node = hpsa_sas_node; 9515 9516 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9517 if (!port) 9518 goto free_hpsa_port; 9519 9520 rc = sas_port_add(port); 9521 if (rc) 9522 goto free_sas_port; 9523 9524 hpsa_sas_port->port = port; 9525 hpsa_sas_port->sas_address = sas_address; 9526 list_add_tail(&hpsa_sas_port->port_list_entry, 9527 &hpsa_sas_node->port_list_head); 9528 9529 return hpsa_sas_port; 9530 9531 free_sas_port: 9532 sas_port_free(port); 9533 free_hpsa_port: 9534 kfree(hpsa_sas_port); 9535 9536 return NULL; 9537 } 9538 9539 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9540 { 9541 struct hpsa_sas_phy *hpsa_sas_phy; 9542 struct hpsa_sas_phy *next; 9543 9544 list_for_each_entry_safe(hpsa_sas_phy, next, 9545 &hpsa_sas_port->phy_list_head, phy_list_entry) 9546 hpsa_free_sas_phy(hpsa_sas_phy); 9547 9548 sas_port_delete(hpsa_sas_port->port); 9549 list_del(&hpsa_sas_port->port_list_entry); 9550 kfree(hpsa_sas_port); 9551 } 9552 9553 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9554 { 9555 struct hpsa_sas_node *hpsa_sas_node; 9556 9557 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9558 if (hpsa_sas_node) { 9559 hpsa_sas_node->parent_dev = parent_dev; 9560 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9561 } 9562 9563 return hpsa_sas_node; 9564 } 9565 9566 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9567 { 9568 struct hpsa_sas_port *hpsa_sas_port; 9569 struct hpsa_sas_port *next; 9570 9571 if (!hpsa_sas_node) 9572 return; 9573 9574 list_for_each_entry_safe(hpsa_sas_port, next, 9575 &hpsa_sas_node->port_list_head, port_list_entry) 9576 hpsa_free_sas_port(hpsa_sas_port); 9577 9578 kfree(hpsa_sas_node); 9579 } 9580 9581 static struct hpsa_scsi_dev_t 9582 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9583 struct sas_rphy *rphy) 9584 { 9585 int i; 9586 struct hpsa_scsi_dev_t *device; 9587 9588 for (i = 0; i < h->ndevices; i++) { 9589 device = h->dev[i]; 9590 if (!device->sas_port) 9591 continue; 9592 if (device->sas_port->rphy == rphy) 9593 return device; 9594 } 9595 9596 return NULL; 9597 } 9598 9599 static int hpsa_add_sas_host(struct ctlr_info *h) 9600 { 9601 int rc; 9602 struct device *parent_dev; 9603 struct hpsa_sas_node *hpsa_sas_node; 9604 struct hpsa_sas_port *hpsa_sas_port; 9605 struct hpsa_sas_phy *hpsa_sas_phy; 9606 9607 parent_dev = &h->scsi_host->shost_dev; 9608 9609 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9610 if (!hpsa_sas_node) 9611 return -ENOMEM; 9612 9613 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9614 if (!hpsa_sas_port) { 9615 rc = -ENODEV; 9616 goto free_sas_node; 9617 } 9618 9619 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9620 if (!hpsa_sas_phy) { 9621 rc = -ENODEV; 9622 goto free_sas_port; 9623 } 9624 9625 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9626 if (rc) 9627 goto free_sas_phy; 9628 9629 h->sas_host = hpsa_sas_node; 9630 9631 return 0; 9632 9633 free_sas_phy: 9634 hpsa_free_sas_phy(hpsa_sas_phy); 9635 free_sas_port: 9636 hpsa_free_sas_port(hpsa_sas_port); 9637 free_sas_node: 9638 hpsa_free_sas_node(hpsa_sas_node); 9639 9640 return rc; 9641 } 9642 9643 static void hpsa_delete_sas_host(struct ctlr_info *h) 9644 { 9645 hpsa_free_sas_node(h->sas_host); 9646 } 9647 9648 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9649 struct hpsa_scsi_dev_t *device) 9650 { 9651 int rc; 9652 struct hpsa_sas_port *hpsa_sas_port; 9653 struct sas_rphy *rphy; 9654 9655 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9656 if (!hpsa_sas_port) 9657 return -ENOMEM; 9658 9659 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9660 if (!rphy) { 9661 rc = -ENODEV; 9662 goto free_sas_port; 9663 } 9664 9665 hpsa_sas_port->rphy = rphy; 9666 device->sas_port = hpsa_sas_port; 9667 9668 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9669 if (rc) 9670 goto free_sas_port; 9671 9672 return 0; 9673 9674 free_sas_port: 9675 hpsa_free_sas_port(hpsa_sas_port); 9676 device->sas_port = NULL; 9677 9678 return rc; 9679 } 9680 9681 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9682 { 9683 if (device->sas_port) { 9684 hpsa_free_sas_port(device->sas_port); 9685 device->sas_port = NULL; 9686 } 9687 } 9688 9689 static int 9690 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9691 { 9692 return 0; 9693 } 9694 9695 static int 9696 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9697 { 9698 struct Scsi_Host *shost = phy_to_shost(rphy); 9699 struct ctlr_info *h; 9700 struct hpsa_scsi_dev_t *sd; 9701 9702 if (!shost) 9703 return -ENXIO; 9704 9705 h = shost_to_hba(shost); 9706 9707 if (!h) 9708 return -ENXIO; 9709 9710 sd = hpsa_find_device_by_sas_rphy(h, rphy); 9711 if (!sd) 9712 return -ENXIO; 9713 9714 *identifier = sd->eli; 9715 9716 return 0; 9717 } 9718 9719 static int 9720 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9721 { 9722 return -ENXIO; 9723 } 9724 9725 static int 9726 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9727 { 9728 return 0; 9729 } 9730 9731 static int 9732 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9733 { 9734 return 0; 9735 } 9736 9737 static int 9738 hpsa_sas_phy_setup(struct sas_phy *phy) 9739 { 9740 return 0; 9741 } 9742 9743 static void 9744 hpsa_sas_phy_release(struct sas_phy *phy) 9745 { 9746 } 9747 9748 static int 9749 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9750 { 9751 return -EINVAL; 9752 } 9753 9754 static struct sas_function_template hpsa_sas_transport_functions = { 9755 .get_linkerrors = hpsa_sas_get_linkerrors, 9756 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9757 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9758 .phy_reset = hpsa_sas_phy_reset, 9759 .phy_enable = hpsa_sas_phy_enable, 9760 .phy_setup = hpsa_sas_phy_setup, 9761 .phy_release = hpsa_sas_phy_release, 9762 .set_phy_speed = hpsa_sas_phy_speed, 9763 }; 9764 9765 /* 9766 * This is it. Register the PCI driver information for the cards we control 9767 * the OS will call our registered routines when it finds one of our cards. 9768 */ 9769 static int __init hpsa_init(void) 9770 { 9771 int rc; 9772 9773 hpsa_sas_transport_template = 9774 sas_attach_transport(&hpsa_sas_transport_functions); 9775 if (!hpsa_sas_transport_template) 9776 return -ENODEV; 9777 9778 rc = pci_register_driver(&hpsa_pci_driver); 9779 9780 if (rc) 9781 sas_release_transport(hpsa_sas_transport_template); 9782 9783 return rc; 9784 } 9785 9786 static void __exit hpsa_cleanup(void) 9787 { 9788 pci_unregister_driver(&hpsa_pci_driver); 9789 sas_release_transport(hpsa_sas_transport_template); 9790 } 9791 9792 static void __attribute__((unused)) verify_offsets(void) 9793 { 9794 #define VERIFY_OFFSET(member, offset) \ 9795 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9796 9797 VERIFY_OFFSET(structure_size, 0); 9798 VERIFY_OFFSET(volume_blk_size, 4); 9799 VERIFY_OFFSET(volume_blk_cnt, 8); 9800 VERIFY_OFFSET(phys_blk_shift, 16); 9801 VERIFY_OFFSET(parity_rotation_shift, 17); 9802 VERIFY_OFFSET(strip_size, 18); 9803 VERIFY_OFFSET(disk_starting_blk, 20); 9804 VERIFY_OFFSET(disk_blk_cnt, 28); 9805 VERIFY_OFFSET(data_disks_per_row, 36); 9806 VERIFY_OFFSET(metadata_disks_per_row, 38); 9807 VERIFY_OFFSET(row_cnt, 40); 9808 VERIFY_OFFSET(layout_map_count, 42); 9809 VERIFY_OFFSET(flags, 44); 9810 VERIFY_OFFSET(dekindex, 46); 9811 /* VERIFY_OFFSET(reserved, 48 */ 9812 VERIFY_OFFSET(data, 64); 9813 9814 #undef VERIFY_OFFSET 9815 9816 #define VERIFY_OFFSET(member, offset) \ 9817 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9818 9819 VERIFY_OFFSET(IU_type, 0); 9820 VERIFY_OFFSET(direction, 1); 9821 VERIFY_OFFSET(reply_queue, 2); 9822 /* VERIFY_OFFSET(reserved1, 3); */ 9823 VERIFY_OFFSET(scsi_nexus, 4); 9824 VERIFY_OFFSET(Tag, 8); 9825 VERIFY_OFFSET(cdb, 16); 9826 VERIFY_OFFSET(cciss_lun, 32); 9827 VERIFY_OFFSET(data_len, 40); 9828 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9829 VERIFY_OFFSET(sg_count, 45); 9830 /* VERIFY_OFFSET(reserved3 */ 9831 VERIFY_OFFSET(err_ptr, 48); 9832 VERIFY_OFFSET(err_len, 56); 9833 /* VERIFY_OFFSET(reserved4 */ 9834 VERIFY_OFFSET(sg, 64); 9835 9836 #undef VERIFY_OFFSET 9837 9838 #define VERIFY_OFFSET(member, offset) \ 9839 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9840 9841 VERIFY_OFFSET(dev_handle, 0x00); 9842 VERIFY_OFFSET(reserved1, 0x02); 9843 VERIFY_OFFSET(function, 0x03); 9844 VERIFY_OFFSET(reserved2, 0x04); 9845 VERIFY_OFFSET(err_info, 0x0C); 9846 VERIFY_OFFSET(reserved3, 0x10); 9847 VERIFY_OFFSET(err_info_len, 0x12); 9848 VERIFY_OFFSET(reserved4, 0x13); 9849 VERIFY_OFFSET(sgl_offset, 0x14); 9850 VERIFY_OFFSET(reserved5, 0x15); 9851 VERIFY_OFFSET(transfer_len, 0x1C); 9852 VERIFY_OFFSET(reserved6, 0x20); 9853 VERIFY_OFFSET(io_flags, 0x24); 9854 VERIFY_OFFSET(reserved7, 0x26); 9855 VERIFY_OFFSET(LUN, 0x34); 9856 VERIFY_OFFSET(control, 0x3C); 9857 VERIFY_OFFSET(CDB, 0x40); 9858 VERIFY_OFFSET(reserved8, 0x50); 9859 VERIFY_OFFSET(host_context_flags, 0x60); 9860 VERIFY_OFFSET(timeout_sec, 0x62); 9861 VERIFY_OFFSET(ReplyQueue, 0x64); 9862 VERIFY_OFFSET(reserved9, 0x65); 9863 VERIFY_OFFSET(tag, 0x68); 9864 VERIFY_OFFSET(host_addr, 0x70); 9865 VERIFY_OFFSET(CISS_LUN, 0x78); 9866 VERIFY_OFFSET(SG, 0x78 + 8); 9867 #undef VERIFY_OFFSET 9868 } 9869 9870 module_init(hpsa_init); 9871 module_exit(hpsa_cleanup); 9872