1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-125" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 MODULE_ALIAS("cciss"); 85 86 static int hpsa_simple_mode; 87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 88 MODULE_PARM_DESC(hpsa_simple_mode, 89 "Use 'simple mode' rather than 'performant mode'"); 90 91 /* define the PCI info for the cards we can control */ 92 static const struct pci_device_id hpsa_pci_device_id[] = { 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150 {0,} 151 }; 152 153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 154 155 /* board_id = Subsystem Device ID & Vendor ID 156 * product = Marketing Name for the board 157 * access = Address of the struct of function pointers 158 */ 159 static struct board_type products[] = { 160 {0x40700E11, "Smart Array 5300", &SA5A_access}, 161 {0x40800E11, "Smart Array 5i", &SA5B_access}, 162 {0x40820E11, "Smart Array 532", &SA5B_access}, 163 {0x40830E11, "Smart Array 5312", &SA5B_access}, 164 {0x409A0E11, "Smart Array 641", &SA5A_access}, 165 {0x409B0E11, "Smart Array 642", &SA5A_access}, 166 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 168 {0x40910E11, "Smart Array 6i", &SA5A_access}, 169 {0x3225103C, "Smart Array P600", &SA5A_access}, 170 {0x3223103C, "Smart Array P800", &SA5A_access}, 171 {0x3234103C, "Smart Array P400", &SA5A_access}, 172 {0x3235103C, "Smart Array P400i", &SA5A_access}, 173 {0x3211103C, "Smart Array E200i", &SA5A_access}, 174 {0x3212103C, "Smart Array E200", &SA5A_access}, 175 {0x3213103C, "Smart Array E200i", &SA5A_access}, 176 {0x3214103C, "Smart Array E200i", &SA5A_access}, 177 {0x3215103C, "Smart Array E200i", &SA5A_access}, 178 {0x3237103C, "Smart Array E500", &SA5A_access}, 179 {0x323D103C, "Smart Array P700m", &SA5A_access}, 180 {0x3241103C, "Smart Array P212", &SA5_access}, 181 {0x3243103C, "Smart Array P410", &SA5_access}, 182 {0x3245103C, "Smart Array P410i", &SA5_access}, 183 {0x3247103C, "Smart Array P411", &SA5_access}, 184 {0x3249103C, "Smart Array P812", &SA5_access}, 185 {0x324A103C, "Smart Array P712m", &SA5_access}, 186 {0x324B103C, "Smart Array P711m", &SA5_access}, 187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 188 {0x3350103C, "Smart Array P222", &SA5_access}, 189 {0x3351103C, "Smart Array P420", &SA5_access}, 190 {0x3352103C, "Smart Array P421", &SA5_access}, 191 {0x3353103C, "Smart Array P822", &SA5_access}, 192 {0x3354103C, "Smart Array P420i", &SA5_access}, 193 {0x3355103C, "Smart Array P220i", &SA5_access}, 194 {0x3356103C, "Smart Array P721m", &SA5_access}, 195 {0x1920103C, "Smart Array P430i", &SA5_access}, 196 {0x1921103C, "Smart Array P830i", &SA5_access}, 197 {0x1922103C, "Smart Array P430", &SA5_access}, 198 {0x1923103C, "Smart Array P431", &SA5_access}, 199 {0x1924103C, "Smart Array P830", &SA5_access}, 200 {0x1925103C, "Smart Array P831", &SA5_access}, 201 {0x1926103C, "Smart Array P731m", &SA5_access}, 202 {0x1928103C, "Smart Array P230i", &SA5_access}, 203 {0x1929103C, "Smart Array P530", &SA5_access}, 204 {0x21BD103C, "Smart Array P244br", &SA5_access}, 205 {0x21BE103C, "Smart Array P741m", &SA5_access}, 206 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 207 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 208 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 209 {0x21C2103C, "Smart Array P440", &SA5_access}, 210 {0x21C3103C, "Smart Array P441", &SA5_access}, 211 {0x21C4103C, "Smart Array", &SA5_access}, 212 {0x21C5103C, "Smart Array P841", &SA5_access}, 213 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 214 {0x21C7103C, "Smart HBA H240", &SA5_access}, 215 {0x21C8103C, "Smart HBA H241", &SA5_access}, 216 {0x21C9103C, "Smart Array", &SA5_access}, 217 {0x21CA103C, "Smart Array P246br", &SA5_access}, 218 {0x21CB103C, "Smart Array P840", &SA5_access}, 219 {0x21CC103C, "Smart Array", &SA5_access}, 220 {0x21CD103C, "Smart Array", &SA5_access}, 221 {0x21CE103C, "Smart HBA", &SA5_access}, 222 {0x05809005, "SmartHBA-SA", &SA5_access}, 223 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 225 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 226 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 233 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 234 }; 235 236 static struct scsi_transport_template *hpsa_sas_transport_template; 237 static int hpsa_add_sas_host(struct ctlr_info *h); 238 static void hpsa_delete_sas_host(struct ctlr_info *h); 239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 240 struct hpsa_scsi_dev_t *device); 241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 242 static struct hpsa_scsi_dev_t 243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 244 struct sas_rphy *rphy); 245 246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 247 static const struct scsi_cmnd hpsa_cmd_busy; 248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 249 static const struct scsi_cmnd hpsa_cmd_idle; 250 static int number_of_controllers; 251 252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 255 256 #ifdef CONFIG_COMPAT 257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 258 void __user *arg); 259 #endif 260 261 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 262 static struct CommandList *cmd_alloc(struct ctlr_info *h); 263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 265 struct scsi_cmnd *scmd); 266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 268 int cmd_type); 269 static void hpsa_free_cmd_pool(struct ctlr_info *h); 270 #define VPD_PAGE (1 << 8) 271 #define HPSA_SIMPLE_ERROR_BITS 0x03 272 273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 274 static void hpsa_scan_start(struct Scsi_Host *); 275 static int hpsa_scan_finished(struct Scsi_Host *sh, 276 unsigned long elapsed_time); 277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 278 279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 280 static int hpsa_slave_alloc(struct scsi_device *sdev); 281 static int hpsa_slave_configure(struct scsi_device *sdev); 282 static void hpsa_slave_destroy(struct scsi_device *sdev); 283 284 static void hpsa_update_scsi_devices(struct ctlr_info *h); 285 static int check_for_unit_attention(struct ctlr_info *h, 286 struct CommandList *c); 287 static void check_ioctl_unit_attention(struct ctlr_info *h, 288 struct CommandList *c); 289 /* performant mode helper functions */ 290 static void calc_bucket_map(int *bucket, int num_buckets, 291 int nsgs, int min_blocks, u32 *bucket_map); 292 static void hpsa_free_performant_mode(struct ctlr_info *h); 293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 294 static inline u32 next_command(struct ctlr_info *h, u8 q); 295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 296 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 297 u64 *cfg_offset); 298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 299 unsigned long *memory_bar); 300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 301 bool *legacy_board); 302 static int wait_for_device_to_become_ready(struct ctlr_info *h, 303 unsigned char lunaddr[], 304 int reply_queue); 305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 306 int wait_for_ready); 307 static inline void finish_cmd(struct CommandList *c); 308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 309 #define BOARD_NOT_READY 0 310 #define BOARD_READY 1 311 static void hpsa_drain_accel_commands(struct ctlr_info *h); 312 static void hpsa_flush_cache(struct ctlr_info *h); 313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 316 static void hpsa_command_resubmit_worker(struct work_struct *work); 317 static u32 lockup_detected(struct ctlr_info *h); 318 static int detect_controller_lockup(struct ctlr_info *h); 319 static void hpsa_disable_rld_caching(struct ctlr_info *h); 320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 321 struct ReportExtendedLUNdata *buf, int bufsize); 322 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 323 unsigned char scsi3addr[], u8 page); 324 static int hpsa_luns_changed(struct ctlr_info *h); 325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 326 struct hpsa_scsi_dev_t *dev, 327 unsigned char *scsi3addr); 328 329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 330 { 331 unsigned long *priv = shost_priv(sdev->host); 332 return (struct ctlr_info *) *priv; 333 } 334 335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 336 { 337 unsigned long *priv = shost_priv(sh); 338 return (struct ctlr_info *) *priv; 339 } 340 341 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 342 { 343 return c->scsi_cmd == SCSI_CMD_IDLE; 344 } 345 346 static inline bool hpsa_is_pending_event(struct CommandList *c) 347 { 348 return c->reset_pending; 349 } 350 351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 352 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 353 u8 *sense_key, u8 *asc, u8 *ascq) 354 { 355 struct scsi_sense_hdr sshdr; 356 bool rc; 357 358 *sense_key = -1; 359 *asc = -1; 360 *ascq = -1; 361 362 if (sense_data_len < 1) 363 return; 364 365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 366 if (rc) { 367 *sense_key = sshdr.sense_key; 368 *asc = sshdr.asc; 369 *ascq = sshdr.ascq; 370 } 371 } 372 373 static int check_for_unit_attention(struct ctlr_info *h, 374 struct CommandList *c) 375 { 376 u8 sense_key, asc, ascq; 377 int sense_len; 378 379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 380 sense_len = sizeof(c->err_info->SenseInfo); 381 else 382 sense_len = c->err_info->SenseLen; 383 384 decode_sense_data(c->err_info->SenseInfo, sense_len, 385 &sense_key, &asc, &ascq); 386 if (sense_key != UNIT_ATTENTION || asc == 0xff) 387 return 0; 388 389 switch (asc) { 390 case STATE_CHANGED: 391 dev_warn(&h->pdev->dev, 392 "%s: a state change detected, command retried\n", 393 h->devname); 394 break; 395 case LUN_FAILED: 396 dev_warn(&h->pdev->dev, 397 "%s: LUN failure detected\n", h->devname); 398 break; 399 case REPORT_LUNS_CHANGED: 400 dev_warn(&h->pdev->dev, 401 "%s: report LUN data changed\n", h->devname); 402 /* 403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 404 * target (array) devices. 405 */ 406 break; 407 case POWER_OR_RESET: 408 dev_warn(&h->pdev->dev, 409 "%s: a power on or device reset detected\n", 410 h->devname); 411 break; 412 case UNIT_ATTENTION_CLEARED: 413 dev_warn(&h->pdev->dev, 414 "%s: unit attention cleared by another initiator\n", 415 h->devname); 416 break; 417 default: 418 dev_warn(&h->pdev->dev, 419 "%s: unknown unit attention detected\n", 420 h->devname); 421 break; 422 } 423 return 1; 424 } 425 426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 427 { 428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 429 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 431 return 0; 432 dev_warn(&h->pdev->dev, HPSA "device busy"); 433 return 1; 434 } 435 436 static u32 lockup_detected(struct ctlr_info *h); 437 static ssize_t host_show_lockup_detected(struct device *dev, 438 struct device_attribute *attr, char *buf) 439 { 440 int ld; 441 struct ctlr_info *h; 442 struct Scsi_Host *shost = class_to_shost(dev); 443 444 h = shost_to_hba(shost); 445 ld = lockup_detected(h); 446 447 return sprintf(buf, "ld=%d\n", ld); 448 } 449 450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 451 struct device_attribute *attr, 452 const char *buf, size_t count) 453 { 454 int status, len; 455 struct ctlr_info *h; 456 struct Scsi_Host *shost = class_to_shost(dev); 457 char tmpbuf[10]; 458 459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 460 return -EACCES; 461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 462 strncpy(tmpbuf, buf, len); 463 tmpbuf[len] = '\0'; 464 if (sscanf(tmpbuf, "%d", &status) != 1) 465 return -EINVAL; 466 h = shost_to_hba(shost); 467 h->acciopath_status = !!status; 468 dev_warn(&h->pdev->dev, 469 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 470 h->acciopath_status ? "enabled" : "disabled"); 471 return count; 472 } 473 474 static ssize_t host_store_raid_offload_debug(struct device *dev, 475 struct device_attribute *attr, 476 const char *buf, size_t count) 477 { 478 int debug_level, len; 479 struct ctlr_info *h; 480 struct Scsi_Host *shost = class_to_shost(dev); 481 char tmpbuf[10]; 482 483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 484 return -EACCES; 485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 486 strncpy(tmpbuf, buf, len); 487 tmpbuf[len] = '\0'; 488 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 489 return -EINVAL; 490 if (debug_level < 0) 491 debug_level = 0; 492 h = shost_to_hba(shost); 493 h->raid_offload_debug = debug_level; 494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 495 h->raid_offload_debug); 496 return count; 497 } 498 499 static ssize_t host_store_rescan(struct device *dev, 500 struct device_attribute *attr, 501 const char *buf, size_t count) 502 { 503 struct ctlr_info *h; 504 struct Scsi_Host *shost = class_to_shost(dev); 505 h = shost_to_hba(shost); 506 hpsa_scan_start(h->scsi_host); 507 return count; 508 } 509 510 static ssize_t host_show_firmware_revision(struct device *dev, 511 struct device_attribute *attr, char *buf) 512 { 513 struct ctlr_info *h; 514 struct Scsi_Host *shost = class_to_shost(dev); 515 unsigned char *fwrev; 516 517 h = shost_to_hba(shost); 518 if (!h->hba_inquiry_data) 519 return 0; 520 fwrev = &h->hba_inquiry_data[32]; 521 return snprintf(buf, 20, "%c%c%c%c\n", 522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 523 } 524 525 static ssize_t host_show_commands_outstanding(struct device *dev, 526 struct device_attribute *attr, char *buf) 527 { 528 struct Scsi_Host *shost = class_to_shost(dev); 529 struct ctlr_info *h = shost_to_hba(shost); 530 531 return snprintf(buf, 20, "%d\n", 532 atomic_read(&h->commands_outstanding)); 533 } 534 535 static ssize_t host_show_transport_mode(struct device *dev, 536 struct device_attribute *attr, char *buf) 537 { 538 struct ctlr_info *h; 539 struct Scsi_Host *shost = class_to_shost(dev); 540 541 h = shost_to_hba(shost); 542 return snprintf(buf, 20, "%s\n", 543 h->transMethod & CFGTBL_Trans_Performant ? 544 "performant" : "simple"); 545 } 546 547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 548 struct device_attribute *attr, char *buf) 549 { 550 struct ctlr_info *h; 551 struct Scsi_Host *shost = class_to_shost(dev); 552 553 h = shost_to_hba(shost); 554 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 555 (h->acciopath_status == 1) ? "enabled" : "disabled"); 556 } 557 558 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 559 static u32 unresettable_controller[] = { 560 0x324a103C, /* Smart Array P712m */ 561 0x324b103C, /* Smart Array P711m */ 562 0x3223103C, /* Smart Array P800 */ 563 0x3234103C, /* Smart Array P400 */ 564 0x3235103C, /* Smart Array P400i */ 565 0x3211103C, /* Smart Array E200i */ 566 0x3212103C, /* Smart Array E200 */ 567 0x3213103C, /* Smart Array E200i */ 568 0x3214103C, /* Smart Array E200i */ 569 0x3215103C, /* Smart Array E200i */ 570 0x3237103C, /* Smart Array E500 */ 571 0x323D103C, /* Smart Array P700m */ 572 0x40800E11, /* Smart Array 5i */ 573 0x409C0E11, /* Smart Array 6400 */ 574 0x409D0E11, /* Smart Array 6400 EM */ 575 0x40700E11, /* Smart Array 5300 */ 576 0x40820E11, /* Smart Array 532 */ 577 0x40830E11, /* Smart Array 5312 */ 578 0x409A0E11, /* Smart Array 641 */ 579 0x409B0E11, /* Smart Array 642 */ 580 0x40910E11, /* Smart Array 6i */ 581 }; 582 583 /* List of controllers which cannot even be soft reset */ 584 static u32 soft_unresettable_controller[] = { 585 0x40800E11, /* Smart Array 5i */ 586 0x40700E11, /* Smart Array 5300 */ 587 0x40820E11, /* Smart Array 532 */ 588 0x40830E11, /* Smart Array 5312 */ 589 0x409A0E11, /* Smart Array 641 */ 590 0x409B0E11, /* Smart Array 642 */ 591 0x40910E11, /* Smart Array 6i */ 592 /* Exclude 640x boards. These are two pci devices in one slot 593 * which share a battery backed cache module. One controls the 594 * cache, the other accesses the cache through the one that controls 595 * it. If we reset the one controlling the cache, the other will 596 * likely not be happy. Just forbid resetting this conjoined mess. 597 * The 640x isn't really supported by hpsa anyway. 598 */ 599 0x409C0E11, /* Smart Array 6400 */ 600 0x409D0E11, /* Smart Array 6400 EM */ 601 }; 602 603 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 604 { 605 int i; 606 607 for (i = 0; i < nelems; i++) 608 if (a[i] == board_id) 609 return 1; 610 return 0; 611 } 612 613 static int ctlr_is_hard_resettable(u32 board_id) 614 { 615 return !board_id_in_array(unresettable_controller, 616 ARRAY_SIZE(unresettable_controller), board_id); 617 } 618 619 static int ctlr_is_soft_resettable(u32 board_id) 620 { 621 return !board_id_in_array(soft_unresettable_controller, 622 ARRAY_SIZE(soft_unresettable_controller), board_id); 623 } 624 625 static int ctlr_is_resettable(u32 board_id) 626 { 627 return ctlr_is_hard_resettable(board_id) || 628 ctlr_is_soft_resettable(board_id); 629 } 630 631 static ssize_t host_show_resettable(struct device *dev, 632 struct device_attribute *attr, char *buf) 633 { 634 struct ctlr_info *h; 635 struct Scsi_Host *shost = class_to_shost(dev); 636 637 h = shost_to_hba(shost); 638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 639 } 640 641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 642 { 643 return (scsi3addr[3] & 0xC0) == 0x40; 644 } 645 646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 647 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 648 }; 649 #define HPSA_RAID_0 0 650 #define HPSA_RAID_4 1 651 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 652 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 653 #define HPSA_RAID_51 4 654 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 658 659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 660 { 661 return !device->physical_device; 662 } 663 664 static ssize_t raid_level_show(struct device *dev, 665 struct device_attribute *attr, char *buf) 666 { 667 ssize_t l = 0; 668 unsigned char rlevel; 669 struct ctlr_info *h; 670 struct scsi_device *sdev; 671 struct hpsa_scsi_dev_t *hdev; 672 unsigned long flags; 673 674 sdev = to_scsi_device(dev); 675 h = sdev_to_hba(sdev); 676 spin_lock_irqsave(&h->lock, flags); 677 hdev = sdev->hostdata; 678 if (!hdev) { 679 spin_unlock_irqrestore(&h->lock, flags); 680 return -ENODEV; 681 } 682 683 /* Is this even a logical drive? */ 684 if (!is_logical_device(hdev)) { 685 spin_unlock_irqrestore(&h->lock, flags); 686 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 687 return l; 688 } 689 690 rlevel = hdev->raid_level; 691 spin_unlock_irqrestore(&h->lock, flags); 692 if (rlevel > RAID_UNKNOWN) 693 rlevel = RAID_UNKNOWN; 694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 695 return l; 696 } 697 698 static ssize_t lunid_show(struct device *dev, 699 struct device_attribute *attr, char *buf) 700 { 701 struct ctlr_info *h; 702 struct scsi_device *sdev; 703 struct hpsa_scsi_dev_t *hdev; 704 unsigned long flags; 705 unsigned char lunid[8]; 706 707 sdev = to_scsi_device(dev); 708 h = sdev_to_hba(sdev); 709 spin_lock_irqsave(&h->lock, flags); 710 hdev = sdev->hostdata; 711 if (!hdev) { 712 spin_unlock_irqrestore(&h->lock, flags); 713 return -ENODEV; 714 } 715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 716 spin_unlock_irqrestore(&h->lock, flags); 717 return snprintf(buf, 20, "0x%8phN\n", lunid); 718 } 719 720 static ssize_t unique_id_show(struct device *dev, 721 struct device_attribute *attr, char *buf) 722 { 723 struct ctlr_info *h; 724 struct scsi_device *sdev; 725 struct hpsa_scsi_dev_t *hdev; 726 unsigned long flags; 727 unsigned char sn[16]; 728 729 sdev = to_scsi_device(dev); 730 h = sdev_to_hba(sdev); 731 spin_lock_irqsave(&h->lock, flags); 732 hdev = sdev->hostdata; 733 if (!hdev) { 734 spin_unlock_irqrestore(&h->lock, flags); 735 return -ENODEV; 736 } 737 memcpy(sn, hdev->device_id, sizeof(sn)); 738 spin_unlock_irqrestore(&h->lock, flags); 739 return snprintf(buf, 16 * 2 + 2, 740 "%02X%02X%02X%02X%02X%02X%02X%02X" 741 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 742 sn[0], sn[1], sn[2], sn[3], 743 sn[4], sn[5], sn[6], sn[7], 744 sn[8], sn[9], sn[10], sn[11], 745 sn[12], sn[13], sn[14], sn[15]); 746 } 747 748 static ssize_t sas_address_show(struct device *dev, 749 struct device_attribute *attr, char *buf) 750 { 751 struct ctlr_info *h; 752 struct scsi_device *sdev; 753 struct hpsa_scsi_dev_t *hdev; 754 unsigned long flags; 755 u64 sas_address; 756 757 sdev = to_scsi_device(dev); 758 h = sdev_to_hba(sdev); 759 spin_lock_irqsave(&h->lock, flags); 760 hdev = sdev->hostdata; 761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 762 spin_unlock_irqrestore(&h->lock, flags); 763 return -ENODEV; 764 } 765 sas_address = hdev->sas_address; 766 spin_unlock_irqrestore(&h->lock, flags); 767 768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 769 } 770 771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 772 struct device_attribute *attr, char *buf) 773 { 774 struct ctlr_info *h; 775 struct scsi_device *sdev; 776 struct hpsa_scsi_dev_t *hdev; 777 unsigned long flags; 778 int offload_enabled; 779 780 sdev = to_scsi_device(dev); 781 h = sdev_to_hba(sdev); 782 spin_lock_irqsave(&h->lock, flags); 783 hdev = sdev->hostdata; 784 if (!hdev) { 785 spin_unlock_irqrestore(&h->lock, flags); 786 return -ENODEV; 787 } 788 offload_enabled = hdev->offload_enabled; 789 spin_unlock_irqrestore(&h->lock, flags); 790 791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 792 return snprintf(buf, 20, "%d\n", offload_enabled); 793 else 794 return snprintf(buf, 40, "%s\n", 795 "Not applicable for a controller"); 796 } 797 798 #define MAX_PATHS 8 799 static ssize_t path_info_show(struct device *dev, 800 struct device_attribute *attr, char *buf) 801 { 802 struct ctlr_info *h; 803 struct scsi_device *sdev; 804 struct hpsa_scsi_dev_t *hdev; 805 unsigned long flags; 806 int i; 807 int output_len = 0; 808 u8 box; 809 u8 bay; 810 u8 path_map_index = 0; 811 char *active; 812 unsigned char phys_connector[2]; 813 814 sdev = to_scsi_device(dev); 815 h = sdev_to_hba(sdev); 816 spin_lock_irqsave(&h->devlock, flags); 817 hdev = sdev->hostdata; 818 if (!hdev) { 819 spin_unlock_irqrestore(&h->devlock, flags); 820 return -ENODEV; 821 } 822 823 bay = hdev->bay; 824 for (i = 0; i < MAX_PATHS; i++) { 825 path_map_index = 1<<i; 826 if (i == hdev->active_path_index) 827 active = "Active"; 828 else if (hdev->path_map & path_map_index) 829 active = "Inactive"; 830 else 831 continue; 832 833 output_len += scnprintf(buf + output_len, 834 PAGE_SIZE - output_len, 835 "[%d:%d:%d:%d] %20.20s ", 836 h->scsi_host->host_no, 837 hdev->bus, hdev->target, hdev->lun, 838 scsi_device_type(hdev->devtype)); 839 840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 841 output_len += scnprintf(buf + output_len, 842 PAGE_SIZE - output_len, 843 "%s\n", active); 844 continue; 845 } 846 847 box = hdev->box[i]; 848 memcpy(&phys_connector, &hdev->phys_connector[i], 849 sizeof(phys_connector)); 850 if (phys_connector[0] < '0') 851 phys_connector[0] = '0'; 852 if (phys_connector[1] < '0') 853 phys_connector[1] = '0'; 854 output_len += scnprintf(buf + output_len, 855 PAGE_SIZE - output_len, 856 "PORT: %.2s ", 857 phys_connector); 858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 859 hdev->expose_device) { 860 if (box == 0 || box == 0xFF) { 861 output_len += scnprintf(buf + output_len, 862 PAGE_SIZE - output_len, 863 "BAY: %hhu %s\n", 864 bay, active); 865 } else { 866 output_len += scnprintf(buf + output_len, 867 PAGE_SIZE - output_len, 868 "BOX: %hhu BAY: %hhu %s\n", 869 box, bay, active); 870 } 871 } else if (box != 0 && box != 0xFF) { 872 output_len += scnprintf(buf + output_len, 873 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 874 box, active); 875 } else 876 output_len += scnprintf(buf + output_len, 877 PAGE_SIZE - output_len, "%s\n", active); 878 } 879 880 spin_unlock_irqrestore(&h->devlock, flags); 881 return output_len; 882 } 883 884 static ssize_t host_show_ctlr_num(struct device *dev, 885 struct device_attribute *attr, char *buf) 886 { 887 struct ctlr_info *h; 888 struct Scsi_Host *shost = class_to_shost(dev); 889 890 h = shost_to_hba(shost); 891 return snprintf(buf, 20, "%d\n", h->ctlr); 892 } 893 894 static ssize_t host_show_legacy_board(struct device *dev, 895 struct device_attribute *attr, char *buf) 896 { 897 struct ctlr_info *h; 898 struct Scsi_Host *shost = class_to_shost(dev); 899 900 h = shost_to_hba(shost); 901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 902 } 903 904 static DEVICE_ATTR_RO(raid_level); 905 static DEVICE_ATTR_RO(lunid); 906 static DEVICE_ATTR_RO(unique_id); 907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 908 static DEVICE_ATTR_RO(sas_address); 909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 910 host_show_hp_ssd_smart_path_enabled, NULL); 911 static DEVICE_ATTR_RO(path_info); 912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 913 host_show_hp_ssd_smart_path_status, 914 host_store_hp_ssd_smart_path_status); 915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 916 host_store_raid_offload_debug); 917 static DEVICE_ATTR(firmware_revision, S_IRUGO, 918 host_show_firmware_revision, NULL); 919 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 920 host_show_commands_outstanding, NULL); 921 static DEVICE_ATTR(transport_mode, S_IRUGO, 922 host_show_transport_mode, NULL); 923 static DEVICE_ATTR(resettable, S_IRUGO, 924 host_show_resettable, NULL); 925 static DEVICE_ATTR(lockup_detected, S_IRUGO, 926 host_show_lockup_detected, NULL); 927 static DEVICE_ATTR(ctlr_num, S_IRUGO, 928 host_show_ctlr_num, NULL); 929 static DEVICE_ATTR(legacy_board, S_IRUGO, 930 host_show_legacy_board, NULL); 931 932 static struct device_attribute *hpsa_sdev_attrs[] = { 933 &dev_attr_raid_level, 934 &dev_attr_lunid, 935 &dev_attr_unique_id, 936 &dev_attr_hp_ssd_smart_path_enabled, 937 &dev_attr_path_info, 938 &dev_attr_sas_address, 939 NULL, 940 }; 941 942 static struct device_attribute *hpsa_shost_attrs[] = { 943 &dev_attr_rescan, 944 &dev_attr_firmware_revision, 945 &dev_attr_commands_outstanding, 946 &dev_attr_transport_mode, 947 &dev_attr_resettable, 948 &dev_attr_hp_ssd_smart_path_status, 949 &dev_attr_raid_offload_debug, 950 &dev_attr_lockup_detected, 951 &dev_attr_ctlr_num, 952 &dev_attr_legacy_board, 953 NULL, 954 }; 955 956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 957 HPSA_MAX_CONCURRENT_PASSTHRUS) 958 959 static struct scsi_host_template hpsa_driver_template = { 960 .module = THIS_MODULE, 961 .name = HPSA, 962 .proc_name = HPSA, 963 .queuecommand = hpsa_scsi_queue_command, 964 .scan_start = hpsa_scan_start, 965 .scan_finished = hpsa_scan_finished, 966 .change_queue_depth = hpsa_change_queue_depth, 967 .this_id = -1, 968 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 969 .ioctl = hpsa_ioctl, 970 .slave_alloc = hpsa_slave_alloc, 971 .slave_configure = hpsa_slave_configure, 972 .slave_destroy = hpsa_slave_destroy, 973 #ifdef CONFIG_COMPAT 974 .compat_ioctl = hpsa_compat_ioctl, 975 #endif 976 .sdev_attrs = hpsa_sdev_attrs, 977 .shost_attrs = hpsa_shost_attrs, 978 .max_sectors = 2048, 979 .no_write_same = 1, 980 }; 981 982 static inline u32 next_command(struct ctlr_info *h, u8 q) 983 { 984 u32 a; 985 struct reply_queue_buffer *rq = &h->reply_queue[q]; 986 987 if (h->transMethod & CFGTBL_Trans_io_accel1) 988 return h->access.command_completed(h, q); 989 990 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 991 return h->access.command_completed(h, q); 992 993 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 994 a = rq->head[rq->current_entry]; 995 rq->current_entry++; 996 atomic_dec(&h->commands_outstanding); 997 } else { 998 a = FIFO_EMPTY; 999 } 1000 /* Check for wraparound */ 1001 if (rq->current_entry == h->max_commands) { 1002 rq->current_entry = 0; 1003 rq->wraparound ^= 1; 1004 } 1005 return a; 1006 } 1007 1008 /* 1009 * There are some special bits in the bus address of the 1010 * command that we have to set for the controller to know 1011 * how to process the command: 1012 * 1013 * Normal performant mode: 1014 * bit 0: 1 means performant mode, 0 means simple mode. 1015 * bits 1-3 = block fetch table entry 1016 * bits 4-6 = command type (== 0) 1017 * 1018 * ioaccel1 mode: 1019 * bit 0 = "performant mode" bit. 1020 * bits 1-3 = block fetch table entry 1021 * bits 4-6 = command type (== 110) 1022 * (command type is needed because ioaccel1 mode 1023 * commands are submitted through the same register as normal 1024 * mode commands, so this is how the controller knows whether 1025 * the command is normal mode or ioaccel1 mode.) 1026 * 1027 * ioaccel2 mode: 1028 * bit 0 = "performant mode" bit. 1029 * bits 1-4 = block fetch table entry (note extra bit) 1030 * bits 4-6 = not needed, because ioaccel2 mode has 1031 * a separate special register for submitting commands. 1032 */ 1033 1034 /* 1035 * set_performant_mode: Modify the tag for cciss performant 1036 * set bit 0 for pull model, bits 3-1 for block fetch 1037 * register number 1038 */ 1039 #define DEFAULT_REPLY_QUEUE (-1) 1040 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1041 int reply_queue) 1042 { 1043 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1044 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1045 if (unlikely(!h->msix_vectors)) 1046 return; 1047 c->Header.ReplyQueue = reply_queue; 1048 } 1049 } 1050 1051 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1052 struct CommandList *c, 1053 int reply_queue) 1054 { 1055 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1056 1057 /* 1058 * Tell the controller to post the reply to the queue for this 1059 * processor. This seems to give the best I/O throughput. 1060 */ 1061 cp->ReplyQueue = reply_queue; 1062 /* 1063 * Set the bits in the address sent down to include: 1064 * - performant mode bit (bit 0) 1065 * - pull count (bits 1-3) 1066 * - command type (bits 4-6) 1067 */ 1068 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1069 IOACCEL1_BUSADDR_CMDTYPE; 1070 } 1071 1072 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1073 struct CommandList *c, 1074 int reply_queue) 1075 { 1076 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1077 &h->ioaccel2_cmd_pool[c->cmdindex]; 1078 1079 /* Tell the controller to post the reply to the queue for this 1080 * processor. This seems to give the best I/O throughput. 1081 */ 1082 cp->reply_queue = reply_queue; 1083 /* Set the bits in the address sent down to include: 1084 * - performant mode bit not used in ioaccel mode 2 1085 * - pull count (bits 0-3) 1086 * - command type isn't needed for ioaccel2 1087 */ 1088 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1089 } 1090 1091 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1092 struct CommandList *c, 1093 int reply_queue) 1094 { 1095 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1096 1097 /* 1098 * Tell the controller to post the reply to the queue for this 1099 * processor. This seems to give the best I/O throughput. 1100 */ 1101 cp->reply_queue = reply_queue; 1102 /* 1103 * Set the bits in the address sent down to include: 1104 * - performant mode bit not used in ioaccel mode 2 1105 * - pull count (bits 0-3) 1106 * - command type isn't needed for ioaccel2 1107 */ 1108 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1109 } 1110 1111 static int is_firmware_flash_cmd(u8 *cdb) 1112 { 1113 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1114 } 1115 1116 /* 1117 * During firmware flash, the heartbeat register may not update as frequently 1118 * as it should. So we dial down lockup detection during firmware flash. and 1119 * dial it back up when firmware flash completes. 1120 */ 1121 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1122 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1123 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1124 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1125 struct CommandList *c) 1126 { 1127 if (!is_firmware_flash_cmd(c->Request.CDB)) 1128 return; 1129 atomic_inc(&h->firmware_flash_in_progress); 1130 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1131 } 1132 1133 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1134 struct CommandList *c) 1135 { 1136 if (is_firmware_flash_cmd(c->Request.CDB) && 1137 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1138 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1139 } 1140 1141 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1142 struct CommandList *c, int reply_queue) 1143 { 1144 dial_down_lockup_detection_during_fw_flash(h, c); 1145 atomic_inc(&h->commands_outstanding); 1146 1147 reply_queue = h->reply_map[raw_smp_processor_id()]; 1148 switch (c->cmd_type) { 1149 case CMD_IOACCEL1: 1150 set_ioaccel1_performant_mode(h, c, reply_queue); 1151 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1152 break; 1153 case CMD_IOACCEL2: 1154 set_ioaccel2_performant_mode(h, c, reply_queue); 1155 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1156 break; 1157 case IOACCEL2_TMF: 1158 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1159 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1160 break; 1161 default: 1162 set_performant_mode(h, c, reply_queue); 1163 h->access.submit_command(h, c); 1164 } 1165 } 1166 1167 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1168 { 1169 if (unlikely(hpsa_is_pending_event(c))) 1170 return finish_cmd(c); 1171 1172 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1173 } 1174 1175 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1176 { 1177 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1178 } 1179 1180 static inline int is_scsi_rev_5(struct ctlr_info *h) 1181 { 1182 if (!h->hba_inquiry_data) 1183 return 0; 1184 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1185 return 1; 1186 return 0; 1187 } 1188 1189 static int hpsa_find_target_lun(struct ctlr_info *h, 1190 unsigned char scsi3addr[], int bus, int *target, int *lun) 1191 { 1192 /* finds an unused bus, target, lun for a new physical device 1193 * assumes h->devlock is held 1194 */ 1195 int i, found = 0; 1196 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1197 1198 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1199 1200 for (i = 0; i < h->ndevices; i++) { 1201 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1202 __set_bit(h->dev[i]->target, lun_taken); 1203 } 1204 1205 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1206 if (i < HPSA_MAX_DEVICES) { 1207 /* *bus = 1; */ 1208 *target = i; 1209 *lun = 0; 1210 found = 1; 1211 } 1212 return !found; 1213 } 1214 1215 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1216 struct hpsa_scsi_dev_t *dev, char *description) 1217 { 1218 #define LABEL_SIZE 25 1219 char label[LABEL_SIZE]; 1220 1221 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1222 return; 1223 1224 switch (dev->devtype) { 1225 case TYPE_RAID: 1226 snprintf(label, LABEL_SIZE, "controller"); 1227 break; 1228 case TYPE_ENCLOSURE: 1229 snprintf(label, LABEL_SIZE, "enclosure"); 1230 break; 1231 case TYPE_DISK: 1232 case TYPE_ZBC: 1233 if (dev->external) 1234 snprintf(label, LABEL_SIZE, "external"); 1235 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1236 snprintf(label, LABEL_SIZE, "%s", 1237 raid_label[PHYSICAL_DRIVE]); 1238 else 1239 snprintf(label, LABEL_SIZE, "RAID-%s", 1240 dev->raid_level > RAID_UNKNOWN ? "?" : 1241 raid_label[dev->raid_level]); 1242 break; 1243 case TYPE_ROM: 1244 snprintf(label, LABEL_SIZE, "rom"); 1245 break; 1246 case TYPE_TAPE: 1247 snprintf(label, LABEL_SIZE, "tape"); 1248 break; 1249 case TYPE_MEDIUM_CHANGER: 1250 snprintf(label, LABEL_SIZE, "changer"); 1251 break; 1252 default: 1253 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1254 break; 1255 } 1256 1257 dev_printk(level, &h->pdev->dev, 1258 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1259 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1260 description, 1261 scsi_device_type(dev->devtype), 1262 dev->vendor, 1263 dev->model, 1264 label, 1265 dev->offload_config ? '+' : '-', 1266 dev->offload_to_be_enabled ? '+' : '-', 1267 dev->expose_device); 1268 } 1269 1270 /* Add an entry into h->dev[] array. */ 1271 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1272 struct hpsa_scsi_dev_t *device, 1273 struct hpsa_scsi_dev_t *added[], int *nadded) 1274 { 1275 /* assumes h->devlock is held */ 1276 int n = h->ndevices; 1277 int i; 1278 unsigned char addr1[8], addr2[8]; 1279 struct hpsa_scsi_dev_t *sd; 1280 1281 if (n >= HPSA_MAX_DEVICES) { 1282 dev_err(&h->pdev->dev, "too many devices, some will be " 1283 "inaccessible.\n"); 1284 return -1; 1285 } 1286 1287 /* physical devices do not have lun or target assigned until now. */ 1288 if (device->lun != -1) 1289 /* Logical device, lun is already assigned. */ 1290 goto lun_assigned; 1291 1292 /* If this device a non-zero lun of a multi-lun device 1293 * byte 4 of the 8-byte LUN addr will contain the logical 1294 * unit no, zero otherwise. 1295 */ 1296 if (device->scsi3addr[4] == 0) { 1297 /* This is not a non-zero lun of a multi-lun device */ 1298 if (hpsa_find_target_lun(h, device->scsi3addr, 1299 device->bus, &device->target, &device->lun) != 0) 1300 return -1; 1301 goto lun_assigned; 1302 } 1303 1304 /* This is a non-zero lun of a multi-lun device. 1305 * Search through our list and find the device which 1306 * has the same 8 byte LUN address, excepting byte 4 and 5. 1307 * Assign the same bus and target for this new LUN. 1308 * Use the logical unit number from the firmware. 1309 */ 1310 memcpy(addr1, device->scsi3addr, 8); 1311 addr1[4] = 0; 1312 addr1[5] = 0; 1313 for (i = 0; i < n; i++) { 1314 sd = h->dev[i]; 1315 memcpy(addr2, sd->scsi3addr, 8); 1316 addr2[4] = 0; 1317 addr2[5] = 0; 1318 /* differ only in byte 4 and 5? */ 1319 if (memcmp(addr1, addr2, 8) == 0) { 1320 device->bus = sd->bus; 1321 device->target = sd->target; 1322 device->lun = device->scsi3addr[4]; 1323 break; 1324 } 1325 } 1326 if (device->lun == -1) { 1327 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1328 " suspect firmware bug or unsupported hardware " 1329 "configuration.\n"); 1330 return -1; 1331 } 1332 1333 lun_assigned: 1334 1335 h->dev[n] = device; 1336 h->ndevices++; 1337 added[*nadded] = device; 1338 (*nadded)++; 1339 hpsa_show_dev_msg(KERN_INFO, h, device, 1340 device->expose_device ? "added" : "masked"); 1341 return 0; 1342 } 1343 1344 /* 1345 * Called during a scan operation. 1346 * 1347 * Update an entry in h->dev[] array. 1348 */ 1349 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1350 int entry, struct hpsa_scsi_dev_t *new_entry) 1351 { 1352 /* assumes h->devlock is held */ 1353 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1354 1355 /* Raid level changed. */ 1356 h->dev[entry]->raid_level = new_entry->raid_level; 1357 1358 /* 1359 * ioacccel_handle may have changed for a dual domain disk 1360 */ 1361 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1362 1363 /* Raid offload parameters changed. Careful about the ordering. */ 1364 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1365 /* 1366 * if drive is newly offload_enabled, we want to copy the 1367 * raid map data first. If previously offload_enabled and 1368 * offload_config were set, raid map data had better be 1369 * the same as it was before. If raid map data has changed 1370 * then it had better be the case that 1371 * h->dev[entry]->offload_enabled is currently 0. 1372 */ 1373 h->dev[entry]->raid_map = new_entry->raid_map; 1374 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1375 } 1376 if (new_entry->offload_to_be_enabled) { 1377 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1378 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1379 } 1380 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1381 h->dev[entry]->offload_config = new_entry->offload_config; 1382 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1383 h->dev[entry]->queue_depth = new_entry->queue_depth; 1384 1385 /* 1386 * We can turn off ioaccel offload now, but need to delay turning 1387 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1388 * can't do that until all the devices are updated. 1389 */ 1390 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1391 1392 /* 1393 * turn ioaccel off immediately if told to do so. 1394 */ 1395 if (!new_entry->offload_to_be_enabled) 1396 h->dev[entry]->offload_enabled = 0; 1397 1398 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1399 } 1400 1401 /* Replace an entry from h->dev[] array. */ 1402 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1403 int entry, struct hpsa_scsi_dev_t *new_entry, 1404 struct hpsa_scsi_dev_t *added[], int *nadded, 1405 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1406 { 1407 /* assumes h->devlock is held */ 1408 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1409 removed[*nremoved] = h->dev[entry]; 1410 (*nremoved)++; 1411 1412 /* 1413 * New physical devices won't have target/lun assigned yet 1414 * so we need to preserve the values in the slot we are replacing. 1415 */ 1416 if (new_entry->target == -1) { 1417 new_entry->target = h->dev[entry]->target; 1418 new_entry->lun = h->dev[entry]->lun; 1419 } 1420 1421 h->dev[entry] = new_entry; 1422 added[*nadded] = new_entry; 1423 (*nadded)++; 1424 1425 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1426 } 1427 1428 /* Remove an entry from h->dev[] array. */ 1429 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1430 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1431 { 1432 /* assumes h->devlock is held */ 1433 int i; 1434 struct hpsa_scsi_dev_t *sd; 1435 1436 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1437 1438 sd = h->dev[entry]; 1439 removed[*nremoved] = h->dev[entry]; 1440 (*nremoved)++; 1441 1442 for (i = entry; i < h->ndevices-1; i++) 1443 h->dev[i] = h->dev[i+1]; 1444 h->ndevices--; 1445 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1446 } 1447 1448 #define SCSI3ADDR_EQ(a, b) ( \ 1449 (a)[7] == (b)[7] && \ 1450 (a)[6] == (b)[6] && \ 1451 (a)[5] == (b)[5] && \ 1452 (a)[4] == (b)[4] && \ 1453 (a)[3] == (b)[3] && \ 1454 (a)[2] == (b)[2] && \ 1455 (a)[1] == (b)[1] && \ 1456 (a)[0] == (b)[0]) 1457 1458 static void fixup_botched_add(struct ctlr_info *h, 1459 struct hpsa_scsi_dev_t *added) 1460 { 1461 /* called when scsi_add_device fails in order to re-adjust 1462 * h->dev[] to match the mid layer's view. 1463 */ 1464 unsigned long flags; 1465 int i, j; 1466 1467 spin_lock_irqsave(&h->lock, flags); 1468 for (i = 0; i < h->ndevices; i++) { 1469 if (h->dev[i] == added) { 1470 for (j = i; j < h->ndevices-1; j++) 1471 h->dev[j] = h->dev[j+1]; 1472 h->ndevices--; 1473 break; 1474 } 1475 } 1476 spin_unlock_irqrestore(&h->lock, flags); 1477 kfree(added); 1478 } 1479 1480 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1481 struct hpsa_scsi_dev_t *dev2) 1482 { 1483 /* we compare everything except lun and target as these 1484 * are not yet assigned. Compare parts likely 1485 * to differ first 1486 */ 1487 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1488 sizeof(dev1->scsi3addr)) != 0) 1489 return 0; 1490 if (memcmp(dev1->device_id, dev2->device_id, 1491 sizeof(dev1->device_id)) != 0) 1492 return 0; 1493 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1494 return 0; 1495 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1496 return 0; 1497 if (dev1->devtype != dev2->devtype) 1498 return 0; 1499 if (dev1->bus != dev2->bus) 1500 return 0; 1501 return 1; 1502 } 1503 1504 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1505 struct hpsa_scsi_dev_t *dev2) 1506 { 1507 /* Device attributes that can change, but don't mean 1508 * that the device is a different device, nor that the OS 1509 * needs to be told anything about the change. 1510 */ 1511 if (dev1->raid_level != dev2->raid_level) 1512 return 1; 1513 if (dev1->offload_config != dev2->offload_config) 1514 return 1; 1515 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1516 return 1; 1517 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1518 if (dev1->queue_depth != dev2->queue_depth) 1519 return 1; 1520 /* 1521 * This can happen for dual domain devices. An active 1522 * path change causes the ioaccel handle to change 1523 * 1524 * for example note the handle differences between p0 and p1 1525 * Device WWN ,WWN hash,Handle 1526 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1527 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1528 */ 1529 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1530 return 1; 1531 return 0; 1532 } 1533 1534 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1535 * and return needle location in *index. If scsi3addr matches, but not 1536 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1537 * location in *index. 1538 * In the case of a minor device attribute change, such as RAID level, just 1539 * return DEVICE_UPDATED, along with the updated device's location in index. 1540 * If needle not found, return DEVICE_NOT_FOUND. 1541 */ 1542 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1543 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1544 int *index) 1545 { 1546 int i; 1547 #define DEVICE_NOT_FOUND 0 1548 #define DEVICE_CHANGED 1 1549 #define DEVICE_SAME 2 1550 #define DEVICE_UPDATED 3 1551 if (needle == NULL) 1552 return DEVICE_NOT_FOUND; 1553 1554 for (i = 0; i < haystack_size; i++) { 1555 if (haystack[i] == NULL) /* previously removed. */ 1556 continue; 1557 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1558 *index = i; 1559 if (device_is_the_same(needle, haystack[i])) { 1560 if (device_updated(needle, haystack[i])) 1561 return DEVICE_UPDATED; 1562 return DEVICE_SAME; 1563 } else { 1564 /* Keep offline devices offline */ 1565 if (needle->volume_offline) 1566 return DEVICE_NOT_FOUND; 1567 return DEVICE_CHANGED; 1568 } 1569 } 1570 } 1571 *index = -1; 1572 return DEVICE_NOT_FOUND; 1573 } 1574 1575 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1576 unsigned char scsi3addr[]) 1577 { 1578 struct offline_device_entry *device; 1579 unsigned long flags; 1580 1581 /* Check to see if device is already on the list */ 1582 spin_lock_irqsave(&h->offline_device_lock, flags); 1583 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1584 if (memcmp(device->scsi3addr, scsi3addr, 1585 sizeof(device->scsi3addr)) == 0) { 1586 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1587 return; 1588 } 1589 } 1590 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1591 1592 /* Device is not on the list, add it. */ 1593 device = kmalloc(sizeof(*device), GFP_KERNEL); 1594 if (!device) 1595 return; 1596 1597 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1598 spin_lock_irqsave(&h->offline_device_lock, flags); 1599 list_add_tail(&device->offline_list, &h->offline_device_list); 1600 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1601 } 1602 1603 /* Print a message explaining various offline volume states */ 1604 static void hpsa_show_volume_status(struct ctlr_info *h, 1605 struct hpsa_scsi_dev_t *sd) 1606 { 1607 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1608 dev_info(&h->pdev->dev, 1609 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1610 h->scsi_host->host_no, 1611 sd->bus, sd->target, sd->lun); 1612 switch (sd->volume_offline) { 1613 case HPSA_LV_OK: 1614 break; 1615 case HPSA_LV_UNDERGOING_ERASE: 1616 dev_info(&h->pdev->dev, 1617 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1618 h->scsi_host->host_no, 1619 sd->bus, sd->target, sd->lun); 1620 break; 1621 case HPSA_LV_NOT_AVAILABLE: 1622 dev_info(&h->pdev->dev, 1623 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1624 h->scsi_host->host_no, 1625 sd->bus, sd->target, sd->lun); 1626 break; 1627 case HPSA_LV_UNDERGOING_RPI: 1628 dev_info(&h->pdev->dev, 1629 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1630 h->scsi_host->host_no, 1631 sd->bus, sd->target, sd->lun); 1632 break; 1633 case HPSA_LV_PENDING_RPI: 1634 dev_info(&h->pdev->dev, 1635 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1636 h->scsi_host->host_no, 1637 sd->bus, sd->target, sd->lun); 1638 break; 1639 case HPSA_LV_ENCRYPTED_NO_KEY: 1640 dev_info(&h->pdev->dev, 1641 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1642 h->scsi_host->host_no, 1643 sd->bus, sd->target, sd->lun); 1644 break; 1645 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1646 dev_info(&h->pdev->dev, 1647 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1648 h->scsi_host->host_no, 1649 sd->bus, sd->target, sd->lun); 1650 break; 1651 case HPSA_LV_UNDERGOING_ENCRYPTION: 1652 dev_info(&h->pdev->dev, 1653 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1654 h->scsi_host->host_no, 1655 sd->bus, sd->target, sd->lun); 1656 break; 1657 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1658 dev_info(&h->pdev->dev, 1659 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1660 h->scsi_host->host_no, 1661 sd->bus, sd->target, sd->lun); 1662 break; 1663 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1664 dev_info(&h->pdev->dev, 1665 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1666 h->scsi_host->host_no, 1667 sd->bus, sd->target, sd->lun); 1668 break; 1669 case HPSA_LV_PENDING_ENCRYPTION: 1670 dev_info(&h->pdev->dev, 1671 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1672 h->scsi_host->host_no, 1673 sd->bus, sd->target, sd->lun); 1674 break; 1675 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1676 dev_info(&h->pdev->dev, 1677 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1678 h->scsi_host->host_no, 1679 sd->bus, sd->target, sd->lun); 1680 break; 1681 } 1682 } 1683 1684 /* 1685 * Figure the list of physical drive pointers for a logical drive with 1686 * raid offload configured. 1687 */ 1688 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1689 struct hpsa_scsi_dev_t *dev[], int ndevices, 1690 struct hpsa_scsi_dev_t *logical_drive) 1691 { 1692 struct raid_map_data *map = &logical_drive->raid_map; 1693 struct raid_map_disk_data *dd = &map->data[0]; 1694 int i, j; 1695 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1696 le16_to_cpu(map->metadata_disks_per_row); 1697 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1698 le16_to_cpu(map->layout_map_count) * 1699 total_disks_per_row; 1700 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1701 total_disks_per_row; 1702 int qdepth; 1703 1704 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1705 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1706 1707 logical_drive->nphysical_disks = nraid_map_entries; 1708 1709 qdepth = 0; 1710 for (i = 0; i < nraid_map_entries; i++) { 1711 logical_drive->phys_disk[i] = NULL; 1712 if (!logical_drive->offload_config) 1713 continue; 1714 for (j = 0; j < ndevices; j++) { 1715 if (dev[j] == NULL) 1716 continue; 1717 if (dev[j]->devtype != TYPE_DISK && 1718 dev[j]->devtype != TYPE_ZBC) 1719 continue; 1720 if (is_logical_device(dev[j])) 1721 continue; 1722 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1723 continue; 1724 1725 logical_drive->phys_disk[i] = dev[j]; 1726 if (i < nphys_disk) 1727 qdepth = min(h->nr_cmds, qdepth + 1728 logical_drive->phys_disk[i]->queue_depth); 1729 break; 1730 } 1731 1732 /* 1733 * This can happen if a physical drive is removed and 1734 * the logical drive is degraded. In that case, the RAID 1735 * map data will refer to a physical disk which isn't actually 1736 * present. And in that case offload_enabled should already 1737 * be 0, but we'll turn it off here just in case 1738 */ 1739 if (!logical_drive->phys_disk[i]) { 1740 dev_warn(&h->pdev->dev, 1741 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1742 __func__, 1743 h->scsi_host->host_no, logical_drive->bus, 1744 logical_drive->target, logical_drive->lun); 1745 logical_drive->offload_enabled = 0; 1746 logical_drive->offload_to_be_enabled = 0; 1747 logical_drive->queue_depth = 8; 1748 } 1749 } 1750 if (nraid_map_entries) 1751 /* 1752 * This is correct for reads, too high for full stripe writes, 1753 * way too high for partial stripe writes 1754 */ 1755 logical_drive->queue_depth = qdepth; 1756 else { 1757 if (logical_drive->external) 1758 logical_drive->queue_depth = EXTERNAL_QD; 1759 else 1760 logical_drive->queue_depth = h->nr_cmds; 1761 } 1762 } 1763 1764 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1765 struct hpsa_scsi_dev_t *dev[], int ndevices) 1766 { 1767 int i; 1768 1769 for (i = 0; i < ndevices; i++) { 1770 if (dev[i] == NULL) 1771 continue; 1772 if (dev[i]->devtype != TYPE_DISK && 1773 dev[i]->devtype != TYPE_ZBC) 1774 continue; 1775 if (!is_logical_device(dev[i])) 1776 continue; 1777 1778 /* 1779 * If offload is currently enabled, the RAID map and 1780 * phys_disk[] assignment *better* not be changing 1781 * because we would be changing ioaccel phsy_disk[] pointers 1782 * on a ioaccel volume processing I/O requests. 1783 * 1784 * If an ioaccel volume status changed, initially because it was 1785 * re-configured and thus underwent a transformation, or 1786 * a drive failed, we would have received a state change 1787 * request and ioaccel should have been turned off. When the 1788 * transformation completes, we get another state change 1789 * request to turn ioaccel back on. In this case, we need 1790 * to update the ioaccel information. 1791 * 1792 * Thus: If it is not currently enabled, but will be after 1793 * the scan completes, make sure the ioaccel pointers 1794 * are up to date. 1795 */ 1796 1797 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1798 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1799 } 1800 } 1801 1802 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1803 { 1804 int rc = 0; 1805 1806 if (!h->scsi_host) 1807 return 1; 1808 1809 if (is_logical_device(device)) /* RAID */ 1810 rc = scsi_add_device(h->scsi_host, device->bus, 1811 device->target, device->lun); 1812 else /* HBA */ 1813 rc = hpsa_add_sas_device(h->sas_host, device); 1814 1815 return rc; 1816 } 1817 1818 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1819 struct hpsa_scsi_dev_t *dev) 1820 { 1821 int i; 1822 int count = 0; 1823 1824 for (i = 0; i < h->nr_cmds; i++) { 1825 struct CommandList *c = h->cmd_pool + i; 1826 int refcount = atomic_inc_return(&c->refcount); 1827 1828 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1829 dev->scsi3addr)) { 1830 unsigned long flags; 1831 1832 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1833 if (!hpsa_is_cmd_idle(c)) 1834 ++count; 1835 spin_unlock_irqrestore(&h->lock, flags); 1836 } 1837 1838 cmd_free(h, c); 1839 } 1840 1841 return count; 1842 } 1843 1844 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1845 struct hpsa_scsi_dev_t *device) 1846 { 1847 int cmds = 0; 1848 int waits = 0; 1849 1850 while (1) { 1851 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1852 if (cmds == 0) 1853 break; 1854 if (++waits > 20) 1855 break; 1856 msleep(1000); 1857 } 1858 1859 if (waits > 20) 1860 dev_warn(&h->pdev->dev, 1861 "%s: removing device with %d outstanding commands!\n", 1862 __func__, cmds); 1863 } 1864 1865 static void hpsa_remove_device(struct ctlr_info *h, 1866 struct hpsa_scsi_dev_t *device) 1867 { 1868 struct scsi_device *sdev = NULL; 1869 1870 if (!h->scsi_host) 1871 return; 1872 1873 /* 1874 * Allow for commands to drain 1875 */ 1876 device->removed = 1; 1877 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1878 1879 if (is_logical_device(device)) { /* RAID */ 1880 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1881 device->target, device->lun); 1882 if (sdev) { 1883 scsi_remove_device(sdev); 1884 scsi_device_put(sdev); 1885 } else { 1886 /* 1887 * We don't expect to get here. Future commands 1888 * to this device will get a selection timeout as 1889 * if the device were gone. 1890 */ 1891 hpsa_show_dev_msg(KERN_WARNING, h, device, 1892 "didn't find device for removal."); 1893 } 1894 } else { /* HBA */ 1895 1896 hpsa_remove_sas_device(device); 1897 } 1898 } 1899 1900 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1901 struct hpsa_scsi_dev_t *sd[], int nsds) 1902 { 1903 /* sd contains scsi3 addresses and devtypes, and inquiry 1904 * data. This function takes what's in sd to be the current 1905 * reality and updates h->dev[] to reflect that reality. 1906 */ 1907 int i, entry, device_change, changes = 0; 1908 struct hpsa_scsi_dev_t *csd; 1909 unsigned long flags; 1910 struct hpsa_scsi_dev_t **added, **removed; 1911 int nadded, nremoved; 1912 1913 /* 1914 * A reset can cause a device status to change 1915 * re-schedule the scan to see what happened. 1916 */ 1917 spin_lock_irqsave(&h->reset_lock, flags); 1918 if (h->reset_in_progress) { 1919 h->drv_req_rescan = 1; 1920 spin_unlock_irqrestore(&h->reset_lock, flags); 1921 return; 1922 } 1923 spin_unlock_irqrestore(&h->reset_lock, flags); 1924 1925 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 1926 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1927 1928 if (!added || !removed) { 1929 dev_warn(&h->pdev->dev, "out of memory in " 1930 "adjust_hpsa_scsi_table\n"); 1931 goto free_and_out; 1932 } 1933 1934 spin_lock_irqsave(&h->devlock, flags); 1935 1936 /* find any devices in h->dev[] that are not in 1937 * sd[] and remove them from h->dev[], and for any 1938 * devices which have changed, remove the old device 1939 * info and add the new device info. 1940 * If minor device attributes change, just update 1941 * the existing device structure. 1942 */ 1943 i = 0; 1944 nremoved = 0; 1945 nadded = 0; 1946 while (i < h->ndevices) { 1947 csd = h->dev[i]; 1948 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1949 if (device_change == DEVICE_NOT_FOUND) { 1950 changes++; 1951 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1952 continue; /* remove ^^^, hence i not incremented */ 1953 } else if (device_change == DEVICE_CHANGED) { 1954 changes++; 1955 hpsa_scsi_replace_entry(h, i, sd[entry], 1956 added, &nadded, removed, &nremoved); 1957 /* Set it to NULL to prevent it from being freed 1958 * at the bottom of hpsa_update_scsi_devices() 1959 */ 1960 sd[entry] = NULL; 1961 } else if (device_change == DEVICE_UPDATED) { 1962 hpsa_scsi_update_entry(h, i, sd[entry]); 1963 } 1964 i++; 1965 } 1966 1967 /* Now, make sure every device listed in sd[] is also 1968 * listed in h->dev[], adding them if they aren't found 1969 */ 1970 1971 for (i = 0; i < nsds; i++) { 1972 if (!sd[i]) /* if already added above. */ 1973 continue; 1974 1975 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1976 * as the SCSI mid-layer does not handle such devices well. 1977 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1978 * at 160Hz, and prevents the system from coming up. 1979 */ 1980 if (sd[i]->volume_offline) { 1981 hpsa_show_volume_status(h, sd[i]); 1982 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1983 continue; 1984 } 1985 1986 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1987 h->ndevices, &entry); 1988 if (device_change == DEVICE_NOT_FOUND) { 1989 changes++; 1990 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 1991 break; 1992 sd[i] = NULL; /* prevent from being freed later. */ 1993 } else if (device_change == DEVICE_CHANGED) { 1994 /* should never happen... */ 1995 changes++; 1996 dev_warn(&h->pdev->dev, 1997 "device unexpectedly changed.\n"); 1998 /* but if it does happen, we just ignore that device */ 1999 } 2000 } 2001 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2002 2003 /* 2004 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2005 * any logical drives that need it enabled. 2006 * 2007 * The raid map should be current by now. 2008 * 2009 * We are updating the device list used for I/O requests. 2010 */ 2011 for (i = 0; i < h->ndevices; i++) { 2012 if (h->dev[i] == NULL) 2013 continue; 2014 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2015 } 2016 2017 spin_unlock_irqrestore(&h->devlock, flags); 2018 2019 /* Monitor devices which are in one of several NOT READY states to be 2020 * brought online later. This must be done without holding h->devlock, 2021 * so don't touch h->dev[] 2022 */ 2023 for (i = 0; i < nsds; i++) { 2024 if (!sd[i]) /* if already added above. */ 2025 continue; 2026 if (sd[i]->volume_offline) 2027 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2028 } 2029 2030 /* Don't notify scsi mid layer of any changes the first time through 2031 * (or if there are no changes) scsi_scan_host will do it later the 2032 * first time through. 2033 */ 2034 if (!changes) 2035 goto free_and_out; 2036 2037 /* Notify scsi mid layer of any removed devices */ 2038 for (i = 0; i < nremoved; i++) { 2039 if (removed[i] == NULL) 2040 continue; 2041 if (removed[i]->expose_device) 2042 hpsa_remove_device(h, removed[i]); 2043 kfree(removed[i]); 2044 removed[i] = NULL; 2045 } 2046 2047 /* Notify scsi mid layer of any added devices */ 2048 for (i = 0; i < nadded; i++) { 2049 int rc = 0; 2050 2051 if (added[i] == NULL) 2052 continue; 2053 if (!(added[i]->expose_device)) 2054 continue; 2055 rc = hpsa_add_device(h, added[i]); 2056 if (!rc) 2057 continue; 2058 dev_warn(&h->pdev->dev, 2059 "addition failed %d, device not added.", rc); 2060 /* now we have to remove it from h->dev, 2061 * since it didn't get added to scsi mid layer 2062 */ 2063 fixup_botched_add(h, added[i]); 2064 h->drv_req_rescan = 1; 2065 } 2066 2067 free_and_out: 2068 kfree(added); 2069 kfree(removed); 2070 } 2071 2072 /* 2073 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2074 * Assume's h->devlock is held. 2075 */ 2076 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2077 int bus, int target, int lun) 2078 { 2079 int i; 2080 struct hpsa_scsi_dev_t *sd; 2081 2082 for (i = 0; i < h->ndevices; i++) { 2083 sd = h->dev[i]; 2084 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2085 return sd; 2086 } 2087 return NULL; 2088 } 2089 2090 static int hpsa_slave_alloc(struct scsi_device *sdev) 2091 { 2092 struct hpsa_scsi_dev_t *sd = NULL; 2093 unsigned long flags; 2094 struct ctlr_info *h; 2095 2096 h = sdev_to_hba(sdev); 2097 spin_lock_irqsave(&h->devlock, flags); 2098 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2099 struct scsi_target *starget; 2100 struct sas_rphy *rphy; 2101 2102 starget = scsi_target(sdev); 2103 rphy = target_to_rphy(starget); 2104 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2105 if (sd) { 2106 sd->target = sdev_id(sdev); 2107 sd->lun = sdev->lun; 2108 } 2109 } 2110 if (!sd) 2111 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2112 sdev_id(sdev), sdev->lun); 2113 2114 if (sd && sd->expose_device) { 2115 atomic_set(&sd->ioaccel_cmds_out, 0); 2116 sdev->hostdata = sd; 2117 } else 2118 sdev->hostdata = NULL; 2119 spin_unlock_irqrestore(&h->devlock, flags); 2120 return 0; 2121 } 2122 2123 /* configure scsi device based on internal per-device structure */ 2124 static int hpsa_slave_configure(struct scsi_device *sdev) 2125 { 2126 struct hpsa_scsi_dev_t *sd; 2127 int queue_depth; 2128 2129 sd = sdev->hostdata; 2130 sdev->no_uld_attach = !sd || !sd->expose_device; 2131 2132 if (sd) { 2133 if (sd->external) 2134 queue_depth = EXTERNAL_QD; 2135 else 2136 queue_depth = sd->queue_depth != 0 ? 2137 sd->queue_depth : sdev->host->can_queue; 2138 } else 2139 queue_depth = sdev->host->can_queue; 2140 2141 scsi_change_queue_depth(sdev, queue_depth); 2142 2143 return 0; 2144 } 2145 2146 static void hpsa_slave_destroy(struct scsi_device *sdev) 2147 { 2148 /* nothing to do. */ 2149 } 2150 2151 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2152 { 2153 int i; 2154 2155 if (!h->ioaccel2_cmd_sg_list) 2156 return; 2157 for (i = 0; i < h->nr_cmds; i++) { 2158 kfree(h->ioaccel2_cmd_sg_list[i]); 2159 h->ioaccel2_cmd_sg_list[i] = NULL; 2160 } 2161 kfree(h->ioaccel2_cmd_sg_list); 2162 h->ioaccel2_cmd_sg_list = NULL; 2163 } 2164 2165 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2166 { 2167 int i; 2168 2169 if (h->chainsize <= 0) 2170 return 0; 2171 2172 h->ioaccel2_cmd_sg_list = 2173 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2174 GFP_KERNEL); 2175 if (!h->ioaccel2_cmd_sg_list) 2176 return -ENOMEM; 2177 for (i = 0; i < h->nr_cmds; i++) { 2178 h->ioaccel2_cmd_sg_list[i] = 2179 kmalloc_array(h->maxsgentries, 2180 sizeof(*h->ioaccel2_cmd_sg_list[i]), 2181 GFP_KERNEL); 2182 if (!h->ioaccel2_cmd_sg_list[i]) 2183 goto clean; 2184 } 2185 return 0; 2186 2187 clean: 2188 hpsa_free_ioaccel2_sg_chain_blocks(h); 2189 return -ENOMEM; 2190 } 2191 2192 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2193 { 2194 int i; 2195 2196 if (!h->cmd_sg_list) 2197 return; 2198 for (i = 0; i < h->nr_cmds; i++) { 2199 kfree(h->cmd_sg_list[i]); 2200 h->cmd_sg_list[i] = NULL; 2201 } 2202 kfree(h->cmd_sg_list); 2203 h->cmd_sg_list = NULL; 2204 } 2205 2206 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2207 { 2208 int i; 2209 2210 if (h->chainsize <= 0) 2211 return 0; 2212 2213 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 2214 GFP_KERNEL); 2215 if (!h->cmd_sg_list) 2216 return -ENOMEM; 2217 2218 for (i = 0; i < h->nr_cmds; i++) { 2219 h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 2220 sizeof(*h->cmd_sg_list[i]), 2221 GFP_KERNEL); 2222 if (!h->cmd_sg_list[i]) 2223 goto clean; 2224 2225 } 2226 return 0; 2227 2228 clean: 2229 hpsa_free_sg_chain_blocks(h); 2230 return -ENOMEM; 2231 } 2232 2233 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2234 struct io_accel2_cmd *cp, struct CommandList *c) 2235 { 2236 struct ioaccel2_sg_element *chain_block; 2237 u64 temp64; 2238 u32 chain_size; 2239 2240 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2241 chain_size = le32_to_cpu(cp->sg[0].length); 2242 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 2243 DMA_TO_DEVICE); 2244 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2245 /* prevent subsequent unmapping */ 2246 cp->sg->address = 0; 2247 return -1; 2248 } 2249 cp->sg->address = cpu_to_le64(temp64); 2250 return 0; 2251 } 2252 2253 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2254 struct io_accel2_cmd *cp) 2255 { 2256 struct ioaccel2_sg_element *chain_sg; 2257 u64 temp64; 2258 u32 chain_size; 2259 2260 chain_sg = cp->sg; 2261 temp64 = le64_to_cpu(chain_sg->address); 2262 chain_size = le32_to_cpu(cp->sg[0].length); 2263 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2264 } 2265 2266 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2267 struct CommandList *c) 2268 { 2269 struct SGDescriptor *chain_sg, *chain_block; 2270 u64 temp64; 2271 u32 chain_len; 2272 2273 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2274 chain_block = h->cmd_sg_list[c->cmdindex]; 2275 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2276 chain_len = sizeof(*chain_sg) * 2277 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2278 chain_sg->Len = cpu_to_le32(chain_len); 2279 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 2280 DMA_TO_DEVICE); 2281 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2282 /* prevent subsequent unmapping */ 2283 chain_sg->Addr = cpu_to_le64(0); 2284 return -1; 2285 } 2286 chain_sg->Addr = cpu_to_le64(temp64); 2287 return 0; 2288 } 2289 2290 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2291 struct CommandList *c) 2292 { 2293 struct SGDescriptor *chain_sg; 2294 2295 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2296 return; 2297 2298 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2299 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 2300 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 2301 } 2302 2303 2304 /* Decode the various types of errors on ioaccel2 path. 2305 * Return 1 for any error that should generate a RAID path retry. 2306 * Return 0 for errors that don't require a RAID path retry. 2307 */ 2308 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2309 struct CommandList *c, 2310 struct scsi_cmnd *cmd, 2311 struct io_accel2_cmd *c2, 2312 struct hpsa_scsi_dev_t *dev) 2313 { 2314 int data_len; 2315 int retry = 0; 2316 u32 ioaccel2_resid = 0; 2317 2318 switch (c2->error_data.serv_response) { 2319 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2320 switch (c2->error_data.status) { 2321 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2322 break; 2323 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2324 cmd->result |= SAM_STAT_CHECK_CONDITION; 2325 if (c2->error_data.data_present != 2326 IOACCEL2_SENSE_DATA_PRESENT) { 2327 memset(cmd->sense_buffer, 0, 2328 SCSI_SENSE_BUFFERSIZE); 2329 break; 2330 } 2331 /* copy the sense data */ 2332 data_len = c2->error_data.sense_data_len; 2333 if (data_len > SCSI_SENSE_BUFFERSIZE) 2334 data_len = SCSI_SENSE_BUFFERSIZE; 2335 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2336 data_len = 2337 sizeof(c2->error_data.sense_data_buff); 2338 memcpy(cmd->sense_buffer, 2339 c2->error_data.sense_data_buff, data_len); 2340 retry = 1; 2341 break; 2342 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2343 retry = 1; 2344 break; 2345 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2346 retry = 1; 2347 break; 2348 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2349 retry = 1; 2350 break; 2351 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2352 retry = 1; 2353 break; 2354 default: 2355 retry = 1; 2356 break; 2357 } 2358 break; 2359 case IOACCEL2_SERV_RESPONSE_FAILURE: 2360 switch (c2->error_data.status) { 2361 case IOACCEL2_STATUS_SR_IO_ERROR: 2362 case IOACCEL2_STATUS_SR_IO_ABORTED: 2363 case IOACCEL2_STATUS_SR_OVERRUN: 2364 retry = 1; 2365 break; 2366 case IOACCEL2_STATUS_SR_UNDERRUN: 2367 cmd->result = (DID_OK << 16); /* host byte */ 2368 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2369 ioaccel2_resid = get_unaligned_le32( 2370 &c2->error_data.resid_cnt[0]); 2371 scsi_set_resid(cmd, ioaccel2_resid); 2372 break; 2373 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2374 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2375 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2376 /* 2377 * Did an HBA disk disappear? We will eventually 2378 * get a state change event from the controller but 2379 * in the meantime, we need to tell the OS that the 2380 * HBA disk is no longer there and stop I/O 2381 * from going down. This allows the potential re-insert 2382 * of the disk to get the same device node. 2383 */ 2384 if (dev->physical_device && dev->expose_device) { 2385 cmd->result = DID_NO_CONNECT << 16; 2386 dev->removed = 1; 2387 h->drv_req_rescan = 1; 2388 dev_warn(&h->pdev->dev, 2389 "%s: device is gone!\n", __func__); 2390 } else 2391 /* 2392 * Retry by sending down the RAID path. 2393 * We will get an event from ctlr to 2394 * trigger rescan regardless. 2395 */ 2396 retry = 1; 2397 break; 2398 default: 2399 retry = 1; 2400 } 2401 break; 2402 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2403 break; 2404 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2405 break; 2406 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2407 retry = 1; 2408 break; 2409 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2410 break; 2411 default: 2412 retry = 1; 2413 break; 2414 } 2415 2416 return retry; /* retry on raid path? */ 2417 } 2418 2419 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2420 struct CommandList *c) 2421 { 2422 bool do_wake = false; 2423 2424 /* 2425 * Reset c->scsi_cmd here so that the reset handler will know 2426 * this command has completed. Then, check to see if the handler is 2427 * waiting for this command, and, if so, wake it. 2428 */ 2429 c->scsi_cmd = SCSI_CMD_IDLE; 2430 mb(); /* Declare command idle before checking for pending events. */ 2431 if (c->reset_pending) { 2432 unsigned long flags; 2433 struct hpsa_scsi_dev_t *dev; 2434 2435 /* 2436 * There appears to be a reset pending; lock the lock and 2437 * reconfirm. If so, then decrement the count of outstanding 2438 * commands and wake the reset command if this is the last one. 2439 */ 2440 spin_lock_irqsave(&h->lock, flags); 2441 dev = c->reset_pending; /* Re-fetch under the lock. */ 2442 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2443 do_wake = true; 2444 c->reset_pending = NULL; 2445 spin_unlock_irqrestore(&h->lock, flags); 2446 } 2447 2448 if (do_wake) 2449 wake_up_all(&h->event_sync_wait_queue); 2450 } 2451 2452 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2453 struct CommandList *c) 2454 { 2455 hpsa_cmd_resolve_events(h, c); 2456 cmd_tagged_free(h, c); 2457 } 2458 2459 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2460 struct CommandList *c, struct scsi_cmnd *cmd) 2461 { 2462 hpsa_cmd_resolve_and_free(h, c); 2463 if (cmd && cmd->scsi_done) 2464 cmd->scsi_done(cmd); 2465 } 2466 2467 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2468 { 2469 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2470 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2471 } 2472 2473 static void process_ioaccel2_completion(struct ctlr_info *h, 2474 struct CommandList *c, struct scsi_cmnd *cmd, 2475 struct hpsa_scsi_dev_t *dev) 2476 { 2477 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2478 2479 /* check for good status */ 2480 if (likely(c2->error_data.serv_response == 0 && 2481 c2->error_data.status == 0)) 2482 return hpsa_cmd_free_and_done(h, c, cmd); 2483 2484 /* 2485 * Any RAID offload error results in retry which will use 2486 * the normal I/O path so the controller can handle whatever is 2487 * wrong. 2488 */ 2489 if (is_logical_device(dev) && 2490 c2->error_data.serv_response == 2491 IOACCEL2_SERV_RESPONSE_FAILURE) { 2492 if (c2->error_data.status == 2493 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2494 dev->offload_enabled = 0; 2495 dev->offload_to_be_enabled = 0; 2496 } 2497 2498 return hpsa_retry_cmd(h, c); 2499 } 2500 2501 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2502 return hpsa_retry_cmd(h, c); 2503 2504 return hpsa_cmd_free_and_done(h, c, cmd); 2505 } 2506 2507 /* Returns 0 on success, < 0 otherwise. */ 2508 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2509 struct CommandList *cp) 2510 { 2511 u8 tmf_status = cp->err_info->ScsiStatus; 2512 2513 switch (tmf_status) { 2514 case CISS_TMF_COMPLETE: 2515 /* 2516 * CISS_TMF_COMPLETE never happens, instead, 2517 * ei->CommandStatus == 0 for this case. 2518 */ 2519 case CISS_TMF_SUCCESS: 2520 return 0; 2521 case CISS_TMF_INVALID_FRAME: 2522 case CISS_TMF_NOT_SUPPORTED: 2523 case CISS_TMF_FAILED: 2524 case CISS_TMF_WRONG_LUN: 2525 case CISS_TMF_OVERLAPPED_TAG: 2526 break; 2527 default: 2528 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2529 tmf_status); 2530 break; 2531 } 2532 return -tmf_status; 2533 } 2534 2535 static void complete_scsi_command(struct CommandList *cp) 2536 { 2537 struct scsi_cmnd *cmd; 2538 struct ctlr_info *h; 2539 struct ErrorInfo *ei; 2540 struct hpsa_scsi_dev_t *dev; 2541 struct io_accel2_cmd *c2; 2542 2543 u8 sense_key; 2544 u8 asc; /* additional sense code */ 2545 u8 ascq; /* additional sense code qualifier */ 2546 unsigned long sense_data_size; 2547 2548 ei = cp->err_info; 2549 cmd = cp->scsi_cmd; 2550 h = cp->h; 2551 2552 if (!cmd->device) { 2553 cmd->result = DID_NO_CONNECT << 16; 2554 return hpsa_cmd_free_and_done(h, cp, cmd); 2555 } 2556 2557 dev = cmd->device->hostdata; 2558 if (!dev) { 2559 cmd->result = DID_NO_CONNECT << 16; 2560 return hpsa_cmd_free_and_done(h, cp, cmd); 2561 } 2562 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2563 2564 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2565 if ((cp->cmd_type == CMD_SCSI) && 2566 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2567 hpsa_unmap_sg_chain_block(h, cp); 2568 2569 if ((cp->cmd_type == CMD_IOACCEL2) && 2570 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2571 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2572 2573 cmd->result = (DID_OK << 16); /* host byte */ 2574 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2575 2576 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2577 if (dev->physical_device && dev->expose_device && 2578 dev->removed) { 2579 cmd->result = DID_NO_CONNECT << 16; 2580 return hpsa_cmd_free_and_done(h, cp, cmd); 2581 } 2582 if (likely(cp->phys_disk != NULL)) 2583 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2584 } 2585 2586 /* 2587 * We check for lockup status here as it may be set for 2588 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2589 * fail_all_oustanding_cmds() 2590 */ 2591 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2592 /* DID_NO_CONNECT will prevent a retry */ 2593 cmd->result = DID_NO_CONNECT << 16; 2594 return hpsa_cmd_free_and_done(h, cp, cmd); 2595 } 2596 2597 if ((unlikely(hpsa_is_pending_event(cp)))) 2598 if (cp->reset_pending) 2599 return hpsa_cmd_free_and_done(h, cp, cmd); 2600 2601 if (cp->cmd_type == CMD_IOACCEL2) 2602 return process_ioaccel2_completion(h, cp, cmd, dev); 2603 2604 scsi_set_resid(cmd, ei->ResidualCnt); 2605 if (ei->CommandStatus == 0) 2606 return hpsa_cmd_free_and_done(h, cp, cmd); 2607 2608 /* For I/O accelerator commands, copy over some fields to the normal 2609 * CISS header used below for error handling. 2610 */ 2611 if (cp->cmd_type == CMD_IOACCEL1) { 2612 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2613 cp->Header.SGList = scsi_sg_count(cmd); 2614 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2615 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2616 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2617 cp->Header.tag = c->tag; 2618 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2619 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2620 2621 /* Any RAID offload error results in retry which will use 2622 * the normal I/O path so the controller can handle whatever's 2623 * wrong. 2624 */ 2625 if (is_logical_device(dev)) { 2626 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2627 dev->offload_enabled = 0; 2628 return hpsa_retry_cmd(h, cp); 2629 } 2630 } 2631 2632 /* an error has occurred */ 2633 switch (ei->CommandStatus) { 2634 2635 case CMD_TARGET_STATUS: 2636 cmd->result |= ei->ScsiStatus; 2637 /* copy the sense data */ 2638 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2639 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2640 else 2641 sense_data_size = sizeof(ei->SenseInfo); 2642 if (ei->SenseLen < sense_data_size) 2643 sense_data_size = ei->SenseLen; 2644 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2645 if (ei->ScsiStatus) 2646 decode_sense_data(ei->SenseInfo, sense_data_size, 2647 &sense_key, &asc, &ascq); 2648 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2649 if (sense_key == ABORTED_COMMAND) { 2650 cmd->result |= DID_SOFT_ERROR << 16; 2651 break; 2652 } 2653 break; 2654 } 2655 /* Problem was not a check condition 2656 * Pass it up to the upper layers... 2657 */ 2658 if (ei->ScsiStatus) { 2659 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2660 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2661 "Returning result: 0x%x\n", 2662 cp, ei->ScsiStatus, 2663 sense_key, asc, ascq, 2664 cmd->result); 2665 } else { /* scsi status is zero??? How??? */ 2666 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2667 "Returning no connection.\n", cp), 2668 2669 /* Ordinarily, this case should never happen, 2670 * but there is a bug in some released firmware 2671 * revisions that allows it to happen if, for 2672 * example, a 4100 backplane loses power and 2673 * the tape drive is in it. We assume that 2674 * it's a fatal error of some kind because we 2675 * can't show that it wasn't. We will make it 2676 * look like selection timeout since that is 2677 * the most common reason for this to occur, 2678 * and it's severe enough. 2679 */ 2680 2681 cmd->result = DID_NO_CONNECT << 16; 2682 } 2683 break; 2684 2685 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2686 break; 2687 case CMD_DATA_OVERRUN: 2688 dev_warn(&h->pdev->dev, 2689 "CDB %16phN data overrun\n", cp->Request.CDB); 2690 break; 2691 case CMD_INVALID: { 2692 /* print_bytes(cp, sizeof(*cp), 1, 0); 2693 print_cmd(cp); */ 2694 /* We get CMD_INVALID if you address a non-existent device 2695 * instead of a selection timeout (no response). You will 2696 * see this if you yank out a drive, then try to access it. 2697 * This is kind of a shame because it means that any other 2698 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2699 * missing target. */ 2700 cmd->result = DID_NO_CONNECT << 16; 2701 } 2702 break; 2703 case CMD_PROTOCOL_ERR: 2704 cmd->result = DID_ERROR << 16; 2705 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2706 cp->Request.CDB); 2707 break; 2708 case CMD_HARDWARE_ERR: 2709 cmd->result = DID_ERROR << 16; 2710 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2711 cp->Request.CDB); 2712 break; 2713 case CMD_CONNECTION_LOST: 2714 cmd->result = DID_ERROR << 16; 2715 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2716 cp->Request.CDB); 2717 break; 2718 case CMD_ABORTED: 2719 cmd->result = DID_ABORT << 16; 2720 break; 2721 case CMD_ABORT_FAILED: 2722 cmd->result = DID_ERROR << 16; 2723 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2724 cp->Request.CDB); 2725 break; 2726 case CMD_UNSOLICITED_ABORT: 2727 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2728 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2729 cp->Request.CDB); 2730 break; 2731 case CMD_TIMEOUT: 2732 cmd->result = DID_TIME_OUT << 16; 2733 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2734 cp->Request.CDB); 2735 break; 2736 case CMD_UNABORTABLE: 2737 cmd->result = DID_ERROR << 16; 2738 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2739 break; 2740 case CMD_TMF_STATUS: 2741 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2742 cmd->result = DID_ERROR << 16; 2743 break; 2744 case CMD_IOACCEL_DISABLED: 2745 /* This only handles the direct pass-through case since RAID 2746 * offload is handled above. Just attempt a retry. 2747 */ 2748 cmd->result = DID_SOFT_ERROR << 16; 2749 dev_warn(&h->pdev->dev, 2750 "cp %p had HP SSD Smart Path error\n", cp); 2751 break; 2752 default: 2753 cmd->result = DID_ERROR << 16; 2754 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2755 cp, ei->CommandStatus); 2756 } 2757 2758 return hpsa_cmd_free_and_done(h, cp, cmd); 2759 } 2760 2761 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 2762 int sg_used, enum dma_data_direction data_direction) 2763 { 2764 int i; 2765 2766 for (i = 0; i < sg_used; i++) 2767 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 2768 le32_to_cpu(c->SG[i].Len), 2769 data_direction); 2770 } 2771 2772 static int hpsa_map_one(struct pci_dev *pdev, 2773 struct CommandList *cp, 2774 unsigned char *buf, 2775 size_t buflen, 2776 enum dma_data_direction data_direction) 2777 { 2778 u64 addr64; 2779 2780 if (buflen == 0 || data_direction == DMA_NONE) { 2781 cp->Header.SGList = 0; 2782 cp->Header.SGTotal = cpu_to_le16(0); 2783 return 0; 2784 } 2785 2786 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2787 if (dma_mapping_error(&pdev->dev, addr64)) { 2788 /* Prevent subsequent unmap of something never mapped */ 2789 cp->Header.SGList = 0; 2790 cp->Header.SGTotal = cpu_to_le16(0); 2791 return -1; 2792 } 2793 cp->SG[0].Addr = cpu_to_le64(addr64); 2794 cp->SG[0].Len = cpu_to_le32(buflen); 2795 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2796 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2797 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2798 return 0; 2799 } 2800 2801 #define NO_TIMEOUT ((unsigned long) -1) 2802 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2803 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2804 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2805 { 2806 DECLARE_COMPLETION_ONSTACK(wait); 2807 2808 c->waiting = &wait; 2809 __enqueue_cmd_and_start_io(h, c, reply_queue); 2810 if (timeout_msecs == NO_TIMEOUT) { 2811 /* TODO: get rid of this no-timeout thing */ 2812 wait_for_completion_io(&wait); 2813 return IO_OK; 2814 } 2815 if (!wait_for_completion_io_timeout(&wait, 2816 msecs_to_jiffies(timeout_msecs))) { 2817 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2818 return -ETIMEDOUT; 2819 } 2820 return IO_OK; 2821 } 2822 2823 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2824 int reply_queue, unsigned long timeout_msecs) 2825 { 2826 if (unlikely(lockup_detected(h))) { 2827 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2828 return IO_OK; 2829 } 2830 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2831 } 2832 2833 static u32 lockup_detected(struct ctlr_info *h) 2834 { 2835 int cpu; 2836 u32 rc, *lockup_detected; 2837 2838 cpu = get_cpu(); 2839 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2840 rc = *lockup_detected; 2841 put_cpu(); 2842 return rc; 2843 } 2844 2845 #define MAX_DRIVER_CMD_RETRIES 25 2846 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2847 struct CommandList *c, enum dma_data_direction data_direction, 2848 unsigned long timeout_msecs) 2849 { 2850 int backoff_time = 10, retry_count = 0; 2851 int rc; 2852 2853 do { 2854 memset(c->err_info, 0, sizeof(*c->err_info)); 2855 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2856 timeout_msecs); 2857 if (rc) 2858 break; 2859 retry_count++; 2860 if (retry_count > 3) { 2861 msleep(backoff_time); 2862 if (backoff_time < 1000) 2863 backoff_time *= 2; 2864 } 2865 } while ((check_for_unit_attention(h, c) || 2866 check_for_busy(h, c)) && 2867 retry_count <= MAX_DRIVER_CMD_RETRIES); 2868 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2869 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2870 rc = -EIO; 2871 return rc; 2872 } 2873 2874 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2875 struct CommandList *c) 2876 { 2877 const u8 *cdb = c->Request.CDB; 2878 const u8 *lun = c->Header.LUN.LunAddrBytes; 2879 2880 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2881 txt, lun, cdb); 2882 } 2883 2884 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2885 struct CommandList *cp) 2886 { 2887 const struct ErrorInfo *ei = cp->err_info; 2888 struct device *d = &cp->h->pdev->dev; 2889 u8 sense_key, asc, ascq; 2890 int sense_len; 2891 2892 switch (ei->CommandStatus) { 2893 case CMD_TARGET_STATUS: 2894 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2895 sense_len = sizeof(ei->SenseInfo); 2896 else 2897 sense_len = ei->SenseLen; 2898 decode_sense_data(ei->SenseInfo, sense_len, 2899 &sense_key, &asc, &ascq); 2900 hpsa_print_cmd(h, "SCSI status", cp); 2901 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2902 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2903 sense_key, asc, ascq); 2904 else 2905 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2906 if (ei->ScsiStatus == 0) 2907 dev_warn(d, "SCSI status is abnormally zero. " 2908 "(probably indicates selection timeout " 2909 "reported incorrectly due to a known " 2910 "firmware bug, circa July, 2001.)\n"); 2911 break; 2912 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2913 break; 2914 case CMD_DATA_OVERRUN: 2915 hpsa_print_cmd(h, "overrun condition", cp); 2916 break; 2917 case CMD_INVALID: { 2918 /* controller unfortunately reports SCSI passthru's 2919 * to non-existent targets as invalid commands. 2920 */ 2921 hpsa_print_cmd(h, "invalid command", cp); 2922 dev_warn(d, "probably means device no longer present\n"); 2923 } 2924 break; 2925 case CMD_PROTOCOL_ERR: 2926 hpsa_print_cmd(h, "protocol error", cp); 2927 break; 2928 case CMD_HARDWARE_ERR: 2929 hpsa_print_cmd(h, "hardware error", cp); 2930 break; 2931 case CMD_CONNECTION_LOST: 2932 hpsa_print_cmd(h, "connection lost", cp); 2933 break; 2934 case CMD_ABORTED: 2935 hpsa_print_cmd(h, "aborted", cp); 2936 break; 2937 case CMD_ABORT_FAILED: 2938 hpsa_print_cmd(h, "abort failed", cp); 2939 break; 2940 case CMD_UNSOLICITED_ABORT: 2941 hpsa_print_cmd(h, "unsolicited abort", cp); 2942 break; 2943 case CMD_TIMEOUT: 2944 hpsa_print_cmd(h, "timed out", cp); 2945 break; 2946 case CMD_UNABORTABLE: 2947 hpsa_print_cmd(h, "unabortable", cp); 2948 break; 2949 case CMD_CTLR_LOCKUP: 2950 hpsa_print_cmd(h, "controller lockup detected", cp); 2951 break; 2952 default: 2953 hpsa_print_cmd(h, "unknown status", cp); 2954 dev_warn(d, "Unknown command status %x\n", 2955 ei->CommandStatus); 2956 } 2957 } 2958 2959 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2960 u8 page, u8 *buf, size_t bufsize) 2961 { 2962 int rc = IO_OK; 2963 struct CommandList *c; 2964 struct ErrorInfo *ei; 2965 2966 c = cmd_alloc(h); 2967 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 2968 page, scsi3addr, TYPE_CMD)) { 2969 rc = -1; 2970 goto out; 2971 } 2972 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 2973 NO_TIMEOUT); 2974 if (rc) 2975 goto out; 2976 ei = c->err_info; 2977 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2978 hpsa_scsi_interpret_error(h, c); 2979 rc = -1; 2980 } 2981 out: 2982 cmd_free(h, c); 2983 return rc; 2984 } 2985 2986 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 2987 u8 *scsi3addr) 2988 { 2989 u8 *buf; 2990 u64 sa = 0; 2991 int rc = 0; 2992 2993 buf = kzalloc(1024, GFP_KERNEL); 2994 if (!buf) 2995 return 0; 2996 2997 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 2998 buf, 1024); 2999 3000 if (rc) 3001 goto out; 3002 3003 sa = get_unaligned_be64(buf+12); 3004 3005 out: 3006 kfree(buf); 3007 return sa; 3008 } 3009 3010 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3011 u16 page, unsigned char *buf, 3012 unsigned char bufsize) 3013 { 3014 int rc = IO_OK; 3015 struct CommandList *c; 3016 struct ErrorInfo *ei; 3017 3018 c = cmd_alloc(h); 3019 3020 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3021 page, scsi3addr, TYPE_CMD)) { 3022 rc = -1; 3023 goto out; 3024 } 3025 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3026 NO_TIMEOUT); 3027 if (rc) 3028 goto out; 3029 ei = c->err_info; 3030 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3031 hpsa_scsi_interpret_error(h, c); 3032 rc = -1; 3033 } 3034 out: 3035 cmd_free(h, c); 3036 return rc; 3037 } 3038 3039 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3040 u8 reset_type, int reply_queue) 3041 { 3042 int rc = IO_OK; 3043 struct CommandList *c; 3044 struct ErrorInfo *ei; 3045 3046 c = cmd_alloc(h); 3047 3048 3049 /* fill_cmd can't fail here, no data buffer to map. */ 3050 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 3051 scsi3addr, TYPE_MSG); 3052 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3053 if (rc) { 3054 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3055 goto out; 3056 } 3057 /* no unmap needed here because no data xfer. */ 3058 3059 ei = c->err_info; 3060 if (ei->CommandStatus != 0) { 3061 hpsa_scsi_interpret_error(h, c); 3062 rc = -1; 3063 } 3064 out: 3065 cmd_free(h, c); 3066 return rc; 3067 } 3068 3069 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3070 struct hpsa_scsi_dev_t *dev, 3071 unsigned char *scsi3addr) 3072 { 3073 int i; 3074 bool match = false; 3075 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3076 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3077 3078 if (hpsa_is_cmd_idle(c)) 3079 return false; 3080 3081 switch (c->cmd_type) { 3082 case CMD_SCSI: 3083 case CMD_IOCTL_PEND: 3084 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3085 sizeof(c->Header.LUN.LunAddrBytes)); 3086 break; 3087 3088 case CMD_IOACCEL1: 3089 case CMD_IOACCEL2: 3090 if (c->phys_disk == dev) { 3091 /* HBA mode match */ 3092 match = true; 3093 } else { 3094 /* Possible RAID mode -- check each phys dev. */ 3095 /* FIXME: Do we need to take out a lock here? If 3096 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3097 * instead. */ 3098 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3099 /* FIXME: an alternate test might be 3100 * 3101 * match = dev->phys_disk[i]->ioaccel_handle 3102 * == c2->scsi_nexus; */ 3103 match = dev->phys_disk[i] == c->phys_disk; 3104 } 3105 } 3106 break; 3107 3108 case IOACCEL2_TMF: 3109 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3110 match = dev->phys_disk[i]->ioaccel_handle == 3111 le32_to_cpu(ac->it_nexus); 3112 } 3113 break; 3114 3115 case 0: /* The command is in the middle of being initialized. */ 3116 match = false; 3117 break; 3118 3119 default: 3120 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3121 c->cmd_type); 3122 BUG(); 3123 } 3124 3125 return match; 3126 } 3127 3128 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3129 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3130 { 3131 int i; 3132 int rc = 0; 3133 3134 /* We can really only handle one reset at a time */ 3135 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3136 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3137 return -EINTR; 3138 } 3139 3140 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3141 3142 for (i = 0; i < h->nr_cmds; i++) { 3143 struct CommandList *c = h->cmd_pool + i; 3144 int refcount = atomic_inc_return(&c->refcount); 3145 3146 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3147 unsigned long flags; 3148 3149 /* 3150 * Mark the target command as having a reset pending, 3151 * then lock a lock so that the command cannot complete 3152 * while we're considering it. If the command is not 3153 * idle then count it; otherwise revoke the event. 3154 */ 3155 c->reset_pending = dev; 3156 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3157 if (!hpsa_is_cmd_idle(c)) 3158 atomic_inc(&dev->reset_cmds_out); 3159 else 3160 c->reset_pending = NULL; 3161 spin_unlock_irqrestore(&h->lock, flags); 3162 } 3163 3164 cmd_free(h, c); 3165 } 3166 3167 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3168 if (!rc) 3169 wait_event(h->event_sync_wait_queue, 3170 atomic_read(&dev->reset_cmds_out) == 0 || 3171 lockup_detected(h)); 3172 3173 if (unlikely(lockup_detected(h))) { 3174 dev_warn(&h->pdev->dev, 3175 "Controller lockup detected during reset wait\n"); 3176 rc = -ENODEV; 3177 } 3178 3179 if (unlikely(rc)) 3180 atomic_set(&dev->reset_cmds_out, 0); 3181 else 3182 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3183 3184 mutex_unlock(&h->reset_mutex); 3185 return rc; 3186 } 3187 3188 static void hpsa_get_raid_level(struct ctlr_info *h, 3189 unsigned char *scsi3addr, unsigned char *raid_level) 3190 { 3191 int rc; 3192 unsigned char *buf; 3193 3194 *raid_level = RAID_UNKNOWN; 3195 buf = kzalloc(64, GFP_KERNEL); 3196 if (!buf) 3197 return; 3198 3199 if (!hpsa_vpd_page_supported(h, scsi3addr, 3200 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3201 goto exit; 3202 3203 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3204 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3205 3206 if (rc == 0) 3207 *raid_level = buf[8]; 3208 if (*raid_level > RAID_UNKNOWN) 3209 *raid_level = RAID_UNKNOWN; 3210 exit: 3211 kfree(buf); 3212 return; 3213 } 3214 3215 #define HPSA_MAP_DEBUG 3216 #ifdef HPSA_MAP_DEBUG 3217 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3218 struct raid_map_data *map_buff) 3219 { 3220 struct raid_map_disk_data *dd = &map_buff->data[0]; 3221 int map, row, col; 3222 u16 map_cnt, row_cnt, disks_per_row; 3223 3224 if (rc != 0) 3225 return; 3226 3227 /* Show details only if debugging has been activated. */ 3228 if (h->raid_offload_debug < 2) 3229 return; 3230 3231 dev_info(&h->pdev->dev, "structure_size = %u\n", 3232 le32_to_cpu(map_buff->structure_size)); 3233 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3234 le32_to_cpu(map_buff->volume_blk_size)); 3235 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3236 le64_to_cpu(map_buff->volume_blk_cnt)); 3237 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3238 map_buff->phys_blk_shift); 3239 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3240 map_buff->parity_rotation_shift); 3241 dev_info(&h->pdev->dev, "strip_size = %u\n", 3242 le16_to_cpu(map_buff->strip_size)); 3243 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3244 le64_to_cpu(map_buff->disk_starting_blk)); 3245 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3246 le64_to_cpu(map_buff->disk_blk_cnt)); 3247 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3248 le16_to_cpu(map_buff->data_disks_per_row)); 3249 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3250 le16_to_cpu(map_buff->metadata_disks_per_row)); 3251 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3252 le16_to_cpu(map_buff->row_cnt)); 3253 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3254 le16_to_cpu(map_buff->layout_map_count)); 3255 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3256 le16_to_cpu(map_buff->flags)); 3257 dev_info(&h->pdev->dev, "encryption = %s\n", 3258 le16_to_cpu(map_buff->flags) & 3259 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3260 dev_info(&h->pdev->dev, "dekindex = %u\n", 3261 le16_to_cpu(map_buff->dekindex)); 3262 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3263 for (map = 0; map < map_cnt; map++) { 3264 dev_info(&h->pdev->dev, "Map%u:\n", map); 3265 row_cnt = le16_to_cpu(map_buff->row_cnt); 3266 for (row = 0; row < row_cnt; row++) { 3267 dev_info(&h->pdev->dev, " Row%u:\n", row); 3268 disks_per_row = 3269 le16_to_cpu(map_buff->data_disks_per_row); 3270 for (col = 0; col < disks_per_row; col++, dd++) 3271 dev_info(&h->pdev->dev, 3272 " D%02u: h=0x%04x xor=%u,%u\n", 3273 col, dd->ioaccel_handle, 3274 dd->xor_mult[0], dd->xor_mult[1]); 3275 disks_per_row = 3276 le16_to_cpu(map_buff->metadata_disks_per_row); 3277 for (col = 0; col < disks_per_row; col++, dd++) 3278 dev_info(&h->pdev->dev, 3279 " M%02u: h=0x%04x xor=%u,%u\n", 3280 col, dd->ioaccel_handle, 3281 dd->xor_mult[0], dd->xor_mult[1]); 3282 } 3283 } 3284 } 3285 #else 3286 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3287 __attribute__((unused)) int rc, 3288 __attribute__((unused)) struct raid_map_data *map_buff) 3289 { 3290 } 3291 #endif 3292 3293 static int hpsa_get_raid_map(struct ctlr_info *h, 3294 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3295 { 3296 int rc = 0; 3297 struct CommandList *c; 3298 struct ErrorInfo *ei; 3299 3300 c = cmd_alloc(h); 3301 3302 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3303 sizeof(this_device->raid_map), 0, 3304 scsi3addr, TYPE_CMD)) { 3305 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3306 cmd_free(h, c); 3307 return -1; 3308 } 3309 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3310 NO_TIMEOUT); 3311 if (rc) 3312 goto out; 3313 ei = c->err_info; 3314 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3315 hpsa_scsi_interpret_error(h, c); 3316 rc = -1; 3317 goto out; 3318 } 3319 cmd_free(h, c); 3320 3321 /* @todo in the future, dynamically allocate RAID map memory */ 3322 if (le32_to_cpu(this_device->raid_map.structure_size) > 3323 sizeof(this_device->raid_map)) { 3324 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3325 rc = -1; 3326 } 3327 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3328 return rc; 3329 out: 3330 cmd_free(h, c); 3331 return rc; 3332 } 3333 3334 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3335 unsigned char scsi3addr[], u16 bmic_device_index, 3336 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3337 { 3338 int rc = IO_OK; 3339 struct CommandList *c; 3340 struct ErrorInfo *ei; 3341 3342 c = cmd_alloc(h); 3343 3344 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3345 0, RAID_CTLR_LUNID, TYPE_CMD); 3346 if (rc) 3347 goto out; 3348 3349 c->Request.CDB[2] = bmic_device_index & 0xff; 3350 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3351 3352 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3353 NO_TIMEOUT); 3354 if (rc) 3355 goto out; 3356 ei = c->err_info; 3357 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3358 hpsa_scsi_interpret_error(h, c); 3359 rc = -1; 3360 } 3361 out: 3362 cmd_free(h, c); 3363 return rc; 3364 } 3365 3366 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3367 struct bmic_identify_controller *buf, size_t bufsize) 3368 { 3369 int rc = IO_OK; 3370 struct CommandList *c; 3371 struct ErrorInfo *ei; 3372 3373 c = cmd_alloc(h); 3374 3375 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3376 0, RAID_CTLR_LUNID, TYPE_CMD); 3377 if (rc) 3378 goto out; 3379 3380 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3381 NO_TIMEOUT); 3382 if (rc) 3383 goto out; 3384 ei = c->err_info; 3385 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3386 hpsa_scsi_interpret_error(h, c); 3387 rc = -1; 3388 } 3389 out: 3390 cmd_free(h, c); 3391 return rc; 3392 } 3393 3394 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3395 unsigned char scsi3addr[], u16 bmic_device_index, 3396 struct bmic_identify_physical_device *buf, size_t bufsize) 3397 { 3398 int rc = IO_OK; 3399 struct CommandList *c; 3400 struct ErrorInfo *ei; 3401 3402 c = cmd_alloc(h); 3403 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3404 0, RAID_CTLR_LUNID, TYPE_CMD); 3405 if (rc) 3406 goto out; 3407 3408 c->Request.CDB[2] = bmic_device_index & 0xff; 3409 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3410 3411 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3412 NO_TIMEOUT); 3413 ei = c->err_info; 3414 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3415 hpsa_scsi_interpret_error(h, c); 3416 rc = -1; 3417 } 3418 out: 3419 cmd_free(h, c); 3420 3421 return rc; 3422 } 3423 3424 /* 3425 * get enclosure information 3426 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3427 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3428 * Uses id_physical_device to determine the box_index. 3429 */ 3430 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3431 unsigned char *scsi3addr, 3432 struct ReportExtendedLUNdata *rlep, int rle_index, 3433 struct hpsa_scsi_dev_t *encl_dev) 3434 { 3435 int rc = -1; 3436 struct CommandList *c = NULL; 3437 struct ErrorInfo *ei = NULL; 3438 struct bmic_sense_storage_box_params *bssbp = NULL; 3439 struct bmic_identify_physical_device *id_phys = NULL; 3440 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3441 u16 bmic_device_index = 0; 3442 3443 encl_dev->eli = 3444 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3445 3446 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3447 3448 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3449 rc = IO_OK; 3450 goto out; 3451 } 3452 3453 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3454 rc = IO_OK; 3455 goto out; 3456 } 3457 3458 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3459 if (!bssbp) 3460 goto out; 3461 3462 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3463 if (!id_phys) 3464 goto out; 3465 3466 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3467 id_phys, sizeof(*id_phys)); 3468 if (rc) { 3469 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3470 __func__, encl_dev->external, bmic_device_index); 3471 goto out; 3472 } 3473 3474 c = cmd_alloc(h); 3475 3476 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3477 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3478 3479 if (rc) 3480 goto out; 3481 3482 if (id_phys->phys_connector[1] == 'E') 3483 c->Request.CDB[5] = id_phys->box_index; 3484 else 3485 c->Request.CDB[5] = 0; 3486 3487 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3488 NO_TIMEOUT); 3489 if (rc) 3490 goto out; 3491 3492 ei = c->err_info; 3493 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3494 rc = -1; 3495 goto out; 3496 } 3497 3498 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3499 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3500 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3501 3502 rc = IO_OK; 3503 out: 3504 kfree(bssbp); 3505 kfree(id_phys); 3506 3507 if (c) 3508 cmd_free(h, c); 3509 3510 if (rc != IO_OK) 3511 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3512 "Error, could not get enclosure information"); 3513 } 3514 3515 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3516 unsigned char *scsi3addr) 3517 { 3518 struct ReportExtendedLUNdata *physdev; 3519 u32 nphysicals; 3520 u64 sa = 0; 3521 int i; 3522 3523 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3524 if (!physdev) 3525 return 0; 3526 3527 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3528 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3529 kfree(physdev); 3530 return 0; 3531 } 3532 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3533 3534 for (i = 0; i < nphysicals; i++) 3535 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3536 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3537 break; 3538 } 3539 3540 kfree(physdev); 3541 3542 return sa; 3543 } 3544 3545 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3546 struct hpsa_scsi_dev_t *dev) 3547 { 3548 int rc; 3549 u64 sa = 0; 3550 3551 if (is_hba_lunid(scsi3addr)) { 3552 struct bmic_sense_subsystem_info *ssi; 3553 3554 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3555 if (!ssi) 3556 return; 3557 3558 rc = hpsa_bmic_sense_subsystem_information(h, 3559 scsi3addr, 0, ssi, sizeof(*ssi)); 3560 if (rc == 0) { 3561 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3562 h->sas_address = sa; 3563 } 3564 3565 kfree(ssi); 3566 } else 3567 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3568 3569 dev->sas_address = sa; 3570 } 3571 3572 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3573 struct ReportExtendedLUNdata *physdev) 3574 { 3575 u32 nphysicals; 3576 int i; 3577 3578 if (h->discovery_polling) 3579 return; 3580 3581 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3582 3583 for (i = 0; i < nphysicals; i++) { 3584 if (physdev->LUN[i].device_type == 3585 BMIC_DEVICE_TYPE_CONTROLLER 3586 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3587 dev_info(&h->pdev->dev, 3588 "External controller present, activate discovery polling and disable rld caching\n"); 3589 hpsa_disable_rld_caching(h); 3590 h->discovery_polling = 1; 3591 break; 3592 } 3593 } 3594 } 3595 3596 /* Get a device id from inquiry page 0x83 */ 3597 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3598 unsigned char scsi3addr[], u8 page) 3599 { 3600 int rc; 3601 int i; 3602 int pages; 3603 unsigned char *buf, bufsize; 3604 3605 buf = kzalloc(256, GFP_KERNEL); 3606 if (!buf) 3607 return false; 3608 3609 /* Get the size of the page list first */ 3610 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3611 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3612 buf, HPSA_VPD_HEADER_SZ); 3613 if (rc != 0) 3614 goto exit_unsupported; 3615 pages = buf[3]; 3616 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3617 bufsize = pages + HPSA_VPD_HEADER_SZ; 3618 else 3619 bufsize = 255; 3620 3621 /* Get the whole VPD page list */ 3622 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3623 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3624 buf, bufsize); 3625 if (rc != 0) 3626 goto exit_unsupported; 3627 3628 pages = buf[3]; 3629 for (i = 1; i <= pages; i++) 3630 if (buf[3 + i] == page) 3631 goto exit_supported; 3632 exit_unsupported: 3633 kfree(buf); 3634 return false; 3635 exit_supported: 3636 kfree(buf); 3637 return true; 3638 } 3639 3640 /* 3641 * Called during a scan operation. 3642 * Sets ioaccel status on the new device list, not the existing device list 3643 * 3644 * The device list used during I/O will be updated later in 3645 * adjust_hpsa_scsi_table. 3646 */ 3647 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3648 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3649 { 3650 int rc; 3651 unsigned char *buf; 3652 u8 ioaccel_status; 3653 3654 this_device->offload_config = 0; 3655 this_device->offload_enabled = 0; 3656 this_device->offload_to_be_enabled = 0; 3657 3658 buf = kzalloc(64, GFP_KERNEL); 3659 if (!buf) 3660 return; 3661 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3662 goto out; 3663 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3664 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3665 if (rc != 0) 3666 goto out; 3667 3668 #define IOACCEL_STATUS_BYTE 4 3669 #define OFFLOAD_CONFIGURED_BIT 0x01 3670 #define OFFLOAD_ENABLED_BIT 0x02 3671 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3672 this_device->offload_config = 3673 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3674 if (this_device->offload_config) { 3675 this_device->offload_to_be_enabled = 3676 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3677 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3678 this_device->offload_to_be_enabled = 0; 3679 } 3680 3681 out: 3682 kfree(buf); 3683 return; 3684 } 3685 3686 /* Get the device id from inquiry page 0x83 */ 3687 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3688 unsigned char *device_id, int index, int buflen) 3689 { 3690 int rc; 3691 unsigned char *buf; 3692 3693 /* Does controller have VPD for device id? */ 3694 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3695 return 1; /* not supported */ 3696 3697 buf = kzalloc(64, GFP_KERNEL); 3698 if (!buf) 3699 return -ENOMEM; 3700 3701 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3702 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3703 if (rc == 0) { 3704 if (buflen > 16) 3705 buflen = 16; 3706 memcpy(device_id, &buf[8], buflen); 3707 } 3708 3709 kfree(buf); 3710 3711 return rc; /*0 - got id, otherwise, didn't */ 3712 } 3713 3714 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3715 void *buf, int bufsize, 3716 int extended_response) 3717 { 3718 int rc = IO_OK; 3719 struct CommandList *c; 3720 unsigned char scsi3addr[8]; 3721 struct ErrorInfo *ei; 3722 3723 c = cmd_alloc(h); 3724 3725 /* address the controller */ 3726 memset(scsi3addr, 0, sizeof(scsi3addr)); 3727 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3728 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3729 rc = -EAGAIN; 3730 goto out; 3731 } 3732 if (extended_response) 3733 c->Request.CDB[1] = extended_response; 3734 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3735 NO_TIMEOUT); 3736 if (rc) 3737 goto out; 3738 ei = c->err_info; 3739 if (ei->CommandStatus != 0 && 3740 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3741 hpsa_scsi_interpret_error(h, c); 3742 rc = -EIO; 3743 } else { 3744 struct ReportLUNdata *rld = buf; 3745 3746 if (rld->extended_response_flag != extended_response) { 3747 if (!h->legacy_board) { 3748 dev_err(&h->pdev->dev, 3749 "report luns requested format %u, got %u\n", 3750 extended_response, 3751 rld->extended_response_flag); 3752 rc = -EINVAL; 3753 } else 3754 rc = -EOPNOTSUPP; 3755 } 3756 } 3757 out: 3758 cmd_free(h, c); 3759 return rc; 3760 } 3761 3762 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3763 struct ReportExtendedLUNdata *buf, int bufsize) 3764 { 3765 int rc; 3766 struct ReportLUNdata *lbuf; 3767 3768 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3769 HPSA_REPORT_PHYS_EXTENDED); 3770 if (!rc || rc != -EOPNOTSUPP) 3771 return rc; 3772 3773 /* REPORT PHYS EXTENDED is not supported */ 3774 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3775 if (!lbuf) 3776 return -ENOMEM; 3777 3778 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3779 if (!rc) { 3780 int i; 3781 u32 nphys; 3782 3783 /* Copy ReportLUNdata header */ 3784 memcpy(buf, lbuf, 8); 3785 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3786 for (i = 0; i < nphys; i++) 3787 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3788 } 3789 kfree(lbuf); 3790 return rc; 3791 } 3792 3793 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3794 struct ReportLUNdata *buf, int bufsize) 3795 { 3796 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3797 } 3798 3799 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3800 int bus, int target, int lun) 3801 { 3802 device->bus = bus; 3803 device->target = target; 3804 device->lun = lun; 3805 } 3806 3807 /* Use VPD inquiry to get details of volume status */ 3808 static int hpsa_get_volume_status(struct ctlr_info *h, 3809 unsigned char scsi3addr[]) 3810 { 3811 int rc; 3812 int status; 3813 int size; 3814 unsigned char *buf; 3815 3816 buf = kzalloc(64, GFP_KERNEL); 3817 if (!buf) 3818 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3819 3820 /* Does controller have VPD for logical volume status? */ 3821 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3822 goto exit_failed; 3823 3824 /* Get the size of the VPD return buffer */ 3825 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3826 buf, HPSA_VPD_HEADER_SZ); 3827 if (rc != 0) 3828 goto exit_failed; 3829 size = buf[3]; 3830 3831 /* Now get the whole VPD buffer */ 3832 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3833 buf, size + HPSA_VPD_HEADER_SZ); 3834 if (rc != 0) 3835 goto exit_failed; 3836 status = buf[4]; /* status byte */ 3837 3838 kfree(buf); 3839 return status; 3840 exit_failed: 3841 kfree(buf); 3842 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3843 } 3844 3845 /* Determine offline status of a volume. 3846 * Return either: 3847 * 0 (not offline) 3848 * 0xff (offline for unknown reasons) 3849 * # (integer code indicating one of several NOT READY states 3850 * describing why a volume is to be kept offline) 3851 */ 3852 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3853 unsigned char scsi3addr[]) 3854 { 3855 struct CommandList *c; 3856 unsigned char *sense; 3857 u8 sense_key, asc, ascq; 3858 int sense_len; 3859 int rc, ldstat = 0; 3860 u16 cmd_status; 3861 u8 scsi_status; 3862 #define ASC_LUN_NOT_READY 0x04 3863 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3864 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3865 3866 c = cmd_alloc(h); 3867 3868 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3869 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3870 NO_TIMEOUT); 3871 if (rc) { 3872 cmd_free(h, c); 3873 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3874 } 3875 sense = c->err_info->SenseInfo; 3876 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3877 sense_len = sizeof(c->err_info->SenseInfo); 3878 else 3879 sense_len = c->err_info->SenseLen; 3880 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3881 cmd_status = c->err_info->CommandStatus; 3882 scsi_status = c->err_info->ScsiStatus; 3883 cmd_free(h, c); 3884 3885 /* Determine the reason for not ready state */ 3886 ldstat = hpsa_get_volume_status(h, scsi3addr); 3887 3888 /* Keep volume offline in certain cases: */ 3889 switch (ldstat) { 3890 case HPSA_LV_FAILED: 3891 case HPSA_LV_UNDERGOING_ERASE: 3892 case HPSA_LV_NOT_AVAILABLE: 3893 case HPSA_LV_UNDERGOING_RPI: 3894 case HPSA_LV_PENDING_RPI: 3895 case HPSA_LV_ENCRYPTED_NO_KEY: 3896 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3897 case HPSA_LV_UNDERGOING_ENCRYPTION: 3898 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3899 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3900 return ldstat; 3901 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3902 /* If VPD status page isn't available, 3903 * use ASC/ASCQ to determine state 3904 */ 3905 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3906 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3907 return ldstat; 3908 break; 3909 default: 3910 break; 3911 } 3912 return HPSA_LV_OK; 3913 } 3914 3915 static int hpsa_update_device_info(struct ctlr_info *h, 3916 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3917 unsigned char *is_OBDR_device) 3918 { 3919 3920 #define OBDR_SIG_OFFSET 43 3921 #define OBDR_TAPE_SIG "$DR-10" 3922 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3923 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3924 3925 unsigned char *inq_buff; 3926 unsigned char *obdr_sig; 3927 int rc = 0; 3928 3929 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3930 if (!inq_buff) { 3931 rc = -ENOMEM; 3932 goto bail_out; 3933 } 3934 3935 /* Do an inquiry to the device to see what it is. */ 3936 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3937 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3938 dev_err(&h->pdev->dev, 3939 "%s: inquiry failed, device will be skipped.\n", 3940 __func__); 3941 rc = HPSA_INQUIRY_FAILED; 3942 goto bail_out; 3943 } 3944 3945 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3946 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3947 3948 this_device->devtype = (inq_buff[0] & 0x1f); 3949 memcpy(this_device->scsi3addr, scsi3addr, 8); 3950 memcpy(this_device->vendor, &inq_buff[8], 3951 sizeof(this_device->vendor)); 3952 memcpy(this_device->model, &inq_buff[16], 3953 sizeof(this_device->model)); 3954 this_device->rev = inq_buff[2]; 3955 memset(this_device->device_id, 0, 3956 sizeof(this_device->device_id)); 3957 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3958 sizeof(this_device->device_id)) < 0) 3959 dev_err(&h->pdev->dev, 3960 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3961 h->ctlr, __func__, 3962 h->scsi_host->host_no, 3963 this_device->target, this_device->lun, 3964 scsi_device_type(this_device->devtype), 3965 this_device->model); 3966 3967 if ((this_device->devtype == TYPE_DISK || 3968 this_device->devtype == TYPE_ZBC) && 3969 is_logical_dev_addr_mode(scsi3addr)) { 3970 unsigned char volume_offline; 3971 3972 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3973 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3974 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3975 volume_offline = hpsa_volume_offline(h, scsi3addr); 3976 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3977 h->legacy_board) { 3978 /* 3979 * Legacy boards might not support volume status 3980 */ 3981 dev_info(&h->pdev->dev, 3982 "C0:T%d:L%d Volume status not available, assuming online.\n", 3983 this_device->target, this_device->lun); 3984 volume_offline = 0; 3985 } 3986 this_device->volume_offline = volume_offline; 3987 if (volume_offline == HPSA_LV_FAILED) { 3988 rc = HPSA_LV_FAILED; 3989 dev_err(&h->pdev->dev, 3990 "%s: LV failed, device will be skipped.\n", 3991 __func__); 3992 goto bail_out; 3993 } 3994 } else { 3995 this_device->raid_level = RAID_UNKNOWN; 3996 this_device->offload_config = 0; 3997 this_device->offload_enabled = 0; 3998 this_device->offload_to_be_enabled = 0; 3999 this_device->hba_ioaccel_enabled = 0; 4000 this_device->volume_offline = 0; 4001 this_device->queue_depth = h->nr_cmds; 4002 } 4003 4004 if (this_device->external) 4005 this_device->queue_depth = EXTERNAL_QD; 4006 4007 if (is_OBDR_device) { 4008 /* See if this is a One-Button-Disaster-Recovery device 4009 * by looking for "$DR-10" at offset 43 in inquiry data. 4010 */ 4011 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4012 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4013 strncmp(obdr_sig, OBDR_TAPE_SIG, 4014 OBDR_SIG_LEN) == 0); 4015 } 4016 kfree(inq_buff); 4017 return 0; 4018 4019 bail_out: 4020 kfree(inq_buff); 4021 return rc; 4022 } 4023 4024 /* 4025 * Helper function to assign bus, target, lun mapping of devices. 4026 * Logical drive target and lun are assigned at this time, but 4027 * physical device lun and target assignment are deferred (assigned 4028 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4029 */ 4030 static void figure_bus_target_lun(struct ctlr_info *h, 4031 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4032 { 4033 u32 lunid = get_unaligned_le32(lunaddrbytes); 4034 4035 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4036 /* physical device, target and lun filled in later */ 4037 if (is_hba_lunid(lunaddrbytes)) { 4038 int bus = HPSA_HBA_BUS; 4039 4040 if (!device->rev) 4041 bus = HPSA_LEGACY_HBA_BUS; 4042 hpsa_set_bus_target_lun(device, 4043 bus, 0, lunid & 0x3fff); 4044 } else 4045 /* defer target, lun assignment for physical devices */ 4046 hpsa_set_bus_target_lun(device, 4047 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4048 return; 4049 } 4050 /* It's a logical device */ 4051 if (device->external) { 4052 hpsa_set_bus_target_lun(device, 4053 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4054 lunid & 0x00ff); 4055 return; 4056 } 4057 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4058 0, lunid & 0x3fff); 4059 } 4060 4061 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4062 int i, int nphysicals, int nlocal_logicals) 4063 { 4064 /* In report logicals, local logicals are listed first, 4065 * then any externals. 4066 */ 4067 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4068 4069 if (i == raid_ctlr_position) 4070 return 0; 4071 4072 if (i < logicals_start) 4073 return 0; 4074 4075 /* i is in logicals range, but still within local logicals */ 4076 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4077 return 0; 4078 4079 return 1; /* it's an external lun */ 4080 } 4081 4082 /* 4083 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4084 * logdev. The number of luns in physdev and logdev are returned in 4085 * *nphysicals and *nlogicals, respectively. 4086 * Returns 0 on success, -1 otherwise. 4087 */ 4088 static int hpsa_gather_lun_info(struct ctlr_info *h, 4089 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4090 struct ReportLUNdata *logdev, u32 *nlogicals) 4091 { 4092 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4093 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4094 return -1; 4095 } 4096 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4097 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4098 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4099 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4100 *nphysicals = HPSA_MAX_PHYS_LUN; 4101 } 4102 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4103 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4104 return -1; 4105 } 4106 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4107 /* Reject Logicals in excess of our max capability. */ 4108 if (*nlogicals > HPSA_MAX_LUN) { 4109 dev_warn(&h->pdev->dev, 4110 "maximum logical LUNs (%d) exceeded. " 4111 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4112 *nlogicals - HPSA_MAX_LUN); 4113 *nlogicals = HPSA_MAX_LUN; 4114 } 4115 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4116 dev_warn(&h->pdev->dev, 4117 "maximum logical + physical LUNs (%d) exceeded. " 4118 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4119 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4120 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4121 } 4122 return 0; 4123 } 4124 4125 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4126 int i, int nphysicals, int nlogicals, 4127 struct ReportExtendedLUNdata *physdev_list, 4128 struct ReportLUNdata *logdev_list) 4129 { 4130 /* Helper function, figure out where the LUN ID info is coming from 4131 * given index i, lists of physical and logical devices, where in 4132 * the list the raid controller is supposed to appear (first or last) 4133 */ 4134 4135 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4136 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4137 4138 if (i == raid_ctlr_position) 4139 return RAID_CTLR_LUNID; 4140 4141 if (i < logicals_start) 4142 return &physdev_list->LUN[i - 4143 (raid_ctlr_position == 0)].lunid[0]; 4144 4145 if (i < last_device) 4146 return &logdev_list->LUN[i - nphysicals - 4147 (raid_ctlr_position == 0)][0]; 4148 BUG(); 4149 return NULL; 4150 } 4151 4152 /* get physical drive ioaccel handle and queue depth */ 4153 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4154 struct hpsa_scsi_dev_t *dev, 4155 struct ReportExtendedLUNdata *rlep, int rle_index, 4156 struct bmic_identify_physical_device *id_phys) 4157 { 4158 int rc; 4159 struct ext_report_lun_entry *rle; 4160 4161 rle = &rlep->LUN[rle_index]; 4162 4163 dev->ioaccel_handle = rle->ioaccel_handle; 4164 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4165 dev->hba_ioaccel_enabled = 1; 4166 memset(id_phys, 0, sizeof(*id_phys)); 4167 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4168 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4169 sizeof(*id_phys)); 4170 if (!rc) 4171 /* Reserve space for FW operations */ 4172 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4173 #define DRIVE_QUEUE_DEPTH 7 4174 dev->queue_depth = 4175 le16_to_cpu(id_phys->current_queue_depth_limit) - 4176 DRIVE_CMDS_RESERVED_FOR_FW; 4177 else 4178 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4179 } 4180 4181 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4182 struct ReportExtendedLUNdata *rlep, int rle_index, 4183 struct bmic_identify_physical_device *id_phys) 4184 { 4185 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4186 4187 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4188 this_device->hba_ioaccel_enabled = 1; 4189 4190 memcpy(&this_device->active_path_index, 4191 &id_phys->active_path_number, 4192 sizeof(this_device->active_path_index)); 4193 memcpy(&this_device->path_map, 4194 &id_phys->redundant_path_present_map, 4195 sizeof(this_device->path_map)); 4196 memcpy(&this_device->box, 4197 &id_phys->alternate_paths_phys_box_on_port, 4198 sizeof(this_device->box)); 4199 memcpy(&this_device->phys_connector, 4200 &id_phys->alternate_paths_phys_connector, 4201 sizeof(this_device->phys_connector)); 4202 memcpy(&this_device->bay, 4203 &id_phys->phys_bay_in_box, 4204 sizeof(this_device->bay)); 4205 } 4206 4207 /* get number of local logical disks. */ 4208 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4209 struct bmic_identify_controller *id_ctlr, 4210 u32 *nlocals) 4211 { 4212 int rc; 4213 4214 if (!id_ctlr) { 4215 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4216 __func__); 4217 return -ENOMEM; 4218 } 4219 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4220 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4221 if (!rc) 4222 if (id_ctlr->configured_logical_drive_count < 255) 4223 *nlocals = id_ctlr->configured_logical_drive_count; 4224 else 4225 *nlocals = le16_to_cpu( 4226 id_ctlr->extended_logical_unit_count); 4227 else 4228 *nlocals = -1; 4229 return rc; 4230 } 4231 4232 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4233 { 4234 struct bmic_identify_physical_device *id_phys; 4235 bool is_spare = false; 4236 int rc; 4237 4238 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4239 if (!id_phys) 4240 return false; 4241 4242 rc = hpsa_bmic_id_physical_device(h, 4243 lunaddrbytes, 4244 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4245 id_phys, sizeof(*id_phys)); 4246 if (rc == 0) 4247 is_spare = (id_phys->more_flags >> 6) & 0x01; 4248 4249 kfree(id_phys); 4250 return is_spare; 4251 } 4252 4253 #define RPL_DEV_FLAG_NON_DISK 0x1 4254 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4255 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4256 4257 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4258 4259 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4260 struct ext_report_lun_entry *rle) 4261 { 4262 u8 device_flags; 4263 u8 device_type; 4264 4265 if (!MASKED_DEVICE(lunaddrbytes)) 4266 return false; 4267 4268 device_flags = rle->device_flags; 4269 device_type = rle->device_type; 4270 4271 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4272 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4273 return false; 4274 return true; 4275 } 4276 4277 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4278 return false; 4279 4280 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4281 return false; 4282 4283 /* 4284 * Spares may be spun down, we do not want to 4285 * do an Inquiry to a RAID set spare drive as 4286 * that would have them spun up, that is a 4287 * performance hit because I/O to the RAID device 4288 * stops while the spin up occurs which can take 4289 * over 50 seconds. 4290 */ 4291 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4292 return true; 4293 4294 return false; 4295 } 4296 4297 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4298 { 4299 /* the idea here is we could get notified 4300 * that some devices have changed, so we do a report 4301 * physical luns and report logical luns cmd, and adjust 4302 * our list of devices accordingly. 4303 * 4304 * The scsi3addr's of devices won't change so long as the 4305 * adapter is not reset. That means we can rescan and 4306 * tell which devices we already know about, vs. new 4307 * devices, vs. disappearing devices. 4308 */ 4309 struct ReportExtendedLUNdata *physdev_list = NULL; 4310 struct ReportLUNdata *logdev_list = NULL; 4311 struct bmic_identify_physical_device *id_phys = NULL; 4312 struct bmic_identify_controller *id_ctlr = NULL; 4313 u32 nphysicals = 0; 4314 u32 nlogicals = 0; 4315 u32 nlocal_logicals = 0; 4316 u32 ndev_allocated = 0; 4317 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4318 int ncurrent = 0; 4319 int i, n_ext_target_devs, ndevs_to_allocate; 4320 int raid_ctlr_position; 4321 bool physical_device; 4322 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4323 4324 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 4325 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4326 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4327 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4328 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4329 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4330 4331 if (!currentsd || !physdev_list || !logdev_list || 4332 !tmpdevice || !id_phys || !id_ctlr) { 4333 dev_err(&h->pdev->dev, "out of memory\n"); 4334 goto out; 4335 } 4336 memset(lunzerobits, 0, sizeof(lunzerobits)); 4337 4338 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4339 4340 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4341 logdev_list, &nlogicals)) { 4342 h->drv_req_rescan = 1; 4343 goto out; 4344 } 4345 4346 /* Set number of local logicals (non PTRAID) */ 4347 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4348 dev_warn(&h->pdev->dev, 4349 "%s: Can't determine number of local logical devices.\n", 4350 __func__); 4351 } 4352 4353 /* We might see up to the maximum number of logical and physical disks 4354 * plus external target devices, and a device for the local RAID 4355 * controller. 4356 */ 4357 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4358 4359 hpsa_ext_ctrl_present(h, physdev_list); 4360 4361 /* Allocate the per device structures */ 4362 for (i = 0; i < ndevs_to_allocate; i++) { 4363 if (i >= HPSA_MAX_DEVICES) { 4364 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4365 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4366 ndevs_to_allocate - HPSA_MAX_DEVICES); 4367 break; 4368 } 4369 4370 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4371 if (!currentsd[i]) { 4372 h->drv_req_rescan = 1; 4373 goto out; 4374 } 4375 ndev_allocated++; 4376 } 4377 4378 if (is_scsi_rev_5(h)) 4379 raid_ctlr_position = 0; 4380 else 4381 raid_ctlr_position = nphysicals + nlogicals; 4382 4383 /* adjust our table of devices */ 4384 n_ext_target_devs = 0; 4385 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4386 u8 *lunaddrbytes, is_OBDR = 0; 4387 int rc = 0; 4388 int phys_dev_index = i - (raid_ctlr_position == 0); 4389 bool skip_device = false; 4390 4391 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4392 4393 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4394 4395 /* Figure out where the LUN ID info is coming from */ 4396 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4397 i, nphysicals, nlogicals, physdev_list, logdev_list); 4398 4399 /* Determine if this is a lun from an external target array */ 4400 tmpdevice->external = 4401 figure_external_status(h, raid_ctlr_position, i, 4402 nphysicals, nlocal_logicals); 4403 4404 /* 4405 * Skip over some devices such as a spare. 4406 */ 4407 if (!tmpdevice->external && physical_device) { 4408 skip_device = hpsa_skip_device(h, lunaddrbytes, 4409 &physdev_list->LUN[phys_dev_index]); 4410 if (skip_device) 4411 continue; 4412 } 4413 4414 /* Get device type, vendor, model, device id, raid_map */ 4415 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4416 &is_OBDR); 4417 if (rc == -ENOMEM) { 4418 dev_warn(&h->pdev->dev, 4419 "Out of memory, rescan deferred.\n"); 4420 h->drv_req_rescan = 1; 4421 goto out; 4422 } 4423 if (rc) { 4424 h->drv_req_rescan = 1; 4425 continue; 4426 } 4427 4428 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4429 this_device = currentsd[ncurrent]; 4430 4431 *this_device = *tmpdevice; 4432 this_device->physical_device = physical_device; 4433 4434 /* 4435 * Expose all devices except for physical devices that 4436 * are masked. 4437 */ 4438 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4439 this_device->expose_device = 0; 4440 else 4441 this_device->expose_device = 1; 4442 4443 4444 /* 4445 * Get the SAS address for physical devices that are exposed. 4446 */ 4447 if (this_device->physical_device && this_device->expose_device) 4448 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4449 4450 switch (this_device->devtype) { 4451 case TYPE_ROM: 4452 /* We don't *really* support actual CD-ROM devices, 4453 * just "One Button Disaster Recovery" tape drive 4454 * which temporarily pretends to be a CD-ROM drive. 4455 * So we check that the device is really an OBDR tape 4456 * device by checking for "$DR-10" in bytes 43-48 of 4457 * the inquiry data. 4458 */ 4459 if (is_OBDR) 4460 ncurrent++; 4461 break; 4462 case TYPE_DISK: 4463 case TYPE_ZBC: 4464 if (this_device->physical_device) { 4465 /* The disk is in HBA mode. */ 4466 /* Never use RAID mapper in HBA mode. */ 4467 this_device->offload_enabled = 0; 4468 hpsa_get_ioaccel_drive_info(h, this_device, 4469 physdev_list, phys_dev_index, id_phys); 4470 hpsa_get_path_info(this_device, 4471 physdev_list, phys_dev_index, id_phys); 4472 } 4473 ncurrent++; 4474 break; 4475 case TYPE_TAPE: 4476 case TYPE_MEDIUM_CHANGER: 4477 ncurrent++; 4478 break; 4479 case TYPE_ENCLOSURE: 4480 if (!this_device->external) 4481 hpsa_get_enclosure_info(h, lunaddrbytes, 4482 physdev_list, phys_dev_index, 4483 this_device); 4484 ncurrent++; 4485 break; 4486 case TYPE_RAID: 4487 /* Only present the Smartarray HBA as a RAID controller. 4488 * If it's a RAID controller other than the HBA itself 4489 * (an external RAID controller, MSA500 or similar) 4490 * don't present it. 4491 */ 4492 if (!is_hba_lunid(lunaddrbytes)) 4493 break; 4494 ncurrent++; 4495 break; 4496 default: 4497 break; 4498 } 4499 if (ncurrent >= HPSA_MAX_DEVICES) 4500 break; 4501 } 4502 4503 if (h->sas_host == NULL) { 4504 int rc = 0; 4505 4506 rc = hpsa_add_sas_host(h); 4507 if (rc) { 4508 dev_warn(&h->pdev->dev, 4509 "Could not add sas host %d\n", rc); 4510 goto out; 4511 } 4512 } 4513 4514 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4515 out: 4516 kfree(tmpdevice); 4517 for (i = 0; i < ndev_allocated; i++) 4518 kfree(currentsd[i]); 4519 kfree(currentsd); 4520 kfree(physdev_list); 4521 kfree(logdev_list); 4522 kfree(id_ctlr); 4523 kfree(id_phys); 4524 } 4525 4526 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4527 struct scatterlist *sg) 4528 { 4529 u64 addr64 = (u64) sg_dma_address(sg); 4530 unsigned int len = sg_dma_len(sg); 4531 4532 desc->Addr = cpu_to_le64(addr64); 4533 desc->Len = cpu_to_le32(len); 4534 desc->Ext = 0; 4535 } 4536 4537 /* 4538 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4539 * dma mapping and fills in the scatter gather entries of the 4540 * hpsa command, cp. 4541 */ 4542 static int hpsa_scatter_gather(struct ctlr_info *h, 4543 struct CommandList *cp, 4544 struct scsi_cmnd *cmd) 4545 { 4546 struct scatterlist *sg; 4547 int use_sg, i, sg_limit, chained, last_sg; 4548 struct SGDescriptor *curr_sg; 4549 4550 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4551 4552 use_sg = scsi_dma_map(cmd); 4553 if (use_sg < 0) 4554 return use_sg; 4555 4556 if (!use_sg) 4557 goto sglist_finished; 4558 4559 /* 4560 * If the number of entries is greater than the max for a single list, 4561 * then we have a chained list; we will set up all but one entry in the 4562 * first list (the last entry is saved for link information); 4563 * otherwise, we don't have a chained list and we'll set up at each of 4564 * the entries in the one list. 4565 */ 4566 curr_sg = cp->SG; 4567 chained = use_sg > h->max_cmd_sg_entries; 4568 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4569 last_sg = scsi_sg_count(cmd) - 1; 4570 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4571 hpsa_set_sg_descriptor(curr_sg, sg); 4572 curr_sg++; 4573 } 4574 4575 if (chained) { 4576 /* 4577 * Continue with the chained list. Set curr_sg to the chained 4578 * list. Modify the limit to the total count less the entries 4579 * we've already set up. Resume the scan at the list entry 4580 * where the previous loop left off. 4581 */ 4582 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4583 sg_limit = use_sg - sg_limit; 4584 for_each_sg(sg, sg, sg_limit, i) { 4585 hpsa_set_sg_descriptor(curr_sg, sg); 4586 curr_sg++; 4587 } 4588 } 4589 4590 /* Back the pointer up to the last entry and mark it as "last". */ 4591 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4592 4593 if (use_sg + chained > h->maxSG) 4594 h->maxSG = use_sg + chained; 4595 4596 if (chained) { 4597 cp->Header.SGList = h->max_cmd_sg_entries; 4598 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4599 if (hpsa_map_sg_chain_block(h, cp)) { 4600 scsi_dma_unmap(cmd); 4601 return -1; 4602 } 4603 return 0; 4604 } 4605 4606 sglist_finished: 4607 4608 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4609 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4610 return 0; 4611 } 4612 4613 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4614 u8 *cdb, int cdb_len, 4615 const char *func) 4616 { 4617 dev_warn(&h->pdev->dev, 4618 "%s: Blocking zero-length request: CDB:%*phN\n", 4619 func, cdb_len, cdb); 4620 } 4621 4622 #define IO_ACCEL_INELIGIBLE 1 4623 /* zero-length transfers trigger hardware errors. */ 4624 static bool is_zero_length_transfer(u8 *cdb) 4625 { 4626 u32 block_cnt; 4627 4628 /* Block zero-length transfer sizes on certain commands. */ 4629 switch (cdb[0]) { 4630 case READ_10: 4631 case WRITE_10: 4632 case VERIFY: /* 0x2F */ 4633 case WRITE_VERIFY: /* 0x2E */ 4634 block_cnt = get_unaligned_be16(&cdb[7]); 4635 break; 4636 case READ_12: 4637 case WRITE_12: 4638 case VERIFY_12: /* 0xAF */ 4639 case WRITE_VERIFY_12: /* 0xAE */ 4640 block_cnt = get_unaligned_be32(&cdb[6]); 4641 break; 4642 case READ_16: 4643 case WRITE_16: 4644 case VERIFY_16: /* 0x8F */ 4645 block_cnt = get_unaligned_be32(&cdb[10]); 4646 break; 4647 default: 4648 return false; 4649 } 4650 4651 return block_cnt == 0; 4652 } 4653 4654 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4655 { 4656 int is_write = 0; 4657 u32 block; 4658 u32 block_cnt; 4659 4660 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4661 switch (cdb[0]) { 4662 case WRITE_6: 4663 case WRITE_12: 4664 is_write = 1; 4665 /* fall through */ 4666 case READ_6: 4667 case READ_12: 4668 if (*cdb_len == 6) { 4669 block = (((cdb[1] & 0x1F) << 16) | 4670 (cdb[2] << 8) | 4671 cdb[3]); 4672 block_cnt = cdb[4]; 4673 if (block_cnt == 0) 4674 block_cnt = 256; 4675 } else { 4676 BUG_ON(*cdb_len != 12); 4677 block = get_unaligned_be32(&cdb[2]); 4678 block_cnt = get_unaligned_be32(&cdb[6]); 4679 } 4680 if (block_cnt > 0xffff) 4681 return IO_ACCEL_INELIGIBLE; 4682 4683 cdb[0] = is_write ? WRITE_10 : READ_10; 4684 cdb[1] = 0; 4685 cdb[2] = (u8) (block >> 24); 4686 cdb[3] = (u8) (block >> 16); 4687 cdb[4] = (u8) (block >> 8); 4688 cdb[5] = (u8) (block); 4689 cdb[6] = 0; 4690 cdb[7] = (u8) (block_cnt >> 8); 4691 cdb[8] = (u8) (block_cnt); 4692 cdb[9] = 0; 4693 *cdb_len = 10; 4694 break; 4695 } 4696 return 0; 4697 } 4698 4699 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4700 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4701 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4702 { 4703 struct scsi_cmnd *cmd = c->scsi_cmd; 4704 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4705 unsigned int len; 4706 unsigned int total_len = 0; 4707 struct scatterlist *sg; 4708 u64 addr64; 4709 int use_sg, i; 4710 struct SGDescriptor *curr_sg; 4711 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4712 4713 /* TODO: implement chaining support */ 4714 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4715 atomic_dec(&phys_disk->ioaccel_cmds_out); 4716 return IO_ACCEL_INELIGIBLE; 4717 } 4718 4719 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4720 4721 if (is_zero_length_transfer(cdb)) { 4722 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4723 atomic_dec(&phys_disk->ioaccel_cmds_out); 4724 return IO_ACCEL_INELIGIBLE; 4725 } 4726 4727 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4728 atomic_dec(&phys_disk->ioaccel_cmds_out); 4729 return IO_ACCEL_INELIGIBLE; 4730 } 4731 4732 c->cmd_type = CMD_IOACCEL1; 4733 4734 /* Adjust the DMA address to point to the accelerated command buffer */ 4735 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4736 (c->cmdindex * sizeof(*cp)); 4737 BUG_ON(c->busaddr & 0x0000007F); 4738 4739 use_sg = scsi_dma_map(cmd); 4740 if (use_sg < 0) { 4741 atomic_dec(&phys_disk->ioaccel_cmds_out); 4742 return use_sg; 4743 } 4744 4745 if (use_sg) { 4746 curr_sg = cp->SG; 4747 scsi_for_each_sg(cmd, sg, use_sg, i) { 4748 addr64 = (u64) sg_dma_address(sg); 4749 len = sg_dma_len(sg); 4750 total_len += len; 4751 curr_sg->Addr = cpu_to_le64(addr64); 4752 curr_sg->Len = cpu_to_le32(len); 4753 curr_sg->Ext = cpu_to_le32(0); 4754 curr_sg++; 4755 } 4756 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4757 4758 switch (cmd->sc_data_direction) { 4759 case DMA_TO_DEVICE: 4760 control |= IOACCEL1_CONTROL_DATA_OUT; 4761 break; 4762 case DMA_FROM_DEVICE: 4763 control |= IOACCEL1_CONTROL_DATA_IN; 4764 break; 4765 case DMA_NONE: 4766 control |= IOACCEL1_CONTROL_NODATAXFER; 4767 break; 4768 default: 4769 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4770 cmd->sc_data_direction); 4771 BUG(); 4772 break; 4773 } 4774 } else { 4775 control |= IOACCEL1_CONTROL_NODATAXFER; 4776 } 4777 4778 c->Header.SGList = use_sg; 4779 /* Fill out the command structure to submit */ 4780 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4781 cp->transfer_len = cpu_to_le32(total_len); 4782 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4783 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4784 cp->control = cpu_to_le32(control); 4785 memcpy(cp->CDB, cdb, cdb_len); 4786 memcpy(cp->CISS_LUN, scsi3addr, 8); 4787 /* Tag was already set at init time. */ 4788 enqueue_cmd_and_start_io(h, c); 4789 return 0; 4790 } 4791 4792 /* 4793 * Queue a command directly to a device behind the controller using the 4794 * I/O accelerator path. 4795 */ 4796 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4797 struct CommandList *c) 4798 { 4799 struct scsi_cmnd *cmd = c->scsi_cmd; 4800 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4801 4802 if (!dev) 4803 return -1; 4804 4805 c->phys_disk = dev; 4806 4807 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4808 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4809 } 4810 4811 /* 4812 * Set encryption parameters for the ioaccel2 request 4813 */ 4814 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4815 struct CommandList *c, struct io_accel2_cmd *cp) 4816 { 4817 struct scsi_cmnd *cmd = c->scsi_cmd; 4818 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4819 struct raid_map_data *map = &dev->raid_map; 4820 u64 first_block; 4821 4822 /* Are we doing encryption on this device */ 4823 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4824 return; 4825 /* Set the data encryption key index. */ 4826 cp->dekindex = map->dekindex; 4827 4828 /* Set the encryption enable flag, encoded into direction field. */ 4829 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4830 4831 /* Set encryption tweak values based on logical block address 4832 * If block size is 512, tweak value is LBA. 4833 * For other block sizes, tweak is (LBA * block size)/ 512) 4834 */ 4835 switch (cmd->cmnd[0]) { 4836 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4837 case READ_6: 4838 case WRITE_6: 4839 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4840 (cmd->cmnd[2] << 8) | 4841 cmd->cmnd[3]); 4842 break; 4843 case WRITE_10: 4844 case READ_10: 4845 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4846 case WRITE_12: 4847 case READ_12: 4848 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4849 break; 4850 case WRITE_16: 4851 case READ_16: 4852 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4853 break; 4854 default: 4855 dev_err(&h->pdev->dev, 4856 "ERROR: %s: size (0x%x) not supported for encryption\n", 4857 __func__, cmd->cmnd[0]); 4858 BUG(); 4859 break; 4860 } 4861 4862 if (le32_to_cpu(map->volume_blk_size) != 512) 4863 first_block = first_block * 4864 le32_to_cpu(map->volume_blk_size)/512; 4865 4866 cp->tweak_lower = cpu_to_le32(first_block); 4867 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4868 } 4869 4870 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4871 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4872 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4873 { 4874 struct scsi_cmnd *cmd = c->scsi_cmd; 4875 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4876 struct ioaccel2_sg_element *curr_sg; 4877 int use_sg, i; 4878 struct scatterlist *sg; 4879 u64 addr64; 4880 u32 len; 4881 u32 total_len = 0; 4882 4883 if (!cmd->device) 4884 return -1; 4885 4886 if (!cmd->device->hostdata) 4887 return -1; 4888 4889 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4890 4891 if (is_zero_length_transfer(cdb)) { 4892 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4893 atomic_dec(&phys_disk->ioaccel_cmds_out); 4894 return IO_ACCEL_INELIGIBLE; 4895 } 4896 4897 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4898 atomic_dec(&phys_disk->ioaccel_cmds_out); 4899 return IO_ACCEL_INELIGIBLE; 4900 } 4901 4902 c->cmd_type = CMD_IOACCEL2; 4903 /* Adjust the DMA address to point to the accelerated command buffer */ 4904 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4905 (c->cmdindex * sizeof(*cp)); 4906 BUG_ON(c->busaddr & 0x0000007F); 4907 4908 memset(cp, 0, sizeof(*cp)); 4909 cp->IU_type = IOACCEL2_IU_TYPE; 4910 4911 use_sg = scsi_dma_map(cmd); 4912 if (use_sg < 0) { 4913 atomic_dec(&phys_disk->ioaccel_cmds_out); 4914 return use_sg; 4915 } 4916 4917 if (use_sg) { 4918 curr_sg = cp->sg; 4919 if (use_sg > h->ioaccel_maxsg) { 4920 addr64 = le64_to_cpu( 4921 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4922 curr_sg->address = cpu_to_le64(addr64); 4923 curr_sg->length = 0; 4924 curr_sg->reserved[0] = 0; 4925 curr_sg->reserved[1] = 0; 4926 curr_sg->reserved[2] = 0; 4927 curr_sg->chain_indicator = 0x80; 4928 4929 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4930 } 4931 scsi_for_each_sg(cmd, sg, use_sg, i) { 4932 addr64 = (u64) sg_dma_address(sg); 4933 len = sg_dma_len(sg); 4934 total_len += len; 4935 curr_sg->address = cpu_to_le64(addr64); 4936 curr_sg->length = cpu_to_le32(len); 4937 curr_sg->reserved[0] = 0; 4938 curr_sg->reserved[1] = 0; 4939 curr_sg->reserved[2] = 0; 4940 curr_sg->chain_indicator = 0; 4941 curr_sg++; 4942 } 4943 4944 switch (cmd->sc_data_direction) { 4945 case DMA_TO_DEVICE: 4946 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4947 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4948 break; 4949 case DMA_FROM_DEVICE: 4950 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4951 cp->direction |= IOACCEL2_DIR_DATA_IN; 4952 break; 4953 case DMA_NONE: 4954 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4955 cp->direction |= IOACCEL2_DIR_NO_DATA; 4956 break; 4957 default: 4958 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4959 cmd->sc_data_direction); 4960 BUG(); 4961 break; 4962 } 4963 } else { 4964 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4965 cp->direction |= IOACCEL2_DIR_NO_DATA; 4966 } 4967 4968 /* Set encryption parameters, if necessary */ 4969 set_encrypt_ioaccel2(h, c, cp); 4970 4971 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4972 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4973 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4974 4975 cp->data_len = cpu_to_le32(total_len); 4976 cp->err_ptr = cpu_to_le64(c->busaddr + 4977 offsetof(struct io_accel2_cmd, error_data)); 4978 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4979 4980 /* fill in sg elements */ 4981 if (use_sg > h->ioaccel_maxsg) { 4982 cp->sg_count = 1; 4983 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 4984 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 4985 atomic_dec(&phys_disk->ioaccel_cmds_out); 4986 scsi_dma_unmap(cmd); 4987 return -1; 4988 } 4989 } else 4990 cp->sg_count = (u8) use_sg; 4991 4992 enqueue_cmd_and_start_io(h, c); 4993 return 0; 4994 } 4995 4996 /* 4997 * Queue a command to the correct I/O accelerator path. 4998 */ 4999 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5000 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5001 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5002 { 5003 if (!c->scsi_cmd->device) 5004 return -1; 5005 5006 if (!c->scsi_cmd->device->hostdata) 5007 return -1; 5008 5009 /* Try to honor the device's queue depth */ 5010 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5011 phys_disk->queue_depth) { 5012 atomic_dec(&phys_disk->ioaccel_cmds_out); 5013 return IO_ACCEL_INELIGIBLE; 5014 } 5015 if (h->transMethod & CFGTBL_Trans_io_accel1) 5016 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5017 cdb, cdb_len, scsi3addr, 5018 phys_disk); 5019 else 5020 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5021 cdb, cdb_len, scsi3addr, 5022 phys_disk); 5023 } 5024 5025 static void raid_map_helper(struct raid_map_data *map, 5026 int offload_to_mirror, u32 *map_index, u32 *current_group) 5027 { 5028 if (offload_to_mirror == 0) { 5029 /* use physical disk in the first mirrored group. */ 5030 *map_index %= le16_to_cpu(map->data_disks_per_row); 5031 return; 5032 } 5033 do { 5034 /* determine mirror group that *map_index indicates */ 5035 *current_group = *map_index / 5036 le16_to_cpu(map->data_disks_per_row); 5037 if (offload_to_mirror == *current_group) 5038 continue; 5039 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5040 /* select map index from next group */ 5041 *map_index += le16_to_cpu(map->data_disks_per_row); 5042 (*current_group)++; 5043 } else { 5044 /* select map index from first group */ 5045 *map_index %= le16_to_cpu(map->data_disks_per_row); 5046 *current_group = 0; 5047 } 5048 } while (offload_to_mirror != *current_group); 5049 } 5050 5051 /* 5052 * Attempt to perform offload RAID mapping for a logical volume I/O. 5053 */ 5054 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5055 struct CommandList *c) 5056 { 5057 struct scsi_cmnd *cmd = c->scsi_cmd; 5058 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5059 struct raid_map_data *map = &dev->raid_map; 5060 struct raid_map_disk_data *dd = &map->data[0]; 5061 int is_write = 0; 5062 u32 map_index; 5063 u64 first_block, last_block; 5064 u32 block_cnt; 5065 u32 blocks_per_row; 5066 u64 first_row, last_row; 5067 u32 first_row_offset, last_row_offset; 5068 u32 first_column, last_column; 5069 u64 r0_first_row, r0_last_row; 5070 u32 r5or6_blocks_per_row; 5071 u64 r5or6_first_row, r5or6_last_row; 5072 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5073 u32 r5or6_first_column, r5or6_last_column; 5074 u32 total_disks_per_row; 5075 u32 stripesize; 5076 u32 first_group, last_group, current_group; 5077 u32 map_row; 5078 u32 disk_handle; 5079 u64 disk_block; 5080 u32 disk_block_cnt; 5081 u8 cdb[16]; 5082 u8 cdb_len; 5083 u16 strip_size; 5084 #if BITS_PER_LONG == 32 5085 u64 tmpdiv; 5086 #endif 5087 int offload_to_mirror; 5088 5089 if (!dev) 5090 return -1; 5091 5092 /* check for valid opcode, get LBA and block count */ 5093 switch (cmd->cmnd[0]) { 5094 case WRITE_6: 5095 is_write = 1; 5096 /* fall through */ 5097 case READ_6: 5098 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5099 (cmd->cmnd[2] << 8) | 5100 cmd->cmnd[3]); 5101 block_cnt = cmd->cmnd[4]; 5102 if (block_cnt == 0) 5103 block_cnt = 256; 5104 break; 5105 case WRITE_10: 5106 is_write = 1; 5107 /* fall through */ 5108 case READ_10: 5109 first_block = 5110 (((u64) cmd->cmnd[2]) << 24) | 5111 (((u64) cmd->cmnd[3]) << 16) | 5112 (((u64) cmd->cmnd[4]) << 8) | 5113 cmd->cmnd[5]; 5114 block_cnt = 5115 (((u32) cmd->cmnd[7]) << 8) | 5116 cmd->cmnd[8]; 5117 break; 5118 case WRITE_12: 5119 is_write = 1; 5120 /* fall through */ 5121 case READ_12: 5122 first_block = 5123 (((u64) cmd->cmnd[2]) << 24) | 5124 (((u64) cmd->cmnd[3]) << 16) | 5125 (((u64) cmd->cmnd[4]) << 8) | 5126 cmd->cmnd[5]; 5127 block_cnt = 5128 (((u32) cmd->cmnd[6]) << 24) | 5129 (((u32) cmd->cmnd[7]) << 16) | 5130 (((u32) cmd->cmnd[8]) << 8) | 5131 cmd->cmnd[9]; 5132 break; 5133 case WRITE_16: 5134 is_write = 1; 5135 /* fall through */ 5136 case READ_16: 5137 first_block = 5138 (((u64) cmd->cmnd[2]) << 56) | 5139 (((u64) cmd->cmnd[3]) << 48) | 5140 (((u64) cmd->cmnd[4]) << 40) | 5141 (((u64) cmd->cmnd[5]) << 32) | 5142 (((u64) cmd->cmnd[6]) << 24) | 5143 (((u64) cmd->cmnd[7]) << 16) | 5144 (((u64) cmd->cmnd[8]) << 8) | 5145 cmd->cmnd[9]; 5146 block_cnt = 5147 (((u32) cmd->cmnd[10]) << 24) | 5148 (((u32) cmd->cmnd[11]) << 16) | 5149 (((u32) cmd->cmnd[12]) << 8) | 5150 cmd->cmnd[13]; 5151 break; 5152 default: 5153 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5154 } 5155 last_block = first_block + block_cnt - 1; 5156 5157 /* check for write to non-RAID-0 */ 5158 if (is_write && dev->raid_level != 0) 5159 return IO_ACCEL_INELIGIBLE; 5160 5161 /* check for invalid block or wraparound */ 5162 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5163 last_block < first_block) 5164 return IO_ACCEL_INELIGIBLE; 5165 5166 /* calculate stripe information for the request */ 5167 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5168 le16_to_cpu(map->strip_size); 5169 strip_size = le16_to_cpu(map->strip_size); 5170 #if BITS_PER_LONG == 32 5171 tmpdiv = first_block; 5172 (void) do_div(tmpdiv, blocks_per_row); 5173 first_row = tmpdiv; 5174 tmpdiv = last_block; 5175 (void) do_div(tmpdiv, blocks_per_row); 5176 last_row = tmpdiv; 5177 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5178 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5179 tmpdiv = first_row_offset; 5180 (void) do_div(tmpdiv, strip_size); 5181 first_column = tmpdiv; 5182 tmpdiv = last_row_offset; 5183 (void) do_div(tmpdiv, strip_size); 5184 last_column = tmpdiv; 5185 #else 5186 first_row = first_block / blocks_per_row; 5187 last_row = last_block / blocks_per_row; 5188 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5189 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5190 first_column = first_row_offset / strip_size; 5191 last_column = last_row_offset / strip_size; 5192 #endif 5193 5194 /* if this isn't a single row/column then give to the controller */ 5195 if ((first_row != last_row) || (first_column != last_column)) 5196 return IO_ACCEL_INELIGIBLE; 5197 5198 /* proceeding with driver mapping */ 5199 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5200 le16_to_cpu(map->metadata_disks_per_row); 5201 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5202 le16_to_cpu(map->row_cnt); 5203 map_index = (map_row * total_disks_per_row) + first_column; 5204 5205 switch (dev->raid_level) { 5206 case HPSA_RAID_0: 5207 break; /* nothing special to do */ 5208 case HPSA_RAID_1: 5209 /* Handles load balance across RAID 1 members. 5210 * (2-drive R1 and R10 with even # of drives.) 5211 * Appropriate for SSDs, not optimal for HDDs 5212 */ 5213 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5214 if (dev->offload_to_mirror) 5215 map_index += le16_to_cpu(map->data_disks_per_row); 5216 dev->offload_to_mirror = !dev->offload_to_mirror; 5217 break; 5218 case HPSA_RAID_ADM: 5219 /* Handles N-way mirrors (R1-ADM) 5220 * and R10 with # of drives divisible by 3.) 5221 */ 5222 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5223 5224 offload_to_mirror = dev->offload_to_mirror; 5225 raid_map_helper(map, offload_to_mirror, 5226 &map_index, ¤t_group); 5227 /* set mirror group to use next time */ 5228 offload_to_mirror = 5229 (offload_to_mirror >= 5230 le16_to_cpu(map->layout_map_count) - 1) 5231 ? 0 : offload_to_mirror + 1; 5232 dev->offload_to_mirror = offload_to_mirror; 5233 /* Avoid direct use of dev->offload_to_mirror within this 5234 * function since multiple threads might simultaneously 5235 * increment it beyond the range of dev->layout_map_count -1. 5236 */ 5237 break; 5238 case HPSA_RAID_5: 5239 case HPSA_RAID_6: 5240 if (le16_to_cpu(map->layout_map_count) <= 1) 5241 break; 5242 5243 /* Verify first and last block are in same RAID group */ 5244 r5or6_blocks_per_row = 5245 le16_to_cpu(map->strip_size) * 5246 le16_to_cpu(map->data_disks_per_row); 5247 BUG_ON(r5or6_blocks_per_row == 0); 5248 stripesize = r5or6_blocks_per_row * 5249 le16_to_cpu(map->layout_map_count); 5250 #if BITS_PER_LONG == 32 5251 tmpdiv = first_block; 5252 first_group = do_div(tmpdiv, stripesize); 5253 tmpdiv = first_group; 5254 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5255 first_group = tmpdiv; 5256 tmpdiv = last_block; 5257 last_group = do_div(tmpdiv, stripesize); 5258 tmpdiv = last_group; 5259 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5260 last_group = tmpdiv; 5261 #else 5262 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5263 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5264 #endif 5265 if (first_group != last_group) 5266 return IO_ACCEL_INELIGIBLE; 5267 5268 /* Verify request is in a single row of RAID 5/6 */ 5269 #if BITS_PER_LONG == 32 5270 tmpdiv = first_block; 5271 (void) do_div(tmpdiv, stripesize); 5272 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5273 tmpdiv = last_block; 5274 (void) do_div(tmpdiv, stripesize); 5275 r5or6_last_row = r0_last_row = tmpdiv; 5276 #else 5277 first_row = r5or6_first_row = r0_first_row = 5278 first_block / stripesize; 5279 r5or6_last_row = r0_last_row = last_block / stripesize; 5280 #endif 5281 if (r5or6_first_row != r5or6_last_row) 5282 return IO_ACCEL_INELIGIBLE; 5283 5284 5285 /* Verify request is in a single column */ 5286 #if BITS_PER_LONG == 32 5287 tmpdiv = first_block; 5288 first_row_offset = do_div(tmpdiv, stripesize); 5289 tmpdiv = first_row_offset; 5290 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5291 r5or6_first_row_offset = first_row_offset; 5292 tmpdiv = last_block; 5293 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5294 tmpdiv = r5or6_last_row_offset; 5295 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5296 tmpdiv = r5or6_first_row_offset; 5297 (void) do_div(tmpdiv, map->strip_size); 5298 first_column = r5or6_first_column = tmpdiv; 5299 tmpdiv = r5or6_last_row_offset; 5300 (void) do_div(tmpdiv, map->strip_size); 5301 r5or6_last_column = tmpdiv; 5302 #else 5303 first_row_offset = r5or6_first_row_offset = 5304 (u32)((first_block % stripesize) % 5305 r5or6_blocks_per_row); 5306 5307 r5or6_last_row_offset = 5308 (u32)((last_block % stripesize) % 5309 r5or6_blocks_per_row); 5310 5311 first_column = r5or6_first_column = 5312 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5313 r5or6_last_column = 5314 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5315 #endif 5316 if (r5or6_first_column != r5or6_last_column) 5317 return IO_ACCEL_INELIGIBLE; 5318 5319 /* Request is eligible */ 5320 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5321 le16_to_cpu(map->row_cnt); 5322 5323 map_index = (first_group * 5324 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5325 (map_row * total_disks_per_row) + first_column; 5326 break; 5327 default: 5328 return IO_ACCEL_INELIGIBLE; 5329 } 5330 5331 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5332 return IO_ACCEL_INELIGIBLE; 5333 5334 c->phys_disk = dev->phys_disk[map_index]; 5335 if (!c->phys_disk) 5336 return IO_ACCEL_INELIGIBLE; 5337 5338 disk_handle = dd[map_index].ioaccel_handle; 5339 disk_block = le64_to_cpu(map->disk_starting_blk) + 5340 first_row * le16_to_cpu(map->strip_size) + 5341 (first_row_offset - first_column * 5342 le16_to_cpu(map->strip_size)); 5343 disk_block_cnt = block_cnt; 5344 5345 /* handle differing logical/physical block sizes */ 5346 if (map->phys_blk_shift) { 5347 disk_block <<= map->phys_blk_shift; 5348 disk_block_cnt <<= map->phys_blk_shift; 5349 } 5350 BUG_ON(disk_block_cnt > 0xffff); 5351 5352 /* build the new CDB for the physical disk I/O */ 5353 if (disk_block > 0xffffffff) { 5354 cdb[0] = is_write ? WRITE_16 : READ_16; 5355 cdb[1] = 0; 5356 cdb[2] = (u8) (disk_block >> 56); 5357 cdb[3] = (u8) (disk_block >> 48); 5358 cdb[4] = (u8) (disk_block >> 40); 5359 cdb[5] = (u8) (disk_block >> 32); 5360 cdb[6] = (u8) (disk_block >> 24); 5361 cdb[7] = (u8) (disk_block >> 16); 5362 cdb[8] = (u8) (disk_block >> 8); 5363 cdb[9] = (u8) (disk_block); 5364 cdb[10] = (u8) (disk_block_cnt >> 24); 5365 cdb[11] = (u8) (disk_block_cnt >> 16); 5366 cdb[12] = (u8) (disk_block_cnt >> 8); 5367 cdb[13] = (u8) (disk_block_cnt); 5368 cdb[14] = 0; 5369 cdb[15] = 0; 5370 cdb_len = 16; 5371 } else { 5372 cdb[0] = is_write ? WRITE_10 : READ_10; 5373 cdb[1] = 0; 5374 cdb[2] = (u8) (disk_block >> 24); 5375 cdb[3] = (u8) (disk_block >> 16); 5376 cdb[4] = (u8) (disk_block >> 8); 5377 cdb[5] = (u8) (disk_block); 5378 cdb[6] = 0; 5379 cdb[7] = (u8) (disk_block_cnt >> 8); 5380 cdb[8] = (u8) (disk_block_cnt); 5381 cdb[9] = 0; 5382 cdb_len = 10; 5383 } 5384 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5385 dev->scsi3addr, 5386 dev->phys_disk[map_index]); 5387 } 5388 5389 /* 5390 * Submit commands down the "normal" RAID stack path 5391 * All callers to hpsa_ciss_submit must check lockup_detected 5392 * beforehand, before (opt.) and after calling cmd_alloc 5393 */ 5394 static int hpsa_ciss_submit(struct ctlr_info *h, 5395 struct CommandList *c, struct scsi_cmnd *cmd, 5396 unsigned char scsi3addr[]) 5397 { 5398 cmd->host_scribble = (unsigned char *) c; 5399 c->cmd_type = CMD_SCSI; 5400 c->scsi_cmd = cmd; 5401 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5402 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5403 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5404 5405 /* Fill in the request block... */ 5406 5407 c->Request.Timeout = 0; 5408 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5409 c->Request.CDBLen = cmd->cmd_len; 5410 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5411 switch (cmd->sc_data_direction) { 5412 case DMA_TO_DEVICE: 5413 c->Request.type_attr_dir = 5414 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5415 break; 5416 case DMA_FROM_DEVICE: 5417 c->Request.type_attr_dir = 5418 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5419 break; 5420 case DMA_NONE: 5421 c->Request.type_attr_dir = 5422 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5423 break; 5424 case DMA_BIDIRECTIONAL: 5425 /* This can happen if a buggy application does a scsi passthru 5426 * and sets both inlen and outlen to non-zero. ( see 5427 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5428 */ 5429 5430 c->Request.type_attr_dir = 5431 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5432 /* This is technically wrong, and hpsa controllers should 5433 * reject it with CMD_INVALID, which is the most correct 5434 * response, but non-fibre backends appear to let it 5435 * slide by, and give the same results as if this field 5436 * were set correctly. Either way is acceptable for 5437 * our purposes here. 5438 */ 5439 5440 break; 5441 5442 default: 5443 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5444 cmd->sc_data_direction); 5445 BUG(); 5446 break; 5447 } 5448 5449 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5450 hpsa_cmd_resolve_and_free(h, c); 5451 return SCSI_MLQUEUE_HOST_BUSY; 5452 } 5453 enqueue_cmd_and_start_io(h, c); 5454 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5455 return 0; 5456 } 5457 5458 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5459 struct CommandList *c) 5460 { 5461 dma_addr_t cmd_dma_handle, err_dma_handle; 5462 5463 /* Zero out all of commandlist except the last field, refcount */ 5464 memset(c, 0, offsetof(struct CommandList, refcount)); 5465 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5466 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5467 c->err_info = h->errinfo_pool + index; 5468 memset(c->err_info, 0, sizeof(*c->err_info)); 5469 err_dma_handle = h->errinfo_pool_dhandle 5470 + index * sizeof(*c->err_info); 5471 c->cmdindex = index; 5472 c->busaddr = (u32) cmd_dma_handle; 5473 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5474 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5475 c->h = h; 5476 c->scsi_cmd = SCSI_CMD_IDLE; 5477 } 5478 5479 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5480 { 5481 int i; 5482 5483 for (i = 0; i < h->nr_cmds; i++) { 5484 struct CommandList *c = h->cmd_pool + i; 5485 5486 hpsa_cmd_init(h, i, c); 5487 atomic_set(&c->refcount, 0); 5488 } 5489 } 5490 5491 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5492 struct CommandList *c) 5493 { 5494 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5495 5496 BUG_ON(c->cmdindex != index); 5497 5498 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5499 memset(c->err_info, 0, sizeof(*c->err_info)); 5500 c->busaddr = (u32) cmd_dma_handle; 5501 } 5502 5503 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5504 struct CommandList *c, struct scsi_cmnd *cmd, 5505 unsigned char *scsi3addr) 5506 { 5507 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5508 int rc = IO_ACCEL_INELIGIBLE; 5509 5510 if (!dev) 5511 return SCSI_MLQUEUE_HOST_BUSY; 5512 5513 cmd->host_scribble = (unsigned char *) c; 5514 5515 if (dev->offload_enabled) { 5516 hpsa_cmd_init(h, c->cmdindex, c); 5517 c->cmd_type = CMD_SCSI; 5518 c->scsi_cmd = cmd; 5519 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5520 if (rc < 0) /* scsi_dma_map failed. */ 5521 rc = SCSI_MLQUEUE_HOST_BUSY; 5522 } else if (dev->hba_ioaccel_enabled) { 5523 hpsa_cmd_init(h, c->cmdindex, c); 5524 c->cmd_type = CMD_SCSI; 5525 c->scsi_cmd = cmd; 5526 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5527 if (rc < 0) /* scsi_dma_map failed. */ 5528 rc = SCSI_MLQUEUE_HOST_BUSY; 5529 } 5530 return rc; 5531 } 5532 5533 static void hpsa_command_resubmit_worker(struct work_struct *work) 5534 { 5535 struct scsi_cmnd *cmd; 5536 struct hpsa_scsi_dev_t *dev; 5537 struct CommandList *c = container_of(work, struct CommandList, work); 5538 5539 cmd = c->scsi_cmd; 5540 dev = cmd->device->hostdata; 5541 if (!dev) { 5542 cmd->result = DID_NO_CONNECT << 16; 5543 return hpsa_cmd_free_and_done(c->h, c, cmd); 5544 } 5545 if (c->reset_pending) 5546 return hpsa_cmd_free_and_done(c->h, c, cmd); 5547 if (c->cmd_type == CMD_IOACCEL2) { 5548 struct ctlr_info *h = c->h; 5549 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5550 int rc; 5551 5552 if (c2->error_data.serv_response == 5553 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5554 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5555 if (rc == 0) 5556 return; 5557 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5558 /* 5559 * If we get here, it means dma mapping failed. 5560 * Try again via scsi mid layer, which will 5561 * then get SCSI_MLQUEUE_HOST_BUSY. 5562 */ 5563 cmd->result = DID_IMM_RETRY << 16; 5564 return hpsa_cmd_free_and_done(h, c, cmd); 5565 } 5566 /* else, fall thru and resubmit down CISS path */ 5567 } 5568 } 5569 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5570 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5571 /* 5572 * If we get here, it means dma mapping failed. Try 5573 * again via scsi mid layer, which will then get 5574 * SCSI_MLQUEUE_HOST_BUSY. 5575 * 5576 * hpsa_ciss_submit will have already freed c 5577 * if it encountered a dma mapping failure. 5578 */ 5579 cmd->result = DID_IMM_RETRY << 16; 5580 cmd->scsi_done(cmd); 5581 } 5582 } 5583 5584 /* Running in struct Scsi_Host->host_lock less mode */ 5585 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5586 { 5587 struct ctlr_info *h; 5588 struct hpsa_scsi_dev_t *dev; 5589 unsigned char scsi3addr[8]; 5590 struct CommandList *c; 5591 int rc = 0; 5592 5593 /* Get the ptr to our adapter structure out of cmd->host. */ 5594 h = sdev_to_hba(cmd->device); 5595 5596 BUG_ON(cmd->request->tag < 0); 5597 5598 dev = cmd->device->hostdata; 5599 if (!dev) { 5600 cmd->result = DID_NO_CONNECT << 16; 5601 cmd->scsi_done(cmd); 5602 return 0; 5603 } 5604 5605 if (dev->removed) { 5606 cmd->result = DID_NO_CONNECT << 16; 5607 cmd->scsi_done(cmd); 5608 return 0; 5609 } 5610 5611 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5612 5613 if (unlikely(lockup_detected(h))) { 5614 cmd->result = DID_NO_CONNECT << 16; 5615 cmd->scsi_done(cmd); 5616 return 0; 5617 } 5618 c = cmd_tagged_alloc(h, cmd); 5619 5620 /* 5621 * Call alternate submit routine for I/O accelerated commands. 5622 * Retries always go down the normal I/O path. 5623 */ 5624 if (likely(cmd->retries == 0 && 5625 !blk_rq_is_passthrough(cmd->request) && 5626 h->acciopath_status)) { 5627 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5628 if (rc == 0) 5629 return 0; 5630 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5631 hpsa_cmd_resolve_and_free(h, c); 5632 return SCSI_MLQUEUE_HOST_BUSY; 5633 } 5634 } 5635 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5636 } 5637 5638 static void hpsa_scan_complete(struct ctlr_info *h) 5639 { 5640 unsigned long flags; 5641 5642 spin_lock_irqsave(&h->scan_lock, flags); 5643 h->scan_finished = 1; 5644 wake_up(&h->scan_wait_queue); 5645 spin_unlock_irqrestore(&h->scan_lock, flags); 5646 } 5647 5648 static void hpsa_scan_start(struct Scsi_Host *sh) 5649 { 5650 struct ctlr_info *h = shost_to_hba(sh); 5651 unsigned long flags; 5652 5653 /* 5654 * Don't let rescans be initiated on a controller known to be locked 5655 * up. If the controller locks up *during* a rescan, that thread is 5656 * probably hosed, but at least we can prevent new rescan threads from 5657 * piling up on a locked up controller. 5658 */ 5659 if (unlikely(lockup_detected(h))) 5660 return hpsa_scan_complete(h); 5661 5662 /* 5663 * If a scan is already waiting to run, no need to add another 5664 */ 5665 spin_lock_irqsave(&h->scan_lock, flags); 5666 if (h->scan_waiting) { 5667 spin_unlock_irqrestore(&h->scan_lock, flags); 5668 return; 5669 } 5670 5671 spin_unlock_irqrestore(&h->scan_lock, flags); 5672 5673 /* wait until any scan already in progress is finished. */ 5674 while (1) { 5675 spin_lock_irqsave(&h->scan_lock, flags); 5676 if (h->scan_finished) 5677 break; 5678 h->scan_waiting = 1; 5679 spin_unlock_irqrestore(&h->scan_lock, flags); 5680 wait_event(h->scan_wait_queue, h->scan_finished); 5681 /* Note: We don't need to worry about a race between this 5682 * thread and driver unload because the midlayer will 5683 * have incremented the reference count, so unload won't 5684 * happen if we're in here. 5685 */ 5686 } 5687 h->scan_finished = 0; /* mark scan as in progress */ 5688 h->scan_waiting = 0; 5689 spin_unlock_irqrestore(&h->scan_lock, flags); 5690 5691 if (unlikely(lockup_detected(h))) 5692 return hpsa_scan_complete(h); 5693 5694 /* 5695 * Do the scan after a reset completion 5696 */ 5697 spin_lock_irqsave(&h->reset_lock, flags); 5698 if (h->reset_in_progress) { 5699 h->drv_req_rescan = 1; 5700 spin_unlock_irqrestore(&h->reset_lock, flags); 5701 hpsa_scan_complete(h); 5702 return; 5703 } 5704 spin_unlock_irqrestore(&h->reset_lock, flags); 5705 5706 hpsa_update_scsi_devices(h); 5707 5708 hpsa_scan_complete(h); 5709 } 5710 5711 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5712 { 5713 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5714 5715 if (!logical_drive) 5716 return -ENODEV; 5717 5718 if (qdepth < 1) 5719 qdepth = 1; 5720 else if (qdepth > logical_drive->queue_depth) 5721 qdepth = logical_drive->queue_depth; 5722 5723 return scsi_change_queue_depth(sdev, qdepth); 5724 } 5725 5726 static int hpsa_scan_finished(struct Scsi_Host *sh, 5727 unsigned long elapsed_time) 5728 { 5729 struct ctlr_info *h = shost_to_hba(sh); 5730 unsigned long flags; 5731 int finished; 5732 5733 spin_lock_irqsave(&h->scan_lock, flags); 5734 finished = h->scan_finished; 5735 spin_unlock_irqrestore(&h->scan_lock, flags); 5736 return finished; 5737 } 5738 5739 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5740 { 5741 struct Scsi_Host *sh; 5742 5743 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5744 if (sh == NULL) { 5745 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5746 return -ENOMEM; 5747 } 5748 5749 sh->io_port = 0; 5750 sh->n_io_port = 0; 5751 sh->this_id = -1; 5752 sh->max_channel = 3; 5753 sh->max_cmd_len = MAX_COMMAND_SIZE; 5754 sh->max_lun = HPSA_MAX_LUN; 5755 sh->max_id = HPSA_MAX_LUN; 5756 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5757 sh->cmd_per_lun = sh->can_queue; 5758 sh->sg_tablesize = h->maxsgentries; 5759 sh->transportt = hpsa_sas_transport_template; 5760 sh->hostdata[0] = (unsigned long) h; 5761 sh->irq = pci_irq_vector(h->pdev, 0); 5762 sh->unique_id = sh->irq; 5763 5764 h->scsi_host = sh; 5765 return 0; 5766 } 5767 5768 static int hpsa_scsi_add_host(struct ctlr_info *h) 5769 { 5770 int rv; 5771 5772 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5773 if (rv) { 5774 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5775 return rv; 5776 } 5777 scsi_scan_host(h->scsi_host); 5778 return 0; 5779 } 5780 5781 /* 5782 * The block layer has already gone to the trouble of picking out a unique, 5783 * small-integer tag for this request. We use an offset from that value as 5784 * an index to select our command block. (The offset allows us to reserve the 5785 * low-numbered entries for our own uses.) 5786 */ 5787 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5788 { 5789 int idx = scmd->request->tag; 5790 5791 if (idx < 0) 5792 return idx; 5793 5794 /* Offset to leave space for internal cmds. */ 5795 return idx += HPSA_NRESERVED_CMDS; 5796 } 5797 5798 /* 5799 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5800 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5801 */ 5802 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5803 struct CommandList *c, unsigned char lunaddr[], 5804 int reply_queue) 5805 { 5806 int rc; 5807 5808 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5809 (void) fill_cmd(c, TEST_UNIT_READY, h, 5810 NULL, 0, 0, lunaddr, TYPE_CMD); 5811 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5812 if (rc) 5813 return rc; 5814 /* no unmap needed here because no data xfer. */ 5815 5816 /* Check if the unit is already ready. */ 5817 if (c->err_info->CommandStatus == CMD_SUCCESS) 5818 return 0; 5819 5820 /* 5821 * The first command sent after reset will receive "unit attention" to 5822 * indicate that the LUN has been reset...this is actually what we're 5823 * looking for (but, success is good too). 5824 */ 5825 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5826 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5827 (c->err_info->SenseInfo[2] == NO_SENSE || 5828 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5829 return 0; 5830 5831 return 1; 5832 } 5833 5834 /* 5835 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5836 * returns zero when the unit is ready, and non-zero when giving up. 5837 */ 5838 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5839 struct CommandList *c, 5840 unsigned char lunaddr[], int reply_queue) 5841 { 5842 int rc; 5843 int count = 0; 5844 int waittime = 1; /* seconds */ 5845 5846 /* Send test unit ready until device ready, or give up. */ 5847 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5848 5849 /* 5850 * Wait for a bit. do this first, because if we send 5851 * the TUR right away, the reset will just abort it. 5852 */ 5853 msleep(1000 * waittime); 5854 5855 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5856 if (!rc) 5857 break; 5858 5859 /* Increase wait time with each try, up to a point. */ 5860 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5861 waittime *= 2; 5862 5863 dev_warn(&h->pdev->dev, 5864 "waiting %d secs for device to become ready.\n", 5865 waittime); 5866 } 5867 5868 return rc; 5869 } 5870 5871 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5872 unsigned char lunaddr[], 5873 int reply_queue) 5874 { 5875 int first_queue; 5876 int last_queue; 5877 int rq; 5878 int rc = 0; 5879 struct CommandList *c; 5880 5881 c = cmd_alloc(h); 5882 5883 /* 5884 * If no specific reply queue was requested, then send the TUR 5885 * repeatedly, requesting a reply on each reply queue; otherwise execute 5886 * the loop exactly once using only the specified queue. 5887 */ 5888 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5889 first_queue = 0; 5890 last_queue = h->nreply_queues - 1; 5891 } else { 5892 first_queue = reply_queue; 5893 last_queue = reply_queue; 5894 } 5895 5896 for (rq = first_queue; rq <= last_queue; rq++) { 5897 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5898 if (rc) 5899 break; 5900 } 5901 5902 if (rc) 5903 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5904 else 5905 dev_warn(&h->pdev->dev, "device is ready.\n"); 5906 5907 cmd_free(h, c); 5908 return rc; 5909 } 5910 5911 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5912 * complaining. Doing a host- or bus-reset can't do anything good here. 5913 */ 5914 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5915 { 5916 int rc = SUCCESS; 5917 struct ctlr_info *h; 5918 struct hpsa_scsi_dev_t *dev; 5919 u8 reset_type; 5920 char msg[48]; 5921 unsigned long flags; 5922 5923 /* find the controller to which the command to be aborted was sent */ 5924 h = sdev_to_hba(scsicmd->device); 5925 if (h == NULL) /* paranoia */ 5926 return FAILED; 5927 5928 spin_lock_irqsave(&h->reset_lock, flags); 5929 h->reset_in_progress = 1; 5930 spin_unlock_irqrestore(&h->reset_lock, flags); 5931 5932 if (lockup_detected(h)) { 5933 rc = FAILED; 5934 goto return_reset_status; 5935 } 5936 5937 dev = scsicmd->device->hostdata; 5938 if (!dev) { 5939 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5940 rc = FAILED; 5941 goto return_reset_status; 5942 } 5943 5944 if (dev->devtype == TYPE_ENCLOSURE) { 5945 rc = SUCCESS; 5946 goto return_reset_status; 5947 } 5948 5949 /* if controller locked up, we can guarantee command won't complete */ 5950 if (lockup_detected(h)) { 5951 snprintf(msg, sizeof(msg), 5952 "cmd %d RESET FAILED, lockup detected", 5953 hpsa_get_cmd_index(scsicmd)); 5954 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5955 rc = FAILED; 5956 goto return_reset_status; 5957 } 5958 5959 /* this reset request might be the result of a lockup; check */ 5960 if (detect_controller_lockup(h)) { 5961 snprintf(msg, sizeof(msg), 5962 "cmd %d RESET FAILED, new lockup detected", 5963 hpsa_get_cmd_index(scsicmd)); 5964 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5965 rc = FAILED; 5966 goto return_reset_status; 5967 } 5968 5969 /* Do not attempt on controller */ 5970 if (is_hba_lunid(dev->scsi3addr)) { 5971 rc = SUCCESS; 5972 goto return_reset_status; 5973 } 5974 5975 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5976 reset_type = HPSA_DEVICE_RESET_MSG; 5977 else 5978 reset_type = HPSA_PHYS_TARGET_RESET; 5979 5980 sprintf(msg, "resetting %s", 5981 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5982 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5983 5984 /* send a reset to the SCSI LUN which the command was sent to */ 5985 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5986 DEFAULT_REPLY_QUEUE); 5987 if (rc == 0) 5988 rc = SUCCESS; 5989 else 5990 rc = FAILED; 5991 5992 sprintf(msg, "reset %s %s", 5993 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 5994 rc == SUCCESS ? "completed successfully" : "failed"); 5995 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5996 5997 return_reset_status: 5998 spin_lock_irqsave(&h->reset_lock, flags); 5999 h->reset_in_progress = 0; 6000 spin_unlock_irqrestore(&h->reset_lock, flags); 6001 return rc; 6002 } 6003 6004 /* 6005 * For operations with an associated SCSI command, a command block is allocated 6006 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6007 * block request tag as an index into a table of entries. cmd_tagged_free() is 6008 * the complement, although cmd_free() may be called instead. 6009 */ 6010 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6011 struct scsi_cmnd *scmd) 6012 { 6013 int idx = hpsa_get_cmd_index(scmd); 6014 struct CommandList *c = h->cmd_pool + idx; 6015 6016 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6017 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6018 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6019 /* The index value comes from the block layer, so if it's out of 6020 * bounds, it's probably not our bug. 6021 */ 6022 BUG(); 6023 } 6024 6025 atomic_inc(&c->refcount); 6026 if (unlikely(!hpsa_is_cmd_idle(c))) { 6027 /* 6028 * We expect that the SCSI layer will hand us a unique tag 6029 * value. Thus, there should never be a collision here between 6030 * two requests...because if the selected command isn't idle 6031 * then someone is going to be very disappointed. 6032 */ 6033 dev_err(&h->pdev->dev, 6034 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6035 idx); 6036 if (c->scsi_cmd != NULL) 6037 scsi_print_command(c->scsi_cmd); 6038 scsi_print_command(scmd); 6039 } 6040 6041 hpsa_cmd_partial_init(h, idx, c); 6042 return c; 6043 } 6044 6045 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6046 { 6047 /* 6048 * Release our reference to the block. We don't need to do anything 6049 * else to free it, because it is accessed by index. 6050 */ 6051 (void)atomic_dec(&c->refcount); 6052 } 6053 6054 /* 6055 * For operations that cannot sleep, a command block is allocated at init, 6056 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6057 * which ones are free or in use. Lock must be held when calling this. 6058 * cmd_free() is the complement. 6059 * This function never gives up and returns NULL. If it hangs, 6060 * another thread must call cmd_free() to free some tags. 6061 */ 6062 6063 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6064 { 6065 struct CommandList *c; 6066 int refcount, i; 6067 int offset = 0; 6068 6069 /* 6070 * There is some *extremely* small but non-zero chance that that 6071 * multiple threads could get in here, and one thread could 6072 * be scanning through the list of bits looking for a free 6073 * one, but the free ones are always behind him, and other 6074 * threads sneak in behind him and eat them before he can 6075 * get to them, so that while there is always a free one, a 6076 * very unlucky thread might be starved anyway, never able to 6077 * beat the other threads. In reality, this happens so 6078 * infrequently as to be indistinguishable from never. 6079 * 6080 * Note that we start allocating commands before the SCSI host structure 6081 * is initialized. Since the search starts at bit zero, this 6082 * all works, since we have at least one command structure available; 6083 * however, it means that the structures with the low indexes have to be 6084 * reserved for driver-initiated requests, while requests from the block 6085 * layer will use the higher indexes. 6086 */ 6087 6088 for (;;) { 6089 i = find_next_zero_bit(h->cmd_pool_bits, 6090 HPSA_NRESERVED_CMDS, 6091 offset); 6092 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6093 offset = 0; 6094 continue; 6095 } 6096 c = h->cmd_pool + i; 6097 refcount = atomic_inc_return(&c->refcount); 6098 if (unlikely(refcount > 1)) { 6099 cmd_free(h, c); /* already in use */ 6100 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6101 continue; 6102 } 6103 set_bit(i & (BITS_PER_LONG - 1), 6104 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6105 break; /* it's ours now. */ 6106 } 6107 hpsa_cmd_partial_init(h, i, c); 6108 return c; 6109 } 6110 6111 /* 6112 * This is the complementary operation to cmd_alloc(). Note, however, in some 6113 * corner cases it may also be used to free blocks allocated by 6114 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6115 * the clear-bit is harmless. 6116 */ 6117 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6118 { 6119 if (atomic_dec_and_test(&c->refcount)) { 6120 int i; 6121 6122 i = c - h->cmd_pool; 6123 clear_bit(i & (BITS_PER_LONG - 1), 6124 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6125 } 6126 } 6127 6128 #ifdef CONFIG_COMPAT 6129 6130 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6131 void __user *arg) 6132 { 6133 IOCTL32_Command_struct __user *arg32 = 6134 (IOCTL32_Command_struct __user *) arg; 6135 IOCTL_Command_struct arg64; 6136 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6137 int err; 6138 u32 cp; 6139 6140 memset(&arg64, 0, sizeof(arg64)); 6141 err = 0; 6142 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6143 sizeof(arg64.LUN_info)); 6144 err |= copy_from_user(&arg64.Request, &arg32->Request, 6145 sizeof(arg64.Request)); 6146 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6147 sizeof(arg64.error_info)); 6148 err |= get_user(arg64.buf_size, &arg32->buf_size); 6149 err |= get_user(cp, &arg32->buf); 6150 arg64.buf = compat_ptr(cp); 6151 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6152 6153 if (err) 6154 return -EFAULT; 6155 6156 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6157 if (err) 6158 return err; 6159 err |= copy_in_user(&arg32->error_info, &p->error_info, 6160 sizeof(arg32->error_info)); 6161 if (err) 6162 return -EFAULT; 6163 return err; 6164 } 6165 6166 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6167 int cmd, void __user *arg) 6168 { 6169 BIG_IOCTL32_Command_struct __user *arg32 = 6170 (BIG_IOCTL32_Command_struct __user *) arg; 6171 BIG_IOCTL_Command_struct arg64; 6172 BIG_IOCTL_Command_struct __user *p = 6173 compat_alloc_user_space(sizeof(arg64)); 6174 int err; 6175 u32 cp; 6176 6177 memset(&arg64, 0, sizeof(arg64)); 6178 err = 0; 6179 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6180 sizeof(arg64.LUN_info)); 6181 err |= copy_from_user(&arg64.Request, &arg32->Request, 6182 sizeof(arg64.Request)); 6183 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6184 sizeof(arg64.error_info)); 6185 err |= get_user(arg64.buf_size, &arg32->buf_size); 6186 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6187 err |= get_user(cp, &arg32->buf); 6188 arg64.buf = compat_ptr(cp); 6189 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6190 6191 if (err) 6192 return -EFAULT; 6193 6194 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6195 if (err) 6196 return err; 6197 err |= copy_in_user(&arg32->error_info, &p->error_info, 6198 sizeof(arg32->error_info)); 6199 if (err) 6200 return -EFAULT; 6201 return err; 6202 } 6203 6204 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6205 { 6206 switch (cmd) { 6207 case CCISS_GETPCIINFO: 6208 case CCISS_GETINTINFO: 6209 case CCISS_SETINTINFO: 6210 case CCISS_GETNODENAME: 6211 case CCISS_SETNODENAME: 6212 case CCISS_GETHEARTBEAT: 6213 case CCISS_GETBUSTYPES: 6214 case CCISS_GETFIRMVER: 6215 case CCISS_GETDRIVVER: 6216 case CCISS_REVALIDVOLS: 6217 case CCISS_DEREGDISK: 6218 case CCISS_REGNEWDISK: 6219 case CCISS_REGNEWD: 6220 case CCISS_RESCANDISK: 6221 case CCISS_GETLUNINFO: 6222 return hpsa_ioctl(dev, cmd, arg); 6223 6224 case CCISS_PASSTHRU32: 6225 return hpsa_ioctl32_passthru(dev, cmd, arg); 6226 case CCISS_BIG_PASSTHRU32: 6227 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6228 6229 default: 6230 return -ENOIOCTLCMD; 6231 } 6232 } 6233 #endif 6234 6235 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6236 { 6237 struct hpsa_pci_info pciinfo; 6238 6239 if (!argp) 6240 return -EINVAL; 6241 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6242 pciinfo.bus = h->pdev->bus->number; 6243 pciinfo.dev_fn = h->pdev->devfn; 6244 pciinfo.board_id = h->board_id; 6245 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6246 return -EFAULT; 6247 return 0; 6248 } 6249 6250 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6251 { 6252 DriverVer_type DriverVer; 6253 unsigned char vmaj, vmin, vsubmin; 6254 int rc; 6255 6256 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6257 &vmaj, &vmin, &vsubmin); 6258 if (rc != 3) { 6259 dev_info(&h->pdev->dev, "driver version string '%s' " 6260 "unrecognized.", HPSA_DRIVER_VERSION); 6261 vmaj = 0; 6262 vmin = 0; 6263 vsubmin = 0; 6264 } 6265 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6266 if (!argp) 6267 return -EINVAL; 6268 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6269 return -EFAULT; 6270 return 0; 6271 } 6272 6273 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6274 { 6275 IOCTL_Command_struct iocommand; 6276 struct CommandList *c; 6277 char *buff = NULL; 6278 u64 temp64; 6279 int rc = 0; 6280 6281 if (!argp) 6282 return -EINVAL; 6283 if (!capable(CAP_SYS_RAWIO)) 6284 return -EPERM; 6285 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6286 return -EFAULT; 6287 if ((iocommand.buf_size < 1) && 6288 (iocommand.Request.Type.Direction != XFER_NONE)) { 6289 return -EINVAL; 6290 } 6291 if (iocommand.buf_size > 0) { 6292 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6293 if (buff == NULL) 6294 return -ENOMEM; 6295 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6296 /* Copy the data into the buffer we created */ 6297 if (copy_from_user(buff, iocommand.buf, 6298 iocommand.buf_size)) { 6299 rc = -EFAULT; 6300 goto out_kfree; 6301 } 6302 } else { 6303 memset(buff, 0, iocommand.buf_size); 6304 } 6305 } 6306 c = cmd_alloc(h); 6307 6308 /* Fill in the command type */ 6309 c->cmd_type = CMD_IOCTL_PEND; 6310 c->scsi_cmd = SCSI_CMD_BUSY; 6311 /* Fill in Command Header */ 6312 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6313 if (iocommand.buf_size > 0) { /* buffer to fill */ 6314 c->Header.SGList = 1; 6315 c->Header.SGTotal = cpu_to_le16(1); 6316 } else { /* no buffers to fill */ 6317 c->Header.SGList = 0; 6318 c->Header.SGTotal = cpu_to_le16(0); 6319 } 6320 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6321 6322 /* Fill in Request block */ 6323 memcpy(&c->Request, &iocommand.Request, 6324 sizeof(c->Request)); 6325 6326 /* Fill in the scatter gather information */ 6327 if (iocommand.buf_size > 0) { 6328 temp64 = dma_map_single(&h->pdev->dev, buff, 6329 iocommand.buf_size, DMA_BIDIRECTIONAL); 6330 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6331 c->SG[0].Addr = cpu_to_le64(0); 6332 c->SG[0].Len = cpu_to_le32(0); 6333 rc = -ENOMEM; 6334 goto out; 6335 } 6336 c->SG[0].Addr = cpu_to_le64(temp64); 6337 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6338 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6339 } 6340 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6341 NO_TIMEOUT); 6342 if (iocommand.buf_size > 0) 6343 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6344 check_ioctl_unit_attention(h, c); 6345 if (rc) { 6346 rc = -EIO; 6347 goto out; 6348 } 6349 6350 /* Copy the error information out */ 6351 memcpy(&iocommand.error_info, c->err_info, 6352 sizeof(iocommand.error_info)); 6353 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6354 rc = -EFAULT; 6355 goto out; 6356 } 6357 if ((iocommand.Request.Type.Direction & XFER_READ) && 6358 iocommand.buf_size > 0) { 6359 /* Copy the data out of the buffer we created */ 6360 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6361 rc = -EFAULT; 6362 goto out; 6363 } 6364 } 6365 out: 6366 cmd_free(h, c); 6367 out_kfree: 6368 kfree(buff); 6369 return rc; 6370 } 6371 6372 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6373 { 6374 BIG_IOCTL_Command_struct *ioc; 6375 struct CommandList *c; 6376 unsigned char **buff = NULL; 6377 int *buff_size = NULL; 6378 u64 temp64; 6379 BYTE sg_used = 0; 6380 int status = 0; 6381 u32 left; 6382 u32 sz; 6383 BYTE __user *data_ptr; 6384 6385 if (!argp) 6386 return -EINVAL; 6387 if (!capable(CAP_SYS_RAWIO)) 6388 return -EPERM; 6389 ioc = vmemdup_user(argp, sizeof(*ioc)); 6390 if (IS_ERR(ioc)) { 6391 status = PTR_ERR(ioc); 6392 goto cleanup1; 6393 } 6394 if ((ioc->buf_size < 1) && 6395 (ioc->Request.Type.Direction != XFER_NONE)) { 6396 status = -EINVAL; 6397 goto cleanup1; 6398 } 6399 /* Check kmalloc limits using all SGs */ 6400 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6401 status = -EINVAL; 6402 goto cleanup1; 6403 } 6404 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6405 status = -EINVAL; 6406 goto cleanup1; 6407 } 6408 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6409 if (!buff) { 6410 status = -ENOMEM; 6411 goto cleanup1; 6412 } 6413 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6414 if (!buff_size) { 6415 status = -ENOMEM; 6416 goto cleanup1; 6417 } 6418 left = ioc->buf_size; 6419 data_ptr = ioc->buf; 6420 while (left) { 6421 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6422 buff_size[sg_used] = sz; 6423 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6424 if (buff[sg_used] == NULL) { 6425 status = -ENOMEM; 6426 goto cleanup1; 6427 } 6428 if (ioc->Request.Type.Direction & XFER_WRITE) { 6429 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6430 status = -EFAULT; 6431 goto cleanup1; 6432 } 6433 } else 6434 memset(buff[sg_used], 0, sz); 6435 left -= sz; 6436 data_ptr += sz; 6437 sg_used++; 6438 } 6439 c = cmd_alloc(h); 6440 6441 c->cmd_type = CMD_IOCTL_PEND; 6442 c->scsi_cmd = SCSI_CMD_BUSY; 6443 c->Header.ReplyQueue = 0; 6444 c->Header.SGList = (u8) sg_used; 6445 c->Header.SGTotal = cpu_to_le16(sg_used); 6446 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6447 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6448 if (ioc->buf_size > 0) { 6449 int i; 6450 for (i = 0; i < sg_used; i++) { 6451 temp64 = dma_map_single(&h->pdev->dev, buff[i], 6452 buff_size[i], DMA_BIDIRECTIONAL); 6453 if (dma_mapping_error(&h->pdev->dev, 6454 (dma_addr_t) temp64)) { 6455 c->SG[i].Addr = cpu_to_le64(0); 6456 c->SG[i].Len = cpu_to_le32(0); 6457 hpsa_pci_unmap(h->pdev, c, i, 6458 DMA_BIDIRECTIONAL); 6459 status = -ENOMEM; 6460 goto cleanup0; 6461 } 6462 c->SG[i].Addr = cpu_to_le64(temp64); 6463 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6464 c->SG[i].Ext = cpu_to_le32(0); 6465 } 6466 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6467 } 6468 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6469 NO_TIMEOUT); 6470 if (sg_used) 6471 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6472 check_ioctl_unit_attention(h, c); 6473 if (status) { 6474 status = -EIO; 6475 goto cleanup0; 6476 } 6477 6478 /* Copy the error information out */ 6479 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6480 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6481 status = -EFAULT; 6482 goto cleanup0; 6483 } 6484 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6485 int i; 6486 6487 /* Copy the data out of the buffer we created */ 6488 BYTE __user *ptr = ioc->buf; 6489 for (i = 0; i < sg_used; i++) { 6490 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6491 status = -EFAULT; 6492 goto cleanup0; 6493 } 6494 ptr += buff_size[i]; 6495 } 6496 } 6497 status = 0; 6498 cleanup0: 6499 cmd_free(h, c); 6500 cleanup1: 6501 if (buff) { 6502 int i; 6503 6504 for (i = 0; i < sg_used; i++) 6505 kfree(buff[i]); 6506 kfree(buff); 6507 } 6508 kfree(buff_size); 6509 kvfree(ioc); 6510 return status; 6511 } 6512 6513 static void check_ioctl_unit_attention(struct ctlr_info *h, 6514 struct CommandList *c) 6515 { 6516 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6517 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6518 (void) check_for_unit_attention(h, c); 6519 } 6520 6521 /* 6522 * ioctl 6523 */ 6524 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6525 { 6526 struct ctlr_info *h; 6527 void __user *argp = (void __user *)arg; 6528 int rc; 6529 6530 h = sdev_to_hba(dev); 6531 6532 switch (cmd) { 6533 case CCISS_DEREGDISK: 6534 case CCISS_REGNEWDISK: 6535 case CCISS_REGNEWD: 6536 hpsa_scan_start(h->scsi_host); 6537 return 0; 6538 case CCISS_GETPCIINFO: 6539 return hpsa_getpciinfo_ioctl(h, argp); 6540 case CCISS_GETDRIVVER: 6541 return hpsa_getdrivver_ioctl(h, argp); 6542 case CCISS_PASSTHRU: 6543 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6544 return -EAGAIN; 6545 rc = hpsa_passthru_ioctl(h, argp); 6546 atomic_inc(&h->passthru_cmds_avail); 6547 return rc; 6548 case CCISS_BIG_PASSTHRU: 6549 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6550 return -EAGAIN; 6551 rc = hpsa_big_passthru_ioctl(h, argp); 6552 atomic_inc(&h->passthru_cmds_avail); 6553 return rc; 6554 default: 6555 return -ENOTTY; 6556 } 6557 } 6558 6559 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6560 u8 reset_type) 6561 { 6562 struct CommandList *c; 6563 6564 c = cmd_alloc(h); 6565 6566 /* fill_cmd can't fail here, no data buffer to map */ 6567 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6568 RAID_CTLR_LUNID, TYPE_MSG); 6569 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6570 c->waiting = NULL; 6571 enqueue_cmd_and_start_io(h, c); 6572 /* Don't wait for completion, the reset won't complete. Don't free 6573 * the command either. This is the last command we will send before 6574 * re-initializing everything, so it doesn't matter and won't leak. 6575 */ 6576 return; 6577 } 6578 6579 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6580 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6581 int cmd_type) 6582 { 6583 enum dma_data_direction dir = DMA_NONE; 6584 6585 c->cmd_type = CMD_IOCTL_PEND; 6586 c->scsi_cmd = SCSI_CMD_BUSY; 6587 c->Header.ReplyQueue = 0; 6588 if (buff != NULL && size > 0) { 6589 c->Header.SGList = 1; 6590 c->Header.SGTotal = cpu_to_le16(1); 6591 } else { 6592 c->Header.SGList = 0; 6593 c->Header.SGTotal = cpu_to_le16(0); 6594 } 6595 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6596 6597 if (cmd_type == TYPE_CMD) { 6598 switch (cmd) { 6599 case HPSA_INQUIRY: 6600 /* are we trying to read a vital product page */ 6601 if (page_code & VPD_PAGE) { 6602 c->Request.CDB[1] = 0x01; 6603 c->Request.CDB[2] = (page_code & 0xff); 6604 } 6605 c->Request.CDBLen = 6; 6606 c->Request.type_attr_dir = 6607 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6608 c->Request.Timeout = 0; 6609 c->Request.CDB[0] = HPSA_INQUIRY; 6610 c->Request.CDB[4] = size & 0xFF; 6611 break; 6612 case RECEIVE_DIAGNOSTIC: 6613 c->Request.CDBLen = 6; 6614 c->Request.type_attr_dir = 6615 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6616 c->Request.Timeout = 0; 6617 c->Request.CDB[0] = cmd; 6618 c->Request.CDB[1] = 1; 6619 c->Request.CDB[2] = 1; 6620 c->Request.CDB[3] = (size >> 8) & 0xFF; 6621 c->Request.CDB[4] = size & 0xFF; 6622 break; 6623 case HPSA_REPORT_LOG: 6624 case HPSA_REPORT_PHYS: 6625 /* Talking to controller so It's a physical command 6626 mode = 00 target = 0. Nothing to write. 6627 */ 6628 c->Request.CDBLen = 12; 6629 c->Request.type_attr_dir = 6630 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6631 c->Request.Timeout = 0; 6632 c->Request.CDB[0] = cmd; 6633 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6634 c->Request.CDB[7] = (size >> 16) & 0xFF; 6635 c->Request.CDB[8] = (size >> 8) & 0xFF; 6636 c->Request.CDB[9] = size & 0xFF; 6637 break; 6638 case BMIC_SENSE_DIAG_OPTIONS: 6639 c->Request.CDBLen = 16; 6640 c->Request.type_attr_dir = 6641 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6642 c->Request.Timeout = 0; 6643 /* Spec says this should be BMIC_WRITE */ 6644 c->Request.CDB[0] = BMIC_READ; 6645 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6646 break; 6647 case BMIC_SET_DIAG_OPTIONS: 6648 c->Request.CDBLen = 16; 6649 c->Request.type_attr_dir = 6650 TYPE_ATTR_DIR(cmd_type, 6651 ATTR_SIMPLE, XFER_WRITE); 6652 c->Request.Timeout = 0; 6653 c->Request.CDB[0] = BMIC_WRITE; 6654 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6655 break; 6656 case HPSA_CACHE_FLUSH: 6657 c->Request.CDBLen = 12; 6658 c->Request.type_attr_dir = 6659 TYPE_ATTR_DIR(cmd_type, 6660 ATTR_SIMPLE, XFER_WRITE); 6661 c->Request.Timeout = 0; 6662 c->Request.CDB[0] = BMIC_WRITE; 6663 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6664 c->Request.CDB[7] = (size >> 8) & 0xFF; 6665 c->Request.CDB[8] = size & 0xFF; 6666 break; 6667 case TEST_UNIT_READY: 6668 c->Request.CDBLen = 6; 6669 c->Request.type_attr_dir = 6670 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6671 c->Request.Timeout = 0; 6672 break; 6673 case HPSA_GET_RAID_MAP: 6674 c->Request.CDBLen = 12; 6675 c->Request.type_attr_dir = 6676 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6677 c->Request.Timeout = 0; 6678 c->Request.CDB[0] = HPSA_CISS_READ; 6679 c->Request.CDB[1] = cmd; 6680 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6681 c->Request.CDB[7] = (size >> 16) & 0xFF; 6682 c->Request.CDB[8] = (size >> 8) & 0xFF; 6683 c->Request.CDB[9] = size & 0xFF; 6684 break; 6685 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6686 c->Request.CDBLen = 10; 6687 c->Request.type_attr_dir = 6688 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6689 c->Request.Timeout = 0; 6690 c->Request.CDB[0] = BMIC_READ; 6691 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6692 c->Request.CDB[7] = (size >> 16) & 0xFF; 6693 c->Request.CDB[8] = (size >> 8) & 0xFF; 6694 break; 6695 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6696 c->Request.CDBLen = 10; 6697 c->Request.type_attr_dir = 6698 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6699 c->Request.Timeout = 0; 6700 c->Request.CDB[0] = BMIC_READ; 6701 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6702 c->Request.CDB[7] = (size >> 16) & 0xFF; 6703 c->Request.CDB[8] = (size >> 8) & 0XFF; 6704 break; 6705 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6706 c->Request.CDBLen = 10; 6707 c->Request.type_attr_dir = 6708 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6709 c->Request.Timeout = 0; 6710 c->Request.CDB[0] = BMIC_READ; 6711 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6712 c->Request.CDB[7] = (size >> 16) & 0xFF; 6713 c->Request.CDB[8] = (size >> 8) & 0XFF; 6714 break; 6715 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6716 c->Request.CDBLen = 10; 6717 c->Request.type_attr_dir = 6718 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6719 c->Request.Timeout = 0; 6720 c->Request.CDB[0] = BMIC_READ; 6721 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6722 c->Request.CDB[7] = (size >> 16) & 0xFF; 6723 c->Request.CDB[8] = (size >> 8) & 0XFF; 6724 break; 6725 case BMIC_IDENTIFY_CONTROLLER: 6726 c->Request.CDBLen = 10; 6727 c->Request.type_attr_dir = 6728 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6729 c->Request.Timeout = 0; 6730 c->Request.CDB[0] = BMIC_READ; 6731 c->Request.CDB[1] = 0; 6732 c->Request.CDB[2] = 0; 6733 c->Request.CDB[3] = 0; 6734 c->Request.CDB[4] = 0; 6735 c->Request.CDB[5] = 0; 6736 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6737 c->Request.CDB[7] = (size >> 16) & 0xFF; 6738 c->Request.CDB[8] = (size >> 8) & 0XFF; 6739 c->Request.CDB[9] = 0; 6740 break; 6741 default: 6742 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6743 BUG(); 6744 } 6745 } else if (cmd_type == TYPE_MSG) { 6746 switch (cmd) { 6747 6748 case HPSA_PHYS_TARGET_RESET: 6749 c->Request.CDBLen = 16; 6750 c->Request.type_attr_dir = 6751 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6752 c->Request.Timeout = 0; /* Don't time out */ 6753 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6754 c->Request.CDB[0] = HPSA_RESET; 6755 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6756 /* Physical target reset needs no control bytes 4-7*/ 6757 c->Request.CDB[4] = 0x00; 6758 c->Request.CDB[5] = 0x00; 6759 c->Request.CDB[6] = 0x00; 6760 c->Request.CDB[7] = 0x00; 6761 break; 6762 case HPSA_DEVICE_RESET_MSG: 6763 c->Request.CDBLen = 16; 6764 c->Request.type_attr_dir = 6765 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6766 c->Request.Timeout = 0; /* Don't time out */ 6767 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6768 c->Request.CDB[0] = cmd; 6769 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6770 /* If bytes 4-7 are zero, it means reset the */ 6771 /* LunID device */ 6772 c->Request.CDB[4] = 0x00; 6773 c->Request.CDB[5] = 0x00; 6774 c->Request.CDB[6] = 0x00; 6775 c->Request.CDB[7] = 0x00; 6776 break; 6777 default: 6778 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6779 cmd); 6780 BUG(); 6781 } 6782 } else { 6783 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6784 BUG(); 6785 } 6786 6787 switch (GET_DIR(c->Request.type_attr_dir)) { 6788 case XFER_READ: 6789 dir = DMA_FROM_DEVICE; 6790 break; 6791 case XFER_WRITE: 6792 dir = DMA_TO_DEVICE; 6793 break; 6794 case XFER_NONE: 6795 dir = DMA_NONE; 6796 break; 6797 default: 6798 dir = DMA_BIDIRECTIONAL; 6799 } 6800 if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6801 return -1; 6802 return 0; 6803 } 6804 6805 /* 6806 * Map (physical) PCI mem into (virtual) kernel space 6807 */ 6808 static void __iomem *remap_pci_mem(ulong base, ulong size) 6809 { 6810 ulong page_base = ((ulong) base) & PAGE_MASK; 6811 ulong page_offs = ((ulong) base) - page_base; 6812 void __iomem *page_remapped = ioremap_nocache(page_base, 6813 page_offs + size); 6814 6815 return page_remapped ? (page_remapped + page_offs) : NULL; 6816 } 6817 6818 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6819 { 6820 return h->access.command_completed(h, q); 6821 } 6822 6823 static inline bool interrupt_pending(struct ctlr_info *h) 6824 { 6825 return h->access.intr_pending(h); 6826 } 6827 6828 static inline long interrupt_not_for_us(struct ctlr_info *h) 6829 { 6830 return (h->access.intr_pending(h) == 0) || 6831 (h->interrupts_enabled == 0); 6832 } 6833 6834 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6835 u32 raw_tag) 6836 { 6837 if (unlikely(tag_index >= h->nr_cmds)) { 6838 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6839 return 1; 6840 } 6841 return 0; 6842 } 6843 6844 static inline void finish_cmd(struct CommandList *c) 6845 { 6846 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6847 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6848 || c->cmd_type == CMD_IOACCEL2)) 6849 complete_scsi_command(c); 6850 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6851 complete(c->waiting); 6852 } 6853 6854 /* process completion of an indexed ("direct lookup") command */ 6855 static inline void process_indexed_cmd(struct ctlr_info *h, 6856 u32 raw_tag) 6857 { 6858 u32 tag_index; 6859 struct CommandList *c; 6860 6861 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6862 if (!bad_tag(h, tag_index, raw_tag)) { 6863 c = h->cmd_pool + tag_index; 6864 finish_cmd(c); 6865 } 6866 } 6867 6868 /* Some controllers, like p400, will give us one interrupt 6869 * after a soft reset, even if we turned interrupts off. 6870 * Only need to check for this in the hpsa_xxx_discard_completions 6871 * functions. 6872 */ 6873 static int ignore_bogus_interrupt(struct ctlr_info *h) 6874 { 6875 if (likely(!reset_devices)) 6876 return 0; 6877 6878 if (likely(h->interrupts_enabled)) 6879 return 0; 6880 6881 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6882 "(known firmware bug.) Ignoring.\n"); 6883 6884 return 1; 6885 } 6886 6887 /* 6888 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6889 * Relies on (h-q[x] == x) being true for x such that 6890 * 0 <= x < MAX_REPLY_QUEUES. 6891 */ 6892 static struct ctlr_info *queue_to_hba(u8 *queue) 6893 { 6894 return container_of((queue - *queue), struct ctlr_info, q[0]); 6895 } 6896 6897 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6898 { 6899 struct ctlr_info *h = queue_to_hba(queue); 6900 u8 q = *(u8 *) queue; 6901 u32 raw_tag; 6902 6903 if (ignore_bogus_interrupt(h)) 6904 return IRQ_NONE; 6905 6906 if (interrupt_not_for_us(h)) 6907 return IRQ_NONE; 6908 h->last_intr_timestamp = get_jiffies_64(); 6909 while (interrupt_pending(h)) { 6910 raw_tag = get_next_completion(h, q); 6911 while (raw_tag != FIFO_EMPTY) 6912 raw_tag = next_command(h, q); 6913 } 6914 return IRQ_HANDLED; 6915 } 6916 6917 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6918 { 6919 struct ctlr_info *h = queue_to_hba(queue); 6920 u32 raw_tag; 6921 u8 q = *(u8 *) queue; 6922 6923 if (ignore_bogus_interrupt(h)) 6924 return IRQ_NONE; 6925 6926 h->last_intr_timestamp = get_jiffies_64(); 6927 raw_tag = get_next_completion(h, q); 6928 while (raw_tag != FIFO_EMPTY) 6929 raw_tag = next_command(h, q); 6930 return IRQ_HANDLED; 6931 } 6932 6933 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6934 { 6935 struct ctlr_info *h = queue_to_hba((u8 *) queue); 6936 u32 raw_tag; 6937 u8 q = *(u8 *) queue; 6938 6939 if (interrupt_not_for_us(h)) 6940 return IRQ_NONE; 6941 h->last_intr_timestamp = get_jiffies_64(); 6942 while (interrupt_pending(h)) { 6943 raw_tag = get_next_completion(h, q); 6944 while (raw_tag != FIFO_EMPTY) { 6945 process_indexed_cmd(h, raw_tag); 6946 raw_tag = next_command(h, q); 6947 } 6948 } 6949 return IRQ_HANDLED; 6950 } 6951 6952 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 6953 { 6954 struct ctlr_info *h = queue_to_hba(queue); 6955 u32 raw_tag; 6956 u8 q = *(u8 *) queue; 6957 6958 h->last_intr_timestamp = get_jiffies_64(); 6959 raw_tag = get_next_completion(h, q); 6960 while (raw_tag != FIFO_EMPTY) { 6961 process_indexed_cmd(h, raw_tag); 6962 raw_tag = next_command(h, q); 6963 } 6964 return IRQ_HANDLED; 6965 } 6966 6967 /* Send a message CDB to the firmware. Careful, this only works 6968 * in simple mode, not performant mode due to the tag lookup. 6969 * We only ever use this immediately after a controller reset. 6970 */ 6971 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6972 unsigned char type) 6973 { 6974 struct Command { 6975 struct CommandListHeader CommandHeader; 6976 struct RequestBlock Request; 6977 struct ErrDescriptor ErrorDescriptor; 6978 }; 6979 struct Command *cmd; 6980 static const size_t cmd_sz = sizeof(*cmd) + 6981 sizeof(cmd->ErrorDescriptor); 6982 dma_addr_t paddr64; 6983 __le32 paddr32; 6984 u32 tag; 6985 void __iomem *vaddr; 6986 int i, err; 6987 6988 vaddr = pci_ioremap_bar(pdev, 0); 6989 if (vaddr == NULL) 6990 return -ENOMEM; 6991 6992 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 6993 * CCISS commands, so they must be allocated from the lower 4GiB of 6994 * memory. 6995 */ 6996 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 6997 if (err) { 6998 iounmap(vaddr); 6999 return err; 7000 } 7001 7002 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7003 if (cmd == NULL) { 7004 iounmap(vaddr); 7005 return -ENOMEM; 7006 } 7007 7008 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7009 * although there's no guarantee, we assume that the address is at 7010 * least 4-byte aligned (most likely, it's page-aligned). 7011 */ 7012 paddr32 = cpu_to_le32(paddr64); 7013 7014 cmd->CommandHeader.ReplyQueue = 0; 7015 cmd->CommandHeader.SGList = 0; 7016 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7017 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7018 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7019 7020 cmd->Request.CDBLen = 16; 7021 cmd->Request.type_attr_dir = 7022 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7023 cmd->Request.Timeout = 0; /* Don't time out */ 7024 cmd->Request.CDB[0] = opcode; 7025 cmd->Request.CDB[1] = type; 7026 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7027 cmd->ErrorDescriptor.Addr = 7028 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7029 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7030 7031 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7032 7033 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7034 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7035 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7036 break; 7037 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7038 } 7039 7040 iounmap(vaddr); 7041 7042 /* we leak the DMA buffer here ... no choice since the controller could 7043 * still complete the command. 7044 */ 7045 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7046 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7047 opcode, type); 7048 return -ETIMEDOUT; 7049 } 7050 7051 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7052 7053 if (tag & HPSA_ERROR_BIT) { 7054 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7055 opcode, type); 7056 return -EIO; 7057 } 7058 7059 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7060 opcode, type); 7061 return 0; 7062 } 7063 7064 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7065 7066 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7067 void __iomem *vaddr, u32 use_doorbell) 7068 { 7069 7070 if (use_doorbell) { 7071 /* For everything after the P600, the PCI power state method 7072 * of resetting the controller doesn't work, so we have this 7073 * other way using the doorbell register. 7074 */ 7075 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7076 writel(use_doorbell, vaddr + SA5_DOORBELL); 7077 7078 /* PMC hardware guys tell us we need a 10 second delay after 7079 * doorbell reset and before any attempt to talk to the board 7080 * at all to ensure that this actually works and doesn't fall 7081 * over in some weird corner cases. 7082 */ 7083 msleep(10000); 7084 } else { /* Try to do it the PCI power state way */ 7085 7086 /* Quoting from the Open CISS Specification: "The Power 7087 * Management Control/Status Register (CSR) controls the power 7088 * state of the device. The normal operating state is D0, 7089 * CSR=00h. The software off state is D3, CSR=03h. To reset 7090 * the controller, place the interface device in D3 then to D0, 7091 * this causes a secondary PCI reset which will reset the 7092 * controller." */ 7093 7094 int rc = 0; 7095 7096 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7097 7098 /* enter the D3hot power management state */ 7099 rc = pci_set_power_state(pdev, PCI_D3hot); 7100 if (rc) 7101 return rc; 7102 7103 msleep(500); 7104 7105 /* enter the D0 power management state */ 7106 rc = pci_set_power_state(pdev, PCI_D0); 7107 if (rc) 7108 return rc; 7109 7110 /* 7111 * The P600 requires a small delay when changing states. 7112 * Otherwise we may think the board did not reset and we bail. 7113 * This for kdump only and is particular to the P600. 7114 */ 7115 msleep(500); 7116 } 7117 return 0; 7118 } 7119 7120 static void init_driver_version(char *driver_version, int len) 7121 { 7122 memset(driver_version, 0, len); 7123 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7124 } 7125 7126 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7127 { 7128 char *driver_version; 7129 int i, size = sizeof(cfgtable->driver_version); 7130 7131 driver_version = kmalloc(size, GFP_KERNEL); 7132 if (!driver_version) 7133 return -ENOMEM; 7134 7135 init_driver_version(driver_version, size); 7136 for (i = 0; i < size; i++) 7137 writeb(driver_version[i], &cfgtable->driver_version[i]); 7138 kfree(driver_version); 7139 return 0; 7140 } 7141 7142 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7143 unsigned char *driver_ver) 7144 { 7145 int i; 7146 7147 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7148 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7149 } 7150 7151 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7152 { 7153 7154 char *driver_ver, *old_driver_ver; 7155 int rc, size = sizeof(cfgtable->driver_version); 7156 7157 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7158 if (!old_driver_ver) 7159 return -ENOMEM; 7160 driver_ver = old_driver_ver + size; 7161 7162 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7163 * should have been changed, otherwise we know the reset failed. 7164 */ 7165 init_driver_version(old_driver_ver, size); 7166 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7167 rc = !memcmp(driver_ver, old_driver_ver, size); 7168 kfree(old_driver_ver); 7169 return rc; 7170 } 7171 /* This does a hard reset of the controller using PCI power management 7172 * states or the using the doorbell register. 7173 */ 7174 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7175 { 7176 u64 cfg_offset; 7177 u32 cfg_base_addr; 7178 u64 cfg_base_addr_index; 7179 void __iomem *vaddr; 7180 unsigned long paddr; 7181 u32 misc_fw_support; 7182 int rc; 7183 struct CfgTable __iomem *cfgtable; 7184 u32 use_doorbell; 7185 u16 command_register; 7186 7187 /* For controllers as old as the P600, this is very nearly 7188 * the same thing as 7189 * 7190 * pci_save_state(pci_dev); 7191 * pci_set_power_state(pci_dev, PCI_D3hot); 7192 * pci_set_power_state(pci_dev, PCI_D0); 7193 * pci_restore_state(pci_dev); 7194 * 7195 * For controllers newer than the P600, the pci power state 7196 * method of resetting doesn't work so we have another way 7197 * using the doorbell register. 7198 */ 7199 7200 if (!ctlr_is_resettable(board_id)) { 7201 dev_warn(&pdev->dev, "Controller not resettable\n"); 7202 return -ENODEV; 7203 } 7204 7205 /* if controller is soft- but not hard resettable... */ 7206 if (!ctlr_is_hard_resettable(board_id)) 7207 return -ENOTSUPP; /* try soft reset later. */ 7208 7209 /* Save the PCI command register */ 7210 pci_read_config_word(pdev, 4, &command_register); 7211 pci_save_state(pdev); 7212 7213 /* find the first memory BAR, so we can find the cfg table */ 7214 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7215 if (rc) 7216 return rc; 7217 vaddr = remap_pci_mem(paddr, 0x250); 7218 if (!vaddr) 7219 return -ENOMEM; 7220 7221 /* find cfgtable in order to check if reset via doorbell is supported */ 7222 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7223 &cfg_base_addr_index, &cfg_offset); 7224 if (rc) 7225 goto unmap_vaddr; 7226 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7227 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7228 if (!cfgtable) { 7229 rc = -ENOMEM; 7230 goto unmap_vaddr; 7231 } 7232 rc = write_driver_ver_to_cfgtable(cfgtable); 7233 if (rc) 7234 goto unmap_cfgtable; 7235 7236 /* If reset via doorbell register is supported, use that. 7237 * There are two such methods. Favor the newest method. 7238 */ 7239 misc_fw_support = readl(&cfgtable->misc_fw_support); 7240 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7241 if (use_doorbell) { 7242 use_doorbell = DOORBELL_CTLR_RESET2; 7243 } else { 7244 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7245 if (use_doorbell) { 7246 dev_warn(&pdev->dev, 7247 "Soft reset not supported. Firmware update is required.\n"); 7248 rc = -ENOTSUPP; /* try soft reset */ 7249 goto unmap_cfgtable; 7250 } 7251 } 7252 7253 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7254 if (rc) 7255 goto unmap_cfgtable; 7256 7257 pci_restore_state(pdev); 7258 pci_write_config_word(pdev, 4, command_register); 7259 7260 /* Some devices (notably the HP Smart Array 5i Controller) 7261 need a little pause here */ 7262 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7263 7264 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7265 if (rc) { 7266 dev_warn(&pdev->dev, 7267 "Failed waiting for board to become ready after hard reset\n"); 7268 goto unmap_cfgtable; 7269 } 7270 7271 rc = controller_reset_failed(vaddr); 7272 if (rc < 0) 7273 goto unmap_cfgtable; 7274 if (rc) { 7275 dev_warn(&pdev->dev, "Unable to successfully reset " 7276 "controller. Will try soft reset.\n"); 7277 rc = -ENOTSUPP; 7278 } else { 7279 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7280 } 7281 7282 unmap_cfgtable: 7283 iounmap(cfgtable); 7284 7285 unmap_vaddr: 7286 iounmap(vaddr); 7287 return rc; 7288 } 7289 7290 /* 7291 * We cannot read the structure directly, for portability we must use 7292 * the io functions. 7293 * This is for debug only. 7294 */ 7295 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7296 { 7297 #ifdef HPSA_DEBUG 7298 int i; 7299 char temp_name[17]; 7300 7301 dev_info(dev, "Controller Configuration information\n"); 7302 dev_info(dev, "------------------------------------\n"); 7303 for (i = 0; i < 4; i++) 7304 temp_name[i] = readb(&(tb->Signature[i])); 7305 temp_name[4] = '\0'; 7306 dev_info(dev, " Signature = %s\n", temp_name); 7307 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7308 dev_info(dev, " Transport methods supported = 0x%x\n", 7309 readl(&(tb->TransportSupport))); 7310 dev_info(dev, " Transport methods active = 0x%x\n", 7311 readl(&(tb->TransportActive))); 7312 dev_info(dev, " Requested transport Method = 0x%x\n", 7313 readl(&(tb->HostWrite.TransportRequest))); 7314 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7315 readl(&(tb->HostWrite.CoalIntDelay))); 7316 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7317 readl(&(tb->HostWrite.CoalIntCount))); 7318 dev_info(dev, " Max outstanding commands = %d\n", 7319 readl(&(tb->CmdsOutMax))); 7320 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7321 for (i = 0; i < 16; i++) 7322 temp_name[i] = readb(&(tb->ServerName[i])); 7323 temp_name[16] = '\0'; 7324 dev_info(dev, " Server Name = %s\n", temp_name); 7325 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7326 readl(&(tb->HeartBeat))); 7327 #endif /* HPSA_DEBUG */ 7328 } 7329 7330 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7331 { 7332 int i, offset, mem_type, bar_type; 7333 7334 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7335 return 0; 7336 offset = 0; 7337 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7338 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7339 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7340 offset += 4; 7341 else { 7342 mem_type = pci_resource_flags(pdev, i) & 7343 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7344 switch (mem_type) { 7345 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7346 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7347 offset += 4; /* 32 bit */ 7348 break; 7349 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7350 offset += 8; 7351 break; 7352 default: /* reserved in PCI 2.2 */ 7353 dev_warn(&pdev->dev, 7354 "base address is invalid\n"); 7355 return -1; 7356 break; 7357 } 7358 } 7359 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7360 return i + 1; 7361 } 7362 return -1; 7363 } 7364 7365 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7366 { 7367 pci_free_irq_vectors(h->pdev); 7368 h->msix_vectors = 0; 7369 } 7370 7371 static void hpsa_setup_reply_map(struct ctlr_info *h) 7372 { 7373 const struct cpumask *mask; 7374 unsigned int queue, cpu; 7375 7376 for (queue = 0; queue < h->msix_vectors; queue++) { 7377 mask = pci_irq_get_affinity(h->pdev, queue); 7378 if (!mask) 7379 goto fallback; 7380 7381 for_each_cpu(cpu, mask) 7382 h->reply_map[cpu] = queue; 7383 } 7384 return; 7385 7386 fallback: 7387 for_each_possible_cpu(cpu) 7388 h->reply_map[cpu] = 0; 7389 } 7390 7391 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7392 * controllers that are capable. If not, we use legacy INTx mode. 7393 */ 7394 static int hpsa_interrupt_mode(struct ctlr_info *h) 7395 { 7396 unsigned int flags = PCI_IRQ_LEGACY; 7397 int ret; 7398 7399 /* Some boards advertise MSI but don't really support it */ 7400 switch (h->board_id) { 7401 case 0x40700E11: 7402 case 0x40800E11: 7403 case 0x40820E11: 7404 case 0x40830E11: 7405 break; 7406 default: 7407 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7408 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7409 if (ret > 0) { 7410 h->msix_vectors = ret; 7411 return 0; 7412 } 7413 7414 flags |= PCI_IRQ_MSI; 7415 break; 7416 } 7417 7418 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7419 if (ret < 0) 7420 return ret; 7421 return 0; 7422 } 7423 7424 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7425 bool *legacy_board) 7426 { 7427 int i; 7428 u32 subsystem_vendor_id, subsystem_device_id; 7429 7430 subsystem_vendor_id = pdev->subsystem_vendor; 7431 subsystem_device_id = pdev->subsystem_device; 7432 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7433 subsystem_vendor_id; 7434 7435 if (legacy_board) 7436 *legacy_board = false; 7437 for (i = 0; i < ARRAY_SIZE(products); i++) 7438 if (*board_id == products[i].board_id) { 7439 if (products[i].access != &SA5A_access && 7440 products[i].access != &SA5B_access) 7441 return i; 7442 dev_warn(&pdev->dev, 7443 "legacy board ID: 0x%08x\n", 7444 *board_id); 7445 if (legacy_board) 7446 *legacy_board = true; 7447 return i; 7448 } 7449 7450 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7451 if (legacy_board) 7452 *legacy_board = true; 7453 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7454 } 7455 7456 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7457 unsigned long *memory_bar) 7458 { 7459 int i; 7460 7461 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7462 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7463 /* addressing mode bits already removed */ 7464 *memory_bar = pci_resource_start(pdev, i); 7465 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7466 *memory_bar); 7467 return 0; 7468 } 7469 dev_warn(&pdev->dev, "no memory BAR found\n"); 7470 return -ENODEV; 7471 } 7472 7473 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7474 int wait_for_ready) 7475 { 7476 int i, iterations; 7477 u32 scratchpad; 7478 if (wait_for_ready) 7479 iterations = HPSA_BOARD_READY_ITERATIONS; 7480 else 7481 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7482 7483 for (i = 0; i < iterations; i++) { 7484 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7485 if (wait_for_ready) { 7486 if (scratchpad == HPSA_FIRMWARE_READY) 7487 return 0; 7488 } else { 7489 if (scratchpad != HPSA_FIRMWARE_READY) 7490 return 0; 7491 } 7492 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7493 } 7494 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7495 return -ENODEV; 7496 } 7497 7498 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7499 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7500 u64 *cfg_offset) 7501 { 7502 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7503 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7504 *cfg_base_addr &= (u32) 0x0000ffff; 7505 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7506 if (*cfg_base_addr_index == -1) { 7507 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7508 return -ENODEV; 7509 } 7510 return 0; 7511 } 7512 7513 static void hpsa_free_cfgtables(struct ctlr_info *h) 7514 { 7515 if (h->transtable) { 7516 iounmap(h->transtable); 7517 h->transtable = NULL; 7518 } 7519 if (h->cfgtable) { 7520 iounmap(h->cfgtable); 7521 h->cfgtable = NULL; 7522 } 7523 } 7524 7525 /* Find and map CISS config table and transfer table 7526 + * several items must be unmapped (freed) later 7527 + * */ 7528 static int hpsa_find_cfgtables(struct ctlr_info *h) 7529 { 7530 u64 cfg_offset; 7531 u32 cfg_base_addr; 7532 u64 cfg_base_addr_index; 7533 u32 trans_offset; 7534 int rc; 7535 7536 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7537 &cfg_base_addr_index, &cfg_offset); 7538 if (rc) 7539 return rc; 7540 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7541 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7542 if (!h->cfgtable) { 7543 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7544 return -ENOMEM; 7545 } 7546 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7547 if (rc) 7548 return rc; 7549 /* Find performant mode table. */ 7550 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7551 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7552 cfg_base_addr_index)+cfg_offset+trans_offset, 7553 sizeof(*h->transtable)); 7554 if (!h->transtable) { 7555 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7556 hpsa_free_cfgtables(h); 7557 return -ENOMEM; 7558 } 7559 return 0; 7560 } 7561 7562 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7563 { 7564 #define MIN_MAX_COMMANDS 16 7565 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7566 7567 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7568 7569 /* Limit commands in memory limited kdump scenario. */ 7570 if (reset_devices && h->max_commands > 32) 7571 h->max_commands = 32; 7572 7573 if (h->max_commands < MIN_MAX_COMMANDS) { 7574 dev_warn(&h->pdev->dev, 7575 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7576 h->max_commands, 7577 MIN_MAX_COMMANDS); 7578 h->max_commands = MIN_MAX_COMMANDS; 7579 } 7580 } 7581 7582 /* If the controller reports that the total max sg entries is greater than 512, 7583 * then we know that chained SG blocks work. (Original smart arrays did not 7584 * support chained SG blocks and would return zero for max sg entries.) 7585 */ 7586 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7587 { 7588 return h->maxsgentries > 512; 7589 } 7590 7591 /* Interrogate the hardware for some limits: 7592 * max commands, max SG elements without chaining, and with chaining, 7593 * SG chain block size, etc. 7594 */ 7595 static void hpsa_find_board_params(struct ctlr_info *h) 7596 { 7597 hpsa_get_max_perf_mode_cmds(h); 7598 h->nr_cmds = h->max_commands; 7599 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7600 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7601 if (hpsa_supports_chained_sg_blocks(h)) { 7602 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7603 h->max_cmd_sg_entries = 32; 7604 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7605 h->maxsgentries--; /* save one for chain pointer */ 7606 } else { 7607 /* 7608 * Original smart arrays supported at most 31 s/g entries 7609 * embedded inline in the command (trying to use more 7610 * would lock up the controller) 7611 */ 7612 h->max_cmd_sg_entries = 31; 7613 h->maxsgentries = 31; /* default to traditional values */ 7614 h->chainsize = 0; 7615 } 7616 7617 /* Find out what task management functions are supported and cache */ 7618 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7619 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7620 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7621 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7622 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7623 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7624 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7625 } 7626 7627 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7628 { 7629 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7630 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7631 return false; 7632 } 7633 return true; 7634 } 7635 7636 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7637 { 7638 u32 driver_support; 7639 7640 driver_support = readl(&(h->cfgtable->driver_support)); 7641 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7642 #ifdef CONFIG_X86 7643 driver_support |= ENABLE_SCSI_PREFETCH; 7644 #endif 7645 driver_support |= ENABLE_UNIT_ATTN; 7646 writel(driver_support, &(h->cfgtable->driver_support)); 7647 } 7648 7649 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7650 * in a prefetch beyond physical memory. 7651 */ 7652 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7653 { 7654 u32 dma_prefetch; 7655 7656 if (h->board_id != 0x3225103C) 7657 return; 7658 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7659 dma_prefetch |= 0x8000; 7660 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7661 } 7662 7663 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7664 { 7665 int i; 7666 u32 doorbell_value; 7667 unsigned long flags; 7668 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7669 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7670 spin_lock_irqsave(&h->lock, flags); 7671 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7672 spin_unlock_irqrestore(&h->lock, flags); 7673 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7674 goto done; 7675 /* delay and try again */ 7676 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7677 } 7678 return -ENODEV; 7679 done: 7680 return 0; 7681 } 7682 7683 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7684 { 7685 int i; 7686 u32 doorbell_value; 7687 unsigned long flags; 7688 7689 /* under certain very rare conditions, this can take awhile. 7690 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7691 * as we enter this code.) 7692 */ 7693 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7694 if (h->remove_in_progress) 7695 goto done; 7696 spin_lock_irqsave(&h->lock, flags); 7697 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7698 spin_unlock_irqrestore(&h->lock, flags); 7699 if (!(doorbell_value & CFGTBL_ChangeReq)) 7700 goto done; 7701 /* delay and try again */ 7702 msleep(MODE_CHANGE_WAIT_INTERVAL); 7703 } 7704 return -ENODEV; 7705 done: 7706 return 0; 7707 } 7708 7709 /* return -ENODEV or other reason on error, 0 on success */ 7710 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7711 { 7712 u32 trans_support; 7713 7714 trans_support = readl(&(h->cfgtable->TransportSupport)); 7715 if (!(trans_support & SIMPLE_MODE)) 7716 return -ENOTSUPP; 7717 7718 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7719 7720 /* Update the field, and then ring the doorbell */ 7721 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7722 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7723 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7724 if (hpsa_wait_for_mode_change_ack(h)) 7725 goto error; 7726 print_cfg_table(&h->pdev->dev, h->cfgtable); 7727 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7728 goto error; 7729 h->transMethod = CFGTBL_Trans_Simple; 7730 return 0; 7731 error: 7732 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7733 return -ENODEV; 7734 } 7735 7736 /* free items allocated or mapped by hpsa_pci_init */ 7737 static void hpsa_free_pci_init(struct ctlr_info *h) 7738 { 7739 hpsa_free_cfgtables(h); /* pci_init 4 */ 7740 iounmap(h->vaddr); /* pci_init 3 */ 7741 h->vaddr = NULL; 7742 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7743 /* 7744 * call pci_disable_device before pci_release_regions per 7745 * Documentation/PCI/pci.txt 7746 */ 7747 pci_disable_device(h->pdev); /* pci_init 1 */ 7748 pci_release_regions(h->pdev); /* pci_init 2 */ 7749 } 7750 7751 /* several items must be freed later */ 7752 static int hpsa_pci_init(struct ctlr_info *h) 7753 { 7754 int prod_index, err; 7755 bool legacy_board; 7756 7757 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7758 if (prod_index < 0) 7759 return prod_index; 7760 h->product_name = products[prod_index].product_name; 7761 h->access = *(products[prod_index].access); 7762 h->legacy_board = legacy_board; 7763 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7764 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7765 7766 err = pci_enable_device(h->pdev); 7767 if (err) { 7768 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7769 pci_disable_device(h->pdev); 7770 return err; 7771 } 7772 7773 err = pci_request_regions(h->pdev, HPSA); 7774 if (err) { 7775 dev_err(&h->pdev->dev, 7776 "failed to obtain PCI resources\n"); 7777 pci_disable_device(h->pdev); 7778 return err; 7779 } 7780 7781 pci_set_master(h->pdev); 7782 7783 err = hpsa_interrupt_mode(h); 7784 if (err) 7785 goto clean1; 7786 7787 /* setup mapping between CPU and reply queue */ 7788 hpsa_setup_reply_map(h); 7789 7790 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7791 if (err) 7792 goto clean2; /* intmode+region, pci */ 7793 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7794 if (!h->vaddr) { 7795 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7796 err = -ENOMEM; 7797 goto clean2; /* intmode+region, pci */ 7798 } 7799 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7800 if (err) 7801 goto clean3; /* vaddr, intmode+region, pci */ 7802 err = hpsa_find_cfgtables(h); 7803 if (err) 7804 goto clean3; /* vaddr, intmode+region, pci */ 7805 hpsa_find_board_params(h); 7806 7807 if (!hpsa_CISS_signature_present(h)) { 7808 err = -ENODEV; 7809 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7810 } 7811 hpsa_set_driver_support_bits(h); 7812 hpsa_p600_dma_prefetch_quirk(h); 7813 err = hpsa_enter_simple_mode(h); 7814 if (err) 7815 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7816 return 0; 7817 7818 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7819 hpsa_free_cfgtables(h); 7820 clean3: /* vaddr, intmode+region, pci */ 7821 iounmap(h->vaddr); 7822 h->vaddr = NULL; 7823 clean2: /* intmode+region, pci */ 7824 hpsa_disable_interrupt_mode(h); 7825 clean1: 7826 /* 7827 * call pci_disable_device before pci_release_regions per 7828 * Documentation/PCI/pci.txt 7829 */ 7830 pci_disable_device(h->pdev); 7831 pci_release_regions(h->pdev); 7832 return err; 7833 } 7834 7835 static void hpsa_hba_inquiry(struct ctlr_info *h) 7836 { 7837 int rc; 7838 7839 #define HBA_INQUIRY_BYTE_COUNT 64 7840 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7841 if (!h->hba_inquiry_data) 7842 return; 7843 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7844 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7845 if (rc != 0) { 7846 kfree(h->hba_inquiry_data); 7847 h->hba_inquiry_data = NULL; 7848 } 7849 } 7850 7851 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7852 { 7853 int rc, i; 7854 void __iomem *vaddr; 7855 7856 if (!reset_devices) 7857 return 0; 7858 7859 /* kdump kernel is loading, we don't know in which state is 7860 * the pci interface. The dev->enable_cnt is equal zero 7861 * so we call enable+disable, wait a while and switch it on. 7862 */ 7863 rc = pci_enable_device(pdev); 7864 if (rc) { 7865 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7866 return -ENODEV; 7867 } 7868 pci_disable_device(pdev); 7869 msleep(260); /* a randomly chosen number */ 7870 rc = pci_enable_device(pdev); 7871 if (rc) { 7872 dev_warn(&pdev->dev, "failed to enable device.\n"); 7873 return -ENODEV; 7874 } 7875 7876 pci_set_master(pdev); 7877 7878 vaddr = pci_ioremap_bar(pdev, 0); 7879 if (vaddr == NULL) { 7880 rc = -ENOMEM; 7881 goto out_disable; 7882 } 7883 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7884 iounmap(vaddr); 7885 7886 /* Reset the controller with a PCI power-cycle or via doorbell */ 7887 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7888 7889 /* -ENOTSUPP here means we cannot reset the controller 7890 * but it's already (and still) up and running in 7891 * "performant mode". Or, it might be 640x, which can't reset 7892 * due to concerns about shared bbwc between 6402/6404 pair. 7893 */ 7894 if (rc) 7895 goto out_disable; 7896 7897 /* Now try to get the controller to respond to a no-op */ 7898 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7899 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7900 if (hpsa_noop(pdev) == 0) 7901 break; 7902 else 7903 dev_warn(&pdev->dev, "no-op failed%s\n", 7904 (i < 11 ? "; re-trying" : "")); 7905 } 7906 7907 out_disable: 7908 7909 pci_disable_device(pdev); 7910 return rc; 7911 } 7912 7913 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7914 { 7915 kfree(h->cmd_pool_bits); 7916 h->cmd_pool_bits = NULL; 7917 if (h->cmd_pool) { 7918 dma_free_coherent(&h->pdev->dev, 7919 h->nr_cmds * sizeof(struct CommandList), 7920 h->cmd_pool, 7921 h->cmd_pool_dhandle); 7922 h->cmd_pool = NULL; 7923 h->cmd_pool_dhandle = 0; 7924 } 7925 if (h->errinfo_pool) { 7926 dma_free_coherent(&h->pdev->dev, 7927 h->nr_cmds * sizeof(struct ErrorInfo), 7928 h->errinfo_pool, 7929 h->errinfo_pool_dhandle); 7930 h->errinfo_pool = NULL; 7931 h->errinfo_pool_dhandle = 0; 7932 } 7933 } 7934 7935 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 7936 { 7937 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 7938 sizeof(unsigned long), 7939 GFP_KERNEL); 7940 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 7941 h->nr_cmds * sizeof(*h->cmd_pool), 7942 &h->cmd_pool_dhandle, GFP_KERNEL); 7943 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 7944 h->nr_cmds * sizeof(*h->errinfo_pool), 7945 &h->errinfo_pool_dhandle, GFP_KERNEL); 7946 if ((h->cmd_pool_bits == NULL) 7947 || (h->cmd_pool == NULL) 7948 || (h->errinfo_pool == NULL)) { 7949 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 7950 goto clean_up; 7951 } 7952 hpsa_preinitialize_commands(h); 7953 return 0; 7954 clean_up: 7955 hpsa_free_cmd_pool(h); 7956 return -ENOMEM; 7957 } 7958 7959 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7960 static void hpsa_free_irqs(struct ctlr_info *h) 7961 { 7962 int i; 7963 7964 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7965 /* Single reply queue, only one irq to free */ 7966 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7967 h->q[h->intr_mode] = 0; 7968 return; 7969 } 7970 7971 for (i = 0; i < h->msix_vectors; i++) { 7972 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7973 h->q[i] = 0; 7974 } 7975 for (; i < MAX_REPLY_QUEUES; i++) 7976 h->q[i] = 0; 7977 } 7978 7979 /* returns 0 on success; cleans up and returns -Enn on error */ 7980 static int hpsa_request_irqs(struct ctlr_info *h, 7981 irqreturn_t (*msixhandler)(int, void *), 7982 irqreturn_t (*intxhandler)(int, void *)) 7983 { 7984 int rc, i; 7985 7986 /* 7987 * initialize h->q[x] = x so that interrupt handlers know which 7988 * queue to process. 7989 */ 7990 for (i = 0; i < MAX_REPLY_QUEUES; i++) 7991 h->q[i] = (u8) i; 7992 7993 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7994 /* If performant mode and MSI-X, use multiple reply queues */ 7995 for (i = 0; i < h->msix_vectors; i++) { 7996 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7997 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 7998 0, h->intrname[i], 7999 &h->q[i]); 8000 if (rc) { 8001 int j; 8002 8003 dev_err(&h->pdev->dev, 8004 "failed to get irq %d for %s\n", 8005 pci_irq_vector(h->pdev, i), h->devname); 8006 for (j = 0; j < i; j++) { 8007 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8008 h->q[j] = 0; 8009 } 8010 for (; j < MAX_REPLY_QUEUES; j++) 8011 h->q[j] = 0; 8012 return rc; 8013 } 8014 } 8015 } else { 8016 /* Use single reply pool */ 8017 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8018 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8019 h->msix_vectors ? "x" : ""); 8020 rc = request_irq(pci_irq_vector(h->pdev, 0), 8021 msixhandler, 0, 8022 h->intrname[0], 8023 &h->q[h->intr_mode]); 8024 } else { 8025 sprintf(h->intrname[h->intr_mode], 8026 "%s-intx", h->devname); 8027 rc = request_irq(pci_irq_vector(h->pdev, 0), 8028 intxhandler, IRQF_SHARED, 8029 h->intrname[0], 8030 &h->q[h->intr_mode]); 8031 } 8032 } 8033 if (rc) { 8034 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8035 pci_irq_vector(h->pdev, 0), h->devname); 8036 hpsa_free_irqs(h); 8037 return -ENODEV; 8038 } 8039 return 0; 8040 } 8041 8042 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8043 { 8044 int rc; 8045 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8046 8047 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8048 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8049 if (rc) { 8050 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8051 return rc; 8052 } 8053 8054 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8055 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8056 if (rc) { 8057 dev_warn(&h->pdev->dev, "Board failed to become ready " 8058 "after soft reset.\n"); 8059 return rc; 8060 } 8061 8062 return 0; 8063 } 8064 8065 static void hpsa_free_reply_queues(struct ctlr_info *h) 8066 { 8067 int i; 8068 8069 for (i = 0; i < h->nreply_queues; i++) { 8070 if (!h->reply_queue[i].head) 8071 continue; 8072 dma_free_coherent(&h->pdev->dev, 8073 h->reply_queue_size, 8074 h->reply_queue[i].head, 8075 h->reply_queue[i].busaddr); 8076 h->reply_queue[i].head = NULL; 8077 h->reply_queue[i].busaddr = 0; 8078 } 8079 h->reply_queue_size = 0; 8080 } 8081 8082 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8083 { 8084 hpsa_free_performant_mode(h); /* init_one 7 */ 8085 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8086 hpsa_free_cmd_pool(h); /* init_one 5 */ 8087 hpsa_free_irqs(h); /* init_one 4 */ 8088 scsi_host_put(h->scsi_host); /* init_one 3 */ 8089 h->scsi_host = NULL; /* init_one 3 */ 8090 hpsa_free_pci_init(h); /* init_one 2_5 */ 8091 free_percpu(h->lockup_detected); /* init_one 2 */ 8092 h->lockup_detected = NULL; /* init_one 2 */ 8093 if (h->resubmit_wq) { 8094 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8095 h->resubmit_wq = NULL; 8096 } 8097 if (h->rescan_ctlr_wq) { 8098 destroy_workqueue(h->rescan_ctlr_wq); 8099 h->rescan_ctlr_wq = NULL; 8100 } 8101 kfree(h); /* init_one 1 */ 8102 } 8103 8104 /* Called when controller lockup detected. */ 8105 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8106 { 8107 int i, refcount; 8108 struct CommandList *c; 8109 int failcount = 0; 8110 8111 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8112 for (i = 0; i < h->nr_cmds; i++) { 8113 c = h->cmd_pool + i; 8114 refcount = atomic_inc_return(&c->refcount); 8115 if (refcount > 1) { 8116 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8117 finish_cmd(c); 8118 atomic_dec(&h->commands_outstanding); 8119 failcount++; 8120 } 8121 cmd_free(h, c); 8122 } 8123 dev_warn(&h->pdev->dev, 8124 "failed %d commands in fail_all\n", failcount); 8125 } 8126 8127 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8128 { 8129 int cpu; 8130 8131 for_each_online_cpu(cpu) { 8132 u32 *lockup_detected; 8133 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8134 *lockup_detected = value; 8135 } 8136 wmb(); /* be sure the per-cpu variables are out to memory */ 8137 } 8138 8139 static void controller_lockup_detected(struct ctlr_info *h) 8140 { 8141 unsigned long flags; 8142 u32 lockup_detected; 8143 8144 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8145 spin_lock_irqsave(&h->lock, flags); 8146 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8147 if (!lockup_detected) { 8148 /* no heartbeat, but controller gave us a zero. */ 8149 dev_warn(&h->pdev->dev, 8150 "lockup detected after %d but scratchpad register is zero\n", 8151 h->heartbeat_sample_interval / HZ); 8152 lockup_detected = 0xffffffff; 8153 } 8154 set_lockup_detected_for_all_cpus(h, lockup_detected); 8155 spin_unlock_irqrestore(&h->lock, flags); 8156 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8157 lockup_detected, h->heartbeat_sample_interval / HZ); 8158 if (lockup_detected == 0xffff0000) { 8159 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8160 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8161 } 8162 pci_disable_device(h->pdev); 8163 fail_all_outstanding_cmds(h); 8164 } 8165 8166 static int detect_controller_lockup(struct ctlr_info *h) 8167 { 8168 u64 now; 8169 u32 heartbeat; 8170 unsigned long flags; 8171 8172 now = get_jiffies_64(); 8173 /* If we've received an interrupt recently, we're ok. */ 8174 if (time_after64(h->last_intr_timestamp + 8175 (h->heartbeat_sample_interval), now)) 8176 return false; 8177 8178 /* 8179 * If we've already checked the heartbeat recently, we're ok. 8180 * This could happen if someone sends us a signal. We 8181 * otherwise don't care about signals in this thread. 8182 */ 8183 if (time_after64(h->last_heartbeat_timestamp + 8184 (h->heartbeat_sample_interval), now)) 8185 return false; 8186 8187 /* If heartbeat has not changed since we last looked, we're not ok. */ 8188 spin_lock_irqsave(&h->lock, flags); 8189 heartbeat = readl(&h->cfgtable->HeartBeat); 8190 spin_unlock_irqrestore(&h->lock, flags); 8191 if (h->last_heartbeat == heartbeat) { 8192 controller_lockup_detected(h); 8193 return true; 8194 } 8195 8196 /* We're ok. */ 8197 h->last_heartbeat = heartbeat; 8198 h->last_heartbeat_timestamp = now; 8199 return false; 8200 } 8201 8202 /* 8203 * Set ioaccel status for all ioaccel volumes. 8204 * 8205 * Called from monitor controller worker (hpsa_event_monitor_worker) 8206 * 8207 * A Volume (or Volumes that comprise an Array set may be undergoing a 8208 * transformation, so we will be turning off ioaccel for all volumes that 8209 * make up the Array. 8210 */ 8211 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8212 { 8213 int rc; 8214 int i; 8215 u8 ioaccel_status; 8216 unsigned char *buf; 8217 struct hpsa_scsi_dev_t *device; 8218 8219 if (!h) 8220 return; 8221 8222 buf = kmalloc(64, GFP_KERNEL); 8223 if (!buf) 8224 return; 8225 8226 /* 8227 * Run through current device list used during I/O requests. 8228 */ 8229 for (i = 0; i < h->ndevices; i++) { 8230 device = h->dev[i]; 8231 8232 if (!device) 8233 continue; 8234 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8235 HPSA_VPD_LV_IOACCEL_STATUS)) 8236 continue; 8237 8238 memset(buf, 0, 64); 8239 8240 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8241 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8242 buf, 64); 8243 if (rc != 0) 8244 continue; 8245 8246 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8247 device->offload_config = 8248 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8249 if (device->offload_config) 8250 device->offload_to_be_enabled = 8251 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8252 8253 /* 8254 * Immediately turn off ioaccel for any volume the 8255 * controller tells us to. Some of the reasons could be: 8256 * transformation - change to the LVs of an Array. 8257 * degraded volume - component failure 8258 * 8259 * If ioaccel is to be re-enabled, re-enable later during the 8260 * scan operation so the driver can get a fresh raidmap 8261 * before turning ioaccel back on. 8262 * 8263 */ 8264 if (!device->offload_to_be_enabled) 8265 device->offload_enabled = 0; 8266 } 8267 8268 kfree(buf); 8269 } 8270 8271 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8272 { 8273 char *event_type; 8274 8275 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8276 return; 8277 8278 /* Ask the controller to clear the events we're handling. */ 8279 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8280 | CFGTBL_Trans_io_accel2)) && 8281 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8282 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8283 8284 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8285 event_type = "state change"; 8286 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8287 event_type = "configuration change"; 8288 /* Stop sending new RAID offload reqs via the IO accelerator */ 8289 scsi_block_requests(h->scsi_host); 8290 hpsa_set_ioaccel_status(h); 8291 hpsa_drain_accel_commands(h); 8292 /* Set 'accelerator path config change' bit */ 8293 dev_warn(&h->pdev->dev, 8294 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8295 h->events, event_type); 8296 writel(h->events, &(h->cfgtable->clear_event_notify)); 8297 /* Set the "clear event notify field update" bit 6 */ 8298 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8299 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8300 hpsa_wait_for_clear_event_notify_ack(h); 8301 scsi_unblock_requests(h->scsi_host); 8302 } else { 8303 /* Acknowledge controller notification events. */ 8304 writel(h->events, &(h->cfgtable->clear_event_notify)); 8305 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8306 hpsa_wait_for_clear_event_notify_ack(h); 8307 } 8308 return; 8309 } 8310 8311 /* Check a register on the controller to see if there are configuration 8312 * changes (added/changed/removed logical drives, etc.) which mean that 8313 * we should rescan the controller for devices. 8314 * Also check flag for driver-initiated rescan. 8315 */ 8316 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8317 { 8318 if (h->drv_req_rescan) { 8319 h->drv_req_rescan = 0; 8320 return 1; 8321 } 8322 8323 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8324 return 0; 8325 8326 h->events = readl(&(h->cfgtable->event_notify)); 8327 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8328 } 8329 8330 /* 8331 * Check if any of the offline devices have become ready 8332 */ 8333 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8334 { 8335 unsigned long flags; 8336 struct offline_device_entry *d; 8337 struct list_head *this, *tmp; 8338 8339 spin_lock_irqsave(&h->offline_device_lock, flags); 8340 list_for_each_safe(this, tmp, &h->offline_device_list) { 8341 d = list_entry(this, struct offline_device_entry, 8342 offline_list); 8343 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8344 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8345 spin_lock_irqsave(&h->offline_device_lock, flags); 8346 list_del(&d->offline_list); 8347 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8348 return 1; 8349 } 8350 spin_lock_irqsave(&h->offline_device_lock, flags); 8351 } 8352 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8353 return 0; 8354 } 8355 8356 static int hpsa_luns_changed(struct ctlr_info *h) 8357 { 8358 int rc = 1; /* assume there are changes */ 8359 struct ReportLUNdata *logdev = NULL; 8360 8361 /* if we can't find out if lun data has changed, 8362 * assume that it has. 8363 */ 8364 8365 if (!h->lastlogicals) 8366 return rc; 8367 8368 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8369 if (!logdev) 8370 return rc; 8371 8372 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8373 dev_warn(&h->pdev->dev, 8374 "report luns failed, can't track lun changes.\n"); 8375 goto out; 8376 } 8377 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8378 dev_info(&h->pdev->dev, 8379 "Lun changes detected.\n"); 8380 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8381 goto out; 8382 } else 8383 rc = 0; /* no changes detected. */ 8384 out: 8385 kfree(logdev); 8386 return rc; 8387 } 8388 8389 static void hpsa_perform_rescan(struct ctlr_info *h) 8390 { 8391 struct Scsi_Host *sh = NULL; 8392 unsigned long flags; 8393 8394 /* 8395 * Do the scan after the reset 8396 */ 8397 spin_lock_irqsave(&h->reset_lock, flags); 8398 if (h->reset_in_progress) { 8399 h->drv_req_rescan = 1; 8400 spin_unlock_irqrestore(&h->reset_lock, flags); 8401 return; 8402 } 8403 spin_unlock_irqrestore(&h->reset_lock, flags); 8404 8405 sh = scsi_host_get(h->scsi_host); 8406 if (sh != NULL) { 8407 hpsa_scan_start(sh); 8408 scsi_host_put(sh); 8409 h->drv_req_rescan = 0; 8410 } 8411 } 8412 8413 /* 8414 * watch for controller events 8415 */ 8416 static void hpsa_event_monitor_worker(struct work_struct *work) 8417 { 8418 struct ctlr_info *h = container_of(to_delayed_work(work), 8419 struct ctlr_info, event_monitor_work); 8420 unsigned long flags; 8421 8422 spin_lock_irqsave(&h->lock, flags); 8423 if (h->remove_in_progress) { 8424 spin_unlock_irqrestore(&h->lock, flags); 8425 return; 8426 } 8427 spin_unlock_irqrestore(&h->lock, flags); 8428 8429 if (hpsa_ctlr_needs_rescan(h)) { 8430 hpsa_ack_ctlr_events(h); 8431 hpsa_perform_rescan(h); 8432 } 8433 8434 spin_lock_irqsave(&h->lock, flags); 8435 if (!h->remove_in_progress) 8436 schedule_delayed_work(&h->event_monitor_work, 8437 HPSA_EVENT_MONITOR_INTERVAL); 8438 spin_unlock_irqrestore(&h->lock, flags); 8439 } 8440 8441 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8442 { 8443 unsigned long flags; 8444 struct ctlr_info *h = container_of(to_delayed_work(work), 8445 struct ctlr_info, rescan_ctlr_work); 8446 8447 spin_lock_irqsave(&h->lock, flags); 8448 if (h->remove_in_progress) { 8449 spin_unlock_irqrestore(&h->lock, flags); 8450 return; 8451 } 8452 spin_unlock_irqrestore(&h->lock, flags); 8453 8454 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8455 hpsa_perform_rescan(h); 8456 } else if (h->discovery_polling) { 8457 if (hpsa_luns_changed(h)) { 8458 dev_info(&h->pdev->dev, 8459 "driver discovery polling rescan.\n"); 8460 hpsa_perform_rescan(h); 8461 } 8462 } 8463 spin_lock_irqsave(&h->lock, flags); 8464 if (!h->remove_in_progress) 8465 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8466 h->heartbeat_sample_interval); 8467 spin_unlock_irqrestore(&h->lock, flags); 8468 } 8469 8470 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8471 { 8472 unsigned long flags; 8473 struct ctlr_info *h = container_of(to_delayed_work(work), 8474 struct ctlr_info, monitor_ctlr_work); 8475 8476 detect_controller_lockup(h); 8477 if (lockup_detected(h)) 8478 return; 8479 8480 spin_lock_irqsave(&h->lock, flags); 8481 if (!h->remove_in_progress) 8482 schedule_delayed_work(&h->monitor_ctlr_work, 8483 h->heartbeat_sample_interval); 8484 spin_unlock_irqrestore(&h->lock, flags); 8485 } 8486 8487 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8488 char *name) 8489 { 8490 struct workqueue_struct *wq = NULL; 8491 8492 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8493 if (!wq) 8494 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8495 8496 return wq; 8497 } 8498 8499 static void hpda_free_ctlr_info(struct ctlr_info *h) 8500 { 8501 kfree(h->reply_map); 8502 kfree(h); 8503 } 8504 8505 static struct ctlr_info *hpda_alloc_ctlr_info(void) 8506 { 8507 struct ctlr_info *h; 8508 8509 h = kzalloc(sizeof(*h), GFP_KERNEL); 8510 if (!h) 8511 return NULL; 8512 8513 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 8514 if (!h->reply_map) { 8515 kfree(h); 8516 return NULL; 8517 } 8518 return h; 8519 } 8520 8521 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8522 { 8523 int dac, rc; 8524 struct ctlr_info *h; 8525 int try_soft_reset = 0; 8526 unsigned long flags; 8527 u32 board_id; 8528 8529 if (number_of_controllers == 0) 8530 printk(KERN_INFO DRIVER_NAME "\n"); 8531 8532 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8533 if (rc < 0) { 8534 dev_warn(&pdev->dev, "Board ID not found\n"); 8535 return rc; 8536 } 8537 8538 rc = hpsa_init_reset_devices(pdev, board_id); 8539 if (rc) { 8540 if (rc != -ENOTSUPP) 8541 return rc; 8542 /* If the reset fails in a particular way (it has no way to do 8543 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8544 * a soft reset once we get the controller configured up to the 8545 * point that it can accept a command. 8546 */ 8547 try_soft_reset = 1; 8548 rc = 0; 8549 } 8550 8551 reinit_after_soft_reset: 8552 8553 /* Command structures must be aligned on a 32-byte boundary because 8554 * the 5 lower bits of the address are used by the hardware. and by 8555 * the driver. See comments in hpsa.h for more info. 8556 */ 8557 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8558 h = hpda_alloc_ctlr_info(); 8559 if (!h) { 8560 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8561 return -ENOMEM; 8562 } 8563 8564 h->pdev = pdev; 8565 8566 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8567 INIT_LIST_HEAD(&h->offline_device_list); 8568 spin_lock_init(&h->lock); 8569 spin_lock_init(&h->offline_device_lock); 8570 spin_lock_init(&h->scan_lock); 8571 spin_lock_init(&h->reset_lock); 8572 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8573 8574 /* Allocate and clear per-cpu variable lockup_detected */ 8575 h->lockup_detected = alloc_percpu(u32); 8576 if (!h->lockup_detected) { 8577 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8578 rc = -ENOMEM; 8579 goto clean1; /* aer/h */ 8580 } 8581 set_lockup_detected_for_all_cpus(h, 0); 8582 8583 rc = hpsa_pci_init(h); 8584 if (rc) 8585 goto clean2; /* lu, aer/h */ 8586 8587 /* relies on h-> settings made by hpsa_pci_init, including 8588 * interrupt_mode h->intr */ 8589 rc = hpsa_scsi_host_alloc(h); 8590 if (rc) 8591 goto clean2_5; /* pci, lu, aer/h */ 8592 8593 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8594 h->ctlr = number_of_controllers; 8595 number_of_controllers++; 8596 8597 /* configure PCI DMA stuff */ 8598 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8599 if (rc == 0) { 8600 dac = 1; 8601 } else { 8602 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8603 if (rc == 0) { 8604 dac = 0; 8605 } else { 8606 dev_err(&pdev->dev, "no suitable DMA available\n"); 8607 goto clean3; /* shost, pci, lu, aer/h */ 8608 } 8609 } 8610 8611 /* make sure the board interrupts are off */ 8612 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8613 8614 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8615 if (rc) 8616 goto clean3; /* shost, pci, lu, aer/h */ 8617 rc = hpsa_alloc_cmd_pool(h); 8618 if (rc) 8619 goto clean4; /* irq, shost, pci, lu, aer/h */ 8620 rc = hpsa_alloc_sg_chain_blocks(h); 8621 if (rc) 8622 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8623 init_waitqueue_head(&h->scan_wait_queue); 8624 init_waitqueue_head(&h->event_sync_wait_queue); 8625 mutex_init(&h->reset_mutex); 8626 h->scan_finished = 1; /* no scan currently in progress */ 8627 h->scan_waiting = 0; 8628 8629 pci_set_drvdata(pdev, h); 8630 h->ndevices = 0; 8631 8632 spin_lock_init(&h->devlock); 8633 rc = hpsa_put_ctlr_into_performant_mode(h); 8634 if (rc) 8635 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8636 8637 /* create the resubmit workqueue */ 8638 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8639 if (!h->rescan_ctlr_wq) { 8640 rc = -ENOMEM; 8641 goto clean7; 8642 } 8643 8644 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8645 if (!h->resubmit_wq) { 8646 rc = -ENOMEM; 8647 goto clean7; /* aer/h */ 8648 } 8649 8650 /* 8651 * At this point, the controller is ready to take commands. 8652 * Now, if reset_devices and the hard reset didn't work, try 8653 * the soft reset and see if that works. 8654 */ 8655 if (try_soft_reset) { 8656 8657 /* This is kind of gross. We may or may not get a completion 8658 * from the soft reset command, and if we do, then the value 8659 * from the fifo may or may not be valid. So, we wait 10 secs 8660 * after the reset throwing away any completions we get during 8661 * that time. Unregister the interrupt handler and register 8662 * fake ones to scoop up any residual completions. 8663 */ 8664 spin_lock_irqsave(&h->lock, flags); 8665 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8666 spin_unlock_irqrestore(&h->lock, flags); 8667 hpsa_free_irqs(h); 8668 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8669 hpsa_intx_discard_completions); 8670 if (rc) { 8671 dev_warn(&h->pdev->dev, 8672 "Failed to request_irq after soft reset.\n"); 8673 /* 8674 * cannot goto clean7 or free_irqs will be called 8675 * again. Instead, do its work 8676 */ 8677 hpsa_free_performant_mode(h); /* clean7 */ 8678 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8679 hpsa_free_cmd_pool(h); /* clean5 */ 8680 /* 8681 * skip hpsa_free_irqs(h) clean4 since that 8682 * was just called before request_irqs failed 8683 */ 8684 goto clean3; 8685 } 8686 8687 rc = hpsa_kdump_soft_reset(h); 8688 if (rc) 8689 /* Neither hard nor soft reset worked, we're hosed. */ 8690 goto clean7; 8691 8692 dev_info(&h->pdev->dev, "Board READY.\n"); 8693 dev_info(&h->pdev->dev, 8694 "Waiting for stale completions to drain.\n"); 8695 h->access.set_intr_mask(h, HPSA_INTR_ON); 8696 msleep(10000); 8697 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8698 8699 rc = controller_reset_failed(h->cfgtable); 8700 if (rc) 8701 dev_info(&h->pdev->dev, 8702 "Soft reset appears to have failed.\n"); 8703 8704 /* since the controller's reset, we have to go back and re-init 8705 * everything. Easiest to just forget what we've done and do it 8706 * all over again. 8707 */ 8708 hpsa_undo_allocations_after_kdump_soft_reset(h); 8709 try_soft_reset = 0; 8710 if (rc) 8711 /* don't goto clean, we already unallocated */ 8712 return -ENODEV; 8713 8714 goto reinit_after_soft_reset; 8715 } 8716 8717 /* Enable Accelerated IO path at driver layer */ 8718 h->acciopath_status = 1; 8719 /* Disable discovery polling.*/ 8720 h->discovery_polling = 0; 8721 8722 8723 /* Turn the interrupts on so we can service requests */ 8724 h->access.set_intr_mask(h, HPSA_INTR_ON); 8725 8726 hpsa_hba_inquiry(h); 8727 8728 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8729 if (!h->lastlogicals) 8730 dev_info(&h->pdev->dev, 8731 "Can't track change to report lun data\n"); 8732 8733 /* hook into SCSI subsystem */ 8734 rc = hpsa_scsi_add_host(h); 8735 if (rc) 8736 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8737 8738 /* Monitor the controller for firmware lockups */ 8739 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8740 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8741 schedule_delayed_work(&h->monitor_ctlr_work, 8742 h->heartbeat_sample_interval); 8743 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8744 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8745 h->heartbeat_sample_interval); 8746 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8747 schedule_delayed_work(&h->event_monitor_work, 8748 HPSA_EVENT_MONITOR_INTERVAL); 8749 return 0; 8750 8751 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8752 hpsa_free_performant_mode(h); 8753 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8754 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8755 hpsa_free_sg_chain_blocks(h); 8756 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8757 hpsa_free_cmd_pool(h); 8758 clean4: /* irq, shost, pci, lu, aer/h */ 8759 hpsa_free_irqs(h); 8760 clean3: /* shost, pci, lu, aer/h */ 8761 scsi_host_put(h->scsi_host); 8762 h->scsi_host = NULL; 8763 clean2_5: /* pci, lu, aer/h */ 8764 hpsa_free_pci_init(h); 8765 clean2: /* lu, aer/h */ 8766 if (h->lockup_detected) { 8767 free_percpu(h->lockup_detected); 8768 h->lockup_detected = NULL; 8769 } 8770 clean1: /* wq/aer/h */ 8771 if (h->resubmit_wq) { 8772 destroy_workqueue(h->resubmit_wq); 8773 h->resubmit_wq = NULL; 8774 } 8775 if (h->rescan_ctlr_wq) { 8776 destroy_workqueue(h->rescan_ctlr_wq); 8777 h->rescan_ctlr_wq = NULL; 8778 } 8779 kfree(h); 8780 return rc; 8781 } 8782 8783 static void hpsa_flush_cache(struct ctlr_info *h) 8784 { 8785 char *flush_buf; 8786 struct CommandList *c; 8787 int rc; 8788 8789 if (unlikely(lockup_detected(h))) 8790 return; 8791 flush_buf = kzalloc(4, GFP_KERNEL); 8792 if (!flush_buf) 8793 return; 8794 8795 c = cmd_alloc(h); 8796 8797 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8798 RAID_CTLR_LUNID, TYPE_CMD)) { 8799 goto out; 8800 } 8801 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8802 DEFAULT_TIMEOUT); 8803 if (rc) 8804 goto out; 8805 if (c->err_info->CommandStatus != 0) 8806 out: 8807 dev_warn(&h->pdev->dev, 8808 "error flushing cache on controller\n"); 8809 cmd_free(h, c); 8810 kfree(flush_buf); 8811 } 8812 8813 /* Make controller gather fresh report lun data each time we 8814 * send down a report luns request 8815 */ 8816 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8817 { 8818 u32 *options; 8819 struct CommandList *c; 8820 int rc; 8821 8822 /* Don't bother trying to set diag options if locked up */ 8823 if (unlikely(h->lockup_detected)) 8824 return; 8825 8826 options = kzalloc(sizeof(*options), GFP_KERNEL); 8827 if (!options) 8828 return; 8829 8830 c = cmd_alloc(h); 8831 8832 /* first, get the current diag options settings */ 8833 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8834 RAID_CTLR_LUNID, TYPE_CMD)) 8835 goto errout; 8836 8837 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8838 NO_TIMEOUT); 8839 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8840 goto errout; 8841 8842 /* Now, set the bit for disabling the RLD caching */ 8843 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8844 8845 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8846 RAID_CTLR_LUNID, TYPE_CMD)) 8847 goto errout; 8848 8849 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8850 NO_TIMEOUT); 8851 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8852 goto errout; 8853 8854 /* Now verify that it got set: */ 8855 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8856 RAID_CTLR_LUNID, TYPE_CMD)) 8857 goto errout; 8858 8859 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8860 NO_TIMEOUT); 8861 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8862 goto errout; 8863 8864 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8865 goto out; 8866 8867 errout: 8868 dev_err(&h->pdev->dev, 8869 "Error: failed to disable report lun data caching.\n"); 8870 out: 8871 cmd_free(h, c); 8872 kfree(options); 8873 } 8874 8875 static void __hpsa_shutdown(struct pci_dev *pdev) 8876 { 8877 struct ctlr_info *h; 8878 8879 h = pci_get_drvdata(pdev); 8880 /* Turn board interrupts off and send the flush cache command 8881 * sendcmd will turn off interrupt, and send the flush... 8882 * To write all data in the battery backed cache to disks 8883 */ 8884 hpsa_flush_cache(h); 8885 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8886 hpsa_free_irqs(h); /* init_one 4 */ 8887 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8888 } 8889 8890 static void hpsa_shutdown(struct pci_dev *pdev) 8891 { 8892 __hpsa_shutdown(pdev); 8893 pci_disable_device(pdev); 8894 } 8895 8896 static void hpsa_free_device_info(struct ctlr_info *h) 8897 { 8898 int i; 8899 8900 for (i = 0; i < h->ndevices; i++) { 8901 kfree(h->dev[i]); 8902 h->dev[i] = NULL; 8903 } 8904 } 8905 8906 static void hpsa_remove_one(struct pci_dev *pdev) 8907 { 8908 struct ctlr_info *h; 8909 unsigned long flags; 8910 8911 if (pci_get_drvdata(pdev) == NULL) { 8912 dev_err(&pdev->dev, "unable to remove device\n"); 8913 return; 8914 } 8915 h = pci_get_drvdata(pdev); 8916 8917 /* Get rid of any controller monitoring work items */ 8918 spin_lock_irqsave(&h->lock, flags); 8919 h->remove_in_progress = 1; 8920 spin_unlock_irqrestore(&h->lock, flags); 8921 cancel_delayed_work_sync(&h->monitor_ctlr_work); 8922 cancel_delayed_work_sync(&h->rescan_ctlr_work); 8923 cancel_delayed_work_sync(&h->event_monitor_work); 8924 destroy_workqueue(h->rescan_ctlr_wq); 8925 destroy_workqueue(h->resubmit_wq); 8926 8927 hpsa_delete_sas_host(h); 8928 8929 /* 8930 * Call before disabling interrupts. 8931 * scsi_remove_host can trigger I/O operations especially 8932 * when multipath is enabled. There can be SYNCHRONIZE CACHE 8933 * operations which cannot complete and will hang the system. 8934 */ 8935 if (h->scsi_host) 8936 scsi_remove_host(h->scsi_host); /* init_one 8 */ 8937 /* includes hpsa_free_irqs - init_one 4 */ 8938 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8939 __hpsa_shutdown(pdev); 8940 8941 hpsa_free_device_info(h); /* scan */ 8942 8943 kfree(h->hba_inquiry_data); /* init_one 10 */ 8944 h->hba_inquiry_data = NULL; /* init_one 10 */ 8945 hpsa_free_ioaccel2_sg_chain_blocks(h); 8946 hpsa_free_performant_mode(h); /* init_one 7 */ 8947 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8948 hpsa_free_cmd_pool(h); /* init_one 5 */ 8949 kfree(h->lastlogicals); 8950 8951 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8952 8953 scsi_host_put(h->scsi_host); /* init_one 3 */ 8954 h->scsi_host = NULL; /* init_one 3 */ 8955 8956 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8957 hpsa_free_pci_init(h); /* init_one 2.5 */ 8958 8959 free_percpu(h->lockup_detected); /* init_one 2 */ 8960 h->lockup_detected = NULL; /* init_one 2 */ 8961 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8962 8963 hpda_free_ctlr_info(h); /* init_one 1 */ 8964 } 8965 8966 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8967 __attribute__((unused)) pm_message_t state) 8968 { 8969 return -ENOSYS; 8970 } 8971 8972 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8973 { 8974 return -ENOSYS; 8975 } 8976 8977 static struct pci_driver hpsa_pci_driver = { 8978 .name = HPSA, 8979 .probe = hpsa_init_one, 8980 .remove = hpsa_remove_one, 8981 .id_table = hpsa_pci_device_id, /* id_table */ 8982 .shutdown = hpsa_shutdown, 8983 .suspend = hpsa_suspend, 8984 .resume = hpsa_resume, 8985 }; 8986 8987 /* Fill in bucket_map[], given nsgs (the max number of 8988 * scatter gather elements supported) and bucket[], 8989 * which is an array of 8 integers. The bucket[] array 8990 * contains 8 different DMA transfer sizes (in 16 8991 * byte increments) which the controller uses to fetch 8992 * commands. This function fills in bucket_map[], which 8993 * maps a given number of scatter gather elements to one of 8994 * the 8 DMA transfer sizes. The point of it is to allow the 8995 * controller to only do as much DMA as needed to fetch the 8996 * command, with the DMA transfer size encoded in the lower 8997 * bits of the command address. 8998 */ 8999 static void calc_bucket_map(int bucket[], int num_buckets, 9000 int nsgs, int min_blocks, u32 *bucket_map) 9001 { 9002 int i, j, b, size; 9003 9004 /* Note, bucket_map must have nsgs+1 entries. */ 9005 for (i = 0; i <= nsgs; i++) { 9006 /* Compute size of a command with i SG entries */ 9007 size = i + min_blocks; 9008 b = num_buckets; /* Assume the biggest bucket */ 9009 /* Find the bucket that is just big enough */ 9010 for (j = 0; j < num_buckets; j++) { 9011 if (bucket[j] >= size) { 9012 b = j; 9013 break; 9014 } 9015 } 9016 /* for a command with i SG entries, use bucket b. */ 9017 bucket_map[i] = b; 9018 } 9019 } 9020 9021 /* 9022 * return -ENODEV on err, 0 on success (or no action) 9023 * allocates numerous items that must be freed later 9024 */ 9025 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9026 { 9027 int i; 9028 unsigned long register_value; 9029 unsigned long transMethod = CFGTBL_Trans_Performant | 9030 (trans_support & CFGTBL_Trans_use_short_tags) | 9031 CFGTBL_Trans_enable_directed_msix | 9032 (trans_support & (CFGTBL_Trans_io_accel1 | 9033 CFGTBL_Trans_io_accel2)); 9034 struct access_method access = SA5_performant_access; 9035 9036 /* This is a bit complicated. There are 8 registers on 9037 * the controller which we write to to tell it 8 different 9038 * sizes of commands which there may be. It's a way of 9039 * reducing the DMA done to fetch each command. Encoded into 9040 * each command's tag are 3 bits which communicate to the controller 9041 * which of the eight sizes that command fits within. The size of 9042 * each command depends on how many scatter gather entries there are. 9043 * Each SG entry requires 16 bytes. The eight registers are programmed 9044 * with the number of 16-byte blocks a command of that size requires. 9045 * The smallest command possible requires 5 such 16 byte blocks. 9046 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9047 * blocks. Note, this only extends to the SG entries contained 9048 * within the command block, and does not extend to chained blocks 9049 * of SG elements. bft[] contains the eight values we write to 9050 * the registers. They are not evenly distributed, but have more 9051 * sizes for small commands, and fewer sizes for larger commands. 9052 */ 9053 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9054 #define MIN_IOACCEL2_BFT_ENTRY 5 9055 #define HPSA_IOACCEL2_HEADER_SZ 4 9056 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9057 13, 14, 15, 16, 17, 18, 19, 9058 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9059 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9060 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9061 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9062 16 * MIN_IOACCEL2_BFT_ENTRY); 9063 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9064 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9065 /* 5 = 1 s/g entry or 4k 9066 * 6 = 2 s/g entry or 8k 9067 * 8 = 4 s/g entry or 16k 9068 * 10 = 6 s/g entry or 24k 9069 */ 9070 9071 /* If the controller supports either ioaccel method then 9072 * we can also use the RAID stack submit path that does not 9073 * perform the superfluous readl() after each command submission. 9074 */ 9075 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9076 access = SA5_performant_access_no_read; 9077 9078 /* Controller spec: zero out this buffer. */ 9079 for (i = 0; i < h->nreply_queues; i++) 9080 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9081 9082 bft[7] = SG_ENTRIES_IN_CMD + 4; 9083 calc_bucket_map(bft, ARRAY_SIZE(bft), 9084 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9085 for (i = 0; i < 8; i++) 9086 writel(bft[i], &h->transtable->BlockFetch[i]); 9087 9088 /* size of controller ring buffer */ 9089 writel(h->max_commands, &h->transtable->RepQSize); 9090 writel(h->nreply_queues, &h->transtable->RepQCount); 9091 writel(0, &h->transtable->RepQCtrAddrLow32); 9092 writel(0, &h->transtable->RepQCtrAddrHigh32); 9093 9094 for (i = 0; i < h->nreply_queues; i++) { 9095 writel(0, &h->transtable->RepQAddr[i].upper); 9096 writel(h->reply_queue[i].busaddr, 9097 &h->transtable->RepQAddr[i].lower); 9098 } 9099 9100 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9101 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9102 /* 9103 * enable outbound interrupt coalescing in accelerator mode; 9104 */ 9105 if (trans_support & CFGTBL_Trans_io_accel1) { 9106 access = SA5_ioaccel_mode1_access; 9107 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9108 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9109 } else 9110 if (trans_support & CFGTBL_Trans_io_accel2) 9111 access = SA5_ioaccel_mode2_access; 9112 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9113 if (hpsa_wait_for_mode_change_ack(h)) { 9114 dev_err(&h->pdev->dev, 9115 "performant mode problem - doorbell timeout\n"); 9116 return -ENODEV; 9117 } 9118 register_value = readl(&(h->cfgtable->TransportActive)); 9119 if (!(register_value & CFGTBL_Trans_Performant)) { 9120 dev_err(&h->pdev->dev, 9121 "performant mode problem - transport not active\n"); 9122 return -ENODEV; 9123 } 9124 /* Change the access methods to the performant access methods */ 9125 h->access = access; 9126 h->transMethod = transMethod; 9127 9128 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9129 (trans_support & CFGTBL_Trans_io_accel2))) 9130 return 0; 9131 9132 if (trans_support & CFGTBL_Trans_io_accel1) { 9133 /* Set up I/O accelerator mode */ 9134 for (i = 0; i < h->nreply_queues; i++) { 9135 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9136 h->reply_queue[i].current_entry = 9137 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9138 } 9139 bft[7] = h->ioaccel_maxsg + 8; 9140 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9141 h->ioaccel1_blockFetchTable); 9142 9143 /* initialize all reply queue entries to unused */ 9144 for (i = 0; i < h->nreply_queues; i++) 9145 memset(h->reply_queue[i].head, 9146 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9147 h->reply_queue_size); 9148 9149 /* set all the constant fields in the accelerator command 9150 * frames once at init time to save CPU cycles later. 9151 */ 9152 for (i = 0; i < h->nr_cmds; i++) { 9153 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9154 9155 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9156 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9157 (i * sizeof(struct ErrorInfo))); 9158 cp->err_info_len = sizeof(struct ErrorInfo); 9159 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9160 cp->host_context_flags = 9161 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9162 cp->timeout_sec = 0; 9163 cp->ReplyQueue = 0; 9164 cp->tag = 9165 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9166 cp->host_addr = 9167 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9168 (i * sizeof(struct io_accel1_cmd))); 9169 } 9170 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9171 u64 cfg_offset, cfg_base_addr_index; 9172 u32 bft2_offset, cfg_base_addr; 9173 int rc; 9174 9175 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9176 &cfg_base_addr_index, &cfg_offset); 9177 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9178 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9179 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9180 4, h->ioaccel2_blockFetchTable); 9181 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9182 BUILD_BUG_ON(offsetof(struct CfgTable, 9183 io_accel_request_size_offset) != 0xb8); 9184 h->ioaccel2_bft2_regs = 9185 remap_pci_mem(pci_resource_start(h->pdev, 9186 cfg_base_addr_index) + 9187 cfg_offset + bft2_offset, 9188 ARRAY_SIZE(bft2) * 9189 sizeof(*h->ioaccel2_bft2_regs)); 9190 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9191 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9192 } 9193 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9194 if (hpsa_wait_for_mode_change_ack(h)) { 9195 dev_err(&h->pdev->dev, 9196 "performant mode problem - enabling ioaccel mode\n"); 9197 return -ENODEV; 9198 } 9199 return 0; 9200 } 9201 9202 /* Free ioaccel1 mode command blocks and block fetch table */ 9203 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9204 { 9205 if (h->ioaccel_cmd_pool) { 9206 pci_free_consistent(h->pdev, 9207 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9208 h->ioaccel_cmd_pool, 9209 h->ioaccel_cmd_pool_dhandle); 9210 h->ioaccel_cmd_pool = NULL; 9211 h->ioaccel_cmd_pool_dhandle = 0; 9212 } 9213 kfree(h->ioaccel1_blockFetchTable); 9214 h->ioaccel1_blockFetchTable = NULL; 9215 } 9216 9217 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9218 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9219 { 9220 h->ioaccel_maxsg = 9221 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9222 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9223 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9224 9225 /* Command structures must be aligned on a 128-byte boundary 9226 * because the 7 lower bits of the address are used by the 9227 * hardware. 9228 */ 9229 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9230 IOACCEL1_COMMANDLIST_ALIGNMENT); 9231 h->ioaccel_cmd_pool = 9232 dma_alloc_coherent(&h->pdev->dev, 9233 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9234 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9235 9236 h->ioaccel1_blockFetchTable = 9237 kmalloc(((h->ioaccel_maxsg + 1) * 9238 sizeof(u32)), GFP_KERNEL); 9239 9240 if ((h->ioaccel_cmd_pool == NULL) || 9241 (h->ioaccel1_blockFetchTable == NULL)) 9242 goto clean_up; 9243 9244 memset(h->ioaccel_cmd_pool, 0, 9245 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9246 return 0; 9247 9248 clean_up: 9249 hpsa_free_ioaccel1_cmd_and_bft(h); 9250 return -ENOMEM; 9251 } 9252 9253 /* Free ioaccel2 mode command blocks and block fetch table */ 9254 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9255 { 9256 hpsa_free_ioaccel2_sg_chain_blocks(h); 9257 9258 if (h->ioaccel2_cmd_pool) { 9259 pci_free_consistent(h->pdev, 9260 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9261 h->ioaccel2_cmd_pool, 9262 h->ioaccel2_cmd_pool_dhandle); 9263 h->ioaccel2_cmd_pool = NULL; 9264 h->ioaccel2_cmd_pool_dhandle = 0; 9265 } 9266 kfree(h->ioaccel2_blockFetchTable); 9267 h->ioaccel2_blockFetchTable = NULL; 9268 } 9269 9270 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9271 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9272 { 9273 int rc; 9274 9275 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9276 9277 h->ioaccel_maxsg = 9278 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9279 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9280 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9281 9282 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9283 IOACCEL2_COMMANDLIST_ALIGNMENT); 9284 h->ioaccel2_cmd_pool = 9285 dma_alloc_coherent(&h->pdev->dev, 9286 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9287 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9288 9289 h->ioaccel2_blockFetchTable = 9290 kmalloc(((h->ioaccel_maxsg + 1) * 9291 sizeof(u32)), GFP_KERNEL); 9292 9293 if ((h->ioaccel2_cmd_pool == NULL) || 9294 (h->ioaccel2_blockFetchTable == NULL)) { 9295 rc = -ENOMEM; 9296 goto clean_up; 9297 } 9298 9299 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9300 if (rc) 9301 goto clean_up; 9302 9303 memset(h->ioaccel2_cmd_pool, 0, 9304 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9305 return 0; 9306 9307 clean_up: 9308 hpsa_free_ioaccel2_cmd_and_bft(h); 9309 return rc; 9310 } 9311 9312 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9313 static void hpsa_free_performant_mode(struct ctlr_info *h) 9314 { 9315 kfree(h->blockFetchTable); 9316 h->blockFetchTable = NULL; 9317 hpsa_free_reply_queues(h); 9318 hpsa_free_ioaccel1_cmd_and_bft(h); 9319 hpsa_free_ioaccel2_cmd_and_bft(h); 9320 } 9321 9322 /* return -ENODEV on error, 0 on success (or no action) 9323 * allocates numerous items that must be freed later 9324 */ 9325 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9326 { 9327 u32 trans_support; 9328 unsigned long transMethod = CFGTBL_Trans_Performant | 9329 CFGTBL_Trans_use_short_tags; 9330 int i, rc; 9331 9332 if (hpsa_simple_mode) 9333 return 0; 9334 9335 trans_support = readl(&(h->cfgtable->TransportSupport)); 9336 if (!(trans_support & PERFORMANT_MODE)) 9337 return 0; 9338 9339 /* Check for I/O accelerator mode support */ 9340 if (trans_support & CFGTBL_Trans_io_accel1) { 9341 transMethod |= CFGTBL_Trans_io_accel1 | 9342 CFGTBL_Trans_enable_directed_msix; 9343 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9344 if (rc) 9345 return rc; 9346 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9347 transMethod |= CFGTBL_Trans_io_accel2 | 9348 CFGTBL_Trans_enable_directed_msix; 9349 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9350 if (rc) 9351 return rc; 9352 } 9353 9354 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9355 hpsa_get_max_perf_mode_cmds(h); 9356 /* Performant mode ring buffer and supporting data structures */ 9357 h->reply_queue_size = h->max_commands * sizeof(u64); 9358 9359 for (i = 0; i < h->nreply_queues; i++) { 9360 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9361 h->reply_queue_size, 9362 &h->reply_queue[i].busaddr, 9363 GFP_KERNEL); 9364 if (!h->reply_queue[i].head) { 9365 rc = -ENOMEM; 9366 goto clean1; /* rq, ioaccel */ 9367 } 9368 h->reply_queue[i].size = h->max_commands; 9369 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9370 h->reply_queue[i].current_entry = 0; 9371 } 9372 9373 /* Need a block fetch table for performant mode */ 9374 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9375 sizeof(u32)), GFP_KERNEL); 9376 if (!h->blockFetchTable) { 9377 rc = -ENOMEM; 9378 goto clean1; /* rq, ioaccel */ 9379 } 9380 9381 rc = hpsa_enter_performant_mode(h, trans_support); 9382 if (rc) 9383 goto clean2; /* bft, rq, ioaccel */ 9384 return 0; 9385 9386 clean2: /* bft, rq, ioaccel */ 9387 kfree(h->blockFetchTable); 9388 h->blockFetchTable = NULL; 9389 clean1: /* rq, ioaccel */ 9390 hpsa_free_reply_queues(h); 9391 hpsa_free_ioaccel1_cmd_and_bft(h); 9392 hpsa_free_ioaccel2_cmd_and_bft(h); 9393 return rc; 9394 } 9395 9396 static int is_accelerated_cmd(struct CommandList *c) 9397 { 9398 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9399 } 9400 9401 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9402 { 9403 struct CommandList *c = NULL; 9404 int i, accel_cmds_out; 9405 int refcount; 9406 9407 do { /* wait for all outstanding ioaccel commands to drain out */ 9408 accel_cmds_out = 0; 9409 for (i = 0; i < h->nr_cmds; i++) { 9410 c = h->cmd_pool + i; 9411 refcount = atomic_inc_return(&c->refcount); 9412 if (refcount > 1) /* Command is allocated */ 9413 accel_cmds_out += is_accelerated_cmd(c); 9414 cmd_free(h, c); 9415 } 9416 if (accel_cmds_out <= 0) 9417 break; 9418 msleep(100); 9419 } while (1); 9420 } 9421 9422 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9423 struct hpsa_sas_port *hpsa_sas_port) 9424 { 9425 struct hpsa_sas_phy *hpsa_sas_phy; 9426 struct sas_phy *phy; 9427 9428 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9429 if (!hpsa_sas_phy) 9430 return NULL; 9431 9432 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9433 hpsa_sas_port->next_phy_index); 9434 if (!phy) { 9435 kfree(hpsa_sas_phy); 9436 return NULL; 9437 } 9438 9439 hpsa_sas_port->next_phy_index++; 9440 hpsa_sas_phy->phy = phy; 9441 hpsa_sas_phy->parent_port = hpsa_sas_port; 9442 9443 return hpsa_sas_phy; 9444 } 9445 9446 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9447 { 9448 struct sas_phy *phy = hpsa_sas_phy->phy; 9449 9450 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9451 if (hpsa_sas_phy->added_to_port) 9452 list_del(&hpsa_sas_phy->phy_list_entry); 9453 sas_phy_delete(phy); 9454 kfree(hpsa_sas_phy); 9455 } 9456 9457 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9458 { 9459 int rc; 9460 struct hpsa_sas_port *hpsa_sas_port; 9461 struct sas_phy *phy; 9462 struct sas_identify *identify; 9463 9464 hpsa_sas_port = hpsa_sas_phy->parent_port; 9465 phy = hpsa_sas_phy->phy; 9466 9467 identify = &phy->identify; 9468 memset(identify, 0, sizeof(*identify)); 9469 identify->sas_address = hpsa_sas_port->sas_address; 9470 identify->device_type = SAS_END_DEVICE; 9471 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9472 identify->target_port_protocols = SAS_PROTOCOL_STP; 9473 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9474 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9475 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9476 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9477 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9478 9479 rc = sas_phy_add(hpsa_sas_phy->phy); 9480 if (rc) 9481 return rc; 9482 9483 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9484 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9485 &hpsa_sas_port->phy_list_head); 9486 hpsa_sas_phy->added_to_port = true; 9487 9488 return 0; 9489 } 9490 9491 static int 9492 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9493 struct sas_rphy *rphy) 9494 { 9495 struct sas_identify *identify; 9496 9497 identify = &rphy->identify; 9498 identify->sas_address = hpsa_sas_port->sas_address; 9499 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9500 identify->target_port_protocols = SAS_PROTOCOL_STP; 9501 9502 return sas_rphy_add(rphy); 9503 } 9504 9505 static struct hpsa_sas_port 9506 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9507 u64 sas_address) 9508 { 9509 int rc; 9510 struct hpsa_sas_port *hpsa_sas_port; 9511 struct sas_port *port; 9512 9513 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9514 if (!hpsa_sas_port) 9515 return NULL; 9516 9517 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9518 hpsa_sas_port->parent_node = hpsa_sas_node; 9519 9520 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9521 if (!port) 9522 goto free_hpsa_port; 9523 9524 rc = sas_port_add(port); 9525 if (rc) 9526 goto free_sas_port; 9527 9528 hpsa_sas_port->port = port; 9529 hpsa_sas_port->sas_address = sas_address; 9530 list_add_tail(&hpsa_sas_port->port_list_entry, 9531 &hpsa_sas_node->port_list_head); 9532 9533 return hpsa_sas_port; 9534 9535 free_sas_port: 9536 sas_port_free(port); 9537 free_hpsa_port: 9538 kfree(hpsa_sas_port); 9539 9540 return NULL; 9541 } 9542 9543 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9544 { 9545 struct hpsa_sas_phy *hpsa_sas_phy; 9546 struct hpsa_sas_phy *next; 9547 9548 list_for_each_entry_safe(hpsa_sas_phy, next, 9549 &hpsa_sas_port->phy_list_head, phy_list_entry) 9550 hpsa_free_sas_phy(hpsa_sas_phy); 9551 9552 sas_port_delete(hpsa_sas_port->port); 9553 list_del(&hpsa_sas_port->port_list_entry); 9554 kfree(hpsa_sas_port); 9555 } 9556 9557 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9558 { 9559 struct hpsa_sas_node *hpsa_sas_node; 9560 9561 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9562 if (hpsa_sas_node) { 9563 hpsa_sas_node->parent_dev = parent_dev; 9564 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9565 } 9566 9567 return hpsa_sas_node; 9568 } 9569 9570 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9571 { 9572 struct hpsa_sas_port *hpsa_sas_port; 9573 struct hpsa_sas_port *next; 9574 9575 if (!hpsa_sas_node) 9576 return; 9577 9578 list_for_each_entry_safe(hpsa_sas_port, next, 9579 &hpsa_sas_node->port_list_head, port_list_entry) 9580 hpsa_free_sas_port(hpsa_sas_port); 9581 9582 kfree(hpsa_sas_node); 9583 } 9584 9585 static struct hpsa_scsi_dev_t 9586 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9587 struct sas_rphy *rphy) 9588 { 9589 int i; 9590 struct hpsa_scsi_dev_t *device; 9591 9592 for (i = 0; i < h->ndevices; i++) { 9593 device = h->dev[i]; 9594 if (!device->sas_port) 9595 continue; 9596 if (device->sas_port->rphy == rphy) 9597 return device; 9598 } 9599 9600 return NULL; 9601 } 9602 9603 static int hpsa_add_sas_host(struct ctlr_info *h) 9604 { 9605 int rc; 9606 struct device *parent_dev; 9607 struct hpsa_sas_node *hpsa_sas_node; 9608 struct hpsa_sas_port *hpsa_sas_port; 9609 struct hpsa_sas_phy *hpsa_sas_phy; 9610 9611 parent_dev = &h->scsi_host->shost_dev; 9612 9613 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9614 if (!hpsa_sas_node) 9615 return -ENOMEM; 9616 9617 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9618 if (!hpsa_sas_port) { 9619 rc = -ENODEV; 9620 goto free_sas_node; 9621 } 9622 9623 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9624 if (!hpsa_sas_phy) { 9625 rc = -ENODEV; 9626 goto free_sas_port; 9627 } 9628 9629 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9630 if (rc) 9631 goto free_sas_phy; 9632 9633 h->sas_host = hpsa_sas_node; 9634 9635 return 0; 9636 9637 free_sas_phy: 9638 hpsa_free_sas_phy(hpsa_sas_phy); 9639 free_sas_port: 9640 hpsa_free_sas_port(hpsa_sas_port); 9641 free_sas_node: 9642 hpsa_free_sas_node(hpsa_sas_node); 9643 9644 return rc; 9645 } 9646 9647 static void hpsa_delete_sas_host(struct ctlr_info *h) 9648 { 9649 hpsa_free_sas_node(h->sas_host); 9650 } 9651 9652 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9653 struct hpsa_scsi_dev_t *device) 9654 { 9655 int rc; 9656 struct hpsa_sas_port *hpsa_sas_port; 9657 struct sas_rphy *rphy; 9658 9659 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9660 if (!hpsa_sas_port) 9661 return -ENOMEM; 9662 9663 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9664 if (!rphy) { 9665 rc = -ENODEV; 9666 goto free_sas_port; 9667 } 9668 9669 hpsa_sas_port->rphy = rphy; 9670 device->sas_port = hpsa_sas_port; 9671 9672 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9673 if (rc) 9674 goto free_sas_port; 9675 9676 return 0; 9677 9678 free_sas_port: 9679 hpsa_free_sas_port(hpsa_sas_port); 9680 device->sas_port = NULL; 9681 9682 return rc; 9683 } 9684 9685 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9686 { 9687 if (device->sas_port) { 9688 hpsa_free_sas_port(device->sas_port); 9689 device->sas_port = NULL; 9690 } 9691 } 9692 9693 static int 9694 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9695 { 9696 return 0; 9697 } 9698 9699 static int 9700 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9701 { 9702 struct Scsi_Host *shost = phy_to_shost(rphy); 9703 struct ctlr_info *h; 9704 struct hpsa_scsi_dev_t *sd; 9705 9706 if (!shost) 9707 return -ENXIO; 9708 9709 h = shost_to_hba(shost); 9710 9711 if (!h) 9712 return -ENXIO; 9713 9714 sd = hpsa_find_device_by_sas_rphy(h, rphy); 9715 if (!sd) 9716 return -ENXIO; 9717 9718 *identifier = sd->eli; 9719 9720 return 0; 9721 } 9722 9723 static int 9724 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9725 { 9726 return -ENXIO; 9727 } 9728 9729 static int 9730 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9731 { 9732 return 0; 9733 } 9734 9735 static int 9736 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9737 { 9738 return 0; 9739 } 9740 9741 static int 9742 hpsa_sas_phy_setup(struct sas_phy *phy) 9743 { 9744 return 0; 9745 } 9746 9747 static void 9748 hpsa_sas_phy_release(struct sas_phy *phy) 9749 { 9750 } 9751 9752 static int 9753 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9754 { 9755 return -EINVAL; 9756 } 9757 9758 static struct sas_function_template hpsa_sas_transport_functions = { 9759 .get_linkerrors = hpsa_sas_get_linkerrors, 9760 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9761 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9762 .phy_reset = hpsa_sas_phy_reset, 9763 .phy_enable = hpsa_sas_phy_enable, 9764 .phy_setup = hpsa_sas_phy_setup, 9765 .phy_release = hpsa_sas_phy_release, 9766 .set_phy_speed = hpsa_sas_phy_speed, 9767 }; 9768 9769 /* 9770 * This is it. Register the PCI driver information for the cards we control 9771 * the OS will call our registered routines when it finds one of our cards. 9772 */ 9773 static int __init hpsa_init(void) 9774 { 9775 int rc; 9776 9777 hpsa_sas_transport_template = 9778 sas_attach_transport(&hpsa_sas_transport_functions); 9779 if (!hpsa_sas_transport_template) 9780 return -ENODEV; 9781 9782 rc = pci_register_driver(&hpsa_pci_driver); 9783 9784 if (rc) 9785 sas_release_transport(hpsa_sas_transport_template); 9786 9787 return rc; 9788 } 9789 9790 static void __exit hpsa_cleanup(void) 9791 { 9792 pci_unregister_driver(&hpsa_pci_driver); 9793 sas_release_transport(hpsa_sas_transport_template); 9794 } 9795 9796 static void __attribute__((unused)) verify_offsets(void) 9797 { 9798 #define VERIFY_OFFSET(member, offset) \ 9799 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9800 9801 VERIFY_OFFSET(structure_size, 0); 9802 VERIFY_OFFSET(volume_blk_size, 4); 9803 VERIFY_OFFSET(volume_blk_cnt, 8); 9804 VERIFY_OFFSET(phys_blk_shift, 16); 9805 VERIFY_OFFSET(parity_rotation_shift, 17); 9806 VERIFY_OFFSET(strip_size, 18); 9807 VERIFY_OFFSET(disk_starting_blk, 20); 9808 VERIFY_OFFSET(disk_blk_cnt, 28); 9809 VERIFY_OFFSET(data_disks_per_row, 36); 9810 VERIFY_OFFSET(metadata_disks_per_row, 38); 9811 VERIFY_OFFSET(row_cnt, 40); 9812 VERIFY_OFFSET(layout_map_count, 42); 9813 VERIFY_OFFSET(flags, 44); 9814 VERIFY_OFFSET(dekindex, 46); 9815 /* VERIFY_OFFSET(reserved, 48 */ 9816 VERIFY_OFFSET(data, 64); 9817 9818 #undef VERIFY_OFFSET 9819 9820 #define VERIFY_OFFSET(member, offset) \ 9821 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9822 9823 VERIFY_OFFSET(IU_type, 0); 9824 VERIFY_OFFSET(direction, 1); 9825 VERIFY_OFFSET(reply_queue, 2); 9826 /* VERIFY_OFFSET(reserved1, 3); */ 9827 VERIFY_OFFSET(scsi_nexus, 4); 9828 VERIFY_OFFSET(Tag, 8); 9829 VERIFY_OFFSET(cdb, 16); 9830 VERIFY_OFFSET(cciss_lun, 32); 9831 VERIFY_OFFSET(data_len, 40); 9832 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9833 VERIFY_OFFSET(sg_count, 45); 9834 /* VERIFY_OFFSET(reserved3 */ 9835 VERIFY_OFFSET(err_ptr, 48); 9836 VERIFY_OFFSET(err_len, 56); 9837 /* VERIFY_OFFSET(reserved4 */ 9838 VERIFY_OFFSET(sg, 64); 9839 9840 #undef VERIFY_OFFSET 9841 9842 #define VERIFY_OFFSET(member, offset) \ 9843 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9844 9845 VERIFY_OFFSET(dev_handle, 0x00); 9846 VERIFY_OFFSET(reserved1, 0x02); 9847 VERIFY_OFFSET(function, 0x03); 9848 VERIFY_OFFSET(reserved2, 0x04); 9849 VERIFY_OFFSET(err_info, 0x0C); 9850 VERIFY_OFFSET(reserved3, 0x10); 9851 VERIFY_OFFSET(err_info_len, 0x12); 9852 VERIFY_OFFSET(reserved4, 0x13); 9853 VERIFY_OFFSET(sgl_offset, 0x14); 9854 VERIFY_OFFSET(reserved5, 0x15); 9855 VERIFY_OFFSET(transfer_len, 0x1C); 9856 VERIFY_OFFSET(reserved6, 0x20); 9857 VERIFY_OFFSET(io_flags, 0x24); 9858 VERIFY_OFFSET(reserved7, 0x26); 9859 VERIFY_OFFSET(LUN, 0x34); 9860 VERIFY_OFFSET(control, 0x3C); 9861 VERIFY_OFFSET(CDB, 0x40); 9862 VERIFY_OFFSET(reserved8, 0x50); 9863 VERIFY_OFFSET(host_context_flags, 0x60); 9864 VERIFY_OFFSET(timeout_sec, 0x62); 9865 VERIFY_OFFSET(ReplyQueue, 0x64); 9866 VERIFY_OFFSET(reserved9, 0x65); 9867 VERIFY_OFFSET(tag, 0x68); 9868 VERIFY_OFFSET(host_addr, 0x70); 9869 VERIFY_OFFSET(CISS_LUN, 0x78); 9870 VERIFY_OFFSET(SG, 0x78 + 8); 9871 #undef VERIFY_OFFSET 9872 } 9873 9874 module_init(hpsa_init); 9875 module_exit(hpsa_cleanup); 9876