1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/pci-aspm.h> 25 #include <linux/kernel.h> 26 #include <linux/slab.h> 27 #include <linux/delay.h> 28 #include <linux/fs.h> 29 #include <linux/timer.h> 30 #include <linux/init.h> 31 #include <linux/spinlock.h> 32 #include <linux/compat.h> 33 #include <linux/blktrace_api.h> 34 #include <linux/uaccess.h> 35 #include <linux/io.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/completion.h> 38 #include <linux/moduleparam.h> 39 #include <scsi/scsi.h> 40 #include <scsi/scsi_cmnd.h> 41 #include <scsi/scsi_device.h> 42 #include <scsi/scsi_host.h> 43 #include <scsi/scsi_tcq.h> 44 #include <scsi/scsi_eh.h> 45 #include <scsi/scsi_transport_sas.h> 46 #include <scsi/scsi_dbg.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/jiffies.h> 52 #include <linux/percpu-defs.h> 53 #include <linux/percpu.h> 54 #include <asm/unaligned.h> 55 #include <asm/div64.h> 56 #include "hpsa_cmd.h" 57 #include "hpsa.h" 58 59 /* 60 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 61 * with an optional trailing '-' followed by a byte value (0-255). 62 */ 63 #define HPSA_DRIVER_VERSION "3.4.20-125" 64 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 65 #define HPSA "hpsa" 66 67 /* How long to wait for CISS doorbell communication */ 68 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 69 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 70 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 71 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 72 #define MAX_IOCTL_CONFIG_WAIT 1000 73 74 /*define how many times we will try a command because of bus resets */ 75 #define MAX_CMD_RETRIES 3 76 77 /* Embedded module documentation macros - see modules.h */ 78 MODULE_AUTHOR("Hewlett-Packard Company"); 79 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 80 HPSA_DRIVER_VERSION); 81 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 82 MODULE_VERSION(HPSA_DRIVER_VERSION); 83 MODULE_LICENSE("GPL"); 84 MODULE_ALIAS("cciss"); 85 86 static int hpsa_simple_mode; 87 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 88 MODULE_PARM_DESC(hpsa_simple_mode, 89 "Use 'simple mode' rather than 'performant mode'"); 90 91 /* define the PCI info for the cards we can control */ 92 static const struct pci_device_id hpsa_pci_device_id[] = { 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 135 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 141 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 145 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 146 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 147 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 148 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 149 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 150 {0,} 151 }; 152 153 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 154 155 /* board_id = Subsystem Device ID & Vendor ID 156 * product = Marketing Name for the board 157 * access = Address of the struct of function pointers 158 */ 159 static struct board_type products[] = { 160 {0x40700E11, "Smart Array 5300", &SA5A_access}, 161 {0x40800E11, "Smart Array 5i", &SA5B_access}, 162 {0x40820E11, "Smart Array 532", &SA5B_access}, 163 {0x40830E11, "Smart Array 5312", &SA5B_access}, 164 {0x409A0E11, "Smart Array 641", &SA5A_access}, 165 {0x409B0E11, "Smart Array 642", &SA5A_access}, 166 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 167 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 168 {0x40910E11, "Smart Array 6i", &SA5A_access}, 169 {0x3225103C, "Smart Array P600", &SA5A_access}, 170 {0x3223103C, "Smart Array P800", &SA5A_access}, 171 {0x3234103C, "Smart Array P400", &SA5A_access}, 172 {0x3235103C, "Smart Array P400i", &SA5A_access}, 173 {0x3211103C, "Smart Array E200i", &SA5A_access}, 174 {0x3212103C, "Smart Array E200", &SA5A_access}, 175 {0x3213103C, "Smart Array E200i", &SA5A_access}, 176 {0x3214103C, "Smart Array E200i", &SA5A_access}, 177 {0x3215103C, "Smart Array E200i", &SA5A_access}, 178 {0x3237103C, "Smart Array E500", &SA5A_access}, 179 {0x323D103C, "Smart Array P700m", &SA5A_access}, 180 {0x3241103C, "Smart Array P212", &SA5_access}, 181 {0x3243103C, "Smart Array P410", &SA5_access}, 182 {0x3245103C, "Smart Array P410i", &SA5_access}, 183 {0x3247103C, "Smart Array P411", &SA5_access}, 184 {0x3249103C, "Smart Array P812", &SA5_access}, 185 {0x324A103C, "Smart Array P712m", &SA5_access}, 186 {0x324B103C, "Smart Array P711m", &SA5_access}, 187 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 188 {0x3350103C, "Smart Array P222", &SA5_access}, 189 {0x3351103C, "Smart Array P420", &SA5_access}, 190 {0x3352103C, "Smart Array P421", &SA5_access}, 191 {0x3353103C, "Smart Array P822", &SA5_access}, 192 {0x3354103C, "Smart Array P420i", &SA5_access}, 193 {0x3355103C, "Smart Array P220i", &SA5_access}, 194 {0x3356103C, "Smart Array P721m", &SA5_access}, 195 {0x1920103C, "Smart Array P430i", &SA5_access}, 196 {0x1921103C, "Smart Array P830i", &SA5_access}, 197 {0x1922103C, "Smart Array P430", &SA5_access}, 198 {0x1923103C, "Smart Array P431", &SA5_access}, 199 {0x1924103C, "Smart Array P830", &SA5_access}, 200 {0x1925103C, "Smart Array P831", &SA5_access}, 201 {0x1926103C, "Smart Array P731m", &SA5_access}, 202 {0x1928103C, "Smart Array P230i", &SA5_access}, 203 {0x1929103C, "Smart Array P530", &SA5_access}, 204 {0x21BD103C, "Smart Array P244br", &SA5_access}, 205 {0x21BE103C, "Smart Array P741m", &SA5_access}, 206 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 207 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 208 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 209 {0x21C2103C, "Smart Array P440", &SA5_access}, 210 {0x21C3103C, "Smart Array P441", &SA5_access}, 211 {0x21C4103C, "Smart Array", &SA5_access}, 212 {0x21C5103C, "Smart Array P841", &SA5_access}, 213 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 214 {0x21C7103C, "Smart HBA H240", &SA5_access}, 215 {0x21C8103C, "Smart HBA H241", &SA5_access}, 216 {0x21C9103C, "Smart Array", &SA5_access}, 217 {0x21CA103C, "Smart Array P246br", &SA5_access}, 218 {0x21CB103C, "Smart Array P840", &SA5_access}, 219 {0x21CC103C, "Smart Array", &SA5_access}, 220 {0x21CD103C, "Smart Array", &SA5_access}, 221 {0x21CE103C, "Smart HBA", &SA5_access}, 222 {0x05809005, "SmartHBA-SA", &SA5_access}, 223 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 224 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 225 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 226 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 227 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 228 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 229 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 230 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 231 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 232 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 233 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 234 }; 235 236 static struct scsi_transport_template *hpsa_sas_transport_template; 237 static int hpsa_add_sas_host(struct ctlr_info *h); 238 static void hpsa_delete_sas_host(struct ctlr_info *h); 239 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 240 struct hpsa_scsi_dev_t *device); 241 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 242 static struct hpsa_scsi_dev_t 243 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 244 struct sas_rphy *rphy); 245 246 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 247 static const struct scsi_cmnd hpsa_cmd_busy; 248 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 249 static const struct scsi_cmnd hpsa_cmd_idle; 250 static int number_of_controllers; 251 252 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 253 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 254 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 255 256 #ifdef CONFIG_COMPAT 257 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 258 void __user *arg); 259 #endif 260 261 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 262 static struct CommandList *cmd_alloc(struct ctlr_info *h); 263 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 264 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 265 struct scsi_cmnd *scmd); 266 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 267 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 268 int cmd_type); 269 static void hpsa_free_cmd_pool(struct ctlr_info *h); 270 #define VPD_PAGE (1 << 8) 271 #define HPSA_SIMPLE_ERROR_BITS 0x03 272 273 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 274 static void hpsa_scan_start(struct Scsi_Host *); 275 static int hpsa_scan_finished(struct Scsi_Host *sh, 276 unsigned long elapsed_time); 277 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 278 279 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 280 static int hpsa_slave_alloc(struct scsi_device *sdev); 281 static int hpsa_slave_configure(struct scsi_device *sdev); 282 static void hpsa_slave_destroy(struct scsi_device *sdev); 283 284 static void hpsa_update_scsi_devices(struct ctlr_info *h); 285 static int check_for_unit_attention(struct ctlr_info *h, 286 struct CommandList *c); 287 static void check_ioctl_unit_attention(struct ctlr_info *h, 288 struct CommandList *c); 289 /* performant mode helper functions */ 290 static void calc_bucket_map(int *bucket, int num_buckets, 291 int nsgs, int min_blocks, u32 *bucket_map); 292 static void hpsa_free_performant_mode(struct ctlr_info *h); 293 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 294 static inline u32 next_command(struct ctlr_info *h, u8 q); 295 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 296 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 297 u64 *cfg_offset); 298 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 299 unsigned long *memory_bar); 300 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 301 bool *legacy_board); 302 static int wait_for_device_to_become_ready(struct ctlr_info *h, 303 unsigned char lunaddr[], 304 int reply_queue); 305 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 306 int wait_for_ready); 307 static inline void finish_cmd(struct CommandList *c); 308 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 309 #define BOARD_NOT_READY 0 310 #define BOARD_READY 1 311 static void hpsa_drain_accel_commands(struct ctlr_info *h); 312 static void hpsa_flush_cache(struct ctlr_info *h); 313 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 314 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 315 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 316 static void hpsa_command_resubmit_worker(struct work_struct *work); 317 static u32 lockup_detected(struct ctlr_info *h); 318 static int detect_controller_lockup(struct ctlr_info *h); 319 static void hpsa_disable_rld_caching(struct ctlr_info *h); 320 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 321 struct ReportExtendedLUNdata *buf, int bufsize); 322 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 323 unsigned char scsi3addr[], u8 page); 324 static int hpsa_luns_changed(struct ctlr_info *h); 325 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 326 struct hpsa_scsi_dev_t *dev, 327 unsigned char *scsi3addr); 328 329 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 330 { 331 unsigned long *priv = shost_priv(sdev->host); 332 return (struct ctlr_info *) *priv; 333 } 334 335 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 336 { 337 unsigned long *priv = shost_priv(sh); 338 return (struct ctlr_info *) *priv; 339 } 340 341 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 342 { 343 return c->scsi_cmd == SCSI_CMD_IDLE; 344 } 345 346 static inline bool hpsa_is_pending_event(struct CommandList *c) 347 { 348 return c->reset_pending; 349 } 350 351 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 352 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 353 u8 *sense_key, u8 *asc, u8 *ascq) 354 { 355 struct scsi_sense_hdr sshdr; 356 bool rc; 357 358 *sense_key = -1; 359 *asc = -1; 360 *ascq = -1; 361 362 if (sense_data_len < 1) 363 return; 364 365 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 366 if (rc) { 367 *sense_key = sshdr.sense_key; 368 *asc = sshdr.asc; 369 *ascq = sshdr.ascq; 370 } 371 } 372 373 static int check_for_unit_attention(struct ctlr_info *h, 374 struct CommandList *c) 375 { 376 u8 sense_key, asc, ascq; 377 int sense_len; 378 379 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 380 sense_len = sizeof(c->err_info->SenseInfo); 381 else 382 sense_len = c->err_info->SenseLen; 383 384 decode_sense_data(c->err_info->SenseInfo, sense_len, 385 &sense_key, &asc, &ascq); 386 if (sense_key != UNIT_ATTENTION || asc == 0xff) 387 return 0; 388 389 switch (asc) { 390 case STATE_CHANGED: 391 dev_warn(&h->pdev->dev, 392 "%s: a state change detected, command retried\n", 393 h->devname); 394 break; 395 case LUN_FAILED: 396 dev_warn(&h->pdev->dev, 397 "%s: LUN failure detected\n", h->devname); 398 break; 399 case REPORT_LUNS_CHANGED: 400 dev_warn(&h->pdev->dev, 401 "%s: report LUN data changed\n", h->devname); 402 /* 403 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 404 * target (array) devices. 405 */ 406 break; 407 case POWER_OR_RESET: 408 dev_warn(&h->pdev->dev, 409 "%s: a power on or device reset detected\n", 410 h->devname); 411 break; 412 case UNIT_ATTENTION_CLEARED: 413 dev_warn(&h->pdev->dev, 414 "%s: unit attention cleared by another initiator\n", 415 h->devname); 416 break; 417 default: 418 dev_warn(&h->pdev->dev, 419 "%s: unknown unit attention detected\n", 420 h->devname); 421 break; 422 } 423 return 1; 424 } 425 426 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 427 { 428 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 429 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 430 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 431 return 0; 432 dev_warn(&h->pdev->dev, HPSA "device busy"); 433 return 1; 434 } 435 436 static u32 lockup_detected(struct ctlr_info *h); 437 static ssize_t host_show_lockup_detected(struct device *dev, 438 struct device_attribute *attr, char *buf) 439 { 440 int ld; 441 struct ctlr_info *h; 442 struct Scsi_Host *shost = class_to_shost(dev); 443 444 h = shost_to_hba(shost); 445 ld = lockup_detected(h); 446 447 return sprintf(buf, "ld=%d\n", ld); 448 } 449 450 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 451 struct device_attribute *attr, 452 const char *buf, size_t count) 453 { 454 int status, len; 455 struct ctlr_info *h; 456 struct Scsi_Host *shost = class_to_shost(dev); 457 char tmpbuf[10]; 458 459 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 460 return -EACCES; 461 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 462 strncpy(tmpbuf, buf, len); 463 tmpbuf[len] = '\0'; 464 if (sscanf(tmpbuf, "%d", &status) != 1) 465 return -EINVAL; 466 h = shost_to_hba(shost); 467 h->acciopath_status = !!status; 468 dev_warn(&h->pdev->dev, 469 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 470 h->acciopath_status ? "enabled" : "disabled"); 471 return count; 472 } 473 474 static ssize_t host_store_raid_offload_debug(struct device *dev, 475 struct device_attribute *attr, 476 const char *buf, size_t count) 477 { 478 int debug_level, len; 479 struct ctlr_info *h; 480 struct Scsi_Host *shost = class_to_shost(dev); 481 char tmpbuf[10]; 482 483 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 484 return -EACCES; 485 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 486 strncpy(tmpbuf, buf, len); 487 tmpbuf[len] = '\0'; 488 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 489 return -EINVAL; 490 if (debug_level < 0) 491 debug_level = 0; 492 h = shost_to_hba(shost); 493 h->raid_offload_debug = debug_level; 494 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 495 h->raid_offload_debug); 496 return count; 497 } 498 499 static ssize_t host_store_rescan(struct device *dev, 500 struct device_attribute *attr, 501 const char *buf, size_t count) 502 { 503 struct ctlr_info *h; 504 struct Scsi_Host *shost = class_to_shost(dev); 505 h = shost_to_hba(shost); 506 hpsa_scan_start(h->scsi_host); 507 return count; 508 } 509 510 static ssize_t host_show_firmware_revision(struct device *dev, 511 struct device_attribute *attr, char *buf) 512 { 513 struct ctlr_info *h; 514 struct Scsi_Host *shost = class_to_shost(dev); 515 unsigned char *fwrev; 516 517 h = shost_to_hba(shost); 518 if (!h->hba_inquiry_data) 519 return 0; 520 fwrev = &h->hba_inquiry_data[32]; 521 return snprintf(buf, 20, "%c%c%c%c\n", 522 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 523 } 524 525 static ssize_t host_show_commands_outstanding(struct device *dev, 526 struct device_attribute *attr, char *buf) 527 { 528 struct Scsi_Host *shost = class_to_shost(dev); 529 struct ctlr_info *h = shost_to_hba(shost); 530 531 return snprintf(buf, 20, "%d\n", 532 atomic_read(&h->commands_outstanding)); 533 } 534 535 static ssize_t host_show_transport_mode(struct device *dev, 536 struct device_attribute *attr, char *buf) 537 { 538 struct ctlr_info *h; 539 struct Scsi_Host *shost = class_to_shost(dev); 540 541 h = shost_to_hba(shost); 542 return snprintf(buf, 20, "%s\n", 543 h->transMethod & CFGTBL_Trans_Performant ? 544 "performant" : "simple"); 545 } 546 547 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 548 struct device_attribute *attr, char *buf) 549 { 550 struct ctlr_info *h; 551 struct Scsi_Host *shost = class_to_shost(dev); 552 553 h = shost_to_hba(shost); 554 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 555 (h->acciopath_status == 1) ? "enabled" : "disabled"); 556 } 557 558 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 559 static u32 unresettable_controller[] = { 560 0x324a103C, /* Smart Array P712m */ 561 0x324b103C, /* Smart Array P711m */ 562 0x3223103C, /* Smart Array P800 */ 563 0x3234103C, /* Smart Array P400 */ 564 0x3235103C, /* Smart Array P400i */ 565 0x3211103C, /* Smart Array E200i */ 566 0x3212103C, /* Smart Array E200 */ 567 0x3213103C, /* Smart Array E200i */ 568 0x3214103C, /* Smart Array E200i */ 569 0x3215103C, /* Smart Array E200i */ 570 0x3237103C, /* Smart Array E500 */ 571 0x323D103C, /* Smart Array P700m */ 572 0x40800E11, /* Smart Array 5i */ 573 0x409C0E11, /* Smart Array 6400 */ 574 0x409D0E11, /* Smart Array 6400 EM */ 575 0x40700E11, /* Smart Array 5300 */ 576 0x40820E11, /* Smart Array 532 */ 577 0x40830E11, /* Smart Array 5312 */ 578 0x409A0E11, /* Smart Array 641 */ 579 0x409B0E11, /* Smart Array 642 */ 580 0x40910E11, /* Smart Array 6i */ 581 }; 582 583 /* List of controllers which cannot even be soft reset */ 584 static u32 soft_unresettable_controller[] = { 585 0x40800E11, /* Smart Array 5i */ 586 0x40700E11, /* Smart Array 5300 */ 587 0x40820E11, /* Smart Array 532 */ 588 0x40830E11, /* Smart Array 5312 */ 589 0x409A0E11, /* Smart Array 641 */ 590 0x409B0E11, /* Smart Array 642 */ 591 0x40910E11, /* Smart Array 6i */ 592 /* Exclude 640x boards. These are two pci devices in one slot 593 * which share a battery backed cache module. One controls the 594 * cache, the other accesses the cache through the one that controls 595 * it. If we reset the one controlling the cache, the other will 596 * likely not be happy. Just forbid resetting this conjoined mess. 597 * The 640x isn't really supported by hpsa anyway. 598 */ 599 0x409C0E11, /* Smart Array 6400 */ 600 0x409D0E11, /* Smart Array 6400 EM */ 601 }; 602 603 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 604 { 605 int i; 606 607 for (i = 0; i < nelems; i++) 608 if (a[i] == board_id) 609 return 1; 610 return 0; 611 } 612 613 static int ctlr_is_hard_resettable(u32 board_id) 614 { 615 return !board_id_in_array(unresettable_controller, 616 ARRAY_SIZE(unresettable_controller), board_id); 617 } 618 619 static int ctlr_is_soft_resettable(u32 board_id) 620 { 621 return !board_id_in_array(soft_unresettable_controller, 622 ARRAY_SIZE(soft_unresettable_controller), board_id); 623 } 624 625 static int ctlr_is_resettable(u32 board_id) 626 { 627 return ctlr_is_hard_resettable(board_id) || 628 ctlr_is_soft_resettable(board_id); 629 } 630 631 static ssize_t host_show_resettable(struct device *dev, 632 struct device_attribute *attr, char *buf) 633 { 634 struct ctlr_info *h; 635 struct Scsi_Host *shost = class_to_shost(dev); 636 637 h = shost_to_hba(shost); 638 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 639 } 640 641 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 642 { 643 return (scsi3addr[3] & 0xC0) == 0x40; 644 } 645 646 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 647 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 648 }; 649 #define HPSA_RAID_0 0 650 #define HPSA_RAID_4 1 651 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 652 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 653 #define HPSA_RAID_51 4 654 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 655 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 656 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 657 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 658 659 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 660 { 661 return !device->physical_device; 662 } 663 664 static ssize_t raid_level_show(struct device *dev, 665 struct device_attribute *attr, char *buf) 666 { 667 ssize_t l = 0; 668 unsigned char rlevel; 669 struct ctlr_info *h; 670 struct scsi_device *sdev; 671 struct hpsa_scsi_dev_t *hdev; 672 unsigned long flags; 673 674 sdev = to_scsi_device(dev); 675 h = sdev_to_hba(sdev); 676 spin_lock_irqsave(&h->lock, flags); 677 hdev = sdev->hostdata; 678 if (!hdev) { 679 spin_unlock_irqrestore(&h->lock, flags); 680 return -ENODEV; 681 } 682 683 /* Is this even a logical drive? */ 684 if (!is_logical_device(hdev)) { 685 spin_unlock_irqrestore(&h->lock, flags); 686 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 687 return l; 688 } 689 690 rlevel = hdev->raid_level; 691 spin_unlock_irqrestore(&h->lock, flags); 692 if (rlevel > RAID_UNKNOWN) 693 rlevel = RAID_UNKNOWN; 694 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 695 return l; 696 } 697 698 static ssize_t lunid_show(struct device *dev, 699 struct device_attribute *attr, char *buf) 700 { 701 struct ctlr_info *h; 702 struct scsi_device *sdev; 703 struct hpsa_scsi_dev_t *hdev; 704 unsigned long flags; 705 unsigned char lunid[8]; 706 707 sdev = to_scsi_device(dev); 708 h = sdev_to_hba(sdev); 709 spin_lock_irqsave(&h->lock, flags); 710 hdev = sdev->hostdata; 711 if (!hdev) { 712 spin_unlock_irqrestore(&h->lock, flags); 713 return -ENODEV; 714 } 715 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 716 spin_unlock_irqrestore(&h->lock, flags); 717 return snprintf(buf, 20, "0x%8phN\n", lunid); 718 } 719 720 static ssize_t unique_id_show(struct device *dev, 721 struct device_attribute *attr, char *buf) 722 { 723 struct ctlr_info *h; 724 struct scsi_device *sdev; 725 struct hpsa_scsi_dev_t *hdev; 726 unsigned long flags; 727 unsigned char sn[16]; 728 729 sdev = to_scsi_device(dev); 730 h = sdev_to_hba(sdev); 731 spin_lock_irqsave(&h->lock, flags); 732 hdev = sdev->hostdata; 733 if (!hdev) { 734 spin_unlock_irqrestore(&h->lock, flags); 735 return -ENODEV; 736 } 737 memcpy(sn, hdev->device_id, sizeof(sn)); 738 spin_unlock_irqrestore(&h->lock, flags); 739 return snprintf(buf, 16 * 2 + 2, 740 "%02X%02X%02X%02X%02X%02X%02X%02X" 741 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 742 sn[0], sn[1], sn[2], sn[3], 743 sn[4], sn[5], sn[6], sn[7], 744 sn[8], sn[9], sn[10], sn[11], 745 sn[12], sn[13], sn[14], sn[15]); 746 } 747 748 static ssize_t sas_address_show(struct device *dev, 749 struct device_attribute *attr, char *buf) 750 { 751 struct ctlr_info *h; 752 struct scsi_device *sdev; 753 struct hpsa_scsi_dev_t *hdev; 754 unsigned long flags; 755 u64 sas_address; 756 757 sdev = to_scsi_device(dev); 758 h = sdev_to_hba(sdev); 759 spin_lock_irqsave(&h->lock, flags); 760 hdev = sdev->hostdata; 761 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 762 spin_unlock_irqrestore(&h->lock, flags); 763 return -ENODEV; 764 } 765 sas_address = hdev->sas_address; 766 spin_unlock_irqrestore(&h->lock, flags); 767 768 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 769 } 770 771 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 772 struct device_attribute *attr, char *buf) 773 { 774 struct ctlr_info *h; 775 struct scsi_device *sdev; 776 struct hpsa_scsi_dev_t *hdev; 777 unsigned long flags; 778 int offload_enabled; 779 780 sdev = to_scsi_device(dev); 781 h = sdev_to_hba(sdev); 782 spin_lock_irqsave(&h->lock, flags); 783 hdev = sdev->hostdata; 784 if (!hdev) { 785 spin_unlock_irqrestore(&h->lock, flags); 786 return -ENODEV; 787 } 788 offload_enabled = hdev->offload_enabled; 789 spin_unlock_irqrestore(&h->lock, flags); 790 791 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 792 return snprintf(buf, 20, "%d\n", offload_enabled); 793 else 794 return snprintf(buf, 40, "%s\n", 795 "Not applicable for a controller"); 796 } 797 798 #define MAX_PATHS 8 799 static ssize_t path_info_show(struct device *dev, 800 struct device_attribute *attr, char *buf) 801 { 802 struct ctlr_info *h; 803 struct scsi_device *sdev; 804 struct hpsa_scsi_dev_t *hdev; 805 unsigned long flags; 806 int i; 807 int output_len = 0; 808 u8 box; 809 u8 bay; 810 u8 path_map_index = 0; 811 char *active; 812 unsigned char phys_connector[2]; 813 814 sdev = to_scsi_device(dev); 815 h = sdev_to_hba(sdev); 816 spin_lock_irqsave(&h->devlock, flags); 817 hdev = sdev->hostdata; 818 if (!hdev) { 819 spin_unlock_irqrestore(&h->devlock, flags); 820 return -ENODEV; 821 } 822 823 bay = hdev->bay; 824 for (i = 0; i < MAX_PATHS; i++) { 825 path_map_index = 1<<i; 826 if (i == hdev->active_path_index) 827 active = "Active"; 828 else if (hdev->path_map & path_map_index) 829 active = "Inactive"; 830 else 831 continue; 832 833 output_len += scnprintf(buf + output_len, 834 PAGE_SIZE - output_len, 835 "[%d:%d:%d:%d] %20.20s ", 836 h->scsi_host->host_no, 837 hdev->bus, hdev->target, hdev->lun, 838 scsi_device_type(hdev->devtype)); 839 840 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 841 output_len += scnprintf(buf + output_len, 842 PAGE_SIZE - output_len, 843 "%s\n", active); 844 continue; 845 } 846 847 box = hdev->box[i]; 848 memcpy(&phys_connector, &hdev->phys_connector[i], 849 sizeof(phys_connector)); 850 if (phys_connector[0] < '0') 851 phys_connector[0] = '0'; 852 if (phys_connector[1] < '0') 853 phys_connector[1] = '0'; 854 output_len += scnprintf(buf + output_len, 855 PAGE_SIZE - output_len, 856 "PORT: %.2s ", 857 phys_connector); 858 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 859 hdev->expose_device) { 860 if (box == 0 || box == 0xFF) { 861 output_len += scnprintf(buf + output_len, 862 PAGE_SIZE - output_len, 863 "BAY: %hhu %s\n", 864 bay, active); 865 } else { 866 output_len += scnprintf(buf + output_len, 867 PAGE_SIZE - output_len, 868 "BOX: %hhu BAY: %hhu %s\n", 869 box, bay, active); 870 } 871 } else if (box != 0 && box != 0xFF) { 872 output_len += scnprintf(buf + output_len, 873 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 874 box, active); 875 } else 876 output_len += scnprintf(buf + output_len, 877 PAGE_SIZE - output_len, "%s\n", active); 878 } 879 880 spin_unlock_irqrestore(&h->devlock, flags); 881 return output_len; 882 } 883 884 static ssize_t host_show_ctlr_num(struct device *dev, 885 struct device_attribute *attr, char *buf) 886 { 887 struct ctlr_info *h; 888 struct Scsi_Host *shost = class_to_shost(dev); 889 890 h = shost_to_hba(shost); 891 return snprintf(buf, 20, "%d\n", h->ctlr); 892 } 893 894 static ssize_t host_show_legacy_board(struct device *dev, 895 struct device_attribute *attr, char *buf) 896 { 897 struct ctlr_info *h; 898 struct Scsi_Host *shost = class_to_shost(dev); 899 900 h = shost_to_hba(shost); 901 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 902 } 903 904 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 905 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 906 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 907 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 908 static DEVICE_ATTR(sas_address, S_IRUGO, sas_address_show, NULL); 909 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 910 host_show_hp_ssd_smart_path_enabled, NULL); 911 static DEVICE_ATTR(path_info, S_IRUGO, path_info_show, NULL); 912 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 913 host_show_hp_ssd_smart_path_status, 914 host_store_hp_ssd_smart_path_status); 915 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 916 host_store_raid_offload_debug); 917 static DEVICE_ATTR(firmware_revision, S_IRUGO, 918 host_show_firmware_revision, NULL); 919 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 920 host_show_commands_outstanding, NULL); 921 static DEVICE_ATTR(transport_mode, S_IRUGO, 922 host_show_transport_mode, NULL); 923 static DEVICE_ATTR(resettable, S_IRUGO, 924 host_show_resettable, NULL); 925 static DEVICE_ATTR(lockup_detected, S_IRUGO, 926 host_show_lockup_detected, NULL); 927 static DEVICE_ATTR(ctlr_num, S_IRUGO, 928 host_show_ctlr_num, NULL); 929 static DEVICE_ATTR(legacy_board, S_IRUGO, 930 host_show_legacy_board, NULL); 931 932 static struct device_attribute *hpsa_sdev_attrs[] = { 933 &dev_attr_raid_level, 934 &dev_attr_lunid, 935 &dev_attr_unique_id, 936 &dev_attr_hp_ssd_smart_path_enabled, 937 &dev_attr_path_info, 938 &dev_attr_sas_address, 939 NULL, 940 }; 941 942 static struct device_attribute *hpsa_shost_attrs[] = { 943 &dev_attr_rescan, 944 &dev_attr_firmware_revision, 945 &dev_attr_commands_outstanding, 946 &dev_attr_transport_mode, 947 &dev_attr_resettable, 948 &dev_attr_hp_ssd_smart_path_status, 949 &dev_attr_raid_offload_debug, 950 &dev_attr_lockup_detected, 951 &dev_attr_ctlr_num, 952 &dev_attr_legacy_board, 953 NULL, 954 }; 955 956 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 957 HPSA_MAX_CONCURRENT_PASSTHRUS) 958 959 static struct scsi_host_template hpsa_driver_template = { 960 .module = THIS_MODULE, 961 .name = HPSA, 962 .proc_name = HPSA, 963 .queuecommand = hpsa_scsi_queue_command, 964 .scan_start = hpsa_scan_start, 965 .scan_finished = hpsa_scan_finished, 966 .change_queue_depth = hpsa_change_queue_depth, 967 .this_id = -1, 968 .use_clustering = ENABLE_CLUSTERING, 969 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 970 .ioctl = hpsa_ioctl, 971 .slave_alloc = hpsa_slave_alloc, 972 .slave_configure = hpsa_slave_configure, 973 .slave_destroy = hpsa_slave_destroy, 974 #ifdef CONFIG_COMPAT 975 .compat_ioctl = hpsa_compat_ioctl, 976 #endif 977 .sdev_attrs = hpsa_sdev_attrs, 978 .shost_attrs = hpsa_shost_attrs, 979 .max_sectors = 1024, 980 .no_write_same = 1, 981 }; 982 983 static inline u32 next_command(struct ctlr_info *h, u8 q) 984 { 985 u32 a; 986 struct reply_queue_buffer *rq = &h->reply_queue[q]; 987 988 if (h->transMethod & CFGTBL_Trans_io_accel1) 989 return h->access.command_completed(h, q); 990 991 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 992 return h->access.command_completed(h, q); 993 994 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 995 a = rq->head[rq->current_entry]; 996 rq->current_entry++; 997 atomic_dec(&h->commands_outstanding); 998 } else { 999 a = FIFO_EMPTY; 1000 } 1001 /* Check for wraparound */ 1002 if (rq->current_entry == h->max_commands) { 1003 rq->current_entry = 0; 1004 rq->wraparound ^= 1; 1005 } 1006 return a; 1007 } 1008 1009 /* 1010 * There are some special bits in the bus address of the 1011 * command that we have to set for the controller to know 1012 * how to process the command: 1013 * 1014 * Normal performant mode: 1015 * bit 0: 1 means performant mode, 0 means simple mode. 1016 * bits 1-3 = block fetch table entry 1017 * bits 4-6 = command type (== 0) 1018 * 1019 * ioaccel1 mode: 1020 * bit 0 = "performant mode" bit. 1021 * bits 1-3 = block fetch table entry 1022 * bits 4-6 = command type (== 110) 1023 * (command type is needed because ioaccel1 mode 1024 * commands are submitted through the same register as normal 1025 * mode commands, so this is how the controller knows whether 1026 * the command is normal mode or ioaccel1 mode.) 1027 * 1028 * ioaccel2 mode: 1029 * bit 0 = "performant mode" bit. 1030 * bits 1-4 = block fetch table entry (note extra bit) 1031 * bits 4-6 = not needed, because ioaccel2 mode has 1032 * a separate special register for submitting commands. 1033 */ 1034 1035 /* 1036 * set_performant_mode: Modify the tag for cciss performant 1037 * set bit 0 for pull model, bits 3-1 for block fetch 1038 * register number 1039 */ 1040 #define DEFAULT_REPLY_QUEUE (-1) 1041 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1042 int reply_queue) 1043 { 1044 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1045 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1046 if (unlikely(!h->msix_vectors)) 1047 return; 1048 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1049 c->Header.ReplyQueue = 1050 raw_smp_processor_id() % h->nreply_queues; 1051 else 1052 c->Header.ReplyQueue = reply_queue % h->nreply_queues; 1053 } 1054 } 1055 1056 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1057 struct CommandList *c, 1058 int reply_queue) 1059 { 1060 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1061 1062 /* 1063 * Tell the controller to post the reply to the queue for this 1064 * processor. This seems to give the best I/O throughput. 1065 */ 1066 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1067 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 1068 else 1069 cp->ReplyQueue = reply_queue % h->nreply_queues; 1070 /* 1071 * Set the bits in the address sent down to include: 1072 * - performant mode bit (bit 0) 1073 * - pull count (bits 1-3) 1074 * - command type (bits 4-6) 1075 */ 1076 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1077 IOACCEL1_BUSADDR_CMDTYPE; 1078 } 1079 1080 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1081 struct CommandList *c, 1082 int reply_queue) 1083 { 1084 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1085 &h->ioaccel2_cmd_pool[c->cmdindex]; 1086 1087 /* Tell the controller to post the reply to the queue for this 1088 * processor. This seems to give the best I/O throughput. 1089 */ 1090 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1091 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1092 else 1093 cp->reply_queue = reply_queue % h->nreply_queues; 1094 /* Set the bits in the address sent down to include: 1095 * - performant mode bit not used in ioaccel mode 2 1096 * - pull count (bits 0-3) 1097 * - command type isn't needed for ioaccel2 1098 */ 1099 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1100 } 1101 1102 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1103 struct CommandList *c, 1104 int reply_queue) 1105 { 1106 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1107 1108 /* 1109 * Tell the controller to post the reply to the queue for this 1110 * processor. This seems to give the best I/O throughput. 1111 */ 1112 if (likely(reply_queue == DEFAULT_REPLY_QUEUE)) 1113 cp->reply_queue = smp_processor_id() % h->nreply_queues; 1114 else 1115 cp->reply_queue = reply_queue % h->nreply_queues; 1116 /* 1117 * Set the bits in the address sent down to include: 1118 * - performant mode bit not used in ioaccel mode 2 1119 * - pull count (bits 0-3) 1120 * - command type isn't needed for ioaccel2 1121 */ 1122 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1123 } 1124 1125 static int is_firmware_flash_cmd(u8 *cdb) 1126 { 1127 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1128 } 1129 1130 /* 1131 * During firmware flash, the heartbeat register may not update as frequently 1132 * as it should. So we dial down lockup detection during firmware flash. and 1133 * dial it back up when firmware flash completes. 1134 */ 1135 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1136 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1137 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1138 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1139 struct CommandList *c) 1140 { 1141 if (!is_firmware_flash_cmd(c->Request.CDB)) 1142 return; 1143 atomic_inc(&h->firmware_flash_in_progress); 1144 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1145 } 1146 1147 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1148 struct CommandList *c) 1149 { 1150 if (is_firmware_flash_cmd(c->Request.CDB) && 1151 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1152 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1153 } 1154 1155 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1156 struct CommandList *c, int reply_queue) 1157 { 1158 dial_down_lockup_detection_during_fw_flash(h, c); 1159 atomic_inc(&h->commands_outstanding); 1160 switch (c->cmd_type) { 1161 case CMD_IOACCEL1: 1162 set_ioaccel1_performant_mode(h, c, reply_queue); 1163 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1164 break; 1165 case CMD_IOACCEL2: 1166 set_ioaccel2_performant_mode(h, c, reply_queue); 1167 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1168 break; 1169 case IOACCEL2_TMF: 1170 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1171 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1172 break; 1173 default: 1174 set_performant_mode(h, c, reply_queue); 1175 h->access.submit_command(h, c); 1176 } 1177 } 1178 1179 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1180 { 1181 if (unlikely(hpsa_is_pending_event(c))) 1182 return finish_cmd(c); 1183 1184 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1185 } 1186 1187 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1188 { 1189 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1190 } 1191 1192 static inline int is_scsi_rev_5(struct ctlr_info *h) 1193 { 1194 if (!h->hba_inquiry_data) 1195 return 0; 1196 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1197 return 1; 1198 return 0; 1199 } 1200 1201 static int hpsa_find_target_lun(struct ctlr_info *h, 1202 unsigned char scsi3addr[], int bus, int *target, int *lun) 1203 { 1204 /* finds an unused bus, target, lun for a new physical device 1205 * assumes h->devlock is held 1206 */ 1207 int i, found = 0; 1208 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1209 1210 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1211 1212 for (i = 0; i < h->ndevices; i++) { 1213 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1214 __set_bit(h->dev[i]->target, lun_taken); 1215 } 1216 1217 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1218 if (i < HPSA_MAX_DEVICES) { 1219 /* *bus = 1; */ 1220 *target = i; 1221 *lun = 0; 1222 found = 1; 1223 } 1224 return !found; 1225 } 1226 1227 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1228 struct hpsa_scsi_dev_t *dev, char *description) 1229 { 1230 #define LABEL_SIZE 25 1231 char label[LABEL_SIZE]; 1232 1233 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1234 return; 1235 1236 switch (dev->devtype) { 1237 case TYPE_RAID: 1238 snprintf(label, LABEL_SIZE, "controller"); 1239 break; 1240 case TYPE_ENCLOSURE: 1241 snprintf(label, LABEL_SIZE, "enclosure"); 1242 break; 1243 case TYPE_DISK: 1244 case TYPE_ZBC: 1245 if (dev->external) 1246 snprintf(label, LABEL_SIZE, "external"); 1247 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1248 snprintf(label, LABEL_SIZE, "%s", 1249 raid_label[PHYSICAL_DRIVE]); 1250 else 1251 snprintf(label, LABEL_SIZE, "RAID-%s", 1252 dev->raid_level > RAID_UNKNOWN ? "?" : 1253 raid_label[dev->raid_level]); 1254 break; 1255 case TYPE_ROM: 1256 snprintf(label, LABEL_SIZE, "rom"); 1257 break; 1258 case TYPE_TAPE: 1259 snprintf(label, LABEL_SIZE, "tape"); 1260 break; 1261 case TYPE_MEDIUM_CHANGER: 1262 snprintf(label, LABEL_SIZE, "changer"); 1263 break; 1264 default: 1265 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1266 break; 1267 } 1268 1269 dev_printk(level, &h->pdev->dev, 1270 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1271 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1272 description, 1273 scsi_device_type(dev->devtype), 1274 dev->vendor, 1275 dev->model, 1276 label, 1277 dev->offload_config ? '+' : '-', 1278 dev->offload_to_be_enabled ? '+' : '-', 1279 dev->expose_device); 1280 } 1281 1282 /* Add an entry into h->dev[] array. */ 1283 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1284 struct hpsa_scsi_dev_t *device, 1285 struct hpsa_scsi_dev_t *added[], int *nadded) 1286 { 1287 /* assumes h->devlock is held */ 1288 int n = h->ndevices; 1289 int i; 1290 unsigned char addr1[8], addr2[8]; 1291 struct hpsa_scsi_dev_t *sd; 1292 1293 if (n >= HPSA_MAX_DEVICES) { 1294 dev_err(&h->pdev->dev, "too many devices, some will be " 1295 "inaccessible.\n"); 1296 return -1; 1297 } 1298 1299 /* physical devices do not have lun or target assigned until now. */ 1300 if (device->lun != -1) 1301 /* Logical device, lun is already assigned. */ 1302 goto lun_assigned; 1303 1304 /* If this device a non-zero lun of a multi-lun device 1305 * byte 4 of the 8-byte LUN addr will contain the logical 1306 * unit no, zero otherwise. 1307 */ 1308 if (device->scsi3addr[4] == 0) { 1309 /* This is not a non-zero lun of a multi-lun device */ 1310 if (hpsa_find_target_lun(h, device->scsi3addr, 1311 device->bus, &device->target, &device->lun) != 0) 1312 return -1; 1313 goto lun_assigned; 1314 } 1315 1316 /* This is a non-zero lun of a multi-lun device. 1317 * Search through our list and find the device which 1318 * has the same 8 byte LUN address, excepting byte 4 and 5. 1319 * Assign the same bus and target for this new LUN. 1320 * Use the logical unit number from the firmware. 1321 */ 1322 memcpy(addr1, device->scsi3addr, 8); 1323 addr1[4] = 0; 1324 addr1[5] = 0; 1325 for (i = 0; i < n; i++) { 1326 sd = h->dev[i]; 1327 memcpy(addr2, sd->scsi3addr, 8); 1328 addr2[4] = 0; 1329 addr2[5] = 0; 1330 /* differ only in byte 4 and 5? */ 1331 if (memcmp(addr1, addr2, 8) == 0) { 1332 device->bus = sd->bus; 1333 device->target = sd->target; 1334 device->lun = device->scsi3addr[4]; 1335 break; 1336 } 1337 } 1338 if (device->lun == -1) { 1339 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1340 " suspect firmware bug or unsupported hardware " 1341 "configuration.\n"); 1342 return -1; 1343 } 1344 1345 lun_assigned: 1346 1347 h->dev[n] = device; 1348 h->ndevices++; 1349 added[*nadded] = device; 1350 (*nadded)++; 1351 hpsa_show_dev_msg(KERN_INFO, h, device, 1352 device->expose_device ? "added" : "masked"); 1353 return 0; 1354 } 1355 1356 /* 1357 * Called during a scan operation. 1358 * 1359 * Update an entry in h->dev[] array. 1360 */ 1361 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1362 int entry, struct hpsa_scsi_dev_t *new_entry) 1363 { 1364 /* assumes h->devlock is held */ 1365 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1366 1367 /* Raid level changed. */ 1368 h->dev[entry]->raid_level = new_entry->raid_level; 1369 1370 /* 1371 * ioacccel_handle may have changed for a dual domain disk 1372 */ 1373 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1374 1375 /* Raid offload parameters changed. Careful about the ordering. */ 1376 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1377 /* 1378 * if drive is newly offload_enabled, we want to copy the 1379 * raid map data first. If previously offload_enabled and 1380 * offload_config were set, raid map data had better be 1381 * the same as it was before. If raid map data has changed 1382 * then it had better be the case that 1383 * h->dev[entry]->offload_enabled is currently 0. 1384 */ 1385 h->dev[entry]->raid_map = new_entry->raid_map; 1386 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1387 } 1388 if (new_entry->offload_to_be_enabled) { 1389 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1390 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1391 } 1392 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1393 h->dev[entry]->offload_config = new_entry->offload_config; 1394 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1395 h->dev[entry]->queue_depth = new_entry->queue_depth; 1396 1397 /* 1398 * We can turn off ioaccel offload now, but need to delay turning 1399 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1400 * can't do that until all the devices are updated. 1401 */ 1402 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1403 1404 /* 1405 * turn ioaccel off immediately if told to do so. 1406 */ 1407 if (!new_entry->offload_to_be_enabled) 1408 h->dev[entry]->offload_enabled = 0; 1409 1410 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1411 } 1412 1413 /* Replace an entry from h->dev[] array. */ 1414 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1415 int entry, struct hpsa_scsi_dev_t *new_entry, 1416 struct hpsa_scsi_dev_t *added[], int *nadded, 1417 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1418 { 1419 /* assumes h->devlock is held */ 1420 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1421 removed[*nremoved] = h->dev[entry]; 1422 (*nremoved)++; 1423 1424 /* 1425 * New physical devices won't have target/lun assigned yet 1426 * so we need to preserve the values in the slot we are replacing. 1427 */ 1428 if (new_entry->target == -1) { 1429 new_entry->target = h->dev[entry]->target; 1430 new_entry->lun = h->dev[entry]->lun; 1431 } 1432 1433 h->dev[entry] = new_entry; 1434 added[*nadded] = new_entry; 1435 (*nadded)++; 1436 1437 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1438 } 1439 1440 /* Remove an entry from h->dev[] array. */ 1441 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1442 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1443 { 1444 /* assumes h->devlock is held */ 1445 int i; 1446 struct hpsa_scsi_dev_t *sd; 1447 1448 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1449 1450 sd = h->dev[entry]; 1451 removed[*nremoved] = h->dev[entry]; 1452 (*nremoved)++; 1453 1454 for (i = entry; i < h->ndevices-1; i++) 1455 h->dev[i] = h->dev[i+1]; 1456 h->ndevices--; 1457 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1458 } 1459 1460 #define SCSI3ADDR_EQ(a, b) ( \ 1461 (a)[7] == (b)[7] && \ 1462 (a)[6] == (b)[6] && \ 1463 (a)[5] == (b)[5] && \ 1464 (a)[4] == (b)[4] && \ 1465 (a)[3] == (b)[3] && \ 1466 (a)[2] == (b)[2] && \ 1467 (a)[1] == (b)[1] && \ 1468 (a)[0] == (b)[0]) 1469 1470 static void fixup_botched_add(struct ctlr_info *h, 1471 struct hpsa_scsi_dev_t *added) 1472 { 1473 /* called when scsi_add_device fails in order to re-adjust 1474 * h->dev[] to match the mid layer's view. 1475 */ 1476 unsigned long flags; 1477 int i, j; 1478 1479 spin_lock_irqsave(&h->lock, flags); 1480 for (i = 0; i < h->ndevices; i++) { 1481 if (h->dev[i] == added) { 1482 for (j = i; j < h->ndevices-1; j++) 1483 h->dev[j] = h->dev[j+1]; 1484 h->ndevices--; 1485 break; 1486 } 1487 } 1488 spin_unlock_irqrestore(&h->lock, flags); 1489 kfree(added); 1490 } 1491 1492 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1493 struct hpsa_scsi_dev_t *dev2) 1494 { 1495 /* we compare everything except lun and target as these 1496 * are not yet assigned. Compare parts likely 1497 * to differ first 1498 */ 1499 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1500 sizeof(dev1->scsi3addr)) != 0) 1501 return 0; 1502 if (memcmp(dev1->device_id, dev2->device_id, 1503 sizeof(dev1->device_id)) != 0) 1504 return 0; 1505 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1506 return 0; 1507 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1508 return 0; 1509 if (dev1->devtype != dev2->devtype) 1510 return 0; 1511 if (dev1->bus != dev2->bus) 1512 return 0; 1513 return 1; 1514 } 1515 1516 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1517 struct hpsa_scsi_dev_t *dev2) 1518 { 1519 /* Device attributes that can change, but don't mean 1520 * that the device is a different device, nor that the OS 1521 * needs to be told anything about the change. 1522 */ 1523 if (dev1->raid_level != dev2->raid_level) 1524 return 1; 1525 if (dev1->offload_config != dev2->offload_config) 1526 return 1; 1527 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1528 return 1; 1529 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1530 if (dev1->queue_depth != dev2->queue_depth) 1531 return 1; 1532 /* 1533 * This can happen for dual domain devices. An active 1534 * path change causes the ioaccel handle to change 1535 * 1536 * for example note the handle differences between p0 and p1 1537 * Device WWN ,WWN hash,Handle 1538 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1539 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1540 */ 1541 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1542 return 1; 1543 return 0; 1544 } 1545 1546 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1547 * and return needle location in *index. If scsi3addr matches, but not 1548 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1549 * location in *index. 1550 * In the case of a minor device attribute change, such as RAID level, just 1551 * return DEVICE_UPDATED, along with the updated device's location in index. 1552 * If needle not found, return DEVICE_NOT_FOUND. 1553 */ 1554 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1555 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1556 int *index) 1557 { 1558 int i; 1559 #define DEVICE_NOT_FOUND 0 1560 #define DEVICE_CHANGED 1 1561 #define DEVICE_SAME 2 1562 #define DEVICE_UPDATED 3 1563 if (needle == NULL) 1564 return DEVICE_NOT_FOUND; 1565 1566 for (i = 0; i < haystack_size; i++) { 1567 if (haystack[i] == NULL) /* previously removed. */ 1568 continue; 1569 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1570 *index = i; 1571 if (device_is_the_same(needle, haystack[i])) { 1572 if (device_updated(needle, haystack[i])) 1573 return DEVICE_UPDATED; 1574 return DEVICE_SAME; 1575 } else { 1576 /* Keep offline devices offline */ 1577 if (needle->volume_offline) 1578 return DEVICE_NOT_FOUND; 1579 return DEVICE_CHANGED; 1580 } 1581 } 1582 } 1583 *index = -1; 1584 return DEVICE_NOT_FOUND; 1585 } 1586 1587 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1588 unsigned char scsi3addr[]) 1589 { 1590 struct offline_device_entry *device; 1591 unsigned long flags; 1592 1593 /* Check to see if device is already on the list */ 1594 spin_lock_irqsave(&h->offline_device_lock, flags); 1595 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1596 if (memcmp(device->scsi3addr, scsi3addr, 1597 sizeof(device->scsi3addr)) == 0) { 1598 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1599 return; 1600 } 1601 } 1602 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1603 1604 /* Device is not on the list, add it. */ 1605 device = kmalloc(sizeof(*device), GFP_KERNEL); 1606 if (!device) 1607 return; 1608 1609 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1610 spin_lock_irqsave(&h->offline_device_lock, flags); 1611 list_add_tail(&device->offline_list, &h->offline_device_list); 1612 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1613 } 1614 1615 /* Print a message explaining various offline volume states */ 1616 static void hpsa_show_volume_status(struct ctlr_info *h, 1617 struct hpsa_scsi_dev_t *sd) 1618 { 1619 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1620 dev_info(&h->pdev->dev, 1621 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1622 h->scsi_host->host_no, 1623 sd->bus, sd->target, sd->lun); 1624 switch (sd->volume_offline) { 1625 case HPSA_LV_OK: 1626 break; 1627 case HPSA_LV_UNDERGOING_ERASE: 1628 dev_info(&h->pdev->dev, 1629 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1630 h->scsi_host->host_no, 1631 sd->bus, sd->target, sd->lun); 1632 break; 1633 case HPSA_LV_NOT_AVAILABLE: 1634 dev_info(&h->pdev->dev, 1635 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1636 h->scsi_host->host_no, 1637 sd->bus, sd->target, sd->lun); 1638 break; 1639 case HPSA_LV_UNDERGOING_RPI: 1640 dev_info(&h->pdev->dev, 1641 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1642 h->scsi_host->host_no, 1643 sd->bus, sd->target, sd->lun); 1644 break; 1645 case HPSA_LV_PENDING_RPI: 1646 dev_info(&h->pdev->dev, 1647 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1648 h->scsi_host->host_no, 1649 sd->bus, sd->target, sd->lun); 1650 break; 1651 case HPSA_LV_ENCRYPTED_NO_KEY: 1652 dev_info(&h->pdev->dev, 1653 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1654 h->scsi_host->host_no, 1655 sd->bus, sd->target, sd->lun); 1656 break; 1657 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1658 dev_info(&h->pdev->dev, 1659 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1660 h->scsi_host->host_no, 1661 sd->bus, sd->target, sd->lun); 1662 break; 1663 case HPSA_LV_UNDERGOING_ENCRYPTION: 1664 dev_info(&h->pdev->dev, 1665 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1666 h->scsi_host->host_no, 1667 sd->bus, sd->target, sd->lun); 1668 break; 1669 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1670 dev_info(&h->pdev->dev, 1671 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1672 h->scsi_host->host_no, 1673 sd->bus, sd->target, sd->lun); 1674 break; 1675 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1676 dev_info(&h->pdev->dev, 1677 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1678 h->scsi_host->host_no, 1679 sd->bus, sd->target, sd->lun); 1680 break; 1681 case HPSA_LV_PENDING_ENCRYPTION: 1682 dev_info(&h->pdev->dev, 1683 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1684 h->scsi_host->host_no, 1685 sd->bus, sd->target, sd->lun); 1686 break; 1687 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1688 dev_info(&h->pdev->dev, 1689 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1690 h->scsi_host->host_no, 1691 sd->bus, sd->target, sd->lun); 1692 break; 1693 } 1694 } 1695 1696 /* 1697 * Figure the list of physical drive pointers for a logical drive with 1698 * raid offload configured. 1699 */ 1700 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1701 struct hpsa_scsi_dev_t *dev[], int ndevices, 1702 struct hpsa_scsi_dev_t *logical_drive) 1703 { 1704 struct raid_map_data *map = &logical_drive->raid_map; 1705 struct raid_map_disk_data *dd = &map->data[0]; 1706 int i, j; 1707 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1708 le16_to_cpu(map->metadata_disks_per_row); 1709 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1710 le16_to_cpu(map->layout_map_count) * 1711 total_disks_per_row; 1712 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1713 total_disks_per_row; 1714 int qdepth; 1715 1716 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1717 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1718 1719 logical_drive->nphysical_disks = nraid_map_entries; 1720 1721 qdepth = 0; 1722 for (i = 0; i < nraid_map_entries; i++) { 1723 logical_drive->phys_disk[i] = NULL; 1724 if (!logical_drive->offload_config) 1725 continue; 1726 for (j = 0; j < ndevices; j++) { 1727 if (dev[j] == NULL) 1728 continue; 1729 if (dev[j]->devtype != TYPE_DISK && 1730 dev[j]->devtype != TYPE_ZBC) 1731 continue; 1732 if (is_logical_device(dev[j])) 1733 continue; 1734 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1735 continue; 1736 1737 logical_drive->phys_disk[i] = dev[j]; 1738 if (i < nphys_disk) 1739 qdepth = min(h->nr_cmds, qdepth + 1740 logical_drive->phys_disk[i]->queue_depth); 1741 break; 1742 } 1743 1744 /* 1745 * This can happen if a physical drive is removed and 1746 * the logical drive is degraded. In that case, the RAID 1747 * map data will refer to a physical disk which isn't actually 1748 * present. And in that case offload_enabled should already 1749 * be 0, but we'll turn it off here just in case 1750 */ 1751 if (!logical_drive->phys_disk[i]) { 1752 dev_warn(&h->pdev->dev, 1753 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1754 __func__, 1755 h->scsi_host->host_no, logical_drive->bus, 1756 logical_drive->target, logical_drive->lun); 1757 logical_drive->offload_enabled = 0; 1758 logical_drive->offload_to_be_enabled = 0; 1759 logical_drive->queue_depth = 8; 1760 } 1761 } 1762 if (nraid_map_entries) 1763 /* 1764 * This is correct for reads, too high for full stripe writes, 1765 * way too high for partial stripe writes 1766 */ 1767 logical_drive->queue_depth = qdepth; 1768 else { 1769 if (logical_drive->external) 1770 logical_drive->queue_depth = EXTERNAL_QD; 1771 else 1772 logical_drive->queue_depth = h->nr_cmds; 1773 } 1774 } 1775 1776 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1777 struct hpsa_scsi_dev_t *dev[], int ndevices) 1778 { 1779 int i; 1780 1781 for (i = 0; i < ndevices; i++) { 1782 if (dev[i] == NULL) 1783 continue; 1784 if (dev[i]->devtype != TYPE_DISK && 1785 dev[i]->devtype != TYPE_ZBC) 1786 continue; 1787 if (!is_logical_device(dev[i])) 1788 continue; 1789 1790 /* 1791 * If offload is currently enabled, the RAID map and 1792 * phys_disk[] assignment *better* not be changing 1793 * because we would be changing ioaccel phsy_disk[] pointers 1794 * on a ioaccel volume processing I/O requests. 1795 * 1796 * If an ioaccel volume status changed, initially because it was 1797 * re-configured and thus underwent a transformation, or 1798 * a drive failed, we would have received a state change 1799 * request and ioaccel should have been turned off. When the 1800 * transformation completes, we get another state change 1801 * request to turn ioaccel back on. In this case, we need 1802 * to update the ioaccel information. 1803 * 1804 * Thus: If it is not currently enabled, but will be after 1805 * the scan completes, make sure the ioaccel pointers 1806 * are up to date. 1807 */ 1808 1809 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1810 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1811 } 1812 } 1813 1814 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1815 { 1816 int rc = 0; 1817 1818 if (!h->scsi_host) 1819 return 1; 1820 1821 if (is_logical_device(device)) /* RAID */ 1822 rc = scsi_add_device(h->scsi_host, device->bus, 1823 device->target, device->lun); 1824 else /* HBA */ 1825 rc = hpsa_add_sas_device(h->sas_host, device); 1826 1827 return rc; 1828 } 1829 1830 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1831 struct hpsa_scsi_dev_t *dev) 1832 { 1833 int i; 1834 int count = 0; 1835 1836 for (i = 0; i < h->nr_cmds; i++) { 1837 struct CommandList *c = h->cmd_pool + i; 1838 int refcount = atomic_inc_return(&c->refcount); 1839 1840 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1841 dev->scsi3addr)) { 1842 unsigned long flags; 1843 1844 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1845 if (!hpsa_is_cmd_idle(c)) 1846 ++count; 1847 spin_unlock_irqrestore(&h->lock, flags); 1848 } 1849 1850 cmd_free(h, c); 1851 } 1852 1853 return count; 1854 } 1855 1856 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1857 struct hpsa_scsi_dev_t *device) 1858 { 1859 int cmds = 0; 1860 int waits = 0; 1861 1862 while (1) { 1863 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1864 if (cmds == 0) 1865 break; 1866 if (++waits > 20) 1867 break; 1868 msleep(1000); 1869 } 1870 1871 if (waits > 20) 1872 dev_warn(&h->pdev->dev, 1873 "%s: removing device with %d outstanding commands!\n", 1874 __func__, cmds); 1875 } 1876 1877 static void hpsa_remove_device(struct ctlr_info *h, 1878 struct hpsa_scsi_dev_t *device) 1879 { 1880 struct scsi_device *sdev = NULL; 1881 1882 if (!h->scsi_host) 1883 return; 1884 1885 /* 1886 * Allow for commands to drain 1887 */ 1888 device->removed = 1; 1889 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1890 1891 if (is_logical_device(device)) { /* RAID */ 1892 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1893 device->target, device->lun); 1894 if (sdev) { 1895 scsi_remove_device(sdev); 1896 scsi_device_put(sdev); 1897 } else { 1898 /* 1899 * We don't expect to get here. Future commands 1900 * to this device will get a selection timeout as 1901 * if the device were gone. 1902 */ 1903 hpsa_show_dev_msg(KERN_WARNING, h, device, 1904 "didn't find device for removal."); 1905 } 1906 } else { /* HBA */ 1907 1908 hpsa_remove_sas_device(device); 1909 } 1910 } 1911 1912 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1913 struct hpsa_scsi_dev_t *sd[], int nsds) 1914 { 1915 /* sd contains scsi3 addresses and devtypes, and inquiry 1916 * data. This function takes what's in sd to be the current 1917 * reality and updates h->dev[] to reflect that reality. 1918 */ 1919 int i, entry, device_change, changes = 0; 1920 struct hpsa_scsi_dev_t *csd; 1921 unsigned long flags; 1922 struct hpsa_scsi_dev_t **added, **removed; 1923 int nadded, nremoved; 1924 1925 /* 1926 * A reset can cause a device status to change 1927 * re-schedule the scan to see what happened. 1928 */ 1929 spin_lock_irqsave(&h->reset_lock, flags); 1930 if (h->reset_in_progress) { 1931 h->drv_req_rescan = 1; 1932 spin_unlock_irqrestore(&h->reset_lock, flags); 1933 return; 1934 } 1935 spin_unlock_irqrestore(&h->reset_lock, flags); 1936 1937 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1938 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1939 1940 if (!added || !removed) { 1941 dev_warn(&h->pdev->dev, "out of memory in " 1942 "adjust_hpsa_scsi_table\n"); 1943 goto free_and_out; 1944 } 1945 1946 spin_lock_irqsave(&h->devlock, flags); 1947 1948 /* find any devices in h->dev[] that are not in 1949 * sd[] and remove them from h->dev[], and for any 1950 * devices which have changed, remove the old device 1951 * info and add the new device info. 1952 * If minor device attributes change, just update 1953 * the existing device structure. 1954 */ 1955 i = 0; 1956 nremoved = 0; 1957 nadded = 0; 1958 while (i < h->ndevices) { 1959 csd = h->dev[i]; 1960 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1961 if (device_change == DEVICE_NOT_FOUND) { 1962 changes++; 1963 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1964 continue; /* remove ^^^, hence i not incremented */ 1965 } else if (device_change == DEVICE_CHANGED) { 1966 changes++; 1967 hpsa_scsi_replace_entry(h, i, sd[entry], 1968 added, &nadded, removed, &nremoved); 1969 /* Set it to NULL to prevent it from being freed 1970 * at the bottom of hpsa_update_scsi_devices() 1971 */ 1972 sd[entry] = NULL; 1973 } else if (device_change == DEVICE_UPDATED) { 1974 hpsa_scsi_update_entry(h, i, sd[entry]); 1975 } 1976 i++; 1977 } 1978 1979 /* Now, make sure every device listed in sd[] is also 1980 * listed in h->dev[], adding them if they aren't found 1981 */ 1982 1983 for (i = 0; i < nsds; i++) { 1984 if (!sd[i]) /* if already added above. */ 1985 continue; 1986 1987 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1988 * as the SCSI mid-layer does not handle such devices well. 1989 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1990 * at 160Hz, and prevents the system from coming up. 1991 */ 1992 if (sd[i]->volume_offline) { 1993 hpsa_show_volume_status(h, sd[i]); 1994 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1995 continue; 1996 } 1997 1998 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1999 h->ndevices, &entry); 2000 if (device_change == DEVICE_NOT_FOUND) { 2001 changes++; 2002 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2003 break; 2004 sd[i] = NULL; /* prevent from being freed later. */ 2005 } else if (device_change == DEVICE_CHANGED) { 2006 /* should never happen... */ 2007 changes++; 2008 dev_warn(&h->pdev->dev, 2009 "device unexpectedly changed.\n"); 2010 /* but if it does happen, we just ignore that device */ 2011 } 2012 } 2013 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2014 2015 /* 2016 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2017 * any logical drives that need it enabled. 2018 * 2019 * The raid map should be current by now. 2020 * 2021 * We are updating the device list used for I/O requests. 2022 */ 2023 for (i = 0; i < h->ndevices; i++) { 2024 if (h->dev[i] == NULL) 2025 continue; 2026 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2027 } 2028 2029 spin_unlock_irqrestore(&h->devlock, flags); 2030 2031 /* Monitor devices which are in one of several NOT READY states to be 2032 * brought online later. This must be done without holding h->devlock, 2033 * so don't touch h->dev[] 2034 */ 2035 for (i = 0; i < nsds; i++) { 2036 if (!sd[i]) /* if already added above. */ 2037 continue; 2038 if (sd[i]->volume_offline) 2039 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2040 } 2041 2042 /* Don't notify scsi mid layer of any changes the first time through 2043 * (or if there are no changes) scsi_scan_host will do it later the 2044 * first time through. 2045 */ 2046 if (!changes) 2047 goto free_and_out; 2048 2049 /* Notify scsi mid layer of any removed devices */ 2050 for (i = 0; i < nremoved; i++) { 2051 if (removed[i] == NULL) 2052 continue; 2053 if (removed[i]->expose_device) 2054 hpsa_remove_device(h, removed[i]); 2055 kfree(removed[i]); 2056 removed[i] = NULL; 2057 } 2058 2059 /* Notify scsi mid layer of any added devices */ 2060 for (i = 0; i < nadded; i++) { 2061 int rc = 0; 2062 2063 if (added[i] == NULL) 2064 continue; 2065 if (!(added[i]->expose_device)) 2066 continue; 2067 rc = hpsa_add_device(h, added[i]); 2068 if (!rc) 2069 continue; 2070 dev_warn(&h->pdev->dev, 2071 "addition failed %d, device not added.", rc); 2072 /* now we have to remove it from h->dev, 2073 * since it didn't get added to scsi mid layer 2074 */ 2075 fixup_botched_add(h, added[i]); 2076 h->drv_req_rescan = 1; 2077 } 2078 2079 free_and_out: 2080 kfree(added); 2081 kfree(removed); 2082 } 2083 2084 /* 2085 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2086 * Assume's h->devlock is held. 2087 */ 2088 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2089 int bus, int target, int lun) 2090 { 2091 int i; 2092 struct hpsa_scsi_dev_t *sd; 2093 2094 for (i = 0; i < h->ndevices; i++) { 2095 sd = h->dev[i]; 2096 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2097 return sd; 2098 } 2099 return NULL; 2100 } 2101 2102 static int hpsa_slave_alloc(struct scsi_device *sdev) 2103 { 2104 struct hpsa_scsi_dev_t *sd = NULL; 2105 unsigned long flags; 2106 struct ctlr_info *h; 2107 2108 h = sdev_to_hba(sdev); 2109 spin_lock_irqsave(&h->devlock, flags); 2110 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2111 struct scsi_target *starget; 2112 struct sas_rphy *rphy; 2113 2114 starget = scsi_target(sdev); 2115 rphy = target_to_rphy(starget); 2116 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2117 if (sd) { 2118 sd->target = sdev_id(sdev); 2119 sd->lun = sdev->lun; 2120 } 2121 } 2122 if (!sd) 2123 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2124 sdev_id(sdev), sdev->lun); 2125 2126 if (sd && sd->expose_device) { 2127 atomic_set(&sd->ioaccel_cmds_out, 0); 2128 sdev->hostdata = sd; 2129 } else 2130 sdev->hostdata = NULL; 2131 spin_unlock_irqrestore(&h->devlock, flags); 2132 return 0; 2133 } 2134 2135 /* configure scsi device based on internal per-device structure */ 2136 static int hpsa_slave_configure(struct scsi_device *sdev) 2137 { 2138 struct hpsa_scsi_dev_t *sd; 2139 int queue_depth; 2140 2141 sd = sdev->hostdata; 2142 sdev->no_uld_attach = !sd || !sd->expose_device; 2143 2144 if (sd) { 2145 if (sd->external) 2146 queue_depth = EXTERNAL_QD; 2147 else 2148 queue_depth = sd->queue_depth != 0 ? 2149 sd->queue_depth : sdev->host->can_queue; 2150 } else 2151 queue_depth = sdev->host->can_queue; 2152 2153 scsi_change_queue_depth(sdev, queue_depth); 2154 2155 return 0; 2156 } 2157 2158 static void hpsa_slave_destroy(struct scsi_device *sdev) 2159 { 2160 /* nothing to do. */ 2161 } 2162 2163 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2164 { 2165 int i; 2166 2167 if (!h->ioaccel2_cmd_sg_list) 2168 return; 2169 for (i = 0; i < h->nr_cmds; i++) { 2170 kfree(h->ioaccel2_cmd_sg_list[i]); 2171 h->ioaccel2_cmd_sg_list[i] = NULL; 2172 } 2173 kfree(h->ioaccel2_cmd_sg_list); 2174 h->ioaccel2_cmd_sg_list = NULL; 2175 } 2176 2177 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2178 { 2179 int i; 2180 2181 if (h->chainsize <= 0) 2182 return 0; 2183 2184 h->ioaccel2_cmd_sg_list = 2185 kzalloc(sizeof(*h->ioaccel2_cmd_sg_list) * h->nr_cmds, 2186 GFP_KERNEL); 2187 if (!h->ioaccel2_cmd_sg_list) 2188 return -ENOMEM; 2189 for (i = 0; i < h->nr_cmds; i++) { 2190 h->ioaccel2_cmd_sg_list[i] = 2191 kmalloc(sizeof(*h->ioaccel2_cmd_sg_list[i]) * 2192 h->maxsgentries, GFP_KERNEL); 2193 if (!h->ioaccel2_cmd_sg_list[i]) 2194 goto clean; 2195 } 2196 return 0; 2197 2198 clean: 2199 hpsa_free_ioaccel2_sg_chain_blocks(h); 2200 return -ENOMEM; 2201 } 2202 2203 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2204 { 2205 int i; 2206 2207 if (!h->cmd_sg_list) 2208 return; 2209 for (i = 0; i < h->nr_cmds; i++) { 2210 kfree(h->cmd_sg_list[i]); 2211 h->cmd_sg_list[i] = NULL; 2212 } 2213 kfree(h->cmd_sg_list); 2214 h->cmd_sg_list = NULL; 2215 } 2216 2217 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2218 { 2219 int i; 2220 2221 if (h->chainsize <= 0) 2222 return 0; 2223 2224 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 2225 GFP_KERNEL); 2226 if (!h->cmd_sg_list) 2227 return -ENOMEM; 2228 2229 for (i = 0; i < h->nr_cmds; i++) { 2230 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 2231 h->chainsize, GFP_KERNEL); 2232 if (!h->cmd_sg_list[i]) 2233 goto clean; 2234 2235 } 2236 return 0; 2237 2238 clean: 2239 hpsa_free_sg_chain_blocks(h); 2240 return -ENOMEM; 2241 } 2242 2243 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2244 struct io_accel2_cmd *cp, struct CommandList *c) 2245 { 2246 struct ioaccel2_sg_element *chain_block; 2247 u64 temp64; 2248 u32 chain_size; 2249 2250 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2251 chain_size = le32_to_cpu(cp->sg[0].length); 2252 temp64 = pci_map_single(h->pdev, chain_block, chain_size, 2253 PCI_DMA_TODEVICE); 2254 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2255 /* prevent subsequent unmapping */ 2256 cp->sg->address = 0; 2257 return -1; 2258 } 2259 cp->sg->address = cpu_to_le64(temp64); 2260 return 0; 2261 } 2262 2263 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2264 struct io_accel2_cmd *cp) 2265 { 2266 struct ioaccel2_sg_element *chain_sg; 2267 u64 temp64; 2268 u32 chain_size; 2269 2270 chain_sg = cp->sg; 2271 temp64 = le64_to_cpu(chain_sg->address); 2272 chain_size = le32_to_cpu(cp->sg[0].length); 2273 pci_unmap_single(h->pdev, temp64, chain_size, PCI_DMA_TODEVICE); 2274 } 2275 2276 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2277 struct CommandList *c) 2278 { 2279 struct SGDescriptor *chain_sg, *chain_block; 2280 u64 temp64; 2281 u32 chain_len; 2282 2283 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2284 chain_block = h->cmd_sg_list[c->cmdindex]; 2285 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2286 chain_len = sizeof(*chain_sg) * 2287 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2288 chain_sg->Len = cpu_to_le32(chain_len); 2289 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 2290 PCI_DMA_TODEVICE); 2291 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2292 /* prevent subsequent unmapping */ 2293 chain_sg->Addr = cpu_to_le64(0); 2294 return -1; 2295 } 2296 chain_sg->Addr = cpu_to_le64(temp64); 2297 return 0; 2298 } 2299 2300 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2301 struct CommandList *c) 2302 { 2303 struct SGDescriptor *chain_sg; 2304 2305 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2306 return; 2307 2308 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2309 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 2310 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 2311 } 2312 2313 2314 /* Decode the various types of errors on ioaccel2 path. 2315 * Return 1 for any error that should generate a RAID path retry. 2316 * Return 0 for errors that don't require a RAID path retry. 2317 */ 2318 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2319 struct CommandList *c, 2320 struct scsi_cmnd *cmd, 2321 struct io_accel2_cmd *c2, 2322 struct hpsa_scsi_dev_t *dev) 2323 { 2324 int data_len; 2325 int retry = 0; 2326 u32 ioaccel2_resid = 0; 2327 2328 switch (c2->error_data.serv_response) { 2329 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2330 switch (c2->error_data.status) { 2331 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2332 break; 2333 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2334 cmd->result |= SAM_STAT_CHECK_CONDITION; 2335 if (c2->error_data.data_present != 2336 IOACCEL2_SENSE_DATA_PRESENT) { 2337 memset(cmd->sense_buffer, 0, 2338 SCSI_SENSE_BUFFERSIZE); 2339 break; 2340 } 2341 /* copy the sense data */ 2342 data_len = c2->error_data.sense_data_len; 2343 if (data_len > SCSI_SENSE_BUFFERSIZE) 2344 data_len = SCSI_SENSE_BUFFERSIZE; 2345 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2346 data_len = 2347 sizeof(c2->error_data.sense_data_buff); 2348 memcpy(cmd->sense_buffer, 2349 c2->error_data.sense_data_buff, data_len); 2350 retry = 1; 2351 break; 2352 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2353 retry = 1; 2354 break; 2355 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2356 retry = 1; 2357 break; 2358 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2359 retry = 1; 2360 break; 2361 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2362 retry = 1; 2363 break; 2364 default: 2365 retry = 1; 2366 break; 2367 } 2368 break; 2369 case IOACCEL2_SERV_RESPONSE_FAILURE: 2370 switch (c2->error_data.status) { 2371 case IOACCEL2_STATUS_SR_IO_ERROR: 2372 case IOACCEL2_STATUS_SR_IO_ABORTED: 2373 case IOACCEL2_STATUS_SR_OVERRUN: 2374 retry = 1; 2375 break; 2376 case IOACCEL2_STATUS_SR_UNDERRUN: 2377 cmd->result = (DID_OK << 16); /* host byte */ 2378 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2379 ioaccel2_resid = get_unaligned_le32( 2380 &c2->error_data.resid_cnt[0]); 2381 scsi_set_resid(cmd, ioaccel2_resid); 2382 break; 2383 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2384 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2385 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2386 /* 2387 * Did an HBA disk disappear? We will eventually 2388 * get a state change event from the controller but 2389 * in the meantime, we need to tell the OS that the 2390 * HBA disk is no longer there and stop I/O 2391 * from going down. This allows the potential re-insert 2392 * of the disk to get the same device node. 2393 */ 2394 if (dev->physical_device && dev->expose_device) { 2395 cmd->result = DID_NO_CONNECT << 16; 2396 dev->removed = 1; 2397 h->drv_req_rescan = 1; 2398 dev_warn(&h->pdev->dev, 2399 "%s: device is gone!\n", __func__); 2400 } else 2401 /* 2402 * Retry by sending down the RAID path. 2403 * We will get an event from ctlr to 2404 * trigger rescan regardless. 2405 */ 2406 retry = 1; 2407 break; 2408 default: 2409 retry = 1; 2410 } 2411 break; 2412 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2413 break; 2414 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2415 break; 2416 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2417 retry = 1; 2418 break; 2419 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2420 break; 2421 default: 2422 retry = 1; 2423 break; 2424 } 2425 2426 return retry; /* retry on raid path? */ 2427 } 2428 2429 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2430 struct CommandList *c) 2431 { 2432 bool do_wake = false; 2433 2434 /* 2435 * Reset c->scsi_cmd here so that the reset handler will know 2436 * this command has completed. Then, check to see if the handler is 2437 * waiting for this command, and, if so, wake it. 2438 */ 2439 c->scsi_cmd = SCSI_CMD_IDLE; 2440 mb(); /* Declare command idle before checking for pending events. */ 2441 if (c->reset_pending) { 2442 unsigned long flags; 2443 struct hpsa_scsi_dev_t *dev; 2444 2445 /* 2446 * There appears to be a reset pending; lock the lock and 2447 * reconfirm. If so, then decrement the count of outstanding 2448 * commands and wake the reset command if this is the last one. 2449 */ 2450 spin_lock_irqsave(&h->lock, flags); 2451 dev = c->reset_pending; /* Re-fetch under the lock. */ 2452 if (dev && atomic_dec_and_test(&dev->reset_cmds_out)) 2453 do_wake = true; 2454 c->reset_pending = NULL; 2455 spin_unlock_irqrestore(&h->lock, flags); 2456 } 2457 2458 if (do_wake) 2459 wake_up_all(&h->event_sync_wait_queue); 2460 } 2461 2462 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2463 struct CommandList *c) 2464 { 2465 hpsa_cmd_resolve_events(h, c); 2466 cmd_tagged_free(h, c); 2467 } 2468 2469 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2470 struct CommandList *c, struct scsi_cmnd *cmd) 2471 { 2472 hpsa_cmd_resolve_and_free(h, c); 2473 if (cmd && cmd->scsi_done) 2474 cmd->scsi_done(cmd); 2475 } 2476 2477 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2478 { 2479 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2480 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2481 } 2482 2483 static void process_ioaccel2_completion(struct ctlr_info *h, 2484 struct CommandList *c, struct scsi_cmnd *cmd, 2485 struct hpsa_scsi_dev_t *dev) 2486 { 2487 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2488 2489 /* check for good status */ 2490 if (likely(c2->error_data.serv_response == 0 && 2491 c2->error_data.status == 0)) 2492 return hpsa_cmd_free_and_done(h, c, cmd); 2493 2494 /* 2495 * Any RAID offload error results in retry which will use 2496 * the normal I/O path so the controller can handle whatever is 2497 * wrong. 2498 */ 2499 if (is_logical_device(dev) && 2500 c2->error_data.serv_response == 2501 IOACCEL2_SERV_RESPONSE_FAILURE) { 2502 if (c2->error_data.status == 2503 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2504 dev->offload_enabled = 0; 2505 dev->offload_to_be_enabled = 0; 2506 } 2507 2508 return hpsa_retry_cmd(h, c); 2509 } 2510 2511 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2512 return hpsa_retry_cmd(h, c); 2513 2514 return hpsa_cmd_free_and_done(h, c, cmd); 2515 } 2516 2517 /* Returns 0 on success, < 0 otherwise. */ 2518 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2519 struct CommandList *cp) 2520 { 2521 u8 tmf_status = cp->err_info->ScsiStatus; 2522 2523 switch (tmf_status) { 2524 case CISS_TMF_COMPLETE: 2525 /* 2526 * CISS_TMF_COMPLETE never happens, instead, 2527 * ei->CommandStatus == 0 for this case. 2528 */ 2529 case CISS_TMF_SUCCESS: 2530 return 0; 2531 case CISS_TMF_INVALID_FRAME: 2532 case CISS_TMF_NOT_SUPPORTED: 2533 case CISS_TMF_FAILED: 2534 case CISS_TMF_WRONG_LUN: 2535 case CISS_TMF_OVERLAPPED_TAG: 2536 break; 2537 default: 2538 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2539 tmf_status); 2540 break; 2541 } 2542 return -tmf_status; 2543 } 2544 2545 static void complete_scsi_command(struct CommandList *cp) 2546 { 2547 struct scsi_cmnd *cmd; 2548 struct ctlr_info *h; 2549 struct ErrorInfo *ei; 2550 struct hpsa_scsi_dev_t *dev; 2551 struct io_accel2_cmd *c2; 2552 2553 u8 sense_key; 2554 u8 asc; /* additional sense code */ 2555 u8 ascq; /* additional sense code qualifier */ 2556 unsigned long sense_data_size; 2557 2558 ei = cp->err_info; 2559 cmd = cp->scsi_cmd; 2560 h = cp->h; 2561 2562 if (!cmd->device) { 2563 cmd->result = DID_NO_CONNECT << 16; 2564 return hpsa_cmd_free_and_done(h, cp, cmd); 2565 } 2566 2567 dev = cmd->device->hostdata; 2568 if (!dev) { 2569 cmd->result = DID_NO_CONNECT << 16; 2570 return hpsa_cmd_free_and_done(h, cp, cmd); 2571 } 2572 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2573 2574 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2575 if ((cp->cmd_type == CMD_SCSI) && 2576 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2577 hpsa_unmap_sg_chain_block(h, cp); 2578 2579 if ((cp->cmd_type == CMD_IOACCEL2) && 2580 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2581 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2582 2583 cmd->result = (DID_OK << 16); /* host byte */ 2584 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2585 2586 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2587 if (dev->physical_device && dev->expose_device && 2588 dev->removed) { 2589 cmd->result = DID_NO_CONNECT << 16; 2590 return hpsa_cmd_free_and_done(h, cp, cmd); 2591 } 2592 if (likely(cp->phys_disk != NULL)) 2593 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2594 } 2595 2596 /* 2597 * We check for lockup status here as it may be set for 2598 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2599 * fail_all_oustanding_cmds() 2600 */ 2601 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2602 /* DID_NO_CONNECT will prevent a retry */ 2603 cmd->result = DID_NO_CONNECT << 16; 2604 return hpsa_cmd_free_and_done(h, cp, cmd); 2605 } 2606 2607 if ((unlikely(hpsa_is_pending_event(cp)))) 2608 if (cp->reset_pending) 2609 return hpsa_cmd_free_and_done(h, cp, cmd); 2610 2611 if (cp->cmd_type == CMD_IOACCEL2) 2612 return process_ioaccel2_completion(h, cp, cmd, dev); 2613 2614 scsi_set_resid(cmd, ei->ResidualCnt); 2615 if (ei->CommandStatus == 0) 2616 return hpsa_cmd_free_and_done(h, cp, cmd); 2617 2618 /* For I/O accelerator commands, copy over some fields to the normal 2619 * CISS header used below for error handling. 2620 */ 2621 if (cp->cmd_type == CMD_IOACCEL1) { 2622 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2623 cp->Header.SGList = scsi_sg_count(cmd); 2624 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2625 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2626 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2627 cp->Header.tag = c->tag; 2628 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2629 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2630 2631 /* Any RAID offload error results in retry which will use 2632 * the normal I/O path so the controller can handle whatever's 2633 * wrong. 2634 */ 2635 if (is_logical_device(dev)) { 2636 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2637 dev->offload_enabled = 0; 2638 return hpsa_retry_cmd(h, cp); 2639 } 2640 } 2641 2642 /* an error has occurred */ 2643 switch (ei->CommandStatus) { 2644 2645 case CMD_TARGET_STATUS: 2646 cmd->result |= ei->ScsiStatus; 2647 /* copy the sense data */ 2648 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2649 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2650 else 2651 sense_data_size = sizeof(ei->SenseInfo); 2652 if (ei->SenseLen < sense_data_size) 2653 sense_data_size = ei->SenseLen; 2654 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2655 if (ei->ScsiStatus) 2656 decode_sense_data(ei->SenseInfo, sense_data_size, 2657 &sense_key, &asc, &ascq); 2658 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2659 if (sense_key == ABORTED_COMMAND) { 2660 cmd->result |= DID_SOFT_ERROR << 16; 2661 break; 2662 } 2663 break; 2664 } 2665 /* Problem was not a check condition 2666 * Pass it up to the upper layers... 2667 */ 2668 if (ei->ScsiStatus) { 2669 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2670 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2671 "Returning result: 0x%x\n", 2672 cp, ei->ScsiStatus, 2673 sense_key, asc, ascq, 2674 cmd->result); 2675 } else { /* scsi status is zero??? How??? */ 2676 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2677 "Returning no connection.\n", cp), 2678 2679 /* Ordinarily, this case should never happen, 2680 * but there is a bug in some released firmware 2681 * revisions that allows it to happen if, for 2682 * example, a 4100 backplane loses power and 2683 * the tape drive is in it. We assume that 2684 * it's a fatal error of some kind because we 2685 * can't show that it wasn't. We will make it 2686 * look like selection timeout since that is 2687 * the most common reason for this to occur, 2688 * and it's severe enough. 2689 */ 2690 2691 cmd->result = DID_NO_CONNECT << 16; 2692 } 2693 break; 2694 2695 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2696 break; 2697 case CMD_DATA_OVERRUN: 2698 dev_warn(&h->pdev->dev, 2699 "CDB %16phN data overrun\n", cp->Request.CDB); 2700 break; 2701 case CMD_INVALID: { 2702 /* print_bytes(cp, sizeof(*cp), 1, 0); 2703 print_cmd(cp); */ 2704 /* We get CMD_INVALID if you address a non-existent device 2705 * instead of a selection timeout (no response). You will 2706 * see this if you yank out a drive, then try to access it. 2707 * This is kind of a shame because it means that any other 2708 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2709 * missing target. */ 2710 cmd->result = DID_NO_CONNECT << 16; 2711 } 2712 break; 2713 case CMD_PROTOCOL_ERR: 2714 cmd->result = DID_ERROR << 16; 2715 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2716 cp->Request.CDB); 2717 break; 2718 case CMD_HARDWARE_ERR: 2719 cmd->result = DID_ERROR << 16; 2720 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2721 cp->Request.CDB); 2722 break; 2723 case CMD_CONNECTION_LOST: 2724 cmd->result = DID_ERROR << 16; 2725 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2726 cp->Request.CDB); 2727 break; 2728 case CMD_ABORTED: 2729 cmd->result = DID_ABORT << 16; 2730 break; 2731 case CMD_ABORT_FAILED: 2732 cmd->result = DID_ERROR << 16; 2733 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2734 cp->Request.CDB); 2735 break; 2736 case CMD_UNSOLICITED_ABORT: 2737 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2738 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2739 cp->Request.CDB); 2740 break; 2741 case CMD_TIMEOUT: 2742 cmd->result = DID_TIME_OUT << 16; 2743 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2744 cp->Request.CDB); 2745 break; 2746 case CMD_UNABORTABLE: 2747 cmd->result = DID_ERROR << 16; 2748 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2749 break; 2750 case CMD_TMF_STATUS: 2751 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2752 cmd->result = DID_ERROR << 16; 2753 break; 2754 case CMD_IOACCEL_DISABLED: 2755 /* This only handles the direct pass-through case since RAID 2756 * offload is handled above. Just attempt a retry. 2757 */ 2758 cmd->result = DID_SOFT_ERROR << 16; 2759 dev_warn(&h->pdev->dev, 2760 "cp %p had HP SSD Smart Path error\n", cp); 2761 break; 2762 default: 2763 cmd->result = DID_ERROR << 16; 2764 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2765 cp, ei->CommandStatus); 2766 } 2767 2768 return hpsa_cmd_free_and_done(h, cp, cmd); 2769 } 2770 2771 static void hpsa_pci_unmap(struct pci_dev *pdev, 2772 struct CommandList *c, int sg_used, int data_direction) 2773 { 2774 int i; 2775 2776 for (i = 0; i < sg_used; i++) 2777 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 2778 le32_to_cpu(c->SG[i].Len), 2779 data_direction); 2780 } 2781 2782 static int hpsa_map_one(struct pci_dev *pdev, 2783 struct CommandList *cp, 2784 unsigned char *buf, 2785 size_t buflen, 2786 int data_direction) 2787 { 2788 u64 addr64; 2789 2790 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 2791 cp->Header.SGList = 0; 2792 cp->Header.SGTotal = cpu_to_le16(0); 2793 return 0; 2794 } 2795 2796 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 2797 if (dma_mapping_error(&pdev->dev, addr64)) { 2798 /* Prevent subsequent unmap of something never mapped */ 2799 cp->Header.SGList = 0; 2800 cp->Header.SGTotal = cpu_to_le16(0); 2801 return -1; 2802 } 2803 cp->SG[0].Addr = cpu_to_le64(addr64); 2804 cp->SG[0].Len = cpu_to_le32(buflen); 2805 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2806 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2807 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2808 return 0; 2809 } 2810 2811 #define NO_TIMEOUT ((unsigned long) -1) 2812 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2813 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2814 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2815 { 2816 DECLARE_COMPLETION_ONSTACK(wait); 2817 2818 c->waiting = &wait; 2819 __enqueue_cmd_and_start_io(h, c, reply_queue); 2820 if (timeout_msecs == NO_TIMEOUT) { 2821 /* TODO: get rid of this no-timeout thing */ 2822 wait_for_completion_io(&wait); 2823 return IO_OK; 2824 } 2825 if (!wait_for_completion_io_timeout(&wait, 2826 msecs_to_jiffies(timeout_msecs))) { 2827 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2828 return -ETIMEDOUT; 2829 } 2830 return IO_OK; 2831 } 2832 2833 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2834 int reply_queue, unsigned long timeout_msecs) 2835 { 2836 if (unlikely(lockup_detected(h))) { 2837 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2838 return IO_OK; 2839 } 2840 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2841 } 2842 2843 static u32 lockup_detected(struct ctlr_info *h) 2844 { 2845 int cpu; 2846 u32 rc, *lockup_detected; 2847 2848 cpu = get_cpu(); 2849 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2850 rc = *lockup_detected; 2851 put_cpu(); 2852 return rc; 2853 } 2854 2855 #define MAX_DRIVER_CMD_RETRIES 25 2856 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2857 struct CommandList *c, int data_direction, unsigned long timeout_msecs) 2858 { 2859 int backoff_time = 10, retry_count = 0; 2860 int rc; 2861 2862 do { 2863 memset(c->err_info, 0, sizeof(*c->err_info)); 2864 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2865 timeout_msecs); 2866 if (rc) 2867 break; 2868 retry_count++; 2869 if (retry_count > 3) { 2870 msleep(backoff_time); 2871 if (backoff_time < 1000) 2872 backoff_time *= 2; 2873 } 2874 } while ((check_for_unit_attention(h, c) || 2875 check_for_busy(h, c)) && 2876 retry_count <= MAX_DRIVER_CMD_RETRIES); 2877 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2878 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2879 rc = -EIO; 2880 return rc; 2881 } 2882 2883 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2884 struct CommandList *c) 2885 { 2886 const u8 *cdb = c->Request.CDB; 2887 const u8 *lun = c->Header.LUN.LunAddrBytes; 2888 2889 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2890 txt, lun, cdb); 2891 } 2892 2893 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2894 struct CommandList *cp) 2895 { 2896 const struct ErrorInfo *ei = cp->err_info; 2897 struct device *d = &cp->h->pdev->dev; 2898 u8 sense_key, asc, ascq; 2899 int sense_len; 2900 2901 switch (ei->CommandStatus) { 2902 case CMD_TARGET_STATUS: 2903 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2904 sense_len = sizeof(ei->SenseInfo); 2905 else 2906 sense_len = ei->SenseLen; 2907 decode_sense_data(ei->SenseInfo, sense_len, 2908 &sense_key, &asc, &ascq); 2909 hpsa_print_cmd(h, "SCSI status", cp); 2910 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2911 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2912 sense_key, asc, ascq); 2913 else 2914 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2915 if (ei->ScsiStatus == 0) 2916 dev_warn(d, "SCSI status is abnormally zero. " 2917 "(probably indicates selection timeout " 2918 "reported incorrectly due to a known " 2919 "firmware bug, circa July, 2001.)\n"); 2920 break; 2921 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2922 break; 2923 case CMD_DATA_OVERRUN: 2924 hpsa_print_cmd(h, "overrun condition", cp); 2925 break; 2926 case CMD_INVALID: { 2927 /* controller unfortunately reports SCSI passthru's 2928 * to non-existent targets as invalid commands. 2929 */ 2930 hpsa_print_cmd(h, "invalid command", cp); 2931 dev_warn(d, "probably means device no longer present\n"); 2932 } 2933 break; 2934 case CMD_PROTOCOL_ERR: 2935 hpsa_print_cmd(h, "protocol error", cp); 2936 break; 2937 case CMD_HARDWARE_ERR: 2938 hpsa_print_cmd(h, "hardware error", cp); 2939 break; 2940 case CMD_CONNECTION_LOST: 2941 hpsa_print_cmd(h, "connection lost", cp); 2942 break; 2943 case CMD_ABORTED: 2944 hpsa_print_cmd(h, "aborted", cp); 2945 break; 2946 case CMD_ABORT_FAILED: 2947 hpsa_print_cmd(h, "abort failed", cp); 2948 break; 2949 case CMD_UNSOLICITED_ABORT: 2950 hpsa_print_cmd(h, "unsolicited abort", cp); 2951 break; 2952 case CMD_TIMEOUT: 2953 hpsa_print_cmd(h, "timed out", cp); 2954 break; 2955 case CMD_UNABORTABLE: 2956 hpsa_print_cmd(h, "unabortable", cp); 2957 break; 2958 case CMD_CTLR_LOCKUP: 2959 hpsa_print_cmd(h, "controller lockup detected", cp); 2960 break; 2961 default: 2962 hpsa_print_cmd(h, "unknown status", cp); 2963 dev_warn(d, "Unknown command status %x\n", 2964 ei->CommandStatus); 2965 } 2966 } 2967 2968 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2969 u8 page, u8 *buf, size_t bufsize) 2970 { 2971 int rc = IO_OK; 2972 struct CommandList *c; 2973 struct ErrorInfo *ei; 2974 2975 c = cmd_alloc(h); 2976 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 2977 page, scsi3addr, TYPE_CMD)) { 2978 rc = -1; 2979 goto out; 2980 } 2981 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 2982 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 2983 if (rc) 2984 goto out; 2985 ei = c->err_info; 2986 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2987 hpsa_scsi_interpret_error(h, c); 2988 rc = -1; 2989 } 2990 out: 2991 cmd_free(h, c); 2992 return rc; 2993 } 2994 2995 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 2996 u8 *scsi3addr) 2997 { 2998 u8 *buf; 2999 u64 sa = 0; 3000 int rc = 0; 3001 3002 buf = kzalloc(1024, GFP_KERNEL); 3003 if (!buf) 3004 return 0; 3005 3006 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 3007 buf, 1024); 3008 3009 if (rc) 3010 goto out; 3011 3012 sa = get_unaligned_be64(buf+12); 3013 3014 out: 3015 kfree(buf); 3016 return sa; 3017 } 3018 3019 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3020 u16 page, unsigned char *buf, 3021 unsigned char bufsize) 3022 { 3023 int rc = IO_OK; 3024 struct CommandList *c; 3025 struct ErrorInfo *ei; 3026 3027 c = cmd_alloc(h); 3028 3029 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3030 page, scsi3addr, TYPE_CMD)) { 3031 rc = -1; 3032 goto out; 3033 } 3034 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3035 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3036 if (rc) 3037 goto out; 3038 ei = c->err_info; 3039 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3040 hpsa_scsi_interpret_error(h, c); 3041 rc = -1; 3042 } 3043 out: 3044 cmd_free(h, c); 3045 return rc; 3046 } 3047 3048 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3049 u8 reset_type, int reply_queue) 3050 { 3051 int rc = IO_OK; 3052 struct CommandList *c; 3053 struct ErrorInfo *ei; 3054 3055 c = cmd_alloc(h); 3056 3057 3058 /* fill_cmd can't fail here, no data buffer to map. */ 3059 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, 3060 scsi3addr, TYPE_MSG); 3061 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3062 if (rc) { 3063 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3064 goto out; 3065 } 3066 /* no unmap needed here because no data xfer. */ 3067 3068 ei = c->err_info; 3069 if (ei->CommandStatus != 0) { 3070 hpsa_scsi_interpret_error(h, c); 3071 rc = -1; 3072 } 3073 out: 3074 cmd_free(h, c); 3075 return rc; 3076 } 3077 3078 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3079 struct hpsa_scsi_dev_t *dev, 3080 unsigned char *scsi3addr) 3081 { 3082 int i; 3083 bool match = false; 3084 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3085 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3086 3087 if (hpsa_is_cmd_idle(c)) 3088 return false; 3089 3090 switch (c->cmd_type) { 3091 case CMD_SCSI: 3092 case CMD_IOCTL_PEND: 3093 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3094 sizeof(c->Header.LUN.LunAddrBytes)); 3095 break; 3096 3097 case CMD_IOACCEL1: 3098 case CMD_IOACCEL2: 3099 if (c->phys_disk == dev) { 3100 /* HBA mode match */ 3101 match = true; 3102 } else { 3103 /* Possible RAID mode -- check each phys dev. */ 3104 /* FIXME: Do we need to take out a lock here? If 3105 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3106 * instead. */ 3107 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3108 /* FIXME: an alternate test might be 3109 * 3110 * match = dev->phys_disk[i]->ioaccel_handle 3111 * == c2->scsi_nexus; */ 3112 match = dev->phys_disk[i] == c->phys_disk; 3113 } 3114 } 3115 break; 3116 3117 case IOACCEL2_TMF: 3118 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3119 match = dev->phys_disk[i]->ioaccel_handle == 3120 le32_to_cpu(ac->it_nexus); 3121 } 3122 break; 3123 3124 case 0: /* The command is in the middle of being initialized. */ 3125 match = false; 3126 break; 3127 3128 default: 3129 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3130 c->cmd_type); 3131 BUG(); 3132 } 3133 3134 return match; 3135 } 3136 3137 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3138 unsigned char *scsi3addr, u8 reset_type, int reply_queue) 3139 { 3140 int i; 3141 int rc = 0; 3142 3143 /* We can really only handle one reset at a time */ 3144 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3145 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3146 return -EINTR; 3147 } 3148 3149 BUG_ON(atomic_read(&dev->reset_cmds_out) != 0); 3150 3151 for (i = 0; i < h->nr_cmds; i++) { 3152 struct CommandList *c = h->cmd_pool + i; 3153 int refcount = atomic_inc_return(&c->refcount); 3154 3155 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, scsi3addr)) { 3156 unsigned long flags; 3157 3158 /* 3159 * Mark the target command as having a reset pending, 3160 * then lock a lock so that the command cannot complete 3161 * while we're considering it. If the command is not 3162 * idle then count it; otherwise revoke the event. 3163 */ 3164 c->reset_pending = dev; 3165 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 3166 if (!hpsa_is_cmd_idle(c)) 3167 atomic_inc(&dev->reset_cmds_out); 3168 else 3169 c->reset_pending = NULL; 3170 spin_unlock_irqrestore(&h->lock, flags); 3171 } 3172 3173 cmd_free(h, c); 3174 } 3175 3176 rc = hpsa_send_reset(h, scsi3addr, reset_type, reply_queue); 3177 if (!rc) 3178 wait_event(h->event_sync_wait_queue, 3179 atomic_read(&dev->reset_cmds_out) == 0 || 3180 lockup_detected(h)); 3181 3182 if (unlikely(lockup_detected(h))) { 3183 dev_warn(&h->pdev->dev, 3184 "Controller lockup detected during reset wait\n"); 3185 rc = -ENODEV; 3186 } 3187 3188 if (unlikely(rc)) 3189 atomic_set(&dev->reset_cmds_out, 0); 3190 else 3191 rc = wait_for_device_to_become_ready(h, scsi3addr, 0); 3192 3193 mutex_unlock(&h->reset_mutex); 3194 return rc; 3195 } 3196 3197 static void hpsa_get_raid_level(struct ctlr_info *h, 3198 unsigned char *scsi3addr, unsigned char *raid_level) 3199 { 3200 int rc; 3201 unsigned char *buf; 3202 3203 *raid_level = RAID_UNKNOWN; 3204 buf = kzalloc(64, GFP_KERNEL); 3205 if (!buf) 3206 return; 3207 3208 if (!hpsa_vpd_page_supported(h, scsi3addr, 3209 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3210 goto exit; 3211 3212 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3213 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3214 3215 if (rc == 0) 3216 *raid_level = buf[8]; 3217 if (*raid_level > RAID_UNKNOWN) 3218 *raid_level = RAID_UNKNOWN; 3219 exit: 3220 kfree(buf); 3221 return; 3222 } 3223 3224 #define HPSA_MAP_DEBUG 3225 #ifdef HPSA_MAP_DEBUG 3226 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3227 struct raid_map_data *map_buff) 3228 { 3229 struct raid_map_disk_data *dd = &map_buff->data[0]; 3230 int map, row, col; 3231 u16 map_cnt, row_cnt, disks_per_row; 3232 3233 if (rc != 0) 3234 return; 3235 3236 /* Show details only if debugging has been activated. */ 3237 if (h->raid_offload_debug < 2) 3238 return; 3239 3240 dev_info(&h->pdev->dev, "structure_size = %u\n", 3241 le32_to_cpu(map_buff->structure_size)); 3242 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3243 le32_to_cpu(map_buff->volume_blk_size)); 3244 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3245 le64_to_cpu(map_buff->volume_blk_cnt)); 3246 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3247 map_buff->phys_blk_shift); 3248 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3249 map_buff->parity_rotation_shift); 3250 dev_info(&h->pdev->dev, "strip_size = %u\n", 3251 le16_to_cpu(map_buff->strip_size)); 3252 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3253 le64_to_cpu(map_buff->disk_starting_blk)); 3254 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3255 le64_to_cpu(map_buff->disk_blk_cnt)); 3256 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3257 le16_to_cpu(map_buff->data_disks_per_row)); 3258 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3259 le16_to_cpu(map_buff->metadata_disks_per_row)); 3260 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3261 le16_to_cpu(map_buff->row_cnt)); 3262 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3263 le16_to_cpu(map_buff->layout_map_count)); 3264 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3265 le16_to_cpu(map_buff->flags)); 3266 dev_info(&h->pdev->dev, "encryption = %s\n", 3267 le16_to_cpu(map_buff->flags) & 3268 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3269 dev_info(&h->pdev->dev, "dekindex = %u\n", 3270 le16_to_cpu(map_buff->dekindex)); 3271 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3272 for (map = 0; map < map_cnt; map++) { 3273 dev_info(&h->pdev->dev, "Map%u:\n", map); 3274 row_cnt = le16_to_cpu(map_buff->row_cnt); 3275 for (row = 0; row < row_cnt; row++) { 3276 dev_info(&h->pdev->dev, " Row%u:\n", row); 3277 disks_per_row = 3278 le16_to_cpu(map_buff->data_disks_per_row); 3279 for (col = 0; col < disks_per_row; col++, dd++) 3280 dev_info(&h->pdev->dev, 3281 " D%02u: h=0x%04x xor=%u,%u\n", 3282 col, dd->ioaccel_handle, 3283 dd->xor_mult[0], dd->xor_mult[1]); 3284 disks_per_row = 3285 le16_to_cpu(map_buff->metadata_disks_per_row); 3286 for (col = 0; col < disks_per_row; col++, dd++) 3287 dev_info(&h->pdev->dev, 3288 " M%02u: h=0x%04x xor=%u,%u\n", 3289 col, dd->ioaccel_handle, 3290 dd->xor_mult[0], dd->xor_mult[1]); 3291 } 3292 } 3293 } 3294 #else 3295 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3296 __attribute__((unused)) int rc, 3297 __attribute__((unused)) struct raid_map_data *map_buff) 3298 { 3299 } 3300 #endif 3301 3302 static int hpsa_get_raid_map(struct ctlr_info *h, 3303 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3304 { 3305 int rc = 0; 3306 struct CommandList *c; 3307 struct ErrorInfo *ei; 3308 3309 c = cmd_alloc(h); 3310 3311 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3312 sizeof(this_device->raid_map), 0, 3313 scsi3addr, TYPE_CMD)) { 3314 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3315 cmd_free(h, c); 3316 return -1; 3317 } 3318 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3319 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3320 if (rc) 3321 goto out; 3322 ei = c->err_info; 3323 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3324 hpsa_scsi_interpret_error(h, c); 3325 rc = -1; 3326 goto out; 3327 } 3328 cmd_free(h, c); 3329 3330 /* @todo in the future, dynamically allocate RAID map memory */ 3331 if (le32_to_cpu(this_device->raid_map.structure_size) > 3332 sizeof(this_device->raid_map)) { 3333 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3334 rc = -1; 3335 } 3336 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3337 return rc; 3338 out: 3339 cmd_free(h, c); 3340 return rc; 3341 } 3342 3343 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3344 unsigned char scsi3addr[], u16 bmic_device_index, 3345 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3346 { 3347 int rc = IO_OK; 3348 struct CommandList *c; 3349 struct ErrorInfo *ei; 3350 3351 c = cmd_alloc(h); 3352 3353 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3354 0, RAID_CTLR_LUNID, TYPE_CMD); 3355 if (rc) 3356 goto out; 3357 3358 c->Request.CDB[2] = bmic_device_index & 0xff; 3359 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3360 3361 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3362 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3363 if (rc) 3364 goto out; 3365 ei = c->err_info; 3366 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3367 hpsa_scsi_interpret_error(h, c); 3368 rc = -1; 3369 } 3370 out: 3371 cmd_free(h, c); 3372 return rc; 3373 } 3374 3375 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3376 struct bmic_identify_controller *buf, size_t bufsize) 3377 { 3378 int rc = IO_OK; 3379 struct CommandList *c; 3380 struct ErrorInfo *ei; 3381 3382 c = cmd_alloc(h); 3383 3384 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3385 0, RAID_CTLR_LUNID, TYPE_CMD); 3386 if (rc) 3387 goto out; 3388 3389 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3390 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3391 if (rc) 3392 goto out; 3393 ei = c->err_info; 3394 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3395 hpsa_scsi_interpret_error(h, c); 3396 rc = -1; 3397 } 3398 out: 3399 cmd_free(h, c); 3400 return rc; 3401 } 3402 3403 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3404 unsigned char scsi3addr[], u16 bmic_device_index, 3405 struct bmic_identify_physical_device *buf, size_t bufsize) 3406 { 3407 int rc = IO_OK; 3408 struct CommandList *c; 3409 struct ErrorInfo *ei; 3410 3411 c = cmd_alloc(h); 3412 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3413 0, RAID_CTLR_LUNID, TYPE_CMD); 3414 if (rc) 3415 goto out; 3416 3417 c->Request.CDB[2] = bmic_device_index & 0xff; 3418 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3419 3420 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3421 NO_TIMEOUT); 3422 ei = c->err_info; 3423 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3424 hpsa_scsi_interpret_error(h, c); 3425 rc = -1; 3426 } 3427 out: 3428 cmd_free(h, c); 3429 3430 return rc; 3431 } 3432 3433 /* 3434 * get enclosure information 3435 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3436 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3437 * Uses id_physical_device to determine the box_index. 3438 */ 3439 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3440 unsigned char *scsi3addr, 3441 struct ReportExtendedLUNdata *rlep, int rle_index, 3442 struct hpsa_scsi_dev_t *encl_dev) 3443 { 3444 int rc = -1; 3445 struct CommandList *c = NULL; 3446 struct ErrorInfo *ei = NULL; 3447 struct bmic_sense_storage_box_params *bssbp = NULL; 3448 struct bmic_identify_physical_device *id_phys = NULL; 3449 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3450 u16 bmic_device_index = 0; 3451 3452 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3453 3454 encl_dev->sas_address = 3455 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3456 3457 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3458 rc = IO_OK; 3459 goto out; 3460 } 3461 3462 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3463 rc = IO_OK; 3464 goto out; 3465 } 3466 3467 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3468 if (!bssbp) 3469 goto out; 3470 3471 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3472 if (!id_phys) 3473 goto out; 3474 3475 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3476 id_phys, sizeof(*id_phys)); 3477 if (rc) { 3478 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3479 __func__, encl_dev->external, bmic_device_index); 3480 goto out; 3481 } 3482 3483 c = cmd_alloc(h); 3484 3485 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3486 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3487 3488 if (rc) 3489 goto out; 3490 3491 if (id_phys->phys_connector[1] == 'E') 3492 c->Request.CDB[5] = id_phys->box_index; 3493 else 3494 c->Request.CDB[5] = 0; 3495 3496 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE, 3497 NO_TIMEOUT); 3498 if (rc) 3499 goto out; 3500 3501 ei = c->err_info; 3502 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3503 rc = -1; 3504 goto out; 3505 } 3506 3507 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3508 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3509 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3510 3511 rc = IO_OK; 3512 out: 3513 kfree(bssbp); 3514 kfree(id_phys); 3515 3516 if (c) 3517 cmd_free(h, c); 3518 3519 if (rc != IO_OK) 3520 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3521 "Error, could not get enclosure information\n"); 3522 } 3523 3524 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3525 unsigned char *scsi3addr) 3526 { 3527 struct ReportExtendedLUNdata *physdev; 3528 u32 nphysicals; 3529 u64 sa = 0; 3530 int i; 3531 3532 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3533 if (!physdev) 3534 return 0; 3535 3536 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3537 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3538 kfree(physdev); 3539 return 0; 3540 } 3541 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3542 3543 for (i = 0; i < nphysicals; i++) 3544 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3545 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3546 break; 3547 } 3548 3549 kfree(physdev); 3550 3551 return sa; 3552 } 3553 3554 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3555 struct hpsa_scsi_dev_t *dev) 3556 { 3557 int rc; 3558 u64 sa = 0; 3559 3560 if (is_hba_lunid(scsi3addr)) { 3561 struct bmic_sense_subsystem_info *ssi; 3562 3563 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3564 if (!ssi) 3565 return; 3566 3567 rc = hpsa_bmic_sense_subsystem_information(h, 3568 scsi3addr, 0, ssi, sizeof(*ssi)); 3569 if (rc == 0) { 3570 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3571 h->sas_address = sa; 3572 } 3573 3574 kfree(ssi); 3575 } else 3576 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3577 3578 dev->sas_address = sa; 3579 } 3580 3581 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3582 struct ReportExtendedLUNdata *physdev) 3583 { 3584 u32 nphysicals; 3585 int i; 3586 3587 if (h->discovery_polling) 3588 return; 3589 3590 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3591 3592 for (i = 0; i < nphysicals; i++) { 3593 if (physdev->LUN[i].device_type == 3594 BMIC_DEVICE_TYPE_CONTROLLER 3595 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3596 dev_info(&h->pdev->dev, 3597 "External controller present, activate discovery polling and disable rld caching\n"); 3598 hpsa_disable_rld_caching(h); 3599 h->discovery_polling = 1; 3600 break; 3601 } 3602 } 3603 } 3604 3605 /* Get a device id from inquiry page 0x83 */ 3606 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3607 unsigned char scsi3addr[], u8 page) 3608 { 3609 int rc; 3610 int i; 3611 int pages; 3612 unsigned char *buf, bufsize; 3613 3614 buf = kzalloc(256, GFP_KERNEL); 3615 if (!buf) 3616 return false; 3617 3618 /* Get the size of the page list first */ 3619 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3620 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3621 buf, HPSA_VPD_HEADER_SZ); 3622 if (rc != 0) 3623 goto exit_unsupported; 3624 pages = buf[3]; 3625 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3626 bufsize = pages + HPSA_VPD_HEADER_SZ; 3627 else 3628 bufsize = 255; 3629 3630 /* Get the whole VPD page list */ 3631 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3632 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3633 buf, bufsize); 3634 if (rc != 0) 3635 goto exit_unsupported; 3636 3637 pages = buf[3]; 3638 for (i = 1; i <= pages; i++) 3639 if (buf[3 + i] == page) 3640 goto exit_supported; 3641 exit_unsupported: 3642 kfree(buf); 3643 return false; 3644 exit_supported: 3645 kfree(buf); 3646 return true; 3647 } 3648 3649 /* 3650 * Called during a scan operation. 3651 * Sets ioaccel status on the new device list, not the existing device list 3652 * 3653 * The device list used during I/O will be updated later in 3654 * adjust_hpsa_scsi_table. 3655 */ 3656 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3657 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3658 { 3659 int rc; 3660 unsigned char *buf; 3661 u8 ioaccel_status; 3662 3663 this_device->offload_config = 0; 3664 this_device->offload_enabled = 0; 3665 this_device->offload_to_be_enabled = 0; 3666 3667 buf = kzalloc(64, GFP_KERNEL); 3668 if (!buf) 3669 return; 3670 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3671 goto out; 3672 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3673 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3674 if (rc != 0) 3675 goto out; 3676 3677 #define IOACCEL_STATUS_BYTE 4 3678 #define OFFLOAD_CONFIGURED_BIT 0x01 3679 #define OFFLOAD_ENABLED_BIT 0x02 3680 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3681 this_device->offload_config = 3682 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3683 if (this_device->offload_config) { 3684 this_device->offload_to_be_enabled = 3685 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3686 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 3687 this_device->offload_to_be_enabled = 0; 3688 } 3689 3690 out: 3691 kfree(buf); 3692 return; 3693 } 3694 3695 /* Get the device id from inquiry page 0x83 */ 3696 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3697 unsigned char *device_id, int index, int buflen) 3698 { 3699 int rc; 3700 unsigned char *buf; 3701 3702 /* Does controller have VPD for device id? */ 3703 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3704 return 1; /* not supported */ 3705 3706 buf = kzalloc(64, GFP_KERNEL); 3707 if (!buf) 3708 return -ENOMEM; 3709 3710 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3711 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3712 if (rc == 0) { 3713 if (buflen > 16) 3714 buflen = 16; 3715 memcpy(device_id, &buf[8], buflen); 3716 } 3717 3718 kfree(buf); 3719 3720 return rc; /*0 - got id, otherwise, didn't */ 3721 } 3722 3723 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3724 void *buf, int bufsize, 3725 int extended_response) 3726 { 3727 int rc = IO_OK; 3728 struct CommandList *c; 3729 unsigned char scsi3addr[8]; 3730 struct ErrorInfo *ei; 3731 3732 c = cmd_alloc(h); 3733 3734 /* address the controller */ 3735 memset(scsi3addr, 0, sizeof(scsi3addr)); 3736 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3737 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3738 rc = -EAGAIN; 3739 goto out; 3740 } 3741 if (extended_response) 3742 c->Request.CDB[1] = extended_response; 3743 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 3744 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 3745 if (rc) 3746 goto out; 3747 ei = c->err_info; 3748 if (ei->CommandStatus != 0 && 3749 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3750 hpsa_scsi_interpret_error(h, c); 3751 rc = -EIO; 3752 } else { 3753 struct ReportLUNdata *rld = buf; 3754 3755 if (rld->extended_response_flag != extended_response) { 3756 if (!h->legacy_board) { 3757 dev_err(&h->pdev->dev, 3758 "report luns requested format %u, got %u\n", 3759 extended_response, 3760 rld->extended_response_flag); 3761 rc = -EINVAL; 3762 } else 3763 rc = -EOPNOTSUPP; 3764 } 3765 } 3766 out: 3767 cmd_free(h, c); 3768 return rc; 3769 } 3770 3771 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3772 struct ReportExtendedLUNdata *buf, int bufsize) 3773 { 3774 int rc; 3775 struct ReportLUNdata *lbuf; 3776 3777 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3778 HPSA_REPORT_PHYS_EXTENDED); 3779 if (!rc || rc != -EOPNOTSUPP) 3780 return rc; 3781 3782 /* REPORT PHYS EXTENDED is not supported */ 3783 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3784 if (!lbuf) 3785 return -ENOMEM; 3786 3787 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3788 if (!rc) { 3789 int i; 3790 u32 nphys; 3791 3792 /* Copy ReportLUNdata header */ 3793 memcpy(buf, lbuf, 8); 3794 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3795 for (i = 0; i < nphys; i++) 3796 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3797 } 3798 kfree(lbuf); 3799 return rc; 3800 } 3801 3802 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3803 struct ReportLUNdata *buf, int bufsize) 3804 { 3805 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3806 } 3807 3808 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3809 int bus, int target, int lun) 3810 { 3811 device->bus = bus; 3812 device->target = target; 3813 device->lun = lun; 3814 } 3815 3816 /* Use VPD inquiry to get details of volume status */ 3817 static int hpsa_get_volume_status(struct ctlr_info *h, 3818 unsigned char scsi3addr[]) 3819 { 3820 int rc; 3821 int status; 3822 int size; 3823 unsigned char *buf; 3824 3825 buf = kzalloc(64, GFP_KERNEL); 3826 if (!buf) 3827 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3828 3829 /* Does controller have VPD for logical volume status? */ 3830 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3831 goto exit_failed; 3832 3833 /* Get the size of the VPD return buffer */ 3834 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3835 buf, HPSA_VPD_HEADER_SZ); 3836 if (rc != 0) 3837 goto exit_failed; 3838 size = buf[3]; 3839 3840 /* Now get the whole VPD buffer */ 3841 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3842 buf, size + HPSA_VPD_HEADER_SZ); 3843 if (rc != 0) 3844 goto exit_failed; 3845 status = buf[4]; /* status byte */ 3846 3847 kfree(buf); 3848 return status; 3849 exit_failed: 3850 kfree(buf); 3851 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3852 } 3853 3854 /* Determine offline status of a volume. 3855 * Return either: 3856 * 0 (not offline) 3857 * 0xff (offline for unknown reasons) 3858 * # (integer code indicating one of several NOT READY states 3859 * describing why a volume is to be kept offline) 3860 */ 3861 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3862 unsigned char scsi3addr[]) 3863 { 3864 struct CommandList *c; 3865 unsigned char *sense; 3866 u8 sense_key, asc, ascq; 3867 int sense_len; 3868 int rc, ldstat = 0; 3869 u16 cmd_status; 3870 u8 scsi_status; 3871 #define ASC_LUN_NOT_READY 0x04 3872 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3873 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3874 3875 c = cmd_alloc(h); 3876 3877 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3878 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3879 NO_TIMEOUT); 3880 if (rc) { 3881 cmd_free(h, c); 3882 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3883 } 3884 sense = c->err_info->SenseInfo; 3885 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3886 sense_len = sizeof(c->err_info->SenseInfo); 3887 else 3888 sense_len = c->err_info->SenseLen; 3889 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3890 cmd_status = c->err_info->CommandStatus; 3891 scsi_status = c->err_info->ScsiStatus; 3892 cmd_free(h, c); 3893 3894 /* Determine the reason for not ready state */ 3895 ldstat = hpsa_get_volume_status(h, scsi3addr); 3896 3897 /* Keep volume offline in certain cases: */ 3898 switch (ldstat) { 3899 case HPSA_LV_FAILED: 3900 case HPSA_LV_UNDERGOING_ERASE: 3901 case HPSA_LV_NOT_AVAILABLE: 3902 case HPSA_LV_UNDERGOING_RPI: 3903 case HPSA_LV_PENDING_RPI: 3904 case HPSA_LV_ENCRYPTED_NO_KEY: 3905 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3906 case HPSA_LV_UNDERGOING_ENCRYPTION: 3907 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3908 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3909 return ldstat; 3910 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3911 /* If VPD status page isn't available, 3912 * use ASC/ASCQ to determine state 3913 */ 3914 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3915 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3916 return ldstat; 3917 break; 3918 default: 3919 break; 3920 } 3921 return HPSA_LV_OK; 3922 } 3923 3924 static int hpsa_update_device_info(struct ctlr_info *h, 3925 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3926 unsigned char *is_OBDR_device) 3927 { 3928 3929 #define OBDR_SIG_OFFSET 43 3930 #define OBDR_TAPE_SIG "$DR-10" 3931 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3932 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3933 3934 unsigned char *inq_buff; 3935 unsigned char *obdr_sig; 3936 int rc = 0; 3937 3938 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3939 if (!inq_buff) { 3940 rc = -ENOMEM; 3941 goto bail_out; 3942 } 3943 3944 /* Do an inquiry to the device to see what it is. */ 3945 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3946 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3947 dev_err(&h->pdev->dev, 3948 "%s: inquiry failed, device will be skipped.\n", 3949 __func__); 3950 rc = HPSA_INQUIRY_FAILED; 3951 goto bail_out; 3952 } 3953 3954 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3955 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3956 3957 this_device->devtype = (inq_buff[0] & 0x1f); 3958 memcpy(this_device->scsi3addr, scsi3addr, 8); 3959 memcpy(this_device->vendor, &inq_buff[8], 3960 sizeof(this_device->vendor)); 3961 memcpy(this_device->model, &inq_buff[16], 3962 sizeof(this_device->model)); 3963 this_device->rev = inq_buff[2]; 3964 memset(this_device->device_id, 0, 3965 sizeof(this_device->device_id)); 3966 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3967 sizeof(this_device->device_id)) < 0) 3968 dev_err(&h->pdev->dev, 3969 "hpsa%d: %s: can't get device id for host %d:C0:T%d:L%d\t%s\t%.16s\n", 3970 h->ctlr, __func__, 3971 h->scsi_host->host_no, 3972 this_device->target, this_device->lun, 3973 scsi_device_type(this_device->devtype), 3974 this_device->model); 3975 3976 if ((this_device->devtype == TYPE_DISK || 3977 this_device->devtype == TYPE_ZBC) && 3978 is_logical_dev_addr_mode(scsi3addr)) { 3979 unsigned char volume_offline; 3980 3981 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3982 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3983 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3984 volume_offline = hpsa_volume_offline(h, scsi3addr); 3985 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3986 h->legacy_board) { 3987 /* 3988 * Legacy boards might not support volume status 3989 */ 3990 dev_info(&h->pdev->dev, 3991 "C0:T%d:L%d Volume status not available, assuming online.\n", 3992 this_device->target, this_device->lun); 3993 volume_offline = 0; 3994 } 3995 this_device->volume_offline = volume_offline; 3996 if (volume_offline == HPSA_LV_FAILED) { 3997 rc = HPSA_LV_FAILED; 3998 dev_err(&h->pdev->dev, 3999 "%s: LV failed, device will be skipped.\n", 4000 __func__); 4001 goto bail_out; 4002 } 4003 } else { 4004 this_device->raid_level = RAID_UNKNOWN; 4005 this_device->offload_config = 0; 4006 this_device->offload_enabled = 0; 4007 this_device->offload_to_be_enabled = 0; 4008 this_device->hba_ioaccel_enabled = 0; 4009 this_device->volume_offline = 0; 4010 this_device->queue_depth = h->nr_cmds; 4011 } 4012 4013 if (this_device->external) 4014 this_device->queue_depth = EXTERNAL_QD; 4015 4016 if (is_OBDR_device) { 4017 /* See if this is a One-Button-Disaster-Recovery device 4018 * by looking for "$DR-10" at offset 43 in inquiry data. 4019 */ 4020 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4021 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4022 strncmp(obdr_sig, OBDR_TAPE_SIG, 4023 OBDR_SIG_LEN) == 0); 4024 } 4025 kfree(inq_buff); 4026 return 0; 4027 4028 bail_out: 4029 kfree(inq_buff); 4030 return rc; 4031 } 4032 4033 /* 4034 * Helper function to assign bus, target, lun mapping of devices. 4035 * Logical drive target and lun are assigned at this time, but 4036 * physical device lun and target assignment are deferred (assigned 4037 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4038 */ 4039 static void figure_bus_target_lun(struct ctlr_info *h, 4040 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4041 { 4042 u32 lunid = get_unaligned_le32(lunaddrbytes); 4043 4044 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4045 /* physical device, target and lun filled in later */ 4046 if (is_hba_lunid(lunaddrbytes)) { 4047 int bus = HPSA_HBA_BUS; 4048 4049 if (!device->rev) 4050 bus = HPSA_LEGACY_HBA_BUS; 4051 hpsa_set_bus_target_lun(device, 4052 bus, 0, lunid & 0x3fff); 4053 } else 4054 /* defer target, lun assignment for physical devices */ 4055 hpsa_set_bus_target_lun(device, 4056 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4057 return; 4058 } 4059 /* It's a logical device */ 4060 if (device->external) { 4061 hpsa_set_bus_target_lun(device, 4062 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4063 lunid & 0x00ff); 4064 return; 4065 } 4066 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4067 0, lunid & 0x3fff); 4068 } 4069 4070 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4071 int i, int nphysicals, int nlocal_logicals) 4072 { 4073 /* In report logicals, local logicals are listed first, 4074 * then any externals. 4075 */ 4076 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4077 4078 if (i == raid_ctlr_position) 4079 return 0; 4080 4081 if (i < logicals_start) 4082 return 0; 4083 4084 /* i is in logicals range, but still within local logicals */ 4085 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4086 return 0; 4087 4088 return 1; /* it's an external lun */ 4089 } 4090 4091 /* 4092 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4093 * logdev. The number of luns in physdev and logdev are returned in 4094 * *nphysicals and *nlogicals, respectively. 4095 * Returns 0 on success, -1 otherwise. 4096 */ 4097 static int hpsa_gather_lun_info(struct ctlr_info *h, 4098 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4099 struct ReportLUNdata *logdev, u32 *nlogicals) 4100 { 4101 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4102 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4103 return -1; 4104 } 4105 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4106 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4107 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4108 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4109 *nphysicals = HPSA_MAX_PHYS_LUN; 4110 } 4111 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4112 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4113 return -1; 4114 } 4115 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4116 /* Reject Logicals in excess of our max capability. */ 4117 if (*nlogicals > HPSA_MAX_LUN) { 4118 dev_warn(&h->pdev->dev, 4119 "maximum logical LUNs (%d) exceeded. " 4120 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4121 *nlogicals - HPSA_MAX_LUN); 4122 *nlogicals = HPSA_MAX_LUN; 4123 } 4124 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4125 dev_warn(&h->pdev->dev, 4126 "maximum logical + physical LUNs (%d) exceeded. " 4127 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4128 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4129 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4130 } 4131 return 0; 4132 } 4133 4134 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4135 int i, int nphysicals, int nlogicals, 4136 struct ReportExtendedLUNdata *physdev_list, 4137 struct ReportLUNdata *logdev_list) 4138 { 4139 /* Helper function, figure out where the LUN ID info is coming from 4140 * given index i, lists of physical and logical devices, where in 4141 * the list the raid controller is supposed to appear (first or last) 4142 */ 4143 4144 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4145 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4146 4147 if (i == raid_ctlr_position) 4148 return RAID_CTLR_LUNID; 4149 4150 if (i < logicals_start) 4151 return &physdev_list->LUN[i - 4152 (raid_ctlr_position == 0)].lunid[0]; 4153 4154 if (i < last_device) 4155 return &logdev_list->LUN[i - nphysicals - 4156 (raid_ctlr_position == 0)][0]; 4157 BUG(); 4158 return NULL; 4159 } 4160 4161 /* get physical drive ioaccel handle and queue depth */ 4162 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4163 struct hpsa_scsi_dev_t *dev, 4164 struct ReportExtendedLUNdata *rlep, int rle_index, 4165 struct bmic_identify_physical_device *id_phys) 4166 { 4167 int rc; 4168 struct ext_report_lun_entry *rle; 4169 4170 rle = &rlep->LUN[rle_index]; 4171 4172 dev->ioaccel_handle = rle->ioaccel_handle; 4173 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4174 dev->hba_ioaccel_enabled = 1; 4175 memset(id_phys, 0, sizeof(*id_phys)); 4176 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4177 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4178 sizeof(*id_phys)); 4179 if (!rc) 4180 /* Reserve space for FW operations */ 4181 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4182 #define DRIVE_QUEUE_DEPTH 7 4183 dev->queue_depth = 4184 le16_to_cpu(id_phys->current_queue_depth_limit) - 4185 DRIVE_CMDS_RESERVED_FOR_FW; 4186 else 4187 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4188 } 4189 4190 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4191 struct ReportExtendedLUNdata *rlep, int rle_index, 4192 struct bmic_identify_physical_device *id_phys) 4193 { 4194 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4195 4196 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4197 this_device->hba_ioaccel_enabled = 1; 4198 4199 memcpy(&this_device->active_path_index, 4200 &id_phys->active_path_number, 4201 sizeof(this_device->active_path_index)); 4202 memcpy(&this_device->path_map, 4203 &id_phys->redundant_path_present_map, 4204 sizeof(this_device->path_map)); 4205 memcpy(&this_device->box, 4206 &id_phys->alternate_paths_phys_box_on_port, 4207 sizeof(this_device->box)); 4208 memcpy(&this_device->phys_connector, 4209 &id_phys->alternate_paths_phys_connector, 4210 sizeof(this_device->phys_connector)); 4211 memcpy(&this_device->bay, 4212 &id_phys->phys_bay_in_box, 4213 sizeof(this_device->bay)); 4214 } 4215 4216 /* get number of local logical disks. */ 4217 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4218 struct bmic_identify_controller *id_ctlr, 4219 u32 *nlocals) 4220 { 4221 int rc; 4222 4223 if (!id_ctlr) { 4224 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4225 __func__); 4226 return -ENOMEM; 4227 } 4228 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4229 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4230 if (!rc) 4231 if (id_ctlr->configured_logical_drive_count < 255) 4232 *nlocals = id_ctlr->configured_logical_drive_count; 4233 else 4234 *nlocals = le16_to_cpu( 4235 id_ctlr->extended_logical_unit_count); 4236 else 4237 *nlocals = -1; 4238 return rc; 4239 } 4240 4241 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4242 { 4243 struct bmic_identify_physical_device *id_phys; 4244 bool is_spare = false; 4245 int rc; 4246 4247 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4248 if (!id_phys) 4249 return false; 4250 4251 rc = hpsa_bmic_id_physical_device(h, 4252 lunaddrbytes, 4253 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4254 id_phys, sizeof(*id_phys)); 4255 if (rc == 0) 4256 is_spare = (id_phys->more_flags >> 6) & 0x01; 4257 4258 kfree(id_phys); 4259 return is_spare; 4260 } 4261 4262 #define RPL_DEV_FLAG_NON_DISK 0x1 4263 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4264 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4265 4266 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4267 4268 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4269 struct ext_report_lun_entry *rle) 4270 { 4271 u8 device_flags; 4272 u8 device_type; 4273 4274 if (!MASKED_DEVICE(lunaddrbytes)) 4275 return false; 4276 4277 device_flags = rle->device_flags; 4278 device_type = rle->device_type; 4279 4280 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4281 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4282 return false; 4283 return true; 4284 } 4285 4286 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4287 return false; 4288 4289 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4290 return false; 4291 4292 /* 4293 * Spares may be spun down, we do not want to 4294 * do an Inquiry to a RAID set spare drive as 4295 * that would have them spun up, that is a 4296 * performance hit because I/O to the RAID device 4297 * stops while the spin up occurs which can take 4298 * over 50 seconds. 4299 */ 4300 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4301 return true; 4302 4303 return false; 4304 } 4305 4306 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4307 { 4308 /* the idea here is we could get notified 4309 * that some devices have changed, so we do a report 4310 * physical luns and report logical luns cmd, and adjust 4311 * our list of devices accordingly. 4312 * 4313 * The scsi3addr's of devices won't change so long as the 4314 * adapter is not reset. That means we can rescan and 4315 * tell which devices we already know about, vs. new 4316 * devices, vs. disappearing devices. 4317 */ 4318 struct ReportExtendedLUNdata *physdev_list = NULL; 4319 struct ReportLUNdata *logdev_list = NULL; 4320 struct bmic_identify_physical_device *id_phys = NULL; 4321 struct bmic_identify_controller *id_ctlr = NULL; 4322 u32 nphysicals = 0; 4323 u32 nlogicals = 0; 4324 u32 nlocal_logicals = 0; 4325 u32 ndev_allocated = 0; 4326 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4327 int ncurrent = 0; 4328 int i, n_ext_target_devs, ndevs_to_allocate; 4329 int raid_ctlr_position; 4330 bool physical_device; 4331 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4332 4333 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 4334 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4335 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4336 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4337 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4338 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4339 4340 if (!currentsd || !physdev_list || !logdev_list || 4341 !tmpdevice || !id_phys || !id_ctlr) { 4342 dev_err(&h->pdev->dev, "out of memory\n"); 4343 goto out; 4344 } 4345 memset(lunzerobits, 0, sizeof(lunzerobits)); 4346 4347 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4348 4349 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4350 logdev_list, &nlogicals)) { 4351 h->drv_req_rescan = 1; 4352 goto out; 4353 } 4354 4355 /* Set number of local logicals (non PTRAID) */ 4356 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4357 dev_warn(&h->pdev->dev, 4358 "%s: Can't determine number of local logical devices.\n", 4359 __func__); 4360 } 4361 4362 /* We might see up to the maximum number of logical and physical disks 4363 * plus external target devices, and a device for the local RAID 4364 * controller. 4365 */ 4366 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4367 4368 hpsa_ext_ctrl_present(h, physdev_list); 4369 4370 /* Allocate the per device structures */ 4371 for (i = 0; i < ndevs_to_allocate; i++) { 4372 if (i >= HPSA_MAX_DEVICES) { 4373 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4374 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4375 ndevs_to_allocate - HPSA_MAX_DEVICES); 4376 break; 4377 } 4378 4379 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4380 if (!currentsd[i]) { 4381 h->drv_req_rescan = 1; 4382 goto out; 4383 } 4384 ndev_allocated++; 4385 } 4386 4387 if (is_scsi_rev_5(h)) 4388 raid_ctlr_position = 0; 4389 else 4390 raid_ctlr_position = nphysicals + nlogicals; 4391 4392 /* adjust our table of devices */ 4393 n_ext_target_devs = 0; 4394 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4395 u8 *lunaddrbytes, is_OBDR = 0; 4396 int rc = 0; 4397 int phys_dev_index = i - (raid_ctlr_position == 0); 4398 bool skip_device = false; 4399 4400 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4401 4402 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4403 4404 /* Figure out where the LUN ID info is coming from */ 4405 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4406 i, nphysicals, nlogicals, physdev_list, logdev_list); 4407 4408 /* Determine if this is a lun from an external target array */ 4409 tmpdevice->external = 4410 figure_external_status(h, raid_ctlr_position, i, 4411 nphysicals, nlocal_logicals); 4412 4413 /* 4414 * Skip over some devices such as a spare. 4415 */ 4416 if (!tmpdevice->external && physical_device) { 4417 skip_device = hpsa_skip_device(h, lunaddrbytes, 4418 &physdev_list->LUN[phys_dev_index]); 4419 if (skip_device) 4420 continue; 4421 } 4422 4423 /* Get device type, vendor, model, device id, raid_map */ 4424 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4425 &is_OBDR); 4426 if (rc == -ENOMEM) { 4427 dev_warn(&h->pdev->dev, 4428 "Out of memory, rescan deferred.\n"); 4429 h->drv_req_rescan = 1; 4430 goto out; 4431 } 4432 if (rc) { 4433 h->drv_req_rescan = 1; 4434 continue; 4435 } 4436 4437 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4438 this_device = currentsd[ncurrent]; 4439 4440 *this_device = *tmpdevice; 4441 this_device->physical_device = physical_device; 4442 4443 /* 4444 * Expose all devices except for physical devices that 4445 * are masked. 4446 */ 4447 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4448 this_device->expose_device = 0; 4449 else 4450 this_device->expose_device = 1; 4451 4452 4453 /* 4454 * Get the SAS address for physical devices that are exposed. 4455 */ 4456 if (this_device->physical_device && this_device->expose_device) 4457 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4458 4459 switch (this_device->devtype) { 4460 case TYPE_ROM: 4461 /* We don't *really* support actual CD-ROM devices, 4462 * just "One Button Disaster Recovery" tape drive 4463 * which temporarily pretends to be a CD-ROM drive. 4464 * So we check that the device is really an OBDR tape 4465 * device by checking for "$DR-10" in bytes 43-48 of 4466 * the inquiry data. 4467 */ 4468 if (is_OBDR) 4469 ncurrent++; 4470 break; 4471 case TYPE_DISK: 4472 case TYPE_ZBC: 4473 if (this_device->physical_device) { 4474 /* The disk is in HBA mode. */ 4475 /* Never use RAID mapper in HBA mode. */ 4476 this_device->offload_enabled = 0; 4477 hpsa_get_ioaccel_drive_info(h, this_device, 4478 physdev_list, phys_dev_index, id_phys); 4479 hpsa_get_path_info(this_device, 4480 physdev_list, phys_dev_index, id_phys); 4481 } 4482 ncurrent++; 4483 break; 4484 case TYPE_TAPE: 4485 case TYPE_MEDIUM_CHANGER: 4486 ncurrent++; 4487 break; 4488 case TYPE_ENCLOSURE: 4489 if (!this_device->external) 4490 hpsa_get_enclosure_info(h, lunaddrbytes, 4491 physdev_list, phys_dev_index, 4492 this_device); 4493 ncurrent++; 4494 break; 4495 case TYPE_RAID: 4496 /* Only present the Smartarray HBA as a RAID controller. 4497 * If it's a RAID controller other than the HBA itself 4498 * (an external RAID controller, MSA500 or similar) 4499 * don't present it. 4500 */ 4501 if (!is_hba_lunid(lunaddrbytes)) 4502 break; 4503 ncurrent++; 4504 break; 4505 default: 4506 break; 4507 } 4508 if (ncurrent >= HPSA_MAX_DEVICES) 4509 break; 4510 } 4511 4512 if (h->sas_host == NULL) { 4513 int rc = 0; 4514 4515 rc = hpsa_add_sas_host(h); 4516 if (rc) { 4517 dev_warn(&h->pdev->dev, 4518 "Could not add sas host %d\n", rc); 4519 goto out; 4520 } 4521 } 4522 4523 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4524 out: 4525 kfree(tmpdevice); 4526 for (i = 0; i < ndev_allocated; i++) 4527 kfree(currentsd[i]); 4528 kfree(currentsd); 4529 kfree(physdev_list); 4530 kfree(logdev_list); 4531 kfree(id_ctlr); 4532 kfree(id_phys); 4533 } 4534 4535 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4536 struct scatterlist *sg) 4537 { 4538 u64 addr64 = (u64) sg_dma_address(sg); 4539 unsigned int len = sg_dma_len(sg); 4540 4541 desc->Addr = cpu_to_le64(addr64); 4542 desc->Len = cpu_to_le32(len); 4543 desc->Ext = 0; 4544 } 4545 4546 /* 4547 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4548 * dma mapping and fills in the scatter gather entries of the 4549 * hpsa command, cp. 4550 */ 4551 static int hpsa_scatter_gather(struct ctlr_info *h, 4552 struct CommandList *cp, 4553 struct scsi_cmnd *cmd) 4554 { 4555 struct scatterlist *sg; 4556 int use_sg, i, sg_limit, chained, last_sg; 4557 struct SGDescriptor *curr_sg; 4558 4559 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4560 4561 use_sg = scsi_dma_map(cmd); 4562 if (use_sg < 0) 4563 return use_sg; 4564 4565 if (!use_sg) 4566 goto sglist_finished; 4567 4568 /* 4569 * If the number of entries is greater than the max for a single list, 4570 * then we have a chained list; we will set up all but one entry in the 4571 * first list (the last entry is saved for link information); 4572 * otherwise, we don't have a chained list and we'll set up at each of 4573 * the entries in the one list. 4574 */ 4575 curr_sg = cp->SG; 4576 chained = use_sg > h->max_cmd_sg_entries; 4577 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4578 last_sg = scsi_sg_count(cmd) - 1; 4579 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4580 hpsa_set_sg_descriptor(curr_sg, sg); 4581 curr_sg++; 4582 } 4583 4584 if (chained) { 4585 /* 4586 * Continue with the chained list. Set curr_sg to the chained 4587 * list. Modify the limit to the total count less the entries 4588 * we've already set up. Resume the scan at the list entry 4589 * where the previous loop left off. 4590 */ 4591 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4592 sg_limit = use_sg - sg_limit; 4593 for_each_sg(sg, sg, sg_limit, i) { 4594 hpsa_set_sg_descriptor(curr_sg, sg); 4595 curr_sg++; 4596 } 4597 } 4598 4599 /* Back the pointer up to the last entry and mark it as "last". */ 4600 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4601 4602 if (use_sg + chained > h->maxSG) 4603 h->maxSG = use_sg + chained; 4604 4605 if (chained) { 4606 cp->Header.SGList = h->max_cmd_sg_entries; 4607 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4608 if (hpsa_map_sg_chain_block(h, cp)) { 4609 scsi_dma_unmap(cmd); 4610 return -1; 4611 } 4612 return 0; 4613 } 4614 4615 sglist_finished: 4616 4617 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4618 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4619 return 0; 4620 } 4621 4622 #define BUFLEN 128 4623 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4624 u8 *cdb, int cdb_len, 4625 const char *func) 4626 { 4627 char buf[BUFLEN]; 4628 int outlen; 4629 int i; 4630 4631 outlen = scnprintf(buf, BUFLEN, 4632 "%s: Blocking zero-length request: CDB:", func); 4633 for (i = 0; i < cdb_len; i++) 4634 outlen += scnprintf(buf+outlen, BUFLEN - outlen, 4635 "%02hhx", cdb[i]); 4636 dev_warn(&h->pdev->dev, "%s\n", buf); 4637 } 4638 4639 #define IO_ACCEL_INELIGIBLE 1 4640 /* zero-length transfers trigger hardware errors. */ 4641 static bool is_zero_length_transfer(u8 *cdb) 4642 { 4643 u32 block_cnt; 4644 4645 /* Block zero-length transfer sizes on certain commands. */ 4646 switch (cdb[0]) { 4647 case READ_10: 4648 case WRITE_10: 4649 case VERIFY: /* 0x2F */ 4650 case WRITE_VERIFY: /* 0x2E */ 4651 block_cnt = get_unaligned_be16(&cdb[7]); 4652 break; 4653 case READ_12: 4654 case WRITE_12: 4655 case VERIFY_12: /* 0xAF */ 4656 case WRITE_VERIFY_12: /* 0xAE */ 4657 block_cnt = get_unaligned_be32(&cdb[6]); 4658 break; 4659 case READ_16: 4660 case WRITE_16: 4661 case VERIFY_16: /* 0x8F */ 4662 block_cnt = get_unaligned_be32(&cdb[10]); 4663 break; 4664 default: 4665 return false; 4666 } 4667 4668 return block_cnt == 0; 4669 } 4670 4671 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4672 { 4673 int is_write = 0; 4674 u32 block; 4675 u32 block_cnt; 4676 4677 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4678 switch (cdb[0]) { 4679 case WRITE_6: 4680 case WRITE_12: 4681 is_write = 1; 4682 case READ_6: 4683 case READ_12: 4684 if (*cdb_len == 6) { 4685 block = (((cdb[1] & 0x1F) << 16) | 4686 (cdb[2] << 8) | 4687 cdb[3]); 4688 block_cnt = cdb[4]; 4689 if (block_cnt == 0) 4690 block_cnt = 256; 4691 } else { 4692 BUG_ON(*cdb_len != 12); 4693 block = get_unaligned_be32(&cdb[2]); 4694 block_cnt = get_unaligned_be32(&cdb[6]); 4695 } 4696 if (block_cnt > 0xffff) 4697 return IO_ACCEL_INELIGIBLE; 4698 4699 cdb[0] = is_write ? WRITE_10 : READ_10; 4700 cdb[1] = 0; 4701 cdb[2] = (u8) (block >> 24); 4702 cdb[3] = (u8) (block >> 16); 4703 cdb[4] = (u8) (block >> 8); 4704 cdb[5] = (u8) (block); 4705 cdb[6] = 0; 4706 cdb[7] = (u8) (block_cnt >> 8); 4707 cdb[8] = (u8) (block_cnt); 4708 cdb[9] = 0; 4709 *cdb_len = 10; 4710 break; 4711 } 4712 return 0; 4713 } 4714 4715 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4716 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4717 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4718 { 4719 struct scsi_cmnd *cmd = c->scsi_cmd; 4720 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4721 unsigned int len; 4722 unsigned int total_len = 0; 4723 struct scatterlist *sg; 4724 u64 addr64; 4725 int use_sg, i; 4726 struct SGDescriptor *curr_sg; 4727 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4728 4729 /* TODO: implement chaining support */ 4730 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4731 atomic_dec(&phys_disk->ioaccel_cmds_out); 4732 return IO_ACCEL_INELIGIBLE; 4733 } 4734 4735 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4736 4737 if (is_zero_length_transfer(cdb)) { 4738 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4739 atomic_dec(&phys_disk->ioaccel_cmds_out); 4740 return IO_ACCEL_INELIGIBLE; 4741 } 4742 4743 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4744 atomic_dec(&phys_disk->ioaccel_cmds_out); 4745 return IO_ACCEL_INELIGIBLE; 4746 } 4747 4748 c->cmd_type = CMD_IOACCEL1; 4749 4750 /* Adjust the DMA address to point to the accelerated command buffer */ 4751 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4752 (c->cmdindex * sizeof(*cp)); 4753 BUG_ON(c->busaddr & 0x0000007F); 4754 4755 use_sg = scsi_dma_map(cmd); 4756 if (use_sg < 0) { 4757 atomic_dec(&phys_disk->ioaccel_cmds_out); 4758 return use_sg; 4759 } 4760 4761 if (use_sg) { 4762 curr_sg = cp->SG; 4763 scsi_for_each_sg(cmd, sg, use_sg, i) { 4764 addr64 = (u64) sg_dma_address(sg); 4765 len = sg_dma_len(sg); 4766 total_len += len; 4767 curr_sg->Addr = cpu_to_le64(addr64); 4768 curr_sg->Len = cpu_to_le32(len); 4769 curr_sg->Ext = cpu_to_le32(0); 4770 curr_sg++; 4771 } 4772 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4773 4774 switch (cmd->sc_data_direction) { 4775 case DMA_TO_DEVICE: 4776 control |= IOACCEL1_CONTROL_DATA_OUT; 4777 break; 4778 case DMA_FROM_DEVICE: 4779 control |= IOACCEL1_CONTROL_DATA_IN; 4780 break; 4781 case DMA_NONE: 4782 control |= IOACCEL1_CONTROL_NODATAXFER; 4783 break; 4784 default: 4785 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4786 cmd->sc_data_direction); 4787 BUG(); 4788 break; 4789 } 4790 } else { 4791 control |= IOACCEL1_CONTROL_NODATAXFER; 4792 } 4793 4794 c->Header.SGList = use_sg; 4795 /* Fill out the command structure to submit */ 4796 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4797 cp->transfer_len = cpu_to_le32(total_len); 4798 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4799 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4800 cp->control = cpu_to_le32(control); 4801 memcpy(cp->CDB, cdb, cdb_len); 4802 memcpy(cp->CISS_LUN, scsi3addr, 8); 4803 /* Tag was already set at init time. */ 4804 enqueue_cmd_and_start_io(h, c); 4805 return 0; 4806 } 4807 4808 /* 4809 * Queue a command directly to a device behind the controller using the 4810 * I/O accelerator path. 4811 */ 4812 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4813 struct CommandList *c) 4814 { 4815 struct scsi_cmnd *cmd = c->scsi_cmd; 4816 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4817 4818 if (!dev) 4819 return -1; 4820 4821 c->phys_disk = dev; 4822 4823 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4824 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4825 } 4826 4827 /* 4828 * Set encryption parameters for the ioaccel2 request 4829 */ 4830 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4831 struct CommandList *c, struct io_accel2_cmd *cp) 4832 { 4833 struct scsi_cmnd *cmd = c->scsi_cmd; 4834 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4835 struct raid_map_data *map = &dev->raid_map; 4836 u64 first_block; 4837 4838 /* Are we doing encryption on this device */ 4839 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4840 return; 4841 /* Set the data encryption key index. */ 4842 cp->dekindex = map->dekindex; 4843 4844 /* Set the encryption enable flag, encoded into direction field. */ 4845 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4846 4847 /* Set encryption tweak values based on logical block address 4848 * If block size is 512, tweak value is LBA. 4849 * For other block sizes, tweak is (LBA * block size)/ 512) 4850 */ 4851 switch (cmd->cmnd[0]) { 4852 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4853 case READ_6: 4854 case WRITE_6: 4855 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4856 (cmd->cmnd[2] << 8) | 4857 cmd->cmnd[3]); 4858 break; 4859 case WRITE_10: 4860 case READ_10: 4861 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4862 case WRITE_12: 4863 case READ_12: 4864 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4865 break; 4866 case WRITE_16: 4867 case READ_16: 4868 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4869 break; 4870 default: 4871 dev_err(&h->pdev->dev, 4872 "ERROR: %s: size (0x%x) not supported for encryption\n", 4873 __func__, cmd->cmnd[0]); 4874 BUG(); 4875 break; 4876 } 4877 4878 if (le32_to_cpu(map->volume_blk_size) != 512) 4879 first_block = first_block * 4880 le32_to_cpu(map->volume_blk_size)/512; 4881 4882 cp->tweak_lower = cpu_to_le32(first_block); 4883 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4884 } 4885 4886 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4887 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4888 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4889 { 4890 struct scsi_cmnd *cmd = c->scsi_cmd; 4891 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4892 struct ioaccel2_sg_element *curr_sg; 4893 int use_sg, i; 4894 struct scatterlist *sg; 4895 u64 addr64; 4896 u32 len; 4897 u32 total_len = 0; 4898 4899 if (!cmd->device) 4900 return -1; 4901 4902 if (!cmd->device->hostdata) 4903 return -1; 4904 4905 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4906 4907 if (is_zero_length_transfer(cdb)) { 4908 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4909 atomic_dec(&phys_disk->ioaccel_cmds_out); 4910 return IO_ACCEL_INELIGIBLE; 4911 } 4912 4913 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4914 atomic_dec(&phys_disk->ioaccel_cmds_out); 4915 return IO_ACCEL_INELIGIBLE; 4916 } 4917 4918 c->cmd_type = CMD_IOACCEL2; 4919 /* Adjust the DMA address to point to the accelerated command buffer */ 4920 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4921 (c->cmdindex * sizeof(*cp)); 4922 BUG_ON(c->busaddr & 0x0000007F); 4923 4924 memset(cp, 0, sizeof(*cp)); 4925 cp->IU_type = IOACCEL2_IU_TYPE; 4926 4927 use_sg = scsi_dma_map(cmd); 4928 if (use_sg < 0) { 4929 atomic_dec(&phys_disk->ioaccel_cmds_out); 4930 return use_sg; 4931 } 4932 4933 if (use_sg) { 4934 curr_sg = cp->sg; 4935 if (use_sg > h->ioaccel_maxsg) { 4936 addr64 = le64_to_cpu( 4937 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4938 curr_sg->address = cpu_to_le64(addr64); 4939 curr_sg->length = 0; 4940 curr_sg->reserved[0] = 0; 4941 curr_sg->reserved[1] = 0; 4942 curr_sg->reserved[2] = 0; 4943 curr_sg->chain_indicator = 0x80; 4944 4945 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4946 } 4947 scsi_for_each_sg(cmd, sg, use_sg, i) { 4948 addr64 = (u64) sg_dma_address(sg); 4949 len = sg_dma_len(sg); 4950 total_len += len; 4951 curr_sg->address = cpu_to_le64(addr64); 4952 curr_sg->length = cpu_to_le32(len); 4953 curr_sg->reserved[0] = 0; 4954 curr_sg->reserved[1] = 0; 4955 curr_sg->reserved[2] = 0; 4956 curr_sg->chain_indicator = 0; 4957 curr_sg++; 4958 } 4959 4960 switch (cmd->sc_data_direction) { 4961 case DMA_TO_DEVICE: 4962 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4963 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4964 break; 4965 case DMA_FROM_DEVICE: 4966 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4967 cp->direction |= IOACCEL2_DIR_DATA_IN; 4968 break; 4969 case DMA_NONE: 4970 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4971 cp->direction |= IOACCEL2_DIR_NO_DATA; 4972 break; 4973 default: 4974 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4975 cmd->sc_data_direction); 4976 BUG(); 4977 break; 4978 } 4979 } else { 4980 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4981 cp->direction |= IOACCEL2_DIR_NO_DATA; 4982 } 4983 4984 /* Set encryption parameters, if necessary */ 4985 set_encrypt_ioaccel2(h, c, cp); 4986 4987 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4988 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4989 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4990 4991 cp->data_len = cpu_to_le32(total_len); 4992 cp->err_ptr = cpu_to_le64(c->busaddr + 4993 offsetof(struct io_accel2_cmd, error_data)); 4994 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 4995 4996 /* fill in sg elements */ 4997 if (use_sg > h->ioaccel_maxsg) { 4998 cp->sg_count = 1; 4999 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5000 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5001 atomic_dec(&phys_disk->ioaccel_cmds_out); 5002 scsi_dma_unmap(cmd); 5003 return -1; 5004 } 5005 } else 5006 cp->sg_count = (u8) use_sg; 5007 5008 enqueue_cmd_and_start_io(h, c); 5009 return 0; 5010 } 5011 5012 /* 5013 * Queue a command to the correct I/O accelerator path. 5014 */ 5015 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5016 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5017 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5018 { 5019 if (!c->scsi_cmd->device) 5020 return -1; 5021 5022 if (!c->scsi_cmd->device->hostdata) 5023 return -1; 5024 5025 /* Try to honor the device's queue depth */ 5026 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5027 phys_disk->queue_depth) { 5028 atomic_dec(&phys_disk->ioaccel_cmds_out); 5029 return IO_ACCEL_INELIGIBLE; 5030 } 5031 if (h->transMethod & CFGTBL_Trans_io_accel1) 5032 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5033 cdb, cdb_len, scsi3addr, 5034 phys_disk); 5035 else 5036 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5037 cdb, cdb_len, scsi3addr, 5038 phys_disk); 5039 } 5040 5041 static void raid_map_helper(struct raid_map_data *map, 5042 int offload_to_mirror, u32 *map_index, u32 *current_group) 5043 { 5044 if (offload_to_mirror == 0) { 5045 /* use physical disk in the first mirrored group. */ 5046 *map_index %= le16_to_cpu(map->data_disks_per_row); 5047 return; 5048 } 5049 do { 5050 /* determine mirror group that *map_index indicates */ 5051 *current_group = *map_index / 5052 le16_to_cpu(map->data_disks_per_row); 5053 if (offload_to_mirror == *current_group) 5054 continue; 5055 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5056 /* select map index from next group */ 5057 *map_index += le16_to_cpu(map->data_disks_per_row); 5058 (*current_group)++; 5059 } else { 5060 /* select map index from first group */ 5061 *map_index %= le16_to_cpu(map->data_disks_per_row); 5062 *current_group = 0; 5063 } 5064 } while (offload_to_mirror != *current_group); 5065 } 5066 5067 /* 5068 * Attempt to perform offload RAID mapping for a logical volume I/O. 5069 */ 5070 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5071 struct CommandList *c) 5072 { 5073 struct scsi_cmnd *cmd = c->scsi_cmd; 5074 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5075 struct raid_map_data *map = &dev->raid_map; 5076 struct raid_map_disk_data *dd = &map->data[0]; 5077 int is_write = 0; 5078 u32 map_index; 5079 u64 first_block, last_block; 5080 u32 block_cnt; 5081 u32 blocks_per_row; 5082 u64 first_row, last_row; 5083 u32 first_row_offset, last_row_offset; 5084 u32 first_column, last_column; 5085 u64 r0_first_row, r0_last_row; 5086 u32 r5or6_blocks_per_row; 5087 u64 r5or6_first_row, r5or6_last_row; 5088 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5089 u32 r5or6_first_column, r5or6_last_column; 5090 u32 total_disks_per_row; 5091 u32 stripesize; 5092 u32 first_group, last_group, current_group; 5093 u32 map_row; 5094 u32 disk_handle; 5095 u64 disk_block; 5096 u32 disk_block_cnt; 5097 u8 cdb[16]; 5098 u8 cdb_len; 5099 u16 strip_size; 5100 #if BITS_PER_LONG == 32 5101 u64 tmpdiv; 5102 #endif 5103 int offload_to_mirror; 5104 5105 if (!dev) 5106 return -1; 5107 5108 /* check for valid opcode, get LBA and block count */ 5109 switch (cmd->cmnd[0]) { 5110 case WRITE_6: 5111 is_write = 1; 5112 case READ_6: 5113 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5114 (cmd->cmnd[2] << 8) | 5115 cmd->cmnd[3]); 5116 block_cnt = cmd->cmnd[4]; 5117 if (block_cnt == 0) 5118 block_cnt = 256; 5119 break; 5120 case WRITE_10: 5121 is_write = 1; 5122 case READ_10: 5123 first_block = 5124 (((u64) cmd->cmnd[2]) << 24) | 5125 (((u64) cmd->cmnd[3]) << 16) | 5126 (((u64) cmd->cmnd[4]) << 8) | 5127 cmd->cmnd[5]; 5128 block_cnt = 5129 (((u32) cmd->cmnd[7]) << 8) | 5130 cmd->cmnd[8]; 5131 break; 5132 case WRITE_12: 5133 is_write = 1; 5134 case READ_12: 5135 first_block = 5136 (((u64) cmd->cmnd[2]) << 24) | 5137 (((u64) cmd->cmnd[3]) << 16) | 5138 (((u64) cmd->cmnd[4]) << 8) | 5139 cmd->cmnd[5]; 5140 block_cnt = 5141 (((u32) cmd->cmnd[6]) << 24) | 5142 (((u32) cmd->cmnd[7]) << 16) | 5143 (((u32) cmd->cmnd[8]) << 8) | 5144 cmd->cmnd[9]; 5145 break; 5146 case WRITE_16: 5147 is_write = 1; 5148 case READ_16: 5149 first_block = 5150 (((u64) cmd->cmnd[2]) << 56) | 5151 (((u64) cmd->cmnd[3]) << 48) | 5152 (((u64) cmd->cmnd[4]) << 40) | 5153 (((u64) cmd->cmnd[5]) << 32) | 5154 (((u64) cmd->cmnd[6]) << 24) | 5155 (((u64) cmd->cmnd[7]) << 16) | 5156 (((u64) cmd->cmnd[8]) << 8) | 5157 cmd->cmnd[9]; 5158 block_cnt = 5159 (((u32) cmd->cmnd[10]) << 24) | 5160 (((u32) cmd->cmnd[11]) << 16) | 5161 (((u32) cmd->cmnd[12]) << 8) | 5162 cmd->cmnd[13]; 5163 break; 5164 default: 5165 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5166 } 5167 last_block = first_block + block_cnt - 1; 5168 5169 /* check for write to non-RAID-0 */ 5170 if (is_write && dev->raid_level != 0) 5171 return IO_ACCEL_INELIGIBLE; 5172 5173 /* check for invalid block or wraparound */ 5174 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5175 last_block < first_block) 5176 return IO_ACCEL_INELIGIBLE; 5177 5178 /* calculate stripe information for the request */ 5179 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5180 le16_to_cpu(map->strip_size); 5181 strip_size = le16_to_cpu(map->strip_size); 5182 #if BITS_PER_LONG == 32 5183 tmpdiv = first_block; 5184 (void) do_div(tmpdiv, blocks_per_row); 5185 first_row = tmpdiv; 5186 tmpdiv = last_block; 5187 (void) do_div(tmpdiv, blocks_per_row); 5188 last_row = tmpdiv; 5189 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5190 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5191 tmpdiv = first_row_offset; 5192 (void) do_div(tmpdiv, strip_size); 5193 first_column = tmpdiv; 5194 tmpdiv = last_row_offset; 5195 (void) do_div(tmpdiv, strip_size); 5196 last_column = tmpdiv; 5197 #else 5198 first_row = first_block / blocks_per_row; 5199 last_row = last_block / blocks_per_row; 5200 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5201 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5202 first_column = first_row_offset / strip_size; 5203 last_column = last_row_offset / strip_size; 5204 #endif 5205 5206 /* if this isn't a single row/column then give to the controller */ 5207 if ((first_row != last_row) || (first_column != last_column)) 5208 return IO_ACCEL_INELIGIBLE; 5209 5210 /* proceeding with driver mapping */ 5211 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5212 le16_to_cpu(map->metadata_disks_per_row); 5213 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5214 le16_to_cpu(map->row_cnt); 5215 map_index = (map_row * total_disks_per_row) + first_column; 5216 5217 switch (dev->raid_level) { 5218 case HPSA_RAID_0: 5219 break; /* nothing special to do */ 5220 case HPSA_RAID_1: 5221 /* Handles load balance across RAID 1 members. 5222 * (2-drive R1 and R10 with even # of drives.) 5223 * Appropriate for SSDs, not optimal for HDDs 5224 */ 5225 BUG_ON(le16_to_cpu(map->layout_map_count) != 2); 5226 if (dev->offload_to_mirror) 5227 map_index += le16_to_cpu(map->data_disks_per_row); 5228 dev->offload_to_mirror = !dev->offload_to_mirror; 5229 break; 5230 case HPSA_RAID_ADM: 5231 /* Handles N-way mirrors (R1-ADM) 5232 * and R10 with # of drives divisible by 3.) 5233 */ 5234 BUG_ON(le16_to_cpu(map->layout_map_count) != 3); 5235 5236 offload_to_mirror = dev->offload_to_mirror; 5237 raid_map_helper(map, offload_to_mirror, 5238 &map_index, ¤t_group); 5239 /* set mirror group to use next time */ 5240 offload_to_mirror = 5241 (offload_to_mirror >= 5242 le16_to_cpu(map->layout_map_count) - 1) 5243 ? 0 : offload_to_mirror + 1; 5244 dev->offload_to_mirror = offload_to_mirror; 5245 /* Avoid direct use of dev->offload_to_mirror within this 5246 * function since multiple threads might simultaneously 5247 * increment it beyond the range of dev->layout_map_count -1. 5248 */ 5249 break; 5250 case HPSA_RAID_5: 5251 case HPSA_RAID_6: 5252 if (le16_to_cpu(map->layout_map_count) <= 1) 5253 break; 5254 5255 /* Verify first and last block are in same RAID group */ 5256 r5or6_blocks_per_row = 5257 le16_to_cpu(map->strip_size) * 5258 le16_to_cpu(map->data_disks_per_row); 5259 BUG_ON(r5or6_blocks_per_row == 0); 5260 stripesize = r5or6_blocks_per_row * 5261 le16_to_cpu(map->layout_map_count); 5262 #if BITS_PER_LONG == 32 5263 tmpdiv = first_block; 5264 first_group = do_div(tmpdiv, stripesize); 5265 tmpdiv = first_group; 5266 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5267 first_group = tmpdiv; 5268 tmpdiv = last_block; 5269 last_group = do_div(tmpdiv, stripesize); 5270 tmpdiv = last_group; 5271 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5272 last_group = tmpdiv; 5273 #else 5274 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5275 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5276 #endif 5277 if (first_group != last_group) 5278 return IO_ACCEL_INELIGIBLE; 5279 5280 /* Verify request is in a single row of RAID 5/6 */ 5281 #if BITS_PER_LONG == 32 5282 tmpdiv = first_block; 5283 (void) do_div(tmpdiv, stripesize); 5284 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5285 tmpdiv = last_block; 5286 (void) do_div(tmpdiv, stripesize); 5287 r5or6_last_row = r0_last_row = tmpdiv; 5288 #else 5289 first_row = r5or6_first_row = r0_first_row = 5290 first_block / stripesize; 5291 r5or6_last_row = r0_last_row = last_block / stripesize; 5292 #endif 5293 if (r5or6_first_row != r5or6_last_row) 5294 return IO_ACCEL_INELIGIBLE; 5295 5296 5297 /* Verify request is in a single column */ 5298 #if BITS_PER_LONG == 32 5299 tmpdiv = first_block; 5300 first_row_offset = do_div(tmpdiv, stripesize); 5301 tmpdiv = first_row_offset; 5302 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5303 r5or6_first_row_offset = first_row_offset; 5304 tmpdiv = last_block; 5305 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5306 tmpdiv = r5or6_last_row_offset; 5307 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5308 tmpdiv = r5or6_first_row_offset; 5309 (void) do_div(tmpdiv, map->strip_size); 5310 first_column = r5or6_first_column = tmpdiv; 5311 tmpdiv = r5or6_last_row_offset; 5312 (void) do_div(tmpdiv, map->strip_size); 5313 r5or6_last_column = tmpdiv; 5314 #else 5315 first_row_offset = r5or6_first_row_offset = 5316 (u32)((first_block % stripesize) % 5317 r5or6_blocks_per_row); 5318 5319 r5or6_last_row_offset = 5320 (u32)((last_block % stripesize) % 5321 r5or6_blocks_per_row); 5322 5323 first_column = r5or6_first_column = 5324 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5325 r5or6_last_column = 5326 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5327 #endif 5328 if (r5or6_first_column != r5or6_last_column) 5329 return IO_ACCEL_INELIGIBLE; 5330 5331 /* Request is eligible */ 5332 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5333 le16_to_cpu(map->row_cnt); 5334 5335 map_index = (first_group * 5336 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5337 (map_row * total_disks_per_row) + first_column; 5338 break; 5339 default: 5340 return IO_ACCEL_INELIGIBLE; 5341 } 5342 5343 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5344 return IO_ACCEL_INELIGIBLE; 5345 5346 c->phys_disk = dev->phys_disk[map_index]; 5347 if (!c->phys_disk) 5348 return IO_ACCEL_INELIGIBLE; 5349 5350 disk_handle = dd[map_index].ioaccel_handle; 5351 disk_block = le64_to_cpu(map->disk_starting_blk) + 5352 first_row * le16_to_cpu(map->strip_size) + 5353 (first_row_offset - first_column * 5354 le16_to_cpu(map->strip_size)); 5355 disk_block_cnt = block_cnt; 5356 5357 /* handle differing logical/physical block sizes */ 5358 if (map->phys_blk_shift) { 5359 disk_block <<= map->phys_blk_shift; 5360 disk_block_cnt <<= map->phys_blk_shift; 5361 } 5362 BUG_ON(disk_block_cnt > 0xffff); 5363 5364 /* build the new CDB for the physical disk I/O */ 5365 if (disk_block > 0xffffffff) { 5366 cdb[0] = is_write ? WRITE_16 : READ_16; 5367 cdb[1] = 0; 5368 cdb[2] = (u8) (disk_block >> 56); 5369 cdb[3] = (u8) (disk_block >> 48); 5370 cdb[4] = (u8) (disk_block >> 40); 5371 cdb[5] = (u8) (disk_block >> 32); 5372 cdb[6] = (u8) (disk_block >> 24); 5373 cdb[7] = (u8) (disk_block >> 16); 5374 cdb[8] = (u8) (disk_block >> 8); 5375 cdb[9] = (u8) (disk_block); 5376 cdb[10] = (u8) (disk_block_cnt >> 24); 5377 cdb[11] = (u8) (disk_block_cnt >> 16); 5378 cdb[12] = (u8) (disk_block_cnt >> 8); 5379 cdb[13] = (u8) (disk_block_cnt); 5380 cdb[14] = 0; 5381 cdb[15] = 0; 5382 cdb_len = 16; 5383 } else { 5384 cdb[0] = is_write ? WRITE_10 : READ_10; 5385 cdb[1] = 0; 5386 cdb[2] = (u8) (disk_block >> 24); 5387 cdb[3] = (u8) (disk_block >> 16); 5388 cdb[4] = (u8) (disk_block >> 8); 5389 cdb[5] = (u8) (disk_block); 5390 cdb[6] = 0; 5391 cdb[7] = (u8) (disk_block_cnt >> 8); 5392 cdb[8] = (u8) (disk_block_cnt); 5393 cdb[9] = 0; 5394 cdb_len = 10; 5395 } 5396 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5397 dev->scsi3addr, 5398 dev->phys_disk[map_index]); 5399 } 5400 5401 /* 5402 * Submit commands down the "normal" RAID stack path 5403 * All callers to hpsa_ciss_submit must check lockup_detected 5404 * beforehand, before (opt.) and after calling cmd_alloc 5405 */ 5406 static int hpsa_ciss_submit(struct ctlr_info *h, 5407 struct CommandList *c, struct scsi_cmnd *cmd, 5408 unsigned char scsi3addr[]) 5409 { 5410 cmd->host_scribble = (unsigned char *) c; 5411 c->cmd_type = CMD_SCSI; 5412 c->scsi_cmd = cmd; 5413 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5414 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 5415 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5416 5417 /* Fill in the request block... */ 5418 5419 c->Request.Timeout = 0; 5420 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5421 c->Request.CDBLen = cmd->cmd_len; 5422 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5423 switch (cmd->sc_data_direction) { 5424 case DMA_TO_DEVICE: 5425 c->Request.type_attr_dir = 5426 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5427 break; 5428 case DMA_FROM_DEVICE: 5429 c->Request.type_attr_dir = 5430 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5431 break; 5432 case DMA_NONE: 5433 c->Request.type_attr_dir = 5434 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5435 break; 5436 case DMA_BIDIRECTIONAL: 5437 /* This can happen if a buggy application does a scsi passthru 5438 * and sets both inlen and outlen to non-zero. ( see 5439 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5440 */ 5441 5442 c->Request.type_attr_dir = 5443 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5444 /* This is technically wrong, and hpsa controllers should 5445 * reject it with CMD_INVALID, which is the most correct 5446 * response, but non-fibre backends appear to let it 5447 * slide by, and give the same results as if this field 5448 * were set correctly. Either way is acceptable for 5449 * our purposes here. 5450 */ 5451 5452 break; 5453 5454 default: 5455 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5456 cmd->sc_data_direction); 5457 BUG(); 5458 break; 5459 } 5460 5461 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5462 hpsa_cmd_resolve_and_free(h, c); 5463 return SCSI_MLQUEUE_HOST_BUSY; 5464 } 5465 enqueue_cmd_and_start_io(h, c); 5466 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5467 return 0; 5468 } 5469 5470 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5471 struct CommandList *c) 5472 { 5473 dma_addr_t cmd_dma_handle, err_dma_handle; 5474 5475 /* Zero out all of commandlist except the last field, refcount */ 5476 memset(c, 0, offsetof(struct CommandList, refcount)); 5477 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5478 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5479 c->err_info = h->errinfo_pool + index; 5480 memset(c->err_info, 0, sizeof(*c->err_info)); 5481 err_dma_handle = h->errinfo_pool_dhandle 5482 + index * sizeof(*c->err_info); 5483 c->cmdindex = index; 5484 c->busaddr = (u32) cmd_dma_handle; 5485 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5486 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5487 c->h = h; 5488 c->scsi_cmd = SCSI_CMD_IDLE; 5489 } 5490 5491 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5492 { 5493 int i; 5494 5495 for (i = 0; i < h->nr_cmds; i++) { 5496 struct CommandList *c = h->cmd_pool + i; 5497 5498 hpsa_cmd_init(h, i, c); 5499 atomic_set(&c->refcount, 0); 5500 } 5501 } 5502 5503 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5504 struct CommandList *c) 5505 { 5506 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5507 5508 BUG_ON(c->cmdindex != index); 5509 5510 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5511 memset(c->err_info, 0, sizeof(*c->err_info)); 5512 c->busaddr = (u32) cmd_dma_handle; 5513 } 5514 5515 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5516 struct CommandList *c, struct scsi_cmnd *cmd, 5517 unsigned char *scsi3addr) 5518 { 5519 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5520 int rc = IO_ACCEL_INELIGIBLE; 5521 5522 if (!dev) 5523 return SCSI_MLQUEUE_HOST_BUSY; 5524 5525 cmd->host_scribble = (unsigned char *) c; 5526 5527 if (dev->offload_enabled) { 5528 hpsa_cmd_init(h, c->cmdindex, c); 5529 c->cmd_type = CMD_SCSI; 5530 c->scsi_cmd = cmd; 5531 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5532 if (rc < 0) /* scsi_dma_map failed. */ 5533 rc = SCSI_MLQUEUE_HOST_BUSY; 5534 } else if (dev->hba_ioaccel_enabled) { 5535 hpsa_cmd_init(h, c->cmdindex, c); 5536 c->cmd_type = CMD_SCSI; 5537 c->scsi_cmd = cmd; 5538 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5539 if (rc < 0) /* scsi_dma_map failed. */ 5540 rc = SCSI_MLQUEUE_HOST_BUSY; 5541 } 5542 return rc; 5543 } 5544 5545 static void hpsa_command_resubmit_worker(struct work_struct *work) 5546 { 5547 struct scsi_cmnd *cmd; 5548 struct hpsa_scsi_dev_t *dev; 5549 struct CommandList *c = container_of(work, struct CommandList, work); 5550 5551 cmd = c->scsi_cmd; 5552 dev = cmd->device->hostdata; 5553 if (!dev) { 5554 cmd->result = DID_NO_CONNECT << 16; 5555 return hpsa_cmd_free_and_done(c->h, c, cmd); 5556 } 5557 if (c->reset_pending) 5558 return hpsa_cmd_free_and_done(c->h, c, cmd); 5559 if (c->cmd_type == CMD_IOACCEL2) { 5560 struct ctlr_info *h = c->h; 5561 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5562 int rc; 5563 5564 if (c2->error_data.serv_response == 5565 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5566 rc = hpsa_ioaccel_submit(h, c, cmd, dev->scsi3addr); 5567 if (rc == 0) 5568 return; 5569 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5570 /* 5571 * If we get here, it means dma mapping failed. 5572 * Try again via scsi mid layer, which will 5573 * then get SCSI_MLQUEUE_HOST_BUSY. 5574 */ 5575 cmd->result = DID_IMM_RETRY << 16; 5576 return hpsa_cmd_free_and_done(h, c, cmd); 5577 } 5578 /* else, fall thru and resubmit down CISS path */ 5579 } 5580 } 5581 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5582 if (hpsa_ciss_submit(c->h, c, cmd, dev->scsi3addr)) { 5583 /* 5584 * If we get here, it means dma mapping failed. Try 5585 * again via scsi mid layer, which will then get 5586 * SCSI_MLQUEUE_HOST_BUSY. 5587 * 5588 * hpsa_ciss_submit will have already freed c 5589 * if it encountered a dma mapping failure. 5590 */ 5591 cmd->result = DID_IMM_RETRY << 16; 5592 cmd->scsi_done(cmd); 5593 } 5594 } 5595 5596 /* Running in struct Scsi_Host->host_lock less mode */ 5597 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5598 { 5599 struct ctlr_info *h; 5600 struct hpsa_scsi_dev_t *dev; 5601 unsigned char scsi3addr[8]; 5602 struct CommandList *c; 5603 int rc = 0; 5604 5605 /* Get the ptr to our adapter structure out of cmd->host. */ 5606 h = sdev_to_hba(cmd->device); 5607 5608 BUG_ON(cmd->request->tag < 0); 5609 5610 dev = cmd->device->hostdata; 5611 if (!dev) { 5612 cmd->result = DID_NO_CONNECT << 16; 5613 cmd->scsi_done(cmd); 5614 return 0; 5615 } 5616 5617 if (dev->removed) { 5618 cmd->result = DID_NO_CONNECT << 16; 5619 cmd->scsi_done(cmd); 5620 return 0; 5621 } 5622 5623 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 5624 5625 if (unlikely(lockup_detected(h))) { 5626 cmd->result = DID_NO_CONNECT << 16; 5627 cmd->scsi_done(cmd); 5628 return 0; 5629 } 5630 c = cmd_tagged_alloc(h, cmd); 5631 5632 /* 5633 * Call alternate submit routine for I/O accelerated commands. 5634 * Retries always go down the normal I/O path. 5635 */ 5636 if (likely(cmd->retries == 0 && 5637 !blk_rq_is_passthrough(cmd->request) && 5638 h->acciopath_status)) { 5639 rc = hpsa_ioaccel_submit(h, c, cmd, scsi3addr); 5640 if (rc == 0) 5641 return 0; 5642 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5643 hpsa_cmd_resolve_and_free(h, c); 5644 return SCSI_MLQUEUE_HOST_BUSY; 5645 } 5646 } 5647 return hpsa_ciss_submit(h, c, cmd, scsi3addr); 5648 } 5649 5650 static void hpsa_scan_complete(struct ctlr_info *h) 5651 { 5652 unsigned long flags; 5653 5654 spin_lock_irqsave(&h->scan_lock, flags); 5655 h->scan_finished = 1; 5656 wake_up(&h->scan_wait_queue); 5657 spin_unlock_irqrestore(&h->scan_lock, flags); 5658 } 5659 5660 static void hpsa_scan_start(struct Scsi_Host *sh) 5661 { 5662 struct ctlr_info *h = shost_to_hba(sh); 5663 unsigned long flags; 5664 5665 /* 5666 * Don't let rescans be initiated on a controller known to be locked 5667 * up. If the controller locks up *during* a rescan, that thread is 5668 * probably hosed, but at least we can prevent new rescan threads from 5669 * piling up on a locked up controller. 5670 */ 5671 if (unlikely(lockup_detected(h))) 5672 return hpsa_scan_complete(h); 5673 5674 /* 5675 * If a scan is already waiting to run, no need to add another 5676 */ 5677 spin_lock_irqsave(&h->scan_lock, flags); 5678 if (h->scan_waiting) { 5679 spin_unlock_irqrestore(&h->scan_lock, flags); 5680 return; 5681 } 5682 5683 spin_unlock_irqrestore(&h->scan_lock, flags); 5684 5685 /* wait until any scan already in progress is finished. */ 5686 while (1) { 5687 spin_lock_irqsave(&h->scan_lock, flags); 5688 if (h->scan_finished) 5689 break; 5690 h->scan_waiting = 1; 5691 spin_unlock_irqrestore(&h->scan_lock, flags); 5692 wait_event(h->scan_wait_queue, h->scan_finished); 5693 /* Note: We don't need to worry about a race between this 5694 * thread and driver unload because the midlayer will 5695 * have incremented the reference count, so unload won't 5696 * happen if we're in here. 5697 */ 5698 } 5699 h->scan_finished = 0; /* mark scan as in progress */ 5700 h->scan_waiting = 0; 5701 spin_unlock_irqrestore(&h->scan_lock, flags); 5702 5703 if (unlikely(lockup_detected(h))) 5704 return hpsa_scan_complete(h); 5705 5706 /* 5707 * Do the scan after a reset completion 5708 */ 5709 spin_lock_irqsave(&h->reset_lock, flags); 5710 if (h->reset_in_progress) { 5711 h->drv_req_rescan = 1; 5712 spin_unlock_irqrestore(&h->reset_lock, flags); 5713 hpsa_scan_complete(h); 5714 return; 5715 } 5716 spin_unlock_irqrestore(&h->reset_lock, flags); 5717 5718 hpsa_update_scsi_devices(h); 5719 5720 hpsa_scan_complete(h); 5721 } 5722 5723 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5724 { 5725 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5726 5727 if (!logical_drive) 5728 return -ENODEV; 5729 5730 if (qdepth < 1) 5731 qdepth = 1; 5732 else if (qdepth > logical_drive->queue_depth) 5733 qdepth = logical_drive->queue_depth; 5734 5735 return scsi_change_queue_depth(sdev, qdepth); 5736 } 5737 5738 static int hpsa_scan_finished(struct Scsi_Host *sh, 5739 unsigned long elapsed_time) 5740 { 5741 struct ctlr_info *h = shost_to_hba(sh); 5742 unsigned long flags; 5743 int finished; 5744 5745 spin_lock_irqsave(&h->scan_lock, flags); 5746 finished = h->scan_finished; 5747 spin_unlock_irqrestore(&h->scan_lock, flags); 5748 return finished; 5749 } 5750 5751 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5752 { 5753 struct Scsi_Host *sh; 5754 5755 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5756 if (sh == NULL) { 5757 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5758 return -ENOMEM; 5759 } 5760 5761 sh->io_port = 0; 5762 sh->n_io_port = 0; 5763 sh->this_id = -1; 5764 sh->max_channel = 3; 5765 sh->max_cmd_len = MAX_COMMAND_SIZE; 5766 sh->max_lun = HPSA_MAX_LUN; 5767 sh->max_id = HPSA_MAX_LUN; 5768 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5769 sh->cmd_per_lun = sh->can_queue; 5770 sh->sg_tablesize = h->maxsgentries; 5771 sh->transportt = hpsa_sas_transport_template; 5772 sh->hostdata[0] = (unsigned long) h; 5773 sh->irq = pci_irq_vector(h->pdev, 0); 5774 sh->unique_id = sh->irq; 5775 5776 h->scsi_host = sh; 5777 return 0; 5778 } 5779 5780 static int hpsa_scsi_add_host(struct ctlr_info *h) 5781 { 5782 int rv; 5783 5784 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5785 if (rv) { 5786 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5787 return rv; 5788 } 5789 scsi_scan_host(h->scsi_host); 5790 return 0; 5791 } 5792 5793 /* 5794 * The block layer has already gone to the trouble of picking out a unique, 5795 * small-integer tag for this request. We use an offset from that value as 5796 * an index to select our command block. (The offset allows us to reserve the 5797 * low-numbered entries for our own uses.) 5798 */ 5799 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5800 { 5801 int idx = scmd->request->tag; 5802 5803 if (idx < 0) 5804 return idx; 5805 5806 /* Offset to leave space for internal cmds. */ 5807 return idx += HPSA_NRESERVED_CMDS; 5808 } 5809 5810 /* 5811 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5812 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5813 */ 5814 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5815 struct CommandList *c, unsigned char lunaddr[], 5816 int reply_queue) 5817 { 5818 int rc; 5819 5820 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5821 (void) fill_cmd(c, TEST_UNIT_READY, h, 5822 NULL, 0, 0, lunaddr, TYPE_CMD); 5823 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, DEFAULT_TIMEOUT); 5824 if (rc) 5825 return rc; 5826 /* no unmap needed here because no data xfer. */ 5827 5828 /* Check if the unit is already ready. */ 5829 if (c->err_info->CommandStatus == CMD_SUCCESS) 5830 return 0; 5831 5832 /* 5833 * The first command sent after reset will receive "unit attention" to 5834 * indicate that the LUN has been reset...this is actually what we're 5835 * looking for (but, success is good too). 5836 */ 5837 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5838 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5839 (c->err_info->SenseInfo[2] == NO_SENSE || 5840 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5841 return 0; 5842 5843 return 1; 5844 } 5845 5846 /* 5847 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5848 * returns zero when the unit is ready, and non-zero when giving up. 5849 */ 5850 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5851 struct CommandList *c, 5852 unsigned char lunaddr[], int reply_queue) 5853 { 5854 int rc; 5855 int count = 0; 5856 int waittime = 1; /* seconds */ 5857 5858 /* Send test unit ready until device ready, or give up. */ 5859 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5860 5861 /* 5862 * Wait for a bit. do this first, because if we send 5863 * the TUR right away, the reset will just abort it. 5864 */ 5865 msleep(1000 * waittime); 5866 5867 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5868 if (!rc) 5869 break; 5870 5871 /* Increase wait time with each try, up to a point. */ 5872 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5873 waittime *= 2; 5874 5875 dev_warn(&h->pdev->dev, 5876 "waiting %d secs for device to become ready.\n", 5877 waittime); 5878 } 5879 5880 return rc; 5881 } 5882 5883 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5884 unsigned char lunaddr[], 5885 int reply_queue) 5886 { 5887 int first_queue; 5888 int last_queue; 5889 int rq; 5890 int rc = 0; 5891 struct CommandList *c; 5892 5893 c = cmd_alloc(h); 5894 5895 /* 5896 * If no specific reply queue was requested, then send the TUR 5897 * repeatedly, requesting a reply on each reply queue; otherwise execute 5898 * the loop exactly once using only the specified queue. 5899 */ 5900 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5901 first_queue = 0; 5902 last_queue = h->nreply_queues - 1; 5903 } else { 5904 first_queue = reply_queue; 5905 last_queue = reply_queue; 5906 } 5907 5908 for (rq = first_queue; rq <= last_queue; rq++) { 5909 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5910 if (rc) 5911 break; 5912 } 5913 5914 if (rc) 5915 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5916 else 5917 dev_warn(&h->pdev->dev, "device is ready.\n"); 5918 5919 cmd_free(h, c); 5920 return rc; 5921 } 5922 5923 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5924 * complaining. Doing a host- or bus-reset can't do anything good here. 5925 */ 5926 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5927 { 5928 int rc = SUCCESS; 5929 struct ctlr_info *h; 5930 struct hpsa_scsi_dev_t *dev; 5931 u8 reset_type; 5932 char msg[48]; 5933 unsigned long flags; 5934 5935 /* find the controller to which the command to be aborted was sent */ 5936 h = sdev_to_hba(scsicmd->device); 5937 if (h == NULL) /* paranoia */ 5938 return FAILED; 5939 5940 spin_lock_irqsave(&h->reset_lock, flags); 5941 h->reset_in_progress = 1; 5942 spin_unlock_irqrestore(&h->reset_lock, flags); 5943 5944 if (lockup_detected(h)) { 5945 rc = FAILED; 5946 goto return_reset_status; 5947 } 5948 5949 dev = scsicmd->device->hostdata; 5950 if (!dev) { 5951 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 5952 rc = FAILED; 5953 goto return_reset_status; 5954 } 5955 5956 if (dev->devtype == TYPE_ENCLOSURE) { 5957 rc = SUCCESS; 5958 goto return_reset_status; 5959 } 5960 5961 /* if controller locked up, we can guarantee command won't complete */ 5962 if (lockup_detected(h)) { 5963 snprintf(msg, sizeof(msg), 5964 "cmd %d RESET FAILED, lockup detected", 5965 hpsa_get_cmd_index(scsicmd)); 5966 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5967 rc = FAILED; 5968 goto return_reset_status; 5969 } 5970 5971 /* this reset request might be the result of a lockup; check */ 5972 if (detect_controller_lockup(h)) { 5973 snprintf(msg, sizeof(msg), 5974 "cmd %d RESET FAILED, new lockup detected", 5975 hpsa_get_cmd_index(scsicmd)); 5976 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5977 rc = FAILED; 5978 goto return_reset_status; 5979 } 5980 5981 /* Do not attempt on controller */ 5982 if (is_hba_lunid(dev->scsi3addr)) { 5983 rc = SUCCESS; 5984 goto return_reset_status; 5985 } 5986 5987 if (is_logical_dev_addr_mode(dev->scsi3addr)) 5988 reset_type = HPSA_DEVICE_RESET_MSG; 5989 else 5990 reset_type = HPSA_PHYS_TARGET_RESET; 5991 5992 sprintf(msg, "resetting %s", 5993 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 5994 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 5995 5996 /* send a reset to the SCSI LUN which the command was sent to */ 5997 rc = hpsa_do_reset(h, dev, dev->scsi3addr, reset_type, 5998 DEFAULT_REPLY_QUEUE); 5999 if (rc == 0) 6000 rc = SUCCESS; 6001 else 6002 rc = FAILED; 6003 6004 sprintf(msg, "reset %s %s", 6005 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6006 rc == SUCCESS ? "completed successfully" : "failed"); 6007 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6008 6009 return_reset_status: 6010 spin_lock_irqsave(&h->reset_lock, flags); 6011 h->reset_in_progress = 0; 6012 spin_unlock_irqrestore(&h->reset_lock, flags); 6013 return rc; 6014 } 6015 6016 /* 6017 * For operations with an associated SCSI command, a command block is allocated 6018 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6019 * block request tag as an index into a table of entries. cmd_tagged_free() is 6020 * the complement, although cmd_free() may be called instead. 6021 */ 6022 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6023 struct scsi_cmnd *scmd) 6024 { 6025 int idx = hpsa_get_cmd_index(scmd); 6026 struct CommandList *c = h->cmd_pool + idx; 6027 6028 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6029 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6030 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6031 /* The index value comes from the block layer, so if it's out of 6032 * bounds, it's probably not our bug. 6033 */ 6034 BUG(); 6035 } 6036 6037 atomic_inc(&c->refcount); 6038 if (unlikely(!hpsa_is_cmd_idle(c))) { 6039 /* 6040 * We expect that the SCSI layer will hand us a unique tag 6041 * value. Thus, there should never be a collision here between 6042 * two requests...because if the selected command isn't idle 6043 * then someone is going to be very disappointed. 6044 */ 6045 dev_err(&h->pdev->dev, 6046 "tag collision (tag=%d) in cmd_tagged_alloc().\n", 6047 idx); 6048 if (c->scsi_cmd != NULL) 6049 scsi_print_command(c->scsi_cmd); 6050 scsi_print_command(scmd); 6051 } 6052 6053 hpsa_cmd_partial_init(h, idx, c); 6054 return c; 6055 } 6056 6057 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6058 { 6059 /* 6060 * Release our reference to the block. We don't need to do anything 6061 * else to free it, because it is accessed by index. 6062 */ 6063 (void)atomic_dec(&c->refcount); 6064 } 6065 6066 /* 6067 * For operations that cannot sleep, a command block is allocated at init, 6068 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6069 * which ones are free or in use. Lock must be held when calling this. 6070 * cmd_free() is the complement. 6071 * This function never gives up and returns NULL. If it hangs, 6072 * another thread must call cmd_free() to free some tags. 6073 */ 6074 6075 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6076 { 6077 struct CommandList *c; 6078 int refcount, i; 6079 int offset = 0; 6080 6081 /* 6082 * There is some *extremely* small but non-zero chance that that 6083 * multiple threads could get in here, and one thread could 6084 * be scanning through the list of bits looking for a free 6085 * one, but the free ones are always behind him, and other 6086 * threads sneak in behind him and eat them before he can 6087 * get to them, so that while there is always a free one, a 6088 * very unlucky thread might be starved anyway, never able to 6089 * beat the other threads. In reality, this happens so 6090 * infrequently as to be indistinguishable from never. 6091 * 6092 * Note that we start allocating commands before the SCSI host structure 6093 * is initialized. Since the search starts at bit zero, this 6094 * all works, since we have at least one command structure available; 6095 * however, it means that the structures with the low indexes have to be 6096 * reserved for driver-initiated requests, while requests from the block 6097 * layer will use the higher indexes. 6098 */ 6099 6100 for (;;) { 6101 i = find_next_zero_bit(h->cmd_pool_bits, 6102 HPSA_NRESERVED_CMDS, 6103 offset); 6104 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6105 offset = 0; 6106 continue; 6107 } 6108 c = h->cmd_pool + i; 6109 refcount = atomic_inc_return(&c->refcount); 6110 if (unlikely(refcount > 1)) { 6111 cmd_free(h, c); /* already in use */ 6112 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6113 continue; 6114 } 6115 set_bit(i & (BITS_PER_LONG - 1), 6116 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6117 break; /* it's ours now. */ 6118 } 6119 hpsa_cmd_partial_init(h, i, c); 6120 return c; 6121 } 6122 6123 /* 6124 * This is the complementary operation to cmd_alloc(). Note, however, in some 6125 * corner cases it may also be used to free blocks allocated by 6126 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6127 * the clear-bit is harmless. 6128 */ 6129 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6130 { 6131 if (atomic_dec_and_test(&c->refcount)) { 6132 int i; 6133 6134 i = c - h->cmd_pool; 6135 clear_bit(i & (BITS_PER_LONG - 1), 6136 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6137 } 6138 } 6139 6140 #ifdef CONFIG_COMPAT 6141 6142 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 6143 void __user *arg) 6144 { 6145 IOCTL32_Command_struct __user *arg32 = 6146 (IOCTL32_Command_struct __user *) arg; 6147 IOCTL_Command_struct arg64; 6148 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 6149 int err; 6150 u32 cp; 6151 6152 memset(&arg64, 0, sizeof(arg64)); 6153 err = 0; 6154 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6155 sizeof(arg64.LUN_info)); 6156 err |= copy_from_user(&arg64.Request, &arg32->Request, 6157 sizeof(arg64.Request)); 6158 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6159 sizeof(arg64.error_info)); 6160 err |= get_user(arg64.buf_size, &arg32->buf_size); 6161 err |= get_user(cp, &arg32->buf); 6162 arg64.buf = compat_ptr(cp); 6163 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6164 6165 if (err) 6166 return -EFAULT; 6167 6168 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 6169 if (err) 6170 return err; 6171 err |= copy_in_user(&arg32->error_info, &p->error_info, 6172 sizeof(arg32->error_info)); 6173 if (err) 6174 return -EFAULT; 6175 return err; 6176 } 6177 6178 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6179 int cmd, void __user *arg) 6180 { 6181 BIG_IOCTL32_Command_struct __user *arg32 = 6182 (BIG_IOCTL32_Command_struct __user *) arg; 6183 BIG_IOCTL_Command_struct arg64; 6184 BIG_IOCTL_Command_struct __user *p = 6185 compat_alloc_user_space(sizeof(arg64)); 6186 int err; 6187 u32 cp; 6188 6189 memset(&arg64, 0, sizeof(arg64)); 6190 err = 0; 6191 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 6192 sizeof(arg64.LUN_info)); 6193 err |= copy_from_user(&arg64.Request, &arg32->Request, 6194 sizeof(arg64.Request)); 6195 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 6196 sizeof(arg64.error_info)); 6197 err |= get_user(arg64.buf_size, &arg32->buf_size); 6198 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 6199 err |= get_user(cp, &arg32->buf); 6200 arg64.buf = compat_ptr(cp); 6201 err |= copy_to_user(p, &arg64, sizeof(arg64)); 6202 6203 if (err) 6204 return -EFAULT; 6205 6206 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 6207 if (err) 6208 return err; 6209 err |= copy_in_user(&arg32->error_info, &p->error_info, 6210 sizeof(arg32->error_info)); 6211 if (err) 6212 return -EFAULT; 6213 return err; 6214 } 6215 6216 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6217 { 6218 switch (cmd) { 6219 case CCISS_GETPCIINFO: 6220 case CCISS_GETINTINFO: 6221 case CCISS_SETINTINFO: 6222 case CCISS_GETNODENAME: 6223 case CCISS_SETNODENAME: 6224 case CCISS_GETHEARTBEAT: 6225 case CCISS_GETBUSTYPES: 6226 case CCISS_GETFIRMVER: 6227 case CCISS_GETDRIVVER: 6228 case CCISS_REVALIDVOLS: 6229 case CCISS_DEREGDISK: 6230 case CCISS_REGNEWDISK: 6231 case CCISS_REGNEWD: 6232 case CCISS_RESCANDISK: 6233 case CCISS_GETLUNINFO: 6234 return hpsa_ioctl(dev, cmd, arg); 6235 6236 case CCISS_PASSTHRU32: 6237 return hpsa_ioctl32_passthru(dev, cmd, arg); 6238 case CCISS_BIG_PASSTHRU32: 6239 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6240 6241 default: 6242 return -ENOIOCTLCMD; 6243 } 6244 } 6245 #endif 6246 6247 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6248 { 6249 struct hpsa_pci_info pciinfo; 6250 6251 if (!argp) 6252 return -EINVAL; 6253 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6254 pciinfo.bus = h->pdev->bus->number; 6255 pciinfo.dev_fn = h->pdev->devfn; 6256 pciinfo.board_id = h->board_id; 6257 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6258 return -EFAULT; 6259 return 0; 6260 } 6261 6262 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6263 { 6264 DriverVer_type DriverVer; 6265 unsigned char vmaj, vmin, vsubmin; 6266 int rc; 6267 6268 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6269 &vmaj, &vmin, &vsubmin); 6270 if (rc != 3) { 6271 dev_info(&h->pdev->dev, "driver version string '%s' " 6272 "unrecognized.", HPSA_DRIVER_VERSION); 6273 vmaj = 0; 6274 vmin = 0; 6275 vsubmin = 0; 6276 } 6277 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6278 if (!argp) 6279 return -EINVAL; 6280 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6281 return -EFAULT; 6282 return 0; 6283 } 6284 6285 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6286 { 6287 IOCTL_Command_struct iocommand; 6288 struct CommandList *c; 6289 char *buff = NULL; 6290 u64 temp64; 6291 int rc = 0; 6292 6293 if (!argp) 6294 return -EINVAL; 6295 if (!capable(CAP_SYS_RAWIO)) 6296 return -EPERM; 6297 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6298 return -EFAULT; 6299 if ((iocommand.buf_size < 1) && 6300 (iocommand.Request.Type.Direction != XFER_NONE)) { 6301 return -EINVAL; 6302 } 6303 if (iocommand.buf_size > 0) { 6304 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 6305 if (buff == NULL) 6306 return -ENOMEM; 6307 if (iocommand.Request.Type.Direction & XFER_WRITE) { 6308 /* Copy the data into the buffer we created */ 6309 if (copy_from_user(buff, iocommand.buf, 6310 iocommand.buf_size)) { 6311 rc = -EFAULT; 6312 goto out_kfree; 6313 } 6314 } else { 6315 memset(buff, 0, iocommand.buf_size); 6316 } 6317 } 6318 c = cmd_alloc(h); 6319 6320 /* Fill in the command type */ 6321 c->cmd_type = CMD_IOCTL_PEND; 6322 c->scsi_cmd = SCSI_CMD_BUSY; 6323 /* Fill in Command Header */ 6324 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6325 if (iocommand.buf_size > 0) { /* buffer to fill */ 6326 c->Header.SGList = 1; 6327 c->Header.SGTotal = cpu_to_le16(1); 6328 } else { /* no buffers to fill */ 6329 c->Header.SGList = 0; 6330 c->Header.SGTotal = cpu_to_le16(0); 6331 } 6332 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 6333 6334 /* Fill in Request block */ 6335 memcpy(&c->Request, &iocommand.Request, 6336 sizeof(c->Request)); 6337 6338 /* Fill in the scatter gather information */ 6339 if (iocommand.buf_size > 0) { 6340 temp64 = pci_map_single(h->pdev, buff, 6341 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 6342 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6343 c->SG[0].Addr = cpu_to_le64(0); 6344 c->SG[0].Len = cpu_to_le32(0); 6345 rc = -ENOMEM; 6346 goto out; 6347 } 6348 c->SG[0].Addr = cpu_to_le64(temp64); 6349 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 6350 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6351 } 6352 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6353 NO_TIMEOUT); 6354 if (iocommand.buf_size > 0) 6355 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 6356 check_ioctl_unit_attention(h, c); 6357 if (rc) { 6358 rc = -EIO; 6359 goto out; 6360 } 6361 6362 /* Copy the error information out */ 6363 memcpy(&iocommand.error_info, c->err_info, 6364 sizeof(iocommand.error_info)); 6365 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 6366 rc = -EFAULT; 6367 goto out; 6368 } 6369 if ((iocommand.Request.Type.Direction & XFER_READ) && 6370 iocommand.buf_size > 0) { 6371 /* Copy the data out of the buffer we created */ 6372 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 6373 rc = -EFAULT; 6374 goto out; 6375 } 6376 } 6377 out: 6378 cmd_free(h, c); 6379 out_kfree: 6380 kfree(buff); 6381 return rc; 6382 } 6383 6384 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 6385 { 6386 BIG_IOCTL_Command_struct *ioc; 6387 struct CommandList *c; 6388 unsigned char **buff = NULL; 6389 int *buff_size = NULL; 6390 u64 temp64; 6391 BYTE sg_used = 0; 6392 int status = 0; 6393 u32 left; 6394 u32 sz; 6395 BYTE __user *data_ptr; 6396 6397 if (!argp) 6398 return -EINVAL; 6399 if (!capable(CAP_SYS_RAWIO)) 6400 return -EPERM; 6401 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL); 6402 if (!ioc) { 6403 status = -ENOMEM; 6404 goto cleanup1; 6405 } 6406 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 6407 status = -EFAULT; 6408 goto cleanup1; 6409 } 6410 if ((ioc->buf_size < 1) && 6411 (ioc->Request.Type.Direction != XFER_NONE)) { 6412 status = -EINVAL; 6413 goto cleanup1; 6414 } 6415 /* Check kmalloc limits using all SGs */ 6416 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 6417 status = -EINVAL; 6418 goto cleanup1; 6419 } 6420 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 6421 status = -EINVAL; 6422 goto cleanup1; 6423 } 6424 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 6425 if (!buff) { 6426 status = -ENOMEM; 6427 goto cleanup1; 6428 } 6429 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 6430 if (!buff_size) { 6431 status = -ENOMEM; 6432 goto cleanup1; 6433 } 6434 left = ioc->buf_size; 6435 data_ptr = ioc->buf; 6436 while (left) { 6437 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6438 buff_size[sg_used] = sz; 6439 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6440 if (buff[sg_used] == NULL) { 6441 status = -ENOMEM; 6442 goto cleanup1; 6443 } 6444 if (ioc->Request.Type.Direction & XFER_WRITE) { 6445 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6446 status = -EFAULT; 6447 goto cleanup1; 6448 } 6449 } else 6450 memset(buff[sg_used], 0, sz); 6451 left -= sz; 6452 data_ptr += sz; 6453 sg_used++; 6454 } 6455 c = cmd_alloc(h); 6456 6457 c->cmd_type = CMD_IOCTL_PEND; 6458 c->scsi_cmd = SCSI_CMD_BUSY; 6459 c->Header.ReplyQueue = 0; 6460 c->Header.SGList = (u8) sg_used; 6461 c->Header.SGTotal = cpu_to_le16(sg_used); 6462 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6463 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6464 if (ioc->buf_size > 0) { 6465 int i; 6466 for (i = 0; i < sg_used; i++) { 6467 temp64 = pci_map_single(h->pdev, buff[i], 6468 buff_size[i], PCI_DMA_BIDIRECTIONAL); 6469 if (dma_mapping_error(&h->pdev->dev, 6470 (dma_addr_t) temp64)) { 6471 c->SG[i].Addr = cpu_to_le64(0); 6472 c->SG[i].Len = cpu_to_le32(0); 6473 hpsa_pci_unmap(h->pdev, c, i, 6474 PCI_DMA_BIDIRECTIONAL); 6475 status = -ENOMEM; 6476 goto cleanup0; 6477 } 6478 c->SG[i].Addr = cpu_to_le64(temp64); 6479 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6480 c->SG[i].Ext = cpu_to_le32(0); 6481 } 6482 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6483 } 6484 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6485 NO_TIMEOUT); 6486 if (sg_used) 6487 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 6488 check_ioctl_unit_attention(h, c); 6489 if (status) { 6490 status = -EIO; 6491 goto cleanup0; 6492 } 6493 6494 /* Copy the error information out */ 6495 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6496 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 6497 status = -EFAULT; 6498 goto cleanup0; 6499 } 6500 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6501 int i; 6502 6503 /* Copy the data out of the buffer we created */ 6504 BYTE __user *ptr = ioc->buf; 6505 for (i = 0; i < sg_used; i++) { 6506 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6507 status = -EFAULT; 6508 goto cleanup0; 6509 } 6510 ptr += buff_size[i]; 6511 } 6512 } 6513 status = 0; 6514 cleanup0: 6515 cmd_free(h, c); 6516 cleanup1: 6517 if (buff) { 6518 int i; 6519 6520 for (i = 0; i < sg_used; i++) 6521 kfree(buff[i]); 6522 kfree(buff); 6523 } 6524 kfree(buff_size); 6525 kfree(ioc); 6526 return status; 6527 } 6528 6529 static void check_ioctl_unit_attention(struct ctlr_info *h, 6530 struct CommandList *c) 6531 { 6532 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6533 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6534 (void) check_for_unit_attention(h, c); 6535 } 6536 6537 /* 6538 * ioctl 6539 */ 6540 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 6541 { 6542 struct ctlr_info *h; 6543 void __user *argp = (void __user *)arg; 6544 int rc; 6545 6546 h = sdev_to_hba(dev); 6547 6548 switch (cmd) { 6549 case CCISS_DEREGDISK: 6550 case CCISS_REGNEWDISK: 6551 case CCISS_REGNEWD: 6552 hpsa_scan_start(h->scsi_host); 6553 return 0; 6554 case CCISS_GETPCIINFO: 6555 return hpsa_getpciinfo_ioctl(h, argp); 6556 case CCISS_GETDRIVVER: 6557 return hpsa_getdrivver_ioctl(h, argp); 6558 case CCISS_PASSTHRU: 6559 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6560 return -EAGAIN; 6561 rc = hpsa_passthru_ioctl(h, argp); 6562 atomic_inc(&h->passthru_cmds_avail); 6563 return rc; 6564 case CCISS_BIG_PASSTHRU: 6565 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6566 return -EAGAIN; 6567 rc = hpsa_big_passthru_ioctl(h, argp); 6568 atomic_inc(&h->passthru_cmds_avail); 6569 return rc; 6570 default: 6571 return -ENOTTY; 6572 } 6573 } 6574 6575 static void hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 6576 u8 reset_type) 6577 { 6578 struct CommandList *c; 6579 6580 c = cmd_alloc(h); 6581 6582 /* fill_cmd can't fail here, no data buffer to map */ 6583 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6584 RAID_CTLR_LUNID, TYPE_MSG); 6585 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6586 c->waiting = NULL; 6587 enqueue_cmd_and_start_io(h, c); 6588 /* Don't wait for completion, the reset won't complete. Don't free 6589 * the command either. This is the last command we will send before 6590 * re-initializing everything, so it doesn't matter and won't leak. 6591 */ 6592 return; 6593 } 6594 6595 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6596 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6597 int cmd_type) 6598 { 6599 int pci_dir = XFER_NONE; 6600 6601 c->cmd_type = CMD_IOCTL_PEND; 6602 c->scsi_cmd = SCSI_CMD_BUSY; 6603 c->Header.ReplyQueue = 0; 6604 if (buff != NULL && size > 0) { 6605 c->Header.SGList = 1; 6606 c->Header.SGTotal = cpu_to_le16(1); 6607 } else { 6608 c->Header.SGList = 0; 6609 c->Header.SGTotal = cpu_to_le16(0); 6610 } 6611 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6612 6613 if (cmd_type == TYPE_CMD) { 6614 switch (cmd) { 6615 case HPSA_INQUIRY: 6616 /* are we trying to read a vital product page */ 6617 if (page_code & VPD_PAGE) { 6618 c->Request.CDB[1] = 0x01; 6619 c->Request.CDB[2] = (page_code & 0xff); 6620 } 6621 c->Request.CDBLen = 6; 6622 c->Request.type_attr_dir = 6623 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6624 c->Request.Timeout = 0; 6625 c->Request.CDB[0] = HPSA_INQUIRY; 6626 c->Request.CDB[4] = size & 0xFF; 6627 break; 6628 case RECEIVE_DIAGNOSTIC: 6629 c->Request.CDBLen = 6; 6630 c->Request.type_attr_dir = 6631 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6632 c->Request.Timeout = 0; 6633 c->Request.CDB[0] = cmd; 6634 c->Request.CDB[1] = 1; 6635 c->Request.CDB[2] = 1; 6636 c->Request.CDB[3] = (size >> 8) & 0xFF; 6637 c->Request.CDB[4] = size & 0xFF; 6638 break; 6639 case HPSA_REPORT_LOG: 6640 case HPSA_REPORT_PHYS: 6641 /* Talking to controller so It's a physical command 6642 mode = 00 target = 0. Nothing to write. 6643 */ 6644 c->Request.CDBLen = 12; 6645 c->Request.type_attr_dir = 6646 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6647 c->Request.Timeout = 0; 6648 c->Request.CDB[0] = cmd; 6649 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6650 c->Request.CDB[7] = (size >> 16) & 0xFF; 6651 c->Request.CDB[8] = (size >> 8) & 0xFF; 6652 c->Request.CDB[9] = size & 0xFF; 6653 break; 6654 case BMIC_SENSE_DIAG_OPTIONS: 6655 c->Request.CDBLen = 16; 6656 c->Request.type_attr_dir = 6657 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6658 c->Request.Timeout = 0; 6659 /* Spec says this should be BMIC_WRITE */ 6660 c->Request.CDB[0] = BMIC_READ; 6661 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6662 break; 6663 case BMIC_SET_DIAG_OPTIONS: 6664 c->Request.CDBLen = 16; 6665 c->Request.type_attr_dir = 6666 TYPE_ATTR_DIR(cmd_type, 6667 ATTR_SIMPLE, XFER_WRITE); 6668 c->Request.Timeout = 0; 6669 c->Request.CDB[0] = BMIC_WRITE; 6670 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6671 break; 6672 case HPSA_CACHE_FLUSH: 6673 c->Request.CDBLen = 12; 6674 c->Request.type_attr_dir = 6675 TYPE_ATTR_DIR(cmd_type, 6676 ATTR_SIMPLE, XFER_WRITE); 6677 c->Request.Timeout = 0; 6678 c->Request.CDB[0] = BMIC_WRITE; 6679 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6680 c->Request.CDB[7] = (size >> 8) & 0xFF; 6681 c->Request.CDB[8] = size & 0xFF; 6682 break; 6683 case TEST_UNIT_READY: 6684 c->Request.CDBLen = 6; 6685 c->Request.type_attr_dir = 6686 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6687 c->Request.Timeout = 0; 6688 break; 6689 case HPSA_GET_RAID_MAP: 6690 c->Request.CDBLen = 12; 6691 c->Request.type_attr_dir = 6692 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6693 c->Request.Timeout = 0; 6694 c->Request.CDB[0] = HPSA_CISS_READ; 6695 c->Request.CDB[1] = cmd; 6696 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6697 c->Request.CDB[7] = (size >> 16) & 0xFF; 6698 c->Request.CDB[8] = (size >> 8) & 0xFF; 6699 c->Request.CDB[9] = size & 0xFF; 6700 break; 6701 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6702 c->Request.CDBLen = 10; 6703 c->Request.type_attr_dir = 6704 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6705 c->Request.Timeout = 0; 6706 c->Request.CDB[0] = BMIC_READ; 6707 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6708 c->Request.CDB[7] = (size >> 16) & 0xFF; 6709 c->Request.CDB[8] = (size >> 8) & 0xFF; 6710 break; 6711 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6712 c->Request.CDBLen = 10; 6713 c->Request.type_attr_dir = 6714 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6715 c->Request.Timeout = 0; 6716 c->Request.CDB[0] = BMIC_READ; 6717 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6718 c->Request.CDB[7] = (size >> 16) & 0xFF; 6719 c->Request.CDB[8] = (size >> 8) & 0XFF; 6720 break; 6721 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6722 c->Request.CDBLen = 10; 6723 c->Request.type_attr_dir = 6724 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6725 c->Request.Timeout = 0; 6726 c->Request.CDB[0] = BMIC_READ; 6727 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6728 c->Request.CDB[7] = (size >> 16) & 0xFF; 6729 c->Request.CDB[8] = (size >> 8) & 0XFF; 6730 break; 6731 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6732 c->Request.CDBLen = 10; 6733 c->Request.type_attr_dir = 6734 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6735 c->Request.Timeout = 0; 6736 c->Request.CDB[0] = BMIC_READ; 6737 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6738 c->Request.CDB[7] = (size >> 16) & 0xFF; 6739 c->Request.CDB[8] = (size >> 8) & 0XFF; 6740 break; 6741 case BMIC_IDENTIFY_CONTROLLER: 6742 c->Request.CDBLen = 10; 6743 c->Request.type_attr_dir = 6744 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6745 c->Request.Timeout = 0; 6746 c->Request.CDB[0] = BMIC_READ; 6747 c->Request.CDB[1] = 0; 6748 c->Request.CDB[2] = 0; 6749 c->Request.CDB[3] = 0; 6750 c->Request.CDB[4] = 0; 6751 c->Request.CDB[5] = 0; 6752 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6753 c->Request.CDB[7] = (size >> 16) & 0xFF; 6754 c->Request.CDB[8] = (size >> 8) & 0XFF; 6755 c->Request.CDB[9] = 0; 6756 break; 6757 default: 6758 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6759 BUG(); 6760 } 6761 } else if (cmd_type == TYPE_MSG) { 6762 switch (cmd) { 6763 6764 case HPSA_PHYS_TARGET_RESET: 6765 c->Request.CDBLen = 16; 6766 c->Request.type_attr_dir = 6767 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6768 c->Request.Timeout = 0; /* Don't time out */ 6769 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6770 c->Request.CDB[0] = HPSA_RESET; 6771 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6772 /* Physical target reset needs no control bytes 4-7*/ 6773 c->Request.CDB[4] = 0x00; 6774 c->Request.CDB[5] = 0x00; 6775 c->Request.CDB[6] = 0x00; 6776 c->Request.CDB[7] = 0x00; 6777 break; 6778 case HPSA_DEVICE_RESET_MSG: 6779 c->Request.CDBLen = 16; 6780 c->Request.type_attr_dir = 6781 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6782 c->Request.Timeout = 0; /* Don't time out */ 6783 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6784 c->Request.CDB[0] = cmd; 6785 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6786 /* If bytes 4-7 are zero, it means reset the */ 6787 /* LunID device */ 6788 c->Request.CDB[4] = 0x00; 6789 c->Request.CDB[5] = 0x00; 6790 c->Request.CDB[6] = 0x00; 6791 c->Request.CDB[7] = 0x00; 6792 break; 6793 default: 6794 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6795 cmd); 6796 BUG(); 6797 } 6798 } else { 6799 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6800 BUG(); 6801 } 6802 6803 switch (GET_DIR(c->Request.type_attr_dir)) { 6804 case XFER_READ: 6805 pci_dir = PCI_DMA_FROMDEVICE; 6806 break; 6807 case XFER_WRITE: 6808 pci_dir = PCI_DMA_TODEVICE; 6809 break; 6810 case XFER_NONE: 6811 pci_dir = PCI_DMA_NONE; 6812 break; 6813 default: 6814 pci_dir = PCI_DMA_BIDIRECTIONAL; 6815 } 6816 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 6817 return -1; 6818 return 0; 6819 } 6820 6821 /* 6822 * Map (physical) PCI mem into (virtual) kernel space 6823 */ 6824 static void __iomem *remap_pci_mem(ulong base, ulong size) 6825 { 6826 ulong page_base = ((ulong) base) & PAGE_MASK; 6827 ulong page_offs = ((ulong) base) - page_base; 6828 void __iomem *page_remapped = ioremap_nocache(page_base, 6829 page_offs + size); 6830 6831 return page_remapped ? (page_remapped + page_offs) : NULL; 6832 } 6833 6834 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6835 { 6836 return h->access.command_completed(h, q); 6837 } 6838 6839 static inline bool interrupt_pending(struct ctlr_info *h) 6840 { 6841 return h->access.intr_pending(h); 6842 } 6843 6844 static inline long interrupt_not_for_us(struct ctlr_info *h) 6845 { 6846 return (h->access.intr_pending(h) == 0) || 6847 (h->interrupts_enabled == 0); 6848 } 6849 6850 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6851 u32 raw_tag) 6852 { 6853 if (unlikely(tag_index >= h->nr_cmds)) { 6854 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6855 return 1; 6856 } 6857 return 0; 6858 } 6859 6860 static inline void finish_cmd(struct CommandList *c) 6861 { 6862 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6863 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6864 || c->cmd_type == CMD_IOACCEL2)) 6865 complete_scsi_command(c); 6866 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6867 complete(c->waiting); 6868 } 6869 6870 /* process completion of an indexed ("direct lookup") command */ 6871 static inline void process_indexed_cmd(struct ctlr_info *h, 6872 u32 raw_tag) 6873 { 6874 u32 tag_index; 6875 struct CommandList *c; 6876 6877 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6878 if (!bad_tag(h, tag_index, raw_tag)) { 6879 c = h->cmd_pool + tag_index; 6880 finish_cmd(c); 6881 } 6882 } 6883 6884 /* Some controllers, like p400, will give us one interrupt 6885 * after a soft reset, even if we turned interrupts off. 6886 * Only need to check for this in the hpsa_xxx_discard_completions 6887 * functions. 6888 */ 6889 static int ignore_bogus_interrupt(struct ctlr_info *h) 6890 { 6891 if (likely(!reset_devices)) 6892 return 0; 6893 6894 if (likely(h->interrupts_enabled)) 6895 return 0; 6896 6897 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6898 "(known firmware bug.) Ignoring.\n"); 6899 6900 return 1; 6901 } 6902 6903 /* 6904 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6905 * Relies on (h-q[x] == x) being true for x such that 6906 * 0 <= x < MAX_REPLY_QUEUES. 6907 */ 6908 static struct ctlr_info *queue_to_hba(u8 *queue) 6909 { 6910 return container_of((queue - *queue), struct ctlr_info, q[0]); 6911 } 6912 6913 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6914 { 6915 struct ctlr_info *h = queue_to_hba(queue); 6916 u8 q = *(u8 *) queue; 6917 u32 raw_tag; 6918 6919 if (ignore_bogus_interrupt(h)) 6920 return IRQ_NONE; 6921 6922 if (interrupt_not_for_us(h)) 6923 return IRQ_NONE; 6924 h->last_intr_timestamp = get_jiffies_64(); 6925 while (interrupt_pending(h)) { 6926 raw_tag = get_next_completion(h, q); 6927 while (raw_tag != FIFO_EMPTY) 6928 raw_tag = next_command(h, q); 6929 } 6930 return IRQ_HANDLED; 6931 } 6932 6933 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6934 { 6935 struct ctlr_info *h = queue_to_hba(queue); 6936 u32 raw_tag; 6937 u8 q = *(u8 *) queue; 6938 6939 if (ignore_bogus_interrupt(h)) 6940 return IRQ_NONE; 6941 6942 h->last_intr_timestamp = get_jiffies_64(); 6943 raw_tag = get_next_completion(h, q); 6944 while (raw_tag != FIFO_EMPTY) 6945 raw_tag = next_command(h, q); 6946 return IRQ_HANDLED; 6947 } 6948 6949 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 6950 { 6951 struct ctlr_info *h = queue_to_hba((u8 *) queue); 6952 u32 raw_tag; 6953 u8 q = *(u8 *) queue; 6954 6955 if (interrupt_not_for_us(h)) 6956 return IRQ_NONE; 6957 h->last_intr_timestamp = get_jiffies_64(); 6958 while (interrupt_pending(h)) { 6959 raw_tag = get_next_completion(h, q); 6960 while (raw_tag != FIFO_EMPTY) { 6961 process_indexed_cmd(h, raw_tag); 6962 raw_tag = next_command(h, q); 6963 } 6964 } 6965 return IRQ_HANDLED; 6966 } 6967 6968 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 6969 { 6970 struct ctlr_info *h = queue_to_hba(queue); 6971 u32 raw_tag; 6972 u8 q = *(u8 *) queue; 6973 6974 h->last_intr_timestamp = get_jiffies_64(); 6975 raw_tag = get_next_completion(h, q); 6976 while (raw_tag != FIFO_EMPTY) { 6977 process_indexed_cmd(h, raw_tag); 6978 raw_tag = next_command(h, q); 6979 } 6980 return IRQ_HANDLED; 6981 } 6982 6983 /* Send a message CDB to the firmware. Careful, this only works 6984 * in simple mode, not performant mode due to the tag lookup. 6985 * We only ever use this immediately after a controller reset. 6986 */ 6987 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 6988 unsigned char type) 6989 { 6990 struct Command { 6991 struct CommandListHeader CommandHeader; 6992 struct RequestBlock Request; 6993 struct ErrDescriptor ErrorDescriptor; 6994 }; 6995 struct Command *cmd; 6996 static const size_t cmd_sz = sizeof(*cmd) + 6997 sizeof(cmd->ErrorDescriptor); 6998 dma_addr_t paddr64; 6999 __le32 paddr32; 7000 u32 tag; 7001 void __iomem *vaddr; 7002 int i, err; 7003 7004 vaddr = pci_ioremap_bar(pdev, 0); 7005 if (vaddr == NULL) 7006 return -ENOMEM; 7007 7008 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7009 * CCISS commands, so they must be allocated from the lower 4GiB of 7010 * memory. 7011 */ 7012 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 7013 if (err) { 7014 iounmap(vaddr); 7015 return err; 7016 } 7017 7018 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 7019 if (cmd == NULL) { 7020 iounmap(vaddr); 7021 return -ENOMEM; 7022 } 7023 7024 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7025 * although there's no guarantee, we assume that the address is at 7026 * least 4-byte aligned (most likely, it's page-aligned). 7027 */ 7028 paddr32 = cpu_to_le32(paddr64); 7029 7030 cmd->CommandHeader.ReplyQueue = 0; 7031 cmd->CommandHeader.SGList = 0; 7032 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7033 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7034 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7035 7036 cmd->Request.CDBLen = 16; 7037 cmd->Request.type_attr_dir = 7038 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7039 cmd->Request.Timeout = 0; /* Don't time out */ 7040 cmd->Request.CDB[0] = opcode; 7041 cmd->Request.CDB[1] = type; 7042 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7043 cmd->ErrorDescriptor.Addr = 7044 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7045 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7046 7047 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7048 7049 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7050 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7051 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7052 break; 7053 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7054 } 7055 7056 iounmap(vaddr); 7057 7058 /* we leak the DMA buffer here ... no choice since the controller could 7059 * still complete the command. 7060 */ 7061 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7062 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7063 opcode, type); 7064 return -ETIMEDOUT; 7065 } 7066 7067 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 7068 7069 if (tag & HPSA_ERROR_BIT) { 7070 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7071 opcode, type); 7072 return -EIO; 7073 } 7074 7075 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7076 opcode, type); 7077 return 0; 7078 } 7079 7080 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7081 7082 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7083 void __iomem *vaddr, u32 use_doorbell) 7084 { 7085 7086 if (use_doorbell) { 7087 /* For everything after the P600, the PCI power state method 7088 * of resetting the controller doesn't work, so we have this 7089 * other way using the doorbell register. 7090 */ 7091 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7092 writel(use_doorbell, vaddr + SA5_DOORBELL); 7093 7094 /* PMC hardware guys tell us we need a 10 second delay after 7095 * doorbell reset and before any attempt to talk to the board 7096 * at all to ensure that this actually works and doesn't fall 7097 * over in some weird corner cases. 7098 */ 7099 msleep(10000); 7100 } else { /* Try to do it the PCI power state way */ 7101 7102 /* Quoting from the Open CISS Specification: "The Power 7103 * Management Control/Status Register (CSR) controls the power 7104 * state of the device. The normal operating state is D0, 7105 * CSR=00h. The software off state is D3, CSR=03h. To reset 7106 * the controller, place the interface device in D3 then to D0, 7107 * this causes a secondary PCI reset which will reset the 7108 * controller." */ 7109 7110 int rc = 0; 7111 7112 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7113 7114 /* enter the D3hot power management state */ 7115 rc = pci_set_power_state(pdev, PCI_D3hot); 7116 if (rc) 7117 return rc; 7118 7119 msleep(500); 7120 7121 /* enter the D0 power management state */ 7122 rc = pci_set_power_state(pdev, PCI_D0); 7123 if (rc) 7124 return rc; 7125 7126 /* 7127 * The P600 requires a small delay when changing states. 7128 * Otherwise we may think the board did not reset and we bail. 7129 * This for kdump only and is particular to the P600. 7130 */ 7131 msleep(500); 7132 } 7133 return 0; 7134 } 7135 7136 static void init_driver_version(char *driver_version, int len) 7137 { 7138 memset(driver_version, 0, len); 7139 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7140 } 7141 7142 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7143 { 7144 char *driver_version; 7145 int i, size = sizeof(cfgtable->driver_version); 7146 7147 driver_version = kmalloc(size, GFP_KERNEL); 7148 if (!driver_version) 7149 return -ENOMEM; 7150 7151 init_driver_version(driver_version, size); 7152 for (i = 0; i < size; i++) 7153 writeb(driver_version[i], &cfgtable->driver_version[i]); 7154 kfree(driver_version); 7155 return 0; 7156 } 7157 7158 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7159 unsigned char *driver_ver) 7160 { 7161 int i; 7162 7163 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7164 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7165 } 7166 7167 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7168 { 7169 7170 char *driver_ver, *old_driver_ver; 7171 int rc, size = sizeof(cfgtable->driver_version); 7172 7173 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 7174 if (!old_driver_ver) 7175 return -ENOMEM; 7176 driver_ver = old_driver_ver + size; 7177 7178 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7179 * should have been changed, otherwise we know the reset failed. 7180 */ 7181 init_driver_version(old_driver_ver, size); 7182 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7183 rc = !memcmp(driver_ver, old_driver_ver, size); 7184 kfree(old_driver_ver); 7185 return rc; 7186 } 7187 /* This does a hard reset of the controller using PCI power management 7188 * states or the using the doorbell register. 7189 */ 7190 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7191 { 7192 u64 cfg_offset; 7193 u32 cfg_base_addr; 7194 u64 cfg_base_addr_index; 7195 void __iomem *vaddr; 7196 unsigned long paddr; 7197 u32 misc_fw_support; 7198 int rc; 7199 struct CfgTable __iomem *cfgtable; 7200 u32 use_doorbell; 7201 u16 command_register; 7202 7203 /* For controllers as old as the P600, this is very nearly 7204 * the same thing as 7205 * 7206 * pci_save_state(pci_dev); 7207 * pci_set_power_state(pci_dev, PCI_D3hot); 7208 * pci_set_power_state(pci_dev, PCI_D0); 7209 * pci_restore_state(pci_dev); 7210 * 7211 * For controllers newer than the P600, the pci power state 7212 * method of resetting doesn't work so we have another way 7213 * using the doorbell register. 7214 */ 7215 7216 if (!ctlr_is_resettable(board_id)) { 7217 dev_warn(&pdev->dev, "Controller not resettable\n"); 7218 return -ENODEV; 7219 } 7220 7221 /* if controller is soft- but not hard resettable... */ 7222 if (!ctlr_is_hard_resettable(board_id)) 7223 return -ENOTSUPP; /* try soft reset later. */ 7224 7225 /* Save the PCI command register */ 7226 pci_read_config_word(pdev, 4, &command_register); 7227 pci_save_state(pdev); 7228 7229 /* find the first memory BAR, so we can find the cfg table */ 7230 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7231 if (rc) 7232 return rc; 7233 vaddr = remap_pci_mem(paddr, 0x250); 7234 if (!vaddr) 7235 return -ENOMEM; 7236 7237 /* find cfgtable in order to check if reset via doorbell is supported */ 7238 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7239 &cfg_base_addr_index, &cfg_offset); 7240 if (rc) 7241 goto unmap_vaddr; 7242 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7243 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7244 if (!cfgtable) { 7245 rc = -ENOMEM; 7246 goto unmap_vaddr; 7247 } 7248 rc = write_driver_ver_to_cfgtable(cfgtable); 7249 if (rc) 7250 goto unmap_cfgtable; 7251 7252 /* If reset via doorbell register is supported, use that. 7253 * There are two such methods. Favor the newest method. 7254 */ 7255 misc_fw_support = readl(&cfgtable->misc_fw_support); 7256 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7257 if (use_doorbell) { 7258 use_doorbell = DOORBELL_CTLR_RESET2; 7259 } else { 7260 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7261 if (use_doorbell) { 7262 dev_warn(&pdev->dev, 7263 "Soft reset not supported. Firmware update is required.\n"); 7264 rc = -ENOTSUPP; /* try soft reset */ 7265 goto unmap_cfgtable; 7266 } 7267 } 7268 7269 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7270 if (rc) 7271 goto unmap_cfgtable; 7272 7273 pci_restore_state(pdev); 7274 pci_write_config_word(pdev, 4, command_register); 7275 7276 /* Some devices (notably the HP Smart Array 5i Controller) 7277 need a little pause here */ 7278 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7279 7280 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7281 if (rc) { 7282 dev_warn(&pdev->dev, 7283 "Failed waiting for board to become ready after hard reset\n"); 7284 goto unmap_cfgtable; 7285 } 7286 7287 rc = controller_reset_failed(vaddr); 7288 if (rc < 0) 7289 goto unmap_cfgtable; 7290 if (rc) { 7291 dev_warn(&pdev->dev, "Unable to successfully reset " 7292 "controller. Will try soft reset.\n"); 7293 rc = -ENOTSUPP; 7294 } else { 7295 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7296 } 7297 7298 unmap_cfgtable: 7299 iounmap(cfgtable); 7300 7301 unmap_vaddr: 7302 iounmap(vaddr); 7303 return rc; 7304 } 7305 7306 /* 7307 * We cannot read the structure directly, for portability we must use 7308 * the io functions. 7309 * This is for debug only. 7310 */ 7311 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7312 { 7313 #ifdef HPSA_DEBUG 7314 int i; 7315 char temp_name[17]; 7316 7317 dev_info(dev, "Controller Configuration information\n"); 7318 dev_info(dev, "------------------------------------\n"); 7319 for (i = 0; i < 4; i++) 7320 temp_name[i] = readb(&(tb->Signature[i])); 7321 temp_name[4] = '\0'; 7322 dev_info(dev, " Signature = %s\n", temp_name); 7323 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7324 dev_info(dev, " Transport methods supported = 0x%x\n", 7325 readl(&(tb->TransportSupport))); 7326 dev_info(dev, " Transport methods active = 0x%x\n", 7327 readl(&(tb->TransportActive))); 7328 dev_info(dev, " Requested transport Method = 0x%x\n", 7329 readl(&(tb->HostWrite.TransportRequest))); 7330 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7331 readl(&(tb->HostWrite.CoalIntDelay))); 7332 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7333 readl(&(tb->HostWrite.CoalIntCount))); 7334 dev_info(dev, " Max outstanding commands = %d\n", 7335 readl(&(tb->CmdsOutMax))); 7336 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7337 for (i = 0; i < 16; i++) 7338 temp_name[i] = readb(&(tb->ServerName[i])); 7339 temp_name[16] = '\0'; 7340 dev_info(dev, " Server Name = %s\n", temp_name); 7341 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7342 readl(&(tb->HeartBeat))); 7343 #endif /* HPSA_DEBUG */ 7344 } 7345 7346 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7347 { 7348 int i, offset, mem_type, bar_type; 7349 7350 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7351 return 0; 7352 offset = 0; 7353 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7354 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7355 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7356 offset += 4; 7357 else { 7358 mem_type = pci_resource_flags(pdev, i) & 7359 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7360 switch (mem_type) { 7361 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7362 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7363 offset += 4; /* 32 bit */ 7364 break; 7365 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7366 offset += 8; 7367 break; 7368 default: /* reserved in PCI 2.2 */ 7369 dev_warn(&pdev->dev, 7370 "base address is invalid\n"); 7371 return -1; 7372 break; 7373 } 7374 } 7375 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7376 return i + 1; 7377 } 7378 return -1; 7379 } 7380 7381 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7382 { 7383 pci_free_irq_vectors(h->pdev); 7384 h->msix_vectors = 0; 7385 } 7386 7387 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7388 * controllers that are capable. If not, we use legacy INTx mode. 7389 */ 7390 static int hpsa_interrupt_mode(struct ctlr_info *h) 7391 { 7392 unsigned int flags = PCI_IRQ_LEGACY; 7393 int ret; 7394 7395 /* Some boards advertise MSI but don't really support it */ 7396 switch (h->board_id) { 7397 case 0x40700E11: 7398 case 0x40800E11: 7399 case 0x40820E11: 7400 case 0x40830E11: 7401 break; 7402 default: 7403 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7404 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7405 if (ret > 0) { 7406 h->msix_vectors = ret; 7407 return 0; 7408 } 7409 7410 flags |= PCI_IRQ_MSI; 7411 break; 7412 } 7413 7414 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7415 if (ret < 0) 7416 return ret; 7417 return 0; 7418 } 7419 7420 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7421 bool *legacy_board) 7422 { 7423 int i; 7424 u32 subsystem_vendor_id, subsystem_device_id; 7425 7426 subsystem_vendor_id = pdev->subsystem_vendor; 7427 subsystem_device_id = pdev->subsystem_device; 7428 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7429 subsystem_vendor_id; 7430 7431 if (legacy_board) 7432 *legacy_board = false; 7433 for (i = 0; i < ARRAY_SIZE(products); i++) 7434 if (*board_id == products[i].board_id) { 7435 if (products[i].access != &SA5A_access && 7436 products[i].access != &SA5B_access) 7437 return i; 7438 dev_warn(&pdev->dev, 7439 "legacy board ID: 0x%08x\n", 7440 *board_id); 7441 if (legacy_board) 7442 *legacy_board = true; 7443 return i; 7444 } 7445 7446 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7447 if (legacy_board) 7448 *legacy_board = true; 7449 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7450 } 7451 7452 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7453 unsigned long *memory_bar) 7454 { 7455 int i; 7456 7457 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7458 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7459 /* addressing mode bits already removed */ 7460 *memory_bar = pci_resource_start(pdev, i); 7461 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7462 *memory_bar); 7463 return 0; 7464 } 7465 dev_warn(&pdev->dev, "no memory BAR found\n"); 7466 return -ENODEV; 7467 } 7468 7469 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7470 int wait_for_ready) 7471 { 7472 int i, iterations; 7473 u32 scratchpad; 7474 if (wait_for_ready) 7475 iterations = HPSA_BOARD_READY_ITERATIONS; 7476 else 7477 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7478 7479 for (i = 0; i < iterations; i++) { 7480 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7481 if (wait_for_ready) { 7482 if (scratchpad == HPSA_FIRMWARE_READY) 7483 return 0; 7484 } else { 7485 if (scratchpad != HPSA_FIRMWARE_READY) 7486 return 0; 7487 } 7488 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7489 } 7490 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7491 return -ENODEV; 7492 } 7493 7494 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7495 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7496 u64 *cfg_offset) 7497 { 7498 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7499 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7500 *cfg_base_addr &= (u32) 0x0000ffff; 7501 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7502 if (*cfg_base_addr_index == -1) { 7503 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7504 return -ENODEV; 7505 } 7506 return 0; 7507 } 7508 7509 static void hpsa_free_cfgtables(struct ctlr_info *h) 7510 { 7511 if (h->transtable) { 7512 iounmap(h->transtable); 7513 h->transtable = NULL; 7514 } 7515 if (h->cfgtable) { 7516 iounmap(h->cfgtable); 7517 h->cfgtable = NULL; 7518 } 7519 } 7520 7521 /* Find and map CISS config table and transfer table 7522 + * several items must be unmapped (freed) later 7523 + * */ 7524 static int hpsa_find_cfgtables(struct ctlr_info *h) 7525 { 7526 u64 cfg_offset; 7527 u32 cfg_base_addr; 7528 u64 cfg_base_addr_index; 7529 u32 trans_offset; 7530 int rc; 7531 7532 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7533 &cfg_base_addr_index, &cfg_offset); 7534 if (rc) 7535 return rc; 7536 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7537 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7538 if (!h->cfgtable) { 7539 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7540 return -ENOMEM; 7541 } 7542 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7543 if (rc) 7544 return rc; 7545 /* Find performant mode table. */ 7546 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7547 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7548 cfg_base_addr_index)+cfg_offset+trans_offset, 7549 sizeof(*h->transtable)); 7550 if (!h->transtable) { 7551 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7552 hpsa_free_cfgtables(h); 7553 return -ENOMEM; 7554 } 7555 return 0; 7556 } 7557 7558 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7559 { 7560 #define MIN_MAX_COMMANDS 16 7561 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7562 7563 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7564 7565 /* Limit commands in memory limited kdump scenario. */ 7566 if (reset_devices && h->max_commands > 32) 7567 h->max_commands = 32; 7568 7569 if (h->max_commands < MIN_MAX_COMMANDS) { 7570 dev_warn(&h->pdev->dev, 7571 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7572 h->max_commands, 7573 MIN_MAX_COMMANDS); 7574 h->max_commands = MIN_MAX_COMMANDS; 7575 } 7576 } 7577 7578 /* If the controller reports that the total max sg entries is greater than 512, 7579 * then we know that chained SG blocks work. (Original smart arrays did not 7580 * support chained SG blocks and would return zero for max sg entries.) 7581 */ 7582 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7583 { 7584 return h->maxsgentries > 512; 7585 } 7586 7587 /* Interrogate the hardware for some limits: 7588 * max commands, max SG elements without chaining, and with chaining, 7589 * SG chain block size, etc. 7590 */ 7591 static void hpsa_find_board_params(struct ctlr_info *h) 7592 { 7593 hpsa_get_max_perf_mode_cmds(h); 7594 h->nr_cmds = h->max_commands; 7595 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7596 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7597 if (hpsa_supports_chained_sg_blocks(h)) { 7598 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7599 h->max_cmd_sg_entries = 32; 7600 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7601 h->maxsgentries--; /* save one for chain pointer */ 7602 } else { 7603 /* 7604 * Original smart arrays supported at most 31 s/g entries 7605 * embedded inline in the command (trying to use more 7606 * would lock up the controller) 7607 */ 7608 h->max_cmd_sg_entries = 31; 7609 h->maxsgentries = 31; /* default to traditional values */ 7610 h->chainsize = 0; 7611 } 7612 7613 /* Find out what task management functions are supported and cache */ 7614 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7615 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7616 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7617 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7618 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7619 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7620 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7621 } 7622 7623 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7624 { 7625 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7626 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7627 return false; 7628 } 7629 return true; 7630 } 7631 7632 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7633 { 7634 u32 driver_support; 7635 7636 driver_support = readl(&(h->cfgtable->driver_support)); 7637 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7638 #ifdef CONFIG_X86 7639 driver_support |= ENABLE_SCSI_PREFETCH; 7640 #endif 7641 driver_support |= ENABLE_UNIT_ATTN; 7642 writel(driver_support, &(h->cfgtable->driver_support)); 7643 } 7644 7645 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7646 * in a prefetch beyond physical memory. 7647 */ 7648 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7649 { 7650 u32 dma_prefetch; 7651 7652 if (h->board_id != 0x3225103C) 7653 return; 7654 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7655 dma_prefetch |= 0x8000; 7656 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7657 } 7658 7659 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7660 { 7661 int i; 7662 u32 doorbell_value; 7663 unsigned long flags; 7664 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7665 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7666 spin_lock_irqsave(&h->lock, flags); 7667 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7668 spin_unlock_irqrestore(&h->lock, flags); 7669 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7670 goto done; 7671 /* delay and try again */ 7672 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7673 } 7674 return -ENODEV; 7675 done: 7676 return 0; 7677 } 7678 7679 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7680 { 7681 int i; 7682 u32 doorbell_value; 7683 unsigned long flags; 7684 7685 /* under certain very rare conditions, this can take awhile. 7686 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7687 * as we enter this code.) 7688 */ 7689 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7690 if (h->remove_in_progress) 7691 goto done; 7692 spin_lock_irqsave(&h->lock, flags); 7693 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7694 spin_unlock_irqrestore(&h->lock, flags); 7695 if (!(doorbell_value & CFGTBL_ChangeReq)) 7696 goto done; 7697 /* delay and try again */ 7698 msleep(MODE_CHANGE_WAIT_INTERVAL); 7699 } 7700 return -ENODEV; 7701 done: 7702 return 0; 7703 } 7704 7705 /* return -ENODEV or other reason on error, 0 on success */ 7706 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7707 { 7708 u32 trans_support; 7709 7710 trans_support = readl(&(h->cfgtable->TransportSupport)); 7711 if (!(trans_support & SIMPLE_MODE)) 7712 return -ENOTSUPP; 7713 7714 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7715 7716 /* Update the field, and then ring the doorbell */ 7717 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7718 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7719 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7720 if (hpsa_wait_for_mode_change_ack(h)) 7721 goto error; 7722 print_cfg_table(&h->pdev->dev, h->cfgtable); 7723 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7724 goto error; 7725 h->transMethod = CFGTBL_Trans_Simple; 7726 return 0; 7727 error: 7728 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7729 return -ENODEV; 7730 } 7731 7732 /* free items allocated or mapped by hpsa_pci_init */ 7733 static void hpsa_free_pci_init(struct ctlr_info *h) 7734 { 7735 hpsa_free_cfgtables(h); /* pci_init 4 */ 7736 iounmap(h->vaddr); /* pci_init 3 */ 7737 h->vaddr = NULL; 7738 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7739 /* 7740 * call pci_disable_device before pci_release_regions per 7741 * Documentation/PCI/pci.txt 7742 */ 7743 pci_disable_device(h->pdev); /* pci_init 1 */ 7744 pci_release_regions(h->pdev); /* pci_init 2 */ 7745 } 7746 7747 /* several items must be freed later */ 7748 static int hpsa_pci_init(struct ctlr_info *h) 7749 { 7750 int prod_index, err; 7751 bool legacy_board; 7752 7753 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7754 if (prod_index < 0) 7755 return prod_index; 7756 h->product_name = products[prod_index].product_name; 7757 h->access = *(products[prod_index].access); 7758 h->legacy_board = legacy_board; 7759 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7760 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7761 7762 err = pci_enable_device(h->pdev); 7763 if (err) { 7764 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7765 pci_disable_device(h->pdev); 7766 return err; 7767 } 7768 7769 err = pci_request_regions(h->pdev, HPSA); 7770 if (err) { 7771 dev_err(&h->pdev->dev, 7772 "failed to obtain PCI resources\n"); 7773 pci_disable_device(h->pdev); 7774 return err; 7775 } 7776 7777 pci_set_master(h->pdev); 7778 7779 err = hpsa_interrupt_mode(h); 7780 if (err) 7781 goto clean1; 7782 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7783 if (err) 7784 goto clean2; /* intmode+region, pci */ 7785 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7786 if (!h->vaddr) { 7787 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7788 err = -ENOMEM; 7789 goto clean2; /* intmode+region, pci */ 7790 } 7791 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7792 if (err) 7793 goto clean3; /* vaddr, intmode+region, pci */ 7794 err = hpsa_find_cfgtables(h); 7795 if (err) 7796 goto clean3; /* vaddr, intmode+region, pci */ 7797 hpsa_find_board_params(h); 7798 7799 if (!hpsa_CISS_signature_present(h)) { 7800 err = -ENODEV; 7801 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7802 } 7803 hpsa_set_driver_support_bits(h); 7804 hpsa_p600_dma_prefetch_quirk(h); 7805 err = hpsa_enter_simple_mode(h); 7806 if (err) 7807 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7808 return 0; 7809 7810 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7811 hpsa_free_cfgtables(h); 7812 clean3: /* vaddr, intmode+region, pci */ 7813 iounmap(h->vaddr); 7814 h->vaddr = NULL; 7815 clean2: /* intmode+region, pci */ 7816 hpsa_disable_interrupt_mode(h); 7817 clean1: 7818 /* 7819 * call pci_disable_device before pci_release_regions per 7820 * Documentation/PCI/pci.txt 7821 */ 7822 pci_disable_device(h->pdev); 7823 pci_release_regions(h->pdev); 7824 return err; 7825 } 7826 7827 static void hpsa_hba_inquiry(struct ctlr_info *h) 7828 { 7829 int rc; 7830 7831 #define HBA_INQUIRY_BYTE_COUNT 64 7832 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7833 if (!h->hba_inquiry_data) 7834 return; 7835 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7836 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7837 if (rc != 0) { 7838 kfree(h->hba_inquiry_data); 7839 h->hba_inquiry_data = NULL; 7840 } 7841 } 7842 7843 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7844 { 7845 int rc, i; 7846 void __iomem *vaddr; 7847 7848 if (!reset_devices) 7849 return 0; 7850 7851 /* kdump kernel is loading, we don't know in which state is 7852 * the pci interface. The dev->enable_cnt is equal zero 7853 * so we call enable+disable, wait a while and switch it on. 7854 */ 7855 rc = pci_enable_device(pdev); 7856 if (rc) { 7857 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7858 return -ENODEV; 7859 } 7860 pci_disable_device(pdev); 7861 msleep(260); /* a randomly chosen number */ 7862 rc = pci_enable_device(pdev); 7863 if (rc) { 7864 dev_warn(&pdev->dev, "failed to enable device.\n"); 7865 return -ENODEV; 7866 } 7867 7868 pci_set_master(pdev); 7869 7870 vaddr = pci_ioremap_bar(pdev, 0); 7871 if (vaddr == NULL) { 7872 rc = -ENOMEM; 7873 goto out_disable; 7874 } 7875 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7876 iounmap(vaddr); 7877 7878 /* Reset the controller with a PCI power-cycle or via doorbell */ 7879 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7880 7881 /* -ENOTSUPP here means we cannot reset the controller 7882 * but it's already (and still) up and running in 7883 * "performant mode". Or, it might be 640x, which can't reset 7884 * due to concerns about shared bbwc between 6402/6404 pair. 7885 */ 7886 if (rc) 7887 goto out_disable; 7888 7889 /* Now try to get the controller to respond to a no-op */ 7890 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7891 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7892 if (hpsa_noop(pdev) == 0) 7893 break; 7894 else 7895 dev_warn(&pdev->dev, "no-op failed%s\n", 7896 (i < 11 ? "; re-trying" : "")); 7897 } 7898 7899 out_disable: 7900 7901 pci_disable_device(pdev); 7902 return rc; 7903 } 7904 7905 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7906 { 7907 kfree(h->cmd_pool_bits); 7908 h->cmd_pool_bits = NULL; 7909 if (h->cmd_pool) { 7910 pci_free_consistent(h->pdev, 7911 h->nr_cmds * sizeof(struct CommandList), 7912 h->cmd_pool, 7913 h->cmd_pool_dhandle); 7914 h->cmd_pool = NULL; 7915 h->cmd_pool_dhandle = 0; 7916 } 7917 if (h->errinfo_pool) { 7918 pci_free_consistent(h->pdev, 7919 h->nr_cmds * sizeof(struct ErrorInfo), 7920 h->errinfo_pool, 7921 h->errinfo_pool_dhandle); 7922 h->errinfo_pool = NULL; 7923 h->errinfo_pool_dhandle = 0; 7924 } 7925 } 7926 7927 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 7928 { 7929 h->cmd_pool_bits = kzalloc( 7930 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 7931 sizeof(unsigned long), GFP_KERNEL); 7932 h->cmd_pool = pci_alloc_consistent(h->pdev, 7933 h->nr_cmds * sizeof(*h->cmd_pool), 7934 &(h->cmd_pool_dhandle)); 7935 h->errinfo_pool = pci_alloc_consistent(h->pdev, 7936 h->nr_cmds * sizeof(*h->errinfo_pool), 7937 &(h->errinfo_pool_dhandle)); 7938 if ((h->cmd_pool_bits == NULL) 7939 || (h->cmd_pool == NULL) 7940 || (h->errinfo_pool == NULL)) { 7941 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 7942 goto clean_up; 7943 } 7944 hpsa_preinitialize_commands(h); 7945 return 0; 7946 clean_up: 7947 hpsa_free_cmd_pool(h); 7948 return -ENOMEM; 7949 } 7950 7951 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 7952 static void hpsa_free_irqs(struct ctlr_info *h) 7953 { 7954 int i; 7955 7956 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 7957 /* Single reply queue, only one irq to free */ 7958 free_irq(pci_irq_vector(h->pdev, 0), &h->q[h->intr_mode]); 7959 h->q[h->intr_mode] = 0; 7960 return; 7961 } 7962 7963 for (i = 0; i < h->msix_vectors; i++) { 7964 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 7965 h->q[i] = 0; 7966 } 7967 for (; i < MAX_REPLY_QUEUES; i++) 7968 h->q[i] = 0; 7969 } 7970 7971 /* returns 0 on success; cleans up and returns -Enn on error */ 7972 static int hpsa_request_irqs(struct ctlr_info *h, 7973 irqreturn_t (*msixhandler)(int, void *), 7974 irqreturn_t (*intxhandler)(int, void *)) 7975 { 7976 int rc, i; 7977 7978 /* 7979 * initialize h->q[x] = x so that interrupt handlers know which 7980 * queue to process. 7981 */ 7982 for (i = 0; i < MAX_REPLY_QUEUES; i++) 7983 h->q[i] = (u8) i; 7984 7985 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 7986 /* If performant mode and MSI-X, use multiple reply queues */ 7987 for (i = 0; i < h->msix_vectors; i++) { 7988 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 7989 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 7990 0, h->intrname[i], 7991 &h->q[i]); 7992 if (rc) { 7993 int j; 7994 7995 dev_err(&h->pdev->dev, 7996 "failed to get irq %d for %s\n", 7997 pci_irq_vector(h->pdev, i), h->devname); 7998 for (j = 0; j < i; j++) { 7999 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8000 h->q[j] = 0; 8001 } 8002 for (; j < MAX_REPLY_QUEUES; j++) 8003 h->q[j] = 0; 8004 return rc; 8005 } 8006 } 8007 } else { 8008 /* Use single reply pool */ 8009 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8010 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8011 h->msix_vectors ? "x" : ""); 8012 rc = request_irq(pci_irq_vector(h->pdev, 0), 8013 msixhandler, 0, 8014 h->intrname[0], 8015 &h->q[h->intr_mode]); 8016 } else { 8017 sprintf(h->intrname[h->intr_mode], 8018 "%s-intx", h->devname); 8019 rc = request_irq(pci_irq_vector(h->pdev, 0), 8020 intxhandler, IRQF_SHARED, 8021 h->intrname[0], 8022 &h->q[h->intr_mode]); 8023 } 8024 } 8025 if (rc) { 8026 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8027 pci_irq_vector(h->pdev, 0), h->devname); 8028 hpsa_free_irqs(h); 8029 return -ENODEV; 8030 } 8031 return 0; 8032 } 8033 8034 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8035 { 8036 int rc; 8037 hpsa_send_host_reset(h, RAID_CTLR_LUNID, HPSA_RESET_TYPE_CONTROLLER); 8038 8039 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8040 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8041 if (rc) { 8042 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8043 return rc; 8044 } 8045 8046 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8047 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8048 if (rc) { 8049 dev_warn(&h->pdev->dev, "Board failed to become ready " 8050 "after soft reset.\n"); 8051 return rc; 8052 } 8053 8054 return 0; 8055 } 8056 8057 static void hpsa_free_reply_queues(struct ctlr_info *h) 8058 { 8059 int i; 8060 8061 for (i = 0; i < h->nreply_queues; i++) { 8062 if (!h->reply_queue[i].head) 8063 continue; 8064 pci_free_consistent(h->pdev, 8065 h->reply_queue_size, 8066 h->reply_queue[i].head, 8067 h->reply_queue[i].busaddr); 8068 h->reply_queue[i].head = NULL; 8069 h->reply_queue[i].busaddr = 0; 8070 } 8071 h->reply_queue_size = 0; 8072 } 8073 8074 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8075 { 8076 hpsa_free_performant_mode(h); /* init_one 7 */ 8077 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8078 hpsa_free_cmd_pool(h); /* init_one 5 */ 8079 hpsa_free_irqs(h); /* init_one 4 */ 8080 scsi_host_put(h->scsi_host); /* init_one 3 */ 8081 h->scsi_host = NULL; /* init_one 3 */ 8082 hpsa_free_pci_init(h); /* init_one 2_5 */ 8083 free_percpu(h->lockup_detected); /* init_one 2 */ 8084 h->lockup_detected = NULL; /* init_one 2 */ 8085 if (h->resubmit_wq) { 8086 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8087 h->resubmit_wq = NULL; 8088 } 8089 if (h->rescan_ctlr_wq) { 8090 destroy_workqueue(h->rescan_ctlr_wq); 8091 h->rescan_ctlr_wq = NULL; 8092 } 8093 kfree(h); /* init_one 1 */ 8094 } 8095 8096 /* Called when controller lockup detected. */ 8097 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8098 { 8099 int i, refcount; 8100 struct CommandList *c; 8101 int failcount = 0; 8102 8103 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8104 for (i = 0; i < h->nr_cmds; i++) { 8105 c = h->cmd_pool + i; 8106 refcount = atomic_inc_return(&c->refcount); 8107 if (refcount > 1) { 8108 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8109 finish_cmd(c); 8110 atomic_dec(&h->commands_outstanding); 8111 failcount++; 8112 } 8113 cmd_free(h, c); 8114 } 8115 dev_warn(&h->pdev->dev, 8116 "failed %d commands in fail_all\n", failcount); 8117 } 8118 8119 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8120 { 8121 int cpu; 8122 8123 for_each_online_cpu(cpu) { 8124 u32 *lockup_detected; 8125 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8126 *lockup_detected = value; 8127 } 8128 wmb(); /* be sure the per-cpu variables are out to memory */ 8129 } 8130 8131 static void controller_lockup_detected(struct ctlr_info *h) 8132 { 8133 unsigned long flags; 8134 u32 lockup_detected; 8135 8136 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8137 spin_lock_irqsave(&h->lock, flags); 8138 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8139 if (!lockup_detected) { 8140 /* no heartbeat, but controller gave us a zero. */ 8141 dev_warn(&h->pdev->dev, 8142 "lockup detected after %d but scratchpad register is zero\n", 8143 h->heartbeat_sample_interval / HZ); 8144 lockup_detected = 0xffffffff; 8145 } 8146 set_lockup_detected_for_all_cpus(h, lockup_detected); 8147 spin_unlock_irqrestore(&h->lock, flags); 8148 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8149 lockup_detected, h->heartbeat_sample_interval / HZ); 8150 if (lockup_detected == 0xffff0000) { 8151 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8152 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8153 } 8154 pci_disable_device(h->pdev); 8155 fail_all_outstanding_cmds(h); 8156 } 8157 8158 static int detect_controller_lockup(struct ctlr_info *h) 8159 { 8160 u64 now; 8161 u32 heartbeat; 8162 unsigned long flags; 8163 8164 now = get_jiffies_64(); 8165 /* If we've received an interrupt recently, we're ok. */ 8166 if (time_after64(h->last_intr_timestamp + 8167 (h->heartbeat_sample_interval), now)) 8168 return false; 8169 8170 /* 8171 * If we've already checked the heartbeat recently, we're ok. 8172 * This could happen if someone sends us a signal. We 8173 * otherwise don't care about signals in this thread. 8174 */ 8175 if (time_after64(h->last_heartbeat_timestamp + 8176 (h->heartbeat_sample_interval), now)) 8177 return false; 8178 8179 /* If heartbeat has not changed since we last looked, we're not ok. */ 8180 spin_lock_irqsave(&h->lock, flags); 8181 heartbeat = readl(&h->cfgtable->HeartBeat); 8182 spin_unlock_irqrestore(&h->lock, flags); 8183 if (h->last_heartbeat == heartbeat) { 8184 controller_lockup_detected(h); 8185 return true; 8186 } 8187 8188 /* We're ok. */ 8189 h->last_heartbeat = heartbeat; 8190 h->last_heartbeat_timestamp = now; 8191 return false; 8192 } 8193 8194 /* 8195 * Set ioaccel status for all ioaccel volumes. 8196 * 8197 * Called from monitor controller worker (hpsa_event_monitor_worker) 8198 * 8199 * A Volume (or Volumes that comprise an Array set may be undergoing a 8200 * transformation, so we will be turning off ioaccel for all volumes that 8201 * make up the Array. 8202 */ 8203 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8204 { 8205 int rc; 8206 int i; 8207 u8 ioaccel_status; 8208 unsigned char *buf; 8209 struct hpsa_scsi_dev_t *device; 8210 8211 if (!h) 8212 return; 8213 8214 buf = kmalloc(64, GFP_KERNEL); 8215 if (!buf) 8216 return; 8217 8218 /* 8219 * Run through current device list used during I/O requests. 8220 */ 8221 for (i = 0; i < h->ndevices; i++) { 8222 device = h->dev[i]; 8223 8224 if (!device) 8225 continue; 8226 if (!device->scsi3addr) 8227 continue; 8228 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8229 HPSA_VPD_LV_IOACCEL_STATUS)) 8230 continue; 8231 8232 memset(buf, 0, 64); 8233 8234 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8235 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8236 buf, 64); 8237 if (rc != 0) 8238 continue; 8239 8240 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8241 device->offload_config = 8242 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8243 if (device->offload_config) 8244 device->offload_to_be_enabled = 8245 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8246 8247 /* 8248 * Immediately turn off ioaccel for any volume the 8249 * controller tells us to. Some of the reasons could be: 8250 * transformation - change to the LVs of an Array. 8251 * degraded volume - component failure 8252 * 8253 * If ioaccel is to be re-enabled, re-enable later during the 8254 * scan operation so the driver can get a fresh raidmap 8255 * before turning ioaccel back on. 8256 * 8257 */ 8258 if (!device->offload_to_be_enabled) 8259 device->offload_enabled = 0; 8260 } 8261 8262 kfree(buf); 8263 } 8264 8265 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8266 { 8267 char *event_type; 8268 8269 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8270 return; 8271 8272 /* Ask the controller to clear the events we're handling. */ 8273 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8274 | CFGTBL_Trans_io_accel2)) && 8275 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8276 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8277 8278 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8279 event_type = "state change"; 8280 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8281 event_type = "configuration change"; 8282 /* Stop sending new RAID offload reqs via the IO accelerator */ 8283 scsi_block_requests(h->scsi_host); 8284 hpsa_set_ioaccel_status(h); 8285 hpsa_drain_accel_commands(h); 8286 /* Set 'accelerator path config change' bit */ 8287 dev_warn(&h->pdev->dev, 8288 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8289 h->events, event_type); 8290 writel(h->events, &(h->cfgtable->clear_event_notify)); 8291 /* Set the "clear event notify field update" bit 6 */ 8292 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8293 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8294 hpsa_wait_for_clear_event_notify_ack(h); 8295 scsi_unblock_requests(h->scsi_host); 8296 } else { 8297 /* Acknowledge controller notification events. */ 8298 writel(h->events, &(h->cfgtable->clear_event_notify)); 8299 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8300 hpsa_wait_for_clear_event_notify_ack(h); 8301 } 8302 return; 8303 } 8304 8305 /* Check a register on the controller to see if there are configuration 8306 * changes (added/changed/removed logical drives, etc.) which mean that 8307 * we should rescan the controller for devices. 8308 * Also check flag for driver-initiated rescan. 8309 */ 8310 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8311 { 8312 if (h->drv_req_rescan) { 8313 h->drv_req_rescan = 0; 8314 return 1; 8315 } 8316 8317 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8318 return 0; 8319 8320 h->events = readl(&(h->cfgtable->event_notify)); 8321 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8322 } 8323 8324 /* 8325 * Check if any of the offline devices have become ready 8326 */ 8327 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8328 { 8329 unsigned long flags; 8330 struct offline_device_entry *d; 8331 struct list_head *this, *tmp; 8332 8333 spin_lock_irqsave(&h->offline_device_lock, flags); 8334 list_for_each_safe(this, tmp, &h->offline_device_list) { 8335 d = list_entry(this, struct offline_device_entry, 8336 offline_list); 8337 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8338 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8339 spin_lock_irqsave(&h->offline_device_lock, flags); 8340 list_del(&d->offline_list); 8341 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8342 return 1; 8343 } 8344 spin_lock_irqsave(&h->offline_device_lock, flags); 8345 } 8346 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8347 return 0; 8348 } 8349 8350 static int hpsa_luns_changed(struct ctlr_info *h) 8351 { 8352 int rc = 1; /* assume there are changes */ 8353 struct ReportLUNdata *logdev = NULL; 8354 8355 /* if we can't find out if lun data has changed, 8356 * assume that it has. 8357 */ 8358 8359 if (!h->lastlogicals) 8360 return rc; 8361 8362 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8363 if (!logdev) 8364 return rc; 8365 8366 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8367 dev_warn(&h->pdev->dev, 8368 "report luns failed, can't track lun changes.\n"); 8369 goto out; 8370 } 8371 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8372 dev_info(&h->pdev->dev, 8373 "Lun changes detected.\n"); 8374 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8375 goto out; 8376 } else 8377 rc = 0; /* no changes detected. */ 8378 out: 8379 kfree(logdev); 8380 return rc; 8381 } 8382 8383 static void hpsa_perform_rescan(struct ctlr_info *h) 8384 { 8385 struct Scsi_Host *sh = NULL; 8386 unsigned long flags; 8387 8388 /* 8389 * Do the scan after the reset 8390 */ 8391 spin_lock_irqsave(&h->reset_lock, flags); 8392 if (h->reset_in_progress) { 8393 h->drv_req_rescan = 1; 8394 spin_unlock_irqrestore(&h->reset_lock, flags); 8395 return; 8396 } 8397 spin_unlock_irqrestore(&h->reset_lock, flags); 8398 8399 sh = scsi_host_get(h->scsi_host); 8400 if (sh != NULL) { 8401 hpsa_scan_start(sh); 8402 scsi_host_put(sh); 8403 h->drv_req_rescan = 0; 8404 } 8405 } 8406 8407 /* 8408 * watch for controller events 8409 */ 8410 static void hpsa_event_monitor_worker(struct work_struct *work) 8411 { 8412 struct ctlr_info *h = container_of(to_delayed_work(work), 8413 struct ctlr_info, event_monitor_work); 8414 unsigned long flags; 8415 8416 spin_lock_irqsave(&h->lock, flags); 8417 if (h->remove_in_progress) { 8418 spin_unlock_irqrestore(&h->lock, flags); 8419 return; 8420 } 8421 spin_unlock_irqrestore(&h->lock, flags); 8422 8423 if (hpsa_ctlr_needs_rescan(h)) { 8424 hpsa_ack_ctlr_events(h); 8425 hpsa_perform_rescan(h); 8426 } 8427 8428 spin_lock_irqsave(&h->lock, flags); 8429 if (!h->remove_in_progress) 8430 schedule_delayed_work(&h->event_monitor_work, 8431 HPSA_EVENT_MONITOR_INTERVAL); 8432 spin_unlock_irqrestore(&h->lock, flags); 8433 } 8434 8435 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8436 { 8437 unsigned long flags; 8438 struct ctlr_info *h = container_of(to_delayed_work(work), 8439 struct ctlr_info, rescan_ctlr_work); 8440 8441 spin_lock_irqsave(&h->lock, flags); 8442 if (h->remove_in_progress) { 8443 spin_unlock_irqrestore(&h->lock, flags); 8444 return; 8445 } 8446 spin_unlock_irqrestore(&h->lock, flags); 8447 8448 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8449 hpsa_perform_rescan(h); 8450 } else if (h->discovery_polling) { 8451 if (hpsa_luns_changed(h)) { 8452 dev_info(&h->pdev->dev, 8453 "driver discovery polling rescan.\n"); 8454 hpsa_perform_rescan(h); 8455 } 8456 } 8457 spin_lock_irqsave(&h->lock, flags); 8458 if (!h->remove_in_progress) 8459 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8460 h->heartbeat_sample_interval); 8461 spin_unlock_irqrestore(&h->lock, flags); 8462 } 8463 8464 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8465 { 8466 unsigned long flags; 8467 struct ctlr_info *h = container_of(to_delayed_work(work), 8468 struct ctlr_info, monitor_ctlr_work); 8469 8470 detect_controller_lockup(h); 8471 if (lockup_detected(h)) 8472 return; 8473 8474 spin_lock_irqsave(&h->lock, flags); 8475 if (!h->remove_in_progress) 8476 schedule_delayed_work(&h->monitor_ctlr_work, 8477 h->heartbeat_sample_interval); 8478 spin_unlock_irqrestore(&h->lock, flags); 8479 } 8480 8481 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8482 char *name) 8483 { 8484 struct workqueue_struct *wq = NULL; 8485 8486 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8487 if (!wq) 8488 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8489 8490 return wq; 8491 } 8492 8493 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8494 { 8495 int dac, rc; 8496 struct ctlr_info *h; 8497 int try_soft_reset = 0; 8498 unsigned long flags; 8499 u32 board_id; 8500 8501 if (number_of_controllers == 0) 8502 printk(KERN_INFO DRIVER_NAME "\n"); 8503 8504 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8505 if (rc < 0) { 8506 dev_warn(&pdev->dev, "Board ID not found\n"); 8507 return rc; 8508 } 8509 8510 rc = hpsa_init_reset_devices(pdev, board_id); 8511 if (rc) { 8512 if (rc != -ENOTSUPP) 8513 return rc; 8514 /* If the reset fails in a particular way (it has no way to do 8515 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8516 * a soft reset once we get the controller configured up to the 8517 * point that it can accept a command. 8518 */ 8519 try_soft_reset = 1; 8520 rc = 0; 8521 } 8522 8523 reinit_after_soft_reset: 8524 8525 /* Command structures must be aligned on a 32-byte boundary because 8526 * the 5 lower bits of the address are used by the hardware. and by 8527 * the driver. See comments in hpsa.h for more info. 8528 */ 8529 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8530 h = kzalloc(sizeof(*h), GFP_KERNEL); 8531 if (!h) { 8532 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8533 return -ENOMEM; 8534 } 8535 8536 h->pdev = pdev; 8537 8538 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8539 INIT_LIST_HEAD(&h->offline_device_list); 8540 spin_lock_init(&h->lock); 8541 spin_lock_init(&h->offline_device_lock); 8542 spin_lock_init(&h->scan_lock); 8543 spin_lock_init(&h->reset_lock); 8544 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8545 8546 /* Allocate and clear per-cpu variable lockup_detected */ 8547 h->lockup_detected = alloc_percpu(u32); 8548 if (!h->lockup_detected) { 8549 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8550 rc = -ENOMEM; 8551 goto clean1; /* aer/h */ 8552 } 8553 set_lockup_detected_for_all_cpus(h, 0); 8554 8555 rc = hpsa_pci_init(h); 8556 if (rc) 8557 goto clean2; /* lu, aer/h */ 8558 8559 /* relies on h-> settings made by hpsa_pci_init, including 8560 * interrupt_mode h->intr */ 8561 rc = hpsa_scsi_host_alloc(h); 8562 if (rc) 8563 goto clean2_5; /* pci, lu, aer/h */ 8564 8565 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8566 h->ctlr = number_of_controllers; 8567 number_of_controllers++; 8568 8569 /* configure PCI DMA stuff */ 8570 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 8571 if (rc == 0) { 8572 dac = 1; 8573 } else { 8574 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 8575 if (rc == 0) { 8576 dac = 0; 8577 } else { 8578 dev_err(&pdev->dev, "no suitable DMA available\n"); 8579 goto clean3; /* shost, pci, lu, aer/h */ 8580 } 8581 } 8582 8583 /* make sure the board interrupts are off */ 8584 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8585 8586 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8587 if (rc) 8588 goto clean3; /* shost, pci, lu, aer/h */ 8589 rc = hpsa_alloc_cmd_pool(h); 8590 if (rc) 8591 goto clean4; /* irq, shost, pci, lu, aer/h */ 8592 rc = hpsa_alloc_sg_chain_blocks(h); 8593 if (rc) 8594 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8595 init_waitqueue_head(&h->scan_wait_queue); 8596 init_waitqueue_head(&h->event_sync_wait_queue); 8597 mutex_init(&h->reset_mutex); 8598 h->scan_finished = 1; /* no scan currently in progress */ 8599 h->scan_waiting = 0; 8600 8601 pci_set_drvdata(pdev, h); 8602 h->ndevices = 0; 8603 8604 spin_lock_init(&h->devlock); 8605 rc = hpsa_put_ctlr_into_performant_mode(h); 8606 if (rc) 8607 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8608 8609 /* create the resubmit workqueue */ 8610 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8611 if (!h->rescan_ctlr_wq) { 8612 rc = -ENOMEM; 8613 goto clean7; 8614 } 8615 8616 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8617 if (!h->resubmit_wq) { 8618 rc = -ENOMEM; 8619 goto clean7; /* aer/h */ 8620 } 8621 8622 /* 8623 * At this point, the controller is ready to take commands. 8624 * Now, if reset_devices and the hard reset didn't work, try 8625 * the soft reset and see if that works. 8626 */ 8627 if (try_soft_reset) { 8628 8629 /* This is kind of gross. We may or may not get a completion 8630 * from the soft reset command, and if we do, then the value 8631 * from the fifo may or may not be valid. So, we wait 10 secs 8632 * after the reset throwing away any completions we get during 8633 * that time. Unregister the interrupt handler and register 8634 * fake ones to scoop up any residual completions. 8635 */ 8636 spin_lock_irqsave(&h->lock, flags); 8637 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8638 spin_unlock_irqrestore(&h->lock, flags); 8639 hpsa_free_irqs(h); 8640 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8641 hpsa_intx_discard_completions); 8642 if (rc) { 8643 dev_warn(&h->pdev->dev, 8644 "Failed to request_irq after soft reset.\n"); 8645 /* 8646 * cannot goto clean7 or free_irqs will be called 8647 * again. Instead, do its work 8648 */ 8649 hpsa_free_performant_mode(h); /* clean7 */ 8650 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8651 hpsa_free_cmd_pool(h); /* clean5 */ 8652 /* 8653 * skip hpsa_free_irqs(h) clean4 since that 8654 * was just called before request_irqs failed 8655 */ 8656 goto clean3; 8657 } 8658 8659 rc = hpsa_kdump_soft_reset(h); 8660 if (rc) 8661 /* Neither hard nor soft reset worked, we're hosed. */ 8662 goto clean7; 8663 8664 dev_info(&h->pdev->dev, "Board READY.\n"); 8665 dev_info(&h->pdev->dev, 8666 "Waiting for stale completions to drain.\n"); 8667 h->access.set_intr_mask(h, HPSA_INTR_ON); 8668 msleep(10000); 8669 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8670 8671 rc = controller_reset_failed(h->cfgtable); 8672 if (rc) 8673 dev_info(&h->pdev->dev, 8674 "Soft reset appears to have failed.\n"); 8675 8676 /* since the controller's reset, we have to go back and re-init 8677 * everything. Easiest to just forget what we've done and do it 8678 * all over again. 8679 */ 8680 hpsa_undo_allocations_after_kdump_soft_reset(h); 8681 try_soft_reset = 0; 8682 if (rc) 8683 /* don't goto clean, we already unallocated */ 8684 return -ENODEV; 8685 8686 goto reinit_after_soft_reset; 8687 } 8688 8689 /* Enable Accelerated IO path at driver layer */ 8690 h->acciopath_status = 1; 8691 /* Disable discovery polling.*/ 8692 h->discovery_polling = 0; 8693 8694 8695 /* Turn the interrupts on so we can service requests */ 8696 h->access.set_intr_mask(h, HPSA_INTR_ON); 8697 8698 hpsa_hba_inquiry(h); 8699 8700 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8701 if (!h->lastlogicals) 8702 dev_info(&h->pdev->dev, 8703 "Can't track change to report lun data\n"); 8704 8705 /* hook into SCSI subsystem */ 8706 rc = hpsa_scsi_add_host(h); 8707 if (rc) 8708 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8709 8710 /* Monitor the controller for firmware lockups */ 8711 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8712 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8713 schedule_delayed_work(&h->monitor_ctlr_work, 8714 h->heartbeat_sample_interval); 8715 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8716 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8717 h->heartbeat_sample_interval); 8718 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8719 schedule_delayed_work(&h->event_monitor_work, 8720 HPSA_EVENT_MONITOR_INTERVAL); 8721 return 0; 8722 8723 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8724 hpsa_free_performant_mode(h); 8725 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8726 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8727 hpsa_free_sg_chain_blocks(h); 8728 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8729 hpsa_free_cmd_pool(h); 8730 clean4: /* irq, shost, pci, lu, aer/h */ 8731 hpsa_free_irqs(h); 8732 clean3: /* shost, pci, lu, aer/h */ 8733 scsi_host_put(h->scsi_host); 8734 h->scsi_host = NULL; 8735 clean2_5: /* pci, lu, aer/h */ 8736 hpsa_free_pci_init(h); 8737 clean2: /* lu, aer/h */ 8738 if (h->lockup_detected) { 8739 free_percpu(h->lockup_detected); 8740 h->lockup_detected = NULL; 8741 } 8742 clean1: /* wq/aer/h */ 8743 if (h->resubmit_wq) { 8744 destroy_workqueue(h->resubmit_wq); 8745 h->resubmit_wq = NULL; 8746 } 8747 if (h->rescan_ctlr_wq) { 8748 destroy_workqueue(h->rescan_ctlr_wq); 8749 h->rescan_ctlr_wq = NULL; 8750 } 8751 kfree(h); 8752 return rc; 8753 } 8754 8755 static void hpsa_flush_cache(struct ctlr_info *h) 8756 { 8757 char *flush_buf; 8758 struct CommandList *c; 8759 int rc; 8760 8761 if (unlikely(lockup_detected(h))) 8762 return; 8763 flush_buf = kzalloc(4, GFP_KERNEL); 8764 if (!flush_buf) 8765 return; 8766 8767 c = cmd_alloc(h); 8768 8769 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8770 RAID_CTLR_LUNID, TYPE_CMD)) { 8771 goto out; 8772 } 8773 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8774 PCI_DMA_TODEVICE, DEFAULT_TIMEOUT); 8775 if (rc) 8776 goto out; 8777 if (c->err_info->CommandStatus != 0) 8778 out: 8779 dev_warn(&h->pdev->dev, 8780 "error flushing cache on controller\n"); 8781 cmd_free(h, c); 8782 kfree(flush_buf); 8783 } 8784 8785 /* Make controller gather fresh report lun data each time we 8786 * send down a report luns request 8787 */ 8788 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8789 { 8790 u32 *options; 8791 struct CommandList *c; 8792 int rc; 8793 8794 /* Don't bother trying to set diag options if locked up */ 8795 if (unlikely(h->lockup_detected)) 8796 return; 8797 8798 options = kzalloc(sizeof(*options), GFP_KERNEL); 8799 if (!options) 8800 return; 8801 8802 c = cmd_alloc(h); 8803 8804 /* first, get the current diag options settings */ 8805 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8806 RAID_CTLR_LUNID, TYPE_CMD)) 8807 goto errout; 8808 8809 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8810 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8811 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8812 goto errout; 8813 8814 /* Now, set the bit for disabling the RLD caching */ 8815 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8816 8817 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8818 RAID_CTLR_LUNID, TYPE_CMD)) 8819 goto errout; 8820 8821 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8822 PCI_DMA_TODEVICE, NO_TIMEOUT); 8823 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8824 goto errout; 8825 8826 /* Now verify that it got set: */ 8827 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8828 RAID_CTLR_LUNID, TYPE_CMD)) 8829 goto errout; 8830 8831 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, 8832 PCI_DMA_FROMDEVICE, NO_TIMEOUT); 8833 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8834 goto errout; 8835 8836 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8837 goto out; 8838 8839 errout: 8840 dev_err(&h->pdev->dev, 8841 "Error: failed to disable report lun data caching.\n"); 8842 out: 8843 cmd_free(h, c); 8844 kfree(options); 8845 } 8846 8847 static void hpsa_shutdown(struct pci_dev *pdev) 8848 { 8849 struct ctlr_info *h; 8850 8851 h = pci_get_drvdata(pdev); 8852 /* Turn board interrupts off and send the flush cache command 8853 * sendcmd will turn off interrupt, and send the flush... 8854 * To write all data in the battery backed cache to disks 8855 */ 8856 hpsa_flush_cache(h); 8857 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8858 hpsa_free_irqs(h); /* init_one 4 */ 8859 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8860 } 8861 8862 static void hpsa_free_device_info(struct ctlr_info *h) 8863 { 8864 int i; 8865 8866 for (i = 0; i < h->ndevices; i++) { 8867 kfree(h->dev[i]); 8868 h->dev[i] = NULL; 8869 } 8870 } 8871 8872 static void hpsa_remove_one(struct pci_dev *pdev) 8873 { 8874 struct ctlr_info *h; 8875 unsigned long flags; 8876 8877 if (pci_get_drvdata(pdev) == NULL) { 8878 dev_err(&pdev->dev, "unable to remove device\n"); 8879 return; 8880 } 8881 h = pci_get_drvdata(pdev); 8882 8883 /* Get rid of any controller monitoring work items */ 8884 spin_lock_irqsave(&h->lock, flags); 8885 h->remove_in_progress = 1; 8886 spin_unlock_irqrestore(&h->lock, flags); 8887 cancel_delayed_work_sync(&h->monitor_ctlr_work); 8888 cancel_delayed_work_sync(&h->rescan_ctlr_work); 8889 cancel_delayed_work_sync(&h->event_monitor_work); 8890 destroy_workqueue(h->rescan_ctlr_wq); 8891 destroy_workqueue(h->resubmit_wq); 8892 8893 hpsa_delete_sas_host(h); 8894 8895 /* 8896 * Call before disabling interrupts. 8897 * scsi_remove_host can trigger I/O operations especially 8898 * when multipath is enabled. There can be SYNCHRONIZE CACHE 8899 * operations which cannot complete and will hang the system. 8900 */ 8901 if (h->scsi_host) 8902 scsi_remove_host(h->scsi_host); /* init_one 8 */ 8903 /* includes hpsa_free_irqs - init_one 4 */ 8904 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8905 hpsa_shutdown(pdev); 8906 8907 hpsa_free_device_info(h); /* scan */ 8908 8909 kfree(h->hba_inquiry_data); /* init_one 10 */ 8910 h->hba_inquiry_data = NULL; /* init_one 10 */ 8911 hpsa_free_ioaccel2_sg_chain_blocks(h); 8912 hpsa_free_performant_mode(h); /* init_one 7 */ 8913 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8914 hpsa_free_cmd_pool(h); /* init_one 5 */ 8915 kfree(h->lastlogicals); 8916 8917 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 8918 8919 scsi_host_put(h->scsi_host); /* init_one 3 */ 8920 h->scsi_host = NULL; /* init_one 3 */ 8921 8922 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 8923 hpsa_free_pci_init(h); /* init_one 2.5 */ 8924 8925 free_percpu(h->lockup_detected); /* init_one 2 */ 8926 h->lockup_detected = NULL; /* init_one 2 */ 8927 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 8928 8929 kfree(h); /* init_one 1 */ 8930 } 8931 8932 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 8933 __attribute__((unused)) pm_message_t state) 8934 { 8935 return -ENOSYS; 8936 } 8937 8938 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 8939 { 8940 return -ENOSYS; 8941 } 8942 8943 static struct pci_driver hpsa_pci_driver = { 8944 .name = HPSA, 8945 .probe = hpsa_init_one, 8946 .remove = hpsa_remove_one, 8947 .id_table = hpsa_pci_device_id, /* id_table */ 8948 .shutdown = hpsa_shutdown, 8949 .suspend = hpsa_suspend, 8950 .resume = hpsa_resume, 8951 }; 8952 8953 /* Fill in bucket_map[], given nsgs (the max number of 8954 * scatter gather elements supported) and bucket[], 8955 * which is an array of 8 integers. The bucket[] array 8956 * contains 8 different DMA transfer sizes (in 16 8957 * byte increments) which the controller uses to fetch 8958 * commands. This function fills in bucket_map[], which 8959 * maps a given number of scatter gather elements to one of 8960 * the 8 DMA transfer sizes. The point of it is to allow the 8961 * controller to only do as much DMA as needed to fetch the 8962 * command, with the DMA transfer size encoded in the lower 8963 * bits of the command address. 8964 */ 8965 static void calc_bucket_map(int bucket[], int num_buckets, 8966 int nsgs, int min_blocks, u32 *bucket_map) 8967 { 8968 int i, j, b, size; 8969 8970 /* Note, bucket_map must have nsgs+1 entries. */ 8971 for (i = 0; i <= nsgs; i++) { 8972 /* Compute size of a command with i SG entries */ 8973 size = i + min_blocks; 8974 b = num_buckets; /* Assume the biggest bucket */ 8975 /* Find the bucket that is just big enough */ 8976 for (j = 0; j < num_buckets; j++) { 8977 if (bucket[j] >= size) { 8978 b = j; 8979 break; 8980 } 8981 } 8982 /* for a command with i SG entries, use bucket b. */ 8983 bucket_map[i] = b; 8984 } 8985 } 8986 8987 /* 8988 * return -ENODEV on err, 0 on success (or no action) 8989 * allocates numerous items that must be freed later 8990 */ 8991 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 8992 { 8993 int i; 8994 unsigned long register_value; 8995 unsigned long transMethod = CFGTBL_Trans_Performant | 8996 (trans_support & CFGTBL_Trans_use_short_tags) | 8997 CFGTBL_Trans_enable_directed_msix | 8998 (trans_support & (CFGTBL_Trans_io_accel1 | 8999 CFGTBL_Trans_io_accel2)); 9000 struct access_method access = SA5_performant_access; 9001 9002 /* This is a bit complicated. There are 8 registers on 9003 * the controller which we write to to tell it 8 different 9004 * sizes of commands which there may be. It's a way of 9005 * reducing the DMA done to fetch each command. Encoded into 9006 * each command's tag are 3 bits which communicate to the controller 9007 * which of the eight sizes that command fits within. The size of 9008 * each command depends on how many scatter gather entries there are. 9009 * Each SG entry requires 16 bytes. The eight registers are programmed 9010 * with the number of 16-byte blocks a command of that size requires. 9011 * The smallest command possible requires 5 such 16 byte blocks. 9012 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9013 * blocks. Note, this only extends to the SG entries contained 9014 * within the command block, and does not extend to chained blocks 9015 * of SG elements. bft[] contains the eight values we write to 9016 * the registers. They are not evenly distributed, but have more 9017 * sizes for small commands, and fewer sizes for larger commands. 9018 */ 9019 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9020 #define MIN_IOACCEL2_BFT_ENTRY 5 9021 #define HPSA_IOACCEL2_HEADER_SZ 4 9022 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9023 13, 14, 15, 16, 17, 18, 19, 9024 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9025 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9026 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9027 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9028 16 * MIN_IOACCEL2_BFT_ENTRY); 9029 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9030 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9031 /* 5 = 1 s/g entry or 4k 9032 * 6 = 2 s/g entry or 8k 9033 * 8 = 4 s/g entry or 16k 9034 * 10 = 6 s/g entry or 24k 9035 */ 9036 9037 /* If the controller supports either ioaccel method then 9038 * we can also use the RAID stack submit path that does not 9039 * perform the superfluous readl() after each command submission. 9040 */ 9041 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9042 access = SA5_performant_access_no_read; 9043 9044 /* Controller spec: zero out this buffer. */ 9045 for (i = 0; i < h->nreply_queues; i++) 9046 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9047 9048 bft[7] = SG_ENTRIES_IN_CMD + 4; 9049 calc_bucket_map(bft, ARRAY_SIZE(bft), 9050 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9051 for (i = 0; i < 8; i++) 9052 writel(bft[i], &h->transtable->BlockFetch[i]); 9053 9054 /* size of controller ring buffer */ 9055 writel(h->max_commands, &h->transtable->RepQSize); 9056 writel(h->nreply_queues, &h->transtable->RepQCount); 9057 writel(0, &h->transtable->RepQCtrAddrLow32); 9058 writel(0, &h->transtable->RepQCtrAddrHigh32); 9059 9060 for (i = 0; i < h->nreply_queues; i++) { 9061 writel(0, &h->transtable->RepQAddr[i].upper); 9062 writel(h->reply_queue[i].busaddr, 9063 &h->transtable->RepQAddr[i].lower); 9064 } 9065 9066 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9067 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9068 /* 9069 * enable outbound interrupt coalescing in accelerator mode; 9070 */ 9071 if (trans_support & CFGTBL_Trans_io_accel1) { 9072 access = SA5_ioaccel_mode1_access; 9073 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9074 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9075 } else 9076 if (trans_support & CFGTBL_Trans_io_accel2) 9077 access = SA5_ioaccel_mode2_access; 9078 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9079 if (hpsa_wait_for_mode_change_ack(h)) { 9080 dev_err(&h->pdev->dev, 9081 "performant mode problem - doorbell timeout\n"); 9082 return -ENODEV; 9083 } 9084 register_value = readl(&(h->cfgtable->TransportActive)); 9085 if (!(register_value & CFGTBL_Trans_Performant)) { 9086 dev_err(&h->pdev->dev, 9087 "performant mode problem - transport not active\n"); 9088 return -ENODEV; 9089 } 9090 /* Change the access methods to the performant access methods */ 9091 h->access = access; 9092 h->transMethod = transMethod; 9093 9094 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9095 (trans_support & CFGTBL_Trans_io_accel2))) 9096 return 0; 9097 9098 if (trans_support & CFGTBL_Trans_io_accel1) { 9099 /* Set up I/O accelerator mode */ 9100 for (i = 0; i < h->nreply_queues; i++) { 9101 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9102 h->reply_queue[i].current_entry = 9103 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9104 } 9105 bft[7] = h->ioaccel_maxsg + 8; 9106 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9107 h->ioaccel1_blockFetchTable); 9108 9109 /* initialize all reply queue entries to unused */ 9110 for (i = 0; i < h->nreply_queues; i++) 9111 memset(h->reply_queue[i].head, 9112 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9113 h->reply_queue_size); 9114 9115 /* set all the constant fields in the accelerator command 9116 * frames once at init time to save CPU cycles later. 9117 */ 9118 for (i = 0; i < h->nr_cmds; i++) { 9119 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9120 9121 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9122 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9123 (i * sizeof(struct ErrorInfo))); 9124 cp->err_info_len = sizeof(struct ErrorInfo); 9125 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9126 cp->host_context_flags = 9127 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9128 cp->timeout_sec = 0; 9129 cp->ReplyQueue = 0; 9130 cp->tag = 9131 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9132 cp->host_addr = 9133 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9134 (i * sizeof(struct io_accel1_cmd))); 9135 } 9136 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9137 u64 cfg_offset, cfg_base_addr_index; 9138 u32 bft2_offset, cfg_base_addr; 9139 int rc; 9140 9141 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9142 &cfg_base_addr_index, &cfg_offset); 9143 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9144 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9145 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9146 4, h->ioaccel2_blockFetchTable); 9147 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9148 BUILD_BUG_ON(offsetof(struct CfgTable, 9149 io_accel_request_size_offset) != 0xb8); 9150 h->ioaccel2_bft2_regs = 9151 remap_pci_mem(pci_resource_start(h->pdev, 9152 cfg_base_addr_index) + 9153 cfg_offset + bft2_offset, 9154 ARRAY_SIZE(bft2) * 9155 sizeof(*h->ioaccel2_bft2_regs)); 9156 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9157 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9158 } 9159 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9160 if (hpsa_wait_for_mode_change_ack(h)) { 9161 dev_err(&h->pdev->dev, 9162 "performant mode problem - enabling ioaccel mode\n"); 9163 return -ENODEV; 9164 } 9165 return 0; 9166 } 9167 9168 /* Free ioaccel1 mode command blocks and block fetch table */ 9169 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9170 { 9171 if (h->ioaccel_cmd_pool) { 9172 pci_free_consistent(h->pdev, 9173 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9174 h->ioaccel_cmd_pool, 9175 h->ioaccel_cmd_pool_dhandle); 9176 h->ioaccel_cmd_pool = NULL; 9177 h->ioaccel_cmd_pool_dhandle = 0; 9178 } 9179 kfree(h->ioaccel1_blockFetchTable); 9180 h->ioaccel1_blockFetchTable = NULL; 9181 } 9182 9183 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9184 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9185 { 9186 h->ioaccel_maxsg = 9187 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9188 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9189 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9190 9191 /* Command structures must be aligned on a 128-byte boundary 9192 * because the 7 lower bits of the address are used by the 9193 * hardware. 9194 */ 9195 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9196 IOACCEL1_COMMANDLIST_ALIGNMENT); 9197 h->ioaccel_cmd_pool = 9198 pci_alloc_consistent(h->pdev, 9199 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9200 &(h->ioaccel_cmd_pool_dhandle)); 9201 9202 h->ioaccel1_blockFetchTable = 9203 kmalloc(((h->ioaccel_maxsg + 1) * 9204 sizeof(u32)), GFP_KERNEL); 9205 9206 if ((h->ioaccel_cmd_pool == NULL) || 9207 (h->ioaccel1_blockFetchTable == NULL)) 9208 goto clean_up; 9209 9210 memset(h->ioaccel_cmd_pool, 0, 9211 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9212 return 0; 9213 9214 clean_up: 9215 hpsa_free_ioaccel1_cmd_and_bft(h); 9216 return -ENOMEM; 9217 } 9218 9219 /* Free ioaccel2 mode command blocks and block fetch table */ 9220 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9221 { 9222 hpsa_free_ioaccel2_sg_chain_blocks(h); 9223 9224 if (h->ioaccel2_cmd_pool) { 9225 pci_free_consistent(h->pdev, 9226 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9227 h->ioaccel2_cmd_pool, 9228 h->ioaccel2_cmd_pool_dhandle); 9229 h->ioaccel2_cmd_pool = NULL; 9230 h->ioaccel2_cmd_pool_dhandle = 0; 9231 } 9232 kfree(h->ioaccel2_blockFetchTable); 9233 h->ioaccel2_blockFetchTable = NULL; 9234 } 9235 9236 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9237 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9238 { 9239 int rc; 9240 9241 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9242 9243 h->ioaccel_maxsg = 9244 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9245 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9246 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9247 9248 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9249 IOACCEL2_COMMANDLIST_ALIGNMENT); 9250 h->ioaccel2_cmd_pool = 9251 pci_alloc_consistent(h->pdev, 9252 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9253 &(h->ioaccel2_cmd_pool_dhandle)); 9254 9255 h->ioaccel2_blockFetchTable = 9256 kmalloc(((h->ioaccel_maxsg + 1) * 9257 sizeof(u32)), GFP_KERNEL); 9258 9259 if ((h->ioaccel2_cmd_pool == NULL) || 9260 (h->ioaccel2_blockFetchTable == NULL)) { 9261 rc = -ENOMEM; 9262 goto clean_up; 9263 } 9264 9265 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9266 if (rc) 9267 goto clean_up; 9268 9269 memset(h->ioaccel2_cmd_pool, 0, 9270 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9271 return 0; 9272 9273 clean_up: 9274 hpsa_free_ioaccel2_cmd_and_bft(h); 9275 return rc; 9276 } 9277 9278 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9279 static void hpsa_free_performant_mode(struct ctlr_info *h) 9280 { 9281 kfree(h->blockFetchTable); 9282 h->blockFetchTable = NULL; 9283 hpsa_free_reply_queues(h); 9284 hpsa_free_ioaccel1_cmd_and_bft(h); 9285 hpsa_free_ioaccel2_cmd_and_bft(h); 9286 } 9287 9288 /* return -ENODEV on error, 0 on success (or no action) 9289 * allocates numerous items that must be freed later 9290 */ 9291 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9292 { 9293 u32 trans_support; 9294 unsigned long transMethod = CFGTBL_Trans_Performant | 9295 CFGTBL_Trans_use_short_tags; 9296 int i, rc; 9297 9298 if (hpsa_simple_mode) 9299 return 0; 9300 9301 trans_support = readl(&(h->cfgtable->TransportSupport)); 9302 if (!(trans_support & PERFORMANT_MODE)) 9303 return 0; 9304 9305 /* Check for I/O accelerator mode support */ 9306 if (trans_support & CFGTBL_Trans_io_accel1) { 9307 transMethod |= CFGTBL_Trans_io_accel1 | 9308 CFGTBL_Trans_enable_directed_msix; 9309 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9310 if (rc) 9311 return rc; 9312 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9313 transMethod |= CFGTBL_Trans_io_accel2 | 9314 CFGTBL_Trans_enable_directed_msix; 9315 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9316 if (rc) 9317 return rc; 9318 } 9319 9320 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9321 hpsa_get_max_perf_mode_cmds(h); 9322 /* Performant mode ring buffer and supporting data structures */ 9323 h->reply_queue_size = h->max_commands * sizeof(u64); 9324 9325 for (i = 0; i < h->nreply_queues; i++) { 9326 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 9327 h->reply_queue_size, 9328 &(h->reply_queue[i].busaddr)); 9329 if (!h->reply_queue[i].head) { 9330 rc = -ENOMEM; 9331 goto clean1; /* rq, ioaccel */ 9332 } 9333 h->reply_queue[i].size = h->max_commands; 9334 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9335 h->reply_queue[i].current_entry = 0; 9336 } 9337 9338 /* Need a block fetch table for performant mode */ 9339 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9340 sizeof(u32)), GFP_KERNEL); 9341 if (!h->blockFetchTable) { 9342 rc = -ENOMEM; 9343 goto clean1; /* rq, ioaccel */ 9344 } 9345 9346 rc = hpsa_enter_performant_mode(h, trans_support); 9347 if (rc) 9348 goto clean2; /* bft, rq, ioaccel */ 9349 return 0; 9350 9351 clean2: /* bft, rq, ioaccel */ 9352 kfree(h->blockFetchTable); 9353 h->blockFetchTable = NULL; 9354 clean1: /* rq, ioaccel */ 9355 hpsa_free_reply_queues(h); 9356 hpsa_free_ioaccel1_cmd_and_bft(h); 9357 hpsa_free_ioaccel2_cmd_and_bft(h); 9358 return rc; 9359 } 9360 9361 static int is_accelerated_cmd(struct CommandList *c) 9362 { 9363 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9364 } 9365 9366 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9367 { 9368 struct CommandList *c = NULL; 9369 int i, accel_cmds_out; 9370 int refcount; 9371 9372 do { /* wait for all outstanding ioaccel commands to drain out */ 9373 accel_cmds_out = 0; 9374 for (i = 0; i < h->nr_cmds; i++) { 9375 c = h->cmd_pool + i; 9376 refcount = atomic_inc_return(&c->refcount); 9377 if (refcount > 1) /* Command is allocated */ 9378 accel_cmds_out += is_accelerated_cmd(c); 9379 cmd_free(h, c); 9380 } 9381 if (accel_cmds_out <= 0) 9382 break; 9383 msleep(100); 9384 } while (1); 9385 } 9386 9387 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9388 struct hpsa_sas_port *hpsa_sas_port) 9389 { 9390 struct hpsa_sas_phy *hpsa_sas_phy; 9391 struct sas_phy *phy; 9392 9393 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9394 if (!hpsa_sas_phy) 9395 return NULL; 9396 9397 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9398 hpsa_sas_port->next_phy_index); 9399 if (!phy) { 9400 kfree(hpsa_sas_phy); 9401 return NULL; 9402 } 9403 9404 hpsa_sas_port->next_phy_index++; 9405 hpsa_sas_phy->phy = phy; 9406 hpsa_sas_phy->parent_port = hpsa_sas_port; 9407 9408 return hpsa_sas_phy; 9409 } 9410 9411 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9412 { 9413 struct sas_phy *phy = hpsa_sas_phy->phy; 9414 9415 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9416 if (hpsa_sas_phy->added_to_port) 9417 list_del(&hpsa_sas_phy->phy_list_entry); 9418 sas_phy_delete(phy); 9419 kfree(hpsa_sas_phy); 9420 } 9421 9422 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9423 { 9424 int rc; 9425 struct hpsa_sas_port *hpsa_sas_port; 9426 struct sas_phy *phy; 9427 struct sas_identify *identify; 9428 9429 hpsa_sas_port = hpsa_sas_phy->parent_port; 9430 phy = hpsa_sas_phy->phy; 9431 9432 identify = &phy->identify; 9433 memset(identify, 0, sizeof(*identify)); 9434 identify->sas_address = hpsa_sas_port->sas_address; 9435 identify->device_type = SAS_END_DEVICE; 9436 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9437 identify->target_port_protocols = SAS_PROTOCOL_STP; 9438 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9439 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9440 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9441 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9442 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9443 9444 rc = sas_phy_add(hpsa_sas_phy->phy); 9445 if (rc) 9446 return rc; 9447 9448 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9449 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9450 &hpsa_sas_port->phy_list_head); 9451 hpsa_sas_phy->added_to_port = true; 9452 9453 return 0; 9454 } 9455 9456 static int 9457 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9458 struct sas_rphy *rphy) 9459 { 9460 struct sas_identify *identify; 9461 9462 identify = &rphy->identify; 9463 identify->sas_address = hpsa_sas_port->sas_address; 9464 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9465 identify->target_port_protocols = SAS_PROTOCOL_STP; 9466 9467 return sas_rphy_add(rphy); 9468 } 9469 9470 static struct hpsa_sas_port 9471 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9472 u64 sas_address) 9473 { 9474 int rc; 9475 struct hpsa_sas_port *hpsa_sas_port; 9476 struct sas_port *port; 9477 9478 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9479 if (!hpsa_sas_port) 9480 return NULL; 9481 9482 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9483 hpsa_sas_port->parent_node = hpsa_sas_node; 9484 9485 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9486 if (!port) 9487 goto free_hpsa_port; 9488 9489 rc = sas_port_add(port); 9490 if (rc) 9491 goto free_sas_port; 9492 9493 hpsa_sas_port->port = port; 9494 hpsa_sas_port->sas_address = sas_address; 9495 list_add_tail(&hpsa_sas_port->port_list_entry, 9496 &hpsa_sas_node->port_list_head); 9497 9498 return hpsa_sas_port; 9499 9500 free_sas_port: 9501 sas_port_free(port); 9502 free_hpsa_port: 9503 kfree(hpsa_sas_port); 9504 9505 return NULL; 9506 } 9507 9508 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9509 { 9510 struct hpsa_sas_phy *hpsa_sas_phy; 9511 struct hpsa_sas_phy *next; 9512 9513 list_for_each_entry_safe(hpsa_sas_phy, next, 9514 &hpsa_sas_port->phy_list_head, phy_list_entry) 9515 hpsa_free_sas_phy(hpsa_sas_phy); 9516 9517 sas_port_delete(hpsa_sas_port->port); 9518 list_del(&hpsa_sas_port->port_list_entry); 9519 kfree(hpsa_sas_port); 9520 } 9521 9522 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9523 { 9524 struct hpsa_sas_node *hpsa_sas_node; 9525 9526 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9527 if (hpsa_sas_node) { 9528 hpsa_sas_node->parent_dev = parent_dev; 9529 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9530 } 9531 9532 return hpsa_sas_node; 9533 } 9534 9535 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9536 { 9537 struct hpsa_sas_port *hpsa_sas_port; 9538 struct hpsa_sas_port *next; 9539 9540 if (!hpsa_sas_node) 9541 return; 9542 9543 list_for_each_entry_safe(hpsa_sas_port, next, 9544 &hpsa_sas_node->port_list_head, port_list_entry) 9545 hpsa_free_sas_port(hpsa_sas_port); 9546 9547 kfree(hpsa_sas_node); 9548 } 9549 9550 static struct hpsa_scsi_dev_t 9551 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9552 struct sas_rphy *rphy) 9553 { 9554 int i; 9555 struct hpsa_scsi_dev_t *device; 9556 9557 for (i = 0; i < h->ndevices; i++) { 9558 device = h->dev[i]; 9559 if (!device->sas_port) 9560 continue; 9561 if (device->sas_port->rphy == rphy) 9562 return device; 9563 } 9564 9565 return NULL; 9566 } 9567 9568 static int hpsa_add_sas_host(struct ctlr_info *h) 9569 { 9570 int rc; 9571 struct device *parent_dev; 9572 struct hpsa_sas_node *hpsa_sas_node; 9573 struct hpsa_sas_port *hpsa_sas_port; 9574 struct hpsa_sas_phy *hpsa_sas_phy; 9575 9576 parent_dev = &h->scsi_host->shost_dev; 9577 9578 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9579 if (!hpsa_sas_node) 9580 return -ENOMEM; 9581 9582 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9583 if (!hpsa_sas_port) { 9584 rc = -ENODEV; 9585 goto free_sas_node; 9586 } 9587 9588 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9589 if (!hpsa_sas_phy) { 9590 rc = -ENODEV; 9591 goto free_sas_port; 9592 } 9593 9594 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9595 if (rc) 9596 goto free_sas_phy; 9597 9598 h->sas_host = hpsa_sas_node; 9599 9600 return 0; 9601 9602 free_sas_phy: 9603 hpsa_free_sas_phy(hpsa_sas_phy); 9604 free_sas_port: 9605 hpsa_free_sas_port(hpsa_sas_port); 9606 free_sas_node: 9607 hpsa_free_sas_node(hpsa_sas_node); 9608 9609 return rc; 9610 } 9611 9612 static void hpsa_delete_sas_host(struct ctlr_info *h) 9613 { 9614 hpsa_free_sas_node(h->sas_host); 9615 } 9616 9617 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9618 struct hpsa_scsi_dev_t *device) 9619 { 9620 int rc; 9621 struct hpsa_sas_port *hpsa_sas_port; 9622 struct sas_rphy *rphy; 9623 9624 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9625 if (!hpsa_sas_port) 9626 return -ENOMEM; 9627 9628 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9629 if (!rphy) { 9630 rc = -ENODEV; 9631 goto free_sas_port; 9632 } 9633 9634 hpsa_sas_port->rphy = rphy; 9635 device->sas_port = hpsa_sas_port; 9636 9637 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9638 if (rc) 9639 goto free_sas_port; 9640 9641 return 0; 9642 9643 free_sas_port: 9644 hpsa_free_sas_port(hpsa_sas_port); 9645 device->sas_port = NULL; 9646 9647 return rc; 9648 } 9649 9650 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9651 { 9652 if (device->sas_port) { 9653 hpsa_free_sas_port(device->sas_port); 9654 device->sas_port = NULL; 9655 } 9656 } 9657 9658 static int 9659 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9660 { 9661 return 0; 9662 } 9663 9664 static int 9665 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9666 { 9667 *identifier = rphy->identify.sas_address; 9668 return 0; 9669 } 9670 9671 static int 9672 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9673 { 9674 return -ENXIO; 9675 } 9676 9677 static int 9678 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9679 { 9680 return 0; 9681 } 9682 9683 static int 9684 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9685 { 9686 return 0; 9687 } 9688 9689 static int 9690 hpsa_sas_phy_setup(struct sas_phy *phy) 9691 { 9692 return 0; 9693 } 9694 9695 static void 9696 hpsa_sas_phy_release(struct sas_phy *phy) 9697 { 9698 } 9699 9700 static int 9701 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9702 { 9703 return -EINVAL; 9704 } 9705 9706 static struct sas_function_template hpsa_sas_transport_functions = { 9707 .get_linkerrors = hpsa_sas_get_linkerrors, 9708 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9709 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9710 .phy_reset = hpsa_sas_phy_reset, 9711 .phy_enable = hpsa_sas_phy_enable, 9712 .phy_setup = hpsa_sas_phy_setup, 9713 .phy_release = hpsa_sas_phy_release, 9714 .set_phy_speed = hpsa_sas_phy_speed, 9715 }; 9716 9717 /* 9718 * This is it. Register the PCI driver information for the cards we control 9719 * the OS will call our registered routines when it finds one of our cards. 9720 */ 9721 static int __init hpsa_init(void) 9722 { 9723 int rc; 9724 9725 hpsa_sas_transport_template = 9726 sas_attach_transport(&hpsa_sas_transport_functions); 9727 if (!hpsa_sas_transport_template) 9728 return -ENODEV; 9729 9730 rc = pci_register_driver(&hpsa_pci_driver); 9731 9732 if (rc) 9733 sas_release_transport(hpsa_sas_transport_template); 9734 9735 return rc; 9736 } 9737 9738 static void __exit hpsa_cleanup(void) 9739 { 9740 pci_unregister_driver(&hpsa_pci_driver); 9741 sas_release_transport(hpsa_sas_transport_template); 9742 } 9743 9744 static void __attribute__((unused)) verify_offsets(void) 9745 { 9746 #define VERIFY_OFFSET(member, offset) \ 9747 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9748 9749 VERIFY_OFFSET(structure_size, 0); 9750 VERIFY_OFFSET(volume_blk_size, 4); 9751 VERIFY_OFFSET(volume_blk_cnt, 8); 9752 VERIFY_OFFSET(phys_blk_shift, 16); 9753 VERIFY_OFFSET(parity_rotation_shift, 17); 9754 VERIFY_OFFSET(strip_size, 18); 9755 VERIFY_OFFSET(disk_starting_blk, 20); 9756 VERIFY_OFFSET(disk_blk_cnt, 28); 9757 VERIFY_OFFSET(data_disks_per_row, 36); 9758 VERIFY_OFFSET(metadata_disks_per_row, 38); 9759 VERIFY_OFFSET(row_cnt, 40); 9760 VERIFY_OFFSET(layout_map_count, 42); 9761 VERIFY_OFFSET(flags, 44); 9762 VERIFY_OFFSET(dekindex, 46); 9763 /* VERIFY_OFFSET(reserved, 48 */ 9764 VERIFY_OFFSET(data, 64); 9765 9766 #undef VERIFY_OFFSET 9767 9768 #define VERIFY_OFFSET(member, offset) \ 9769 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9770 9771 VERIFY_OFFSET(IU_type, 0); 9772 VERIFY_OFFSET(direction, 1); 9773 VERIFY_OFFSET(reply_queue, 2); 9774 /* VERIFY_OFFSET(reserved1, 3); */ 9775 VERIFY_OFFSET(scsi_nexus, 4); 9776 VERIFY_OFFSET(Tag, 8); 9777 VERIFY_OFFSET(cdb, 16); 9778 VERIFY_OFFSET(cciss_lun, 32); 9779 VERIFY_OFFSET(data_len, 40); 9780 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9781 VERIFY_OFFSET(sg_count, 45); 9782 /* VERIFY_OFFSET(reserved3 */ 9783 VERIFY_OFFSET(err_ptr, 48); 9784 VERIFY_OFFSET(err_len, 56); 9785 /* VERIFY_OFFSET(reserved4 */ 9786 VERIFY_OFFSET(sg, 64); 9787 9788 #undef VERIFY_OFFSET 9789 9790 #define VERIFY_OFFSET(member, offset) \ 9791 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9792 9793 VERIFY_OFFSET(dev_handle, 0x00); 9794 VERIFY_OFFSET(reserved1, 0x02); 9795 VERIFY_OFFSET(function, 0x03); 9796 VERIFY_OFFSET(reserved2, 0x04); 9797 VERIFY_OFFSET(err_info, 0x0C); 9798 VERIFY_OFFSET(reserved3, 0x10); 9799 VERIFY_OFFSET(err_info_len, 0x12); 9800 VERIFY_OFFSET(reserved4, 0x13); 9801 VERIFY_OFFSET(sgl_offset, 0x14); 9802 VERIFY_OFFSET(reserved5, 0x15); 9803 VERIFY_OFFSET(transfer_len, 0x1C); 9804 VERIFY_OFFSET(reserved6, 0x20); 9805 VERIFY_OFFSET(io_flags, 0x24); 9806 VERIFY_OFFSET(reserved7, 0x26); 9807 VERIFY_OFFSET(LUN, 0x34); 9808 VERIFY_OFFSET(control, 0x3C); 9809 VERIFY_OFFSET(CDB, 0x40); 9810 VERIFY_OFFSET(reserved8, 0x50); 9811 VERIFY_OFFSET(host_context_flags, 0x60); 9812 VERIFY_OFFSET(timeout_sec, 0x62); 9813 VERIFY_OFFSET(ReplyQueue, 0x64); 9814 VERIFY_OFFSET(reserved9, 0x65); 9815 VERIFY_OFFSET(tag, 0x68); 9816 VERIFY_OFFSET(host_addr, 0x70); 9817 VERIFY_OFFSET(CISS_LUN, 0x78); 9818 VERIFY_OFFSET(SG, 0x78 + 8); 9819 #undef VERIFY_OFFSET 9820 } 9821 9822 module_init(hpsa_init); 9823 module_exit(hpsa_cleanup); 9824