1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2014 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/init.h> 33 #include <linux/spinlock.h> 34 #include <linux/compat.h> 35 #include <linux/blktrace_api.h> 36 #include <linux/uaccess.h> 37 #include <linux/io.h> 38 #include <linux/dma-mapping.h> 39 #include <linux/completion.h> 40 #include <linux/moduleparam.h> 41 #include <scsi/scsi.h> 42 #include <scsi/scsi_cmnd.h> 43 #include <scsi/scsi_device.h> 44 #include <scsi/scsi_host.h> 45 #include <scsi/scsi_tcq.h> 46 #include <linux/cciss_ioctl.h> 47 #include <linux/string.h> 48 #include <linux/bitmap.h> 49 #include <linux/atomic.h> 50 #include <linux/jiffies.h> 51 #include <linux/percpu-defs.h> 52 #include <linux/percpu.h> 53 #include <asm/div64.h> 54 #include "hpsa_cmd.h" 55 #include "hpsa.h" 56 57 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 58 #define HPSA_DRIVER_VERSION "3.4.4-1" 59 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 60 #define HPSA "hpsa" 61 62 /* How long to wait (in milliseconds) for board to go into simple mode */ 63 #define MAX_CONFIG_WAIT 30000 64 #define MAX_IOCTL_CONFIG_WAIT 1000 65 66 /*define how many times we will try a command because of bus resets */ 67 #define MAX_CMD_RETRIES 3 68 69 /* Embedded module documentation macros - see modules.h */ 70 MODULE_AUTHOR("Hewlett-Packard Company"); 71 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 72 HPSA_DRIVER_VERSION); 73 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 74 MODULE_VERSION(HPSA_DRIVER_VERSION); 75 MODULE_LICENSE("GPL"); 76 77 static int hpsa_allow_any; 78 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 79 MODULE_PARM_DESC(hpsa_allow_any, 80 "Allow hpsa driver to access unknown HP Smart Array hardware"); 81 static int hpsa_simple_mode; 82 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 83 MODULE_PARM_DESC(hpsa_simple_mode, 84 "Use 'simple mode' rather than 'performant mode'"); 85 86 /* define the PCI info for the cards we can control */ 87 static const struct pci_device_id hpsa_pci_device_id[] = { 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 128 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 129 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 130 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 131 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 132 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 133 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 134 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 135 {0,} 136 }; 137 138 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 139 140 /* board_id = Subsystem Device ID & Vendor ID 141 * product = Marketing Name for the board 142 * access = Address of the struct of function pointers 143 */ 144 static struct board_type products[] = { 145 {0x3241103C, "Smart Array P212", &SA5_access}, 146 {0x3243103C, "Smart Array P410", &SA5_access}, 147 {0x3245103C, "Smart Array P410i", &SA5_access}, 148 {0x3247103C, "Smart Array P411", &SA5_access}, 149 {0x3249103C, "Smart Array P812", &SA5_access}, 150 {0x324A103C, "Smart Array P712m", &SA5_access}, 151 {0x324B103C, "Smart Array P711m", &SA5_access}, 152 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 153 {0x3350103C, "Smart Array P222", &SA5_access}, 154 {0x3351103C, "Smart Array P420", &SA5_access}, 155 {0x3352103C, "Smart Array P421", &SA5_access}, 156 {0x3353103C, "Smart Array P822", &SA5_access}, 157 {0x3354103C, "Smart Array P420i", &SA5_access}, 158 {0x3355103C, "Smart Array P220i", &SA5_access}, 159 {0x3356103C, "Smart Array P721m", &SA5_access}, 160 {0x1921103C, "Smart Array P830i", &SA5_access}, 161 {0x1922103C, "Smart Array P430", &SA5_access}, 162 {0x1923103C, "Smart Array P431", &SA5_access}, 163 {0x1924103C, "Smart Array P830", &SA5_access}, 164 {0x1926103C, "Smart Array P731m", &SA5_access}, 165 {0x1928103C, "Smart Array P230i", &SA5_access}, 166 {0x1929103C, "Smart Array P530", &SA5_access}, 167 {0x21BD103C, "Smart Array", &SA5_access}, 168 {0x21BE103C, "Smart Array", &SA5_access}, 169 {0x21BF103C, "Smart Array", &SA5_access}, 170 {0x21C0103C, "Smart Array", &SA5_access}, 171 {0x21C1103C, "Smart Array", &SA5_access}, 172 {0x21C2103C, "Smart Array", &SA5_access}, 173 {0x21C3103C, "Smart Array", &SA5_access}, 174 {0x21C4103C, "Smart Array", &SA5_access}, 175 {0x21C5103C, "Smart Array", &SA5_access}, 176 {0x21C6103C, "Smart Array", &SA5_access}, 177 {0x21C7103C, "Smart Array", &SA5_access}, 178 {0x21C8103C, "Smart Array", &SA5_access}, 179 {0x21C9103C, "Smart Array", &SA5_access}, 180 {0x21CA103C, "Smart Array", &SA5_access}, 181 {0x21CB103C, "Smart Array", &SA5_access}, 182 {0x21CC103C, "Smart Array", &SA5_access}, 183 {0x21CD103C, "Smart Array", &SA5_access}, 184 {0x21CE103C, "Smart Array", &SA5_access}, 185 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 186 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 187 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 188 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 189 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 190 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 191 }; 192 193 static int number_of_controllers; 194 195 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 196 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 197 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg); 198 static void lock_and_start_io(struct ctlr_info *h); 199 static void start_io(struct ctlr_info *h, unsigned long *flags); 200 201 #ifdef CONFIG_COMPAT 202 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, 203 void __user *arg); 204 #endif 205 206 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 207 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 208 static struct CommandList *cmd_alloc(struct ctlr_info *h); 209 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 210 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 211 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 212 int cmd_type); 213 #define VPD_PAGE (1 << 8) 214 215 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 216 static void hpsa_scan_start(struct Scsi_Host *); 217 static int hpsa_scan_finished(struct Scsi_Host *sh, 218 unsigned long elapsed_time); 219 220 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 221 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 222 static int hpsa_slave_alloc(struct scsi_device *sdev); 223 static void hpsa_slave_destroy(struct scsi_device *sdev); 224 225 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 226 static int check_for_unit_attention(struct ctlr_info *h, 227 struct CommandList *c); 228 static void check_ioctl_unit_attention(struct ctlr_info *h, 229 struct CommandList *c); 230 /* performant mode helper functions */ 231 static void calc_bucket_map(int *bucket, int num_buckets, 232 int nsgs, int min_blocks, int *bucket_map); 233 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 234 static inline u32 next_command(struct ctlr_info *h, u8 q); 235 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 236 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 237 u64 *cfg_offset); 238 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 239 unsigned long *memory_bar); 240 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 241 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 242 int wait_for_ready); 243 static inline void finish_cmd(struct CommandList *c); 244 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 245 #define BOARD_NOT_READY 0 246 #define BOARD_READY 1 247 static void hpsa_drain_accel_commands(struct ctlr_info *h); 248 static void hpsa_flush_cache(struct ctlr_info *h); 249 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 250 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 251 u8 *scsi3addr); 252 253 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 254 { 255 unsigned long *priv = shost_priv(sdev->host); 256 return (struct ctlr_info *) *priv; 257 } 258 259 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 260 { 261 unsigned long *priv = shost_priv(sh); 262 return (struct ctlr_info *) *priv; 263 } 264 265 static int check_for_unit_attention(struct ctlr_info *h, 266 struct CommandList *c) 267 { 268 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 269 return 0; 270 271 switch (c->err_info->SenseInfo[12]) { 272 case STATE_CHANGED: 273 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 274 "detected, command retried\n", h->ctlr); 275 break; 276 case LUN_FAILED: 277 dev_warn(&h->pdev->dev, 278 HPSA "%d: LUN failure detected\n", h->ctlr); 279 break; 280 case REPORT_LUNS_CHANGED: 281 dev_warn(&h->pdev->dev, 282 HPSA "%d: report LUN data changed\n", h->ctlr); 283 /* 284 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 285 * target (array) devices. 286 */ 287 break; 288 case POWER_OR_RESET: 289 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 290 "or device reset detected\n", h->ctlr); 291 break; 292 case UNIT_ATTENTION_CLEARED: 293 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 294 "cleared by another initiator\n", h->ctlr); 295 break; 296 default: 297 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 298 "unit attention detected\n", h->ctlr); 299 break; 300 } 301 return 1; 302 } 303 304 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 305 { 306 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 307 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 308 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 309 return 0; 310 dev_warn(&h->pdev->dev, HPSA "device busy"); 311 return 1; 312 } 313 314 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 315 struct device_attribute *attr, 316 const char *buf, size_t count) 317 { 318 int status, len; 319 struct ctlr_info *h; 320 struct Scsi_Host *shost = class_to_shost(dev); 321 char tmpbuf[10]; 322 323 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 324 return -EACCES; 325 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 326 strncpy(tmpbuf, buf, len); 327 tmpbuf[len] = '\0'; 328 if (sscanf(tmpbuf, "%d", &status) != 1) 329 return -EINVAL; 330 h = shost_to_hba(shost); 331 h->acciopath_status = !!status; 332 dev_warn(&h->pdev->dev, 333 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 334 h->acciopath_status ? "enabled" : "disabled"); 335 return count; 336 } 337 338 static ssize_t host_store_raid_offload_debug(struct device *dev, 339 struct device_attribute *attr, 340 const char *buf, size_t count) 341 { 342 int debug_level, len; 343 struct ctlr_info *h; 344 struct Scsi_Host *shost = class_to_shost(dev); 345 char tmpbuf[10]; 346 347 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 348 return -EACCES; 349 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 350 strncpy(tmpbuf, buf, len); 351 tmpbuf[len] = '\0'; 352 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 353 return -EINVAL; 354 if (debug_level < 0) 355 debug_level = 0; 356 h = shost_to_hba(shost); 357 h->raid_offload_debug = debug_level; 358 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 359 h->raid_offload_debug); 360 return count; 361 } 362 363 static ssize_t host_store_rescan(struct device *dev, 364 struct device_attribute *attr, 365 const char *buf, size_t count) 366 { 367 struct ctlr_info *h; 368 struct Scsi_Host *shost = class_to_shost(dev); 369 h = shost_to_hba(shost); 370 hpsa_scan_start(h->scsi_host); 371 return count; 372 } 373 374 static ssize_t host_show_firmware_revision(struct device *dev, 375 struct device_attribute *attr, char *buf) 376 { 377 struct ctlr_info *h; 378 struct Scsi_Host *shost = class_to_shost(dev); 379 unsigned char *fwrev; 380 381 h = shost_to_hba(shost); 382 if (!h->hba_inquiry_data) 383 return 0; 384 fwrev = &h->hba_inquiry_data[32]; 385 return snprintf(buf, 20, "%c%c%c%c\n", 386 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 387 } 388 389 static ssize_t host_show_commands_outstanding(struct device *dev, 390 struct device_attribute *attr, char *buf) 391 { 392 struct Scsi_Host *shost = class_to_shost(dev); 393 struct ctlr_info *h = shost_to_hba(shost); 394 395 return snprintf(buf, 20, "%d\n", 396 atomic_read(&h->commands_outstanding)); 397 } 398 399 static ssize_t host_show_transport_mode(struct device *dev, 400 struct device_attribute *attr, char *buf) 401 { 402 struct ctlr_info *h; 403 struct Scsi_Host *shost = class_to_shost(dev); 404 405 h = shost_to_hba(shost); 406 return snprintf(buf, 20, "%s\n", 407 h->transMethod & CFGTBL_Trans_Performant ? 408 "performant" : "simple"); 409 } 410 411 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 412 struct device_attribute *attr, char *buf) 413 { 414 struct ctlr_info *h; 415 struct Scsi_Host *shost = class_to_shost(dev); 416 417 h = shost_to_hba(shost); 418 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 419 (h->acciopath_status == 1) ? "enabled" : "disabled"); 420 } 421 422 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 423 static u32 unresettable_controller[] = { 424 0x324a103C, /* Smart Array P712m */ 425 0x324b103C, /* SmartArray P711m */ 426 0x3223103C, /* Smart Array P800 */ 427 0x3234103C, /* Smart Array P400 */ 428 0x3235103C, /* Smart Array P400i */ 429 0x3211103C, /* Smart Array E200i */ 430 0x3212103C, /* Smart Array E200 */ 431 0x3213103C, /* Smart Array E200i */ 432 0x3214103C, /* Smart Array E200i */ 433 0x3215103C, /* Smart Array E200i */ 434 0x3237103C, /* Smart Array E500 */ 435 0x323D103C, /* Smart Array P700m */ 436 0x40800E11, /* Smart Array 5i */ 437 0x409C0E11, /* Smart Array 6400 */ 438 0x409D0E11, /* Smart Array 6400 EM */ 439 0x40700E11, /* Smart Array 5300 */ 440 0x40820E11, /* Smart Array 532 */ 441 0x40830E11, /* Smart Array 5312 */ 442 0x409A0E11, /* Smart Array 641 */ 443 0x409B0E11, /* Smart Array 642 */ 444 0x40910E11, /* Smart Array 6i */ 445 }; 446 447 /* List of controllers which cannot even be soft reset */ 448 static u32 soft_unresettable_controller[] = { 449 0x40800E11, /* Smart Array 5i */ 450 0x40700E11, /* Smart Array 5300 */ 451 0x40820E11, /* Smart Array 532 */ 452 0x40830E11, /* Smart Array 5312 */ 453 0x409A0E11, /* Smart Array 641 */ 454 0x409B0E11, /* Smart Array 642 */ 455 0x40910E11, /* Smart Array 6i */ 456 /* Exclude 640x boards. These are two pci devices in one slot 457 * which share a battery backed cache module. One controls the 458 * cache, the other accesses the cache through the one that controls 459 * it. If we reset the one controlling the cache, the other will 460 * likely not be happy. Just forbid resetting this conjoined mess. 461 * The 640x isn't really supported by hpsa anyway. 462 */ 463 0x409C0E11, /* Smart Array 6400 */ 464 0x409D0E11, /* Smart Array 6400 EM */ 465 }; 466 467 static int ctlr_is_hard_resettable(u32 board_id) 468 { 469 int i; 470 471 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 472 if (unresettable_controller[i] == board_id) 473 return 0; 474 return 1; 475 } 476 477 static int ctlr_is_soft_resettable(u32 board_id) 478 { 479 int i; 480 481 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 482 if (soft_unresettable_controller[i] == board_id) 483 return 0; 484 return 1; 485 } 486 487 static int ctlr_is_resettable(u32 board_id) 488 { 489 return ctlr_is_hard_resettable(board_id) || 490 ctlr_is_soft_resettable(board_id); 491 } 492 493 static ssize_t host_show_resettable(struct device *dev, 494 struct device_attribute *attr, char *buf) 495 { 496 struct ctlr_info *h; 497 struct Scsi_Host *shost = class_to_shost(dev); 498 499 h = shost_to_hba(shost); 500 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 501 } 502 503 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 504 { 505 return (scsi3addr[3] & 0xC0) == 0x40; 506 } 507 508 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 509 "1(ADM)", "UNKNOWN" 510 }; 511 #define HPSA_RAID_0 0 512 #define HPSA_RAID_4 1 513 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 514 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 515 #define HPSA_RAID_51 4 516 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 517 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 518 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 519 520 static ssize_t raid_level_show(struct device *dev, 521 struct device_attribute *attr, char *buf) 522 { 523 ssize_t l = 0; 524 unsigned char rlevel; 525 struct ctlr_info *h; 526 struct scsi_device *sdev; 527 struct hpsa_scsi_dev_t *hdev; 528 unsigned long flags; 529 530 sdev = to_scsi_device(dev); 531 h = sdev_to_hba(sdev); 532 spin_lock_irqsave(&h->lock, flags); 533 hdev = sdev->hostdata; 534 if (!hdev) { 535 spin_unlock_irqrestore(&h->lock, flags); 536 return -ENODEV; 537 } 538 539 /* Is this even a logical drive? */ 540 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 541 spin_unlock_irqrestore(&h->lock, flags); 542 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 543 return l; 544 } 545 546 rlevel = hdev->raid_level; 547 spin_unlock_irqrestore(&h->lock, flags); 548 if (rlevel > RAID_UNKNOWN) 549 rlevel = RAID_UNKNOWN; 550 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 551 return l; 552 } 553 554 static ssize_t lunid_show(struct device *dev, 555 struct device_attribute *attr, char *buf) 556 { 557 struct ctlr_info *h; 558 struct scsi_device *sdev; 559 struct hpsa_scsi_dev_t *hdev; 560 unsigned long flags; 561 unsigned char lunid[8]; 562 563 sdev = to_scsi_device(dev); 564 h = sdev_to_hba(sdev); 565 spin_lock_irqsave(&h->lock, flags); 566 hdev = sdev->hostdata; 567 if (!hdev) { 568 spin_unlock_irqrestore(&h->lock, flags); 569 return -ENODEV; 570 } 571 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 572 spin_unlock_irqrestore(&h->lock, flags); 573 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 574 lunid[0], lunid[1], lunid[2], lunid[3], 575 lunid[4], lunid[5], lunid[6], lunid[7]); 576 } 577 578 static ssize_t unique_id_show(struct device *dev, 579 struct device_attribute *attr, char *buf) 580 { 581 struct ctlr_info *h; 582 struct scsi_device *sdev; 583 struct hpsa_scsi_dev_t *hdev; 584 unsigned long flags; 585 unsigned char sn[16]; 586 587 sdev = to_scsi_device(dev); 588 h = sdev_to_hba(sdev); 589 spin_lock_irqsave(&h->lock, flags); 590 hdev = sdev->hostdata; 591 if (!hdev) { 592 spin_unlock_irqrestore(&h->lock, flags); 593 return -ENODEV; 594 } 595 memcpy(sn, hdev->device_id, sizeof(sn)); 596 spin_unlock_irqrestore(&h->lock, flags); 597 return snprintf(buf, 16 * 2 + 2, 598 "%02X%02X%02X%02X%02X%02X%02X%02X" 599 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 600 sn[0], sn[1], sn[2], sn[3], 601 sn[4], sn[5], sn[6], sn[7], 602 sn[8], sn[9], sn[10], sn[11], 603 sn[12], sn[13], sn[14], sn[15]); 604 } 605 606 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 607 struct device_attribute *attr, char *buf) 608 { 609 struct ctlr_info *h; 610 struct scsi_device *sdev; 611 struct hpsa_scsi_dev_t *hdev; 612 unsigned long flags; 613 int offload_enabled; 614 615 sdev = to_scsi_device(dev); 616 h = sdev_to_hba(sdev); 617 spin_lock_irqsave(&h->lock, flags); 618 hdev = sdev->hostdata; 619 if (!hdev) { 620 spin_unlock_irqrestore(&h->lock, flags); 621 return -ENODEV; 622 } 623 offload_enabled = hdev->offload_enabled; 624 spin_unlock_irqrestore(&h->lock, flags); 625 return snprintf(buf, 20, "%d\n", offload_enabled); 626 } 627 628 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 629 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 630 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 631 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 632 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 633 host_show_hp_ssd_smart_path_enabled, NULL); 634 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 635 host_show_hp_ssd_smart_path_status, 636 host_store_hp_ssd_smart_path_status); 637 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 638 host_store_raid_offload_debug); 639 static DEVICE_ATTR(firmware_revision, S_IRUGO, 640 host_show_firmware_revision, NULL); 641 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 642 host_show_commands_outstanding, NULL); 643 static DEVICE_ATTR(transport_mode, S_IRUGO, 644 host_show_transport_mode, NULL); 645 static DEVICE_ATTR(resettable, S_IRUGO, 646 host_show_resettable, NULL); 647 648 static struct device_attribute *hpsa_sdev_attrs[] = { 649 &dev_attr_raid_level, 650 &dev_attr_lunid, 651 &dev_attr_unique_id, 652 &dev_attr_hp_ssd_smart_path_enabled, 653 NULL, 654 }; 655 656 static struct device_attribute *hpsa_shost_attrs[] = { 657 &dev_attr_rescan, 658 &dev_attr_firmware_revision, 659 &dev_attr_commands_outstanding, 660 &dev_attr_transport_mode, 661 &dev_attr_resettable, 662 &dev_attr_hp_ssd_smart_path_status, 663 &dev_attr_raid_offload_debug, 664 NULL, 665 }; 666 667 static struct scsi_host_template hpsa_driver_template = { 668 .module = THIS_MODULE, 669 .name = HPSA, 670 .proc_name = HPSA, 671 .queuecommand = hpsa_scsi_queue_command, 672 .scan_start = hpsa_scan_start, 673 .scan_finished = hpsa_scan_finished, 674 .change_queue_depth = scsi_change_queue_depth, 675 .this_id = -1, 676 .use_clustering = ENABLE_CLUSTERING, 677 .eh_abort_handler = hpsa_eh_abort_handler, 678 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 679 .ioctl = hpsa_ioctl, 680 .slave_alloc = hpsa_slave_alloc, 681 .slave_destroy = hpsa_slave_destroy, 682 #ifdef CONFIG_COMPAT 683 .compat_ioctl = hpsa_compat_ioctl, 684 #endif 685 .sdev_attrs = hpsa_sdev_attrs, 686 .shost_attrs = hpsa_shost_attrs, 687 .max_sectors = 8192, 688 .no_write_same = 1, 689 }; 690 691 692 /* Enqueuing and dequeuing functions for cmdlists. */ 693 static inline void addQ(struct list_head *list, struct CommandList *c) 694 { 695 list_add_tail(&c->list, list); 696 } 697 698 static inline u32 next_command(struct ctlr_info *h, u8 q) 699 { 700 u32 a; 701 struct reply_queue_buffer *rq = &h->reply_queue[q]; 702 703 if (h->transMethod & CFGTBL_Trans_io_accel1) 704 return h->access.command_completed(h, q); 705 706 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 707 return h->access.command_completed(h, q); 708 709 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 710 a = rq->head[rq->current_entry]; 711 rq->current_entry++; 712 atomic_dec(&h->commands_outstanding); 713 } else { 714 a = FIFO_EMPTY; 715 } 716 /* Check for wraparound */ 717 if (rq->current_entry == h->max_commands) { 718 rq->current_entry = 0; 719 rq->wraparound ^= 1; 720 } 721 return a; 722 } 723 724 /* 725 * There are some special bits in the bus address of the 726 * command that we have to set for the controller to know 727 * how to process the command: 728 * 729 * Normal performant mode: 730 * bit 0: 1 means performant mode, 0 means simple mode. 731 * bits 1-3 = block fetch table entry 732 * bits 4-6 = command type (== 0) 733 * 734 * ioaccel1 mode: 735 * bit 0 = "performant mode" bit. 736 * bits 1-3 = block fetch table entry 737 * bits 4-6 = command type (== 110) 738 * (command type is needed because ioaccel1 mode 739 * commands are submitted through the same register as normal 740 * mode commands, so this is how the controller knows whether 741 * the command is normal mode or ioaccel1 mode.) 742 * 743 * ioaccel2 mode: 744 * bit 0 = "performant mode" bit. 745 * bits 1-4 = block fetch table entry (note extra bit) 746 * bits 4-6 = not needed, because ioaccel2 mode has 747 * a separate special register for submitting commands. 748 */ 749 750 /* set_performant_mode: Modify the tag for cciss performant 751 * set bit 0 for pull model, bits 3-1 for block fetch 752 * register number 753 */ 754 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 755 { 756 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 757 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 758 if (likely(h->msix_vector > 0)) 759 c->Header.ReplyQueue = 760 raw_smp_processor_id() % h->nreply_queues; 761 } 762 } 763 764 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 765 struct CommandList *c) 766 { 767 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 768 769 /* Tell the controller to post the reply to the queue for this 770 * processor. This seems to give the best I/O throughput. 771 */ 772 cp->ReplyQueue = smp_processor_id() % h->nreply_queues; 773 /* Set the bits in the address sent down to include: 774 * - performant mode bit (bit 0) 775 * - pull count (bits 1-3) 776 * - command type (bits 4-6) 777 */ 778 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 779 IOACCEL1_BUSADDR_CMDTYPE; 780 } 781 782 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 783 struct CommandList *c) 784 { 785 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 786 787 /* Tell the controller to post the reply to the queue for this 788 * processor. This seems to give the best I/O throughput. 789 */ 790 cp->reply_queue = smp_processor_id() % h->nreply_queues; 791 /* Set the bits in the address sent down to include: 792 * - performant mode bit not used in ioaccel mode 2 793 * - pull count (bits 0-3) 794 * - command type isn't needed for ioaccel2 795 */ 796 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 797 } 798 799 static int is_firmware_flash_cmd(u8 *cdb) 800 { 801 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 802 } 803 804 /* 805 * During firmware flash, the heartbeat register may not update as frequently 806 * as it should. So we dial down lockup detection during firmware flash. and 807 * dial it back up when firmware flash completes. 808 */ 809 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 810 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 811 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 812 struct CommandList *c) 813 { 814 if (!is_firmware_flash_cmd(c->Request.CDB)) 815 return; 816 atomic_inc(&h->firmware_flash_in_progress); 817 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 818 } 819 820 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 821 struct CommandList *c) 822 { 823 if (is_firmware_flash_cmd(c->Request.CDB) && 824 atomic_dec_and_test(&h->firmware_flash_in_progress)) 825 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 826 } 827 828 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 829 struct CommandList *c) 830 { 831 unsigned long flags; 832 833 switch (c->cmd_type) { 834 case CMD_IOACCEL1: 835 set_ioaccel1_performant_mode(h, c); 836 break; 837 case CMD_IOACCEL2: 838 set_ioaccel2_performant_mode(h, c); 839 break; 840 default: 841 set_performant_mode(h, c); 842 } 843 dial_down_lockup_detection_during_fw_flash(h, c); 844 spin_lock_irqsave(&h->lock, flags); 845 addQ(&h->reqQ, c); 846 h->Qdepth++; 847 start_io(h, &flags); 848 spin_unlock_irqrestore(&h->lock, flags); 849 } 850 851 static inline void removeQ(struct CommandList *c) 852 { 853 if (WARN_ON(list_empty(&c->list))) 854 return; 855 list_del_init(&c->list); 856 } 857 858 static inline int is_hba_lunid(unsigned char scsi3addr[]) 859 { 860 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 861 } 862 863 static inline int is_scsi_rev_5(struct ctlr_info *h) 864 { 865 if (!h->hba_inquiry_data) 866 return 0; 867 if ((h->hba_inquiry_data[2] & 0x07) == 5) 868 return 1; 869 return 0; 870 } 871 872 static int hpsa_find_target_lun(struct ctlr_info *h, 873 unsigned char scsi3addr[], int bus, int *target, int *lun) 874 { 875 /* finds an unused bus, target, lun for a new physical device 876 * assumes h->devlock is held 877 */ 878 int i, found = 0; 879 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 880 881 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 882 883 for (i = 0; i < h->ndevices; i++) { 884 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 885 __set_bit(h->dev[i]->target, lun_taken); 886 } 887 888 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 889 if (i < HPSA_MAX_DEVICES) { 890 /* *bus = 1; */ 891 *target = i; 892 *lun = 0; 893 found = 1; 894 } 895 return !found; 896 } 897 898 /* Add an entry into h->dev[] array. */ 899 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 900 struct hpsa_scsi_dev_t *device, 901 struct hpsa_scsi_dev_t *added[], int *nadded) 902 { 903 /* assumes h->devlock is held */ 904 int n = h->ndevices; 905 int i; 906 unsigned char addr1[8], addr2[8]; 907 struct hpsa_scsi_dev_t *sd; 908 909 if (n >= HPSA_MAX_DEVICES) { 910 dev_err(&h->pdev->dev, "too many devices, some will be " 911 "inaccessible.\n"); 912 return -1; 913 } 914 915 /* physical devices do not have lun or target assigned until now. */ 916 if (device->lun != -1) 917 /* Logical device, lun is already assigned. */ 918 goto lun_assigned; 919 920 /* If this device a non-zero lun of a multi-lun device 921 * byte 4 of the 8-byte LUN addr will contain the logical 922 * unit no, zero otherise. 923 */ 924 if (device->scsi3addr[4] == 0) { 925 /* This is not a non-zero lun of a multi-lun device */ 926 if (hpsa_find_target_lun(h, device->scsi3addr, 927 device->bus, &device->target, &device->lun) != 0) 928 return -1; 929 goto lun_assigned; 930 } 931 932 /* This is a non-zero lun of a multi-lun device. 933 * Search through our list and find the device which 934 * has the same 8 byte LUN address, excepting byte 4. 935 * Assign the same bus and target for this new LUN. 936 * Use the logical unit number from the firmware. 937 */ 938 memcpy(addr1, device->scsi3addr, 8); 939 addr1[4] = 0; 940 for (i = 0; i < n; i++) { 941 sd = h->dev[i]; 942 memcpy(addr2, sd->scsi3addr, 8); 943 addr2[4] = 0; 944 /* differ only in byte 4? */ 945 if (memcmp(addr1, addr2, 8) == 0) { 946 device->bus = sd->bus; 947 device->target = sd->target; 948 device->lun = device->scsi3addr[4]; 949 break; 950 } 951 } 952 if (device->lun == -1) { 953 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 954 " suspect firmware bug or unsupported hardware " 955 "configuration.\n"); 956 return -1; 957 } 958 959 lun_assigned: 960 961 h->dev[n] = device; 962 h->ndevices++; 963 added[*nadded] = device; 964 (*nadded)++; 965 966 /* initially, (before registering with scsi layer) we don't 967 * know our hostno and we don't want to print anything first 968 * time anyway (the scsi layer's inquiries will show that info) 969 */ 970 /* if (hostno != -1) */ 971 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 972 scsi_device_type(device->devtype), hostno, 973 device->bus, device->target, device->lun); 974 return 0; 975 } 976 977 /* Update an entry in h->dev[] array. */ 978 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, 979 int entry, struct hpsa_scsi_dev_t *new_entry) 980 { 981 /* assumes h->devlock is held */ 982 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 983 984 /* Raid level changed. */ 985 h->dev[entry]->raid_level = new_entry->raid_level; 986 987 /* Raid offload parameters changed. */ 988 h->dev[entry]->offload_config = new_entry->offload_config; 989 h->dev[entry]->offload_enabled = new_entry->offload_enabled; 990 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 991 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 992 h->dev[entry]->raid_map = new_entry->raid_map; 993 994 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", 995 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 996 new_entry->target, new_entry->lun); 997 } 998 999 /* Replace an entry from h->dev[] array. */ 1000 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 1001 int entry, struct hpsa_scsi_dev_t *new_entry, 1002 struct hpsa_scsi_dev_t *added[], int *nadded, 1003 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1004 { 1005 /* assumes h->devlock is held */ 1006 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1007 removed[*nremoved] = h->dev[entry]; 1008 (*nremoved)++; 1009 1010 /* 1011 * New physical devices won't have target/lun assigned yet 1012 * so we need to preserve the values in the slot we are replacing. 1013 */ 1014 if (new_entry->target == -1) { 1015 new_entry->target = h->dev[entry]->target; 1016 new_entry->lun = h->dev[entry]->lun; 1017 } 1018 1019 h->dev[entry] = new_entry; 1020 added[*nadded] = new_entry; 1021 (*nadded)++; 1022 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 1023 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 1024 new_entry->target, new_entry->lun); 1025 } 1026 1027 /* Remove an entry from h->dev[] array. */ 1028 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 1029 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1030 { 1031 /* assumes h->devlock is held */ 1032 int i; 1033 struct hpsa_scsi_dev_t *sd; 1034 1035 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1036 1037 sd = h->dev[entry]; 1038 removed[*nremoved] = h->dev[entry]; 1039 (*nremoved)++; 1040 1041 for (i = entry; i < h->ndevices-1; i++) 1042 h->dev[i] = h->dev[i+1]; 1043 h->ndevices--; 1044 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 1045 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 1046 sd->lun); 1047 } 1048 1049 #define SCSI3ADDR_EQ(a, b) ( \ 1050 (a)[7] == (b)[7] && \ 1051 (a)[6] == (b)[6] && \ 1052 (a)[5] == (b)[5] && \ 1053 (a)[4] == (b)[4] && \ 1054 (a)[3] == (b)[3] && \ 1055 (a)[2] == (b)[2] && \ 1056 (a)[1] == (b)[1] && \ 1057 (a)[0] == (b)[0]) 1058 1059 static void fixup_botched_add(struct ctlr_info *h, 1060 struct hpsa_scsi_dev_t *added) 1061 { 1062 /* called when scsi_add_device fails in order to re-adjust 1063 * h->dev[] to match the mid layer's view. 1064 */ 1065 unsigned long flags; 1066 int i, j; 1067 1068 spin_lock_irqsave(&h->lock, flags); 1069 for (i = 0; i < h->ndevices; i++) { 1070 if (h->dev[i] == added) { 1071 for (j = i; j < h->ndevices-1; j++) 1072 h->dev[j] = h->dev[j+1]; 1073 h->ndevices--; 1074 break; 1075 } 1076 } 1077 spin_unlock_irqrestore(&h->lock, flags); 1078 kfree(added); 1079 } 1080 1081 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1082 struct hpsa_scsi_dev_t *dev2) 1083 { 1084 /* we compare everything except lun and target as these 1085 * are not yet assigned. Compare parts likely 1086 * to differ first 1087 */ 1088 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1089 sizeof(dev1->scsi3addr)) != 0) 1090 return 0; 1091 if (memcmp(dev1->device_id, dev2->device_id, 1092 sizeof(dev1->device_id)) != 0) 1093 return 0; 1094 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1095 return 0; 1096 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1097 return 0; 1098 if (dev1->devtype != dev2->devtype) 1099 return 0; 1100 if (dev1->bus != dev2->bus) 1101 return 0; 1102 return 1; 1103 } 1104 1105 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1106 struct hpsa_scsi_dev_t *dev2) 1107 { 1108 /* Device attributes that can change, but don't mean 1109 * that the device is a different device, nor that the OS 1110 * needs to be told anything about the change. 1111 */ 1112 if (dev1->raid_level != dev2->raid_level) 1113 return 1; 1114 if (dev1->offload_config != dev2->offload_config) 1115 return 1; 1116 if (dev1->offload_enabled != dev2->offload_enabled) 1117 return 1; 1118 return 0; 1119 } 1120 1121 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1122 * and return needle location in *index. If scsi3addr matches, but not 1123 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1124 * location in *index. 1125 * In the case of a minor device attribute change, such as RAID level, just 1126 * return DEVICE_UPDATED, along with the updated device's location in index. 1127 * If needle not found, return DEVICE_NOT_FOUND. 1128 */ 1129 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1130 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1131 int *index) 1132 { 1133 int i; 1134 #define DEVICE_NOT_FOUND 0 1135 #define DEVICE_CHANGED 1 1136 #define DEVICE_SAME 2 1137 #define DEVICE_UPDATED 3 1138 for (i = 0; i < haystack_size; i++) { 1139 if (haystack[i] == NULL) /* previously removed. */ 1140 continue; 1141 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1142 *index = i; 1143 if (device_is_the_same(needle, haystack[i])) { 1144 if (device_updated(needle, haystack[i])) 1145 return DEVICE_UPDATED; 1146 return DEVICE_SAME; 1147 } else { 1148 /* Keep offline devices offline */ 1149 if (needle->volume_offline) 1150 return DEVICE_NOT_FOUND; 1151 return DEVICE_CHANGED; 1152 } 1153 } 1154 } 1155 *index = -1; 1156 return DEVICE_NOT_FOUND; 1157 } 1158 1159 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1160 unsigned char scsi3addr[]) 1161 { 1162 struct offline_device_entry *device; 1163 unsigned long flags; 1164 1165 /* Check to see if device is already on the list */ 1166 spin_lock_irqsave(&h->offline_device_lock, flags); 1167 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1168 if (memcmp(device->scsi3addr, scsi3addr, 1169 sizeof(device->scsi3addr)) == 0) { 1170 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1171 return; 1172 } 1173 } 1174 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1175 1176 /* Device is not on the list, add it. */ 1177 device = kmalloc(sizeof(*device), GFP_KERNEL); 1178 if (!device) { 1179 dev_warn(&h->pdev->dev, "out of memory in %s\n", __func__); 1180 return; 1181 } 1182 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1183 spin_lock_irqsave(&h->offline_device_lock, flags); 1184 list_add_tail(&device->offline_list, &h->offline_device_list); 1185 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1186 } 1187 1188 /* Print a message explaining various offline volume states */ 1189 static void hpsa_show_volume_status(struct ctlr_info *h, 1190 struct hpsa_scsi_dev_t *sd) 1191 { 1192 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1193 dev_info(&h->pdev->dev, 1194 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1195 h->scsi_host->host_no, 1196 sd->bus, sd->target, sd->lun); 1197 switch (sd->volume_offline) { 1198 case HPSA_LV_OK: 1199 break; 1200 case HPSA_LV_UNDERGOING_ERASE: 1201 dev_info(&h->pdev->dev, 1202 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1203 h->scsi_host->host_no, 1204 sd->bus, sd->target, sd->lun); 1205 break; 1206 case HPSA_LV_UNDERGOING_RPI: 1207 dev_info(&h->pdev->dev, 1208 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity initialization process.\n", 1209 h->scsi_host->host_no, 1210 sd->bus, sd->target, sd->lun); 1211 break; 1212 case HPSA_LV_PENDING_RPI: 1213 dev_info(&h->pdev->dev, 1214 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1215 h->scsi_host->host_no, 1216 sd->bus, sd->target, sd->lun); 1217 break; 1218 case HPSA_LV_ENCRYPTED_NO_KEY: 1219 dev_info(&h->pdev->dev, 1220 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1221 h->scsi_host->host_no, 1222 sd->bus, sd->target, sd->lun); 1223 break; 1224 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1225 dev_info(&h->pdev->dev, 1226 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1227 h->scsi_host->host_no, 1228 sd->bus, sd->target, sd->lun); 1229 break; 1230 case HPSA_LV_UNDERGOING_ENCRYPTION: 1231 dev_info(&h->pdev->dev, 1232 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1233 h->scsi_host->host_no, 1234 sd->bus, sd->target, sd->lun); 1235 break; 1236 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1237 dev_info(&h->pdev->dev, 1238 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1239 h->scsi_host->host_no, 1240 sd->bus, sd->target, sd->lun); 1241 break; 1242 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1243 dev_info(&h->pdev->dev, 1244 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1245 h->scsi_host->host_no, 1246 sd->bus, sd->target, sd->lun); 1247 break; 1248 case HPSA_LV_PENDING_ENCRYPTION: 1249 dev_info(&h->pdev->dev, 1250 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1251 h->scsi_host->host_no, 1252 sd->bus, sd->target, sd->lun); 1253 break; 1254 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1255 dev_info(&h->pdev->dev, 1256 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1257 h->scsi_host->host_no, 1258 sd->bus, sd->target, sd->lun); 1259 break; 1260 } 1261 } 1262 1263 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 1264 struct hpsa_scsi_dev_t *sd[], int nsds) 1265 { 1266 /* sd contains scsi3 addresses and devtypes, and inquiry 1267 * data. This function takes what's in sd to be the current 1268 * reality and updates h->dev[] to reflect that reality. 1269 */ 1270 int i, entry, device_change, changes = 0; 1271 struct hpsa_scsi_dev_t *csd; 1272 unsigned long flags; 1273 struct hpsa_scsi_dev_t **added, **removed; 1274 int nadded, nremoved; 1275 struct Scsi_Host *sh = NULL; 1276 1277 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 1278 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 1279 1280 if (!added || !removed) { 1281 dev_warn(&h->pdev->dev, "out of memory in " 1282 "adjust_hpsa_scsi_table\n"); 1283 goto free_and_out; 1284 } 1285 1286 spin_lock_irqsave(&h->devlock, flags); 1287 1288 /* find any devices in h->dev[] that are not in 1289 * sd[] and remove them from h->dev[], and for any 1290 * devices which have changed, remove the old device 1291 * info and add the new device info. 1292 * If minor device attributes change, just update 1293 * the existing device structure. 1294 */ 1295 i = 0; 1296 nremoved = 0; 1297 nadded = 0; 1298 while (i < h->ndevices) { 1299 csd = h->dev[i]; 1300 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1301 if (device_change == DEVICE_NOT_FOUND) { 1302 changes++; 1303 hpsa_scsi_remove_entry(h, hostno, i, 1304 removed, &nremoved); 1305 continue; /* remove ^^^, hence i not incremented */ 1306 } else if (device_change == DEVICE_CHANGED) { 1307 changes++; 1308 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 1309 added, &nadded, removed, &nremoved); 1310 /* Set it to NULL to prevent it from being freed 1311 * at the bottom of hpsa_update_scsi_devices() 1312 */ 1313 sd[entry] = NULL; 1314 } else if (device_change == DEVICE_UPDATED) { 1315 hpsa_scsi_update_entry(h, hostno, i, sd[entry]); 1316 } 1317 i++; 1318 } 1319 1320 /* Now, make sure every device listed in sd[] is also 1321 * listed in h->dev[], adding them if they aren't found 1322 */ 1323 1324 for (i = 0; i < nsds; i++) { 1325 if (!sd[i]) /* if already added above. */ 1326 continue; 1327 1328 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1329 * as the SCSI mid-layer does not handle such devices well. 1330 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1331 * at 160Hz, and prevents the system from coming up. 1332 */ 1333 if (sd[i]->volume_offline) { 1334 hpsa_show_volume_status(h, sd[i]); 1335 dev_info(&h->pdev->dev, "c%db%dt%dl%d: temporarily offline\n", 1336 h->scsi_host->host_no, 1337 sd[i]->bus, sd[i]->target, sd[i]->lun); 1338 continue; 1339 } 1340 1341 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1342 h->ndevices, &entry); 1343 if (device_change == DEVICE_NOT_FOUND) { 1344 changes++; 1345 if (hpsa_scsi_add_entry(h, hostno, sd[i], 1346 added, &nadded) != 0) 1347 break; 1348 sd[i] = NULL; /* prevent from being freed later. */ 1349 } else if (device_change == DEVICE_CHANGED) { 1350 /* should never happen... */ 1351 changes++; 1352 dev_warn(&h->pdev->dev, 1353 "device unexpectedly changed.\n"); 1354 /* but if it does happen, we just ignore that device */ 1355 } 1356 } 1357 spin_unlock_irqrestore(&h->devlock, flags); 1358 1359 /* Monitor devices which are in one of several NOT READY states to be 1360 * brought online later. This must be done without holding h->devlock, 1361 * so don't touch h->dev[] 1362 */ 1363 for (i = 0; i < nsds; i++) { 1364 if (!sd[i]) /* if already added above. */ 1365 continue; 1366 if (sd[i]->volume_offline) 1367 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 1368 } 1369 1370 /* Don't notify scsi mid layer of any changes the first time through 1371 * (or if there are no changes) scsi_scan_host will do it later the 1372 * first time through. 1373 */ 1374 if (hostno == -1 || !changes) 1375 goto free_and_out; 1376 1377 sh = h->scsi_host; 1378 /* Notify scsi mid layer of any removed devices */ 1379 for (i = 0; i < nremoved; i++) { 1380 struct scsi_device *sdev = 1381 scsi_device_lookup(sh, removed[i]->bus, 1382 removed[i]->target, removed[i]->lun); 1383 if (sdev != NULL) { 1384 scsi_remove_device(sdev); 1385 scsi_device_put(sdev); 1386 } else { 1387 /* We don't expect to get here. 1388 * future cmds to this device will get selection 1389 * timeout as if the device was gone. 1390 */ 1391 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 1392 " for removal.", hostno, removed[i]->bus, 1393 removed[i]->target, removed[i]->lun); 1394 } 1395 kfree(removed[i]); 1396 removed[i] = NULL; 1397 } 1398 1399 /* Notify scsi mid layer of any added devices */ 1400 for (i = 0; i < nadded; i++) { 1401 if (scsi_add_device(sh, added[i]->bus, 1402 added[i]->target, added[i]->lun) == 0) 1403 continue; 1404 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 1405 "device not added.\n", hostno, added[i]->bus, 1406 added[i]->target, added[i]->lun); 1407 /* now we have to remove it from h->dev, 1408 * since it didn't get added to scsi mid layer 1409 */ 1410 fixup_botched_add(h, added[i]); 1411 } 1412 1413 free_and_out: 1414 kfree(added); 1415 kfree(removed); 1416 } 1417 1418 /* 1419 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1420 * Assume's h->devlock is held. 1421 */ 1422 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1423 int bus, int target, int lun) 1424 { 1425 int i; 1426 struct hpsa_scsi_dev_t *sd; 1427 1428 for (i = 0; i < h->ndevices; i++) { 1429 sd = h->dev[i]; 1430 if (sd->bus == bus && sd->target == target && sd->lun == lun) 1431 return sd; 1432 } 1433 return NULL; 1434 } 1435 1436 /* link sdev->hostdata to our per-device structure. */ 1437 static int hpsa_slave_alloc(struct scsi_device *sdev) 1438 { 1439 struct hpsa_scsi_dev_t *sd; 1440 unsigned long flags; 1441 struct ctlr_info *h; 1442 1443 h = sdev_to_hba(sdev); 1444 spin_lock_irqsave(&h->devlock, flags); 1445 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1446 sdev_id(sdev), sdev->lun); 1447 if (sd != NULL) 1448 sdev->hostdata = sd; 1449 spin_unlock_irqrestore(&h->devlock, flags); 1450 return 0; 1451 } 1452 1453 static void hpsa_slave_destroy(struct scsi_device *sdev) 1454 { 1455 /* nothing to do. */ 1456 } 1457 1458 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 1459 { 1460 int i; 1461 1462 if (!h->cmd_sg_list) 1463 return; 1464 for (i = 0; i < h->nr_cmds; i++) { 1465 kfree(h->cmd_sg_list[i]); 1466 h->cmd_sg_list[i] = NULL; 1467 } 1468 kfree(h->cmd_sg_list); 1469 h->cmd_sg_list = NULL; 1470 } 1471 1472 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 1473 { 1474 int i; 1475 1476 if (h->chainsize <= 0) 1477 return 0; 1478 1479 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1480 GFP_KERNEL); 1481 if (!h->cmd_sg_list) 1482 return -ENOMEM; 1483 for (i = 0; i < h->nr_cmds; i++) { 1484 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1485 h->chainsize, GFP_KERNEL); 1486 if (!h->cmd_sg_list[i]) 1487 goto clean; 1488 } 1489 return 0; 1490 1491 clean: 1492 hpsa_free_sg_chain_blocks(h); 1493 return -ENOMEM; 1494 } 1495 1496 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 1497 struct CommandList *c) 1498 { 1499 struct SGDescriptor *chain_sg, *chain_block; 1500 u64 temp64; 1501 u32 chain_len; 1502 1503 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1504 chain_block = h->cmd_sg_list[c->cmdindex]; 1505 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 1506 chain_len = sizeof(*chain_sg) * 1507 (c->Header.SGTotal - h->max_cmd_sg_entries); 1508 chain_sg->Len = cpu_to_le32(chain_len); 1509 temp64 = pci_map_single(h->pdev, chain_block, chain_len, 1510 PCI_DMA_TODEVICE); 1511 if (dma_mapping_error(&h->pdev->dev, temp64)) { 1512 /* prevent subsequent unmapping */ 1513 chain_sg->Addr = cpu_to_le64(0); 1514 return -1; 1515 } 1516 chain_sg->Addr = cpu_to_le64(temp64); 1517 return 0; 1518 } 1519 1520 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1521 struct CommandList *c) 1522 { 1523 struct SGDescriptor *chain_sg; 1524 1525 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 1526 return; 1527 1528 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1529 pci_unmap_single(h->pdev, le64_to_cpu(chain_sg->Addr), 1530 le32_to_cpu(chain_sg->Len), PCI_DMA_TODEVICE); 1531 } 1532 1533 1534 /* Decode the various types of errors on ioaccel2 path. 1535 * Return 1 for any error that should generate a RAID path retry. 1536 * Return 0 for errors that don't require a RAID path retry. 1537 */ 1538 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 1539 struct CommandList *c, 1540 struct scsi_cmnd *cmd, 1541 struct io_accel2_cmd *c2) 1542 { 1543 int data_len; 1544 int retry = 0; 1545 1546 switch (c2->error_data.serv_response) { 1547 case IOACCEL2_SERV_RESPONSE_COMPLETE: 1548 switch (c2->error_data.status) { 1549 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 1550 break; 1551 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 1552 dev_warn(&h->pdev->dev, 1553 "%s: task complete with check condition.\n", 1554 "HP SSD Smart Path"); 1555 cmd->result |= SAM_STAT_CHECK_CONDITION; 1556 if (c2->error_data.data_present != 1557 IOACCEL2_SENSE_DATA_PRESENT) { 1558 memset(cmd->sense_buffer, 0, 1559 SCSI_SENSE_BUFFERSIZE); 1560 break; 1561 } 1562 /* copy the sense data */ 1563 data_len = c2->error_data.sense_data_len; 1564 if (data_len > SCSI_SENSE_BUFFERSIZE) 1565 data_len = SCSI_SENSE_BUFFERSIZE; 1566 if (data_len > sizeof(c2->error_data.sense_data_buff)) 1567 data_len = 1568 sizeof(c2->error_data.sense_data_buff); 1569 memcpy(cmd->sense_buffer, 1570 c2->error_data.sense_data_buff, data_len); 1571 retry = 1; 1572 break; 1573 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 1574 dev_warn(&h->pdev->dev, 1575 "%s: task complete with BUSY status.\n", 1576 "HP SSD Smart Path"); 1577 retry = 1; 1578 break; 1579 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 1580 dev_warn(&h->pdev->dev, 1581 "%s: task complete with reservation conflict.\n", 1582 "HP SSD Smart Path"); 1583 retry = 1; 1584 break; 1585 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 1586 /* Make scsi midlayer do unlimited retries */ 1587 cmd->result = DID_IMM_RETRY << 16; 1588 break; 1589 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 1590 dev_warn(&h->pdev->dev, 1591 "%s: task complete with aborted status.\n", 1592 "HP SSD Smart Path"); 1593 retry = 1; 1594 break; 1595 default: 1596 dev_warn(&h->pdev->dev, 1597 "%s: task complete with unrecognized status: 0x%02x\n", 1598 "HP SSD Smart Path", c2->error_data.status); 1599 retry = 1; 1600 break; 1601 } 1602 break; 1603 case IOACCEL2_SERV_RESPONSE_FAILURE: 1604 /* don't expect to get here. */ 1605 dev_warn(&h->pdev->dev, 1606 "unexpected delivery or target failure, status = 0x%02x\n", 1607 c2->error_data.status); 1608 retry = 1; 1609 break; 1610 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 1611 break; 1612 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 1613 break; 1614 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 1615 dev_warn(&h->pdev->dev, "task management function rejected.\n"); 1616 retry = 1; 1617 break; 1618 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 1619 dev_warn(&h->pdev->dev, "task management function invalid LUN\n"); 1620 break; 1621 default: 1622 dev_warn(&h->pdev->dev, 1623 "%s: Unrecognized server response: 0x%02x\n", 1624 "HP SSD Smart Path", 1625 c2->error_data.serv_response); 1626 retry = 1; 1627 break; 1628 } 1629 1630 return retry; /* retry on raid path? */ 1631 } 1632 1633 static void process_ioaccel2_completion(struct ctlr_info *h, 1634 struct CommandList *c, struct scsi_cmnd *cmd, 1635 struct hpsa_scsi_dev_t *dev) 1636 { 1637 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 1638 int raid_retry = 0; 1639 1640 /* check for good status */ 1641 if (likely(c2->error_data.serv_response == 0 && 1642 c2->error_data.status == 0)) { 1643 cmd_free(h, c); 1644 cmd->scsi_done(cmd); 1645 return; 1646 } 1647 1648 /* Any RAID offload error results in retry which will use 1649 * the normal I/O path so the controller can handle whatever's 1650 * wrong. 1651 */ 1652 if (is_logical_dev_addr_mode(dev->scsi3addr) && 1653 c2->error_data.serv_response == 1654 IOACCEL2_SERV_RESPONSE_FAILURE) { 1655 dev->offload_enabled = 0; 1656 h->drv_req_rescan = 1; /* schedule controller for a rescan */ 1657 cmd->result = DID_SOFT_ERROR << 16; 1658 cmd_free(h, c); 1659 cmd->scsi_done(cmd); 1660 return; 1661 } 1662 raid_retry = handle_ioaccel_mode2_error(h, c, cmd, c2); 1663 /* If error found, disable Smart Path, schedule a rescan, 1664 * and force a retry on the standard path. 1665 */ 1666 if (raid_retry) { 1667 dev_warn(&h->pdev->dev, "%s: Retrying on standard path.\n", 1668 "HP SSD Smart Path"); 1669 dev->offload_enabled = 0; /* Disable Smart Path */ 1670 h->drv_req_rescan = 1; /* schedule controller rescan */ 1671 cmd->result = DID_SOFT_ERROR << 16; 1672 } 1673 cmd_free(h, c); 1674 cmd->scsi_done(cmd); 1675 } 1676 1677 static void complete_scsi_command(struct CommandList *cp) 1678 { 1679 struct scsi_cmnd *cmd; 1680 struct ctlr_info *h; 1681 struct ErrorInfo *ei; 1682 struct hpsa_scsi_dev_t *dev; 1683 1684 unsigned char sense_key; 1685 unsigned char asc; /* additional sense code */ 1686 unsigned char ascq; /* additional sense code qualifier */ 1687 unsigned long sense_data_size; 1688 1689 ei = cp->err_info; 1690 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1691 h = cp->h; 1692 dev = cmd->device->hostdata; 1693 1694 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1695 if ((cp->cmd_type == CMD_SCSI) && 1696 (cp->Header.SGTotal > h->max_cmd_sg_entries)) 1697 hpsa_unmap_sg_chain_block(h, cp); 1698 1699 cmd->result = (DID_OK << 16); /* host byte */ 1700 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1701 1702 if (cp->cmd_type == CMD_IOACCEL2) 1703 return process_ioaccel2_completion(h, cp, cmd, dev); 1704 1705 cmd->result |= ei->ScsiStatus; 1706 1707 scsi_set_resid(cmd, ei->ResidualCnt); 1708 if (ei->CommandStatus == 0) { 1709 cmd_free(h, cp); 1710 cmd->scsi_done(cmd); 1711 return; 1712 } 1713 1714 /* copy the sense data */ 1715 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1716 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1717 else 1718 sense_data_size = sizeof(ei->SenseInfo); 1719 if (ei->SenseLen < sense_data_size) 1720 sense_data_size = ei->SenseLen; 1721 1722 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1723 1724 /* For I/O accelerator commands, copy over some fields to the normal 1725 * CISS header used below for error handling. 1726 */ 1727 if (cp->cmd_type == CMD_IOACCEL1) { 1728 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 1729 cp->Header.SGList = cp->Header.SGTotal = scsi_sg_count(cmd); 1730 cp->Request.CDBLen = c->io_flags & IOACCEL1_IOFLAGS_CDBLEN_MASK; 1731 cp->Header.tag = c->tag; 1732 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 1733 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 1734 1735 /* Any RAID offload error results in retry which will use 1736 * the normal I/O path so the controller can handle whatever's 1737 * wrong. 1738 */ 1739 if (is_logical_dev_addr_mode(dev->scsi3addr)) { 1740 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 1741 dev->offload_enabled = 0; 1742 cmd->result = DID_SOFT_ERROR << 16; 1743 cmd_free(h, cp); 1744 cmd->scsi_done(cmd); 1745 return; 1746 } 1747 } 1748 1749 /* an error has occurred */ 1750 switch (ei->CommandStatus) { 1751 1752 case CMD_TARGET_STATUS: 1753 if (ei->ScsiStatus) { 1754 /* Get sense key */ 1755 sense_key = 0xf & ei->SenseInfo[2]; 1756 /* Get additional sense code */ 1757 asc = ei->SenseInfo[12]; 1758 /* Get addition sense code qualifier */ 1759 ascq = ei->SenseInfo[13]; 1760 } 1761 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1762 if (sense_key == ABORTED_COMMAND) { 1763 cmd->result |= DID_SOFT_ERROR << 16; 1764 break; 1765 } 1766 break; 1767 } 1768 /* Problem was not a check condition 1769 * Pass it up to the upper layers... 1770 */ 1771 if (ei->ScsiStatus) { 1772 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1773 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1774 "Returning result: 0x%x\n", 1775 cp, ei->ScsiStatus, 1776 sense_key, asc, ascq, 1777 cmd->result); 1778 } else { /* scsi status is zero??? How??? */ 1779 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1780 "Returning no connection.\n", cp), 1781 1782 /* Ordinarily, this case should never happen, 1783 * but there is a bug in some released firmware 1784 * revisions that allows it to happen if, for 1785 * example, a 4100 backplane loses power and 1786 * the tape drive is in it. We assume that 1787 * it's a fatal error of some kind because we 1788 * can't show that it wasn't. We will make it 1789 * look like selection timeout since that is 1790 * the most common reason for this to occur, 1791 * and it's severe enough. 1792 */ 1793 1794 cmd->result = DID_NO_CONNECT << 16; 1795 } 1796 break; 1797 1798 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1799 break; 1800 case CMD_DATA_OVERRUN: 1801 dev_warn(&h->pdev->dev, "cp %p has" 1802 " completed with data overrun " 1803 "reported\n", cp); 1804 break; 1805 case CMD_INVALID: { 1806 /* print_bytes(cp, sizeof(*cp), 1, 0); 1807 print_cmd(cp); */ 1808 /* We get CMD_INVALID if you address a non-existent device 1809 * instead of a selection timeout (no response). You will 1810 * see this if you yank out a drive, then try to access it. 1811 * This is kind of a shame because it means that any other 1812 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1813 * missing target. */ 1814 cmd->result = DID_NO_CONNECT << 16; 1815 } 1816 break; 1817 case CMD_PROTOCOL_ERR: 1818 cmd->result = DID_ERROR << 16; 1819 dev_warn(&h->pdev->dev, "cp %p has " 1820 "protocol error\n", cp); 1821 break; 1822 case CMD_HARDWARE_ERR: 1823 cmd->result = DID_ERROR << 16; 1824 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1825 break; 1826 case CMD_CONNECTION_LOST: 1827 cmd->result = DID_ERROR << 16; 1828 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1829 break; 1830 case CMD_ABORTED: 1831 cmd->result = DID_ABORT << 16; 1832 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1833 cp, ei->ScsiStatus); 1834 break; 1835 case CMD_ABORT_FAILED: 1836 cmd->result = DID_ERROR << 16; 1837 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1838 break; 1839 case CMD_UNSOLICITED_ABORT: 1840 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1841 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1842 "abort\n", cp); 1843 break; 1844 case CMD_TIMEOUT: 1845 cmd->result = DID_TIME_OUT << 16; 1846 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1847 break; 1848 case CMD_UNABORTABLE: 1849 cmd->result = DID_ERROR << 16; 1850 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1851 break; 1852 case CMD_IOACCEL_DISABLED: 1853 /* This only handles the direct pass-through case since RAID 1854 * offload is handled above. Just attempt a retry. 1855 */ 1856 cmd->result = DID_SOFT_ERROR << 16; 1857 dev_warn(&h->pdev->dev, 1858 "cp %p had HP SSD Smart Path error\n", cp); 1859 break; 1860 default: 1861 cmd->result = DID_ERROR << 16; 1862 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1863 cp, ei->CommandStatus); 1864 } 1865 cmd_free(h, cp); 1866 cmd->scsi_done(cmd); 1867 } 1868 1869 static void hpsa_pci_unmap(struct pci_dev *pdev, 1870 struct CommandList *c, int sg_used, int data_direction) 1871 { 1872 int i; 1873 1874 for (i = 0; i < sg_used; i++) 1875 pci_unmap_single(pdev, (dma_addr_t) le64_to_cpu(c->SG[i].Addr), 1876 le32_to_cpu(c->SG[i].Len), 1877 data_direction); 1878 } 1879 1880 static int hpsa_map_one(struct pci_dev *pdev, 1881 struct CommandList *cp, 1882 unsigned char *buf, 1883 size_t buflen, 1884 int data_direction) 1885 { 1886 u64 addr64; 1887 1888 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1889 cp->Header.SGList = 0; 1890 cp->Header.SGTotal = cpu_to_le16(0); 1891 return 0; 1892 } 1893 1894 addr64 = pci_map_single(pdev, buf, buflen, data_direction); 1895 if (dma_mapping_error(&pdev->dev, addr64)) { 1896 /* Prevent subsequent unmap of something never mapped */ 1897 cp->Header.SGList = 0; 1898 cp->Header.SGTotal = cpu_to_le16(0); 1899 return -1; 1900 } 1901 cp->SG[0].Addr = cpu_to_le64(addr64); 1902 cp->SG[0].Len = cpu_to_le32(buflen); 1903 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 1904 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 1905 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 1906 return 0; 1907 } 1908 1909 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1910 struct CommandList *c) 1911 { 1912 DECLARE_COMPLETION_ONSTACK(wait); 1913 1914 c->waiting = &wait; 1915 enqueue_cmd_and_start_io(h, c); 1916 wait_for_completion(&wait); 1917 } 1918 1919 static u32 lockup_detected(struct ctlr_info *h) 1920 { 1921 int cpu; 1922 u32 rc, *lockup_detected; 1923 1924 cpu = get_cpu(); 1925 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 1926 rc = *lockup_detected; 1927 put_cpu(); 1928 return rc; 1929 } 1930 1931 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1932 struct CommandList *c) 1933 { 1934 /* If controller lockup detected, fake a hardware error. */ 1935 if (unlikely(lockup_detected(h))) 1936 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1937 else 1938 hpsa_scsi_do_simple_cmd_core(h, c); 1939 } 1940 1941 #define MAX_DRIVER_CMD_RETRIES 25 1942 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1943 struct CommandList *c, int data_direction) 1944 { 1945 int backoff_time = 10, retry_count = 0; 1946 1947 do { 1948 memset(c->err_info, 0, sizeof(*c->err_info)); 1949 hpsa_scsi_do_simple_cmd_core(h, c); 1950 retry_count++; 1951 if (retry_count > 3) { 1952 msleep(backoff_time); 1953 if (backoff_time < 1000) 1954 backoff_time *= 2; 1955 } 1956 } while ((check_for_unit_attention(h, c) || 1957 check_for_busy(h, c)) && 1958 retry_count <= MAX_DRIVER_CMD_RETRIES); 1959 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1960 } 1961 1962 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 1963 struct CommandList *c) 1964 { 1965 const u8 *cdb = c->Request.CDB; 1966 const u8 *lun = c->Header.LUN.LunAddrBytes; 1967 1968 dev_warn(&h->pdev->dev, "%s: LUN:%02x%02x%02x%02x%02x%02x%02x%02x" 1969 " CDB:%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x\n", 1970 txt, lun[0], lun[1], lun[2], lun[3], 1971 lun[4], lun[5], lun[6], lun[7], 1972 cdb[0], cdb[1], cdb[2], cdb[3], 1973 cdb[4], cdb[5], cdb[6], cdb[7], 1974 cdb[8], cdb[9], cdb[10], cdb[11], 1975 cdb[12], cdb[13], cdb[14], cdb[15]); 1976 } 1977 1978 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 1979 struct CommandList *cp) 1980 { 1981 const struct ErrorInfo *ei = cp->err_info; 1982 struct device *d = &cp->h->pdev->dev; 1983 const u8 *sd = ei->SenseInfo; 1984 1985 switch (ei->CommandStatus) { 1986 case CMD_TARGET_STATUS: 1987 hpsa_print_cmd(h, "SCSI status", cp); 1988 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 1989 dev_warn(d, "SCSI Status = 02, Sense key = %02x, ASC = %02x, ASCQ = %02x\n", 1990 sd[2] & 0x0f, sd[12], sd[13]); 1991 else 1992 dev_warn(d, "SCSI Status = %02x\n", ei->ScsiStatus); 1993 if (ei->ScsiStatus == 0) 1994 dev_warn(d, "SCSI status is abnormally zero. " 1995 "(probably indicates selection timeout " 1996 "reported incorrectly due to a known " 1997 "firmware bug, circa July, 2001.)\n"); 1998 break; 1999 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2000 break; 2001 case CMD_DATA_OVERRUN: 2002 hpsa_print_cmd(h, "overrun condition", cp); 2003 break; 2004 case CMD_INVALID: { 2005 /* controller unfortunately reports SCSI passthru's 2006 * to non-existent targets as invalid commands. 2007 */ 2008 hpsa_print_cmd(h, "invalid command", cp); 2009 dev_warn(d, "probably means device no longer present\n"); 2010 } 2011 break; 2012 case CMD_PROTOCOL_ERR: 2013 hpsa_print_cmd(h, "protocol error", cp); 2014 break; 2015 case CMD_HARDWARE_ERR: 2016 hpsa_print_cmd(h, "hardware error", cp); 2017 break; 2018 case CMD_CONNECTION_LOST: 2019 hpsa_print_cmd(h, "connection lost", cp); 2020 break; 2021 case CMD_ABORTED: 2022 hpsa_print_cmd(h, "aborted", cp); 2023 break; 2024 case CMD_ABORT_FAILED: 2025 hpsa_print_cmd(h, "abort failed", cp); 2026 break; 2027 case CMD_UNSOLICITED_ABORT: 2028 hpsa_print_cmd(h, "unsolicited abort", cp); 2029 break; 2030 case CMD_TIMEOUT: 2031 hpsa_print_cmd(h, "timed out", cp); 2032 break; 2033 case CMD_UNABORTABLE: 2034 hpsa_print_cmd(h, "unabortable", cp); 2035 break; 2036 default: 2037 hpsa_print_cmd(h, "unknown status", cp); 2038 dev_warn(d, "Unknown command status %x\n", 2039 ei->CommandStatus); 2040 } 2041 } 2042 2043 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 2044 u16 page, unsigned char *buf, 2045 unsigned char bufsize) 2046 { 2047 int rc = IO_OK; 2048 struct CommandList *c; 2049 struct ErrorInfo *ei; 2050 2051 c = cmd_special_alloc(h); 2052 2053 if (c == NULL) { /* trouble... */ 2054 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2055 return -ENOMEM; 2056 } 2057 2058 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 2059 page, scsi3addr, TYPE_CMD)) { 2060 rc = -1; 2061 goto out; 2062 } 2063 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 2064 ei = c->err_info; 2065 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2066 hpsa_scsi_interpret_error(h, c); 2067 rc = -1; 2068 } 2069 out: 2070 cmd_special_free(h, c); 2071 return rc; 2072 } 2073 2074 static int hpsa_bmic_ctrl_mode_sense(struct ctlr_info *h, 2075 unsigned char *scsi3addr, unsigned char page, 2076 struct bmic_controller_parameters *buf, size_t bufsize) 2077 { 2078 int rc = IO_OK; 2079 struct CommandList *c; 2080 struct ErrorInfo *ei; 2081 2082 c = cmd_special_alloc(h); 2083 2084 if (c == NULL) { /* trouble... */ 2085 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2086 return -ENOMEM; 2087 } 2088 2089 if (fill_cmd(c, BMIC_SENSE_CONTROLLER_PARAMETERS, h, buf, bufsize, 2090 page, scsi3addr, TYPE_CMD)) { 2091 rc = -1; 2092 goto out; 2093 } 2094 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 2095 ei = c->err_info; 2096 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2097 hpsa_scsi_interpret_error(h, c); 2098 rc = -1; 2099 } 2100 out: 2101 cmd_special_free(h, c); 2102 return rc; 2103 } 2104 2105 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr, 2106 u8 reset_type) 2107 { 2108 int rc = IO_OK; 2109 struct CommandList *c; 2110 struct ErrorInfo *ei; 2111 2112 c = cmd_special_alloc(h); 2113 2114 if (c == NULL) { /* trouble... */ 2115 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2116 return -ENOMEM; 2117 } 2118 2119 /* fill_cmd can't fail here, no data buffer to map. */ 2120 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 2121 scsi3addr, TYPE_MSG); 2122 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to LUN reset */ 2123 hpsa_scsi_do_simple_cmd_core(h, c); 2124 /* no unmap needed here because no data xfer. */ 2125 2126 ei = c->err_info; 2127 if (ei->CommandStatus != 0) { 2128 hpsa_scsi_interpret_error(h, c); 2129 rc = -1; 2130 } 2131 cmd_special_free(h, c); 2132 return rc; 2133 } 2134 2135 static void hpsa_get_raid_level(struct ctlr_info *h, 2136 unsigned char *scsi3addr, unsigned char *raid_level) 2137 { 2138 int rc; 2139 unsigned char *buf; 2140 2141 *raid_level = RAID_UNKNOWN; 2142 buf = kzalloc(64, GFP_KERNEL); 2143 if (!buf) 2144 return; 2145 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0xC1, buf, 64); 2146 if (rc == 0) 2147 *raid_level = buf[8]; 2148 if (*raid_level > RAID_UNKNOWN) 2149 *raid_level = RAID_UNKNOWN; 2150 kfree(buf); 2151 return; 2152 } 2153 2154 #define HPSA_MAP_DEBUG 2155 #ifdef HPSA_MAP_DEBUG 2156 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 2157 struct raid_map_data *map_buff) 2158 { 2159 struct raid_map_disk_data *dd = &map_buff->data[0]; 2160 int map, row, col; 2161 u16 map_cnt, row_cnt, disks_per_row; 2162 2163 if (rc != 0) 2164 return; 2165 2166 /* Show details only if debugging has been activated. */ 2167 if (h->raid_offload_debug < 2) 2168 return; 2169 2170 dev_info(&h->pdev->dev, "structure_size = %u\n", 2171 le32_to_cpu(map_buff->structure_size)); 2172 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 2173 le32_to_cpu(map_buff->volume_blk_size)); 2174 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 2175 le64_to_cpu(map_buff->volume_blk_cnt)); 2176 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 2177 map_buff->phys_blk_shift); 2178 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 2179 map_buff->parity_rotation_shift); 2180 dev_info(&h->pdev->dev, "strip_size = %u\n", 2181 le16_to_cpu(map_buff->strip_size)); 2182 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 2183 le64_to_cpu(map_buff->disk_starting_blk)); 2184 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 2185 le64_to_cpu(map_buff->disk_blk_cnt)); 2186 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 2187 le16_to_cpu(map_buff->data_disks_per_row)); 2188 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 2189 le16_to_cpu(map_buff->metadata_disks_per_row)); 2190 dev_info(&h->pdev->dev, "row_cnt = %u\n", 2191 le16_to_cpu(map_buff->row_cnt)); 2192 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 2193 le16_to_cpu(map_buff->layout_map_count)); 2194 dev_info(&h->pdev->dev, "flags = %u\n", 2195 le16_to_cpu(map_buff->flags)); 2196 if (map_buff->flags & RAID_MAP_FLAG_ENCRYPT_ON) 2197 dev_info(&h->pdev->dev, "encrypytion = ON\n"); 2198 else 2199 dev_info(&h->pdev->dev, "encrypytion = OFF\n"); 2200 dev_info(&h->pdev->dev, "dekindex = %u\n", 2201 le16_to_cpu(map_buff->dekindex)); 2202 2203 map_cnt = le16_to_cpu(map_buff->layout_map_count); 2204 for (map = 0; map < map_cnt; map++) { 2205 dev_info(&h->pdev->dev, "Map%u:\n", map); 2206 row_cnt = le16_to_cpu(map_buff->row_cnt); 2207 for (row = 0; row < row_cnt; row++) { 2208 dev_info(&h->pdev->dev, " Row%u:\n", row); 2209 disks_per_row = 2210 le16_to_cpu(map_buff->data_disks_per_row); 2211 for (col = 0; col < disks_per_row; col++, dd++) 2212 dev_info(&h->pdev->dev, 2213 " D%02u: h=0x%04x xor=%u,%u\n", 2214 col, dd->ioaccel_handle, 2215 dd->xor_mult[0], dd->xor_mult[1]); 2216 disks_per_row = 2217 le16_to_cpu(map_buff->metadata_disks_per_row); 2218 for (col = 0; col < disks_per_row; col++, dd++) 2219 dev_info(&h->pdev->dev, 2220 " M%02u: h=0x%04x xor=%u,%u\n", 2221 col, dd->ioaccel_handle, 2222 dd->xor_mult[0], dd->xor_mult[1]); 2223 } 2224 } 2225 } 2226 #else 2227 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 2228 __attribute__((unused)) int rc, 2229 __attribute__((unused)) struct raid_map_data *map_buff) 2230 { 2231 } 2232 #endif 2233 2234 static int hpsa_get_raid_map(struct ctlr_info *h, 2235 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 2236 { 2237 int rc = 0; 2238 struct CommandList *c; 2239 struct ErrorInfo *ei; 2240 2241 c = cmd_special_alloc(h); 2242 if (c == NULL) { 2243 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2244 return -ENOMEM; 2245 } 2246 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 2247 sizeof(this_device->raid_map), 0, 2248 scsi3addr, TYPE_CMD)) { 2249 dev_warn(&h->pdev->dev, "Out of memory in hpsa_get_raid_map()\n"); 2250 cmd_special_free(h, c); 2251 return -ENOMEM; 2252 } 2253 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 2254 ei = c->err_info; 2255 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 2256 hpsa_scsi_interpret_error(h, c); 2257 cmd_special_free(h, c); 2258 return -1; 2259 } 2260 cmd_special_free(h, c); 2261 2262 /* @todo in the future, dynamically allocate RAID map memory */ 2263 if (le32_to_cpu(this_device->raid_map.structure_size) > 2264 sizeof(this_device->raid_map)) { 2265 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 2266 rc = -1; 2267 } 2268 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 2269 return rc; 2270 } 2271 2272 static int hpsa_vpd_page_supported(struct ctlr_info *h, 2273 unsigned char scsi3addr[], u8 page) 2274 { 2275 int rc; 2276 int i; 2277 int pages; 2278 unsigned char *buf, bufsize; 2279 2280 buf = kzalloc(256, GFP_KERNEL); 2281 if (!buf) 2282 return 0; 2283 2284 /* Get the size of the page list first */ 2285 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 2286 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 2287 buf, HPSA_VPD_HEADER_SZ); 2288 if (rc != 0) 2289 goto exit_unsupported; 2290 pages = buf[3]; 2291 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 2292 bufsize = pages + HPSA_VPD_HEADER_SZ; 2293 else 2294 bufsize = 255; 2295 2296 /* Get the whole VPD page list */ 2297 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 2298 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 2299 buf, bufsize); 2300 if (rc != 0) 2301 goto exit_unsupported; 2302 2303 pages = buf[3]; 2304 for (i = 1; i <= pages; i++) 2305 if (buf[3 + i] == page) 2306 goto exit_supported; 2307 exit_unsupported: 2308 kfree(buf); 2309 return 0; 2310 exit_supported: 2311 kfree(buf); 2312 return 1; 2313 } 2314 2315 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 2316 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 2317 { 2318 int rc; 2319 unsigned char *buf; 2320 u8 ioaccel_status; 2321 2322 this_device->offload_config = 0; 2323 this_device->offload_enabled = 0; 2324 2325 buf = kzalloc(64, GFP_KERNEL); 2326 if (!buf) 2327 return; 2328 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 2329 goto out; 2330 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 2331 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 2332 if (rc != 0) 2333 goto out; 2334 2335 #define IOACCEL_STATUS_BYTE 4 2336 #define OFFLOAD_CONFIGURED_BIT 0x01 2337 #define OFFLOAD_ENABLED_BIT 0x02 2338 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 2339 this_device->offload_config = 2340 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 2341 if (this_device->offload_config) { 2342 this_device->offload_enabled = 2343 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 2344 if (hpsa_get_raid_map(h, scsi3addr, this_device)) 2345 this_device->offload_enabled = 0; 2346 } 2347 out: 2348 kfree(buf); 2349 return; 2350 } 2351 2352 /* Get the device id from inquiry page 0x83 */ 2353 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 2354 unsigned char *device_id, int buflen) 2355 { 2356 int rc; 2357 unsigned char *buf; 2358 2359 if (buflen > 16) 2360 buflen = 16; 2361 buf = kzalloc(64, GFP_KERNEL); 2362 if (!buf) 2363 return -ENOMEM; 2364 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 0x83, buf, 64); 2365 if (rc == 0) 2366 memcpy(device_id, &buf[8], buflen); 2367 kfree(buf); 2368 return rc != 0; 2369 } 2370 2371 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 2372 struct ReportLUNdata *buf, int bufsize, 2373 int extended_response) 2374 { 2375 int rc = IO_OK; 2376 struct CommandList *c; 2377 unsigned char scsi3addr[8]; 2378 struct ErrorInfo *ei; 2379 2380 c = cmd_special_alloc(h); 2381 if (c == NULL) { /* trouble... */ 2382 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2383 return -1; 2384 } 2385 /* address the controller */ 2386 memset(scsi3addr, 0, sizeof(scsi3addr)); 2387 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 2388 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 2389 rc = -1; 2390 goto out; 2391 } 2392 if (extended_response) 2393 c->Request.CDB[1] = extended_response; 2394 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 2395 ei = c->err_info; 2396 if (ei->CommandStatus != 0 && 2397 ei->CommandStatus != CMD_DATA_UNDERRUN) { 2398 hpsa_scsi_interpret_error(h, c); 2399 rc = -1; 2400 } else { 2401 if (buf->extended_response_flag != extended_response) { 2402 dev_err(&h->pdev->dev, 2403 "report luns requested format %u, got %u\n", 2404 extended_response, 2405 buf->extended_response_flag); 2406 rc = -1; 2407 } 2408 } 2409 out: 2410 cmd_special_free(h, c); 2411 return rc; 2412 } 2413 2414 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 2415 struct ReportLUNdata *buf, 2416 int bufsize, int extended_response) 2417 { 2418 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 2419 } 2420 2421 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 2422 struct ReportLUNdata *buf, int bufsize) 2423 { 2424 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 2425 } 2426 2427 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 2428 int bus, int target, int lun) 2429 { 2430 device->bus = bus; 2431 device->target = target; 2432 device->lun = lun; 2433 } 2434 2435 /* Use VPD inquiry to get details of volume status */ 2436 static int hpsa_get_volume_status(struct ctlr_info *h, 2437 unsigned char scsi3addr[]) 2438 { 2439 int rc; 2440 int status; 2441 int size; 2442 unsigned char *buf; 2443 2444 buf = kzalloc(64, GFP_KERNEL); 2445 if (!buf) 2446 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 2447 2448 /* Does controller have VPD for logical volume status? */ 2449 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 2450 goto exit_failed; 2451 2452 /* Get the size of the VPD return buffer */ 2453 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 2454 buf, HPSA_VPD_HEADER_SZ); 2455 if (rc != 0) 2456 goto exit_failed; 2457 size = buf[3]; 2458 2459 /* Now get the whole VPD buffer */ 2460 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 2461 buf, size + HPSA_VPD_HEADER_SZ); 2462 if (rc != 0) 2463 goto exit_failed; 2464 status = buf[4]; /* status byte */ 2465 2466 kfree(buf); 2467 return status; 2468 exit_failed: 2469 kfree(buf); 2470 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 2471 } 2472 2473 /* Determine offline status of a volume. 2474 * Return either: 2475 * 0 (not offline) 2476 * 0xff (offline for unknown reasons) 2477 * # (integer code indicating one of several NOT READY states 2478 * describing why a volume is to be kept offline) 2479 */ 2480 static int hpsa_volume_offline(struct ctlr_info *h, 2481 unsigned char scsi3addr[]) 2482 { 2483 struct CommandList *c; 2484 unsigned char *sense, sense_key, asc, ascq; 2485 int ldstat = 0; 2486 u16 cmd_status; 2487 u8 scsi_status; 2488 #define ASC_LUN_NOT_READY 0x04 2489 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 2490 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 2491 2492 c = cmd_alloc(h); 2493 if (!c) 2494 return 0; 2495 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 2496 hpsa_scsi_do_simple_cmd_core(h, c); 2497 sense = c->err_info->SenseInfo; 2498 sense_key = sense[2]; 2499 asc = sense[12]; 2500 ascq = sense[13]; 2501 cmd_status = c->err_info->CommandStatus; 2502 scsi_status = c->err_info->ScsiStatus; 2503 cmd_free(h, c); 2504 /* Is the volume 'not ready'? */ 2505 if (cmd_status != CMD_TARGET_STATUS || 2506 scsi_status != SAM_STAT_CHECK_CONDITION || 2507 sense_key != NOT_READY || 2508 asc != ASC_LUN_NOT_READY) { 2509 return 0; 2510 } 2511 2512 /* Determine the reason for not ready state */ 2513 ldstat = hpsa_get_volume_status(h, scsi3addr); 2514 2515 /* Keep volume offline in certain cases: */ 2516 switch (ldstat) { 2517 case HPSA_LV_UNDERGOING_ERASE: 2518 case HPSA_LV_UNDERGOING_RPI: 2519 case HPSA_LV_PENDING_RPI: 2520 case HPSA_LV_ENCRYPTED_NO_KEY: 2521 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 2522 case HPSA_LV_UNDERGOING_ENCRYPTION: 2523 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 2524 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 2525 return ldstat; 2526 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 2527 /* If VPD status page isn't available, 2528 * use ASC/ASCQ to determine state 2529 */ 2530 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 2531 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 2532 return ldstat; 2533 break; 2534 default: 2535 break; 2536 } 2537 return 0; 2538 } 2539 2540 static int hpsa_update_device_info(struct ctlr_info *h, 2541 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 2542 unsigned char *is_OBDR_device) 2543 { 2544 2545 #define OBDR_SIG_OFFSET 43 2546 #define OBDR_TAPE_SIG "$DR-10" 2547 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 2548 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 2549 2550 unsigned char *inq_buff; 2551 unsigned char *obdr_sig; 2552 2553 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 2554 if (!inq_buff) 2555 goto bail_out; 2556 2557 /* Do an inquiry to the device to see what it is. */ 2558 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 2559 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 2560 /* Inquiry failed (msg printed already) */ 2561 dev_err(&h->pdev->dev, 2562 "hpsa_update_device_info: inquiry failed\n"); 2563 goto bail_out; 2564 } 2565 2566 this_device->devtype = (inq_buff[0] & 0x1f); 2567 memcpy(this_device->scsi3addr, scsi3addr, 8); 2568 memcpy(this_device->vendor, &inq_buff[8], 2569 sizeof(this_device->vendor)); 2570 memcpy(this_device->model, &inq_buff[16], 2571 sizeof(this_device->model)); 2572 memset(this_device->device_id, 0, 2573 sizeof(this_device->device_id)); 2574 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 2575 sizeof(this_device->device_id)); 2576 2577 if (this_device->devtype == TYPE_DISK && 2578 is_logical_dev_addr_mode(scsi3addr)) { 2579 int volume_offline; 2580 2581 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 2582 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 2583 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 2584 volume_offline = hpsa_volume_offline(h, scsi3addr); 2585 if (volume_offline < 0 || volume_offline > 0xff) 2586 volume_offline = HPSA_VPD_LV_STATUS_UNSUPPORTED; 2587 this_device->volume_offline = volume_offline & 0xff; 2588 } else { 2589 this_device->raid_level = RAID_UNKNOWN; 2590 this_device->offload_config = 0; 2591 this_device->offload_enabled = 0; 2592 this_device->volume_offline = 0; 2593 } 2594 2595 if (is_OBDR_device) { 2596 /* See if this is a One-Button-Disaster-Recovery device 2597 * by looking for "$DR-10" at offset 43 in inquiry data. 2598 */ 2599 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 2600 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 2601 strncmp(obdr_sig, OBDR_TAPE_SIG, 2602 OBDR_SIG_LEN) == 0); 2603 } 2604 2605 kfree(inq_buff); 2606 return 0; 2607 2608 bail_out: 2609 kfree(inq_buff); 2610 return 1; 2611 } 2612 2613 static unsigned char *ext_target_model[] = { 2614 "MSA2012", 2615 "MSA2024", 2616 "MSA2312", 2617 "MSA2324", 2618 "P2000 G3 SAS", 2619 "MSA 2040 SAS", 2620 NULL, 2621 }; 2622 2623 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 2624 { 2625 int i; 2626 2627 for (i = 0; ext_target_model[i]; i++) 2628 if (strncmp(device->model, ext_target_model[i], 2629 strlen(ext_target_model[i])) == 0) 2630 return 1; 2631 return 0; 2632 } 2633 2634 /* Helper function to assign bus, target, lun mapping of devices. 2635 * Puts non-external target logical volumes on bus 0, external target logical 2636 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 2637 * Logical drive target and lun are assigned at this time, but 2638 * physical device lun and target assignment are deferred (assigned 2639 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 2640 */ 2641 static void figure_bus_target_lun(struct ctlr_info *h, 2642 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 2643 { 2644 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 2645 2646 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 2647 /* physical device, target and lun filled in later */ 2648 if (is_hba_lunid(lunaddrbytes)) 2649 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 2650 else 2651 /* defer target, lun assignment for physical devices */ 2652 hpsa_set_bus_target_lun(device, 2, -1, -1); 2653 return; 2654 } 2655 /* It's a logical device */ 2656 if (is_ext_target(h, device)) { 2657 /* external target way, put logicals on bus 1 2658 * and match target/lun numbers box 2659 * reports, other smart array, bus 0, target 0, match lunid 2660 */ 2661 hpsa_set_bus_target_lun(device, 2662 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 2663 return; 2664 } 2665 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 2666 } 2667 2668 /* 2669 * If there is no lun 0 on a target, linux won't find any devices. 2670 * For the external targets (arrays), we have to manually detect the enclosure 2671 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 2672 * it for some reason. *tmpdevice is the target we're adding, 2673 * this_device is a pointer into the current element of currentsd[] 2674 * that we're building up in update_scsi_devices(), below. 2675 * lunzerobits is a bitmap that tracks which targets already have a 2676 * lun 0 assigned. 2677 * Returns 1 if an enclosure was added, 0 if not. 2678 */ 2679 static int add_ext_target_dev(struct ctlr_info *h, 2680 struct hpsa_scsi_dev_t *tmpdevice, 2681 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 2682 unsigned long lunzerobits[], int *n_ext_target_devs) 2683 { 2684 unsigned char scsi3addr[8]; 2685 2686 if (test_bit(tmpdevice->target, lunzerobits)) 2687 return 0; /* There is already a lun 0 on this target. */ 2688 2689 if (!is_logical_dev_addr_mode(lunaddrbytes)) 2690 return 0; /* It's the logical targets that may lack lun 0. */ 2691 2692 if (!is_ext_target(h, tmpdevice)) 2693 return 0; /* Only external target devices have this problem. */ 2694 2695 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 2696 return 0; 2697 2698 memset(scsi3addr, 0, 8); 2699 scsi3addr[3] = tmpdevice->target; 2700 if (is_hba_lunid(scsi3addr)) 2701 return 0; /* Don't add the RAID controller here. */ 2702 2703 if (is_scsi_rev_5(h)) 2704 return 0; /* p1210m doesn't need to do this. */ 2705 2706 if (*n_ext_target_devs >= MAX_EXT_TARGETS) { 2707 dev_warn(&h->pdev->dev, "Maximum number of external " 2708 "target devices exceeded. Check your hardware " 2709 "configuration."); 2710 return 0; 2711 } 2712 2713 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 2714 return 0; 2715 (*n_ext_target_devs)++; 2716 hpsa_set_bus_target_lun(this_device, 2717 tmpdevice->bus, tmpdevice->target, 0); 2718 set_bit(tmpdevice->target, lunzerobits); 2719 return 1; 2720 } 2721 2722 /* 2723 * Get address of physical disk used for an ioaccel2 mode command: 2724 * 1. Extract ioaccel2 handle from the command. 2725 * 2. Find a matching ioaccel2 handle from list of physical disks. 2726 * 3. Return: 2727 * 1 and set scsi3addr to address of matching physical 2728 * 0 if no matching physical disk was found. 2729 */ 2730 static int hpsa_get_pdisk_of_ioaccel2(struct ctlr_info *h, 2731 struct CommandList *ioaccel2_cmd_to_abort, unsigned char *scsi3addr) 2732 { 2733 struct ReportExtendedLUNdata *physicals = NULL; 2734 int responsesize = 24; /* size of physical extended response */ 2735 int extended = 2; /* flag forces reporting 'other dev info'. */ 2736 int reportsize = sizeof(*physicals) + HPSA_MAX_PHYS_LUN * responsesize; 2737 u32 nphysicals = 0; /* number of reported physical devs */ 2738 int found = 0; /* found match (1) or not (0) */ 2739 u32 find; /* handle we need to match */ 2740 int i; 2741 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 2742 struct hpsa_scsi_dev_t *d; /* device of request being aborted */ 2743 struct io_accel2_cmd *c2a; /* ioaccel2 command to abort */ 2744 u32 it_nexus; /* 4 byte device handle for the ioaccel2 cmd */ 2745 u32 scsi_nexus; /* 4 byte device handle for the ioaccel2 cmd */ 2746 2747 if (ioaccel2_cmd_to_abort->cmd_type != CMD_IOACCEL2) 2748 return 0; /* no match */ 2749 2750 /* point to the ioaccel2 device handle */ 2751 c2a = &h->ioaccel2_cmd_pool[ioaccel2_cmd_to_abort->cmdindex]; 2752 if (c2a == NULL) 2753 return 0; /* no match */ 2754 2755 scmd = (struct scsi_cmnd *) ioaccel2_cmd_to_abort->scsi_cmd; 2756 if (scmd == NULL) 2757 return 0; /* no match */ 2758 2759 d = scmd->device->hostdata; 2760 if (d == NULL) 2761 return 0; /* no match */ 2762 2763 it_nexus = cpu_to_le32(d->ioaccel_handle); 2764 scsi_nexus = cpu_to_le32(c2a->scsi_nexus); 2765 find = c2a->scsi_nexus; 2766 2767 if (h->raid_offload_debug > 0) 2768 dev_info(&h->pdev->dev, 2769 "%s: scsi_nexus:0x%08x device id: 0x%02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x %02x%02x%02x%02x\n", 2770 __func__, scsi_nexus, 2771 d->device_id[0], d->device_id[1], d->device_id[2], 2772 d->device_id[3], d->device_id[4], d->device_id[5], 2773 d->device_id[6], d->device_id[7], d->device_id[8], 2774 d->device_id[9], d->device_id[10], d->device_id[11], 2775 d->device_id[12], d->device_id[13], d->device_id[14], 2776 d->device_id[15]); 2777 2778 /* Get the list of physical devices */ 2779 physicals = kzalloc(reportsize, GFP_KERNEL); 2780 if (physicals == NULL) 2781 return 0; 2782 if (hpsa_scsi_do_report_phys_luns(h, (struct ReportLUNdata *) physicals, 2783 reportsize, extended)) { 2784 dev_err(&h->pdev->dev, 2785 "Can't lookup %s device handle: report physical LUNs failed.\n", 2786 "HP SSD Smart Path"); 2787 kfree(physicals); 2788 return 0; 2789 } 2790 nphysicals = be32_to_cpu(*((__be32 *)physicals->LUNListLength)) / 2791 responsesize; 2792 2793 /* find ioaccel2 handle in list of physicals: */ 2794 for (i = 0; i < nphysicals; i++) { 2795 struct ext_report_lun_entry *entry = &physicals->LUN[i]; 2796 2797 /* handle is in bytes 28-31 of each lun */ 2798 if (entry->ioaccel_handle != find) 2799 continue; /* didn't match */ 2800 found = 1; 2801 memcpy(scsi3addr, entry->lunid, 8); 2802 if (h->raid_offload_debug > 0) 2803 dev_info(&h->pdev->dev, 2804 "%s: Searched h=0x%08x, Found h=0x%08x, scsiaddr 0x%8phN\n", 2805 __func__, find, 2806 entry->ioaccel_handle, scsi3addr); 2807 break; /* found it */ 2808 } 2809 2810 kfree(physicals); 2811 if (found) 2812 return 1; 2813 else 2814 return 0; 2815 2816 } 2817 /* 2818 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 2819 * logdev. The number of luns in physdev and logdev are returned in 2820 * *nphysicals and *nlogicals, respectively. 2821 * Returns 0 on success, -1 otherwise. 2822 */ 2823 static int hpsa_gather_lun_info(struct ctlr_info *h, 2824 int reportphyslunsize, int reportloglunsize, 2825 struct ReportLUNdata *physdev, u32 *nphysicals, int *physical_mode, 2826 struct ReportLUNdata *logdev, u32 *nlogicals) 2827 { 2828 int physical_entry_size = 8; 2829 2830 *physical_mode = 0; 2831 2832 /* For I/O accelerator mode we need to read physical device handles */ 2833 if (h->transMethod & CFGTBL_Trans_io_accel1 || 2834 h->transMethod & CFGTBL_Trans_io_accel2) { 2835 *physical_mode = HPSA_REPORT_PHYS_EXTENDED; 2836 physical_entry_size = 24; 2837 } 2838 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportphyslunsize, 2839 *physical_mode)) { 2840 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 2841 return -1; 2842 } 2843 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 2844 physical_entry_size; 2845 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 2846 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 2847 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 2848 *nphysicals - HPSA_MAX_PHYS_LUN); 2849 *nphysicals = HPSA_MAX_PHYS_LUN; 2850 } 2851 if (hpsa_scsi_do_report_log_luns(h, logdev, reportloglunsize)) { 2852 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 2853 return -1; 2854 } 2855 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 2856 /* Reject Logicals in excess of our max capability. */ 2857 if (*nlogicals > HPSA_MAX_LUN) { 2858 dev_warn(&h->pdev->dev, 2859 "maximum logical LUNs (%d) exceeded. " 2860 "%d LUNs ignored.\n", HPSA_MAX_LUN, 2861 *nlogicals - HPSA_MAX_LUN); 2862 *nlogicals = HPSA_MAX_LUN; 2863 } 2864 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 2865 dev_warn(&h->pdev->dev, 2866 "maximum logical + physical LUNs (%d) exceeded. " 2867 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 2868 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 2869 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 2870 } 2871 return 0; 2872 } 2873 2874 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 2875 int i, int nphysicals, int nlogicals, 2876 struct ReportExtendedLUNdata *physdev_list, 2877 struct ReportLUNdata *logdev_list) 2878 { 2879 /* Helper function, figure out where the LUN ID info is coming from 2880 * given index i, lists of physical and logical devices, where in 2881 * the list the raid controller is supposed to appear (first or last) 2882 */ 2883 2884 int logicals_start = nphysicals + (raid_ctlr_position == 0); 2885 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 2886 2887 if (i == raid_ctlr_position) 2888 return RAID_CTLR_LUNID; 2889 2890 if (i < logicals_start) 2891 return &physdev_list->LUN[i - 2892 (raid_ctlr_position == 0)].lunid[0]; 2893 2894 if (i < last_device) 2895 return &logdev_list->LUN[i - nphysicals - 2896 (raid_ctlr_position == 0)][0]; 2897 BUG(); 2898 return NULL; 2899 } 2900 2901 static int hpsa_hba_mode_enabled(struct ctlr_info *h) 2902 { 2903 int rc; 2904 int hba_mode_enabled; 2905 struct bmic_controller_parameters *ctlr_params; 2906 ctlr_params = kzalloc(sizeof(struct bmic_controller_parameters), 2907 GFP_KERNEL); 2908 2909 if (!ctlr_params) 2910 return -ENOMEM; 2911 rc = hpsa_bmic_ctrl_mode_sense(h, RAID_CTLR_LUNID, 0, ctlr_params, 2912 sizeof(struct bmic_controller_parameters)); 2913 if (rc) { 2914 kfree(ctlr_params); 2915 return rc; 2916 } 2917 2918 hba_mode_enabled = 2919 ((ctlr_params->nvram_flags & HBA_MODE_ENABLED_FLAG) != 0); 2920 kfree(ctlr_params); 2921 return hba_mode_enabled; 2922 } 2923 2924 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 2925 { 2926 /* the idea here is we could get notified 2927 * that some devices have changed, so we do a report 2928 * physical luns and report logical luns cmd, and adjust 2929 * our list of devices accordingly. 2930 * 2931 * The scsi3addr's of devices won't change so long as the 2932 * adapter is not reset. That means we can rescan and 2933 * tell which devices we already know about, vs. new 2934 * devices, vs. disappearing devices. 2935 */ 2936 struct ReportExtendedLUNdata *physdev_list = NULL; 2937 struct ReportLUNdata *logdev_list = NULL; 2938 u32 nphysicals = 0; 2939 u32 nlogicals = 0; 2940 int physical_mode = 0; 2941 u32 ndev_allocated = 0; 2942 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 2943 int ncurrent = 0; 2944 int i, n_ext_target_devs, ndevs_to_allocate; 2945 int raid_ctlr_position; 2946 int rescan_hba_mode; 2947 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 2948 2949 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 2950 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 2951 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 2952 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 2953 2954 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 2955 dev_err(&h->pdev->dev, "out of memory\n"); 2956 goto out; 2957 } 2958 memset(lunzerobits, 0, sizeof(lunzerobits)); 2959 2960 rescan_hba_mode = hpsa_hba_mode_enabled(h); 2961 if (rescan_hba_mode < 0) 2962 goto out; 2963 2964 if (!h->hba_mode_enabled && rescan_hba_mode) 2965 dev_warn(&h->pdev->dev, "HBA mode enabled\n"); 2966 else if (h->hba_mode_enabled && !rescan_hba_mode) 2967 dev_warn(&h->pdev->dev, "HBA mode disabled\n"); 2968 2969 h->hba_mode_enabled = rescan_hba_mode; 2970 2971 if (hpsa_gather_lun_info(h, 2972 sizeof(*physdev_list), sizeof(*logdev_list), 2973 (struct ReportLUNdata *) physdev_list, &nphysicals, 2974 &physical_mode, logdev_list, &nlogicals)) 2975 goto out; 2976 2977 /* We might see up to the maximum number of logical and physical disks 2978 * plus external target devices, and a device for the local RAID 2979 * controller. 2980 */ 2981 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 2982 2983 /* Allocate the per device structures */ 2984 for (i = 0; i < ndevs_to_allocate; i++) { 2985 if (i >= HPSA_MAX_DEVICES) { 2986 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 2987 " %d devices ignored.\n", HPSA_MAX_DEVICES, 2988 ndevs_to_allocate - HPSA_MAX_DEVICES); 2989 break; 2990 } 2991 2992 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 2993 if (!currentsd[i]) { 2994 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 2995 __FILE__, __LINE__); 2996 goto out; 2997 } 2998 ndev_allocated++; 2999 } 3000 3001 if (is_scsi_rev_5(h)) 3002 raid_ctlr_position = 0; 3003 else 3004 raid_ctlr_position = nphysicals + nlogicals; 3005 3006 /* adjust our table of devices */ 3007 n_ext_target_devs = 0; 3008 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 3009 u8 *lunaddrbytes, is_OBDR = 0; 3010 3011 /* Figure out where the LUN ID info is coming from */ 3012 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 3013 i, nphysicals, nlogicals, physdev_list, logdev_list); 3014 /* skip masked physical devices. */ 3015 if (lunaddrbytes[3] & 0xC0 && 3016 i < nphysicals + (raid_ctlr_position == 0)) 3017 continue; 3018 3019 /* Get device type, vendor, model, device id */ 3020 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 3021 &is_OBDR)) 3022 continue; /* skip it if we can't talk to it. */ 3023 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 3024 this_device = currentsd[ncurrent]; 3025 3026 /* 3027 * For external target devices, we have to insert a LUN 0 which 3028 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 3029 * is nonetheless an enclosure device there. We have to 3030 * present that otherwise linux won't find anything if 3031 * there is no lun 0. 3032 */ 3033 if (add_ext_target_dev(h, tmpdevice, this_device, 3034 lunaddrbytes, lunzerobits, 3035 &n_ext_target_devs)) { 3036 ncurrent++; 3037 this_device = currentsd[ncurrent]; 3038 } 3039 3040 *this_device = *tmpdevice; 3041 3042 switch (this_device->devtype) { 3043 case TYPE_ROM: 3044 /* We don't *really* support actual CD-ROM devices, 3045 * just "One Button Disaster Recovery" tape drive 3046 * which temporarily pretends to be a CD-ROM drive. 3047 * So we check that the device is really an OBDR tape 3048 * device by checking for "$DR-10" in bytes 43-48 of 3049 * the inquiry data. 3050 */ 3051 if (is_OBDR) 3052 ncurrent++; 3053 break; 3054 case TYPE_DISK: 3055 if (h->hba_mode_enabled) { 3056 /* never use raid mapper in HBA mode */ 3057 this_device->offload_enabled = 0; 3058 ncurrent++; 3059 break; 3060 } else if (h->acciopath_status) { 3061 if (i >= nphysicals) { 3062 ncurrent++; 3063 break; 3064 } 3065 } else { 3066 if (i < nphysicals) 3067 break; 3068 ncurrent++; 3069 break; 3070 } 3071 if (physical_mode == HPSA_REPORT_PHYS_EXTENDED) { 3072 memcpy(&this_device->ioaccel_handle, 3073 &lunaddrbytes[20], 3074 sizeof(this_device->ioaccel_handle)); 3075 ncurrent++; 3076 } 3077 break; 3078 case TYPE_TAPE: 3079 case TYPE_MEDIUM_CHANGER: 3080 ncurrent++; 3081 break; 3082 case TYPE_RAID: 3083 /* Only present the Smartarray HBA as a RAID controller. 3084 * If it's a RAID controller other than the HBA itself 3085 * (an external RAID controller, MSA500 or similar) 3086 * don't present it. 3087 */ 3088 if (!is_hba_lunid(lunaddrbytes)) 3089 break; 3090 ncurrent++; 3091 break; 3092 default: 3093 break; 3094 } 3095 if (ncurrent >= HPSA_MAX_DEVICES) 3096 break; 3097 } 3098 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 3099 out: 3100 kfree(tmpdevice); 3101 for (i = 0; i < ndev_allocated; i++) 3102 kfree(currentsd[i]); 3103 kfree(currentsd); 3104 kfree(physdev_list); 3105 kfree(logdev_list); 3106 } 3107 3108 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 3109 * dma mapping and fills in the scatter gather entries of the 3110 * hpsa command, cp. 3111 */ 3112 static int hpsa_scatter_gather(struct ctlr_info *h, 3113 struct CommandList *cp, 3114 struct scsi_cmnd *cmd) 3115 { 3116 unsigned int len; 3117 struct scatterlist *sg; 3118 u64 addr64; 3119 int use_sg, i, sg_index, chained; 3120 struct SGDescriptor *curr_sg; 3121 3122 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 3123 3124 use_sg = scsi_dma_map(cmd); 3125 if (use_sg < 0) 3126 return use_sg; 3127 3128 if (!use_sg) 3129 goto sglist_finished; 3130 3131 curr_sg = cp->SG; 3132 chained = 0; 3133 sg_index = 0; 3134 scsi_for_each_sg(cmd, sg, use_sg, i) { 3135 if (i == h->max_cmd_sg_entries - 1 && 3136 use_sg > h->max_cmd_sg_entries) { 3137 chained = 1; 3138 curr_sg = h->cmd_sg_list[cp->cmdindex]; 3139 sg_index = 0; 3140 } 3141 addr64 = (u64) sg_dma_address(sg); 3142 len = sg_dma_len(sg); 3143 curr_sg->Addr = cpu_to_le64(addr64); 3144 curr_sg->Len = cpu_to_le32(len); 3145 curr_sg->Ext = cpu_to_le32(0); 3146 curr_sg++; 3147 } 3148 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 3149 3150 if (use_sg + chained > h->maxSG) 3151 h->maxSG = use_sg + chained; 3152 3153 if (chained) { 3154 cp->Header.SGList = h->max_cmd_sg_entries; 3155 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 3156 if (hpsa_map_sg_chain_block(h, cp)) { 3157 scsi_dma_unmap(cmd); 3158 return -1; 3159 } 3160 return 0; 3161 } 3162 3163 sglist_finished: 3164 3165 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 3166 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in this cmd list */ 3167 return 0; 3168 } 3169 3170 #define IO_ACCEL_INELIGIBLE (1) 3171 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 3172 { 3173 int is_write = 0; 3174 u32 block; 3175 u32 block_cnt; 3176 3177 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 3178 switch (cdb[0]) { 3179 case WRITE_6: 3180 case WRITE_12: 3181 is_write = 1; 3182 case READ_6: 3183 case READ_12: 3184 if (*cdb_len == 6) { 3185 block = (((u32) cdb[2]) << 8) | cdb[3]; 3186 block_cnt = cdb[4]; 3187 } else { 3188 BUG_ON(*cdb_len != 12); 3189 block = (((u32) cdb[2]) << 24) | 3190 (((u32) cdb[3]) << 16) | 3191 (((u32) cdb[4]) << 8) | 3192 cdb[5]; 3193 block_cnt = 3194 (((u32) cdb[6]) << 24) | 3195 (((u32) cdb[7]) << 16) | 3196 (((u32) cdb[8]) << 8) | 3197 cdb[9]; 3198 } 3199 if (block_cnt > 0xffff) 3200 return IO_ACCEL_INELIGIBLE; 3201 3202 cdb[0] = is_write ? WRITE_10 : READ_10; 3203 cdb[1] = 0; 3204 cdb[2] = (u8) (block >> 24); 3205 cdb[3] = (u8) (block >> 16); 3206 cdb[4] = (u8) (block >> 8); 3207 cdb[5] = (u8) (block); 3208 cdb[6] = 0; 3209 cdb[7] = (u8) (block_cnt >> 8); 3210 cdb[8] = (u8) (block_cnt); 3211 cdb[9] = 0; 3212 *cdb_len = 10; 3213 break; 3214 } 3215 return 0; 3216 } 3217 3218 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 3219 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 3220 u8 *scsi3addr) 3221 { 3222 struct scsi_cmnd *cmd = c->scsi_cmd; 3223 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 3224 unsigned int len; 3225 unsigned int total_len = 0; 3226 struct scatterlist *sg; 3227 u64 addr64; 3228 int use_sg, i; 3229 struct SGDescriptor *curr_sg; 3230 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 3231 3232 /* TODO: implement chaining support */ 3233 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) 3234 return IO_ACCEL_INELIGIBLE; 3235 3236 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 3237 3238 if (fixup_ioaccel_cdb(cdb, &cdb_len)) 3239 return IO_ACCEL_INELIGIBLE; 3240 3241 c->cmd_type = CMD_IOACCEL1; 3242 3243 /* Adjust the DMA address to point to the accelerated command buffer */ 3244 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 3245 (c->cmdindex * sizeof(*cp)); 3246 BUG_ON(c->busaddr & 0x0000007F); 3247 3248 use_sg = scsi_dma_map(cmd); 3249 if (use_sg < 0) 3250 return use_sg; 3251 3252 if (use_sg) { 3253 curr_sg = cp->SG; 3254 scsi_for_each_sg(cmd, sg, use_sg, i) { 3255 addr64 = (u64) sg_dma_address(sg); 3256 len = sg_dma_len(sg); 3257 total_len += len; 3258 curr_sg->Addr = cpu_to_le64(addr64); 3259 curr_sg->Len = cpu_to_le32(len); 3260 curr_sg->Ext = cpu_to_le32(0); 3261 curr_sg++; 3262 } 3263 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 3264 3265 switch (cmd->sc_data_direction) { 3266 case DMA_TO_DEVICE: 3267 control |= IOACCEL1_CONTROL_DATA_OUT; 3268 break; 3269 case DMA_FROM_DEVICE: 3270 control |= IOACCEL1_CONTROL_DATA_IN; 3271 break; 3272 case DMA_NONE: 3273 control |= IOACCEL1_CONTROL_NODATAXFER; 3274 break; 3275 default: 3276 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 3277 cmd->sc_data_direction); 3278 BUG(); 3279 break; 3280 } 3281 } else { 3282 control |= IOACCEL1_CONTROL_NODATAXFER; 3283 } 3284 3285 c->Header.SGList = use_sg; 3286 /* Fill out the command structure to submit */ 3287 cp->dev_handle = ioaccel_handle & 0xFFFF; 3288 cp->transfer_len = total_len; 3289 cp->io_flags = IOACCEL1_IOFLAGS_IO_REQ | 3290 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK); 3291 cp->control = control; 3292 memcpy(cp->CDB, cdb, cdb_len); 3293 memcpy(cp->CISS_LUN, scsi3addr, 8); 3294 /* Tag was already set at init time. */ 3295 enqueue_cmd_and_start_io(h, c); 3296 return 0; 3297 } 3298 3299 /* 3300 * Queue a command directly to a device behind the controller using the 3301 * I/O accelerator path. 3302 */ 3303 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 3304 struct CommandList *c) 3305 { 3306 struct scsi_cmnd *cmd = c->scsi_cmd; 3307 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 3308 3309 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 3310 cmd->cmnd, cmd->cmd_len, dev->scsi3addr); 3311 } 3312 3313 /* 3314 * Set encryption parameters for the ioaccel2 request 3315 */ 3316 static void set_encrypt_ioaccel2(struct ctlr_info *h, 3317 struct CommandList *c, struct io_accel2_cmd *cp) 3318 { 3319 struct scsi_cmnd *cmd = c->scsi_cmd; 3320 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 3321 struct raid_map_data *map = &dev->raid_map; 3322 u64 first_block; 3323 3324 BUG_ON(!(dev->offload_config && dev->offload_enabled)); 3325 3326 /* Are we doing encryption on this device */ 3327 if (!(map->flags & RAID_MAP_FLAG_ENCRYPT_ON)) 3328 return; 3329 /* Set the data encryption key index. */ 3330 cp->dekindex = map->dekindex; 3331 3332 /* Set the encryption enable flag, encoded into direction field. */ 3333 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 3334 3335 /* Set encryption tweak values based on logical block address 3336 * If block size is 512, tweak value is LBA. 3337 * For other block sizes, tweak is (LBA * block size)/ 512) 3338 */ 3339 switch (cmd->cmnd[0]) { 3340 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 3341 case WRITE_6: 3342 case READ_6: 3343 if (map->volume_blk_size == 512) { 3344 cp->tweak_lower = 3345 (((u32) cmd->cmnd[2]) << 8) | 3346 cmd->cmnd[3]; 3347 cp->tweak_upper = 0; 3348 } else { 3349 first_block = 3350 (((u64) cmd->cmnd[2]) << 8) | 3351 cmd->cmnd[3]; 3352 first_block = (first_block * map->volume_blk_size)/512; 3353 cp->tweak_lower = (u32)first_block; 3354 cp->tweak_upper = (u32)(first_block >> 32); 3355 } 3356 break; 3357 case WRITE_10: 3358 case READ_10: 3359 if (map->volume_blk_size == 512) { 3360 cp->tweak_lower = 3361 (((u32) cmd->cmnd[2]) << 24) | 3362 (((u32) cmd->cmnd[3]) << 16) | 3363 (((u32) cmd->cmnd[4]) << 8) | 3364 cmd->cmnd[5]; 3365 cp->tweak_upper = 0; 3366 } else { 3367 first_block = 3368 (((u64) cmd->cmnd[2]) << 24) | 3369 (((u64) cmd->cmnd[3]) << 16) | 3370 (((u64) cmd->cmnd[4]) << 8) | 3371 cmd->cmnd[5]; 3372 first_block = (first_block * map->volume_blk_size)/512; 3373 cp->tweak_lower = (u32)first_block; 3374 cp->tweak_upper = (u32)(first_block >> 32); 3375 } 3376 break; 3377 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 3378 case WRITE_12: 3379 case READ_12: 3380 if (map->volume_blk_size == 512) { 3381 cp->tweak_lower = 3382 (((u32) cmd->cmnd[2]) << 24) | 3383 (((u32) cmd->cmnd[3]) << 16) | 3384 (((u32) cmd->cmnd[4]) << 8) | 3385 cmd->cmnd[5]; 3386 cp->tweak_upper = 0; 3387 } else { 3388 first_block = 3389 (((u64) cmd->cmnd[2]) << 24) | 3390 (((u64) cmd->cmnd[3]) << 16) | 3391 (((u64) cmd->cmnd[4]) << 8) | 3392 cmd->cmnd[5]; 3393 first_block = (first_block * map->volume_blk_size)/512; 3394 cp->tweak_lower = (u32)first_block; 3395 cp->tweak_upper = (u32)(first_block >> 32); 3396 } 3397 break; 3398 case WRITE_16: 3399 case READ_16: 3400 if (map->volume_blk_size == 512) { 3401 cp->tweak_lower = 3402 (((u32) cmd->cmnd[6]) << 24) | 3403 (((u32) cmd->cmnd[7]) << 16) | 3404 (((u32) cmd->cmnd[8]) << 8) | 3405 cmd->cmnd[9]; 3406 cp->tweak_upper = 3407 (((u32) cmd->cmnd[2]) << 24) | 3408 (((u32) cmd->cmnd[3]) << 16) | 3409 (((u32) cmd->cmnd[4]) << 8) | 3410 cmd->cmnd[5]; 3411 } else { 3412 first_block = 3413 (((u64) cmd->cmnd[2]) << 56) | 3414 (((u64) cmd->cmnd[3]) << 48) | 3415 (((u64) cmd->cmnd[4]) << 40) | 3416 (((u64) cmd->cmnd[5]) << 32) | 3417 (((u64) cmd->cmnd[6]) << 24) | 3418 (((u64) cmd->cmnd[7]) << 16) | 3419 (((u64) cmd->cmnd[8]) << 8) | 3420 cmd->cmnd[9]; 3421 first_block = (first_block * map->volume_blk_size)/512; 3422 cp->tweak_lower = (u32)first_block; 3423 cp->tweak_upper = (u32)(first_block >> 32); 3424 } 3425 break; 3426 default: 3427 dev_err(&h->pdev->dev, 3428 "ERROR: %s: IOACCEL request CDB size not supported for encryption\n", 3429 __func__); 3430 BUG(); 3431 break; 3432 } 3433 } 3434 3435 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 3436 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 3437 u8 *scsi3addr) 3438 { 3439 struct scsi_cmnd *cmd = c->scsi_cmd; 3440 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 3441 struct ioaccel2_sg_element *curr_sg; 3442 int use_sg, i; 3443 struct scatterlist *sg; 3444 u64 addr64; 3445 u32 len; 3446 u32 total_len = 0; 3447 3448 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) 3449 return IO_ACCEL_INELIGIBLE; 3450 3451 if (fixup_ioaccel_cdb(cdb, &cdb_len)) 3452 return IO_ACCEL_INELIGIBLE; 3453 c->cmd_type = CMD_IOACCEL2; 3454 /* Adjust the DMA address to point to the accelerated command buffer */ 3455 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 3456 (c->cmdindex * sizeof(*cp)); 3457 BUG_ON(c->busaddr & 0x0000007F); 3458 3459 memset(cp, 0, sizeof(*cp)); 3460 cp->IU_type = IOACCEL2_IU_TYPE; 3461 3462 use_sg = scsi_dma_map(cmd); 3463 if (use_sg < 0) 3464 return use_sg; 3465 3466 if (use_sg) { 3467 BUG_ON(use_sg > IOACCEL2_MAXSGENTRIES); 3468 curr_sg = cp->sg; 3469 scsi_for_each_sg(cmd, sg, use_sg, i) { 3470 addr64 = (u64) sg_dma_address(sg); 3471 len = sg_dma_len(sg); 3472 total_len += len; 3473 curr_sg->address = cpu_to_le64(addr64); 3474 curr_sg->length = cpu_to_le32(len); 3475 curr_sg->reserved[0] = 0; 3476 curr_sg->reserved[1] = 0; 3477 curr_sg->reserved[2] = 0; 3478 curr_sg->chain_indicator = 0; 3479 curr_sg++; 3480 } 3481 3482 switch (cmd->sc_data_direction) { 3483 case DMA_TO_DEVICE: 3484 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 3485 cp->direction |= IOACCEL2_DIR_DATA_OUT; 3486 break; 3487 case DMA_FROM_DEVICE: 3488 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 3489 cp->direction |= IOACCEL2_DIR_DATA_IN; 3490 break; 3491 case DMA_NONE: 3492 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 3493 cp->direction |= IOACCEL2_DIR_NO_DATA; 3494 break; 3495 default: 3496 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 3497 cmd->sc_data_direction); 3498 BUG(); 3499 break; 3500 } 3501 } else { 3502 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 3503 cp->direction |= IOACCEL2_DIR_NO_DATA; 3504 } 3505 3506 /* Set encryption parameters, if necessary */ 3507 set_encrypt_ioaccel2(h, c, cp); 3508 3509 cp->scsi_nexus = ioaccel_handle; 3510 cp->Tag = (c->cmdindex << DIRECT_LOOKUP_SHIFT) | 3511 DIRECT_LOOKUP_BIT; 3512 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 3513 3514 /* fill in sg elements */ 3515 cp->sg_count = (u8) use_sg; 3516 3517 cp->data_len = cpu_to_le32(total_len); 3518 cp->err_ptr = cpu_to_le64(c->busaddr + 3519 offsetof(struct io_accel2_cmd, error_data)); 3520 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 3521 3522 enqueue_cmd_and_start_io(h, c); 3523 return 0; 3524 } 3525 3526 /* 3527 * Queue a command to the correct I/O accelerator path. 3528 */ 3529 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 3530 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 3531 u8 *scsi3addr) 3532 { 3533 if (h->transMethod & CFGTBL_Trans_io_accel1) 3534 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 3535 cdb, cdb_len, scsi3addr); 3536 else 3537 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 3538 cdb, cdb_len, scsi3addr); 3539 } 3540 3541 static void raid_map_helper(struct raid_map_data *map, 3542 int offload_to_mirror, u32 *map_index, u32 *current_group) 3543 { 3544 if (offload_to_mirror == 0) { 3545 /* use physical disk in the first mirrored group. */ 3546 *map_index %= map->data_disks_per_row; 3547 return; 3548 } 3549 do { 3550 /* determine mirror group that *map_index indicates */ 3551 *current_group = *map_index / map->data_disks_per_row; 3552 if (offload_to_mirror == *current_group) 3553 continue; 3554 if (*current_group < (map->layout_map_count - 1)) { 3555 /* select map index from next group */ 3556 *map_index += map->data_disks_per_row; 3557 (*current_group)++; 3558 } else { 3559 /* select map index from first group */ 3560 *map_index %= map->data_disks_per_row; 3561 *current_group = 0; 3562 } 3563 } while (offload_to_mirror != *current_group); 3564 } 3565 3566 /* 3567 * Attempt to perform offload RAID mapping for a logical volume I/O. 3568 */ 3569 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 3570 struct CommandList *c) 3571 { 3572 struct scsi_cmnd *cmd = c->scsi_cmd; 3573 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 3574 struct raid_map_data *map = &dev->raid_map; 3575 struct raid_map_disk_data *dd = &map->data[0]; 3576 int is_write = 0; 3577 u32 map_index; 3578 u64 first_block, last_block; 3579 u32 block_cnt; 3580 u32 blocks_per_row; 3581 u64 first_row, last_row; 3582 u32 first_row_offset, last_row_offset; 3583 u32 first_column, last_column; 3584 u64 r0_first_row, r0_last_row; 3585 u32 r5or6_blocks_per_row; 3586 u64 r5or6_first_row, r5or6_last_row; 3587 u32 r5or6_first_row_offset, r5or6_last_row_offset; 3588 u32 r5or6_first_column, r5or6_last_column; 3589 u32 total_disks_per_row; 3590 u32 stripesize; 3591 u32 first_group, last_group, current_group; 3592 u32 map_row; 3593 u32 disk_handle; 3594 u64 disk_block; 3595 u32 disk_block_cnt; 3596 u8 cdb[16]; 3597 u8 cdb_len; 3598 #if BITS_PER_LONG == 32 3599 u64 tmpdiv; 3600 #endif 3601 int offload_to_mirror; 3602 3603 BUG_ON(!(dev->offload_config && dev->offload_enabled)); 3604 3605 /* check for valid opcode, get LBA and block count */ 3606 switch (cmd->cmnd[0]) { 3607 case WRITE_6: 3608 is_write = 1; 3609 case READ_6: 3610 first_block = 3611 (((u64) cmd->cmnd[2]) << 8) | 3612 cmd->cmnd[3]; 3613 block_cnt = cmd->cmnd[4]; 3614 if (block_cnt == 0) 3615 block_cnt = 256; 3616 break; 3617 case WRITE_10: 3618 is_write = 1; 3619 case READ_10: 3620 first_block = 3621 (((u64) cmd->cmnd[2]) << 24) | 3622 (((u64) cmd->cmnd[3]) << 16) | 3623 (((u64) cmd->cmnd[4]) << 8) | 3624 cmd->cmnd[5]; 3625 block_cnt = 3626 (((u32) cmd->cmnd[7]) << 8) | 3627 cmd->cmnd[8]; 3628 break; 3629 case WRITE_12: 3630 is_write = 1; 3631 case READ_12: 3632 first_block = 3633 (((u64) cmd->cmnd[2]) << 24) | 3634 (((u64) cmd->cmnd[3]) << 16) | 3635 (((u64) cmd->cmnd[4]) << 8) | 3636 cmd->cmnd[5]; 3637 block_cnt = 3638 (((u32) cmd->cmnd[6]) << 24) | 3639 (((u32) cmd->cmnd[7]) << 16) | 3640 (((u32) cmd->cmnd[8]) << 8) | 3641 cmd->cmnd[9]; 3642 break; 3643 case WRITE_16: 3644 is_write = 1; 3645 case READ_16: 3646 first_block = 3647 (((u64) cmd->cmnd[2]) << 56) | 3648 (((u64) cmd->cmnd[3]) << 48) | 3649 (((u64) cmd->cmnd[4]) << 40) | 3650 (((u64) cmd->cmnd[5]) << 32) | 3651 (((u64) cmd->cmnd[6]) << 24) | 3652 (((u64) cmd->cmnd[7]) << 16) | 3653 (((u64) cmd->cmnd[8]) << 8) | 3654 cmd->cmnd[9]; 3655 block_cnt = 3656 (((u32) cmd->cmnd[10]) << 24) | 3657 (((u32) cmd->cmnd[11]) << 16) | 3658 (((u32) cmd->cmnd[12]) << 8) | 3659 cmd->cmnd[13]; 3660 break; 3661 default: 3662 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 3663 } 3664 last_block = first_block + block_cnt - 1; 3665 3666 /* check for write to non-RAID-0 */ 3667 if (is_write && dev->raid_level != 0) 3668 return IO_ACCEL_INELIGIBLE; 3669 3670 /* check for invalid block or wraparound */ 3671 if (last_block >= map->volume_blk_cnt || last_block < first_block) 3672 return IO_ACCEL_INELIGIBLE; 3673 3674 /* calculate stripe information for the request */ 3675 blocks_per_row = map->data_disks_per_row * map->strip_size; 3676 #if BITS_PER_LONG == 32 3677 tmpdiv = first_block; 3678 (void) do_div(tmpdiv, blocks_per_row); 3679 first_row = tmpdiv; 3680 tmpdiv = last_block; 3681 (void) do_div(tmpdiv, blocks_per_row); 3682 last_row = tmpdiv; 3683 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 3684 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 3685 tmpdiv = first_row_offset; 3686 (void) do_div(tmpdiv, map->strip_size); 3687 first_column = tmpdiv; 3688 tmpdiv = last_row_offset; 3689 (void) do_div(tmpdiv, map->strip_size); 3690 last_column = tmpdiv; 3691 #else 3692 first_row = first_block / blocks_per_row; 3693 last_row = last_block / blocks_per_row; 3694 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 3695 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 3696 first_column = first_row_offset / map->strip_size; 3697 last_column = last_row_offset / map->strip_size; 3698 #endif 3699 3700 /* if this isn't a single row/column then give to the controller */ 3701 if ((first_row != last_row) || (first_column != last_column)) 3702 return IO_ACCEL_INELIGIBLE; 3703 3704 /* proceeding with driver mapping */ 3705 total_disks_per_row = map->data_disks_per_row + 3706 map->metadata_disks_per_row; 3707 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 3708 map->row_cnt; 3709 map_index = (map_row * total_disks_per_row) + first_column; 3710 3711 switch (dev->raid_level) { 3712 case HPSA_RAID_0: 3713 break; /* nothing special to do */ 3714 case HPSA_RAID_1: 3715 /* Handles load balance across RAID 1 members. 3716 * (2-drive R1 and R10 with even # of drives.) 3717 * Appropriate for SSDs, not optimal for HDDs 3718 */ 3719 BUG_ON(map->layout_map_count != 2); 3720 if (dev->offload_to_mirror) 3721 map_index += map->data_disks_per_row; 3722 dev->offload_to_mirror = !dev->offload_to_mirror; 3723 break; 3724 case HPSA_RAID_ADM: 3725 /* Handles N-way mirrors (R1-ADM) 3726 * and R10 with # of drives divisible by 3.) 3727 */ 3728 BUG_ON(map->layout_map_count != 3); 3729 3730 offload_to_mirror = dev->offload_to_mirror; 3731 raid_map_helper(map, offload_to_mirror, 3732 &map_index, ¤t_group); 3733 /* set mirror group to use next time */ 3734 offload_to_mirror = 3735 (offload_to_mirror >= map->layout_map_count - 1) 3736 ? 0 : offload_to_mirror + 1; 3737 dev->offload_to_mirror = offload_to_mirror; 3738 /* Avoid direct use of dev->offload_to_mirror within this 3739 * function since multiple threads might simultaneously 3740 * increment it beyond the range of dev->layout_map_count -1. 3741 */ 3742 break; 3743 case HPSA_RAID_5: 3744 case HPSA_RAID_6: 3745 if (map->layout_map_count <= 1) 3746 break; 3747 3748 /* Verify first and last block are in same RAID group */ 3749 r5or6_blocks_per_row = 3750 map->strip_size * map->data_disks_per_row; 3751 BUG_ON(r5or6_blocks_per_row == 0); 3752 stripesize = r5or6_blocks_per_row * map->layout_map_count; 3753 #if BITS_PER_LONG == 32 3754 tmpdiv = first_block; 3755 first_group = do_div(tmpdiv, stripesize); 3756 tmpdiv = first_group; 3757 (void) do_div(tmpdiv, r5or6_blocks_per_row); 3758 first_group = tmpdiv; 3759 tmpdiv = last_block; 3760 last_group = do_div(tmpdiv, stripesize); 3761 tmpdiv = last_group; 3762 (void) do_div(tmpdiv, r5or6_blocks_per_row); 3763 last_group = tmpdiv; 3764 #else 3765 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 3766 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 3767 #endif 3768 if (first_group != last_group) 3769 return IO_ACCEL_INELIGIBLE; 3770 3771 /* Verify request is in a single row of RAID 5/6 */ 3772 #if BITS_PER_LONG == 32 3773 tmpdiv = first_block; 3774 (void) do_div(tmpdiv, stripesize); 3775 first_row = r5or6_first_row = r0_first_row = tmpdiv; 3776 tmpdiv = last_block; 3777 (void) do_div(tmpdiv, stripesize); 3778 r5or6_last_row = r0_last_row = tmpdiv; 3779 #else 3780 first_row = r5or6_first_row = r0_first_row = 3781 first_block / stripesize; 3782 r5or6_last_row = r0_last_row = last_block / stripesize; 3783 #endif 3784 if (r5or6_first_row != r5or6_last_row) 3785 return IO_ACCEL_INELIGIBLE; 3786 3787 3788 /* Verify request is in a single column */ 3789 #if BITS_PER_LONG == 32 3790 tmpdiv = first_block; 3791 first_row_offset = do_div(tmpdiv, stripesize); 3792 tmpdiv = first_row_offset; 3793 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 3794 r5or6_first_row_offset = first_row_offset; 3795 tmpdiv = last_block; 3796 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 3797 tmpdiv = r5or6_last_row_offset; 3798 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 3799 tmpdiv = r5or6_first_row_offset; 3800 (void) do_div(tmpdiv, map->strip_size); 3801 first_column = r5or6_first_column = tmpdiv; 3802 tmpdiv = r5or6_last_row_offset; 3803 (void) do_div(tmpdiv, map->strip_size); 3804 r5or6_last_column = tmpdiv; 3805 #else 3806 first_row_offset = r5or6_first_row_offset = 3807 (u32)((first_block % stripesize) % 3808 r5or6_blocks_per_row); 3809 3810 r5or6_last_row_offset = 3811 (u32)((last_block % stripesize) % 3812 r5or6_blocks_per_row); 3813 3814 first_column = r5or6_first_column = 3815 r5or6_first_row_offset / map->strip_size; 3816 r5or6_last_column = 3817 r5or6_last_row_offset / map->strip_size; 3818 #endif 3819 if (r5or6_first_column != r5or6_last_column) 3820 return IO_ACCEL_INELIGIBLE; 3821 3822 /* Request is eligible */ 3823 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 3824 map->row_cnt; 3825 3826 map_index = (first_group * 3827 (map->row_cnt * total_disks_per_row)) + 3828 (map_row * total_disks_per_row) + first_column; 3829 break; 3830 default: 3831 return IO_ACCEL_INELIGIBLE; 3832 } 3833 3834 disk_handle = dd[map_index].ioaccel_handle; 3835 disk_block = map->disk_starting_blk + (first_row * map->strip_size) + 3836 (first_row_offset - (first_column * map->strip_size)); 3837 disk_block_cnt = block_cnt; 3838 3839 /* handle differing logical/physical block sizes */ 3840 if (map->phys_blk_shift) { 3841 disk_block <<= map->phys_blk_shift; 3842 disk_block_cnt <<= map->phys_blk_shift; 3843 } 3844 BUG_ON(disk_block_cnt > 0xffff); 3845 3846 /* build the new CDB for the physical disk I/O */ 3847 if (disk_block > 0xffffffff) { 3848 cdb[0] = is_write ? WRITE_16 : READ_16; 3849 cdb[1] = 0; 3850 cdb[2] = (u8) (disk_block >> 56); 3851 cdb[3] = (u8) (disk_block >> 48); 3852 cdb[4] = (u8) (disk_block >> 40); 3853 cdb[5] = (u8) (disk_block >> 32); 3854 cdb[6] = (u8) (disk_block >> 24); 3855 cdb[7] = (u8) (disk_block >> 16); 3856 cdb[8] = (u8) (disk_block >> 8); 3857 cdb[9] = (u8) (disk_block); 3858 cdb[10] = (u8) (disk_block_cnt >> 24); 3859 cdb[11] = (u8) (disk_block_cnt >> 16); 3860 cdb[12] = (u8) (disk_block_cnt >> 8); 3861 cdb[13] = (u8) (disk_block_cnt); 3862 cdb[14] = 0; 3863 cdb[15] = 0; 3864 cdb_len = 16; 3865 } else { 3866 cdb[0] = is_write ? WRITE_10 : READ_10; 3867 cdb[1] = 0; 3868 cdb[2] = (u8) (disk_block >> 24); 3869 cdb[3] = (u8) (disk_block >> 16); 3870 cdb[4] = (u8) (disk_block >> 8); 3871 cdb[5] = (u8) (disk_block); 3872 cdb[6] = 0; 3873 cdb[7] = (u8) (disk_block_cnt >> 8); 3874 cdb[8] = (u8) (disk_block_cnt); 3875 cdb[9] = 0; 3876 cdb_len = 10; 3877 } 3878 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 3879 dev->scsi3addr); 3880 } 3881 3882 /* 3883 * Running in struct Scsi_Host->host_lock less mode using LLD internal 3884 * struct ctlr_info *h->lock w/ spin_lock_irqsave() protection. 3885 */ 3886 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 3887 { 3888 struct ctlr_info *h; 3889 struct hpsa_scsi_dev_t *dev; 3890 unsigned char scsi3addr[8]; 3891 struct CommandList *c; 3892 int rc = 0; 3893 3894 /* Get the ptr to our adapter structure out of cmd->host. */ 3895 h = sdev_to_hba(cmd->device); 3896 dev = cmd->device->hostdata; 3897 if (!dev) { 3898 cmd->result = DID_NO_CONNECT << 16; 3899 cmd->scsi_done(cmd); 3900 return 0; 3901 } 3902 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 3903 3904 if (unlikely(lockup_detected(h))) { 3905 cmd->result = DID_ERROR << 16; 3906 cmd->scsi_done(cmd); 3907 return 0; 3908 } 3909 c = cmd_alloc(h); 3910 if (c == NULL) { /* trouble... */ 3911 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 3912 return SCSI_MLQUEUE_HOST_BUSY; 3913 } 3914 3915 /* Fill in the command list header */ 3916 /* save c in case we have to abort it */ 3917 cmd->host_scribble = (unsigned char *) c; 3918 3919 c->cmd_type = CMD_SCSI; 3920 c->scsi_cmd = cmd; 3921 3922 /* Call alternate submit routine for I/O accelerated commands. 3923 * Retries always go down the normal I/O path. 3924 */ 3925 if (likely(cmd->retries == 0 && 3926 cmd->request->cmd_type == REQ_TYPE_FS && 3927 h->acciopath_status)) { 3928 if (dev->offload_enabled) { 3929 rc = hpsa_scsi_ioaccel_raid_map(h, c); 3930 if (rc == 0) 3931 return 0; /* Sent on ioaccel path */ 3932 if (rc < 0) { /* scsi_dma_map failed. */ 3933 cmd_free(h, c); 3934 return SCSI_MLQUEUE_HOST_BUSY; 3935 } 3936 } else if (dev->ioaccel_handle) { 3937 rc = hpsa_scsi_ioaccel_direct_map(h, c); 3938 if (rc == 0) 3939 return 0; /* Sent on direct map path */ 3940 if (rc < 0) { /* scsi_dma_map failed. */ 3941 cmd_free(h, c); 3942 return SCSI_MLQUEUE_HOST_BUSY; 3943 } 3944 } 3945 } 3946 3947 c->Header.ReplyQueue = 0; /* unused in simple mode */ 3948 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 3949 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT) | 3950 DIRECT_LOOKUP_BIT); 3951 3952 /* Fill in the request block... */ 3953 3954 c->Request.Timeout = 0; 3955 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 3956 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 3957 c->Request.CDBLen = cmd->cmd_len; 3958 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 3959 switch (cmd->sc_data_direction) { 3960 case DMA_TO_DEVICE: 3961 c->Request.type_attr_dir = 3962 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 3963 break; 3964 case DMA_FROM_DEVICE: 3965 c->Request.type_attr_dir = 3966 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 3967 break; 3968 case DMA_NONE: 3969 c->Request.type_attr_dir = 3970 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 3971 break; 3972 case DMA_BIDIRECTIONAL: 3973 /* This can happen if a buggy application does a scsi passthru 3974 * and sets both inlen and outlen to non-zero. ( see 3975 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 3976 */ 3977 3978 c->Request.type_attr_dir = 3979 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 3980 /* This is technically wrong, and hpsa controllers should 3981 * reject it with CMD_INVALID, which is the most correct 3982 * response, but non-fibre backends appear to let it 3983 * slide by, and give the same results as if this field 3984 * were set correctly. Either way is acceptable for 3985 * our purposes here. 3986 */ 3987 3988 break; 3989 3990 default: 3991 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 3992 cmd->sc_data_direction); 3993 BUG(); 3994 break; 3995 } 3996 3997 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 3998 cmd_free(h, c); 3999 return SCSI_MLQUEUE_HOST_BUSY; 4000 } 4001 enqueue_cmd_and_start_io(h, c); 4002 /* the cmd'll come back via intr handler in complete_scsi_command() */ 4003 return 0; 4004 } 4005 4006 static int do_not_scan_if_controller_locked_up(struct ctlr_info *h) 4007 { 4008 unsigned long flags; 4009 4010 /* 4011 * Don't let rescans be initiated on a controller known 4012 * to be locked up. If the controller locks up *during* 4013 * a rescan, that thread is probably hosed, but at least 4014 * we can prevent new rescan threads from piling up on a 4015 * locked up controller. 4016 */ 4017 if (unlikely(lockup_detected(h))) { 4018 spin_lock_irqsave(&h->scan_lock, flags); 4019 h->scan_finished = 1; 4020 wake_up_all(&h->scan_wait_queue); 4021 spin_unlock_irqrestore(&h->scan_lock, flags); 4022 return 1; 4023 } 4024 return 0; 4025 } 4026 4027 static void hpsa_scan_start(struct Scsi_Host *sh) 4028 { 4029 struct ctlr_info *h = shost_to_hba(sh); 4030 unsigned long flags; 4031 4032 if (do_not_scan_if_controller_locked_up(h)) 4033 return; 4034 4035 /* wait until any scan already in progress is finished. */ 4036 while (1) { 4037 spin_lock_irqsave(&h->scan_lock, flags); 4038 if (h->scan_finished) 4039 break; 4040 spin_unlock_irqrestore(&h->scan_lock, flags); 4041 wait_event(h->scan_wait_queue, h->scan_finished); 4042 /* Note: We don't need to worry about a race between this 4043 * thread and driver unload because the midlayer will 4044 * have incremented the reference count, so unload won't 4045 * happen if we're in here. 4046 */ 4047 } 4048 h->scan_finished = 0; /* mark scan as in progress */ 4049 spin_unlock_irqrestore(&h->scan_lock, flags); 4050 4051 if (do_not_scan_if_controller_locked_up(h)) 4052 return; 4053 4054 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 4055 4056 spin_lock_irqsave(&h->scan_lock, flags); 4057 h->scan_finished = 1; /* mark scan as finished. */ 4058 wake_up_all(&h->scan_wait_queue); 4059 spin_unlock_irqrestore(&h->scan_lock, flags); 4060 } 4061 4062 static int hpsa_scan_finished(struct Scsi_Host *sh, 4063 unsigned long elapsed_time) 4064 { 4065 struct ctlr_info *h = shost_to_hba(sh); 4066 unsigned long flags; 4067 int finished; 4068 4069 spin_lock_irqsave(&h->scan_lock, flags); 4070 finished = h->scan_finished; 4071 spin_unlock_irqrestore(&h->scan_lock, flags); 4072 return finished; 4073 } 4074 4075 static void hpsa_unregister_scsi(struct ctlr_info *h) 4076 { 4077 /* we are being forcibly unloaded, and may not refuse. */ 4078 scsi_remove_host(h->scsi_host); 4079 scsi_host_put(h->scsi_host); 4080 h->scsi_host = NULL; 4081 } 4082 4083 static int hpsa_register_scsi(struct ctlr_info *h) 4084 { 4085 struct Scsi_Host *sh; 4086 int error; 4087 4088 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 4089 if (sh == NULL) 4090 goto fail; 4091 4092 sh->io_port = 0; 4093 sh->n_io_port = 0; 4094 sh->this_id = -1; 4095 sh->max_channel = 3; 4096 sh->max_cmd_len = MAX_COMMAND_SIZE; 4097 sh->max_lun = HPSA_MAX_LUN; 4098 sh->max_id = HPSA_MAX_LUN; 4099 sh->can_queue = h->nr_cmds; 4100 if (h->hba_mode_enabled) 4101 sh->cmd_per_lun = 7; 4102 else 4103 sh->cmd_per_lun = h->nr_cmds; 4104 sh->sg_tablesize = h->maxsgentries; 4105 h->scsi_host = sh; 4106 sh->hostdata[0] = (unsigned long) h; 4107 sh->irq = h->intr[h->intr_mode]; 4108 sh->unique_id = sh->irq; 4109 error = scsi_add_host(sh, &h->pdev->dev); 4110 if (error) 4111 goto fail_host_put; 4112 scsi_scan_host(sh); 4113 return 0; 4114 4115 fail_host_put: 4116 dev_err(&h->pdev->dev, "%s: scsi_add_host" 4117 " failed for controller %d\n", __func__, h->ctlr); 4118 scsi_host_put(sh); 4119 return error; 4120 fail: 4121 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 4122 " failed for controller %d\n", __func__, h->ctlr); 4123 return -ENOMEM; 4124 } 4125 4126 static int wait_for_device_to_become_ready(struct ctlr_info *h, 4127 unsigned char lunaddr[]) 4128 { 4129 int rc; 4130 int count = 0; 4131 int waittime = 1; /* seconds */ 4132 struct CommandList *c; 4133 4134 c = cmd_special_alloc(h); 4135 if (!c) { 4136 dev_warn(&h->pdev->dev, "out of memory in " 4137 "wait_for_device_to_become_ready.\n"); 4138 return IO_ERROR; 4139 } 4140 4141 /* Send test unit ready until device ready, or give up. */ 4142 while (count < HPSA_TUR_RETRY_LIMIT) { 4143 4144 /* Wait for a bit. do this first, because if we send 4145 * the TUR right away, the reset will just abort it. 4146 */ 4147 msleep(1000 * waittime); 4148 count++; 4149 rc = 0; /* Device ready. */ 4150 4151 /* Increase wait time with each try, up to a point. */ 4152 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 4153 waittime = waittime * 2; 4154 4155 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 4156 (void) fill_cmd(c, TEST_UNIT_READY, h, 4157 NULL, 0, 0, lunaddr, TYPE_CMD); 4158 hpsa_scsi_do_simple_cmd_core(h, c); 4159 /* no unmap needed here because no data xfer. */ 4160 4161 if (c->err_info->CommandStatus == CMD_SUCCESS) 4162 break; 4163 4164 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 4165 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 4166 (c->err_info->SenseInfo[2] == NO_SENSE || 4167 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 4168 break; 4169 4170 dev_warn(&h->pdev->dev, "waiting %d secs " 4171 "for device to become ready.\n", waittime); 4172 rc = 1; /* device not ready. */ 4173 } 4174 4175 if (rc) 4176 dev_warn(&h->pdev->dev, "giving up on device.\n"); 4177 else 4178 dev_warn(&h->pdev->dev, "device is ready.\n"); 4179 4180 cmd_special_free(h, c); 4181 return rc; 4182 } 4183 4184 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 4185 * complaining. Doing a host- or bus-reset can't do anything good here. 4186 */ 4187 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 4188 { 4189 int rc; 4190 struct ctlr_info *h; 4191 struct hpsa_scsi_dev_t *dev; 4192 4193 /* find the controller to which the command to be aborted was sent */ 4194 h = sdev_to_hba(scsicmd->device); 4195 if (h == NULL) /* paranoia */ 4196 return FAILED; 4197 dev = scsicmd->device->hostdata; 4198 if (!dev) { 4199 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 4200 "device lookup failed.\n"); 4201 return FAILED; 4202 } 4203 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 4204 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 4205 /* send a reset to the SCSI LUN which the command was sent to */ 4206 rc = hpsa_send_reset(h, dev->scsi3addr, HPSA_RESET_TYPE_LUN); 4207 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 4208 return SUCCESS; 4209 4210 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 4211 return FAILED; 4212 } 4213 4214 static void swizzle_abort_tag(u8 *tag) 4215 { 4216 u8 original_tag[8]; 4217 4218 memcpy(original_tag, tag, 8); 4219 tag[0] = original_tag[3]; 4220 tag[1] = original_tag[2]; 4221 tag[2] = original_tag[1]; 4222 tag[3] = original_tag[0]; 4223 tag[4] = original_tag[7]; 4224 tag[5] = original_tag[6]; 4225 tag[6] = original_tag[5]; 4226 tag[7] = original_tag[4]; 4227 } 4228 4229 static void hpsa_get_tag(struct ctlr_info *h, 4230 struct CommandList *c, u32 *taglower, u32 *tagupper) 4231 { 4232 if (c->cmd_type == CMD_IOACCEL1) { 4233 struct io_accel1_cmd *cm1 = (struct io_accel1_cmd *) 4234 &h->ioaccel_cmd_pool[c->cmdindex]; 4235 *tagupper = (u32) (cm1->tag >> 32); 4236 *taglower = (u32) (cm1->tag & 0x0ffffffffULL); 4237 return; 4238 } 4239 if (c->cmd_type == CMD_IOACCEL2) { 4240 struct io_accel2_cmd *cm2 = (struct io_accel2_cmd *) 4241 &h->ioaccel2_cmd_pool[c->cmdindex]; 4242 /* upper tag not used in ioaccel2 mode */ 4243 memset(tagupper, 0, sizeof(*tagupper)); 4244 *taglower = cm2->Tag; 4245 return; 4246 } 4247 *tagupper = (u32) (c->Header.tag >> 32); 4248 *taglower = (u32) (c->Header.tag & 0x0ffffffffULL); 4249 } 4250 4251 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 4252 struct CommandList *abort, int swizzle) 4253 { 4254 int rc = IO_OK; 4255 struct CommandList *c; 4256 struct ErrorInfo *ei; 4257 u32 tagupper, taglower; 4258 4259 c = cmd_special_alloc(h); 4260 if (c == NULL) { /* trouble... */ 4261 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4262 return -ENOMEM; 4263 } 4264 4265 /* fill_cmd can't fail here, no buffer to map */ 4266 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort, 4267 0, 0, scsi3addr, TYPE_MSG); 4268 if (swizzle) 4269 swizzle_abort_tag(&c->Request.CDB[4]); 4270 hpsa_scsi_do_simple_cmd_core(h, c); 4271 hpsa_get_tag(h, abort, &taglower, &tagupper); 4272 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n", 4273 __func__, tagupper, taglower); 4274 /* no unmap needed here because no data xfer. */ 4275 4276 ei = c->err_info; 4277 switch (ei->CommandStatus) { 4278 case CMD_SUCCESS: 4279 break; 4280 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 4281 rc = -1; 4282 break; 4283 default: 4284 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 4285 __func__, tagupper, taglower); 4286 hpsa_scsi_interpret_error(h, c); 4287 rc = -1; 4288 break; 4289 } 4290 cmd_special_free(h, c); 4291 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", 4292 __func__, tagupper, taglower); 4293 return rc; 4294 } 4295 4296 /* 4297 * hpsa_find_cmd_in_queue 4298 * 4299 * Used to determine whether a command (find) is still present 4300 * in queue_head. Optionally excludes the last element of queue_head. 4301 * 4302 * This is used to avoid unnecessary aborts. Commands in h->reqQ have 4303 * not yet been submitted, and so can be aborted by the driver without 4304 * sending an abort to the hardware. 4305 * 4306 * Returns pointer to command if found in queue, NULL otherwise. 4307 */ 4308 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h, 4309 struct scsi_cmnd *find, struct list_head *queue_head) 4310 { 4311 unsigned long flags; 4312 struct CommandList *c = NULL; /* ptr into cmpQ */ 4313 4314 if (!find) 4315 return NULL; 4316 spin_lock_irqsave(&h->lock, flags); 4317 list_for_each_entry(c, queue_head, list) { 4318 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */ 4319 continue; 4320 if (c->scsi_cmd == find) { 4321 spin_unlock_irqrestore(&h->lock, flags); 4322 return c; 4323 } 4324 } 4325 spin_unlock_irqrestore(&h->lock, flags); 4326 return NULL; 4327 } 4328 4329 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h, 4330 u8 *tag, struct list_head *queue_head) 4331 { 4332 unsigned long flags; 4333 struct CommandList *c; 4334 4335 spin_lock_irqsave(&h->lock, flags); 4336 list_for_each_entry(c, queue_head, list) { 4337 if (memcmp(&c->Header.tag, tag, 8) != 0) 4338 continue; 4339 spin_unlock_irqrestore(&h->lock, flags); 4340 return c; 4341 } 4342 spin_unlock_irqrestore(&h->lock, flags); 4343 return NULL; 4344 } 4345 4346 /* ioaccel2 path firmware cannot handle abort task requests. 4347 * Change abort requests to physical target reset, and send to the 4348 * address of the physical disk used for the ioaccel 2 command. 4349 * Return 0 on success (IO_OK) 4350 * -1 on failure 4351 */ 4352 4353 static int hpsa_send_reset_as_abort_ioaccel2(struct ctlr_info *h, 4354 unsigned char *scsi3addr, struct CommandList *abort) 4355 { 4356 int rc = IO_OK; 4357 struct scsi_cmnd *scmd; /* scsi command within request being aborted */ 4358 struct hpsa_scsi_dev_t *dev; /* device to which scsi cmd was sent */ 4359 unsigned char phys_scsi3addr[8]; /* addr of phys disk with volume */ 4360 unsigned char *psa = &phys_scsi3addr[0]; 4361 4362 /* Get a pointer to the hpsa logical device. */ 4363 scmd = (struct scsi_cmnd *) abort->scsi_cmd; 4364 dev = (struct hpsa_scsi_dev_t *)(scmd->device->hostdata); 4365 if (dev == NULL) { 4366 dev_warn(&h->pdev->dev, 4367 "Cannot abort: no device pointer for command.\n"); 4368 return -1; /* not abortable */ 4369 } 4370 4371 if (h->raid_offload_debug > 0) 4372 dev_info(&h->pdev->dev, 4373 "Reset as abort: Abort requested on C%d:B%d:T%d:L%d scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 4374 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 4375 scsi3addr[0], scsi3addr[1], scsi3addr[2], scsi3addr[3], 4376 scsi3addr[4], scsi3addr[5], scsi3addr[6], scsi3addr[7]); 4377 4378 if (!dev->offload_enabled) { 4379 dev_warn(&h->pdev->dev, 4380 "Can't abort: device is not operating in HP SSD Smart Path mode.\n"); 4381 return -1; /* not abortable */ 4382 } 4383 4384 /* Incoming scsi3addr is logical addr. We need physical disk addr. */ 4385 if (!hpsa_get_pdisk_of_ioaccel2(h, abort, psa)) { 4386 dev_warn(&h->pdev->dev, "Can't abort: Failed lookup of physical address.\n"); 4387 return -1; /* not abortable */ 4388 } 4389 4390 /* send the reset */ 4391 if (h->raid_offload_debug > 0) 4392 dev_info(&h->pdev->dev, 4393 "Reset as abort: Resetting physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 4394 psa[0], psa[1], psa[2], psa[3], 4395 psa[4], psa[5], psa[6], psa[7]); 4396 rc = hpsa_send_reset(h, psa, HPSA_RESET_TYPE_TARGET); 4397 if (rc != 0) { 4398 dev_warn(&h->pdev->dev, 4399 "Reset as abort: Failed on physical device at scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 4400 psa[0], psa[1], psa[2], psa[3], 4401 psa[4], psa[5], psa[6], psa[7]); 4402 return rc; /* failed to reset */ 4403 } 4404 4405 /* wait for device to recover */ 4406 if (wait_for_device_to_become_ready(h, psa) != 0) { 4407 dev_warn(&h->pdev->dev, 4408 "Reset as abort: Failed: Device never recovered from reset: 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 4409 psa[0], psa[1], psa[2], psa[3], 4410 psa[4], psa[5], psa[6], psa[7]); 4411 return -1; /* failed to recover */ 4412 } 4413 4414 /* device recovered */ 4415 dev_info(&h->pdev->dev, 4416 "Reset as abort: Device recovered from reset: scsi3addr 0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 4417 psa[0], psa[1], psa[2], psa[3], 4418 psa[4], psa[5], psa[6], psa[7]); 4419 4420 return rc; /* success */ 4421 } 4422 4423 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to 4424 * tell which kind we're dealing with, so we send the abort both ways. There 4425 * shouldn't be any collisions between swizzled and unswizzled tags due to the 4426 * way we construct our tags but we check anyway in case the assumptions which 4427 * make this true someday become false. 4428 */ 4429 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 4430 unsigned char *scsi3addr, struct CommandList *abort) 4431 { 4432 u8 swizzled_tag[8]; 4433 struct CommandList *c; 4434 int rc = 0, rc2 = 0; 4435 4436 /* ioccelerator mode 2 commands should be aborted via the 4437 * accelerated path, since RAID path is unaware of these commands, 4438 * but underlying firmware can't handle abort TMF. 4439 * Change abort to physical device reset. 4440 */ 4441 if (abort->cmd_type == CMD_IOACCEL2) 4442 return hpsa_send_reset_as_abort_ioaccel2(h, scsi3addr, abort); 4443 4444 /* we do not expect to find the swizzled tag in our queue, but 4445 * check anyway just to be sure the assumptions which make this 4446 * the case haven't become wrong. 4447 */ 4448 memcpy(swizzled_tag, &abort->Request.CDB[4], 8); 4449 swizzle_abort_tag(swizzled_tag); 4450 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ); 4451 if (c != NULL) { 4452 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n"); 4453 return hpsa_send_abort(h, scsi3addr, abort, 0); 4454 } 4455 rc = hpsa_send_abort(h, scsi3addr, abort, 0); 4456 4457 /* if the command is still in our queue, we can't conclude that it was 4458 * aborted (it might have just completed normally) but in any case 4459 * we don't need to try to abort it another way. 4460 */ 4461 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ); 4462 if (c) 4463 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1); 4464 return rc && rc2; 4465 } 4466 4467 /* Send an abort for the specified command. 4468 * If the device and controller support it, 4469 * send a task abort request. 4470 */ 4471 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 4472 { 4473 4474 int i, rc; 4475 struct ctlr_info *h; 4476 struct hpsa_scsi_dev_t *dev; 4477 struct CommandList *abort; /* pointer to command to be aborted */ 4478 struct CommandList *found; 4479 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 4480 char msg[256]; /* For debug messaging. */ 4481 int ml = 0; 4482 u32 tagupper, taglower; 4483 4484 /* Find the controller of the command to be aborted */ 4485 h = sdev_to_hba(sc->device); 4486 if (WARN(h == NULL, 4487 "ABORT REQUEST FAILED, Controller lookup failed.\n")) 4488 return FAILED; 4489 4490 /* Check that controller supports some kind of task abort */ 4491 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 4492 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 4493 return FAILED; 4494 4495 memset(msg, 0, sizeof(msg)); 4496 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%llu ", 4497 h->scsi_host->host_no, sc->device->channel, 4498 sc->device->id, sc->device->lun); 4499 4500 /* Find the device of the command to be aborted */ 4501 dev = sc->device->hostdata; 4502 if (!dev) { 4503 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 4504 msg); 4505 return FAILED; 4506 } 4507 4508 /* Get SCSI command to be aborted */ 4509 abort = (struct CommandList *) sc->host_scribble; 4510 if (abort == NULL) { 4511 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n", 4512 msg); 4513 return FAILED; 4514 } 4515 hpsa_get_tag(h, abort, &taglower, &tagupper); 4516 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", tagupper, taglower); 4517 as = (struct scsi_cmnd *) abort->scsi_cmd; 4518 if (as != NULL) 4519 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ", 4520 as->cmnd[0], as->serial_number); 4521 dev_dbg(&h->pdev->dev, "%s\n", msg); 4522 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n", 4523 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 4524 4525 /* Search reqQ to See if command is queued but not submitted, 4526 * if so, complete the command with aborted status and remove 4527 * it from the reqQ. 4528 */ 4529 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ); 4530 if (found) { 4531 found->err_info->CommandStatus = CMD_ABORTED; 4532 finish_cmd(found); 4533 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n", 4534 msg); 4535 return SUCCESS; 4536 } 4537 4538 /* not in reqQ, if also not in cmpQ, must have already completed */ 4539 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 4540 if (!found) { 4541 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n", 4542 msg); 4543 return SUCCESS; 4544 } 4545 4546 /* 4547 * Command is in flight, or possibly already completed 4548 * by the firmware (but not to the scsi mid layer) but we can't 4549 * distinguish which. Send the abort down. 4550 */ 4551 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort); 4552 if (rc != 0) { 4553 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg); 4554 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n", 4555 h->scsi_host->host_no, 4556 dev->bus, dev->target, dev->lun); 4557 return FAILED; 4558 } 4559 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg); 4560 4561 /* If the abort(s) above completed and actually aborted the 4562 * command, then the command to be aborted should already be 4563 * completed. If not, wait around a bit more to see if they 4564 * manage to complete normally. 4565 */ 4566 #define ABORT_COMPLETE_WAIT_SECS 30 4567 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) { 4568 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 4569 if (!found) 4570 return SUCCESS; 4571 msleep(100); 4572 } 4573 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n", 4574 msg, ABORT_COMPLETE_WAIT_SECS); 4575 return FAILED; 4576 } 4577 4578 4579 /* 4580 * For operations that cannot sleep, a command block is allocated at init, 4581 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 4582 * which ones are free or in use. Lock must be held when calling this. 4583 * cmd_free() is the complement. 4584 */ 4585 static struct CommandList *cmd_alloc(struct ctlr_info *h) 4586 { 4587 struct CommandList *c; 4588 int i; 4589 union u64bit temp64; 4590 dma_addr_t cmd_dma_handle, err_dma_handle; 4591 int loopcount; 4592 4593 /* There is some *extremely* small but non-zero chance that that 4594 * multiple threads could get in here, and one thread could 4595 * be scanning through the list of bits looking for a free 4596 * one, but the free ones are always behind him, and other 4597 * threads sneak in behind him and eat them before he can 4598 * get to them, so that while there is always a free one, a 4599 * very unlucky thread might be starved anyway, never able to 4600 * beat the other threads. In reality, this happens so 4601 * infrequently as to be indistinguishable from never. 4602 */ 4603 4604 loopcount = 0; 4605 do { 4606 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 4607 if (i == h->nr_cmds) 4608 i = 0; 4609 loopcount++; 4610 } while (test_and_set_bit(i & (BITS_PER_LONG - 1), 4611 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0 && 4612 loopcount < 10); 4613 4614 /* Thread got starved? We do not expect this to ever happen. */ 4615 if (loopcount >= 10) 4616 return NULL; 4617 4618 c = h->cmd_pool + i; 4619 memset(c, 0, sizeof(*c)); 4620 cmd_dma_handle = h->cmd_pool_dhandle 4621 + i * sizeof(*c); 4622 c->err_info = h->errinfo_pool + i; 4623 memset(c->err_info, 0, sizeof(*c->err_info)); 4624 err_dma_handle = h->errinfo_pool_dhandle 4625 + i * sizeof(*c->err_info); 4626 4627 c->cmdindex = i; 4628 4629 INIT_LIST_HEAD(&c->list); 4630 c->busaddr = (u32) cmd_dma_handle; 4631 temp64.val = (u64) err_dma_handle; 4632 c->ErrDesc.Addr = cpu_to_le64(err_dma_handle); 4633 c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info)); 4634 4635 c->h = h; 4636 return c; 4637 } 4638 4639 /* For operations that can wait for kmalloc to possibly sleep, 4640 * this routine can be called. Lock need not be held to call 4641 * cmd_special_alloc. cmd_special_free() is the complement. 4642 */ 4643 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 4644 { 4645 struct CommandList *c; 4646 dma_addr_t cmd_dma_handle, err_dma_handle; 4647 4648 c = pci_zalloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 4649 if (c == NULL) 4650 return NULL; 4651 4652 c->cmd_type = CMD_SCSI; 4653 c->cmdindex = -1; 4654 4655 c->err_info = pci_zalloc_consistent(h->pdev, sizeof(*c->err_info), 4656 &err_dma_handle); 4657 4658 if (c->err_info == NULL) { 4659 pci_free_consistent(h->pdev, 4660 sizeof(*c), c, cmd_dma_handle); 4661 return NULL; 4662 } 4663 4664 INIT_LIST_HEAD(&c->list); 4665 c->busaddr = (u32) cmd_dma_handle; 4666 c->ErrDesc.Addr = cpu_to_le64(err_dma_handle); 4667 c->ErrDesc.Len = cpu_to_le32(sizeof(*c->err_info)); 4668 4669 c->h = h; 4670 return c; 4671 } 4672 4673 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 4674 { 4675 int i; 4676 4677 i = c - h->cmd_pool; 4678 clear_bit(i & (BITS_PER_LONG - 1), 4679 h->cmd_pool_bits + (i / BITS_PER_LONG)); 4680 } 4681 4682 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 4683 { 4684 pci_free_consistent(h->pdev, sizeof(*c->err_info), 4685 c->err_info, 4686 (dma_addr_t) le64_to_cpu(c->ErrDesc.Addr)); 4687 pci_free_consistent(h->pdev, sizeof(*c), 4688 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 4689 } 4690 4691 #ifdef CONFIG_COMPAT 4692 4693 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, 4694 void __user *arg) 4695 { 4696 IOCTL32_Command_struct __user *arg32 = 4697 (IOCTL32_Command_struct __user *) arg; 4698 IOCTL_Command_struct arg64; 4699 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 4700 int err; 4701 u32 cp; 4702 4703 memset(&arg64, 0, sizeof(arg64)); 4704 err = 0; 4705 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 4706 sizeof(arg64.LUN_info)); 4707 err |= copy_from_user(&arg64.Request, &arg32->Request, 4708 sizeof(arg64.Request)); 4709 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 4710 sizeof(arg64.error_info)); 4711 err |= get_user(arg64.buf_size, &arg32->buf_size); 4712 err |= get_user(cp, &arg32->buf); 4713 arg64.buf = compat_ptr(cp); 4714 err |= copy_to_user(p, &arg64, sizeof(arg64)); 4715 4716 if (err) 4717 return -EFAULT; 4718 4719 err = hpsa_ioctl(dev, CCISS_PASSTHRU, p); 4720 if (err) 4721 return err; 4722 err |= copy_in_user(&arg32->error_info, &p->error_info, 4723 sizeof(arg32->error_info)); 4724 if (err) 4725 return -EFAULT; 4726 return err; 4727 } 4728 4729 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 4730 int cmd, void __user *arg) 4731 { 4732 BIG_IOCTL32_Command_struct __user *arg32 = 4733 (BIG_IOCTL32_Command_struct __user *) arg; 4734 BIG_IOCTL_Command_struct arg64; 4735 BIG_IOCTL_Command_struct __user *p = 4736 compat_alloc_user_space(sizeof(arg64)); 4737 int err; 4738 u32 cp; 4739 4740 memset(&arg64, 0, sizeof(arg64)); 4741 err = 0; 4742 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 4743 sizeof(arg64.LUN_info)); 4744 err |= copy_from_user(&arg64.Request, &arg32->Request, 4745 sizeof(arg64.Request)); 4746 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 4747 sizeof(arg64.error_info)); 4748 err |= get_user(arg64.buf_size, &arg32->buf_size); 4749 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 4750 err |= get_user(cp, &arg32->buf); 4751 arg64.buf = compat_ptr(cp); 4752 err |= copy_to_user(p, &arg64, sizeof(arg64)); 4753 4754 if (err) 4755 return -EFAULT; 4756 4757 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, p); 4758 if (err) 4759 return err; 4760 err |= copy_in_user(&arg32->error_info, &p->error_info, 4761 sizeof(arg32->error_info)); 4762 if (err) 4763 return -EFAULT; 4764 return err; 4765 } 4766 4767 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 4768 { 4769 switch (cmd) { 4770 case CCISS_GETPCIINFO: 4771 case CCISS_GETINTINFO: 4772 case CCISS_SETINTINFO: 4773 case CCISS_GETNODENAME: 4774 case CCISS_SETNODENAME: 4775 case CCISS_GETHEARTBEAT: 4776 case CCISS_GETBUSTYPES: 4777 case CCISS_GETFIRMVER: 4778 case CCISS_GETDRIVVER: 4779 case CCISS_REVALIDVOLS: 4780 case CCISS_DEREGDISK: 4781 case CCISS_REGNEWDISK: 4782 case CCISS_REGNEWD: 4783 case CCISS_RESCANDISK: 4784 case CCISS_GETLUNINFO: 4785 return hpsa_ioctl(dev, cmd, arg); 4786 4787 case CCISS_PASSTHRU32: 4788 return hpsa_ioctl32_passthru(dev, cmd, arg); 4789 case CCISS_BIG_PASSTHRU32: 4790 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 4791 4792 default: 4793 return -ENOIOCTLCMD; 4794 } 4795 } 4796 #endif 4797 4798 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 4799 { 4800 struct hpsa_pci_info pciinfo; 4801 4802 if (!argp) 4803 return -EINVAL; 4804 pciinfo.domain = pci_domain_nr(h->pdev->bus); 4805 pciinfo.bus = h->pdev->bus->number; 4806 pciinfo.dev_fn = h->pdev->devfn; 4807 pciinfo.board_id = h->board_id; 4808 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 4809 return -EFAULT; 4810 return 0; 4811 } 4812 4813 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 4814 { 4815 DriverVer_type DriverVer; 4816 unsigned char vmaj, vmin, vsubmin; 4817 int rc; 4818 4819 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 4820 &vmaj, &vmin, &vsubmin); 4821 if (rc != 3) { 4822 dev_info(&h->pdev->dev, "driver version string '%s' " 4823 "unrecognized.", HPSA_DRIVER_VERSION); 4824 vmaj = 0; 4825 vmin = 0; 4826 vsubmin = 0; 4827 } 4828 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 4829 if (!argp) 4830 return -EINVAL; 4831 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 4832 return -EFAULT; 4833 return 0; 4834 } 4835 4836 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 4837 { 4838 IOCTL_Command_struct iocommand; 4839 struct CommandList *c; 4840 char *buff = NULL; 4841 u64 temp64; 4842 int rc = 0; 4843 4844 if (!argp) 4845 return -EINVAL; 4846 if (!capable(CAP_SYS_RAWIO)) 4847 return -EPERM; 4848 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 4849 return -EFAULT; 4850 if ((iocommand.buf_size < 1) && 4851 (iocommand.Request.Type.Direction != XFER_NONE)) { 4852 return -EINVAL; 4853 } 4854 if (iocommand.buf_size > 0) { 4855 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 4856 if (buff == NULL) 4857 return -EFAULT; 4858 if (iocommand.Request.Type.Direction & XFER_WRITE) { 4859 /* Copy the data into the buffer we created */ 4860 if (copy_from_user(buff, iocommand.buf, 4861 iocommand.buf_size)) { 4862 rc = -EFAULT; 4863 goto out_kfree; 4864 } 4865 } else { 4866 memset(buff, 0, iocommand.buf_size); 4867 } 4868 } 4869 c = cmd_special_alloc(h); 4870 if (c == NULL) { 4871 rc = -ENOMEM; 4872 goto out_kfree; 4873 } 4874 /* Fill in the command type */ 4875 c->cmd_type = CMD_IOCTL_PEND; 4876 /* Fill in Command Header */ 4877 c->Header.ReplyQueue = 0; /* unused in simple mode */ 4878 if (iocommand.buf_size > 0) { /* buffer to fill */ 4879 c->Header.SGList = 1; 4880 c->Header.SGTotal = cpu_to_le16(1); 4881 } else { /* no buffers to fill */ 4882 c->Header.SGList = 0; 4883 c->Header.SGTotal = cpu_to_le16(0); 4884 } 4885 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 4886 /* use the kernel address the cmd block for tag */ 4887 c->Header.tag = c->busaddr; 4888 4889 /* Fill in Request block */ 4890 memcpy(&c->Request, &iocommand.Request, 4891 sizeof(c->Request)); 4892 4893 /* Fill in the scatter gather information */ 4894 if (iocommand.buf_size > 0) { 4895 temp64 = pci_map_single(h->pdev, buff, 4896 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 4897 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 4898 c->SG[0].Addr = cpu_to_le64(0); 4899 c->SG[0].Len = cpu_to_le32(0); 4900 rc = -ENOMEM; 4901 goto out; 4902 } 4903 c->SG[0].Addr = cpu_to_le64(temp64); 4904 c->SG[0].Len = cpu_to_le32(iocommand.buf_size); 4905 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 4906 } 4907 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 4908 if (iocommand.buf_size > 0) 4909 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 4910 check_ioctl_unit_attention(h, c); 4911 4912 /* Copy the error information out */ 4913 memcpy(&iocommand.error_info, c->err_info, 4914 sizeof(iocommand.error_info)); 4915 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 4916 rc = -EFAULT; 4917 goto out; 4918 } 4919 if ((iocommand.Request.Type.Direction & XFER_READ) && 4920 iocommand.buf_size > 0) { 4921 /* Copy the data out of the buffer we created */ 4922 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 4923 rc = -EFAULT; 4924 goto out; 4925 } 4926 } 4927 out: 4928 cmd_special_free(h, c); 4929 out_kfree: 4930 kfree(buff); 4931 return rc; 4932 } 4933 4934 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 4935 { 4936 BIG_IOCTL_Command_struct *ioc; 4937 struct CommandList *c; 4938 unsigned char **buff = NULL; 4939 int *buff_size = NULL; 4940 u64 temp64; 4941 BYTE sg_used = 0; 4942 int status = 0; 4943 int i; 4944 u32 left; 4945 u32 sz; 4946 BYTE __user *data_ptr; 4947 4948 if (!argp) 4949 return -EINVAL; 4950 if (!capable(CAP_SYS_RAWIO)) 4951 return -EPERM; 4952 ioc = (BIG_IOCTL_Command_struct *) 4953 kmalloc(sizeof(*ioc), GFP_KERNEL); 4954 if (!ioc) { 4955 status = -ENOMEM; 4956 goto cleanup1; 4957 } 4958 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 4959 status = -EFAULT; 4960 goto cleanup1; 4961 } 4962 if ((ioc->buf_size < 1) && 4963 (ioc->Request.Type.Direction != XFER_NONE)) { 4964 status = -EINVAL; 4965 goto cleanup1; 4966 } 4967 /* Check kmalloc limits using all SGs */ 4968 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 4969 status = -EINVAL; 4970 goto cleanup1; 4971 } 4972 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 4973 status = -EINVAL; 4974 goto cleanup1; 4975 } 4976 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 4977 if (!buff) { 4978 status = -ENOMEM; 4979 goto cleanup1; 4980 } 4981 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 4982 if (!buff_size) { 4983 status = -ENOMEM; 4984 goto cleanup1; 4985 } 4986 left = ioc->buf_size; 4987 data_ptr = ioc->buf; 4988 while (left) { 4989 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 4990 buff_size[sg_used] = sz; 4991 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 4992 if (buff[sg_used] == NULL) { 4993 status = -ENOMEM; 4994 goto cleanup1; 4995 } 4996 if (ioc->Request.Type.Direction & XFER_WRITE) { 4997 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 4998 status = -EFAULT; 4999 goto cleanup1; 5000 } 5001 } else 5002 memset(buff[sg_used], 0, sz); 5003 left -= sz; 5004 data_ptr += sz; 5005 sg_used++; 5006 } 5007 c = cmd_special_alloc(h); 5008 if (c == NULL) { 5009 status = -ENOMEM; 5010 goto cleanup1; 5011 } 5012 c->cmd_type = CMD_IOCTL_PEND; 5013 c->Header.ReplyQueue = 0; 5014 c->Header.SGList = (u8) sg_used; 5015 c->Header.SGTotal = cpu_to_le16(sg_used); 5016 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 5017 c->Header.tag = c->busaddr; 5018 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 5019 if (ioc->buf_size > 0) { 5020 int i; 5021 for (i = 0; i < sg_used; i++) { 5022 temp64 = pci_map_single(h->pdev, buff[i], 5023 buff_size[i], PCI_DMA_BIDIRECTIONAL); 5024 if (dma_mapping_error(&h->pdev->dev, 5025 (dma_addr_t) temp64)) { 5026 c->SG[i].Addr = cpu_to_le64(0); 5027 c->SG[i].Len = cpu_to_le32(0); 5028 hpsa_pci_unmap(h->pdev, c, i, 5029 PCI_DMA_BIDIRECTIONAL); 5030 status = -ENOMEM; 5031 goto cleanup0; 5032 } 5033 c->SG[i].Addr = cpu_to_le64(temp64); 5034 c->SG[i].Len = cpu_to_le32(buff_size[i]); 5035 c->SG[i].Ext = cpu_to_le32(0); 5036 } 5037 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 5038 } 5039 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 5040 if (sg_used) 5041 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 5042 check_ioctl_unit_attention(h, c); 5043 /* Copy the error information out */ 5044 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 5045 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 5046 status = -EFAULT; 5047 goto cleanup0; 5048 } 5049 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 5050 /* Copy the data out of the buffer we created */ 5051 BYTE __user *ptr = ioc->buf; 5052 for (i = 0; i < sg_used; i++) { 5053 if (copy_to_user(ptr, buff[i], buff_size[i])) { 5054 status = -EFAULT; 5055 goto cleanup0; 5056 } 5057 ptr += buff_size[i]; 5058 } 5059 } 5060 status = 0; 5061 cleanup0: 5062 cmd_special_free(h, c); 5063 cleanup1: 5064 if (buff) { 5065 for (i = 0; i < sg_used; i++) 5066 kfree(buff[i]); 5067 kfree(buff); 5068 } 5069 kfree(buff_size); 5070 kfree(ioc); 5071 return status; 5072 } 5073 5074 static void check_ioctl_unit_attention(struct ctlr_info *h, 5075 struct CommandList *c) 5076 { 5077 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5078 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 5079 (void) check_for_unit_attention(h, c); 5080 } 5081 5082 static int increment_passthru_count(struct ctlr_info *h) 5083 { 5084 unsigned long flags; 5085 5086 spin_lock_irqsave(&h->passthru_count_lock, flags); 5087 if (h->passthru_count >= HPSA_MAX_CONCURRENT_PASSTHRUS) { 5088 spin_unlock_irqrestore(&h->passthru_count_lock, flags); 5089 return -1; 5090 } 5091 h->passthru_count++; 5092 spin_unlock_irqrestore(&h->passthru_count_lock, flags); 5093 return 0; 5094 } 5095 5096 static void decrement_passthru_count(struct ctlr_info *h) 5097 { 5098 unsigned long flags; 5099 5100 spin_lock_irqsave(&h->passthru_count_lock, flags); 5101 if (h->passthru_count <= 0) { 5102 spin_unlock_irqrestore(&h->passthru_count_lock, flags); 5103 /* not expecting to get here. */ 5104 dev_warn(&h->pdev->dev, "Bug detected, passthru_count seems to be incorrect.\n"); 5105 return; 5106 } 5107 h->passthru_count--; 5108 spin_unlock_irqrestore(&h->passthru_count_lock, flags); 5109 } 5110 5111 /* 5112 * ioctl 5113 */ 5114 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void __user *arg) 5115 { 5116 struct ctlr_info *h; 5117 void __user *argp = (void __user *)arg; 5118 int rc; 5119 5120 h = sdev_to_hba(dev); 5121 5122 switch (cmd) { 5123 case CCISS_DEREGDISK: 5124 case CCISS_REGNEWDISK: 5125 case CCISS_REGNEWD: 5126 hpsa_scan_start(h->scsi_host); 5127 return 0; 5128 case CCISS_GETPCIINFO: 5129 return hpsa_getpciinfo_ioctl(h, argp); 5130 case CCISS_GETDRIVVER: 5131 return hpsa_getdrivver_ioctl(h, argp); 5132 case CCISS_PASSTHRU: 5133 if (increment_passthru_count(h)) 5134 return -EAGAIN; 5135 rc = hpsa_passthru_ioctl(h, argp); 5136 decrement_passthru_count(h); 5137 return rc; 5138 case CCISS_BIG_PASSTHRU: 5139 if (increment_passthru_count(h)) 5140 return -EAGAIN; 5141 rc = hpsa_big_passthru_ioctl(h, argp); 5142 decrement_passthru_count(h); 5143 return rc; 5144 default: 5145 return -ENOTTY; 5146 } 5147 } 5148 5149 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 5150 u8 reset_type) 5151 { 5152 struct CommandList *c; 5153 5154 c = cmd_alloc(h); 5155 if (!c) 5156 return -ENOMEM; 5157 /* fill_cmd can't fail here, no data buffer to map */ 5158 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 5159 RAID_CTLR_LUNID, TYPE_MSG); 5160 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 5161 c->waiting = NULL; 5162 enqueue_cmd_and_start_io(h, c); 5163 /* Don't wait for completion, the reset won't complete. Don't free 5164 * the command either. This is the last command we will send before 5165 * re-initializing everything, so it doesn't matter and won't leak. 5166 */ 5167 return 0; 5168 } 5169 5170 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 5171 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 5172 int cmd_type) 5173 { 5174 int pci_dir = XFER_NONE; 5175 struct CommandList *a; /* for commands to be aborted */ 5176 u32 tupper, tlower; 5177 5178 c->cmd_type = CMD_IOCTL_PEND; 5179 c->Header.ReplyQueue = 0; 5180 if (buff != NULL && size > 0) { 5181 c->Header.SGList = 1; 5182 c->Header.SGTotal = cpu_to_le16(1); 5183 } else { 5184 c->Header.SGList = 0; 5185 c->Header.SGTotal = cpu_to_le16(0); 5186 } 5187 c->Header.tag = c->busaddr; 5188 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 5189 5190 if (cmd_type == TYPE_CMD) { 5191 switch (cmd) { 5192 case HPSA_INQUIRY: 5193 /* are we trying to read a vital product page */ 5194 if (page_code & VPD_PAGE) { 5195 c->Request.CDB[1] = 0x01; 5196 c->Request.CDB[2] = (page_code & 0xff); 5197 } 5198 c->Request.CDBLen = 6; 5199 c->Request.type_attr_dir = 5200 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 5201 c->Request.Timeout = 0; 5202 c->Request.CDB[0] = HPSA_INQUIRY; 5203 c->Request.CDB[4] = size & 0xFF; 5204 break; 5205 case HPSA_REPORT_LOG: 5206 case HPSA_REPORT_PHYS: 5207 /* Talking to controller so It's a physical command 5208 mode = 00 target = 0. Nothing to write. 5209 */ 5210 c->Request.CDBLen = 12; 5211 c->Request.type_attr_dir = 5212 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 5213 c->Request.Timeout = 0; 5214 c->Request.CDB[0] = cmd; 5215 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 5216 c->Request.CDB[7] = (size >> 16) & 0xFF; 5217 c->Request.CDB[8] = (size >> 8) & 0xFF; 5218 c->Request.CDB[9] = size & 0xFF; 5219 break; 5220 case HPSA_CACHE_FLUSH: 5221 c->Request.CDBLen = 12; 5222 c->Request.type_attr_dir = 5223 TYPE_ATTR_DIR(cmd_type, 5224 ATTR_SIMPLE, XFER_WRITE); 5225 c->Request.Timeout = 0; 5226 c->Request.CDB[0] = BMIC_WRITE; 5227 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 5228 c->Request.CDB[7] = (size >> 8) & 0xFF; 5229 c->Request.CDB[8] = size & 0xFF; 5230 break; 5231 case TEST_UNIT_READY: 5232 c->Request.CDBLen = 6; 5233 c->Request.type_attr_dir = 5234 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 5235 c->Request.Timeout = 0; 5236 break; 5237 case HPSA_GET_RAID_MAP: 5238 c->Request.CDBLen = 12; 5239 c->Request.type_attr_dir = 5240 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 5241 c->Request.Timeout = 0; 5242 c->Request.CDB[0] = HPSA_CISS_READ; 5243 c->Request.CDB[1] = cmd; 5244 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 5245 c->Request.CDB[7] = (size >> 16) & 0xFF; 5246 c->Request.CDB[8] = (size >> 8) & 0xFF; 5247 c->Request.CDB[9] = size & 0xFF; 5248 break; 5249 case BMIC_SENSE_CONTROLLER_PARAMETERS: 5250 c->Request.CDBLen = 10; 5251 c->Request.type_attr_dir = 5252 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 5253 c->Request.Timeout = 0; 5254 c->Request.CDB[0] = BMIC_READ; 5255 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 5256 c->Request.CDB[7] = (size >> 16) & 0xFF; 5257 c->Request.CDB[8] = (size >> 8) & 0xFF; 5258 break; 5259 default: 5260 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 5261 BUG(); 5262 return -1; 5263 } 5264 } else if (cmd_type == TYPE_MSG) { 5265 switch (cmd) { 5266 5267 case HPSA_DEVICE_RESET_MSG: 5268 c->Request.CDBLen = 16; 5269 c->Request.type_attr_dir = 5270 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 5271 c->Request.Timeout = 0; /* Don't time out */ 5272 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 5273 c->Request.CDB[0] = cmd; 5274 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 5275 /* If bytes 4-7 are zero, it means reset the */ 5276 /* LunID device */ 5277 c->Request.CDB[4] = 0x00; 5278 c->Request.CDB[5] = 0x00; 5279 c->Request.CDB[6] = 0x00; 5280 c->Request.CDB[7] = 0x00; 5281 break; 5282 case HPSA_ABORT_MSG: 5283 a = buff; /* point to command to be aborted */ 5284 dev_dbg(&h->pdev->dev, "Abort Tag:0x%016llx using request Tag:0x%016llx", 5285 a->Header.tag, c->Header.tag); 5286 tlower = (u32) (a->Header.tag >> 32); 5287 tupper = (u32) (a->Header.tag & 0x0ffffffffULL); 5288 c->Request.CDBLen = 16; 5289 c->Request.type_attr_dir = 5290 TYPE_ATTR_DIR(cmd_type, 5291 ATTR_SIMPLE, XFER_WRITE); 5292 c->Request.Timeout = 0; /* Don't time out */ 5293 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 5294 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 5295 c->Request.CDB[2] = 0x00; /* reserved */ 5296 c->Request.CDB[3] = 0x00; /* reserved */ 5297 /* Tag to abort goes in CDB[4]-CDB[11] */ 5298 c->Request.CDB[4] = tlower & 0xFF; 5299 c->Request.CDB[5] = (tlower >> 8) & 0xFF; 5300 c->Request.CDB[6] = (tlower >> 16) & 0xFF; 5301 c->Request.CDB[7] = (tlower >> 24) & 0xFF; 5302 c->Request.CDB[8] = tupper & 0xFF; 5303 c->Request.CDB[9] = (tupper >> 8) & 0xFF; 5304 c->Request.CDB[10] = (tupper >> 16) & 0xFF; 5305 c->Request.CDB[11] = (tupper >> 24) & 0xFF; 5306 c->Request.CDB[12] = 0x00; /* reserved */ 5307 c->Request.CDB[13] = 0x00; /* reserved */ 5308 c->Request.CDB[14] = 0x00; /* reserved */ 5309 c->Request.CDB[15] = 0x00; /* reserved */ 5310 break; 5311 default: 5312 dev_warn(&h->pdev->dev, "unknown message type %d\n", 5313 cmd); 5314 BUG(); 5315 } 5316 } else { 5317 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 5318 BUG(); 5319 } 5320 5321 switch (GET_DIR(c->Request.type_attr_dir)) { 5322 case XFER_READ: 5323 pci_dir = PCI_DMA_FROMDEVICE; 5324 break; 5325 case XFER_WRITE: 5326 pci_dir = PCI_DMA_TODEVICE; 5327 break; 5328 case XFER_NONE: 5329 pci_dir = PCI_DMA_NONE; 5330 break; 5331 default: 5332 pci_dir = PCI_DMA_BIDIRECTIONAL; 5333 } 5334 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 5335 return -1; 5336 return 0; 5337 } 5338 5339 /* 5340 * Map (physical) PCI mem into (virtual) kernel space 5341 */ 5342 static void __iomem *remap_pci_mem(ulong base, ulong size) 5343 { 5344 ulong page_base = ((ulong) base) & PAGE_MASK; 5345 ulong page_offs = ((ulong) base) - page_base; 5346 void __iomem *page_remapped = ioremap_nocache(page_base, 5347 page_offs + size); 5348 5349 return page_remapped ? (page_remapped + page_offs) : NULL; 5350 } 5351 5352 /* Takes cmds off the submission queue and sends them to the hardware, 5353 * then puts them on the queue of cmds waiting for completion. 5354 * Assumes h->lock is held 5355 */ 5356 static void start_io(struct ctlr_info *h, unsigned long *flags) 5357 { 5358 struct CommandList *c; 5359 5360 while (!list_empty(&h->reqQ)) { 5361 c = list_entry(h->reqQ.next, struct CommandList, list); 5362 /* can't do anything if fifo is full */ 5363 if ((h->access.fifo_full(h))) { 5364 h->fifo_recently_full = 1; 5365 dev_warn(&h->pdev->dev, "fifo full\n"); 5366 break; 5367 } 5368 h->fifo_recently_full = 0; 5369 5370 /* Get the first entry from the Request Q */ 5371 removeQ(c); 5372 h->Qdepth--; 5373 5374 /* Put job onto the completed Q */ 5375 addQ(&h->cmpQ, c); 5376 atomic_inc(&h->commands_outstanding); 5377 spin_unlock_irqrestore(&h->lock, *flags); 5378 /* Tell the controller execute command */ 5379 h->access.submit_command(h, c); 5380 spin_lock_irqsave(&h->lock, *flags); 5381 } 5382 } 5383 5384 static void lock_and_start_io(struct ctlr_info *h) 5385 { 5386 unsigned long flags; 5387 5388 spin_lock_irqsave(&h->lock, flags); 5389 start_io(h, &flags); 5390 spin_unlock_irqrestore(&h->lock, flags); 5391 } 5392 5393 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 5394 { 5395 return h->access.command_completed(h, q); 5396 } 5397 5398 static inline bool interrupt_pending(struct ctlr_info *h) 5399 { 5400 return h->access.intr_pending(h); 5401 } 5402 5403 static inline long interrupt_not_for_us(struct ctlr_info *h) 5404 { 5405 return (h->access.intr_pending(h) == 0) || 5406 (h->interrupts_enabled == 0); 5407 } 5408 5409 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 5410 u32 raw_tag) 5411 { 5412 if (unlikely(tag_index >= h->nr_cmds)) { 5413 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 5414 return 1; 5415 } 5416 return 0; 5417 } 5418 5419 static inline void finish_cmd(struct CommandList *c) 5420 { 5421 unsigned long flags; 5422 int io_may_be_stalled = 0; 5423 struct ctlr_info *h = c->h; 5424 int count; 5425 5426 spin_lock_irqsave(&h->lock, flags); 5427 removeQ(c); 5428 5429 /* 5430 * Check for possibly stalled i/o. 5431 * 5432 * If a fifo_full condition is encountered, requests will back up 5433 * in h->reqQ. This queue is only emptied out by start_io which is 5434 * only called when a new i/o request comes in. If no i/o's are 5435 * forthcoming, the i/o's in h->reqQ can get stuck. So we call 5436 * start_io from here if we detect such a danger. 5437 * 5438 * Normally, we shouldn't hit this case, but pounding on the 5439 * CCISS_PASSTHRU ioctl can provoke it. Only call start_io if 5440 * commands_outstanding is low. We want to avoid calling 5441 * start_io from in here as much as possible, and esp. don't 5442 * want to get in a cycle where we call start_io every time 5443 * through here. 5444 */ 5445 count = atomic_read(&h->commands_outstanding); 5446 spin_unlock_irqrestore(&h->lock, flags); 5447 if (unlikely(h->fifo_recently_full) && count < 5) 5448 io_may_be_stalled = 1; 5449 5450 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 5451 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 5452 || c->cmd_type == CMD_IOACCEL2)) 5453 complete_scsi_command(c); 5454 else if (c->cmd_type == CMD_IOCTL_PEND) 5455 complete(c->waiting); 5456 if (unlikely(io_may_be_stalled)) 5457 lock_and_start_io(h); 5458 } 5459 5460 static inline u32 hpsa_tag_contains_index(u32 tag) 5461 { 5462 return tag & DIRECT_LOOKUP_BIT; 5463 } 5464 5465 static inline u32 hpsa_tag_to_index(u32 tag) 5466 { 5467 return tag >> DIRECT_LOOKUP_SHIFT; 5468 } 5469 5470 5471 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 5472 { 5473 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 5474 #define HPSA_SIMPLE_ERROR_BITS 0x03 5475 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 5476 return tag & ~HPSA_SIMPLE_ERROR_BITS; 5477 return tag & ~HPSA_PERF_ERROR_BITS; 5478 } 5479 5480 /* process completion of an indexed ("direct lookup") command */ 5481 static inline void process_indexed_cmd(struct ctlr_info *h, 5482 u32 raw_tag) 5483 { 5484 u32 tag_index; 5485 struct CommandList *c; 5486 5487 tag_index = hpsa_tag_to_index(raw_tag); 5488 if (!bad_tag(h, tag_index, raw_tag)) { 5489 c = h->cmd_pool + tag_index; 5490 finish_cmd(c); 5491 } 5492 } 5493 5494 /* process completion of a non-indexed command */ 5495 static inline void process_nonindexed_cmd(struct ctlr_info *h, 5496 u32 raw_tag) 5497 { 5498 u32 tag; 5499 struct CommandList *c = NULL; 5500 unsigned long flags; 5501 5502 tag = hpsa_tag_discard_error_bits(h, raw_tag); 5503 spin_lock_irqsave(&h->lock, flags); 5504 list_for_each_entry(c, &h->cmpQ, list) { 5505 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 5506 spin_unlock_irqrestore(&h->lock, flags); 5507 finish_cmd(c); 5508 return; 5509 } 5510 } 5511 spin_unlock_irqrestore(&h->lock, flags); 5512 bad_tag(h, h->nr_cmds + 1, raw_tag); 5513 } 5514 5515 /* Some controllers, like p400, will give us one interrupt 5516 * after a soft reset, even if we turned interrupts off. 5517 * Only need to check for this in the hpsa_xxx_discard_completions 5518 * functions. 5519 */ 5520 static int ignore_bogus_interrupt(struct ctlr_info *h) 5521 { 5522 if (likely(!reset_devices)) 5523 return 0; 5524 5525 if (likely(h->interrupts_enabled)) 5526 return 0; 5527 5528 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 5529 "(known firmware bug.) Ignoring.\n"); 5530 5531 return 1; 5532 } 5533 5534 /* 5535 * Convert &h->q[x] (passed to interrupt handlers) back to h. 5536 * Relies on (h-q[x] == x) being true for x such that 5537 * 0 <= x < MAX_REPLY_QUEUES. 5538 */ 5539 static struct ctlr_info *queue_to_hba(u8 *queue) 5540 { 5541 return container_of((queue - *queue), struct ctlr_info, q[0]); 5542 } 5543 5544 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 5545 { 5546 struct ctlr_info *h = queue_to_hba(queue); 5547 u8 q = *(u8 *) queue; 5548 u32 raw_tag; 5549 5550 if (ignore_bogus_interrupt(h)) 5551 return IRQ_NONE; 5552 5553 if (interrupt_not_for_us(h)) 5554 return IRQ_NONE; 5555 h->last_intr_timestamp = get_jiffies_64(); 5556 while (interrupt_pending(h)) { 5557 raw_tag = get_next_completion(h, q); 5558 while (raw_tag != FIFO_EMPTY) 5559 raw_tag = next_command(h, q); 5560 } 5561 return IRQ_HANDLED; 5562 } 5563 5564 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 5565 { 5566 struct ctlr_info *h = queue_to_hba(queue); 5567 u32 raw_tag; 5568 u8 q = *(u8 *) queue; 5569 5570 if (ignore_bogus_interrupt(h)) 5571 return IRQ_NONE; 5572 5573 h->last_intr_timestamp = get_jiffies_64(); 5574 raw_tag = get_next_completion(h, q); 5575 while (raw_tag != FIFO_EMPTY) 5576 raw_tag = next_command(h, q); 5577 return IRQ_HANDLED; 5578 } 5579 5580 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 5581 { 5582 struct ctlr_info *h = queue_to_hba((u8 *) queue); 5583 u32 raw_tag; 5584 u8 q = *(u8 *) queue; 5585 5586 if (interrupt_not_for_us(h)) 5587 return IRQ_NONE; 5588 h->last_intr_timestamp = get_jiffies_64(); 5589 while (interrupt_pending(h)) { 5590 raw_tag = get_next_completion(h, q); 5591 while (raw_tag != FIFO_EMPTY) { 5592 if (likely(hpsa_tag_contains_index(raw_tag))) 5593 process_indexed_cmd(h, raw_tag); 5594 else 5595 process_nonindexed_cmd(h, raw_tag); 5596 raw_tag = next_command(h, q); 5597 } 5598 } 5599 return IRQ_HANDLED; 5600 } 5601 5602 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 5603 { 5604 struct ctlr_info *h = queue_to_hba(queue); 5605 u32 raw_tag; 5606 u8 q = *(u8 *) queue; 5607 5608 h->last_intr_timestamp = get_jiffies_64(); 5609 raw_tag = get_next_completion(h, q); 5610 while (raw_tag != FIFO_EMPTY) { 5611 if (likely(hpsa_tag_contains_index(raw_tag))) 5612 process_indexed_cmd(h, raw_tag); 5613 else 5614 process_nonindexed_cmd(h, raw_tag); 5615 raw_tag = next_command(h, q); 5616 } 5617 return IRQ_HANDLED; 5618 } 5619 5620 /* Send a message CDB to the firmware. Careful, this only works 5621 * in simple mode, not performant mode due to the tag lookup. 5622 * We only ever use this immediately after a controller reset. 5623 */ 5624 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 5625 unsigned char type) 5626 { 5627 struct Command { 5628 struct CommandListHeader CommandHeader; 5629 struct RequestBlock Request; 5630 struct ErrDescriptor ErrorDescriptor; 5631 }; 5632 struct Command *cmd; 5633 static const size_t cmd_sz = sizeof(*cmd) + 5634 sizeof(cmd->ErrorDescriptor); 5635 dma_addr_t paddr64; 5636 uint32_t paddr32, tag; 5637 void __iomem *vaddr; 5638 int i, err; 5639 5640 vaddr = pci_ioremap_bar(pdev, 0); 5641 if (vaddr == NULL) 5642 return -ENOMEM; 5643 5644 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 5645 * CCISS commands, so they must be allocated from the lower 4GiB of 5646 * memory. 5647 */ 5648 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 5649 if (err) { 5650 iounmap(vaddr); 5651 return -ENOMEM; 5652 } 5653 5654 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 5655 if (cmd == NULL) { 5656 iounmap(vaddr); 5657 return -ENOMEM; 5658 } 5659 5660 /* This must fit, because of the 32-bit consistent DMA mask. Also, 5661 * although there's no guarantee, we assume that the address is at 5662 * least 4-byte aligned (most likely, it's page-aligned). 5663 */ 5664 paddr32 = paddr64; 5665 5666 cmd->CommandHeader.ReplyQueue = 0; 5667 cmd->CommandHeader.SGList = 0; 5668 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 5669 cmd->CommandHeader.tag = paddr32; 5670 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 5671 5672 cmd->Request.CDBLen = 16; 5673 cmd->Request.type_attr_dir = 5674 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 5675 cmd->Request.Timeout = 0; /* Don't time out */ 5676 cmd->Request.CDB[0] = opcode; 5677 cmd->Request.CDB[1] = type; 5678 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 5679 cmd->ErrorDescriptor.Addr = 5680 cpu_to_le64((paddr32 + sizeof(*cmd))); 5681 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 5682 5683 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 5684 5685 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 5686 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 5687 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 5688 break; 5689 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 5690 } 5691 5692 iounmap(vaddr); 5693 5694 /* we leak the DMA buffer here ... no choice since the controller could 5695 * still complete the command. 5696 */ 5697 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 5698 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 5699 opcode, type); 5700 return -ETIMEDOUT; 5701 } 5702 5703 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 5704 5705 if (tag & HPSA_ERROR_BIT) { 5706 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 5707 opcode, type); 5708 return -EIO; 5709 } 5710 5711 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 5712 opcode, type); 5713 return 0; 5714 } 5715 5716 #define hpsa_noop(p) hpsa_message(p, 3, 0) 5717 5718 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 5719 void __iomem *vaddr, u32 use_doorbell) 5720 { 5721 u16 pmcsr; 5722 int pos; 5723 5724 if (use_doorbell) { 5725 /* For everything after the P600, the PCI power state method 5726 * of resetting the controller doesn't work, so we have this 5727 * other way using the doorbell register. 5728 */ 5729 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 5730 writel(use_doorbell, vaddr + SA5_DOORBELL); 5731 5732 /* PMC hardware guys tell us we need a 10 second delay after 5733 * doorbell reset and before any attempt to talk to the board 5734 * at all to ensure that this actually works and doesn't fall 5735 * over in some weird corner cases. 5736 */ 5737 msleep(10000); 5738 } else { /* Try to do it the PCI power state way */ 5739 5740 /* Quoting from the Open CISS Specification: "The Power 5741 * Management Control/Status Register (CSR) controls the power 5742 * state of the device. The normal operating state is D0, 5743 * CSR=00h. The software off state is D3, CSR=03h. To reset 5744 * the controller, place the interface device in D3 then to D0, 5745 * this causes a secondary PCI reset which will reset the 5746 * controller." */ 5747 5748 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 5749 if (pos == 0) { 5750 dev_err(&pdev->dev, 5751 "hpsa_reset_controller: " 5752 "PCI PM not supported\n"); 5753 return -ENODEV; 5754 } 5755 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 5756 /* enter the D3hot power management state */ 5757 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 5758 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 5759 pmcsr |= PCI_D3hot; 5760 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 5761 5762 msleep(500); 5763 5764 /* enter the D0 power management state */ 5765 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 5766 pmcsr |= PCI_D0; 5767 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 5768 5769 /* 5770 * The P600 requires a small delay when changing states. 5771 * Otherwise we may think the board did not reset and we bail. 5772 * This for kdump only and is particular to the P600. 5773 */ 5774 msleep(500); 5775 } 5776 return 0; 5777 } 5778 5779 static void init_driver_version(char *driver_version, int len) 5780 { 5781 memset(driver_version, 0, len); 5782 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 5783 } 5784 5785 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 5786 { 5787 char *driver_version; 5788 int i, size = sizeof(cfgtable->driver_version); 5789 5790 driver_version = kmalloc(size, GFP_KERNEL); 5791 if (!driver_version) 5792 return -ENOMEM; 5793 5794 init_driver_version(driver_version, size); 5795 for (i = 0; i < size; i++) 5796 writeb(driver_version[i], &cfgtable->driver_version[i]); 5797 kfree(driver_version); 5798 return 0; 5799 } 5800 5801 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 5802 unsigned char *driver_ver) 5803 { 5804 int i; 5805 5806 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 5807 driver_ver[i] = readb(&cfgtable->driver_version[i]); 5808 } 5809 5810 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 5811 { 5812 5813 char *driver_ver, *old_driver_ver; 5814 int rc, size = sizeof(cfgtable->driver_version); 5815 5816 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 5817 if (!old_driver_ver) 5818 return -ENOMEM; 5819 driver_ver = old_driver_ver + size; 5820 5821 /* After a reset, the 32 bytes of "driver version" in the cfgtable 5822 * should have been changed, otherwise we know the reset failed. 5823 */ 5824 init_driver_version(old_driver_ver, size); 5825 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 5826 rc = !memcmp(driver_ver, old_driver_ver, size); 5827 kfree(old_driver_ver); 5828 return rc; 5829 } 5830 /* This does a hard reset of the controller using PCI power management 5831 * states or the using the doorbell register. 5832 */ 5833 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 5834 { 5835 u64 cfg_offset; 5836 u32 cfg_base_addr; 5837 u64 cfg_base_addr_index; 5838 void __iomem *vaddr; 5839 unsigned long paddr; 5840 u32 misc_fw_support; 5841 int rc; 5842 struct CfgTable __iomem *cfgtable; 5843 u32 use_doorbell; 5844 u32 board_id; 5845 u16 command_register; 5846 5847 /* For controllers as old as the P600, this is very nearly 5848 * the same thing as 5849 * 5850 * pci_save_state(pci_dev); 5851 * pci_set_power_state(pci_dev, PCI_D3hot); 5852 * pci_set_power_state(pci_dev, PCI_D0); 5853 * pci_restore_state(pci_dev); 5854 * 5855 * For controllers newer than the P600, the pci power state 5856 * method of resetting doesn't work so we have another way 5857 * using the doorbell register. 5858 */ 5859 5860 rc = hpsa_lookup_board_id(pdev, &board_id); 5861 if (rc < 0 || !ctlr_is_resettable(board_id)) { 5862 dev_warn(&pdev->dev, "Not resetting device.\n"); 5863 return -ENODEV; 5864 } 5865 5866 /* if controller is soft- but not hard resettable... */ 5867 if (!ctlr_is_hard_resettable(board_id)) 5868 return -ENOTSUPP; /* try soft reset later. */ 5869 5870 /* Save the PCI command register */ 5871 pci_read_config_word(pdev, 4, &command_register); 5872 pci_save_state(pdev); 5873 5874 /* find the first memory BAR, so we can find the cfg table */ 5875 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 5876 if (rc) 5877 return rc; 5878 vaddr = remap_pci_mem(paddr, 0x250); 5879 if (!vaddr) 5880 return -ENOMEM; 5881 5882 /* find cfgtable in order to check if reset via doorbell is supported */ 5883 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 5884 &cfg_base_addr_index, &cfg_offset); 5885 if (rc) 5886 goto unmap_vaddr; 5887 cfgtable = remap_pci_mem(pci_resource_start(pdev, 5888 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 5889 if (!cfgtable) { 5890 rc = -ENOMEM; 5891 goto unmap_vaddr; 5892 } 5893 rc = write_driver_ver_to_cfgtable(cfgtable); 5894 if (rc) 5895 goto unmap_vaddr; 5896 5897 /* If reset via doorbell register is supported, use that. 5898 * There are two such methods. Favor the newest method. 5899 */ 5900 misc_fw_support = readl(&cfgtable->misc_fw_support); 5901 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 5902 if (use_doorbell) { 5903 use_doorbell = DOORBELL_CTLR_RESET2; 5904 } else { 5905 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 5906 if (use_doorbell) { 5907 dev_warn(&pdev->dev, "Soft reset not supported. " 5908 "Firmware update is required.\n"); 5909 rc = -ENOTSUPP; /* try soft reset */ 5910 goto unmap_cfgtable; 5911 } 5912 } 5913 5914 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 5915 if (rc) 5916 goto unmap_cfgtable; 5917 5918 pci_restore_state(pdev); 5919 pci_write_config_word(pdev, 4, command_register); 5920 5921 /* Some devices (notably the HP Smart Array 5i Controller) 5922 need a little pause here */ 5923 msleep(HPSA_POST_RESET_PAUSE_MSECS); 5924 5925 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 5926 if (rc) { 5927 dev_warn(&pdev->dev, 5928 "failed waiting for board to become ready " 5929 "after hard reset\n"); 5930 goto unmap_cfgtable; 5931 } 5932 5933 rc = controller_reset_failed(vaddr); 5934 if (rc < 0) 5935 goto unmap_cfgtable; 5936 if (rc) { 5937 dev_warn(&pdev->dev, "Unable to successfully reset " 5938 "controller. Will try soft reset.\n"); 5939 rc = -ENOTSUPP; 5940 } else { 5941 dev_info(&pdev->dev, "board ready after hard reset.\n"); 5942 } 5943 5944 unmap_cfgtable: 5945 iounmap(cfgtable); 5946 5947 unmap_vaddr: 5948 iounmap(vaddr); 5949 return rc; 5950 } 5951 5952 /* 5953 * We cannot read the structure directly, for portability we must use 5954 * the io functions. 5955 * This is for debug only. 5956 */ 5957 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 5958 { 5959 #ifdef HPSA_DEBUG 5960 int i; 5961 char temp_name[17]; 5962 5963 dev_info(dev, "Controller Configuration information\n"); 5964 dev_info(dev, "------------------------------------\n"); 5965 for (i = 0; i < 4; i++) 5966 temp_name[i] = readb(&(tb->Signature[i])); 5967 temp_name[4] = '\0'; 5968 dev_info(dev, " Signature = %s\n", temp_name); 5969 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 5970 dev_info(dev, " Transport methods supported = 0x%x\n", 5971 readl(&(tb->TransportSupport))); 5972 dev_info(dev, " Transport methods active = 0x%x\n", 5973 readl(&(tb->TransportActive))); 5974 dev_info(dev, " Requested transport Method = 0x%x\n", 5975 readl(&(tb->HostWrite.TransportRequest))); 5976 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 5977 readl(&(tb->HostWrite.CoalIntDelay))); 5978 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 5979 readl(&(tb->HostWrite.CoalIntCount))); 5980 dev_info(dev, " Max outstanding commands = 0x%d\n", 5981 readl(&(tb->CmdsOutMax))); 5982 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 5983 for (i = 0; i < 16; i++) 5984 temp_name[i] = readb(&(tb->ServerName[i])); 5985 temp_name[16] = '\0'; 5986 dev_info(dev, " Server Name = %s\n", temp_name); 5987 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 5988 readl(&(tb->HeartBeat))); 5989 #endif /* HPSA_DEBUG */ 5990 } 5991 5992 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 5993 { 5994 int i, offset, mem_type, bar_type; 5995 5996 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 5997 return 0; 5998 offset = 0; 5999 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 6000 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 6001 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 6002 offset += 4; 6003 else { 6004 mem_type = pci_resource_flags(pdev, i) & 6005 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 6006 switch (mem_type) { 6007 case PCI_BASE_ADDRESS_MEM_TYPE_32: 6008 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 6009 offset += 4; /* 32 bit */ 6010 break; 6011 case PCI_BASE_ADDRESS_MEM_TYPE_64: 6012 offset += 8; 6013 break; 6014 default: /* reserved in PCI 2.2 */ 6015 dev_warn(&pdev->dev, 6016 "base address is invalid\n"); 6017 return -1; 6018 break; 6019 } 6020 } 6021 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 6022 return i + 1; 6023 } 6024 return -1; 6025 } 6026 6027 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 6028 * controllers that are capable. If not, we use IO-APIC mode. 6029 */ 6030 6031 static void hpsa_interrupt_mode(struct ctlr_info *h) 6032 { 6033 #ifdef CONFIG_PCI_MSI 6034 int err, i; 6035 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 6036 6037 for (i = 0; i < MAX_REPLY_QUEUES; i++) { 6038 hpsa_msix_entries[i].vector = 0; 6039 hpsa_msix_entries[i].entry = i; 6040 } 6041 6042 /* Some boards advertise MSI but don't really support it */ 6043 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 6044 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 6045 goto default_int_mode; 6046 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 6047 dev_info(&h->pdev->dev, "MSIX\n"); 6048 h->msix_vector = MAX_REPLY_QUEUES; 6049 if (h->msix_vector > num_online_cpus()) 6050 h->msix_vector = num_online_cpus(); 6051 err = pci_enable_msix_range(h->pdev, hpsa_msix_entries, 6052 1, h->msix_vector); 6053 if (err < 0) { 6054 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", err); 6055 h->msix_vector = 0; 6056 goto single_msi_mode; 6057 } else if (err < h->msix_vector) { 6058 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 6059 "available\n", err); 6060 } 6061 h->msix_vector = err; 6062 for (i = 0; i < h->msix_vector; i++) 6063 h->intr[i] = hpsa_msix_entries[i].vector; 6064 return; 6065 } 6066 single_msi_mode: 6067 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 6068 dev_info(&h->pdev->dev, "MSI\n"); 6069 if (!pci_enable_msi(h->pdev)) 6070 h->msi_vector = 1; 6071 else 6072 dev_warn(&h->pdev->dev, "MSI init failed\n"); 6073 } 6074 default_int_mode: 6075 #endif /* CONFIG_PCI_MSI */ 6076 /* if we get here we're going to use the default interrupt mode */ 6077 h->intr[h->intr_mode] = h->pdev->irq; 6078 } 6079 6080 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 6081 { 6082 int i; 6083 u32 subsystem_vendor_id, subsystem_device_id; 6084 6085 subsystem_vendor_id = pdev->subsystem_vendor; 6086 subsystem_device_id = pdev->subsystem_device; 6087 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 6088 subsystem_vendor_id; 6089 6090 for (i = 0; i < ARRAY_SIZE(products); i++) 6091 if (*board_id == products[i].board_id) 6092 return i; 6093 6094 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 6095 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 6096 !hpsa_allow_any) { 6097 dev_warn(&pdev->dev, "unrecognized board ID: " 6098 "0x%08x, ignoring.\n", *board_id); 6099 return -ENODEV; 6100 } 6101 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 6102 } 6103 6104 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 6105 unsigned long *memory_bar) 6106 { 6107 int i; 6108 6109 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 6110 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 6111 /* addressing mode bits already removed */ 6112 *memory_bar = pci_resource_start(pdev, i); 6113 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 6114 *memory_bar); 6115 return 0; 6116 } 6117 dev_warn(&pdev->dev, "no memory BAR found\n"); 6118 return -ENODEV; 6119 } 6120 6121 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 6122 int wait_for_ready) 6123 { 6124 int i, iterations; 6125 u32 scratchpad; 6126 if (wait_for_ready) 6127 iterations = HPSA_BOARD_READY_ITERATIONS; 6128 else 6129 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 6130 6131 for (i = 0; i < iterations; i++) { 6132 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 6133 if (wait_for_ready) { 6134 if (scratchpad == HPSA_FIRMWARE_READY) 6135 return 0; 6136 } else { 6137 if (scratchpad != HPSA_FIRMWARE_READY) 6138 return 0; 6139 } 6140 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 6141 } 6142 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 6143 return -ENODEV; 6144 } 6145 6146 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 6147 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 6148 u64 *cfg_offset) 6149 { 6150 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 6151 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 6152 *cfg_base_addr &= (u32) 0x0000ffff; 6153 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 6154 if (*cfg_base_addr_index == -1) { 6155 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 6156 return -ENODEV; 6157 } 6158 return 0; 6159 } 6160 6161 static int hpsa_find_cfgtables(struct ctlr_info *h) 6162 { 6163 u64 cfg_offset; 6164 u32 cfg_base_addr; 6165 u64 cfg_base_addr_index; 6166 u32 trans_offset; 6167 int rc; 6168 6169 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 6170 &cfg_base_addr_index, &cfg_offset); 6171 if (rc) 6172 return rc; 6173 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 6174 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 6175 if (!h->cfgtable) 6176 return -ENOMEM; 6177 rc = write_driver_ver_to_cfgtable(h->cfgtable); 6178 if (rc) 6179 return rc; 6180 /* Find performant mode table. */ 6181 trans_offset = readl(&h->cfgtable->TransMethodOffset); 6182 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 6183 cfg_base_addr_index)+cfg_offset+trans_offset, 6184 sizeof(*h->transtable)); 6185 if (!h->transtable) 6186 return -ENOMEM; 6187 return 0; 6188 } 6189 6190 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 6191 { 6192 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 6193 6194 /* Limit commands in memory limited kdump scenario. */ 6195 if (reset_devices && h->max_commands > 32) 6196 h->max_commands = 32; 6197 6198 if (h->max_commands < 16) { 6199 dev_warn(&h->pdev->dev, "Controller reports " 6200 "max supported commands of %d, an obvious lie. " 6201 "Using 16. Ensure that firmware is up to date.\n", 6202 h->max_commands); 6203 h->max_commands = 16; 6204 } 6205 } 6206 6207 /* Interrogate the hardware for some limits: 6208 * max commands, max SG elements without chaining, and with chaining, 6209 * SG chain block size, etc. 6210 */ 6211 static void hpsa_find_board_params(struct ctlr_info *h) 6212 { 6213 hpsa_get_max_perf_mode_cmds(h); 6214 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 6215 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 6216 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 6217 /* 6218 * Limit in-command s/g elements to 32 save dma'able memory. 6219 * Howvever spec says if 0, use 31 6220 */ 6221 h->max_cmd_sg_entries = 31; 6222 if (h->maxsgentries > 512) { 6223 h->max_cmd_sg_entries = 32; 6224 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 6225 h->maxsgentries--; /* save one for chain pointer */ 6226 } else { 6227 h->chainsize = 0; 6228 h->maxsgentries = 31; /* default to traditional values */ 6229 } 6230 6231 /* Find out what task management functions are supported and cache */ 6232 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 6233 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 6234 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 6235 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 6236 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 6237 } 6238 6239 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 6240 { 6241 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 6242 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 6243 return false; 6244 } 6245 return true; 6246 } 6247 6248 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 6249 { 6250 u32 driver_support; 6251 6252 driver_support = readl(&(h->cfgtable->driver_support)); 6253 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 6254 #ifdef CONFIG_X86 6255 driver_support |= ENABLE_SCSI_PREFETCH; 6256 #endif 6257 driver_support |= ENABLE_UNIT_ATTN; 6258 writel(driver_support, &(h->cfgtable->driver_support)); 6259 } 6260 6261 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 6262 * in a prefetch beyond physical memory. 6263 */ 6264 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 6265 { 6266 u32 dma_prefetch; 6267 6268 if (h->board_id != 0x3225103C) 6269 return; 6270 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 6271 dma_prefetch |= 0x8000; 6272 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 6273 } 6274 6275 static void hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 6276 { 6277 int i; 6278 u32 doorbell_value; 6279 unsigned long flags; 6280 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 6281 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 6282 spin_lock_irqsave(&h->lock, flags); 6283 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 6284 spin_unlock_irqrestore(&h->lock, flags); 6285 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 6286 break; 6287 /* delay and try again */ 6288 msleep(20); 6289 } 6290 } 6291 6292 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 6293 { 6294 int i; 6295 u32 doorbell_value; 6296 unsigned long flags; 6297 6298 /* under certain very rare conditions, this can take awhile. 6299 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 6300 * as we enter this code.) 6301 */ 6302 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 6303 spin_lock_irqsave(&h->lock, flags); 6304 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 6305 spin_unlock_irqrestore(&h->lock, flags); 6306 if (!(doorbell_value & CFGTBL_ChangeReq)) 6307 break; 6308 /* delay and try again */ 6309 usleep_range(10000, 20000); 6310 } 6311 } 6312 6313 static int hpsa_enter_simple_mode(struct ctlr_info *h) 6314 { 6315 u32 trans_support; 6316 6317 trans_support = readl(&(h->cfgtable->TransportSupport)); 6318 if (!(trans_support & SIMPLE_MODE)) 6319 return -ENOTSUPP; 6320 6321 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 6322 6323 /* Update the field, and then ring the doorbell */ 6324 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 6325 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 6326 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 6327 hpsa_wait_for_mode_change_ack(h); 6328 print_cfg_table(&h->pdev->dev, h->cfgtable); 6329 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 6330 goto error; 6331 h->transMethod = CFGTBL_Trans_Simple; 6332 return 0; 6333 error: 6334 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n"); 6335 return -ENODEV; 6336 } 6337 6338 static int hpsa_pci_init(struct ctlr_info *h) 6339 { 6340 int prod_index, err; 6341 6342 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 6343 if (prod_index < 0) 6344 return -ENODEV; 6345 h->product_name = products[prod_index].product_name; 6346 h->access = *(products[prod_index].access); 6347 6348 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 6349 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 6350 6351 err = pci_enable_device(h->pdev); 6352 if (err) { 6353 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 6354 return err; 6355 } 6356 6357 err = pci_request_regions(h->pdev, HPSA); 6358 if (err) { 6359 dev_err(&h->pdev->dev, 6360 "cannot obtain PCI resources, aborting\n"); 6361 return err; 6362 } 6363 6364 pci_set_master(h->pdev); 6365 6366 hpsa_interrupt_mode(h); 6367 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 6368 if (err) 6369 goto err_out_free_res; 6370 h->vaddr = remap_pci_mem(h->paddr, 0x250); 6371 if (!h->vaddr) { 6372 err = -ENOMEM; 6373 goto err_out_free_res; 6374 } 6375 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 6376 if (err) 6377 goto err_out_free_res; 6378 err = hpsa_find_cfgtables(h); 6379 if (err) 6380 goto err_out_free_res; 6381 hpsa_find_board_params(h); 6382 6383 if (!hpsa_CISS_signature_present(h)) { 6384 err = -ENODEV; 6385 goto err_out_free_res; 6386 } 6387 hpsa_set_driver_support_bits(h); 6388 hpsa_p600_dma_prefetch_quirk(h); 6389 err = hpsa_enter_simple_mode(h); 6390 if (err) 6391 goto err_out_free_res; 6392 return 0; 6393 6394 err_out_free_res: 6395 if (h->transtable) 6396 iounmap(h->transtable); 6397 if (h->cfgtable) 6398 iounmap(h->cfgtable); 6399 if (h->vaddr) 6400 iounmap(h->vaddr); 6401 pci_disable_device(h->pdev); 6402 pci_release_regions(h->pdev); 6403 return err; 6404 } 6405 6406 static void hpsa_hba_inquiry(struct ctlr_info *h) 6407 { 6408 int rc; 6409 6410 #define HBA_INQUIRY_BYTE_COUNT 64 6411 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 6412 if (!h->hba_inquiry_data) 6413 return; 6414 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 6415 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 6416 if (rc != 0) { 6417 kfree(h->hba_inquiry_data); 6418 h->hba_inquiry_data = NULL; 6419 } 6420 } 6421 6422 static int hpsa_init_reset_devices(struct pci_dev *pdev) 6423 { 6424 int rc, i; 6425 6426 if (!reset_devices) 6427 return 0; 6428 6429 /* kdump kernel is loading, we don't know in which state is 6430 * the pci interface. The dev->enable_cnt is equal zero 6431 * so we call enable+disable, wait a while and switch it on. 6432 */ 6433 rc = pci_enable_device(pdev); 6434 if (rc) { 6435 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 6436 return -ENODEV; 6437 } 6438 pci_disable_device(pdev); 6439 msleep(260); /* a randomly chosen number */ 6440 rc = pci_enable_device(pdev); 6441 if (rc) { 6442 dev_warn(&pdev->dev, "failed to enable device.\n"); 6443 return -ENODEV; 6444 } 6445 6446 pci_set_master(pdev); 6447 6448 /* Reset the controller with a PCI power-cycle or via doorbell */ 6449 rc = hpsa_kdump_hard_reset_controller(pdev); 6450 6451 /* -ENOTSUPP here means we cannot reset the controller 6452 * but it's already (and still) up and running in 6453 * "performant mode". Or, it might be 640x, which can't reset 6454 * due to concerns about shared bbwc between 6402/6404 pair. 6455 */ 6456 if (rc) { 6457 if (rc != -ENOTSUPP) /* just try to do the kdump anyhow. */ 6458 rc = -ENODEV; 6459 goto out_disable; 6460 } 6461 6462 /* Now try to get the controller to respond to a no-op */ 6463 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 6464 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 6465 if (hpsa_noop(pdev) == 0) 6466 break; 6467 else 6468 dev_warn(&pdev->dev, "no-op failed%s\n", 6469 (i < 11 ? "; re-trying" : "")); 6470 } 6471 6472 out_disable: 6473 6474 pci_disable_device(pdev); 6475 return rc; 6476 } 6477 6478 static int hpsa_allocate_cmd_pool(struct ctlr_info *h) 6479 { 6480 h->cmd_pool_bits = kzalloc( 6481 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 6482 sizeof(unsigned long), GFP_KERNEL); 6483 h->cmd_pool = pci_alloc_consistent(h->pdev, 6484 h->nr_cmds * sizeof(*h->cmd_pool), 6485 &(h->cmd_pool_dhandle)); 6486 h->errinfo_pool = pci_alloc_consistent(h->pdev, 6487 h->nr_cmds * sizeof(*h->errinfo_pool), 6488 &(h->errinfo_pool_dhandle)); 6489 if ((h->cmd_pool_bits == NULL) 6490 || (h->cmd_pool == NULL) 6491 || (h->errinfo_pool == NULL)) { 6492 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 6493 return -ENOMEM; 6494 } 6495 return 0; 6496 } 6497 6498 static void hpsa_free_cmd_pool(struct ctlr_info *h) 6499 { 6500 kfree(h->cmd_pool_bits); 6501 if (h->cmd_pool) 6502 pci_free_consistent(h->pdev, 6503 h->nr_cmds * sizeof(struct CommandList), 6504 h->cmd_pool, h->cmd_pool_dhandle); 6505 if (h->ioaccel2_cmd_pool) 6506 pci_free_consistent(h->pdev, 6507 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 6508 h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle); 6509 if (h->errinfo_pool) 6510 pci_free_consistent(h->pdev, 6511 h->nr_cmds * sizeof(struct ErrorInfo), 6512 h->errinfo_pool, 6513 h->errinfo_pool_dhandle); 6514 if (h->ioaccel_cmd_pool) 6515 pci_free_consistent(h->pdev, 6516 h->nr_cmds * sizeof(struct io_accel1_cmd), 6517 h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle); 6518 } 6519 6520 static void hpsa_irq_affinity_hints(struct ctlr_info *h) 6521 { 6522 int i, cpu, rc; 6523 6524 cpu = cpumask_first(cpu_online_mask); 6525 for (i = 0; i < h->msix_vector; i++) { 6526 rc = irq_set_affinity_hint(h->intr[i], get_cpu_mask(cpu)); 6527 cpu = cpumask_next(cpu, cpu_online_mask); 6528 } 6529 } 6530 6531 static int hpsa_request_irq(struct ctlr_info *h, 6532 irqreturn_t (*msixhandler)(int, void *), 6533 irqreturn_t (*intxhandler)(int, void *)) 6534 { 6535 int rc, i; 6536 6537 /* 6538 * initialize h->q[x] = x so that interrupt handlers know which 6539 * queue to process. 6540 */ 6541 for (i = 0; i < MAX_REPLY_QUEUES; i++) 6542 h->q[i] = (u8) i; 6543 6544 if (h->intr_mode == PERF_MODE_INT && h->msix_vector > 0) { 6545 /* If performant mode and MSI-X, use multiple reply queues */ 6546 for (i = 0; i < h->msix_vector; i++) 6547 rc = request_irq(h->intr[i], msixhandler, 6548 0, h->devname, 6549 &h->q[i]); 6550 hpsa_irq_affinity_hints(h); 6551 } else { 6552 /* Use single reply pool */ 6553 if (h->msix_vector > 0 || h->msi_vector) { 6554 rc = request_irq(h->intr[h->intr_mode], 6555 msixhandler, 0, h->devname, 6556 &h->q[h->intr_mode]); 6557 } else { 6558 rc = request_irq(h->intr[h->intr_mode], 6559 intxhandler, IRQF_SHARED, h->devname, 6560 &h->q[h->intr_mode]); 6561 } 6562 } 6563 if (rc) { 6564 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 6565 h->intr[h->intr_mode], h->devname); 6566 return -ENODEV; 6567 } 6568 return 0; 6569 } 6570 6571 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 6572 { 6573 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 6574 HPSA_RESET_TYPE_CONTROLLER)) { 6575 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 6576 return -EIO; 6577 } 6578 6579 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 6580 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 6581 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 6582 return -1; 6583 } 6584 6585 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 6586 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 6587 dev_warn(&h->pdev->dev, "Board failed to become ready " 6588 "after soft reset.\n"); 6589 return -1; 6590 } 6591 6592 return 0; 6593 } 6594 6595 static void free_irqs(struct ctlr_info *h) 6596 { 6597 int i; 6598 6599 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 6600 /* Single reply queue, only one irq to free */ 6601 i = h->intr_mode; 6602 irq_set_affinity_hint(h->intr[i], NULL); 6603 free_irq(h->intr[i], &h->q[i]); 6604 return; 6605 } 6606 6607 for (i = 0; i < h->msix_vector; i++) { 6608 irq_set_affinity_hint(h->intr[i], NULL); 6609 free_irq(h->intr[i], &h->q[i]); 6610 } 6611 } 6612 6613 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h) 6614 { 6615 free_irqs(h); 6616 #ifdef CONFIG_PCI_MSI 6617 if (h->msix_vector) { 6618 if (h->pdev->msix_enabled) 6619 pci_disable_msix(h->pdev); 6620 } else if (h->msi_vector) { 6621 if (h->pdev->msi_enabled) 6622 pci_disable_msi(h->pdev); 6623 } 6624 #endif /* CONFIG_PCI_MSI */ 6625 } 6626 6627 static void hpsa_free_reply_queues(struct ctlr_info *h) 6628 { 6629 int i; 6630 6631 for (i = 0; i < h->nreply_queues; i++) { 6632 if (!h->reply_queue[i].head) 6633 continue; 6634 pci_free_consistent(h->pdev, h->reply_queue_size, 6635 h->reply_queue[i].head, h->reply_queue[i].busaddr); 6636 h->reply_queue[i].head = NULL; 6637 h->reply_queue[i].busaddr = 0; 6638 } 6639 } 6640 6641 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 6642 { 6643 hpsa_free_irqs_and_disable_msix(h); 6644 hpsa_free_sg_chain_blocks(h); 6645 hpsa_free_cmd_pool(h); 6646 kfree(h->ioaccel1_blockFetchTable); 6647 kfree(h->blockFetchTable); 6648 hpsa_free_reply_queues(h); 6649 if (h->vaddr) 6650 iounmap(h->vaddr); 6651 if (h->transtable) 6652 iounmap(h->transtable); 6653 if (h->cfgtable) 6654 iounmap(h->cfgtable); 6655 pci_disable_device(h->pdev); 6656 pci_release_regions(h->pdev); 6657 kfree(h); 6658 } 6659 6660 /* Called when controller lockup detected. */ 6661 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 6662 { 6663 struct CommandList *c = NULL; 6664 6665 assert_spin_locked(&h->lock); 6666 /* Mark all outstanding commands as failed and complete them. */ 6667 while (!list_empty(list)) { 6668 c = list_entry(list->next, struct CommandList, list); 6669 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 6670 finish_cmd(c); 6671 } 6672 } 6673 6674 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 6675 { 6676 int i, cpu; 6677 6678 cpu = cpumask_first(cpu_online_mask); 6679 for (i = 0; i < num_online_cpus(); i++) { 6680 u32 *lockup_detected; 6681 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 6682 *lockup_detected = value; 6683 cpu = cpumask_next(cpu, cpu_online_mask); 6684 } 6685 wmb(); /* be sure the per-cpu variables are out to memory */ 6686 } 6687 6688 static void controller_lockup_detected(struct ctlr_info *h) 6689 { 6690 unsigned long flags; 6691 u32 lockup_detected; 6692 6693 h->access.set_intr_mask(h, HPSA_INTR_OFF); 6694 spin_lock_irqsave(&h->lock, flags); 6695 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 6696 if (!lockup_detected) { 6697 /* no heartbeat, but controller gave us a zero. */ 6698 dev_warn(&h->pdev->dev, 6699 "lockup detected but scratchpad register is zero\n"); 6700 lockup_detected = 0xffffffff; 6701 } 6702 set_lockup_detected_for_all_cpus(h, lockup_detected); 6703 spin_unlock_irqrestore(&h->lock, flags); 6704 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 6705 lockup_detected); 6706 pci_disable_device(h->pdev); 6707 spin_lock_irqsave(&h->lock, flags); 6708 fail_all_cmds_on_list(h, &h->cmpQ); 6709 fail_all_cmds_on_list(h, &h->reqQ); 6710 spin_unlock_irqrestore(&h->lock, flags); 6711 } 6712 6713 static void detect_controller_lockup(struct ctlr_info *h) 6714 { 6715 u64 now; 6716 u32 heartbeat; 6717 unsigned long flags; 6718 6719 now = get_jiffies_64(); 6720 /* If we've received an interrupt recently, we're ok. */ 6721 if (time_after64(h->last_intr_timestamp + 6722 (h->heartbeat_sample_interval), now)) 6723 return; 6724 6725 /* 6726 * If we've already checked the heartbeat recently, we're ok. 6727 * This could happen if someone sends us a signal. We 6728 * otherwise don't care about signals in this thread. 6729 */ 6730 if (time_after64(h->last_heartbeat_timestamp + 6731 (h->heartbeat_sample_interval), now)) 6732 return; 6733 6734 /* If heartbeat has not changed since we last looked, we're not ok. */ 6735 spin_lock_irqsave(&h->lock, flags); 6736 heartbeat = readl(&h->cfgtable->HeartBeat); 6737 spin_unlock_irqrestore(&h->lock, flags); 6738 if (h->last_heartbeat == heartbeat) { 6739 controller_lockup_detected(h); 6740 return; 6741 } 6742 6743 /* We're ok. */ 6744 h->last_heartbeat = heartbeat; 6745 h->last_heartbeat_timestamp = now; 6746 } 6747 6748 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 6749 { 6750 int i; 6751 char *event_type; 6752 6753 /* Clear the driver-requested rescan flag */ 6754 h->drv_req_rescan = 0; 6755 6756 /* Ask the controller to clear the events we're handling. */ 6757 if ((h->transMethod & (CFGTBL_Trans_io_accel1 6758 | CFGTBL_Trans_io_accel2)) && 6759 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 6760 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 6761 6762 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 6763 event_type = "state change"; 6764 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 6765 event_type = "configuration change"; 6766 /* Stop sending new RAID offload reqs via the IO accelerator */ 6767 scsi_block_requests(h->scsi_host); 6768 for (i = 0; i < h->ndevices; i++) 6769 h->dev[i]->offload_enabled = 0; 6770 hpsa_drain_accel_commands(h); 6771 /* Set 'accelerator path config change' bit */ 6772 dev_warn(&h->pdev->dev, 6773 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 6774 h->events, event_type); 6775 writel(h->events, &(h->cfgtable->clear_event_notify)); 6776 /* Set the "clear event notify field update" bit 6 */ 6777 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 6778 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 6779 hpsa_wait_for_clear_event_notify_ack(h); 6780 scsi_unblock_requests(h->scsi_host); 6781 } else { 6782 /* Acknowledge controller notification events. */ 6783 writel(h->events, &(h->cfgtable->clear_event_notify)); 6784 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 6785 hpsa_wait_for_clear_event_notify_ack(h); 6786 #if 0 6787 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 6788 hpsa_wait_for_mode_change_ack(h); 6789 #endif 6790 } 6791 return; 6792 } 6793 6794 /* Check a register on the controller to see if there are configuration 6795 * changes (added/changed/removed logical drives, etc.) which mean that 6796 * we should rescan the controller for devices. 6797 * Also check flag for driver-initiated rescan. 6798 */ 6799 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 6800 { 6801 if (h->drv_req_rescan) 6802 return 1; 6803 6804 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 6805 return 0; 6806 6807 h->events = readl(&(h->cfgtable->event_notify)); 6808 return h->events & RESCAN_REQUIRED_EVENT_BITS; 6809 } 6810 6811 /* 6812 * Check if any of the offline devices have become ready 6813 */ 6814 static int hpsa_offline_devices_ready(struct ctlr_info *h) 6815 { 6816 unsigned long flags; 6817 struct offline_device_entry *d; 6818 struct list_head *this, *tmp; 6819 6820 spin_lock_irqsave(&h->offline_device_lock, flags); 6821 list_for_each_safe(this, tmp, &h->offline_device_list) { 6822 d = list_entry(this, struct offline_device_entry, 6823 offline_list); 6824 spin_unlock_irqrestore(&h->offline_device_lock, flags); 6825 if (!hpsa_volume_offline(h, d->scsi3addr)) { 6826 spin_lock_irqsave(&h->offline_device_lock, flags); 6827 list_del(&d->offline_list); 6828 spin_unlock_irqrestore(&h->offline_device_lock, flags); 6829 return 1; 6830 } 6831 spin_lock_irqsave(&h->offline_device_lock, flags); 6832 } 6833 spin_unlock_irqrestore(&h->offline_device_lock, flags); 6834 return 0; 6835 } 6836 6837 6838 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 6839 { 6840 unsigned long flags; 6841 struct ctlr_info *h = container_of(to_delayed_work(work), 6842 struct ctlr_info, monitor_ctlr_work); 6843 detect_controller_lockup(h); 6844 if (lockup_detected(h)) 6845 return; 6846 6847 if (hpsa_ctlr_needs_rescan(h) || hpsa_offline_devices_ready(h)) { 6848 scsi_host_get(h->scsi_host); 6849 h->drv_req_rescan = 0; 6850 hpsa_ack_ctlr_events(h); 6851 hpsa_scan_start(h->scsi_host); 6852 scsi_host_put(h->scsi_host); 6853 } 6854 6855 spin_lock_irqsave(&h->lock, flags); 6856 if (h->remove_in_progress) { 6857 spin_unlock_irqrestore(&h->lock, flags); 6858 return; 6859 } 6860 schedule_delayed_work(&h->monitor_ctlr_work, 6861 h->heartbeat_sample_interval); 6862 spin_unlock_irqrestore(&h->lock, flags); 6863 } 6864 6865 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 6866 { 6867 int dac, rc; 6868 struct ctlr_info *h; 6869 int try_soft_reset = 0; 6870 unsigned long flags; 6871 6872 if (number_of_controllers == 0) 6873 printk(KERN_INFO DRIVER_NAME "\n"); 6874 6875 rc = hpsa_init_reset_devices(pdev); 6876 if (rc) { 6877 if (rc != -ENOTSUPP) 6878 return rc; 6879 /* If the reset fails in a particular way (it has no way to do 6880 * a proper hard reset, so returns -ENOTSUPP) we can try to do 6881 * a soft reset once we get the controller configured up to the 6882 * point that it can accept a command. 6883 */ 6884 try_soft_reset = 1; 6885 rc = 0; 6886 } 6887 6888 reinit_after_soft_reset: 6889 6890 /* Command structures must be aligned on a 32-byte boundary because 6891 * the 5 lower bits of the address are used by the hardware. and by 6892 * the driver. See comments in hpsa.h for more info. 6893 */ 6894 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 6895 h = kzalloc(sizeof(*h), GFP_KERNEL); 6896 if (!h) 6897 return -ENOMEM; 6898 6899 h->pdev = pdev; 6900 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 6901 INIT_LIST_HEAD(&h->cmpQ); 6902 INIT_LIST_HEAD(&h->reqQ); 6903 INIT_LIST_HEAD(&h->offline_device_list); 6904 spin_lock_init(&h->lock); 6905 spin_lock_init(&h->offline_device_lock); 6906 spin_lock_init(&h->scan_lock); 6907 spin_lock_init(&h->passthru_count_lock); 6908 6909 /* Allocate and clear per-cpu variable lockup_detected */ 6910 h->lockup_detected = alloc_percpu(u32); 6911 if (!h->lockup_detected) { 6912 rc = -ENOMEM; 6913 goto clean1; 6914 } 6915 set_lockup_detected_for_all_cpus(h, 0); 6916 6917 rc = hpsa_pci_init(h); 6918 if (rc != 0) 6919 goto clean1; 6920 6921 sprintf(h->devname, HPSA "%d", number_of_controllers); 6922 h->ctlr = number_of_controllers; 6923 number_of_controllers++; 6924 6925 /* configure PCI DMA stuff */ 6926 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 6927 if (rc == 0) { 6928 dac = 1; 6929 } else { 6930 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 6931 if (rc == 0) { 6932 dac = 0; 6933 } else { 6934 dev_err(&pdev->dev, "no suitable DMA available\n"); 6935 goto clean1; 6936 } 6937 } 6938 6939 /* make sure the board interrupts are off */ 6940 h->access.set_intr_mask(h, HPSA_INTR_OFF); 6941 6942 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 6943 goto clean2; 6944 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 6945 h->devname, pdev->device, 6946 h->intr[h->intr_mode], dac ? "" : " not"); 6947 if (hpsa_allocate_cmd_pool(h)) 6948 goto clean4; 6949 if (hpsa_allocate_sg_chain_blocks(h)) 6950 goto clean4; 6951 init_waitqueue_head(&h->scan_wait_queue); 6952 h->scan_finished = 1; /* no scan currently in progress */ 6953 6954 pci_set_drvdata(pdev, h); 6955 h->ndevices = 0; 6956 h->hba_mode_enabled = 0; 6957 h->scsi_host = NULL; 6958 spin_lock_init(&h->devlock); 6959 hpsa_put_ctlr_into_performant_mode(h); 6960 6961 /* At this point, the controller is ready to take commands. 6962 * Now, if reset_devices and the hard reset didn't work, try 6963 * the soft reset and see if that works. 6964 */ 6965 if (try_soft_reset) { 6966 6967 /* This is kind of gross. We may or may not get a completion 6968 * from the soft reset command, and if we do, then the value 6969 * from the fifo may or may not be valid. So, we wait 10 secs 6970 * after the reset throwing away any completions we get during 6971 * that time. Unregister the interrupt handler and register 6972 * fake ones to scoop up any residual completions. 6973 */ 6974 spin_lock_irqsave(&h->lock, flags); 6975 h->access.set_intr_mask(h, HPSA_INTR_OFF); 6976 spin_unlock_irqrestore(&h->lock, flags); 6977 free_irqs(h); 6978 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 6979 hpsa_intx_discard_completions); 6980 if (rc) { 6981 dev_warn(&h->pdev->dev, "Failed to request_irq after " 6982 "soft reset.\n"); 6983 goto clean4; 6984 } 6985 6986 rc = hpsa_kdump_soft_reset(h); 6987 if (rc) 6988 /* Neither hard nor soft reset worked, we're hosed. */ 6989 goto clean4; 6990 6991 dev_info(&h->pdev->dev, "Board READY.\n"); 6992 dev_info(&h->pdev->dev, 6993 "Waiting for stale completions to drain.\n"); 6994 h->access.set_intr_mask(h, HPSA_INTR_ON); 6995 msleep(10000); 6996 h->access.set_intr_mask(h, HPSA_INTR_OFF); 6997 6998 rc = controller_reset_failed(h->cfgtable); 6999 if (rc) 7000 dev_info(&h->pdev->dev, 7001 "Soft reset appears to have failed.\n"); 7002 7003 /* since the controller's reset, we have to go back and re-init 7004 * everything. Easiest to just forget what we've done and do it 7005 * all over again. 7006 */ 7007 hpsa_undo_allocations_after_kdump_soft_reset(h); 7008 try_soft_reset = 0; 7009 if (rc) 7010 /* don't go to clean4, we already unallocated */ 7011 return -ENODEV; 7012 7013 goto reinit_after_soft_reset; 7014 } 7015 7016 /* Enable Accelerated IO path at driver layer */ 7017 h->acciopath_status = 1; 7018 7019 h->drv_req_rescan = 0; 7020 7021 /* Turn the interrupts on so we can service requests */ 7022 h->access.set_intr_mask(h, HPSA_INTR_ON); 7023 7024 hpsa_hba_inquiry(h); 7025 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 7026 7027 /* Monitor the controller for firmware lockups */ 7028 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 7029 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 7030 schedule_delayed_work(&h->monitor_ctlr_work, 7031 h->heartbeat_sample_interval); 7032 return 0; 7033 7034 clean4: 7035 hpsa_free_sg_chain_blocks(h); 7036 hpsa_free_cmd_pool(h); 7037 free_irqs(h); 7038 clean2: 7039 clean1: 7040 if (h->lockup_detected) 7041 free_percpu(h->lockup_detected); 7042 kfree(h); 7043 return rc; 7044 } 7045 7046 static void hpsa_flush_cache(struct ctlr_info *h) 7047 { 7048 char *flush_buf; 7049 struct CommandList *c; 7050 7051 /* Don't bother trying to flush the cache if locked up */ 7052 if (unlikely(lockup_detected(h))) 7053 return; 7054 flush_buf = kzalloc(4, GFP_KERNEL); 7055 if (!flush_buf) 7056 return; 7057 7058 c = cmd_special_alloc(h); 7059 if (!c) { 7060 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 7061 goto out_of_memory; 7062 } 7063 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 7064 RAID_CTLR_LUNID, TYPE_CMD)) { 7065 goto out; 7066 } 7067 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 7068 if (c->err_info->CommandStatus != 0) 7069 out: 7070 dev_warn(&h->pdev->dev, 7071 "error flushing cache on controller\n"); 7072 cmd_special_free(h, c); 7073 out_of_memory: 7074 kfree(flush_buf); 7075 } 7076 7077 static void hpsa_shutdown(struct pci_dev *pdev) 7078 { 7079 struct ctlr_info *h; 7080 7081 h = pci_get_drvdata(pdev); 7082 /* Turn board interrupts off and send the flush cache command 7083 * sendcmd will turn off interrupt, and send the flush... 7084 * To write all data in the battery backed cache to disks 7085 */ 7086 hpsa_flush_cache(h); 7087 h->access.set_intr_mask(h, HPSA_INTR_OFF); 7088 hpsa_free_irqs_and_disable_msix(h); 7089 } 7090 7091 static void hpsa_free_device_info(struct ctlr_info *h) 7092 { 7093 int i; 7094 7095 for (i = 0; i < h->ndevices; i++) 7096 kfree(h->dev[i]); 7097 } 7098 7099 static void hpsa_remove_one(struct pci_dev *pdev) 7100 { 7101 struct ctlr_info *h; 7102 unsigned long flags; 7103 7104 if (pci_get_drvdata(pdev) == NULL) { 7105 dev_err(&pdev->dev, "unable to remove device\n"); 7106 return; 7107 } 7108 h = pci_get_drvdata(pdev); 7109 7110 /* Get rid of any controller monitoring work items */ 7111 spin_lock_irqsave(&h->lock, flags); 7112 h->remove_in_progress = 1; 7113 cancel_delayed_work(&h->monitor_ctlr_work); 7114 spin_unlock_irqrestore(&h->lock, flags); 7115 7116 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 7117 hpsa_shutdown(pdev); 7118 iounmap(h->vaddr); 7119 iounmap(h->transtable); 7120 iounmap(h->cfgtable); 7121 hpsa_free_device_info(h); 7122 hpsa_free_sg_chain_blocks(h); 7123 pci_free_consistent(h->pdev, 7124 h->nr_cmds * sizeof(struct CommandList), 7125 h->cmd_pool, h->cmd_pool_dhandle); 7126 pci_free_consistent(h->pdev, 7127 h->nr_cmds * sizeof(struct ErrorInfo), 7128 h->errinfo_pool, h->errinfo_pool_dhandle); 7129 hpsa_free_reply_queues(h); 7130 kfree(h->cmd_pool_bits); 7131 kfree(h->blockFetchTable); 7132 kfree(h->ioaccel1_blockFetchTable); 7133 kfree(h->ioaccel2_blockFetchTable); 7134 kfree(h->hba_inquiry_data); 7135 pci_disable_device(pdev); 7136 pci_release_regions(pdev); 7137 free_percpu(h->lockup_detected); 7138 kfree(h); 7139 } 7140 7141 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 7142 __attribute__((unused)) pm_message_t state) 7143 { 7144 return -ENOSYS; 7145 } 7146 7147 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 7148 { 7149 return -ENOSYS; 7150 } 7151 7152 static struct pci_driver hpsa_pci_driver = { 7153 .name = HPSA, 7154 .probe = hpsa_init_one, 7155 .remove = hpsa_remove_one, 7156 .id_table = hpsa_pci_device_id, /* id_table */ 7157 .shutdown = hpsa_shutdown, 7158 .suspend = hpsa_suspend, 7159 .resume = hpsa_resume, 7160 }; 7161 7162 /* Fill in bucket_map[], given nsgs (the max number of 7163 * scatter gather elements supported) and bucket[], 7164 * which is an array of 8 integers. The bucket[] array 7165 * contains 8 different DMA transfer sizes (in 16 7166 * byte increments) which the controller uses to fetch 7167 * commands. This function fills in bucket_map[], which 7168 * maps a given number of scatter gather elements to one of 7169 * the 8 DMA transfer sizes. The point of it is to allow the 7170 * controller to only do as much DMA as needed to fetch the 7171 * command, with the DMA transfer size encoded in the lower 7172 * bits of the command address. 7173 */ 7174 static void calc_bucket_map(int bucket[], int num_buckets, 7175 int nsgs, int min_blocks, int *bucket_map) 7176 { 7177 int i, j, b, size; 7178 7179 /* Note, bucket_map must have nsgs+1 entries. */ 7180 for (i = 0; i <= nsgs; i++) { 7181 /* Compute size of a command with i SG entries */ 7182 size = i + min_blocks; 7183 b = num_buckets; /* Assume the biggest bucket */ 7184 /* Find the bucket that is just big enough */ 7185 for (j = 0; j < num_buckets; j++) { 7186 if (bucket[j] >= size) { 7187 b = j; 7188 break; 7189 } 7190 } 7191 /* for a command with i SG entries, use bucket b. */ 7192 bucket_map[i] = b; 7193 } 7194 } 7195 7196 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 7197 { 7198 int i; 7199 unsigned long register_value; 7200 unsigned long transMethod = CFGTBL_Trans_Performant | 7201 (trans_support & CFGTBL_Trans_use_short_tags) | 7202 CFGTBL_Trans_enable_directed_msix | 7203 (trans_support & (CFGTBL_Trans_io_accel1 | 7204 CFGTBL_Trans_io_accel2)); 7205 struct access_method access = SA5_performant_access; 7206 7207 /* This is a bit complicated. There are 8 registers on 7208 * the controller which we write to to tell it 8 different 7209 * sizes of commands which there may be. It's a way of 7210 * reducing the DMA done to fetch each command. Encoded into 7211 * each command's tag are 3 bits which communicate to the controller 7212 * which of the eight sizes that command fits within. The size of 7213 * each command depends on how many scatter gather entries there are. 7214 * Each SG entry requires 16 bytes. The eight registers are programmed 7215 * with the number of 16-byte blocks a command of that size requires. 7216 * The smallest command possible requires 5 such 16 byte blocks. 7217 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 7218 * blocks. Note, this only extends to the SG entries contained 7219 * within the command block, and does not extend to chained blocks 7220 * of SG elements. bft[] contains the eight values we write to 7221 * the registers. They are not evenly distributed, but have more 7222 * sizes for small commands, and fewer sizes for larger commands. 7223 */ 7224 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 7225 #define MIN_IOACCEL2_BFT_ENTRY 5 7226 #define HPSA_IOACCEL2_HEADER_SZ 4 7227 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 7228 13, 14, 15, 16, 17, 18, 19, 7229 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 7230 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 7231 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 7232 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 7233 16 * MIN_IOACCEL2_BFT_ENTRY); 7234 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 7235 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 7236 /* 5 = 1 s/g entry or 4k 7237 * 6 = 2 s/g entry or 8k 7238 * 8 = 4 s/g entry or 16k 7239 * 10 = 6 s/g entry or 24k 7240 */ 7241 7242 /* If the controller supports either ioaccel method then 7243 * we can also use the RAID stack submit path that does not 7244 * perform the superfluous readl() after each command submission. 7245 */ 7246 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 7247 access = SA5_performant_access_no_read; 7248 7249 /* Controller spec: zero out this buffer. */ 7250 for (i = 0; i < h->nreply_queues; i++) 7251 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 7252 7253 bft[7] = SG_ENTRIES_IN_CMD + 4; 7254 calc_bucket_map(bft, ARRAY_SIZE(bft), 7255 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 7256 for (i = 0; i < 8; i++) 7257 writel(bft[i], &h->transtable->BlockFetch[i]); 7258 7259 /* size of controller ring buffer */ 7260 writel(h->max_commands, &h->transtable->RepQSize); 7261 writel(h->nreply_queues, &h->transtable->RepQCount); 7262 writel(0, &h->transtable->RepQCtrAddrLow32); 7263 writel(0, &h->transtable->RepQCtrAddrHigh32); 7264 7265 for (i = 0; i < h->nreply_queues; i++) { 7266 writel(0, &h->transtable->RepQAddr[i].upper); 7267 writel(h->reply_queue[i].busaddr, 7268 &h->transtable->RepQAddr[i].lower); 7269 } 7270 7271 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7272 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 7273 /* 7274 * enable outbound interrupt coalescing in accelerator mode; 7275 */ 7276 if (trans_support & CFGTBL_Trans_io_accel1) { 7277 access = SA5_ioaccel_mode1_access; 7278 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 7279 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 7280 } else { 7281 if (trans_support & CFGTBL_Trans_io_accel2) { 7282 access = SA5_ioaccel_mode2_access; 7283 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 7284 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 7285 } 7286 } 7287 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7288 hpsa_wait_for_mode_change_ack(h); 7289 register_value = readl(&(h->cfgtable->TransportActive)); 7290 if (!(register_value & CFGTBL_Trans_Performant)) { 7291 dev_warn(&h->pdev->dev, "unable to get board into" 7292 " performant mode\n"); 7293 return; 7294 } 7295 /* Change the access methods to the performant access methods */ 7296 h->access = access; 7297 h->transMethod = transMethod; 7298 7299 if (!((trans_support & CFGTBL_Trans_io_accel1) || 7300 (trans_support & CFGTBL_Trans_io_accel2))) 7301 return; 7302 7303 if (trans_support & CFGTBL_Trans_io_accel1) { 7304 /* Set up I/O accelerator mode */ 7305 for (i = 0; i < h->nreply_queues; i++) { 7306 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 7307 h->reply_queue[i].current_entry = 7308 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 7309 } 7310 bft[7] = h->ioaccel_maxsg + 8; 7311 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 7312 h->ioaccel1_blockFetchTable); 7313 7314 /* initialize all reply queue entries to unused */ 7315 for (i = 0; i < h->nreply_queues; i++) 7316 memset(h->reply_queue[i].head, 7317 (u8) IOACCEL_MODE1_REPLY_UNUSED, 7318 h->reply_queue_size); 7319 7320 /* set all the constant fields in the accelerator command 7321 * frames once at init time to save CPU cycles later. 7322 */ 7323 for (i = 0; i < h->nr_cmds; i++) { 7324 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 7325 7326 cp->function = IOACCEL1_FUNCTION_SCSIIO; 7327 cp->err_info = (u32) (h->errinfo_pool_dhandle + 7328 (i * sizeof(struct ErrorInfo))); 7329 cp->err_info_len = sizeof(struct ErrorInfo); 7330 cp->sgl_offset = IOACCEL1_SGLOFFSET; 7331 cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT; 7332 cp->timeout_sec = 0; 7333 cp->ReplyQueue = 0; 7334 cp->tag = 7335 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT) | 7336 DIRECT_LOOKUP_BIT); 7337 cp->host_addr = 7338 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 7339 (i * sizeof(struct io_accel1_cmd))); 7340 } 7341 } else if (trans_support & CFGTBL_Trans_io_accel2) { 7342 u64 cfg_offset, cfg_base_addr_index; 7343 u32 bft2_offset, cfg_base_addr; 7344 int rc; 7345 7346 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7347 &cfg_base_addr_index, &cfg_offset); 7348 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 7349 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 7350 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 7351 4, h->ioaccel2_blockFetchTable); 7352 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 7353 BUILD_BUG_ON(offsetof(struct CfgTable, 7354 io_accel_request_size_offset) != 0xb8); 7355 h->ioaccel2_bft2_regs = 7356 remap_pci_mem(pci_resource_start(h->pdev, 7357 cfg_base_addr_index) + 7358 cfg_offset + bft2_offset, 7359 ARRAY_SIZE(bft2) * 7360 sizeof(*h->ioaccel2_bft2_regs)); 7361 for (i = 0; i < ARRAY_SIZE(bft2); i++) 7362 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 7363 } 7364 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7365 hpsa_wait_for_mode_change_ack(h); 7366 } 7367 7368 static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h) 7369 { 7370 h->ioaccel_maxsg = 7371 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 7372 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 7373 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 7374 7375 /* Command structures must be aligned on a 128-byte boundary 7376 * because the 7 lower bits of the address are used by the 7377 * hardware. 7378 */ 7379 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 7380 IOACCEL1_COMMANDLIST_ALIGNMENT); 7381 h->ioaccel_cmd_pool = 7382 pci_alloc_consistent(h->pdev, 7383 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 7384 &(h->ioaccel_cmd_pool_dhandle)); 7385 7386 h->ioaccel1_blockFetchTable = 7387 kmalloc(((h->ioaccel_maxsg + 1) * 7388 sizeof(u32)), GFP_KERNEL); 7389 7390 if ((h->ioaccel_cmd_pool == NULL) || 7391 (h->ioaccel1_blockFetchTable == NULL)) 7392 goto clean_up; 7393 7394 memset(h->ioaccel_cmd_pool, 0, 7395 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 7396 return 0; 7397 7398 clean_up: 7399 if (h->ioaccel_cmd_pool) 7400 pci_free_consistent(h->pdev, 7401 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 7402 h->ioaccel_cmd_pool, h->ioaccel_cmd_pool_dhandle); 7403 kfree(h->ioaccel1_blockFetchTable); 7404 return 1; 7405 } 7406 7407 static int ioaccel2_alloc_cmds_and_bft(struct ctlr_info *h) 7408 { 7409 /* Allocate ioaccel2 mode command blocks and block fetch table */ 7410 7411 h->ioaccel_maxsg = 7412 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 7413 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 7414 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 7415 7416 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 7417 IOACCEL2_COMMANDLIST_ALIGNMENT); 7418 h->ioaccel2_cmd_pool = 7419 pci_alloc_consistent(h->pdev, 7420 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 7421 &(h->ioaccel2_cmd_pool_dhandle)); 7422 7423 h->ioaccel2_blockFetchTable = 7424 kmalloc(((h->ioaccel_maxsg + 1) * 7425 sizeof(u32)), GFP_KERNEL); 7426 7427 if ((h->ioaccel2_cmd_pool == NULL) || 7428 (h->ioaccel2_blockFetchTable == NULL)) 7429 goto clean_up; 7430 7431 memset(h->ioaccel2_cmd_pool, 0, 7432 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 7433 return 0; 7434 7435 clean_up: 7436 if (h->ioaccel2_cmd_pool) 7437 pci_free_consistent(h->pdev, 7438 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 7439 h->ioaccel2_cmd_pool, h->ioaccel2_cmd_pool_dhandle); 7440 kfree(h->ioaccel2_blockFetchTable); 7441 return 1; 7442 } 7443 7444 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 7445 { 7446 u32 trans_support; 7447 unsigned long transMethod = CFGTBL_Trans_Performant | 7448 CFGTBL_Trans_use_short_tags; 7449 int i; 7450 7451 if (hpsa_simple_mode) 7452 return; 7453 7454 trans_support = readl(&(h->cfgtable->TransportSupport)); 7455 if (!(trans_support & PERFORMANT_MODE)) 7456 return; 7457 7458 /* Check for I/O accelerator mode support */ 7459 if (trans_support & CFGTBL_Trans_io_accel1) { 7460 transMethod |= CFGTBL_Trans_io_accel1 | 7461 CFGTBL_Trans_enable_directed_msix; 7462 if (hpsa_alloc_ioaccel_cmd_and_bft(h)) 7463 goto clean_up; 7464 } else { 7465 if (trans_support & CFGTBL_Trans_io_accel2) { 7466 transMethod |= CFGTBL_Trans_io_accel2 | 7467 CFGTBL_Trans_enable_directed_msix; 7468 if (ioaccel2_alloc_cmds_and_bft(h)) 7469 goto clean_up; 7470 } 7471 } 7472 7473 h->nreply_queues = h->msix_vector > 0 ? h->msix_vector : 1; 7474 hpsa_get_max_perf_mode_cmds(h); 7475 /* Performant mode ring buffer and supporting data structures */ 7476 h->reply_queue_size = h->max_commands * sizeof(u64); 7477 7478 for (i = 0; i < h->nreply_queues; i++) { 7479 h->reply_queue[i].head = pci_alloc_consistent(h->pdev, 7480 h->reply_queue_size, 7481 &(h->reply_queue[i].busaddr)); 7482 if (!h->reply_queue[i].head) 7483 goto clean_up; 7484 h->reply_queue[i].size = h->max_commands; 7485 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 7486 h->reply_queue[i].current_entry = 0; 7487 } 7488 7489 /* Need a block fetch table for performant mode */ 7490 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 7491 sizeof(u32)), GFP_KERNEL); 7492 if (!h->blockFetchTable) 7493 goto clean_up; 7494 7495 hpsa_enter_performant_mode(h, trans_support); 7496 return; 7497 7498 clean_up: 7499 hpsa_free_reply_queues(h); 7500 kfree(h->blockFetchTable); 7501 } 7502 7503 static int is_accelerated_cmd(struct CommandList *c) 7504 { 7505 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 7506 } 7507 7508 static void hpsa_drain_accel_commands(struct ctlr_info *h) 7509 { 7510 struct CommandList *c = NULL; 7511 unsigned long flags; 7512 int accel_cmds_out; 7513 7514 do { /* wait for all outstanding commands to drain out */ 7515 accel_cmds_out = 0; 7516 spin_lock_irqsave(&h->lock, flags); 7517 list_for_each_entry(c, &h->cmpQ, list) 7518 accel_cmds_out += is_accelerated_cmd(c); 7519 list_for_each_entry(c, &h->reqQ, list) 7520 accel_cmds_out += is_accelerated_cmd(c); 7521 spin_unlock_irqrestore(&h->lock, flags); 7522 if (accel_cmds_out <= 0) 7523 break; 7524 msleep(100); 7525 } while (1); 7526 } 7527 7528 /* 7529 * This is it. Register the PCI driver information for the cards we control 7530 * the OS will call our registered routines when it finds one of our cards. 7531 */ 7532 static int __init hpsa_init(void) 7533 { 7534 return pci_register_driver(&hpsa_pci_driver); 7535 } 7536 7537 static void __exit hpsa_cleanup(void) 7538 { 7539 pci_unregister_driver(&hpsa_pci_driver); 7540 } 7541 7542 static void __attribute__((unused)) verify_offsets(void) 7543 { 7544 #define VERIFY_OFFSET(member, offset) \ 7545 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 7546 7547 VERIFY_OFFSET(structure_size, 0); 7548 VERIFY_OFFSET(volume_blk_size, 4); 7549 VERIFY_OFFSET(volume_blk_cnt, 8); 7550 VERIFY_OFFSET(phys_blk_shift, 16); 7551 VERIFY_OFFSET(parity_rotation_shift, 17); 7552 VERIFY_OFFSET(strip_size, 18); 7553 VERIFY_OFFSET(disk_starting_blk, 20); 7554 VERIFY_OFFSET(disk_blk_cnt, 28); 7555 VERIFY_OFFSET(data_disks_per_row, 36); 7556 VERIFY_OFFSET(metadata_disks_per_row, 38); 7557 VERIFY_OFFSET(row_cnt, 40); 7558 VERIFY_OFFSET(layout_map_count, 42); 7559 VERIFY_OFFSET(flags, 44); 7560 VERIFY_OFFSET(dekindex, 46); 7561 /* VERIFY_OFFSET(reserved, 48 */ 7562 VERIFY_OFFSET(data, 64); 7563 7564 #undef VERIFY_OFFSET 7565 7566 #define VERIFY_OFFSET(member, offset) \ 7567 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 7568 7569 VERIFY_OFFSET(IU_type, 0); 7570 VERIFY_OFFSET(direction, 1); 7571 VERIFY_OFFSET(reply_queue, 2); 7572 /* VERIFY_OFFSET(reserved1, 3); */ 7573 VERIFY_OFFSET(scsi_nexus, 4); 7574 VERIFY_OFFSET(Tag, 8); 7575 VERIFY_OFFSET(cdb, 16); 7576 VERIFY_OFFSET(cciss_lun, 32); 7577 VERIFY_OFFSET(data_len, 40); 7578 VERIFY_OFFSET(cmd_priority_task_attr, 44); 7579 VERIFY_OFFSET(sg_count, 45); 7580 /* VERIFY_OFFSET(reserved3 */ 7581 VERIFY_OFFSET(err_ptr, 48); 7582 VERIFY_OFFSET(err_len, 56); 7583 /* VERIFY_OFFSET(reserved4 */ 7584 VERIFY_OFFSET(sg, 64); 7585 7586 #undef VERIFY_OFFSET 7587 7588 #define VERIFY_OFFSET(member, offset) \ 7589 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 7590 7591 VERIFY_OFFSET(dev_handle, 0x00); 7592 VERIFY_OFFSET(reserved1, 0x02); 7593 VERIFY_OFFSET(function, 0x03); 7594 VERIFY_OFFSET(reserved2, 0x04); 7595 VERIFY_OFFSET(err_info, 0x0C); 7596 VERIFY_OFFSET(reserved3, 0x10); 7597 VERIFY_OFFSET(err_info_len, 0x12); 7598 VERIFY_OFFSET(reserved4, 0x13); 7599 VERIFY_OFFSET(sgl_offset, 0x14); 7600 VERIFY_OFFSET(reserved5, 0x15); 7601 VERIFY_OFFSET(transfer_len, 0x1C); 7602 VERIFY_OFFSET(reserved6, 0x20); 7603 VERIFY_OFFSET(io_flags, 0x24); 7604 VERIFY_OFFSET(reserved7, 0x26); 7605 VERIFY_OFFSET(LUN, 0x34); 7606 VERIFY_OFFSET(control, 0x3C); 7607 VERIFY_OFFSET(CDB, 0x40); 7608 VERIFY_OFFSET(reserved8, 0x50); 7609 VERIFY_OFFSET(host_context_flags, 0x60); 7610 VERIFY_OFFSET(timeout_sec, 0x62); 7611 VERIFY_OFFSET(ReplyQueue, 0x64); 7612 VERIFY_OFFSET(reserved9, 0x65); 7613 VERIFY_OFFSET(tag, 0x68); 7614 VERIFY_OFFSET(host_addr, 0x70); 7615 VERIFY_OFFSET(CISS_LUN, 0x78); 7616 VERIFY_OFFSET(SG, 0x78 + 8); 7617 #undef VERIFY_OFFSET 7618 } 7619 7620 module_init(hpsa_init); 7621 module_exit(hpsa_cleanup); 7622