xref: /openbmc/linux/drivers/scsi/hpsa.c (revision 1de9e46c)
1 /*
2  *    Disk Array driver for HP Smart Array SAS controllers
3  *    Copyright 2000, 2009 Hewlett-Packard Development Company, L.P.
4  *
5  *    This program is free software; you can redistribute it and/or modify
6  *    it under the terms of the GNU General Public License as published by
7  *    the Free Software Foundation; version 2 of the License.
8  *
9  *    This program is distributed in the hope that it will be useful,
10  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
11  *    MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
12  *    NON INFRINGEMENT.  See the GNU General Public License for more details.
13  *
14  *    You should have received a copy of the GNU General Public License
15  *    along with this program; if not, write to the Free Software
16  *    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17  *
18  *    Questions/Comments/Bugfixes to iss_storagedev@hp.com
19  *
20  */
21 
22 #include <linux/module.h>
23 #include <linux/interrupt.h>
24 #include <linux/types.h>
25 #include <linux/pci.h>
26 #include <linux/pci-aspm.h>
27 #include <linux/kernel.h>
28 #include <linux/slab.h>
29 #include <linux/delay.h>
30 #include <linux/fs.h>
31 #include <linux/timer.h>
32 #include <linux/seq_file.h>
33 #include <linux/init.h>
34 #include <linux/spinlock.h>
35 #include <linux/compat.h>
36 #include <linux/blktrace_api.h>
37 #include <linux/uaccess.h>
38 #include <linux/io.h>
39 #include <linux/dma-mapping.h>
40 #include <linux/completion.h>
41 #include <linux/moduleparam.h>
42 #include <scsi/scsi.h>
43 #include <scsi/scsi_cmnd.h>
44 #include <scsi/scsi_device.h>
45 #include <scsi/scsi_host.h>
46 #include <scsi/scsi_tcq.h>
47 #include <linux/cciss_ioctl.h>
48 #include <linux/string.h>
49 #include <linux/bitmap.h>
50 #include <linux/atomic.h>
51 #include <linux/kthread.h>
52 #include <linux/jiffies.h>
53 #include "hpsa_cmd.h"
54 #include "hpsa.h"
55 
56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */
57 #define HPSA_DRIVER_VERSION "2.0.2-1"
58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")"
59 #define HPSA "hpsa"
60 
61 /* How long to wait (in milliseconds) for board to go into simple mode */
62 #define MAX_CONFIG_WAIT 30000
63 #define MAX_IOCTL_CONFIG_WAIT 1000
64 
65 /*define how many times we will try a command because of bus resets */
66 #define MAX_CMD_RETRIES 3
67 
68 /* Embedded module documentation macros - see modules.h */
69 MODULE_AUTHOR("Hewlett-Packard Company");
70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \
71 	HPSA_DRIVER_VERSION);
72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
73 MODULE_VERSION(HPSA_DRIVER_VERSION);
74 MODULE_LICENSE("GPL");
75 
76 static int hpsa_allow_any;
77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR);
78 MODULE_PARM_DESC(hpsa_allow_any,
79 		"Allow hpsa driver to access unknown HP Smart Array hardware");
80 static int hpsa_simple_mode;
81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR);
82 MODULE_PARM_DESC(hpsa_simple_mode,
83 	"Use 'simple mode' rather than 'performant mode'");
84 
85 /* define the PCI info for the cards we can control */
86 static const struct pci_device_id hpsa_pci_device_id[] = {
87 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3241},
88 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3243},
89 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3245},
90 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3247},
91 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3249},
92 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324a},
93 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x324b},
94 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSE,     0x103C, 0x3233},
95 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3350},
96 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3351},
97 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3352},
98 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3353},
99 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3354},
100 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3355},
101 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x3356},
102 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1920},
103 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1921},
104 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1922},
105 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1923},
106 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1924},
107 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1925},
108 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1926},
109 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSH,     0x103C, 0x1928},
110 	{PCI_VENDOR_ID_HP,     PCI_DEVICE_ID_HP_CISSF,     0x103C, 0x334d},
111 	{PCI_VENDOR_ID_HP,     PCI_ANY_ID,	PCI_ANY_ID, PCI_ANY_ID,
112 		PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
113 	{0,}
114 };
115 
116 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id);
117 
118 /*  board_id = Subsystem Device ID & Vendor ID
119  *  product = Marketing Name for the board
120  *  access = Address of the struct of function pointers
121  */
122 static struct board_type products[] = {
123 	{0x3241103C, "Smart Array P212", &SA5_access},
124 	{0x3243103C, "Smart Array P410", &SA5_access},
125 	{0x3245103C, "Smart Array P410i", &SA5_access},
126 	{0x3247103C, "Smart Array P411", &SA5_access},
127 	{0x3249103C, "Smart Array P812", &SA5_access},
128 	{0x324a103C, "Smart Array P712m", &SA5_access},
129 	{0x324b103C, "Smart Array P711m", &SA5_access},
130 	{0x3350103C, "Smart Array P222", &SA5_access},
131 	{0x3351103C, "Smart Array P420", &SA5_access},
132 	{0x3352103C, "Smart Array P421", &SA5_access},
133 	{0x3353103C, "Smart Array P822", &SA5_access},
134 	{0x3354103C, "Smart Array P420i", &SA5_access},
135 	{0x3355103C, "Smart Array P220i", &SA5_access},
136 	{0x3356103C, "Smart Array P721m", &SA5_access},
137 	{0x1920103C, "Smart Array", &SA5_access},
138 	{0x1921103C, "Smart Array", &SA5_access},
139 	{0x1922103C, "Smart Array", &SA5_access},
140 	{0x1923103C, "Smart Array", &SA5_access},
141 	{0x1924103C, "Smart Array", &SA5_access},
142 	{0x1925103C, "Smart Array", &SA5_access},
143 	{0x1926103C, "Smart Array", &SA5_access},
144 	{0x1928103C, "Smart Array", &SA5_access},
145 	{0x334d103C, "Smart Array P822se", &SA5_access},
146 	{0xFFFF103C, "Unknown Smart Array", &SA5_access},
147 };
148 
149 static int number_of_controllers;
150 
151 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list);
152 static spinlock_t lockup_detector_lock;
153 static struct task_struct *hpsa_lockup_detector;
154 
155 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id);
156 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id);
157 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg);
158 static void start_io(struct ctlr_info *h);
159 
160 #ifdef CONFIG_COMPAT
161 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg);
162 #endif
163 
164 static void cmd_free(struct ctlr_info *h, struct CommandList *c);
165 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c);
166 static struct CommandList *cmd_alloc(struct ctlr_info *h);
167 static struct CommandList *cmd_special_alloc(struct ctlr_info *h);
168 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
169 	void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
170 	int cmd_type);
171 
172 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
173 static void hpsa_scan_start(struct Scsi_Host *);
174 static int hpsa_scan_finished(struct Scsi_Host *sh,
175 	unsigned long elapsed_time);
176 static int hpsa_change_queue_depth(struct scsi_device *sdev,
177 	int qdepth, int reason);
178 
179 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd);
180 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd);
181 static int hpsa_slave_alloc(struct scsi_device *sdev);
182 static void hpsa_slave_destroy(struct scsi_device *sdev);
183 
184 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno);
185 static int check_for_unit_attention(struct ctlr_info *h,
186 	struct CommandList *c);
187 static void check_ioctl_unit_attention(struct ctlr_info *h,
188 	struct CommandList *c);
189 /* performant mode helper functions */
190 static void calc_bucket_map(int *bucket, int num_buckets,
191 	int nsgs, int *bucket_map);
192 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h);
193 static inline u32 next_command(struct ctlr_info *h, u8 q);
194 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
195 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
196 			       u64 *cfg_offset);
197 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
198 				    unsigned long *memory_bar);
199 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id);
200 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
201 				     int wait_for_ready);
202 static inline void finish_cmd(struct CommandList *c);
203 #define BOARD_NOT_READY 0
204 #define BOARD_READY 1
205 
206 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev)
207 {
208 	unsigned long *priv = shost_priv(sdev->host);
209 	return (struct ctlr_info *) *priv;
210 }
211 
212 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh)
213 {
214 	unsigned long *priv = shost_priv(sh);
215 	return (struct ctlr_info *) *priv;
216 }
217 
218 static int check_for_unit_attention(struct ctlr_info *h,
219 	struct CommandList *c)
220 {
221 	if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
222 		return 0;
223 
224 	switch (c->err_info->SenseInfo[12]) {
225 	case STATE_CHANGED:
226 		dev_warn(&h->pdev->dev, HPSA "%d: a state change "
227 			"detected, command retried\n", h->ctlr);
228 		break;
229 	case LUN_FAILED:
230 		dev_warn(&h->pdev->dev, HPSA "%d: LUN failure "
231 			"detected, action required\n", h->ctlr);
232 		break;
233 	case REPORT_LUNS_CHANGED:
234 		dev_warn(&h->pdev->dev, HPSA "%d: report LUN data "
235 			"changed, action required\n", h->ctlr);
236 	/*
237 	 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external
238 	 * target (array) devices.
239 	 */
240 		break;
241 	case POWER_OR_RESET:
242 		dev_warn(&h->pdev->dev, HPSA "%d: a power on "
243 			"or device reset detected\n", h->ctlr);
244 		break;
245 	case UNIT_ATTENTION_CLEARED:
246 		dev_warn(&h->pdev->dev, HPSA "%d: unit attention "
247 		    "cleared by another initiator\n", h->ctlr);
248 		break;
249 	default:
250 		dev_warn(&h->pdev->dev, HPSA "%d: unknown "
251 			"unit attention detected\n", h->ctlr);
252 		break;
253 	}
254 	return 1;
255 }
256 
257 static int check_for_busy(struct ctlr_info *h, struct CommandList *c)
258 {
259 	if (c->err_info->CommandStatus != CMD_TARGET_STATUS ||
260 		(c->err_info->ScsiStatus != SAM_STAT_BUSY &&
261 		 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL))
262 		return 0;
263 	dev_warn(&h->pdev->dev, HPSA "device busy");
264 	return 1;
265 }
266 
267 static ssize_t host_store_rescan(struct device *dev,
268 				 struct device_attribute *attr,
269 				 const char *buf, size_t count)
270 {
271 	struct ctlr_info *h;
272 	struct Scsi_Host *shost = class_to_shost(dev);
273 	h = shost_to_hba(shost);
274 	hpsa_scan_start(h->scsi_host);
275 	return count;
276 }
277 
278 static ssize_t host_show_firmware_revision(struct device *dev,
279 	     struct device_attribute *attr, char *buf)
280 {
281 	struct ctlr_info *h;
282 	struct Scsi_Host *shost = class_to_shost(dev);
283 	unsigned char *fwrev;
284 
285 	h = shost_to_hba(shost);
286 	if (!h->hba_inquiry_data)
287 		return 0;
288 	fwrev = &h->hba_inquiry_data[32];
289 	return snprintf(buf, 20, "%c%c%c%c\n",
290 		fwrev[0], fwrev[1], fwrev[2], fwrev[3]);
291 }
292 
293 static ssize_t host_show_commands_outstanding(struct device *dev,
294 	     struct device_attribute *attr, char *buf)
295 {
296 	struct Scsi_Host *shost = class_to_shost(dev);
297 	struct ctlr_info *h = shost_to_hba(shost);
298 
299 	return snprintf(buf, 20, "%d\n", h->commands_outstanding);
300 }
301 
302 static ssize_t host_show_transport_mode(struct device *dev,
303 	struct device_attribute *attr, char *buf)
304 {
305 	struct ctlr_info *h;
306 	struct Scsi_Host *shost = class_to_shost(dev);
307 
308 	h = shost_to_hba(shost);
309 	return snprintf(buf, 20, "%s\n",
310 		h->transMethod & CFGTBL_Trans_Performant ?
311 			"performant" : "simple");
312 }
313 
314 /* List of controllers which cannot be hard reset on kexec with reset_devices */
315 static u32 unresettable_controller[] = {
316 	0x324a103C, /* Smart Array P712m */
317 	0x324b103C, /* SmartArray P711m */
318 	0x3223103C, /* Smart Array P800 */
319 	0x3234103C, /* Smart Array P400 */
320 	0x3235103C, /* Smart Array P400i */
321 	0x3211103C, /* Smart Array E200i */
322 	0x3212103C, /* Smart Array E200 */
323 	0x3213103C, /* Smart Array E200i */
324 	0x3214103C, /* Smart Array E200i */
325 	0x3215103C, /* Smart Array E200i */
326 	0x3237103C, /* Smart Array E500 */
327 	0x323D103C, /* Smart Array P700m */
328 	0x40800E11, /* Smart Array 5i */
329 	0x409C0E11, /* Smart Array 6400 */
330 	0x409D0E11, /* Smart Array 6400 EM */
331 	0x40700E11, /* Smart Array 5300 */
332 	0x40820E11, /* Smart Array 532 */
333 	0x40830E11, /* Smart Array 5312 */
334 	0x409A0E11, /* Smart Array 641 */
335 	0x409B0E11, /* Smart Array 642 */
336 	0x40910E11, /* Smart Array 6i */
337 };
338 
339 /* List of controllers which cannot even be soft reset */
340 static u32 soft_unresettable_controller[] = {
341 	0x40800E11, /* Smart Array 5i */
342 	0x40700E11, /* Smart Array 5300 */
343 	0x40820E11, /* Smart Array 532 */
344 	0x40830E11, /* Smart Array 5312 */
345 	0x409A0E11, /* Smart Array 641 */
346 	0x409B0E11, /* Smart Array 642 */
347 	0x40910E11, /* Smart Array 6i */
348 	/* Exclude 640x boards.  These are two pci devices in one slot
349 	 * which share a battery backed cache module.  One controls the
350 	 * cache, the other accesses the cache through the one that controls
351 	 * it.  If we reset the one controlling the cache, the other will
352 	 * likely not be happy.  Just forbid resetting this conjoined mess.
353 	 * The 640x isn't really supported by hpsa anyway.
354 	 */
355 	0x409C0E11, /* Smart Array 6400 */
356 	0x409D0E11, /* Smart Array 6400 EM */
357 };
358 
359 static int ctlr_is_hard_resettable(u32 board_id)
360 {
361 	int i;
362 
363 	for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
364 		if (unresettable_controller[i] == board_id)
365 			return 0;
366 	return 1;
367 }
368 
369 static int ctlr_is_soft_resettable(u32 board_id)
370 {
371 	int i;
372 
373 	for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
374 		if (soft_unresettable_controller[i] == board_id)
375 			return 0;
376 	return 1;
377 }
378 
379 static int ctlr_is_resettable(u32 board_id)
380 {
381 	return ctlr_is_hard_resettable(board_id) ||
382 		ctlr_is_soft_resettable(board_id);
383 }
384 
385 static ssize_t host_show_resettable(struct device *dev,
386 	struct device_attribute *attr, char *buf)
387 {
388 	struct ctlr_info *h;
389 	struct Scsi_Host *shost = class_to_shost(dev);
390 
391 	h = shost_to_hba(shost);
392 	return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
393 }
394 
395 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[])
396 {
397 	return (scsi3addr[3] & 0xC0) == 0x40;
398 }
399 
400 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
401 	"1(ADM)", "UNKNOWN"
402 };
403 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1)
404 
405 static ssize_t raid_level_show(struct device *dev,
406 	     struct device_attribute *attr, char *buf)
407 {
408 	ssize_t l = 0;
409 	unsigned char rlevel;
410 	struct ctlr_info *h;
411 	struct scsi_device *sdev;
412 	struct hpsa_scsi_dev_t *hdev;
413 	unsigned long flags;
414 
415 	sdev = to_scsi_device(dev);
416 	h = sdev_to_hba(sdev);
417 	spin_lock_irqsave(&h->lock, flags);
418 	hdev = sdev->hostdata;
419 	if (!hdev) {
420 		spin_unlock_irqrestore(&h->lock, flags);
421 		return -ENODEV;
422 	}
423 
424 	/* Is this even a logical drive? */
425 	if (!is_logical_dev_addr_mode(hdev->scsi3addr)) {
426 		spin_unlock_irqrestore(&h->lock, flags);
427 		l = snprintf(buf, PAGE_SIZE, "N/A\n");
428 		return l;
429 	}
430 
431 	rlevel = hdev->raid_level;
432 	spin_unlock_irqrestore(&h->lock, flags);
433 	if (rlevel > RAID_UNKNOWN)
434 		rlevel = RAID_UNKNOWN;
435 	l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]);
436 	return l;
437 }
438 
439 static ssize_t lunid_show(struct device *dev,
440 	     struct device_attribute *attr, char *buf)
441 {
442 	struct ctlr_info *h;
443 	struct scsi_device *sdev;
444 	struct hpsa_scsi_dev_t *hdev;
445 	unsigned long flags;
446 	unsigned char lunid[8];
447 
448 	sdev = to_scsi_device(dev);
449 	h = sdev_to_hba(sdev);
450 	spin_lock_irqsave(&h->lock, flags);
451 	hdev = sdev->hostdata;
452 	if (!hdev) {
453 		spin_unlock_irqrestore(&h->lock, flags);
454 		return -ENODEV;
455 	}
456 	memcpy(lunid, hdev->scsi3addr, sizeof(lunid));
457 	spin_unlock_irqrestore(&h->lock, flags);
458 	return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
459 		lunid[0], lunid[1], lunid[2], lunid[3],
460 		lunid[4], lunid[5], lunid[6], lunid[7]);
461 }
462 
463 static ssize_t unique_id_show(struct device *dev,
464 	     struct device_attribute *attr, char *buf)
465 {
466 	struct ctlr_info *h;
467 	struct scsi_device *sdev;
468 	struct hpsa_scsi_dev_t *hdev;
469 	unsigned long flags;
470 	unsigned char sn[16];
471 
472 	sdev = to_scsi_device(dev);
473 	h = sdev_to_hba(sdev);
474 	spin_lock_irqsave(&h->lock, flags);
475 	hdev = sdev->hostdata;
476 	if (!hdev) {
477 		spin_unlock_irqrestore(&h->lock, flags);
478 		return -ENODEV;
479 	}
480 	memcpy(sn, hdev->device_id, sizeof(sn));
481 	spin_unlock_irqrestore(&h->lock, flags);
482 	return snprintf(buf, 16 * 2 + 2,
483 			"%02X%02X%02X%02X%02X%02X%02X%02X"
484 			"%02X%02X%02X%02X%02X%02X%02X%02X\n",
485 			sn[0], sn[1], sn[2], sn[3],
486 			sn[4], sn[5], sn[6], sn[7],
487 			sn[8], sn[9], sn[10], sn[11],
488 			sn[12], sn[13], sn[14], sn[15]);
489 }
490 
491 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL);
492 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL);
493 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL);
494 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
495 static DEVICE_ATTR(firmware_revision, S_IRUGO,
496 	host_show_firmware_revision, NULL);
497 static DEVICE_ATTR(commands_outstanding, S_IRUGO,
498 	host_show_commands_outstanding, NULL);
499 static DEVICE_ATTR(transport_mode, S_IRUGO,
500 	host_show_transport_mode, NULL);
501 static DEVICE_ATTR(resettable, S_IRUGO,
502 	host_show_resettable, NULL);
503 
504 static struct device_attribute *hpsa_sdev_attrs[] = {
505 	&dev_attr_raid_level,
506 	&dev_attr_lunid,
507 	&dev_attr_unique_id,
508 	NULL,
509 };
510 
511 static struct device_attribute *hpsa_shost_attrs[] = {
512 	&dev_attr_rescan,
513 	&dev_attr_firmware_revision,
514 	&dev_attr_commands_outstanding,
515 	&dev_attr_transport_mode,
516 	&dev_attr_resettable,
517 	NULL,
518 };
519 
520 static struct scsi_host_template hpsa_driver_template = {
521 	.module			= THIS_MODULE,
522 	.name			= HPSA,
523 	.proc_name		= HPSA,
524 	.queuecommand		= hpsa_scsi_queue_command,
525 	.scan_start		= hpsa_scan_start,
526 	.scan_finished		= hpsa_scan_finished,
527 	.change_queue_depth	= hpsa_change_queue_depth,
528 	.this_id		= -1,
529 	.use_clustering		= ENABLE_CLUSTERING,
530 	.eh_abort_handler	= hpsa_eh_abort_handler,
531 	.eh_device_reset_handler = hpsa_eh_device_reset_handler,
532 	.ioctl			= hpsa_ioctl,
533 	.slave_alloc		= hpsa_slave_alloc,
534 	.slave_destroy		= hpsa_slave_destroy,
535 #ifdef CONFIG_COMPAT
536 	.compat_ioctl		= hpsa_compat_ioctl,
537 #endif
538 	.sdev_attrs = hpsa_sdev_attrs,
539 	.shost_attrs = hpsa_shost_attrs,
540 	.max_sectors = 8192,
541 };
542 
543 
544 /* Enqueuing and dequeuing functions for cmdlists. */
545 static inline void addQ(struct list_head *list, struct CommandList *c)
546 {
547 	list_add_tail(&c->list, list);
548 }
549 
550 static inline u32 next_command(struct ctlr_info *h, u8 q)
551 {
552 	u32 a;
553 	struct reply_pool *rq = &h->reply_queue[q];
554 	unsigned long flags;
555 
556 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
557 		return h->access.command_completed(h, q);
558 
559 	if ((rq->head[rq->current_entry] & 1) == rq->wraparound) {
560 		a = rq->head[rq->current_entry];
561 		rq->current_entry++;
562 		spin_lock_irqsave(&h->lock, flags);
563 		h->commands_outstanding--;
564 		spin_unlock_irqrestore(&h->lock, flags);
565 	} else {
566 		a = FIFO_EMPTY;
567 	}
568 	/* Check for wraparound */
569 	if (rq->current_entry == h->max_commands) {
570 		rq->current_entry = 0;
571 		rq->wraparound ^= 1;
572 	}
573 	return a;
574 }
575 
576 /* set_performant_mode: Modify the tag for cciss performant
577  * set bit 0 for pull model, bits 3-1 for block fetch
578  * register number
579  */
580 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c)
581 {
582 	if (likely(h->transMethod & CFGTBL_Trans_Performant)) {
583 		c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
584 		if (likely(h->msix_vector))
585 			c->Header.ReplyQueue =
586 				smp_processor_id() % h->nreply_queues;
587 	}
588 }
589 
590 static int is_firmware_flash_cmd(u8 *cdb)
591 {
592 	return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE;
593 }
594 
595 /*
596  * During firmware flash, the heartbeat register may not update as frequently
597  * as it should.  So we dial down lockup detection during firmware flash. and
598  * dial it back up when firmware flash completes.
599  */
600 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ)
601 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ)
602 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h,
603 		struct CommandList *c)
604 {
605 	if (!is_firmware_flash_cmd(c->Request.CDB))
606 		return;
607 	atomic_inc(&h->firmware_flash_in_progress);
608 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH;
609 }
610 
611 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h,
612 		struct CommandList *c)
613 {
614 	if (is_firmware_flash_cmd(c->Request.CDB) &&
615 		atomic_dec_and_test(&h->firmware_flash_in_progress))
616 		h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
617 }
618 
619 static void enqueue_cmd_and_start_io(struct ctlr_info *h,
620 	struct CommandList *c)
621 {
622 	unsigned long flags;
623 
624 	set_performant_mode(h, c);
625 	dial_down_lockup_detection_during_fw_flash(h, c);
626 	spin_lock_irqsave(&h->lock, flags);
627 	addQ(&h->reqQ, c);
628 	h->Qdepth++;
629 	spin_unlock_irqrestore(&h->lock, flags);
630 	start_io(h);
631 }
632 
633 static inline void removeQ(struct CommandList *c)
634 {
635 	if (WARN_ON(list_empty(&c->list)))
636 		return;
637 	list_del_init(&c->list);
638 }
639 
640 static inline int is_hba_lunid(unsigned char scsi3addr[])
641 {
642 	return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0;
643 }
644 
645 static inline int is_scsi_rev_5(struct ctlr_info *h)
646 {
647 	if (!h->hba_inquiry_data)
648 		return 0;
649 	if ((h->hba_inquiry_data[2] & 0x07) == 5)
650 		return 1;
651 	return 0;
652 }
653 
654 static int hpsa_find_target_lun(struct ctlr_info *h,
655 	unsigned char scsi3addr[], int bus, int *target, int *lun)
656 {
657 	/* finds an unused bus, target, lun for a new physical device
658 	 * assumes h->devlock is held
659 	 */
660 	int i, found = 0;
661 	DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES);
662 
663 	bitmap_zero(lun_taken, HPSA_MAX_DEVICES);
664 
665 	for (i = 0; i < h->ndevices; i++) {
666 		if (h->dev[i]->bus == bus && h->dev[i]->target != -1)
667 			__set_bit(h->dev[i]->target, lun_taken);
668 	}
669 
670 	i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES);
671 	if (i < HPSA_MAX_DEVICES) {
672 		/* *bus = 1; */
673 		*target = i;
674 		*lun = 0;
675 		found = 1;
676 	}
677 	return !found;
678 }
679 
680 /* Add an entry into h->dev[] array. */
681 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno,
682 		struct hpsa_scsi_dev_t *device,
683 		struct hpsa_scsi_dev_t *added[], int *nadded)
684 {
685 	/* assumes h->devlock is held */
686 	int n = h->ndevices;
687 	int i;
688 	unsigned char addr1[8], addr2[8];
689 	struct hpsa_scsi_dev_t *sd;
690 
691 	if (n >= HPSA_MAX_DEVICES) {
692 		dev_err(&h->pdev->dev, "too many devices, some will be "
693 			"inaccessible.\n");
694 		return -1;
695 	}
696 
697 	/* physical devices do not have lun or target assigned until now. */
698 	if (device->lun != -1)
699 		/* Logical device, lun is already assigned. */
700 		goto lun_assigned;
701 
702 	/* If this device a non-zero lun of a multi-lun device
703 	 * byte 4 of the 8-byte LUN addr will contain the logical
704 	 * unit no, zero otherise.
705 	 */
706 	if (device->scsi3addr[4] == 0) {
707 		/* This is not a non-zero lun of a multi-lun device */
708 		if (hpsa_find_target_lun(h, device->scsi3addr,
709 			device->bus, &device->target, &device->lun) != 0)
710 			return -1;
711 		goto lun_assigned;
712 	}
713 
714 	/* This is a non-zero lun of a multi-lun device.
715 	 * Search through our list and find the device which
716 	 * has the same 8 byte LUN address, excepting byte 4.
717 	 * Assign the same bus and target for this new LUN.
718 	 * Use the logical unit number from the firmware.
719 	 */
720 	memcpy(addr1, device->scsi3addr, 8);
721 	addr1[4] = 0;
722 	for (i = 0; i < n; i++) {
723 		sd = h->dev[i];
724 		memcpy(addr2, sd->scsi3addr, 8);
725 		addr2[4] = 0;
726 		/* differ only in byte 4? */
727 		if (memcmp(addr1, addr2, 8) == 0) {
728 			device->bus = sd->bus;
729 			device->target = sd->target;
730 			device->lun = device->scsi3addr[4];
731 			break;
732 		}
733 	}
734 	if (device->lun == -1) {
735 		dev_warn(&h->pdev->dev, "physical device with no LUN=0,"
736 			" suspect firmware bug or unsupported hardware "
737 			"configuration.\n");
738 			return -1;
739 	}
740 
741 lun_assigned:
742 
743 	h->dev[n] = device;
744 	h->ndevices++;
745 	added[*nadded] = device;
746 	(*nadded)++;
747 
748 	/* initially, (before registering with scsi layer) we don't
749 	 * know our hostno and we don't want to print anything first
750 	 * time anyway (the scsi layer's inquiries will show that info)
751 	 */
752 	/* if (hostno != -1) */
753 		dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n",
754 			scsi_device_type(device->devtype), hostno,
755 			device->bus, device->target, device->lun);
756 	return 0;
757 }
758 
759 /* Update an entry in h->dev[] array. */
760 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno,
761 	int entry, struct hpsa_scsi_dev_t *new_entry)
762 {
763 	/* assumes h->devlock is held */
764 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
765 
766 	/* Raid level changed. */
767 	h->dev[entry]->raid_level = new_entry->raid_level;
768 	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n",
769 		scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
770 		new_entry->target, new_entry->lun);
771 }
772 
773 /* Replace an entry from h->dev[] array. */
774 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno,
775 	int entry, struct hpsa_scsi_dev_t *new_entry,
776 	struct hpsa_scsi_dev_t *added[], int *nadded,
777 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
778 {
779 	/* assumes h->devlock is held */
780 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
781 	removed[*nremoved] = h->dev[entry];
782 	(*nremoved)++;
783 
784 	/*
785 	 * New physical devices won't have target/lun assigned yet
786 	 * so we need to preserve the values in the slot we are replacing.
787 	 */
788 	if (new_entry->target == -1) {
789 		new_entry->target = h->dev[entry]->target;
790 		new_entry->lun = h->dev[entry]->lun;
791 	}
792 
793 	h->dev[entry] = new_entry;
794 	added[*nadded] = new_entry;
795 	(*nadded)++;
796 	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n",
797 		scsi_device_type(new_entry->devtype), hostno, new_entry->bus,
798 			new_entry->target, new_entry->lun);
799 }
800 
801 /* Remove an entry from h->dev[] array. */
802 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry,
803 	struct hpsa_scsi_dev_t *removed[], int *nremoved)
804 {
805 	/* assumes h->devlock is held */
806 	int i;
807 	struct hpsa_scsi_dev_t *sd;
808 
809 	BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES);
810 
811 	sd = h->dev[entry];
812 	removed[*nremoved] = h->dev[entry];
813 	(*nremoved)++;
814 
815 	for (i = entry; i < h->ndevices-1; i++)
816 		h->dev[i] = h->dev[i+1];
817 	h->ndevices--;
818 	dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n",
819 		scsi_device_type(sd->devtype), hostno, sd->bus, sd->target,
820 		sd->lun);
821 }
822 
823 #define SCSI3ADDR_EQ(a, b) ( \
824 	(a)[7] == (b)[7] && \
825 	(a)[6] == (b)[6] && \
826 	(a)[5] == (b)[5] && \
827 	(a)[4] == (b)[4] && \
828 	(a)[3] == (b)[3] && \
829 	(a)[2] == (b)[2] && \
830 	(a)[1] == (b)[1] && \
831 	(a)[0] == (b)[0])
832 
833 static void fixup_botched_add(struct ctlr_info *h,
834 	struct hpsa_scsi_dev_t *added)
835 {
836 	/* called when scsi_add_device fails in order to re-adjust
837 	 * h->dev[] to match the mid layer's view.
838 	 */
839 	unsigned long flags;
840 	int i, j;
841 
842 	spin_lock_irqsave(&h->lock, flags);
843 	for (i = 0; i < h->ndevices; i++) {
844 		if (h->dev[i] == added) {
845 			for (j = i; j < h->ndevices-1; j++)
846 				h->dev[j] = h->dev[j+1];
847 			h->ndevices--;
848 			break;
849 		}
850 	}
851 	spin_unlock_irqrestore(&h->lock, flags);
852 	kfree(added);
853 }
854 
855 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1,
856 	struct hpsa_scsi_dev_t *dev2)
857 {
858 	/* we compare everything except lun and target as these
859 	 * are not yet assigned.  Compare parts likely
860 	 * to differ first
861 	 */
862 	if (memcmp(dev1->scsi3addr, dev2->scsi3addr,
863 		sizeof(dev1->scsi3addr)) != 0)
864 		return 0;
865 	if (memcmp(dev1->device_id, dev2->device_id,
866 		sizeof(dev1->device_id)) != 0)
867 		return 0;
868 	if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0)
869 		return 0;
870 	if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0)
871 		return 0;
872 	if (dev1->devtype != dev2->devtype)
873 		return 0;
874 	if (dev1->bus != dev2->bus)
875 		return 0;
876 	return 1;
877 }
878 
879 static inline int device_updated(struct hpsa_scsi_dev_t *dev1,
880 	struct hpsa_scsi_dev_t *dev2)
881 {
882 	/* Device attributes that can change, but don't mean
883 	 * that the device is a different device, nor that the OS
884 	 * needs to be told anything about the change.
885 	 */
886 	if (dev1->raid_level != dev2->raid_level)
887 		return 1;
888 	return 0;
889 }
890 
891 /* Find needle in haystack.  If exact match found, return DEVICE_SAME,
892  * and return needle location in *index.  If scsi3addr matches, but not
893  * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle
894  * location in *index.
895  * In the case of a minor device attribute change, such as RAID level, just
896  * return DEVICE_UPDATED, along with the updated device's location in index.
897  * If needle not found, return DEVICE_NOT_FOUND.
898  */
899 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle,
900 	struct hpsa_scsi_dev_t *haystack[], int haystack_size,
901 	int *index)
902 {
903 	int i;
904 #define DEVICE_NOT_FOUND 0
905 #define DEVICE_CHANGED 1
906 #define DEVICE_SAME 2
907 #define DEVICE_UPDATED 3
908 	for (i = 0; i < haystack_size; i++) {
909 		if (haystack[i] == NULL) /* previously removed. */
910 			continue;
911 		if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) {
912 			*index = i;
913 			if (device_is_the_same(needle, haystack[i])) {
914 				if (device_updated(needle, haystack[i]))
915 					return DEVICE_UPDATED;
916 				return DEVICE_SAME;
917 			} else {
918 				return DEVICE_CHANGED;
919 			}
920 		}
921 	}
922 	*index = -1;
923 	return DEVICE_NOT_FOUND;
924 }
925 
926 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno,
927 	struct hpsa_scsi_dev_t *sd[], int nsds)
928 {
929 	/* sd contains scsi3 addresses and devtypes, and inquiry
930 	 * data.  This function takes what's in sd to be the current
931 	 * reality and updates h->dev[] to reflect that reality.
932 	 */
933 	int i, entry, device_change, changes = 0;
934 	struct hpsa_scsi_dev_t *csd;
935 	unsigned long flags;
936 	struct hpsa_scsi_dev_t **added, **removed;
937 	int nadded, nremoved;
938 	struct Scsi_Host *sh = NULL;
939 
940 	added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL);
941 	removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL);
942 
943 	if (!added || !removed) {
944 		dev_warn(&h->pdev->dev, "out of memory in "
945 			"adjust_hpsa_scsi_table\n");
946 		goto free_and_out;
947 	}
948 
949 	spin_lock_irqsave(&h->devlock, flags);
950 
951 	/* find any devices in h->dev[] that are not in
952 	 * sd[] and remove them from h->dev[], and for any
953 	 * devices which have changed, remove the old device
954 	 * info and add the new device info.
955 	 * If minor device attributes change, just update
956 	 * the existing device structure.
957 	 */
958 	i = 0;
959 	nremoved = 0;
960 	nadded = 0;
961 	while (i < h->ndevices) {
962 		csd = h->dev[i];
963 		device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry);
964 		if (device_change == DEVICE_NOT_FOUND) {
965 			changes++;
966 			hpsa_scsi_remove_entry(h, hostno, i,
967 				removed, &nremoved);
968 			continue; /* remove ^^^, hence i not incremented */
969 		} else if (device_change == DEVICE_CHANGED) {
970 			changes++;
971 			hpsa_scsi_replace_entry(h, hostno, i, sd[entry],
972 				added, &nadded, removed, &nremoved);
973 			/* Set it to NULL to prevent it from being freed
974 			 * at the bottom of hpsa_update_scsi_devices()
975 			 */
976 			sd[entry] = NULL;
977 		} else if (device_change == DEVICE_UPDATED) {
978 			hpsa_scsi_update_entry(h, hostno, i, sd[entry]);
979 		}
980 		i++;
981 	}
982 
983 	/* Now, make sure every device listed in sd[] is also
984 	 * listed in h->dev[], adding them if they aren't found
985 	 */
986 
987 	for (i = 0; i < nsds; i++) {
988 		if (!sd[i]) /* if already added above. */
989 			continue;
990 		device_change = hpsa_scsi_find_entry(sd[i], h->dev,
991 					h->ndevices, &entry);
992 		if (device_change == DEVICE_NOT_FOUND) {
993 			changes++;
994 			if (hpsa_scsi_add_entry(h, hostno, sd[i],
995 				added, &nadded) != 0)
996 				break;
997 			sd[i] = NULL; /* prevent from being freed later. */
998 		} else if (device_change == DEVICE_CHANGED) {
999 			/* should never happen... */
1000 			changes++;
1001 			dev_warn(&h->pdev->dev,
1002 				"device unexpectedly changed.\n");
1003 			/* but if it does happen, we just ignore that device */
1004 		}
1005 	}
1006 	spin_unlock_irqrestore(&h->devlock, flags);
1007 
1008 	/* Don't notify scsi mid layer of any changes the first time through
1009 	 * (or if there are no changes) scsi_scan_host will do it later the
1010 	 * first time through.
1011 	 */
1012 	if (hostno == -1 || !changes)
1013 		goto free_and_out;
1014 
1015 	sh = h->scsi_host;
1016 	/* Notify scsi mid layer of any removed devices */
1017 	for (i = 0; i < nremoved; i++) {
1018 		struct scsi_device *sdev =
1019 			scsi_device_lookup(sh, removed[i]->bus,
1020 				removed[i]->target, removed[i]->lun);
1021 		if (sdev != NULL) {
1022 			scsi_remove_device(sdev);
1023 			scsi_device_put(sdev);
1024 		} else {
1025 			/* We don't expect to get here.
1026 			 * future cmds to this device will get selection
1027 			 * timeout as if the device was gone.
1028 			 */
1029 			dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d "
1030 				" for removal.", hostno, removed[i]->bus,
1031 				removed[i]->target, removed[i]->lun);
1032 		}
1033 		kfree(removed[i]);
1034 		removed[i] = NULL;
1035 	}
1036 
1037 	/* Notify scsi mid layer of any added devices */
1038 	for (i = 0; i < nadded; i++) {
1039 		if (scsi_add_device(sh, added[i]->bus,
1040 			added[i]->target, added[i]->lun) == 0)
1041 			continue;
1042 		dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, "
1043 			"device not added.\n", hostno, added[i]->bus,
1044 			added[i]->target, added[i]->lun);
1045 		/* now we have to remove it from h->dev,
1046 		 * since it didn't get added to scsi mid layer
1047 		 */
1048 		fixup_botched_add(h, added[i]);
1049 	}
1050 
1051 free_and_out:
1052 	kfree(added);
1053 	kfree(removed);
1054 }
1055 
1056 /*
1057  * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t *
1058  * Assume's h->devlock is held.
1059  */
1060 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h,
1061 	int bus, int target, int lun)
1062 {
1063 	int i;
1064 	struct hpsa_scsi_dev_t *sd;
1065 
1066 	for (i = 0; i < h->ndevices; i++) {
1067 		sd = h->dev[i];
1068 		if (sd->bus == bus && sd->target == target && sd->lun == lun)
1069 			return sd;
1070 	}
1071 	return NULL;
1072 }
1073 
1074 /* link sdev->hostdata to our per-device structure. */
1075 static int hpsa_slave_alloc(struct scsi_device *sdev)
1076 {
1077 	struct hpsa_scsi_dev_t *sd;
1078 	unsigned long flags;
1079 	struct ctlr_info *h;
1080 
1081 	h = sdev_to_hba(sdev);
1082 	spin_lock_irqsave(&h->devlock, flags);
1083 	sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev),
1084 		sdev_id(sdev), sdev->lun);
1085 	if (sd != NULL)
1086 		sdev->hostdata = sd;
1087 	spin_unlock_irqrestore(&h->devlock, flags);
1088 	return 0;
1089 }
1090 
1091 static void hpsa_slave_destroy(struct scsi_device *sdev)
1092 {
1093 	/* nothing to do. */
1094 }
1095 
1096 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h)
1097 {
1098 	int i;
1099 
1100 	if (!h->cmd_sg_list)
1101 		return;
1102 	for (i = 0; i < h->nr_cmds; i++) {
1103 		kfree(h->cmd_sg_list[i]);
1104 		h->cmd_sg_list[i] = NULL;
1105 	}
1106 	kfree(h->cmd_sg_list);
1107 	h->cmd_sg_list = NULL;
1108 }
1109 
1110 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h)
1111 {
1112 	int i;
1113 
1114 	if (h->chainsize <= 0)
1115 		return 0;
1116 
1117 	h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds,
1118 				GFP_KERNEL);
1119 	if (!h->cmd_sg_list)
1120 		return -ENOMEM;
1121 	for (i = 0; i < h->nr_cmds; i++) {
1122 		h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) *
1123 						h->chainsize, GFP_KERNEL);
1124 		if (!h->cmd_sg_list[i])
1125 			goto clean;
1126 	}
1127 	return 0;
1128 
1129 clean:
1130 	hpsa_free_sg_chain_blocks(h);
1131 	return -ENOMEM;
1132 }
1133 
1134 static void hpsa_map_sg_chain_block(struct ctlr_info *h,
1135 	struct CommandList *c)
1136 {
1137 	struct SGDescriptor *chain_sg, *chain_block;
1138 	u64 temp64;
1139 
1140 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1141 	chain_block = h->cmd_sg_list[c->cmdindex];
1142 	chain_sg->Ext = HPSA_SG_CHAIN;
1143 	chain_sg->Len = sizeof(*chain_sg) *
1144 		(c->Header.SGTotal - h->max_cmd_sg_entries);
1145 	temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len,
1146 				PCI_DMA_TODEVICE);
1147 	chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL);
1148 	chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL);
1149 }
1150 
1151 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h,
1152 	struct CommandList *c)
1153 {
1154 	struct SGDescriptor *chain_sg;
1155 	union u64bit temp64;
1156 
1157 	if (c->Header.SGTotal <= h->max_cmd_sg_entries)
1158 		return;
1159 
1160 	chain_sg = &c->SG[h->max_cmd_sg_entries - 1];
1161 	temp64.val32.lower = chain_sg->Addr.lower;
1162 	temp64.val32.upper = chain_sg->Addr.upper;
1163 	pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
1164 }
1165 
1166 static void complete_scsi_command(struct CommandList *cp)
1167 {
1168 	struct scsi_cmnd *cmd;
1169 	struct ctlr_info *h;
1170 	struct ErrorInfo *ei;
1171 
1172 	unsigned char sense_key;
1173 	unsigned char asc;      /* additional sense code */
1174 	unsigned char ascq;     /* additional sense code qualifier */
1175 	unsigned long sense_data_size;
1176 
1177 	ei = cp->err_info;
1178 	cmd = (struct scsi_cmnd *) cp->scsi_cmd;
1179 	h = cp->h;
1180 
1181 	scsi_dma_unmap(cmd); /* undo the DMA mappings */
1182 	if (cp->Header.SGTotal > h->max_cmd_sg_entries)
1183 		hpsa_unmap_sg_chain_block(h, cp);
1184 
1185 	cmd->result = (DID_OK << 16); 		/* host byte */
1186 	cmd->result |= (COMMAND_COMPLETE << 8);	/* msg byte */
1187 	cmd->result |= ei->ScsiStatus;
1188 
1189 	/* copy the sense data whether we need to or not. */
1190 	if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo))
1191 		sense_data_size = SCSI_SENSE_BUFFERSIZE;
1192 	else
1193 		sense_data_size = sizeof(ei->SenseInfo);
1194 	if (ei->SenseLen < sense_data_size)
1195 		sense_data_size = ei->SenseLen;
1196 
1197 	memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size);
1198 	scsi_set_resid(cmd, ei->ResidualCnt);
1199 
1200 	if (ei->CommandStatus == 0) {
1201 		cmd->scsi_done(cmd);
1202 		cmd_free(h, cp);
1203 		return;
1204 	}
1205 
1206 	/* an error has occurred */
1207 	switch (ei->CommandStatus) {
1208 
1209 	case CMD_TARGET_STATUS:
1210 		if (ei->ScsiStatus) {
1211 			/* Get sense key */
1212 			sense_key = 0xf & ei->SenseInfo[2];
1213 			/* Get additional sense code */
1214 			asc = ei->SenseInfo[12];
1215 			/* Get addition sense code qualifier */
1216 			ascq = ei->SenseInfo[13];
1217 		}
1218 
1219 		if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) {
1220 			if (check_for_unit_attention(h, cp)) {
1221 				cmd->result = DID_SOFT_ERROR << 16;
1222 				break;
1223 			}
1224 			if (sense_key == ILLEGAL_REQUEST) {
1225 				/*
1226 				 * SCSI REPORT_LUNS is commonly unsupported on
1227 				 * Smart Array.  Suppress noisy complaint.
1228 				 */
1229 				if (cp->Request.CDB[0] == REPORT_LUNS)
1230 					break;
1231 
1232 				/* If ASC/ASCQ indicate Logical Unit
1233 				 * Not Supported condition,
1234 				 */
1235 				if ((asc == 0x25) && (ascq == 0x0)) {
1236 					dev_warn(&h->pdev->dev, "cp %p "
1237 						"has check condition\n", cp);
1238 					break;
1239 				}
1240 			}
1241 
1242 			if (sense_key == NOT_READY) {
1243 				/* If Sense is Not Ready, Logical Unit
1244 				 * Not ready, Manual Intervention
1245 				 * required
1246 				 */
1247 				if ((asc == 0x04) && (ascq == 0x03)) {
1248 					dev_warn(&h->pdev->dev, "cp %p "
1249 						"has check condition: unit "
1250 						"not ready, manual "
1251 						"intervention required\n", cp);
1252 					break;
1253 				}
1254 			}
1255 			if (sense_key == ABORTED_COMMAND) {
1256 				/* Aborted command is retryable */
1257 				dev_warn(&h->pdev->dev, "cp %p "
1258 					"has check condition: aborted command: "
1259 					"ASC: 0x%x, ASCQ: 0x%x\n",
1260 					cp, asc, ascq);
1261 				cmd->result = DID_SOFT_ERROR << 16;
1262 				break;
1263 			}
1264 			/* Must be some other type of check condition */
1265 			dev_dbg(&h->pdev->dev, "cp %p has check condition: "
1266 					"unknown type: "
1267 					"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1268 					"Returning result: 0x%x, "
1269 					"cmd=[%02x %02x %02x %02x %02x "
1270 					"%02x %02x %02x %02x %02x %02x "
1271 					"%02x %02x %02x %02x %02x]\n",
1272 					cp, sense_key, asc, ascq,
1273 					cmd->result,
1274 					cmd->cmnd[0], cmd->cmnd[1],
1275 					cmd->cmnd[2], cmd->cmnd[3],
1276 					cmd->cmnd[4], cmd->cmnd[5],
1277 					cmd->cmnd[6], cmd->cmnd[7],
1278 					cmd->cmnd[8], cmd->cmnd[9],
1279 					cmd->cmnd[10], cmd->cmnd[11],
1280 					cmd->cmnd[12], cmd->cmnd[13],
1281 					cmd->cmnd[14], cmd->cmnd[15]);
1282 			break;
1283 		}
1284 
1285 
1286 		/* Problem was not a check condition
1287 		 * Pass it up to the upper layers...
1288 		 */
1289 		if (ei->ScsiStatus) {
1290 			dev_warn(&h->pdev->dev, "cp %p has status 0x%x "
1291 				"Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, "
1292 				"Returning result: 0x%x\n",
1293 				cp, ei->ScsiStatus,
1294 				sense_key, asc, ascq,
1295 				cmd->result);
1296 		} else {  /* scsi status is zero??? How??? */
1297 			dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. "
1298 				"Returning no connection.\n", cp),
1299 
1300 			/* Ordinarily, this case should never happen,
1301 			 * but there is a bug in some released firmware
1302 			 * revisions that allows it to happen if, for
1303 			 * example, a 4100 backplane loses power and
1304 			 * the tape drive is in it.  We assume that
1305 			 * it's a fatal error of some kind because we
1306 			 * can't show that it wasn't. We will make it
1307 			 * look like selection timeout since that is
1308 			 * the most common reason for this to occur,
1309 			 * and it's severe enough.
1310 			 */
1311 
1312 			cmd->result = DID_NO_CONNECT << 16;
1313 		}
1314 		break;
1315 
1316 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1317 		break;
1318 	case CMD_DATA_OVERRUN:
1319 		dev_warn(&h->pdev->dev, "cp %p has"
1320 			" completed with data overrun "
1321 			"reported\n", cp);
1322 		break;
1323 	case CMD_INVALID: {
1324 		/* print_bytes(cp, sizeof(*cp), 1, 0);
1325 		print_cmd(cp); */
1326 		/* We get CMD_INVALID if you address a non-existent device
1327 		 * instead of a selection timeout (no response).  You will
1328 		 * see this if you yank out a drive, then try to access it.
1329 		 * This is kind of a shame because it means that any other
1330 		 * CMD_INVALID (e.g. driver bug) will get interpreted as a
1331 		 * missing target. */
1332 		cmd->result = DID_NO_CONNECT << 16;
1333 	}
1334 		break;
1335 	case CMD_PROTOCOL_ERR:
1336 		cmd->result = DID_ERROR << 16;
1337 		dev_warn(&h->pdev->dev, "cp %p has "
1338 			"protocol error\n", cp);
1339 		break;
1340 	case CMD_HARDWARE_ERR:
1341 		cmd->result = DID_ERROR << 16;
1342 		dev_warn(&h->pdev->dev, "cp %p had  hardware error\n", cp);
1343 		break;
1344 	case CMD_CONNECTION_LOST:
1345 		cmd->result = DID_ERROR << 16;
1346 		dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp);
1347 		break;
1348 	case CMD_ABORTED:
1349 		cmd->result = DID_ABORT << 16;
1350 		dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n",
1351 				cp, ei->ScsiStatus);
1352 		break;
1353 	case CMD_ABORT_FAILED:
1354 		cmd->result = DID_ERROR << 16;
1355 		dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp);
1356 		break;
1357 	case CMD_UNSOLICITED_ABORT:
1358 		cmd->result = DID_SOFT_ERROR << 16; /* retry the command */
1359 		dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited "
1360 			"abort\n", cp);
1361 		break;
1362 	case CMD_TIMEOUT:
1363 		cmd->result = DID_TIME_OUT << 16;
1364 		dev_warn(&h->pdev->dev, "cp %p timedout\n", cp);
1365 		break;
1366 	case CMD_UNABORTABLE:
1367 		cmd->result = DID_ERROR << 16;
1368 		dev_warn(&h->pdev->dev, "Command unabortable\n");
1369 		break;
1370 	default:
1371 		cmd->result = DID_ERROR << 16;
1372 		dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n",
1373 				cp, ei->CommandStatus);
1374 	}
1375 	cmd->scsi_done(cmd);
1376 	cmd_free(h, cp);
1377 }
1378 
1379 static void hpsa_pci_unmap(struct pci_dev *pdev,
1380 	struct CommandList *c, int sg_used, int data_direction)
1381 {
1382 	int i;
1383 	union u64bit addr64;
1384 
1385 	for (i = 0; i < sg_used; i++) {
1386 		addr64.val32.lower = c->SG[i].Addr.lower;
1387 		addr64.val32.upper = c->SG[i].Addr.upper;
1388 		pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len,
1389 			data_direction);
1390 	}
1391 }
1392 
1393 static void hpsa_map_one(struct pci_dev *pdev,
1394 		struct CommandList *cp,
1395 		unsigned char *buf,
1396 		size_t buflen,
1397 		int data_direction)
1398 {
1399 	u64 addr64;
1400 
1401 	if (buflen == 0 || data_direction == PCI_DMA_NONE) {
1402 		cp->Header.SGList = 0;
1403 		cp->Header.SGTotal = 0;
1404 		return;
1405 	}
1406 
1407 	addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction);
1408 	cp->SG[0].Addr.lower =
1409 	  (u32) (addr64 & (u64) 0x00000000FFFFFFFF);
1410 	cp->SG[0].Addr.upper =
1411 	  (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF);
1412 	cp->SG[0].Len = buflen;
1413 	cp->Header.SGList = (u8) 1;   /* no. SGs contig in this cmd */
1414 	cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */
1415 }
1416 
1417 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h,
1418 	struct CommandList *c)
1419 {
1420 	DECLARE_COMPLETION_ONSTACK(wait);
1421 
1422 	c->waiting = &wait;
1423 	enqueue_cmd_and_start_io(h, c);
1424 	wait_for_completion(&wait);
1425 }
1426 
1427 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h,
1428 	struct CommandList *c)
1429 {
1430 	unsigned long flags;
1431 
1432 	/* If controller lockup detected, fake a hardware error. */
1433 	spin_lock_irqsave(&h->lock, flags);
1434 	if (unlikely(h->lockup_detected)) {
1435 		spin_unlock_irqrestore(&h->lock, flags);
1436 		c->err_info->CommandStatus = CMD_HARDWARE_ERR;
1437 	} else {
1438 		spin_unlock_irqrestore(&h->lock, flags);
1439 		hpsa_scsi_do_simple_cmd_core(h, c);
1440 	}
1441 }
1442 
1443 #define MAX_DRIVER_CMD_RETRIES 25
1444 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h,
1445 	struct CommandList *c, int data_direction)
1446 {
1447 	int backoff_time = 10, retry_count = 0;
1448 
1449 	do {
1450 		memset(c->err_info, 0, sizeof(*c->err_info));
1451 		hpsa_scsi_do_simple_cmd_core(h, c);
1452 		retry_count++;
1453 		if (retry_count > 3) {
1454 			msleep(backoff_time);
1455 			if (backoff_time < 1000)
1456 				backoff_time *= 2;
1457 		}
1458 	} while ((check_for_unit_attention(h, c) ||
1459 			check_for_busy(h, c)) &&
1460 			retry_count <= MAX_DRIVER_CMD_RETRIES);
1461 	hpsa_pci_unmap(h->pdev, c, 1, data_direction);
1462 }
1463 
1464 static void hpsa_scsi_interpret_error(struct CommandList *cp)
1465 {
1466 	struct ErrorInfo *ei;
1467 	struct device *d = &cp->h->pdev->dev;
1468 
1469 	ei = cp->err_info;
1470 	switch (ei->CommandStatus) {
1471 	case CMD_TARGET_STATUS:
1472 		dev_warn(d, "cmd %p has completed with errors\n", cp);
1473 		dev_warn(d, "cmd %p has SCSI Status = %x\n", cp,
1474 				ei->ScsiStatus);
1475 		if (ei->ScsiStatus == 0)
1476 			dev_warn(d, "SCSI status is abnormally zero.  "
1477 			"(probably indicates selection timeout "
1478 			"reported incorrectly due to a known "
1479 			"firmware bug, circa July, 2001.)\n");
1480 		break;
1481 	case CMD_DATA_UNDERRUN: /* let mid layer handle it. */
1482 			dev_info(d, "UNDERRUN\n");
1483 		break;
1484 	case CMD_DATA_OVERRUN:
1485 		dev_warn(d, "cp %p has completed with data overrun\n", cp);
1486 		break;
1487 	case CMD_INVALID: {
1488 		/* controller unfortunately reports SCSI passthru's
1489 		 * to non-existent targets as invalid commands.
1490 		 */
1491 		dev_warn(d, "cp %p is reported invalid (probably means "
1492 			"target device no longer present)\n", cp);
1493 		/* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0);
1494 		print_cmd(cp);  */
1495 		}
1496 		break;
1497 	case CMD_PROTOCOL_ERR:
1498 		dev_warn(d, "cp %p has protocol error \n", cp);
1499 		break;
1500 	case CMD_HARDWARE_ERR:
1501 		/* cmd->result = DID_ERROR << 16; */
1502 		dev_warn(d, "cp %p had hardware error\n", cp);
1503 		break;
1504 	case CMD_CONNECTION_LOST:
1505 		dev_warn(d, "cp %p had connection lost\n", cp);
1506 		break;
1507 	case CMD_ABORTED:
1508 		dev_warn(d, "cp %p was aborted\n", cp);
1509 		break;
1510 	case CMD_ABORT_FAILED:
1511 		dev_warn(d, "cp %p reports abort failed\n", cp);
1512 		break;
1513 	case CMD_UNSOLICITED_ABORT:
1514 		dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp);
1515 		break;
1516 	case CMD_TIMEOUT:
1517 		dev_warn(d, "cp %p timed out\n", cp);
1518 		break;
1519 	case CMD_UNABORTABLE:
1520 		dev_warn(d, "Command unabortable\n");
1521 		break;
1522 	default:
1523 		dev_warn(d, "cp %p returned unknown status %x\n", cp,
1524 				ei->CommandStatus);
1525 	}
1526 }
1527 
1528 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr,
1529 			unsigned char page, unsigned char *buf,
1530 			unsigned char bufsize)
1531 {
1532 	int rc = IO_OK;
1533 	struct CommandList *c;
1534 	struct ErrorInfo *ei;
1535 
1536 	c = cmd_special_alloc(h);
1537 
1538 	if (c == NULL) {			/* trouble... */
1539 		dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1540 		return -ENOMEM;
1541 	}
1542 
1543 	fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD);
1544 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1545 	ei = c->err_info;
1546 	if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) {
1547 		hpsa_scsi_interpret_error(c);
1548 		rc = -1;
1549 	}
1550 	cmd_special_free(h, c);
1551 	return rc;
1552 }
1553 
1554 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr)
1555 {
1556 	int rc = IO_OK;
1557 	struct CommandList *c;
1558 	struct ErrorInfo *ei;
1559 
1560 	c = cmd_special_alloc(h);
1561 
1562 	if (c == NULL) {			/* trouble... */
1563 		dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1564 		return -ENOMEM;
1565 	}
1566 
1567 	fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG);
1568 	hpsa_scsi_do_simple_cmd_core(h, c);
1569 	/* no unmap needed here because no data xfer. */
1570 
1571 	ei = c->err_info;
1572 	if (ei->CommandStatus != 0) {
1573 		hpsa_scsi_interpret_error(c);
1574 		rc = -1;
1575 	}
1576 	cmd_special_free(h, c);
1577 	return rc;
1578 }
1579 
1580 static void hpsa_get_raid_level(struct ctlr_info *h,
1581 	unsigned char *scsi3addr, unsigned char *raid_level)
1582 {
1583 	int rc;
1584 	unsigned char *buf;
1585 
1586 	*raid_level = RAID_UNKNOWN;
1587 	buf = kzalloc(64, GFP_KERNEL);
1588 	if (!buf)
1589 		return;
1590 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64);
1591 	if (rc == 0)
1592 		*raid_level = buf[8];
1593 	if (*raid_level > RAID_UNKNOWN)
1594 		*raid_level = RAID_UNKNOWN;
1595 	kfree(buf);
1596 	return;
1597 }
1598 
1599 /* Get the device id from inquiry page 0x83 */
1600 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr,
1601 	unsigned char *device_id, int buflen)
1602 {
1603 	int rc;
1604 	unsigned char *buf;
1605 
1606 	if (buflen > 16)
1607 		buflen = 16;
1608 	buf = kzalloc(64, GFP_KERNEL);
1609 	if (!buf)
1610 		return -1;
1611 	rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64);
1612 	if (rc == 0)
1613 		memcpy(device_id, &buf[8], buflen);
1614 	kfree(buf);
1615 	return rc != 0;
1616 }
1617 
1618 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical,
1619 		struct ReportLUNdata *buf, int bufsize,
1620 		int extended_response)
1621 {
1622 	int rc = IO_OK;
1623 	struct CommandList *c;
1624 	unsigned char scsi3addr[8];
1625 	struct ErrorInfo *ei;
1626 
1627 	c = cmd_special_alloc(h);
1628 	if (c == NULL) {			/* trouble... */
1629 		dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
1630 		return -1;
1631 	}
1632 	/* address the controller */
1633 	memset(scsi3addr, 0, sizeof(scsi3addr));
1634 	fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h,
1635 		buf, bufsize, 0, scsi3addr, TYPE_CMD);
1636 	if (extended_response)
1637 		c->Request.CDB[1] = extended_response;
1638 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE);
1639 	ei = c->err_info;
1640 	if (ei->CommandStatus != 0 &&
1641 	    ei->CommandStatus != CMD_DATA_UNDERRUN) {
1642 		hpsa_scsi_interpret_error(c);
1643 		rc = -1;
1644 	}
1645 	cmd_special_free(h, c);
1646 	return rc;
1647 }
1648 
1649 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h,
1650 		struct ReportLUNdata *buf,
1651 		int bufsize, int extended_response)
1652 {
1653 	return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response);
1654 }
1655 
1656 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h,
1657 		struct ReportLUNdata *buf, int bufsize)
1658 {
1659 	return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0);
1660 }
1661 
1662 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device,
1663 	int bus, int target, int lun)
1664 {
1665 	device->bus = bus;
1666 	device->target = target;
1667 	device->lun = lun;
1668 }
1669 
1670 static int hpsa_update_device_info(struct ctlr_info *h,
1671 	unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device,
1672 	unsigned char *is_OBDR_device)
1673 {
1674 
1675 #define OBDR_SIG_OFFSET 43
1676 #define OBDR_TAPE_SIG "$DR-10"
1677 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1)
1678 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN)
1679 
1680 	unsigned char *inq_buff;
1681 	unsigned char *obdr_sig;
1682 
1683 	inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL);
1684 	if (!inq_buff)
1685 		goto bail_out;
1686 
1687 	/* Do an inquiry to the device to see what it is. */
1688 	if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff,
1689 		(unsigned char) OBDR_TAPE_INQ_SIZE) != 0) {
1690 		/* Inquiry failed (msg printed already) */
1691 		dev_err(&h->pdev->dev,
1692 			"hpsa_update_device_info: inquiry failed\n");
1693 		goto bail_out;
1694 	}
1695 
1696 	this_device->devtype = (inq_buff[0] & 0x1f);
1697 	memcpy(this_device->scsi3addr, scsi3addr, 8);
1698 	memcpy(this_device->vendor, &inq_buff[8],
1699 		sizeof(this_device->vendor));
1700 	memcpy(this_device->model, &inq_buff[16],
1701 		sizeof(this_device->model));
1702 	memset(this_device->device_id, 0,
1703 		sizeof(this_device->device_id));
1704 	hpsa_get_device_id(h, scsi3addr, this_device->device_id,
1705 		sizeof(this_device->device_id));
1706 
1707 	if (this_device->devtype == TYPE_DISK &&
1708 		is_logical_dev_addr_mode(scsi3addr))
1709 		hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level);
1710 	else
1711 		this_device->raid_level = RAID_UNKNOWN;
1712 
1713 	if (is_OBDR_device) {
1714 		/* See if this is a One-Button-Disaster-Recovery device
1715 		 * by looking for "$DR-10" at offset 43 in inquiry data.
1716 		 */
1717 		obdr_sig = &inq_buff[OBDR_SIG_OFFSET];
1718 		*is_OBDR_device = (this_device->devtype == TYPE_ROM &&
1719 					strncmp(obdr_sig, OBDR_TAPE_SIG,
1720 						OBDR_SIG_LEN) == 0);
1721 	}
1722 
1723 	kfree(inq_buff);
1724 	return 0;
1725 
1726 bail_out:
1727 	kfree(inq_buff);
1728 	return 1;
1729 }
1730 
1731 static unsigned char *ext_target_model[] = {
1732 	"MSA2012",
1733 	"MSA2024",
1734 	"MSA2312",
1735 	"MSA2324",
1736 	"P2000 G3 SAS",
1737 	NULL,
1738 };
1739 
1740 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device)
1741 {
1742 	int i;
1743 
1744 	for (i = 0; ext_target_model[i]; i++)
1745 		if (strncmp(device->model, ext_target_model[i],
1746 			strlen(ext_target_model[i])) == 0)
1747 			return 1;
1748 	return 0;
1749 }
1750 
1751 /* Helper function to assign bus, target, lun mapping of devices.
1752  * Puts non-external target logical volumes on bus 0, external target logical
1753  * volumes on bus 1, physical devices on bus 2. and the hba on bus 3.
1754  * Logical drive target and lun are assigned at this time, but
1755  * physical device lun and target assignment are deferred (assigned
1756  * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.)
1757  */
1758 static void figure_bus_target_lun(struct ctlr_info *h,
1759 	u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device)
1760 {
1761 	u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes));
1762 
1763 	if (!is_logical_dev_addr_mode(lunaddrbytes)) {
1764 		/* physical device, target and lun filled in later */
1765 		if (is_hba_lunid(lunaddrbytes))
1766 			hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff);
1767 		else
1768 			/* defer target, lun assignment for physical devices */
1769 			hpsa_set_bus_target_lun(device, 2, -1, -1);
1770 		return;
1771 	}
1772 	/* It's a logical device */
1773 	if (is_ext_target(h, device)) {
1774 		/* external target way, put logicals on bus 1
1775 		 * and match target/lun numbers box
1776 		 * reports, other smart array, bus 0, target 0, match lunid
1777 		 */
1778 		hpsa_set_bus_target_lun(device,
1779 			1, (lunid >> 16) & 0x3fff, lunid & 0x00ff);
1780 		return;
1781 	}
1782 	hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff);
1783 }
1784 
1785 /*
1786  * If there is no lun 0 on a target, linux won't find any devices.
1787  * For the external targets (arrays), we have to manually detect the enclosure
1788  * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report
1789  * it for some reason.  *tmpdevice is the target we're adding,
1790  * this_device is a pointer into the current element of currentsd[]
1791  * that we're building up in update_scsi_devices(), below.
1792  * lunzerobits is a bitmap that tracks which targets already have a
1793  * lun 0 assigned.
1794  * Returns 1 if an enclosure was added, 0 if not.
1795  */
1796 static int add_ext_target_dev(struct ctlr_info *h,
1797 	struct hpsa_scsi_dev_t *tmpdevice,
1798 	struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes,
1799 	unsigned long lunzerobits[], int *n_ext_target_devs)
1800 {
1801 	unsigned char scsi3addr[8];
1802 
1803 	if (test_bit(tmpdevice->target, lunzerobits))
1804 		return 0; /* There is already a lun 0 on this target. */
1805 
1806 	if (!is_logical_dev_addr_mode(lunaddrbytes))
1807 		return 0; /* It's the logical targets that may lack lun 0. */
1808 
1809 	if (!is_ext_target(h, tmpdevice))
1810 		return 0; /* Only external target devices have this problem. */
1811 
1812 	if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */
1813 		return 0;
1814 
1815 	memset(scsi3addr, 0, 8);
1816 	scsi3addr[3] = tmpdevice->target;
1817 	if (is_hba_lunid(scsi3addr))
1818 		return 0; /* Don't add the RAID controller here. */
1819 
1820 	if (is_scsi_rev_5(h))
1821 		return 0; /* p1210m doesn't need to do this. */
1822 
1823 	if (*n_ext_target_devs >= MAX_EXT_TARGETS) {
1824 		dev_warn(&h->pdev->dev, "Maximum number of external "
1825 			"target devices exceeded.  Check your hardware "
1826 			"configuration.");
1827 		return 0;
1828 	}
1829 
1830 	if (hpsa_update_device_info(h, scsi3addr, this_device, NULL))
1831 		return 0;
1832 	(*n_ext_target_devs)++;
1833 	hpsa_set_bus_target_lun(this_device,
1834 				tmpdevice->bus, tmpdevice->target, 0);
1835 	set_bit(tmpdevice->target, lunzerobits);
1836 	return 1;
1837 }
1838 
1839 /*
1840  * Do CISS_REPORT_PHYS and CISS_REPORT_LOG.  Data is returned in physdev,
1841  * logdev.  The number of luns in physdev and logdev are returned in
1842  * *nphysicals and *nlogicals, respectively.
1843  * Returns 0 on success, -1 otherwise.
1844  */
1845 static int hpsa_gather_lun_info(struct ctlr_info *h,
1846 	int reportlunsize,
1847 	struct ReportLUNdata *physdev, u32 *nphysicals,
1848 	struct ReportLUNdata *logdev, u32 *nlogicals)
1849 {
1850 	if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) {
1851 		dev_err(&h->pdev->dev, "report physical LUNs failed.\n");
1852 		return -1;
1853 	}
1854 	*nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8;
1855 	if (*nphysicals > HPSA_MAX_PHYS_LUN) {
1856 		dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded."
1857 			"  %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1858 			*nphysicals - HPSA_MAX_PHYS_LUN);
1859 		*nphysicals = HPSA_MAX_PHYS_LUN;
1860 	}
1861 	if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) {
1862 		dev_err(&h->pdev->dev, "report logical LUNs failed.\n");
1863 		return -1;
1864 	}
1865 	*nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8;
1866 	/* Reject Logicals in excess of our max capability. */
1867 	if (*nlogicals > HPSA_MAX_LUN) {
1868 		dev_warn(&h->pdev->dev,
1869 			"maximum logical LUNs (%d) exceeded.  "
1870 			"%d LUNs ignored.\n", HPSA_MAX_LUN,
1871 			*nlogicals - HPSA_MAX_LUN);
1872 			*nlogicals = HPSA_MAX_LUN;
1873 	}
1874 	if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) {
1875 		dev_warn(&h->pdev->dev,
1876 			"maximum logical + physical LUNs (%d) exceeded. "
1877 			"%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN,
1878 			*nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN);
1879 		*nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals;
1880 	}
1881 	return 0;
1882 }
1883 
1884 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i,
1885 	int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list,
1886 	struct ReportLUNdata *logdev_list)
1887 {
1888 	/* Helper function, figure out where the LUN ID info is coming from
1889 	 * given index i, lists of physical and logical devices, where in
1890 	 * the list the raid controller is supposed to appear (first or last)
1891 	 */
1892 
1893 	int logicals_start = nphysicals + (raid_ctlr_position == 0);
1894 	int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0);
1895 
1896 	if (i == raid_ctlr_position)
1897 		return RAID_CTLR_LUNID;
1898 
1899 	if (i < logicals_start)
1900 		return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0];
1901 
1902 	if (i < last_device)
1903 		return &logdev_list->LUN[i - nphysicals -
1904 			(raid_ctlr_position == 0)][0];
1905 	BUG();
1906 	return NULL;
1907 }
1908 
1909 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno)
1910 {
1911 	/* the idea here is we could get notified
1912 	 * that some devices have changed, so we do a report
1913 	 * physical luns and report logical luns cmd, and adjust
1914 	 * our list of devices accordingly.
1915 	 *
1916 	 * The scsi3addr's of devices won't change so long as the
1917 	 * adapter is not reset.  That means we can rescan and
1918 	 * tell which devices we already know about, vs. new
1919 	 * devices, vs.  disappearing devices.
1920 	 */
1921 	struct ReportLUNdata *physdev_list = NULL;
1922 	struct ReportLUNdata *logdev_list = NULL;
1923 	u32 nphysicals = 0;
1924 	u32 nlogicals = 0;
1925 	u32 ndev_allocated = 0;
1926 	struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice;
1927 	int ncurrent = 0;
1928 	int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8;
1929 	int i, n_ext_target_devs, ndevs_to_allocate;
1930 	int raid_ctlr_position;
1931 	DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS);
1932 
1933 	currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL);
1934 	physdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1935 	logdev_list = kzalloc(reportlunsize, GFP_KERNEL);
1936 	tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL);
1937 
1938 	if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) {
1939 		dev_err(&h->pdev->dev, "out of memory\n");
1940 		goto out;
1941 	}
1942 	memset(lunzerobits, 0, sizeof(lunzerobits));
1943 
1944 	if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals,
1945 			logdev_list, &nlogicals))
1946 		goto out;
1947 
1948 	/* We might see up to the maximum number of logical and physical disks
1949 	 * plus external target devices, and a device for the local RAID
1950 	 * controller.
1951 	 */
1952 	ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1;
1953 
1954 	/* Allocate the per device structures */
1955 	for (i = 0; i < ndevs_to_allocate; i++) {
1956 		if (i >= HPSA_MAX_DEVICES) {
1957 			dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded."
1958 				"  %d devices ignored.\n", HPSA_MAX_DEVICES,
1959 				ndevs_to_allocate - HPSA_MAX_DEVICES);
1960 			break;
1961 		}
1962 
1963 		currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL);
1964 		if (!currentsd[i]) {
1965 			dev_warn(&h->pdev->dev, "out of memory at %s:%d\n",
1966 				__FILE__, __LINE__);
1967 			goto out;
1968 		}
1969 		ndev_allocated++;
1970 	}
1971 
1972 	if (unlikely(is_scsi_rev_5(h)))
1973 		raid_ctlr_position = 0;
1974 	else
1975 		raid_ctlr_position = nphysicals + nlogicals;
1976 
1977 	/* adjust our table of devices */
1978 	n_ext_target_devs = 0;
1979 	for (i = 0; i < nphysicals + nlogicals + 1; i++) {
1980 		u8 *lunaddrbytes, is_OBDR = 0;
1981 
1982 		/* Figure out where the LUN ID info is coming from */
1983 		lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position,
1984 			i, nphysicals, nlogicals, physdev_list, logdev_list);
1985 		/* skip masked physical devices. */
1986 		if (lunaddrbytes[3] & 0xC0 &&
1987 			i < nphysicals + (raid_ctlr_position == 0))
1988 			continue;
1989 
1990 		/* Get device type, vendor, model, device id */
1991 		if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice,
1992 							&is_OBDR))
1993 			continue; /* skip it if we can't talk to it. */
1994 		figure_bus_target_lun(h, lunaddrbytes, tmpdevice);
1995 		this_device = currentsd[ncurrent];
1996 
1997 		/*
1998 		 * For external target devices, we have to insert a LUN 0 which
1999 		 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there
2000 		 * is nonetheless an enclosure device there.  We have to
2001 		 * present that otherwise linux won't find anything if
2002 		 * there is no lun 0.
2003 		 */
2004 		if (add_ext_target_dev(h, tmpdevice, this_device,
2005 				lunaddrbytes, lunzerobits,
2006 				&n_ext_target_devs)) {
2007 			ncurrent++;
2008 			this_device = currentsd[ncurrent];
2009 		}
2010 
2011 		*this_device = *tmpdevice;
2012 
2013 		switch (this_device->devtype) {
2014 		case TYPE_ROM:
2015 			/* We don't *really* support actual CD-ROM devices,
2016 			 * just "One Button Disaster Recovery" tape drive
2017 			 * which temporarily pretends to be a CD-ROM drive.
2018 			 * So we check that the device is really an OBDR tape
2019 			 * device by checking for "$DR-10" in bytes 43-48 of
2020 			 * the inquiry data.
2021 			 */
2022 			if (is_OBDR)
2023 				ncurrent++;
2024 			break;
2025 		case TYPE_DISK:
2026 			if (i < nphysicals)
2027 				break;
2028 			ncurrent++;
2029 			break;
2030 		case TYPE_TAPE:
2031 		case TYPE_MEDIUM_CHANGER:
2032 			ncurrent++;
2033 			break;
2034 		case TYPE_RAID:
2035 			/* Only present the Smartarray HBA as a RAID controller.
2036 			 * If it's a RAID controller other than the HBA itself
2037 			 * (an external RAID controller, MSA500 or similar)
2038 			 * don't present it.
2039 			 */
2040 			if (!is_hba_lunid(lunaddrbytes))
2041 				break;
2042 			ncurrent++;
2043 			break;
2044 		default:
2045 			break;
2046 		}
2047 		if (ncurrent >= HPSA_MAX_DEVICES)
2048 			break;
2049 	}
2050 	adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent);
2051 out:
2052 	kfree(tmpdevice);
2053 	for (i = 0; i < ndev_allocated; i++)
2054 		kfree(currentsd[i]);
2055 	kfree(currentsd);
2056 	kfree(physdev_list);
2057 	kfree(logdev_list);
2058 }
2059 
2060 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci
2061  * dma mapping  and fills in the scatter gather entries of the
2062  * hpsa command, cp.
2063  */
2064 static int hpsa_scatter_gather(struct ctlr_info *h,
2065 		struct CommandList *cp,
2066 		struct scsi_cmnd *cmd)
2067 {
2068 	unsigned int len;
2069 	struct scatterlist *sg;
2070 	u64 addr64;
2071 	int use_sg, i, sg_index, chained;
2072 	struct SGDescriptor *curr_sg;
2073 
2074 	BUG_ON(scsi_sg_count(cmd) > h->maxsgentries);
2075 
2076 	use_sg = scsi_dma_map(cmd);
2077 	if (use_sg < 0)
2078 		return use_sg;
2079 
2080 	if (!use_sg)
2081 		goto sglist_finished;
2082 
2083 	curr_sg = cp->SG;
2084 	chained = 0;
2085 	sg_index = 0;
2086 	scsi_for_each_sg(cmd, sg, use_sg, i) {
2087 		if (i == h->max_cmd_sg_entries - 1 &&
2088 			use_sg > h->max_cmd_sg_entries) {
2089 			chained = 1;
2090 			curr_sg = h->cmd_sg_list[cp->cmdindex];
2091 			sg_index = 0;
2092 		}
2093 		addr64 = (u64) sg_dma_address(sg);
2094 		len  = sg_dma_len(sg);
2095 		curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL);
2096 		curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL);
2097 		curr_sg->Len = len;
2098 		curr_sg->Ext = 0;  /* we are not chaining */
2099 		curr_sg++;
2100 	}
2101 
2102 	if (use_sg + chained > h->maxSG)
2103 		h->maxSG = use_sg + chained;
2104 
2105 	if (chained) {
2106 		cp->Header.SGList = h->max_cmd_sg_entries;
2107 		cp->Header.SGTotal = (u16) (use_sg + 1);
2108 		hpsa_map_sg_chain_block(h, cp);
2109 		return 0;
2110 	}
2111 
2112 sglist_finished:
2113 
2114 	cp->Header.SGList = (u8) use_sg;   /* no. SGs contig in this cmd */
2115 	cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */
2116 	return 0;
2117 }
2118 
2119 
2120 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd,
2121 	void (*done)(struct scsi_cmnd *))
2122 {
2123 	struct ctlr_info *h;
2124 	struct hpsa_scsi_dev_t *dev;
2125 	unsigned char scsi3addr[8];
2126 	struct CommandList *c;
2127 	unsigned long flags;
2128 
2129 	/* Get the ptr to our adapter structure out of cmd->host. */
2130 	h = sdev_to_hba(cmd->device);
2131 	dev = cmd->device->hostdata;
2132 	if (!dev) {
2133 		cmd->result = DID_NO_CONNECT << 16;
2134 		done(cmd);
2135 		return 0;
2136 	}
2137 	memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr));
2138 
2139 	spin_lock_irqsave(&h->lock, flags);
2140 	if (unlikely(h->lockup_detected)) {
2141 		spin_unlock_irqrestore(&h->lock, flags);
2142 		cmd->result = DID_ERROR << 16;
2143 		done(cmd);
2144 		return 0;
2145 	}
2146 	spin_unlock_irqrestore(&h->lock, flags);
2147 	c = cmd_alloc(h);
2148 	if (c == NULL) {			/* trouble... */
2149 		dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n");
2150 		return SCSI_MLQUEUE_HOST_BUSY;
2151 	}
2152 
2153 	/* Fill in the command list header */
2154 
2155 	cmd->scsi_done = done;    /* save this for use by completion code */
2156 
2157 	/* save c in case we have to abort it  */
2158 	cmd->host_scribble = (unsigned char *) c;
2159 
2160 	c->cmd_type = CMD_SCSI;
2161 	c->scsi_cmd = cmd;
2162 	c->Header.ReplyQueue = 0;  /* unused in simple mode */
2163 	memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8);
2164 	c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT);
2165 	c->Header.Tag.lower |= DIRECT_LOOKUP_BIT;
2166 
2167 	/* Fill in the request block... */
2168 
2169 	c->Request.Timeout = 0;
2170 	memset(c->Request.CDB, 0, sizeof(c->Request.CDB));
2171 	BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB));
2172 	c->Request.CDBLen = cmd->cmd_len;
2173 	memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len);
2174 	c->Request.Type.Type = TYPE_CMD;
2175 	c->Request.Type.Attribute = ATTR_SIMPLE;
2176 	switch (cmd->sc_data_direction) {
2177 	case DMA_TO_DEVICE:
2178 		c->Request.Type.Direction = XFER_WRITE;
2179 		break;
2180 	case DMA_FROM_DEVICE:
2181 		c->Request.Type.Direction = XFER_READ;
2182 		break;
2183 	case DMA_NONE:
2184 		c->Request.Type.Direction = XFER_NONE;
2185 		break;
2186 	case DMA_BIDIRECTIONAL:
2187 		/* This can happen if a buggy application does a scsi passthru
2188 		 * and sets both inlen and outlen to non-zero. ( see
2189 		 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() )
2190 		 */
2191 
2192 		c->Request.Type.Direction = XFER_RSVD;
2193 		/* This is technically wrong, and hpsa controllers should
2194 		 * reject it with CMD_INVALID, which is the most correct
2195 		 * response, but non-fibre backends appear to let it
2196 		 * slide by, and give the same results as if this field
2197 		 * were set correctly.  Either way is acceptable for
2198 		 * our purposes here.
2199 		 */
2200 
2201 		break;
2202 
2203 	default:
2204 		dev_err(&h->pdev->dev, "unknown data direction: %d\n",
2205 			cmd->sc_data_direction);
2206 		BUG();
2207 		break;
2208 	}
2209 
2210 	if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */
2211 		cmd_free(h, c);
2212 		return SCSI_MLQUEUE_HOST_BUSY;
2213 	}
2214 	enqueue_cmd_and_start_io(h, c);
2215 	/* the cmd'll come back via intr handler in complete_scsi_command()  */
2216 	return 0;
2217 }
2218 
2219 static DEF_SCSI_QCMD(hpsa_scsi_queue_command)
2220 
2221 static void hpsa_scan_start(struct Scsi_Host *sh)
2222 {
2223 	struct ctlr_info *h = shost_to_hba(sh);
2224 	unsigned long flags;
2225 
2226 	/* wait until any scan already in progress is finished. */
2227 	while (1) {
2228 		spin_lock_irqsave(&h->scan_lock, flags);
2229 		if (h->scan_finished)
2230 			break;
2231 		spin_unlock_irqrestore(&h->scan_lock, flags);
2232 		wait_event(h->scan_wait_queue, h->scan_finished);
2233 		/* Note: We don't need to worry about a race between this
2234 		 * thread and driver unload because the midlayer will
2235 		 * have incremented the reference count, so unload won't
2236 		 * happen if we're in here.
2237 		 */
2238 	}
2239 	h->scan_finished = 0; /* mark scan as in progress */
2240 	spin_unlock_irqrestore(&h->scan_lock, flags);
2241 
2242 	hpsa_update_scsi_devices(h, h->scsi_host->host_no);
2243 
2244 	spin_lock_irqsave(&h->scan_lock, flags);
2245 	h->scan_finished = 1; /* mark scan as finished. */
2246 	wake_up_all(&h->scan_wait_queue);
2247 	spin_unlock_irqrestore(&h->scan_lock, flags);
2248 }
2249 
2250 static int hpsa_scan_finished(struct Scsi_Host *sh,
2251 	unsigned long elapsed_time)
2252 {
2253 	struct ctlr_info *h = shost_to_hba(sh);
2254 	unsigned long flags;
2255 	int finished;
2256 
2257 	spin_lock_irqsave(&h->scan_lock, flags);
2258 	finished = h->scan_finished;
2259 	spin_unlock_irqrestore(&h->scan_lock, flags);
2260 	return finished;
2261 }
2262 
2263 static int hpsa_change_queue_depth(struct scsi_device *sdev,
2264 	int qdepth, int reason)
2265 {
2266 	struct ctlr_info *h = sdev_to_hba(sdev);
2267 
2268 	if (reason != SCSI_QDEPTH_DEFAULT)
2269 		return -ENOTSUPP;
2270 
2271 	if (qdepth < 1)
2272 		qdepth = 1;
2273 	else
2274 		if (qdepth > h->nr_cmds)
2275 			qdepth = h->nr_cmds;
2276 	scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
2277 	return sdev->queue_depth;
2278 }
2279 
2280 static void hpsa_unregister_scsi(struct ctlr_info *h)
2281 {
2282 	/* we are being forcibly unloaded, and may not refuse. */
2283 	scsi_remove_host(h->scsi_host);
2284 	scsi_host_put(h->scsi_host);
2285 	h->scsi_host = NULL;
2286 }
2287 
2288 static int hpsa_register_scsi(struct ctlr_info *h)
2289 {
2290 	struct Scsi_Host *sh;
2291 	int error;
2292 
2293 	sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h));
2294 	if (sh == NULL)
2295 		goto fail;
2296 
2297 	sh->io_port = 0;
2298 	sh->n_io_port = 0;
2299 	sh->this_id = -1;
2300 	sh->max_channel = 3;
2301 	sh->max_cmd_len = MAX_COMMAND_SIZE;
2302 	sh->max_lun = HPSA_MAX_LUN;
2303 	sh->max_id = HPSA_MAX_LUN;
2304 	sh->can_queue = h->nr_cmds;
2305 	sh->cmd_per_lun = h->nr_cmds;
2306 	sh->sg_tablesize = h->maxsgentries;
2307 	h->scsi_host = sh;
2308 	sh->hostdata[0] = (unsigned long) h;
2309 	sh->irq = h->intr[h->intr_mode];
2310 	sh->unique_id = sh->irq;
2311 	error = scsi_add_host(sh, &h->pdev->dev);
2312 	if (error)
2313 		goto fail_host_put;
2314 	scsi_scan_host(sh);
2315 	return 0;
2316 
2317  fail_host_put:
2318 	dev_err(&h->pdev->dev, "%s: scsi_add_host"
2319 		" failed for controller %d\n", __func__, h->ctlr);
2320 	scsi_host_put(sh);
2321 	return error;
2322  fail:
2323 	dev_err(&h->pdev->dev, "%s: scsi_host_alloc"
2324 		" failed for controller %d\n", __func__, h->ctlr);
2325 	return -ENOMEM;
2326 }
2327 
2328 static int wait_for_device_to_become_ready(struct ctlr_info *h,
2329 	unsigned char lunaddr[])
2330 {
2331 	int rc = 0;
2332 	int count = 0;
2333 	int waittime = 1; /* seconds */
2334 	struct CommandList *c;
2335 
2336 	c = cmd_special_alloc(h);
2337 	if (!c) {
2338 		dev_warn(&h->pdev->dev, "out of memory in "
2339 			"wait_for_device_to_become_ready.\n");
2340 		return IO_ERROR;
2341 	}
2342 
2343 	/* Send test unit ready until device ready, or give up. */
2344 	while (count < HPSA_TUR_RETRY_LIMIT) {
2345 
2346 		/* Wait for a bit.  do this first, because if we send
2347 		 * the TUR right away, the reset will just abort it.
2348 		 */
2349 		msleep(1000 * waittime);
2350 		count++;
2351 
2352 		/* Increase wait time with each try, up to a point. */
2353 		if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS)
2354 			waittime = waittime * 2;
2355 
2356 		/* Send the Test Unit Ready */
2357 		fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD);
2358 		hpsa_scsi_do_simple_cmd_core(h, c);
2359 		/* no unmap needed here because no data xfer. */
2360 
2361 		if (c->err_info->CommandStatus == CMD_SUCCESS)
2362 			break;
2363 
2364 		if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
2365 			c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION &&
2366 			(c->err_info->SenseInfo[2] == NO_SENSE ||
2367 			c->err_info->SenseInfo[2] == UNIT_ATTENTION))
2368 			break;
2369 
2370 		dev_warn(&h->pdev->dev, "waiting %d secs "
2371 			"for device to become ready.\n", waittime);
2372 		rc = 1; /* device not ready. */
2373 	}
2374 
2375 	if (rc)
2376 		dev_warn(&h->pdev->dev, "giving up on device.\n");
2377 	else
2378 		dev_warn(&h->pdev->dev, "device is ready.\n");
2379 
2380 	cmd_special_free(h, c);
2381 	return rc;
2382 }
2383 
2384 /* Need at least one of these error handlers to keep ../scsi/hosts.c from
2385  * complaining.  Doing a host- or bus-reset can't do anything good here.
2386  */
2387 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd)
2388 {
2389 	int rc;
2390 	struct ctlr_info *h;
2391 	struct hpsa_scsi_dev_t *dev;
2392 
2393 	/* find the controller to which the command to be aborted was sent */
2394 	h = sdev_to_hba(scsicmd->device);
2395 	if (h == NULL) /* paranoia */
2396 		return FAILED;
2397 	dev = scsicmd->device->hostdata;
2398 	if (!dev) {
2399 		dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: "
2400 			"device lookup failed.\n");
2401 		return FAILED;
2402 	}
2403 	dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n",
2404 		h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2405 	/* send a reset to the SCSI LUN which the command was sent to */
2406 	rc = hpsa_send_reset(h, dev->scsi3addr);
2407 	if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0)
2408 		return SUCCESS;
2409 
2410 	dev_warn(&h->pdev->dev, "resetting device failed.\n");
2411 	return FAILED;
2412 }
2413 
2414 static void swizzle_abort_tag(u8 *tag)
2415 {
2416 	u8 original_tag[8];
2417 
2418 	memcpy(original_tag, tag, 8);
2419 	tag[0] = original_tag[3];
2420 	tag[1] = original_tag[2];
2421 	tag[2] = original_tag[1];
2422 	tag[3] = original_tag[0];
2423 	tag[4] = original_tag[7];
2424 	tag[5] = original_tag[6];
2425 	tag[6] = original_tag[5];
2426 	tag[7] = original_tag[4];
2427 }
2428 
2429 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr,
2430 	struct CommandList *abort, int swizzle)
2431 {
2432 	int rc = IO_OK;
2433 	struct CommandList *c;
2434 	struct ErrorInfo *ei;
2435 
2436 	c = cmd_special_alloc(h);
2437 	if (c == NULL) {	/* trouble... */
2438 		dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
2439 		return -ENOMEM;
2440 	}
2441 
2442 	fill_cmd(c, HPSA_ABORT_MSG, h, abort, 0, 0, scsi3addr, TYPE_MSG);
2443 	if (swizzle)
2444 		swizzle_abort_tag(&c->Request.CDB[4]);
2445 	hpsa_scsi_do_simple_cmd_core(h, c);
2446 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n",
2447 		__func__, abort->Header.Tag.upper, abort->Header.Tag.lower);
2448 	/* no unmap needed here because no data xfer. */
2449 
2450 	ei = c->err_info;
2451 	switch (ei->CommandStatus) {
2452 	case CMD_SUCCESS:
2453 		break;
2454 	case CMD_UNABORTABLE: /* Very common, don't make noise. */
2455 		rc = -1;
2456 		break;
2457 	default:
2458 		dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n",
2459 			__func__, abort->Header.Tag.upper,
2460 			abort->Header.Tag.lower);
2461 		hpsa_scsi_interpret_error(c);
2462 		rc = -1;
2463 		break;
2464 	}
2465 	cmd_special_free(h, c);
2466 	dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__,
2467 		abort->Header.Tag.upper, abort->Header.Tag.lower);
2468 	return rc;
2469 }
2470 
2471 /*
2472  * hpsa_find_cmd_in_queue
2473  *
2474  * Used to determine whether a command (find) is still present
2475  * in queue_head.   Optionally excludes the last element of queue_head.
2476  *
2477  * This is used to avoid unnecessary aborts.  Commands in h->reqQ have
2478  * not yet been submitted, and so can be aborted by the driver without
2479  * sending an abort to the hardware.
2480  *
2481  * Returns pointer to command if found in queue, NULL otherwise.
2482  */
2483 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h,
2484 			struct scsi_cmnd *find, struct list_head *queue_head)
2485 {
2486 	unsigned long flags;
2487 	struct CommandList *c = NULL;	/* ptr into cmpQ */
2488 
2489 	if (!find)
2490 		return 0;
2491 	spin_lock_irqsave(&h->lock, flags);
2492 	list_for_each_entry(c, queue_head, list) {
2493 		if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */
2494 			continue;
2495 		if (c->scsi_cmd == find) {
2496 			spin_unlock_irqrestore(&h->lock, flags);
2497 			return c;
2498 		}
2499 	}
2500 	spin_unlock_irqrestore(&h->lock, flags);
2501 	return NULL;
2502 }
2503 
2504 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h,
2505 					u8 *tag, struct list_head *queue_head)
2506 {
2507 	unsigned long flags;
2508 	struct CommandList *c;
2509 
2510 	spin_lock_irqsave(&h->lock, flags);
2511 	list_for_each_entry(c, queue_head, list) {
2512 		if (memcmp(&c->Header.Tag, tag, 8) != 0)
2513 			continue;
2514 		spin_unlock_irqrestore(&h->lock, flags);
2515 		return c;
2516 	}
2517 	spin_unlock_irqrestore(&h->lock, flags);
2518 	return NULL;
2519 }
2520 
2521 /* Some Smart Arrays need the abort tag swizzled, and some don't.  It's hard to
2522  * tell which kind we're dealing with, so we send the abort both ways.  There
2523  * shouldn't be any collisions between swizzled and unswizzled tags due to the
2524  * way we construct our tags but we check anyway in case the assumptions which
2525  * make this true someday become false.
2526  */
2527 static int hpsa_send_abort_both_ways(struct ctlr_info *h,
2528 	unsigned char *scsi3addr, struct CommandList *abort)
2529 {
2530 	u8 swizzled_tag[8];
2531 	struct CommandList *c;
2532 	int rc = 0, rc2 = 0;
2533 
2534 	/* we do not expect to find the swizzled tag in our queue, but
2535 	 * check anyway just to be sure the assumptions which make this
2536 	 * the case haven't become wrong.
2537 	 */
2538 	memcpy(swizzled_tag, &abort->Request.CDB[4], 8);
2539 	swizzle_abort_tag(swizzled_tag);
2540 	c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ);
2541 	if (c != NULL) {
2542 		dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n");
2543 		return hpsa_send_abort(h, scsi3addr, abort, 0);
2544 	}
2545 	rc = hpsa_send_abort(h, scsi3addr, abort, 0);
2546 
2547 	/* if the command is still in our queue, we can't conclude that it was
2548 	 * aborted (it might have just completed normally) but in any case
2549 	 * we don't need to try to abort it another way.
2550 	 */
2551 	c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ);
2552 	if (c)
2553 		rc2 = hpsa_send_abort(h, scsi3addr, abort, 1);
2554 	return rc && rc2;
2555 }
2556 
2557 /* Send an abort for the specified command.
2558  *	If the device and controller support it,
2559  *		send a task abort request.
2560  */
2561 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc)
2562 {
2563 
2564 	int i, rc;
2565 	struct ctlr_info *h;
2566 	struct hpsa_scsi_dev_t *dev;
2567 	struct CommandList *abort; /* pointer to command to be aborted */
2568 	struct CommandList *found;
2569 	struct scsi_cmnd *as;	/* ptr to scsi cmd inside aborted command. */
2570 	char msg[256];		/* For debug messaging. */
2571 	int ml = 0;
2572 
2573 	/* Find the controller of the command to be aborted */
2574 	h = sdev_to_hba(sc->device);
2575 	if (WARN(h == NULL,
2576 			"ABORT REQUEST FAILED, Controller lookup failed.\n"))
2577 		return FAILED;
2578 
2579 	/* Check that controller supports some kind of task abort */
2580 	if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) &&
2581 		!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags))
2582 		return FAILED;
2583 
2584 	memset(msg, 0, sizeof(msg));
2585 	ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ",
2586 		h->scsi_host->host_no, sc->device->channel,
2587 		sc->device->id, sc->device->lun);
2588 
2589 	/* Find the device of the command to be aborted */
2590 	dev = sc->device->hostdata;
2591 	if (!dev) {
2592 		dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n",
2593 				msg);
2594 		return FAILED;
2595 	}
2596 
2597 	/* Get SCSI command to be aborted */
2598 	abort = (struct CommandList *) sc->host_scribble;
2599 	if (abort == NULL) {
2600 		dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n",
2601 				msg);
2602 		return FAILED;
2603 	}
2604 
2605 	ml += sprintf(msg+ml, "Tag:0x%08x:%08x ",
2606 		abort->Header.Tag.upper, abort->Header.Tag.lower);
2607 	as  = (struct scsi_cmnd *) abort->scsi_cmd;
2608 	if (as != NULL)
2609 		ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ",
2610 			as->cmnd[0], as->serial_number);
2611 	dev_dbg(&h->pdev->dev, "%s\n", msg);
2612 	dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n",
2613 		h->scsi_host->host_no, dev->bus, dev->target, dev->lun);
2614 
2615 	/* Search reqQ to See if command is queued but not submitted,
2616 	 * if so, complete the command with aborted status and remove
2617 	 * it from the reqQ.
2618 	 */
2619 	found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ);
2620 	if (found) {
2621 		found->err_info->CommandStatus = CMD_ABORTED;
2622 		finish_cmd(found);
2623 		dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n",
2624 				msg);
2625 		return SUCCESS;
2626 	}
2627 
2628 	/* not in reqQ, if also not in cmpQ, must have already completed */
2629 	found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2630 	if (!found)  {
2631 		dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n",
2632 				msg);
2633 		return SUCCESS;
2634 	}
2635 
2636 	/*
2637 	 * Command is in flight, or possibly already completed
2638 	 * by the firmware (but not to the scsi mid layer) but we can't
2639 	 * distinguish which.  Send the abort down.
2640 	 */
2641 	rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort);
2642 	if (rc != 0) {
2643 		dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg);
2644 		dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n",
2645 			h->scsi_host->host_no,
2646 			dev->bus, dev->target, dev->lun);
2647 		return FAILED;
2648 	}
2649 	dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg);
2650 
2651 	/* If the abort(s) above completed and actually aborted the
2652 	 * command, then the command to be aborted should already be
2653 	 * completed.  If not, wait around a bit more to see if they
2654 	 * manage to complete normally.
2655 	 */
2656 #define ABORT_COMPLETE_WAIT_SECS 30
2657 	for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) {
2658 		found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ);
2659 		if (!found)
2660 			return SUCCESS;
2661 		msleep(100);
2662 	}
2663 	dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n",
2664 		msg, ABORT_COMPLETE_WAIT_SECS);
2665 	return FAILED;
2666 }
2667 
2668 
2669 /*
2670  * For operations that cannot sleep, a command block is allocated at init,
2671  * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
2672  * which ones are free or in use.  Lock must be held when calling this.
2673  * cmd_free() is the complement.
2674  */
2675 static struct CommandList *cmd_alloc(struct ctlr_info *h)
2676 {
2677 	struct CommandList *c;
2678 	int i;
2679 	union u64bit temp64;
2680 	dma_addr_t cmd_dma_handle, err_dma_handle;
2681 	unsigned long flags;
2682 
2683 	spin_lock_irqsave(&h->lock, flags);
2684 	do {
2685 		i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
2686 		if (i == h->nr_cmds) {
2687 			spin_unlock_irqrestore(&h->lock, flags);
2688 			return NULL;
2689 		}
2690 	} while (test_and_set_bit
2691 		 (i & (BITS_PER_LONG - 1),
2692 		  h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0);
2693 	h->nr_allocs++;
2694 	spin_unlock_irqrestore(&h->lock, flags);
2695 
2696 	c = h->cmd_pool + i;
2697 	memset(c, 0, sizeof(*c));
2698 	cmd_dma_handle = h->cmd_pool_dhandle
2699 	    + i * sizeof(*c);
2700 	c->err_info = h->errinfo_pool + i;
2701 	memset(c->err_info, 0, sizeof(*c->err_info));
2702 	err_dma_handle = h->errinfo_pool_dhandle
2703 	    + i * sizeof(*c->err_info);
2704 
2705 	c->cmdindex = i;
2706 
2707 	INIT_LIST_HEAD(&c->list);
2708 	c->busaddr = (u32) cmd_dma_handle;
2709 	temp64.val = (u64) err_dma_handle;
2710 	c->ErrDesc.Addr.lower = temp64.val32.lower;
2711 	c->ErrDesc.Addr.upper = temp64.val32.upper;
2712 	c->ErrDesc.Len = sizeof(*c->err_info);
2713 
2714 	c->h = h;
2715 	return c;
2716 }
2717 
2718 /* For operations that can wait for kmalloc to possibly sleep,
2719  * this routine can be called. Lock need not be held to call
2720  * cmd_special_alloc. cmd_special_free() is the complement.
2721  */
2722 static struct CommandList *cmd_special_alloc(struct ctlr_info *h)
2723 {
2724 	struct CommandList *c;
2725 	union u64bit temp64;
2726 	dma_addr_t cmd_dma_handle, err_dma_handle;
2727 
2728 	c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle);
2729 	if (c == NULL)
2730 		return NULL;
2731 	memset(c, 0, sizeof(*c));
2732 
2733 	c->cmdindex = -1;
2734 
2735 	c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info),
2736 		    &err_dma_handle);
2737 
2738 	if (c->err_info == NULL) {
2739 		pci_free_consistent(h->pdev,
2740 			sizeof(*c), c, cmd_dma_handle);
2741 		return NULL;
2742 	}
2743 	memset(c->err_info, 0, sizeof(*c->err_info));
2744 
2745 	INIT_LIST_HEAD(&c->list);
2746 	c->busaddr = (u32) cmd_dma_handle;
2747 	temp64.val = (u64) err_dma_handle;
2748 	c->ErrDesc.Addr.lower = temp64.val32.lower;
2749 	c->ErrDesc.Addr.upper = temp64.val32.upper;
2750 	c->ErrDesc.Len = sizeof(*c->err_info);
2751 
2752 	c->h = h;
2753 	return c;
2754 }
2755 
2756 static void cmd_free(struct ctlr_info *h, struct CommandList *c)
2757 {
2758 	int i;
2759 	unsigned long flags;
2760 
2761 	i = c - h->cmd_pool;
2762 	spin_lock_irqsave(&h->lock, flags);
2763 	clear_bit(i & (BITS_PER_LONG - 1),
2764 		  h->cmd_pool_bits + (i / BITS_PER_LONG));
2765 	h->nr_frees++;
2766 	spin_unlock_irqrestore(&h->lock, flags);
2767 }
2768 
2769 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c)
2770 {
2771 	union u64bit temp64;
2772 
2773 	temp64.val32.lower = c->ErrDesc.Addr.lower;
2774 	temp64.val32.upper = c->ErrDesc.Addr.upper;
2775 	pci_free_consistent(h->pdev, sizeof(*c->err_info),
2776 			    c->err_info, (dma_addr_t) temp64.val);
2777 	pci_free_consistent(h->pdev, sizeof(*c),
2778 			    c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK));
2779 }
2780 
2781 #ifdef CONFIG_COMPAT
2782 
2783 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg)
2784 {
2785 	IOCTL32_Command_struct __user *arg32 =
2786 	    (IOCTL32_Command_struct __user *) arg;
2787 	IOCTL_Command_struct arg64;
2788 	IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
2789 	int err;
2790 	u32 cp;
2791 
2792 	memset(&arg64, 0, sizeof(arg64));
2793 	err = 0;
2794 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2795 			   sizeof(arg64.LUN_info));
2796 	err |= copy_from_user(&arg64.Request, &arg32->Request,
2797 			   sizeof(arg64.Request));
2798 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2799 			   sizeof(arg64.error_info));
2800 	err |= get_user(arg64.buf_size, &arg32->buf_size);
2801 	err |= get_user(cp, &arg32->buf);
2802 	arg64.buf = compat_ptr(cp);
2803 	err |= copy_to_user(p, &arg64, sizeof(arg64));
2804 
2805 	if (err)
2806 		return -EFAULT;
2807 
2808 	err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p);
2809 	if (err)
2810 		return err;
2811 	err |= copy_in_user(&arg32->error_info, &p->error_info,
2812 			 sizeof(arg32->error_info));
2813 	if (err)
2814 		return -EFAULT;
2815 	return err;
2816 }
2817 
2818 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev,
2819 	int cmd, void *arg)
2820 {
2821 	BIG_IOCTL32_Command_struct __user *arg32 =
2822 	    (BIG_IOCTL32_Command_struct __user *) arg;
2823 	BIG_IOCTL_Command_struct arg64;
2824 	BIG_IOCTL_Command_struct __user *p =
2825 	    compat_alloc_user_space(sizeof(arg64));
2826 	int err;
2827 	u32 cp;
2828 
2829 	memset(&arg64, 0, sizeof(arg64));
2830 	err = 0;
2831 	err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
2832 			   sizeof(arg64.LUN_info));
2833 	err |= copy_from_user(&arg64.Request, &arg32->Request,
2834 			   sizeof(arg64.Request));
2835 	err |= copy_from_user(&arg64.error_info, &arg32->error_info,
2836 			   sizeof(arg64.error_info));
2837 	err |= get_user(arg64.buf_size, &arg32->buf_size);
2838 	err |= get_user(arg64.malloc_size, &arg32->malloc_size);
2839 	err |= get_user(cp, &arg32->buf);
2840 	arg64.buf = compat_ptr(cp);
2841 	err |= copy_to_user(p, &arg64, sizeof(arg64));
2842 
2843 	if (err)
2844 		return -EFAULT;
2845 
2846 	err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p);
2847 	if (err)
2848 		return err;
2849 	err |= copy_in_user(&arg32->error_info, &p->error_info,
2850 			 sizeof(arg32->error_info));
2851 	if (err)
2852 		return -EFAULT;
2853 	return err;
2854 }
2855 
2856 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg)
2857 {
2858 	switch (cmd) {
2859 	case CCISS_GETPCIINFO:
2860 	case CCISS_GETINTINFO:
2861 	case CCISS_SETINTINFO:
2862 	case CCISS_GETNODENAME:
2863 	case CCISS_SETNODENAME:
2864 	case CCISS_GETHEARTBEAT:
2865 	case CCISS_GETBUSTYPES:
2866 	case CCISS_GETFIRMVER:
2867 	case CCISS_GETDRIVVER:
2868 	case CCISS_REVALIDVOLS:
2869 	case CCISS_DEREGDISK:
2870 	case CCISS_REGNEWDISK:
2871 	case CCISS_REGNEWD:
2872 	case CCISS_RESCANDISK:
2873 	case CCISS_GETLUNINFO:
2874 		return hpsa_ioctl(dev, cmd, arg);
2875 
2876 	case CCISS_PASSTHRU32:
2877 		return hpsa_ioctl32_passthru(dev, cmd, arg);
2878 	case CCISS_BIG_PASSTHRU32:
2879 		return hpsa_ioctl32_big_passthru(dev, cmd, arg);
2880 
2881 	default:
2882 		return -ENOIOCTLCMD;
2883 	}
2884 }
2885 #endif
2886 
2887 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp)
2888 {
2889 	struct hpsa_pci_info pciinfo;
2890 
2891 	if (!argp)
2892 		return -EINVAL;
2893 	pciinfo.domain = pci_domain_nr(h->pdev->bus);
2894 	pciinfo.bus = h->pdev->bus->number;
2895 	pciinfo.dev_fn = h->pdev->devfn;
2896 	pciinfo.board_id = h->board_id;
2897 	if (copy_to_user(argp, &pciinfo, sizeof(pciinfo)))
2898 		return -EFAULT;
2899 	return 0;
2900 }
2901 
2902 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp)
2903 {
2904 	DriverVer_type DriverVer;
2905 	unsigned char vmaj, vmin, vsubmin;
2906 	int rc;
2907 
2908 	rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu",
2909 		&vmaj, &vmin, &vsubmin);
2910 	if (rc != 3) {
2911 		dev_info(&h->pdev->dev, "driver version string '%s' "
2912 			"unrecognized.", HPSA_DRIVER_VERSION);
2913 		vmaj = 0;
2914 		vmin = 0;
2915 		vsubmin = 0;
2916 	}
2917 	DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin;
2918 	if (!argp)
2919 		return -EINVAL;
2920 	if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
2921 		return -EFAULT;
2922 	return 0;
2923 }
2924 
2925 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp)
2926 {
2927 	IOCTL_Command_struct iocommand;
2928 	struct CommandList *c;
2929 	char *buff = NULL;
2930 	union u64bit temp64;
2931 
2932 	if (!argp)
2933 		return -EINVAL;
2934 	if (!capable(CAP_SYS_RAWIO))
2935 		return -EPERM;
2936 	if (copy_from_user(&iocommand, argp, sizeof(iocommand)))
2937 		return -EFAULT;
2938 	if ((iocommand.buf_size < 1) &&
2939 	    (iocommand.Request.Type.Direction != XFER_NONE)) {
2940 		return -EINVAL;
2941 	}
2942 	if (iocommand.buf_size > 0) {
2943 		buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
2944 		if (buff == NULL)
2945 			return -EFAULT;
2946 		if (iocommand.Request.Type.Direction == XFER_WRITE) {
2947 			/* Copy the data into the buffer we created */
2948 			if (copy_from_user(buff, iocommand.buf,
2949 				iocommand.buf_size)) {
2950 				kfree(buff);
2951 				return -EFAULT;
2952 			}
2953 		} else {
2954 			memset(buff, 0, iocommand.buf_size);
2955 		}
2956 	}
2957 	c = cmd_special_alloc(h);
2958 	if (c == NULL) {
2959 		kfree(buff);
2960 		return -ENOMEM;
2961 	}
2962 	/* Fill in the command type */
2963 	c->cmd_type = CMD_IOCTL_PEND;
2964 	/* Fill in Command Header */
2965 	c->Header.ReplyQueue = 0; /* unused in simple mode */
2966 	if (iocommand.buf_size > 0) {	/* buffer to fill */
2967 		c->Header.SGList = 1;
2968 		c->Header.SGTotal = 1;
2969 	} else	{ /* no buffers to fill */
2970 		c->Header.SGList = 0;
2971 		c->Header.SGTotal = 0;
2972 	}
2973 	memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN));
2974 	/* use the kernel address the cmd block for tag */
2975 	c->Header.Tag.lower = c->busaddr;
2976 
2977 	/* Fill in Request block */
2978 	memcpy(&c->Request, &iocommand.Request,
2979 		sizeof(c->Request));
2980 
2981 	/* Fill in the scatter gather information */
2982 	if (iocommand.buf_size > 0) {
2983 		temp64.val = pci_map_single(h->pdev, buff,
2984 			iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
2985 		c->SG[0].Addr.lower = temp64.val32.lower;
2986 		c->SG[0].Addr.upper = temp64.val32.upper;
2987 		c->SG[0].Len = iocommand.buf_size;
2988 		c->SG[0].Ext = 0; /* we are not chaining*/
2989 	}
2990 	hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
2991 	if (iocommand.buf_size > 0)
2992 		hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL);
2993 	check_ioctl_unit_attention(h, c);
2994 
2995 	/* Copy the error information out */
2996 	memcpy(&iocommand.error_info, c->err_info,
2997 		sizeof(iocommand.error_info));
2998 	if (copy_to_user(argp, &iocommand, sizeof(iocommand))) {
2999 		kfree(buff);
3000 		cmd_special_free(h, c);
3001 		return -EFAULT;
3002 	}
3003 	if (iocommand.Request.Type.Direction == XFER_READ &&
3004 		iocommand.buf_size > 0) {
3005 		/* Copy the data out of the buffer we created */
3006 		if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
3007 			kfree(buff);
3008 			cmd_special_free(h, c);
3009 			return -EFAULT;
3010 		}
3011 	}
3012 	kfree(buff);
3013 	cmd_special_free(h, c);
3014 	return 0;
3015 }
3016 
3017 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp)
3018 {
3019 	BIG_IOCTL_Command_struct *ioc;
3020 	struct CommandList *c;
3021 	unsigned char **buff = NULL;
3022 	int *buff_size = NULL;
3023 	union u64bit temp64;
3024 	BYTE sg_used = 0;
3025 	int status = 0;
3026 	int i;
3027 	u32 left;
3028 	u32 sz;
3029 	BYTE __user *data_ptr;
3030 
3031 	if (!argp)
3032 		return -EINVAL;
3033 	if (!capable(CAP_SYS_RAWIO))
3034 		return -EPERM;
3035 	ioc = (BIG_IOCTL_Command_struct *)
3036 	    kmalloc(sizeof(*ioc), GFP_KERNEL);
3037 	if (!ioc) {
3038 		status = -ENOMEM;
3039 		goto cleanup1;
3040 	}
3041 	if (copy_from_user(ioc, argp, sizeof(*ioc))) {
3042 		status = -EFAULT;
3043 		goto cleanup1;
3044 	}
3045 	if ((ioc->buf_size < 1) &&
3046 	    (ioc->Request.Type.Direction != XFER_NONE)) {
3047 		status = -EINVAL;
3048 		goto cleanup1;
3049 	}
3050 	/* Check kmalloc limits  using all SGs */
3051 	if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
3052 		status = -EINVAL;
3053 		goto cleanup1;
3054 	}
3055 	if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) {
3056 		status = -EINVAL;
3057 		goto cleanup1;
3058 	}
3059 	buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL);
3060 	if (!buff) {
3061 		status = -ENOMEM;
3062 		goto cleanup1;
3063 	}
3064 	buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL);
3065 	if (!buff_size) {
3066 		status = -ENOMEM;
3067 		goto cleanup1;
3068 	}
3069 	left = ioc->buf_size;
3070 	data_ptr = ioc->buf;
3071 	while (left) {
3072 		sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
3073 		buff_size[sg_used] = sz;
3074 		buff[sg_used] = kmalloc(sz, GFP_KERNEL);
3075 		if (buff[sg_used] == NULL) {
3076 			status = -ENOMEM;
3077 			goto cleanup1;
3078 		}
3079 		if (ioc->Request.Type.Direction == XFER_WRITE) {
3080 			if (copy_from_user(buff[sg_used], data_ptr, sz)) {
3081 				status = -ENOMEM;
3082 				goto cleanup1;
3083 			}
3084 		} else
3085 			memset(buff[sg_used], 0, sz);
3086 		left -= sz;
3087 		data_ptr += sz;
3088 		sg_used++;
3089 	}
3090 	c = cmd_special_alloc(h);
3091 	if (c == NULL) {
3092 		status = -ENOMEM;
3093 		goto cleanup1;
3094 	}
3095 	c->cmd_type = CMD_IOCTL_PEND;
3096 	c->Header.ReplyQueue = 0;
3097 	c->Header.SGList = c->Header.SGTotal = sg_used;
3098 	memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN));
3099 	c->Header.Tag.lower = c->busaddr;
3100 	memcpy(&c->Request, &ioc->Request, sizeof(c->Request));
3101 	if (ioc->buf_size > 0) {
3102 		int i;
3103 		for (i = 0; i < sg_used; i++) {
3104 			temp64.val = pci_map_single(h->pdev, buff[i],
3105 				    buff_size[i], PCI_DMA_BIDIRECTIONAL);
3106 			c->SG[i].Addr.lower = temp64.val32.lower;
3107 			c->SG[i].Addr.upper = temp64.val32.upper;
3108 			c->SG[i].Len = buff_size[i];
3109 			/* we are not chaining */
3110 			c->SG[i].Ext = 0;
3111 		}
3112 	}
3113 	hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c);
3114 	if (sg_used)
3115 		hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL);
3116 	check_ioctl_unit_attention(h, c);
3117 	/* Copy the error information out */
3118 	memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info));
3119 	if (copy_to_user(argp, ioc, sizeof(*ioc))) {
3120 		cmd_special_free(h, c);
3121 		status = -EFAULT;
3122 		goto cleanup1;
3123 	}
3124 	if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) {
3125 		/* Copy the data out of the buffer we created */
3126 		BYTE __user *ptr = ioc->buf;
3127 		for (i = 0; i < sg_used; i++) {
3128 			if (copy_to_user(ptr, buff[i], buff_size[i])) {
3129 				cmd_special_free(h, c);
3130 				status = -EFAULT;
3131 				goto cleanup1;
3132 			}
3133 			ptr += buff_size[i];
3134 		}
3135 	}
3136 	cmd_special_free(h, c);
3137 	status = 0;
3138 cleanup1:
3139 	if (buff) {
3140 		for (i = 0; i < sg_used; i++)
3141 			kfree(buff[i]);
3142 		kfree(buff);
3143 	}
3144 	kfree(buff_size);
3145 	kfree(ioc);
3146 	return status;
3147 }
3148 
3149 static void check_ioctl_unit_attention(struct ctlr_info *h,
3150 	struct CommandList *c)
3151 {
3152 	if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
3153 			c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
3154 		(void) check_for_unit_attention(h, c);
3155 }
3156 /*
3157  * ioctl
3158  */
3159 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg)
3160 {
3161 	struct ctlr_info *h;
3162 	void __user *argp = (void __user *)arg;
3163 
3164 	h = sdev_to_hba(dev);
3165 
3166 	switch (cmd) {
3167 	case CCISS_DEREGDISK:
3168 	case CCISS_REGNEWDISK:
3169 	case CCISS_REGNEWD:
3170 		hpsa_scan_start(h->scsi_host);
3171 		return 0;
3172 	case CCISS_GETPCIINFO:
3173 		return hpsa_getpciinfo_ioctl(h, argp);
3174 	case CCISS_GETDRIVVER:
3175 		return hpsa_getdrivver_ioctl(h, argp);
3176 	case CCISS_PASSTHRU:
3177 		return hpsa_passthru_ioctl(h, argp);
3178 	case CCISS_BIG_PASSTHRU:
3179 		return hpsa_big_passthru_ioctl(h, argp);
3180 	default:
3181 		return -ENOTTY;
3182 	}
3183 }
3184 
3185 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr,
3186 				u8 reset_type)
3187 {
3188 	struct CommandList *c;
3189 
3190 	c = cmd_alloc(h);
3191 	if (!c)
3192 		return -ENOMEM;
3193 	fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0,
3194 		RAID_CTLR_LUNID, TYPE_MSG);
3195 	c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
3196 	c->waiting = NULL;
3197 	enqueue_cmd_and_start_io(h, c);
3198 	/* Don't wait for completion, the reset won't complete.  Don't free
3199 	 * the command either.  This is the last command we will send before
3200 	 * re-initializing everything, so it doesn't matter and won't leak.
3201 	 */
3202 	return 0;
3203 }
3204 
3205 static void fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h,
3206 	void *buff, size_t size, u8 page_code, unsigned char *scsi3addr,
3207 	int cmd_type)
3208 {
3209 	int pci_dir = XFER_NONE;
3210 	struct CommandList *a; /* for commands to be aborted */
3211 
3212 	c->cmd_type = CMD_IOCTL_PEND;
3213 	c->Header.ReplyQueue = 0;
3214 	if (buff != NULL && size > 0) {
3215 		c->Header.SGList = 1;
3216 		c->Header.SGTotal = 1;
3217 	} else {
3218 		c->Header.SGList = 0;
3219 		c->Header.SGTotal = 0;
3220 	}
3221 	c->Header.Tag.lower = c->busaddr;
3222 	memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
3223 
3224 	c->Request.Type.Type = cmd_type;
3225 	if (cmd_type == TYPE_CMD) {
3226 		switch (cmd) {
3227 		case HPSA_INQUIRY:
3228 			/* are we trying to read a vital product page */
3229 			if (page_code != 0) {
3230 				c->Request.CDB[1] = 0x01;
3231 				c->Request.CDB[2] = page_code;
3232 			}
3233 			c->Request.CDBLen = 6;
3234 			c->Request.Type.Attribute = ATTR_SIMPLE;
3235 			c->Request.Type.Direction = XFER_READ;
3236 			c->Request.Timeout = 0;
3237 			c->Request.CDB[0] = HPSA_INQUIRY;
3238 			c->Request.CDB[4] = size & 0xFF;
3239 			break;
3240 		case HPSA_REPORT_LOG:
3241 		case HPSA_REPORT_PHYS:
3242 			/* Talking to controller so It's a physical command
3243 			   mode = 00 target = 0.  Nothing to write.
3244 			 */
3245 			c->Request.CDBLen = 12;
3246 			c->Request.Type.Attribute = ATTR_SIMPLE;
3247 			c->Request.Type.Direction = XFER_READ;
3248 			c->Request.Timeout = 0;
3249 			c->Request.CDB[0] = cmd;
3250 			c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
3251 			c->Request.CDB[7] = (size >> 16) & 0xFF;
3252 			c->Request.CDB[8] = (size >> 8) & 0xFF;
3253 			c->Request.CDB[9] = size & 0xFF;
3254 			break;
3255 		case HPSA_CACHE_FLUSH:
3256 			c->Request.CDBLen = 12;
3257 			c->Request.Type.Attribute = ATTR_SIMPLE;
3258 			c->Request.Type.Direction = XFER_WRITE;
3259 			c->Request.Timeout = 0;
3260 			c->Request.CDB[0] = BMIC_WRITE;
3261 			c->Request.CDB[6] = BMIC_CACHE_FLUSH;
3262 			c->Request.CDB[7] = (size >> 8) & 0xFF;
3263 			c->Request.CDB[8] = size & 0xFF;
3264 			break;
3265 		case TEST_UNIT_READY:
3266 			c->Request.CDBLen = 6;
3267 			c->Request.Type.Attribute = ATTR_SIMPLE;
3268 			c->Request.Type.Direction = XFER_NONE;
3269 			c->Request.Timeout = 0;
3270 			break;
3271 		default:
3272 			dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd);
3273 			BUG();
3274 			return;
3275 		}
3276 	} else if (cmd_type == TYPE_MSG) {
3277 		switch (cmd) {
3278 
3279 		case  HPSA_DEVICE_RESET_MSG:
3280 			c->Request.CDBLen = 16;
3281 			c->Request.Type.Type =  1; /* It is a MSG not a CMD */
3282 			c->Request.Type.Attribute = ATTR_SIMPLE;
3283 			c->Request.Type.Direction = XFER_NONE;
3284 			c->Request.Timeout = 0; /* Don't time out */
3285 			memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
3286 			c->Request.CDB[0] =  cmd;
3287 			c->Request.CDB[1] = HPSA_RESET_TYPE_LUN;
3288 			/* If bytes 4-7 are zero, it means reset the */
3289 			/* LunID device */
3290 			c->Request.CDB[4] = 0x00;
3291 			c->Request.CDB[5] = 0x00;
3292 			c->Request.CDB[6] = 0x00;
3293 			c->Request.CDB[7] = 0x00;
3294 			break;
3295 		case  HPSA_ABORT_MSG:
3296 			a = buff;       /* point to command to be aborted */
3297 			dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n",
3298 				a->Header.Tag.upper, a->Header.Tag.lower,
3299 				c->Header.Tag.upper, c->Header.Tag.lower);
3300 			c->Request.CDBLen = 16;
3301 			c->Request.Type.Type = TYPE_MSG;
3302 			c->Request.Type.Attribute = ATTR_SIMPLE;
3303 			c->Request.Type.Direction = XFER_WRITE;
3304 			c->Request.Timeout = 0; /* Don't time out */
3305 			c->Request.CDB[0] = HPSA_TASK_MANAGEMENT;
3306 			c->Request.CDB[1] = HPSA_TMF_ABORT_TASK;
3307 			c->Request.CDB[2] = 0x00; /* reserved */
3308 			c->Request.CDB[3] = 0x00; /* reserved */
3309 			/* Tag to abort goes in CDB[4]-CDB[11] */
3310 			c->Request.CDB[4] = a->Header.Tag.lower & 0xFF;
3311 			c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF;
3312 			c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF;
3313 			c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF;
3314 			c->Request.CDB[8] = a->Header.Tag.upper & 0xFF;
3315 			c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF;
3316 			c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF;
3317 			c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF;
3318 			c->Request.CDB[12] = 0x00; /* reserved */
3319 			c->Request.CDB[13] = 0x00; /* reserved */
3320 			c->Request.CDB[14] = 0x00; /* reserved */
3321 			c->Request.CDB[15] = 0x00; /* reserved */
3322 		break;
3323 		default:
3324 			dev_warn(&h->pdev->dev, "unknown message type %d\n",
3325 				cmd);
3326 			BUG();
3327 		}
3328 	} else {
3329 		dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
3330 		BUG();
3331 	}
3332 
3333 	switch (c->Request.Type.Direction) {
3334 	case XFER_READ:
3335 		pci_dir = PCI_DMA_FROMDEVICE;
3336 		break;
3337 	case XFER_WRITE:
3338 		pci_dir = PCI_DMA_TODEVICE;
3339 		break;
3340 	case XFER_NONE:
3341 		pci_dir = PCI_DMA_NONE;
3342 		break;
3343 	default:
3344 		pci_dir = PCI_DMA_BIDIRECTIONAL;
3345 	}
3346 
3347 	hpsa_map_one(h->pdev, c, buff, size, pci_dir);
3348 
3349 	return;
3350 }
3351 
3352 /*
3353  * Map (physical) PCI mem into (virtual) kernel space
3354  */
3355 static void __iomem *remap_pci_mem(ulong base, ulong size)
3356 {
3357 	ulong page_base = ((ulong) base) & PAGE_MASK;
3358 	ulong page_offs = ((ulong) base) - page_base;
3359 	void __iomem *page_remapped = ioremap_nocache(page_base,
3360 		page_offs + size);
3361 
3362 	return page_remapped ? (page_remapped + page_offs) : NULL;
3363 }
3364 
3365 /* Takes cmds off the submission queue and sends them to the hardware,
3366  * then puts them on the queue of cmds waiting for completion.
3367  */
3368 static void start_io(struct ctlr_info *h)
3369 {
3370 	struct CommandList *c;
3371 	unsigned long flags;
3372 
3373 	spin_lock_irqsave(&h->lock, flags);
3374 	while (!list_empty(&h->reqQ)) {
3375 		c = list_entry(h->reqQ.next, struct CommandList, list);
3376 		/* can't do anything if fifo is full */
3377 		if ((h->access.fifo_full(h))) {
3378 			dev_warn(&h->pdev->dev, "fifo full\n");
3379 			break;
3380 		}
3381 
3382 		/* Get the first entry from the Request Q */
3383 		removeQ(c);
3384 		h->Qdepth--;
3385 
3386 		/* Put job onto the completed Q */
3387 		addQ(&h->cmpQ, c);
3388 
3389 		/* Must increment commands_outstanding before unlocking
3390 		 * and submitting to avoid race checking for fifo full
3391 		 * condition.
3392 		 */
3393 		h->commands_outstanding++;
3394 		if (h->commands_outstanding > h->max_outstanding)
3395 			h->max_outstanding = h->commands_outstanding;
3396 
3397 		/* Tell the controller execute command */
3398 		spin_unlock_irqrestore(&h->lock, flags);
3399 		h->access.submit_command(h, c);
3400 		spin_lock_irqsave(&h->lock, flags);
3401 	}
3402 	spin_unlock_irqrestore(&h->lock, flags);
3403 }
3404 
3405 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q)
3406 {
3407 	return h->access.command_completed(h, q);
3408 }
3409 
3410 static inline bool interrupt_pending(struct ctlr_info *h)
3411 {
3412 	return h->access.intr_pending(h);
3413 }
3414 
3415 static inline long interrupt_not_for_us(struct ctlr_info *h)
3416 {
3417 	return (h->access.intr_pending(h) == 0) ||
3418 		(h->interrupts_enabled == 0);
3419 }
3420 
3421 static inline int bad_tag(struct ctlr_info *h, u32 tag_index,
3422 	u32 raw_tag)
3423 {
3424 	if (unlikely(tag_index >= h->nr_cmds)) {
3425 		dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3426 		return 1;
3427 	}
3428 	return 0;
3429 }
3430 
3431 static inline void finish_cmd(struct CommandList *c)
3432 {
3433 	unsigned long flags;
3434 
3435 	spin_lock_irqsave(&c->h->lock, flags);
3436 	removeQ(c);
3437 	spin_unlock_irqrestore(&c->h->lock, flags);
3438 	dial_up_lockup_detection_on_fw_flash_complete(c->h, c);
3439 	if (likely(c->cmd_type == CMD_SCSI))
3440 		complete_scsi_command(c);
3441 	else if (c->cmd_type == CMD_IOCTL_PEND)
3442 		complete(c->waiting);
3443 }
3444 
3445 static inline u32 hpsa_tag_contains_index(u32 tag)
3446 {
3447 	return tag & DIRECT_LOOKUP_BIT;
3448 }
3449 
3450 static inline u32 hpsa_tag_to_index(u32 tag)
3451 {
3452 	return tag >> DIRECT_LOOKUP_SHIFT;
3453 }
3454 
3455 
3456 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag)
3457 {
3458 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3459 #define HPSA_SIMPLE_ERROR_BITS 0x03
3460 	if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
3461 		return tag & ~HPSA_SIMPLE_ERROR_BITS;
3462 	return tag & ~HPSA_PERF_ERROR_BITS;
3463 }
3464 
3465 /* process completion of an indexed ("direct lookup") command */
3466 static inline void process_indexed_cmd(struct ctlr_info *h,
3467 	u32 raw_tag)
3468 {
3469 	u32 tag_index;
3470 	struct CommandList *c;
3471 
3472 	tag_index = hpsa_tag_to_index(raw_tag);
3473 	if (!bad_tag(h, tag_index, raw_tag)) {
3474 		c = h->cmd_pool + tag_index;
3475 		finish_cmd(c);
3476 	}
3477 }
3478 
3479 /* process completion of a non-indexed command */
3480 static inline void process_nonindexed_cmd(struct ctlr_info *h,
3481 	u32 raw_tag)
3482 {
3483 	u32 tag;
3484 	struct CommandList *c = NULL;
3485 	unsigned long flags;
3486 
3487 	tag = hpsa_tag_discard_error_bits(h, raw_tag);
3488 	spin_lock_irqsave(&h->lock, flags);
3489 	list_for_each_entry(c, &h->cmpQ, list) {
3490 		if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) {
3491 			spin_unlock_irqrestore(&h->lock, flags);
3492 			finish_cmd(c);
3493 			return;
3494 		}
3495 	}
3496 	spin_unlock_irqrestore(&h->lock, flags);
3497 	bad_tag(h, h->nr_cmds + 1, raw_tag);
3498 }
3499 
3500 /* Some controllers, like p400, will give us one interrupt
3501  * after a soft reset, even if we turned interrupts off.
3502  * Only need to check for this in the hpsa_xxx_discard_completions
3503  * functions.
3504  */
3505 static int ignore_bogus_interrupt(struct ctlr_info *h)
3506 {
3507 	if (likely(!reset_devices))
3508 		return 0;
3509 
3510 	if (likely(h->interrupts_enabled))
3511 		return 0;
3512 
3513 	dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3514 		"(known firmware bug.)  Ignoring.\n");
3515 
3516 	return 1;
3517 }
3518 
3519 /*
3520  * Convert &h->q[x] (passed to interrupt handlers) back to h.
3521  * Relies on (h-q[x] == x) being true for x such that
3522  * 0 <= x < MAX_REPLY_QUEUES.
3523  */
3524 static struct ctlr_info *queue_to_hba(u8 *queue)
3525 {
3526 	return container_of((queue - *queue), struct ctlr_info, q[0]);
3527 }
3528 
3529 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
3530 {
3531 	struct ctlr_info *h = queue_to_hba(queue);
3532 	u8 q = *(u8 *) queue;
3533 	u32 raw_tag;
3534 
3535 	if (ignore_bogus_interrupt(h))
3536 		return IRQ_NONE;
3537 
3538 	if (interrupt_not_for_us(h))
3539 		return IRQ_NONE;
3540 	h->last_intr_timestamp = get_jiffies_64();
3541 	while (interrupt_pending(h)) {
3542 		raw_tag = get_next_completion(h, q);
3543 		while (raw_tag != FIFO_EMPTY)
3544 			raw_tag = next_command(h, q);
3545 	}
3546 	return IRQ_HANDLED;
3547 }
3548 
3549 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
3550 {
3551 	struct ctlr_info *h = queue_to_hba(queue);
3552 	u32 raw_tag;
3553 	u8 q = *(u8 *) queue;
3554 
3555 	if (ignore_bogus_interrupt(h))
3556 		return IRQ_NONE;
3557 
3558 	h->last_intr_timestamp = get_jiffies_64();
3559 	raw_tag = get_next_completion(h, q);
3560 	while (raw_tag != FIFO_EMPTY)
3561 		raw_tag = next_command(h, q);
3562 	return IRQ_HANDLED;
3563 }
3564 
3565 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
3566 {
3567 	struct ctlr_info *h = queue_to_hba((u8 *) queue);
3568 	u32 raw_tag;
3569 	u8 q = *(u8 *) queue;
3570 
3571 	if (interrupt_not_for_us(h))
3572 		return IRQ_NONE;
3573 	h->last_intr_timestamp = get_jiffies_64();
3574 	while (interrupt_pending(h)) {
3575 		raw_tag = get_next_completion(h, q);
3576 		while (raw_tag != FIFO_EMPTY) {
3577 			if (likely(hpsa_tag_contains_index(raw_tag)))
3578 				process_indexed_cmd(h, raw_tag);
3579 			else
3580 				process_nonindexed_cmd(h, raw_tag);
3581 			raw_tag = next_command(h, q);
3582 		}
3583 	}
3584 	return IRQ_HANDLED;
3585 }
3586 
3587 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
3588 {
3589 	struct ctlr_info *h = queue_to_hba(queue);
3590 	u32 raw_tag;
3591 	u8 q = *(u8 *) queue;
3592 
3593 	h->last_intr_timestamp = get_jiffies_64();
3594 	raw_tag = get_next_completion(h, q);
3595 	while (raw_tag != FIFO_EMPTY) {
3596 		if (likely(hpsa_tag_contains_index(raw_tag)))
3597 			process_indexed_cmd(h, raw_tag);
3598 		else
3599 			process_nonindexed_cmd(h, raw_tag);
3600 		raw_tag = next_command(h, q);
3601 	}
3602 	return IRQ_HANDLED;
3603 }
3604 
3605 /* Send a message CDB to the firmware. Careful, this only works
3606  * in simple mode, not performant mode due to the tag lookup.
3607  * We only ever use this immediately after a controller reset.
3608  */
3609 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode,
3610 			unsigned char type)
3611 {
3612 	struct Command {
3613 		struct CommandListHeader CommandHeader;
3614 		struct RequestBlock Request;
3615 		struct ErrDescriptor ErrorDescriptor;
3616 	};
3617 	struct Command *cmd;
3618 	static const size_t cmd_sz = sizeof(*cmd) +
3619 					sizeof(cmd->ErrorDescriptor);
3620 	dma_addr_t paddr64;
3621 	uint32_t paddr32, tag;
3622 	void __iomem *vaddr;
3623 	int i, err;
3624 
3625 	vaddr = pci_ioremap_bar(pdev, 0);
3626 	if (vaddr == NULL)
3627 		return -ENOMEM;
3628 
3629 	/* The Inbound Post Queue only accepts 32-bit physical addresses for the
3630 	 * CCISS commands, so they must be allocated from the lower 4GiB of
3631 	 * memory.
3632 	 */
3633 	err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3634 	if (err) {
3635 		iounmap(vaddr);
3636 		return -ENOMEM;
3637 	}
3638 
3639 	cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
3640 	if (cmd == NULL) {
3641 		iounmap(vaddr);
3642 		return -ENOMEM;
3643 	}
3644 
3645 	/* This must fit, because of the 32-bit consistent DMA mask.  Also,
3646 	 * although there's no guarantee, we assume that the address is at
3647 	 * least 4-byte aligned (most likely, it's page-aligned).
3648 	 */
3649 	paddr32 = paddr64;
3650 
3651 	cmd->CommandHeader.ReplyQueue = 0;
3652 	cmd->CommandHeader.SGList = 0;
3653 	cmd->CommandHeader.SGTotal = 0;
3654 	cmd->CommandHeader.Tag.lower = paddr32;
3655 	cmd->CommandHeader.Tag.upper = 0;
3656 	memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
3657 
3658 	cmd->Request.CDBLen = 16;
3659 	cmd->Request.Type.Type = TYPE_MSG;
3660 	cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
3661 	cmd->Request.Type.Direction = XFER_NONE;
3662 	cmd->Request.Timeout = 0; /* Don't time out */
3663 	cmd->Request.CDB[0] = opcode;
3664 	cmd->Request.CDB[1] = type;
3665 	memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */
3666 	cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd);
3667 	cmd->ErrorDescriptor.Addr.upper = 0;
3668 	cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo);
3669 
3670 	writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
3671 
3672 	for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) {
3673 		tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
3674 		if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32)
3675 			break;
3676 		msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS);
3677 	}
3678 
3679 	iounmap(vaddr);
3680 
3681 	/* we leak the DMA buffer here ... no choice since the controller could
3682 	 *  still complete the command.
3683 	 */
3684 	if (i == HPSA_MSG_SEND_RETRY_LIMIT) {
3685 		dev_err(&pdev->dev, "controller message %02x:%02x timed out\n",
3686 			opcode, type);
3687 		return -ETIMEDOUT;
3688 	}
3689 
3690 	pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
3691 
3692 	if (tag & HPSA_ERROR_BIT) {
3693 		dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
3694 			opcode, type);
3695 		return -EIO;
3696 	}
3697 
3698 	dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
3699 		opcode, type);
3700 	return 0;
3701 }
3702 
3703 #define hpsa_noop(p) hpsa_message(p, 3, 0)
3704 
3705 static int hpsa_controller_hard_reset(struct pci_dev *pdev,
3706 	void * __iomem vaddr, u32 use_doorbell)
3707 {
3708 	u16 pmcsr;
3709 	int pos;
3710 
3711 	if (use_doorbell) {
3712 		/* For everything after the P600, the PCI power state method
3713 		 * of resetting the controller doesn't work, so we have this
3714 		 * other way using the doorbell register.
3715 		 */
3716 		dev_info(&pdev->dev, "using doorbell to reset controller\n");
3717 		writel(use_doorbell, vaddr + SA5_DOORBELL);
3718 	} else { /* Try to do it the PCI power state way */
3719 
3720 		/* Quoting from the Open CISS Specification: "The Power
3721 		 * Management Control/Status Register (CSR) controls the power
3722 		 * state of the device.  The normal operating state is D0,
3723 		 * CSR=00h.  The software off state is D3, CSR=03h.  To reset
3724 		 * the controller, place the interface device in D3 then to D0,
3725 		 * this causes a secondary PCI reset which will reset the
3726 		 * controller." */
3727 
3728 		pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
3729 		if (pos == 0) {
3730 			dev_err(&pdev->dev,
3731 				"hpsa_reset_controller: "
3732 				"PCI PM not supported\n");
3733 			return -ENODEV;
3734 		}
3735 		dev_info(&pdev->dev, "using PCI PM to reset controller\n");
3736 		/* enter the D3hot power management state */
3737 		pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
3738 		pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3739 		pmcsr |= PCI_D3hot;
3740 		pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3741 
3742 		msleep(500);
3743 
3744 		/* enter the D0 power management state */
3745 		pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
3746 		pmcsr |= PCI_D0;
3747 		pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
3748 
3749 		/*
3750 		 * The P600 requires a small delay when changing states.
3751 		 * Otherwise we may think the board did not reset and we bail.
3752 		 * This for kdump only and is particular to the P600.
3753 		 */
3754 		msleep(500);
3755 	}
3756 	return 0;
3757 }
3758 
3759 static void init_driver_version(char *driver_version, int len)
3760 {
3761 	memset(driver_version, 0, len);
3762 	strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1);
3763 }
3764 
3765 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable)
3766 {
3767 	char *driver_version;
3768 	int i, size = sizeof(cfgtable->driver_version);
3769 
3770 	driver_version = kmalloc(size, GFP_KERNEL);
3771 	if (!driver_version)
3772 		return -ENOMEM;
3773 
3774 	init_driver_version(driver_version, size);
3775 	for (i = 0; i < size; i++)
3776 		writeb(driver_version[i], &cfgtable->driver_version[i]);
3777 	kfree(driver_version);
3778 	return 0;
3779 }
3780 
3781 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable,
3782 					  unsigned char *driver_ver)
3783 {
3784 	int i;
3785 
3786 	for (i = 0; i < sizeof(cfgtable->driver_version); i++)
3787 		driver_ver[i] = readb(&cfgtable->driver_version[i]);
3788 }
3789 
3790 static int controller_reset_failed(struct CfgTable __iomem *cfgtable)
3791 {
3792 
3793 	char *driver_ver, *old_driver_ver;
3794 	int rc, size = sizeof(cfgtable->driver_version);
3795 
3796 	old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
3797 	if (!old_driver_ver)
3798 		return -ENOMEM;
3799 	driver_ver = old_driver_ver + size;
3800 
3801 	/* After a reset, the 32 bytes of "driver version" in the cfgtable
3802 	 * should have been changed, otherwise we know the reset failed.
3803 	 */
3804 	init_driver_version(old_driver_ver, size);
3805 	read_driver_ver_from_cfgtable(cfgtable, driver_ver);
3806 	rc = !memcmp(driver_ver, old_driver_ver, size);
3807 	kfree(old_driver_ver);
3808 	return rc;
3809 }
3810 /* This does a hard reset of the controller using PCI power management
3811  * states or the using the doorbell register.
3812  */
3813 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev)
3814 {
3815 	u64 cfg_offset;
3816 	u32 cfg_base_addr;
3817 	u64 cfg_base_addr_index;
3818 	void __iomem *vaddr;
3819 	unsigned long paddr;
3820 	u32 misc_fw_support;
3821 	int rc;
3822 	struct CfgTable __iomem *cfgtable;
3823 	u32 use_doorbell;
3824 	u32 board_id;
3825 	u16 command_register;
3826 
3827 	/* For controllers as old as the P600, this is very nearly
3828 	 * the same thing as
3829 	 *
3830 	 * pci_save_state(pci_dev);
3831 	 * pci_set_power_state(pci_dev, PCI_D3hot);
3832 	 * pci_set_power_state(pci_dev, PCI_D0);
3833 	 * pci_restore_state(pci_dev);
3834 	 *
3835 	 * For controllers newer than the P600, the pci power state
3836 	 * method of resetting doesn't work so we have another way
3837 	 * using the doorbell register.
3838 	 */
3839 
3840 	rc = hpsa_lookup_board_id(pdev, &board_id);
3841 	if (rc < 0 || !ctlr_is_resettable(board_id)) {
3842 		dev_warn(&pdev->dev, "Not resetting device.\n");
3843 		return -ENODEV;
3844 	}
3845 
3846 	/* if controller is soft- but not hard resettable... */
3847 	if (!ctlr_is_hard_resettable(board_id))
3848 		return -ENOTSUPP; /* try soft reset later. */
3849 
3850 	/* Save the PCI command register */
3851 	pci_read_config_word(pdev, 4, &command_register);
3852 	/* Turn the board off.  This is so that later pci_restore_state()
3853 	 * won't turn the board on before the rest of config space is ready.
3854 	 */
3855 	pci_disable_device(pdev);
3856 	pci_save_state(pdev);
3857 
3858 	/* find the first memory BAR, so we can find the cfg table */
3859 	rc = hpsa_pci_find_memory_BAR(pdev, &paddr);
3860 	if (rc)
3861 		return rc;
3862 	vaddr = remap_pci_mem(paddr, 0x250);
3863 	if (!vaddr)
3864 		return -ENOMEM;
3865 
3866 	/* find cfgtable in order to check if reset via doorbell is supported */
3867 	rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
3868 					&cfg_base_addr_index, &cfg_offset);
3869 	if (rc)
3870 		goto unmap_vaddr;
3871 	cfgtable = remap_pci_mem(pci_resource_start(pdev,
3872 		       cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
3873 	if (!cfgtable) {
3874 		rc = -ENOMEM;
3875 		goto unmap_vaddr;
3876 	}
3877 	rc = write_driver_ver_to_cfgtable(cfgtable);
3878 	if (rc)
3879 		goto unmap_vaddr;
3880 
3881 	/* If reset via doorbell register is supported, use that.
3882 	 * There are two such methods.  Favor the newest method.
3883 	 */
3884 	misc_fw_support = readl(&cfgtable->misc_fw_support);
3885 	use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
3886 	if (use_doorbell) {
3887 		use_doorbell = DOORBELL_CTLR_RESET2;
3888 	} else {
3889 		use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
3890 		if (use_doorbell) {
3891 			dev_warn(&pdev->dev, "Soft reset not supported. "
3892 				"Firmware update is required.\n");
3893 			rc = -ENOTSUPP; /* try soft reset */
3894 			goto unmap_cfgtable;
3895 		}
3896 	}
3897 
3898 	rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
3899 	if (rc)
3900 		goto unmap_cfgtable;
3901 
3902 	pci_restore_state(pdev);
3903 	rc = pci_enable_device(pdev);
3904 	if (rc) {
3905 		dev_warn(&pdev->dev, "failed to enable device.\n");
3906 		goto unmap_cfgtable;
3907 	}
3908 	pci_write_config_word(pdev, 4, command_register);
3909 
3910 	/* Some devices (notably the HP Smart Array 5i Controller)
3911 	   need a little pause here */
3912 	msleep(HPSA_POST_RESET_PAUSE_MSECS);
3913 
3914 	/* Wait for board to become not ready, then ready. */
3915 	dev_info(&pdev->dev, "Waiting for board to reset.\n");
3916 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
3917 	if (rc) {
3918 		dev_warn(&pdev->dev,
3919 			"failed waiting for board to reset."
3920 			" Will try soft reset.\n");
3921 		rc = -ENOTSUPP; /* Not expected, but try soft reset later */
3922 		goto unmap_cfgtable;
3923 	}
3924 	rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
3925 	if (rc) {
3926 		dev_warn(&pdev->dev,
3927 			"failed waiting for board to become ready "
3928 			"after hard reset\n");
3929 		goto unmap_cfgtable;
3930 	}
3931 
3932 	rc = controller_reset_failed(vaddr);
3933 	if (rc < 0)
3934 		goto unmap_cfgtable;
3935 	if (rc) {
3936 		dev_warn(&pdev->dev, "Unable to successfully reset "
3937 			"controller. Will try soft reset.\n");
3938 		rc = -ENOTSUPP;
3939 	} else {
3940 		dev_info(&pdev->dev, "board ready after hard reset.\n");
3941 	}
3942 
3943 unmap_cfgtable:
3944 	iounmap(cfgtable);
3945 
3946 unmap_vaddr:
3947 	iounmap(vaddr);
3948 	return rc;
3949 }
3950 
3951 /*
3952  *  We cannot read the structure directly, for portability we must use
3953  *   the io functions.
3954  *   This is for debug only.
3955  */
3956 static void print_cfg_table(struct device *dev, struct CfgTable *tb)
3957 {
3958 #ifdef HPSA_DEBUG
3959 	int i;
3960 	char temp_name[17];
3961 
3962 	dev_info(dev, "Controller Configuration information\n");
3963 	dev_info(dev, "------------------------------------\n");
3964 	for (i = 0; i < 4; i++)
3965 		temp_name[i] = readb(&(tb->Signature[i]));
3966 	temp_name[4] = '\0';
3967 	dev_info(dev, "   Signature = %s\n", temp_name);
3968 	dev_info(dev, "   Spec Number = %d\n", readl(&(tb->SpecValence)));
3969 	dev_info(dev, "   Transport methods supported = 0x%x\n",
3970 	       readl(&(tb->TransportSupport)));
3971 	dev_info(dev, "   Transport methods active = 0x%x\n",
3972 	       readl(&(tb->TransportActive)));
3973 	dev_info(dev, "   Requested transport Method = 0x%x\n",
3974 	       readl(&(tb->HostWrite.TransportRequest)));
3975 	dev_info(dev, "   Coalesce Interrupt Delay = 0x%x\n",
3976 	       readl(&(tb->HostWrite.CoalIntDelay)));
3977 	dev_info(dev, "   Coalesce Interrupt Count = 0x%x\n",
3978 	       readl(&(tb->HostWrite.CoalIntCount)));
3979 	dev_info(dev, "   Max outstanding commands = 0x%d\n",
3980 	       readl(&(tb->CmdsOutMax)));
3981 	dev_info(dev, "   Bus Types = 0x%x\n", readl(&(tb->BusTypes)));
3982 	for (i = 0; i < 16; i++)
3983 		temp_name[i] = readb(&(tb->ServerName[i]));
3984 	temp_name[16] = '\0';
3985 	dev_info(dev, "   Server Name = %s\n", temp_name);
3986 	dev_info(dev, "   Heartbeat Counter = 0x%x\n\n\n",
3987 		readl(&(tb->HeartBeat)));
3988 #endif				/* HPSA_DEBUG */
3989 }
3990 
3991 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
3992 {
3993 	int i, offset, mem_type, bar_type;
3994 
3995 	if (pci_bar_addr == PCI_BASE_ADDRESS_0)	/* looking for BAR zero? */
3996 		return 0;
3997 	offset = 0;
3998 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3999 		bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
4000 		if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
4001 			offset += 4;
4002 		else {
4003 			mem_type = pci_resource_flags(pdev, i) &
4004 			    PCI_BASE_ADDRESS_MEM_TYPE_MASK;
4005 			switch (mem_type) {
4006 			case PCI_BASE_ADDRESS_MEM_TYPE_32:
4007 			case PCI_BASE_ADDRESS_MEM_TYPE_1M:
4008 				offset += 4;	/* 32 bit */
4009 				break;
4010 			case PCI_BASE_ADDRESS_MEM_TYPE_64:
4011 				offset += 8;
4012 				break;
4013 			default:	/* reserved in PCI 2.2 */
4014 				dev_warn(&pdev->dev,
4015 				       "base address is invalid\n");
4016 				return -1;
4017 				break;
4018 			}
4019 		}
4020 		if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
4021 			return i + 1;
4022 	}
4023 	return -1;
4024 }
4025 
4026 /* If MSI/MSI-X is supported by the kernel we will try to enable it on
4027  * controllers that are capable. If not, we use IO-APIC mode.
4028  */
4029 
4030 static void hpsa_interrupt_mode(struct ctlr_info *h)
4031 {
4032 #ifdef CONFIG_PCI_MSI
4033 	int err, i;
4034 	struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES];
4035 
4036 	for (i = 0; i < MAX_REPLY_QUEUES; i++) {
4037 		hpsa_msix_entries[i].vector = 0;
4038 		hpsa_msix_entries[i].entry = i;
4039 	}
4040 
4041 	/* Some boards advertise MSI but don't really support it */
4042 	if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4043 	    (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
4044 		goto default_int_mode;
4045 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
4046 		dev_info(&h->pdev->dev, "MSIX\n");
4047 		err = pci_enable_msix(h->pdev, hpsa_msix_entries,
4048 						MAX_REPLY_QUEUES);
4049 		if (!err) {
4050 			for (i = 0; i < MAX_REPLY_QUEUES; i++)
4051 				h->intr[i] = hpsa_msix_entries[i].vector;
4052 			h->msix_vector = 1;
4053 			return;
4054 		}
4055 		if (err > 0) {
4056 			dev_warn(&h->pdev->dev, "only %d MSI-X vectors "
4057 			       "available\n", err);
4058 			goto default_int_mode;
4059 		} else {
4060 			dev_warn(&h->pdev->dev, "MSI-X init failed %d\n",
4061 			       err);
4062 			goto default_int_mode;
4063 		}
4064 	}
4065 	if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4066 		dev_info(&h->pdev->dev, "MSI\n");
4067 		if (!pci_enable_msi(h->pdev))
4068 			h->msi_vector = 1;
4069 		else
4070 			dev_warn(&h->pdev->dev, "MSI init failed\n");
4071 	}
4072 default_int_mode:
4073 #endif				/* CONFIG_PCI_MSI */
4074 	/* if we get here we're going to use the default interrupt mode */
4075 	h->intr[h->intr_mode] = h->pdev->irq;
4076 }
4077 
4078 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
4079 {
4080 	int i;
4081 	u32 subsystem_vendor_id, subsystem_device_id;
4082 
4083 	subsystem_vendor_id = pdev->subsystem_vendor;
4084 	subsystem_device_id = pdev->subsystem_device;
4085 	*board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4086 		    subsystem_vendor_id;
4087 
4088 	for (i = 0; i < ARRAY_SIZE(products); i++)
4089 		if (*board_id == products[i].board_id)
4090 			return i;
4091 
4092 	if ((subsystem_vendor_id != PCI_VENDOR_ID_HP &&
4093 		subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) ||
4094 		!hpsa_allow_any) {
4095 		dev_warn(&pdev->dev, "unrecognized board ID: "
4096 			"0x%08x, ignoring.\n", *board_id);
4097 			return -ENODEV;
4098 	}
4099 	return ARRAY_SIZE(products) - 1; /* generic unknown smart array */
4100 }
4101 
4102 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev,
4103 				    unsigned long *memory_bar)
4104 {
4105 	int i;
4106 
4107 	for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4108 		if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4109 			/* addressing mode bits already removed */
4110 			*memory_bar = pci_resource_start(pdev, i);
4111 			dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4112 				*memory_bar);
4113 			return 0;
4114 		}
4115 	dev_warn(&pdev->dev, "no memory BAR found\n");
4116 	return -ENODEV;
4117 }
4118 
4119 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
4120 				     int wait_for_ready)
4121 {
4122 	int i, iterations;
4123 	u32 scratchpad;
4124 	if (wait_for_ready)
4125 		iterations = HPSA_BOARD_READY_ITERATIONS;
4126 	else
4127 		iterations = HPSA_BOARD_NOT_READY_ITERATIONS;
4128 
4129 	for (i = 0; i < iterations; i++) {
4130 		scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4131 		if (wait_for_ready) {
4132 			if (scratchpad == HPSA_FIRMWARE_READY)
4133 				return 0;
4134 		} else {
4135 			if (scratchpad != HPSA_FIRMWARE_READY)
4136 				return 0;
4137 		}
4138 		msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS);
4139 	}
4140 	dev_warn(&pdev->dev, "board not ready, timed out.\n");
4141 	return -ENODEV;
4142 }
4143 
4144 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4145 			       u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4146 			       u64 *cfg_offset)
4147 {
4148 	*cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4149 	*cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4150 	*cfg_base_addr &= (u32) 0x0000ffff;
4151 	*cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4152 	if (*cfg_base_addr_index == -1) {
4153 		dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n");
4154 		return -ENODEV;
4155 	}
4156 	return 0;
4157 }
4158 
4159 static int hpsa_find_cfgtables(struct ctlr_info *h)
4160 {
4161 	u64 cfg_offset;
4162 	u32 cfg_base_addr;
4163 	u64 cfg_base_addr_index;
4164 	u32 trans_offset;
4165 	int rc;
4166 
4167 	rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4168 		&cfg_base_addr_index, &cfg_offset);
4169 	if (rc)
4170 		return rc;
4171 	h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
4172 		       cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4173 	if (!h->cfgtable)
4174 		return -ENOMEM;
4175 	rc = write_driver_ver_to_cfgtable(h->cfgtable);
4176 	if (rc)
4177 		return rc;
4178 	/* Find performant mode table. */
4179 	trans_offset = readl(&h->cfgtable->TransMethodOffset);
4180 	h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4181 				cfg_base_addr_index)+cfg_offset+trans_offset,
4182 				sizeof(*h->transtable));
4183 	if (!h->transtable)
4184 		return -ENOMEM;
4185 	return 0;
4186 }
4187 
4188 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h)
4189 {
4190 	h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
4191 
4192 	/* Limit commands in memory limited kdump scenario. */
4193 	if (reset_devices && h->max_commands > 32)
4194 		h->max_commands = 32;
4195 
4196 	if (h->max_commands < 16) {
4197 		dev_warn(&h->pdev->dev, "Controller reports "
4198 			"max supported commands of %d, an obvious lie. "
4199 			"Using 16.  Ensure that firmware is up to date.\n",
4200 			h->max_commands);
4201 		h->max_commands = 16;
4202 	}
4203 }
4204 
4205 /* Interrogate the hardware for some limits:
4206  * max commands, max SG elements without chaining, and with chaining,
4207  * SG chain block size, etc.
4208  */
4209 static void hpsa_find_board_params(struct ctlr_info *h)
4210 {
4211 	hpsa_get_max_perf_mode_cmds(h);
4212 	h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */
4213 	h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements));
4214 	/*
4215 	 * Limit in-command s/g elements to 32 save dma'able memory.
4216 	 * Howvever spec says if 0, use 31
4217 	 */
4218 	h->max_cmd_sg_entries = 31;
4219 	if (h->maxsgentries > 512) {
4220 		h->max_cmd_sg_entries = 32;
4221 		h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1;
4222 		h->maxsgentries--; /* save one for chain pointer */
4223 	} else {
4224 		h->maxsgentries = 31; /* default to traditional values */
4225 		h->chainsize = 0;
4226 	}
4227 
4228 	/* Find out what task management functions are supported and cache */
4229 	h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags));
4230 }
4231 
4232 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h)
4233 {
4234 	if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
4235 		dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4236 		return false;
4237 	}
4238 	return true;
4239 }
4240 
4241 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
4242 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h)
4243 {
4244 #ifdef CONFIG_X86
4245 	u32 prefetch;
4246 
4247 	prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4248 	prefetch |= 0x100;
4249 	writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
4250 #endif
4251 }
4252 
4253 /* Disable DMA prefetch for the P600.  Otherwise an ASIC bug may result
4254  * in a prefetch beyond physical memory.
4255  */
4256 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h)
4257 {
4258 	u32 dma_prefetch;
4259 
4260 	if (h->board_id != 0x3225103C)
4261 		return;
4262 	dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4263 	dma_prefetch |= 0x8000;
4264 	writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4265 }
4266 
4267 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h)
4268 {
4269 	int i;
4270 	u32 doorbell_value;
4271 	unsigned long flags;
4272 
4273 	/* under certain very rare conditions, this can take awhile.
4274 	 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
4275 	 * as we enter this code.)
4276 	 */
4277 	for (i = 0; i < MAX_CONFIG_WAIT; i++) {
4278 		spin_lock_irqsave(&h->lock, flags);
4279 		doorbell_value = readl(h->vaddr + SA5_DOORBELL);
4280 		spin_unlock_irqrestore(&h->lock, flags);
4281 		if (!(doorbell_value & CFGTBL_ChangeReq))
4282 			break;
4283 		/* delay and try again */
4284 		usleep_range(10000, 20000);
4285 	}
4286 }
4287 
4288 static int hpsa_enter_simple_mode(struct ctlr_info *h)
4289 {
4290 	u32 trans_support;
4291 
4292 	trans_support = readl(&(h->cfgtable->TransportSupport));
4293 	if (!(trans_support & SIMPLE_MODE))
4294 		return -ENOTSUPP;
4295 
4296 	h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
4297 	/* Update the field, and then ring the doorbell */
4298 	writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
4299 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
4300 	hpsa_wait_for_mode_change_ack(h);
4301 	print_cfg_table(&h->pdev->dev, h->cfgtable);
4302 	if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
4303 		dev_warn(&h->pdev->dev,
4304 			"unable to get board into simple mode\n");
4305 		return -ENODEV;
4306 	}
4307 	h->transMethod = CFGTBL_Trans_Simple;
4308 	return 0;
4309 }
4310 
4311 static int hpsa_pci_init(struct ctlr_info *h)
4312 {
4313 	int prod_index, err;
4314 
4315 	prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id);
4316 	if (prod_index < 0)
4317 		return -ENODEV;
4318 	h->product_name = products[prod_index].product_name;
4319 	h->access = *(products[prod_index].access);
4320 
4321 	pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4322 			       PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4323 
4324 	err = pci_enable_device(h->pdev);
4325 	if (err) {
4326 		dev_warn(&h->pdev->dev, "unable to enable PCI device\n");
4327 		return err;
4328 	}
4329 
4330 	/* Enable bus mastering (pci_disable_device may disable this) */
4331 	pci_set_master(h->pdev);
4332 
4333 	err = pci_request_regions(h->pdev, HPSA);
4334 	if (err) {
4335 		dev_err(&h->pdev->dev,
4336 			"cannot obtain PCI resources, aborting\n");
4337 		return err;
4338 	}
4339 	hpsa_interrupt_mode(h);
4340 	err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr);
4341 	if (err)
4342 		goto err_out_free_res;
4343 	h->vaddr = remap_pci_mem(h->paddr, 0x250);
4344 	if (!h->vaddr) {
4345 		err = -ENOMEM;
4346 		goto err_out_free_res;
4347 	}
4348 	err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
4349 	if (err)
4350 		goto err_out_free_res;
4351 	err = hpsa_find_cfgtables(h);
4352 	if (err)
4353 		goto err_out_free_res;
4354 	hpsa_find_board_params(h);
4355 
4356 	if (!hpsa_CISS_signature_present(h)) {
4357 		err = -ENODEV;
4358 		goto err_out_free_res;
4359 	}
4360 	hpsa_enable_scsi_prefetch(h);
4361 	hpsa_p600_dma_prefetch_quirk(h);
4362 	err = hpsa_enter_simple_mode(h);
4363 	if (err)
4364 		goto err_out_free_res;
4365 	return 0;
4366 
4367 err_out_free_res:
4368 	if (h->transtable)
4369 		iounmap(h->transtable);
4370 	if (h->cfgtable)
4371 		iounmap(h->cfgtable);
4372 	if (h->vaddr)
4373 		iounmap(h->vaddr);
4374 	pci_disable_device(h->pdev);
4375 	pci_release_regions(h->pdev);
4376 	return err;
4377 }
4378 
4379 static void hpsa_hba_inquiry(struct ctlr_info *h)
4380 {
4381 	int rc;
4382 
4383 #define HBA_INQUIRY_BYTE_COUNT 64
4384 	h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL);
4385 	if (!h->hba_inquiry_data)
4386 		return;
4387 	rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0,
4388 		h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT);
4389 	if (rc != 0) {
4390 		kfree(h->hba_inquiry_data);
4391 		h->hba_inquiry_data = NULL;
4392 	}
4393 }
4394 
4395 static int hpsa_init_reset_devices(struct pci_dev *pdev)
4396 {
4397 	int rc, i;
4398 
4399 	if (!reset_devices)
4400 		return 0;
4401 
4402 	/* Reset the controller with a PCI power-cycle or via doorbell */
4403 	rc = hpsa_kdump_hard_reset_controller(pdev);
4404 
4405 	/* -ENOTSUPP here means we cannot reset the controller
4406 	 * but it's already (and still) up and running in
4407 	 * "performant mode".  Or, it might be 640x, which can't reset
4408 	 * due to concerns about shared bbwc between 6402/6404 pair.
4409 	 */
4410 	if (rc == -ENOTSUPP)
4411 		return rc; /* just try to do the kdump anyhow. */
4412 	if (rc)
4413 		return -ENODEV;
4414 
4415 	/* Now try to get the controller to respond to a no-op */
4416 	dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
4417 	for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) {
4418 		if (hpsa_noop(pdev) == 0)
4419 			break;
4420 		else
4421 			dev_warn(&pdev->dev, "no-op failed%s\n",
4422 					(i < 11 ? "; re-trying" : ""));
4423 	}
4424 	return 0;
4425 }
4426 
4427 static int hpsa_allocate_cmd_pool(struct ctlr_info *h)
4428 {
4429 	h->cmd_pool_bits = kzalloc(
4430 		DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) *
4431 		sizeof(unsigned long), GFP_KERNEL);
4432 	h->cmd_pool = pci_alloc_consistent(h->pdev,
4433 		    h->nr_cmds * sizeof(*h->cmd_pool),
4434 		    &(h->cmd_pool_dhandle));
4435 	h->errinfo_pool = pci_alloc_consistent(h->pdev,
4436 		    h->nr_cmds * sizeof(*h->errinfo_pool),
4437 		    &(h->errinfo_pool_dhandle));
4438 	if ((h->cmd_pool_bits == NULL)
4439 	    || (h->cmd_pool == NULL)
4440 	    || (h->errinfo_pool == NULL)) {
4441 		dev_err(&h->pdev->dev, "out of memory in %s", __func__);
4442 		return -ENOMEM;
4443 	}
4444 	return 0;
4445 }
4446 
4447 static void hpsa_free_cmd_pool(struct ctlr_info *h)
4448 {
4449 	kfree(h->cmd_pool_bits);
4450 	if (h->cmd_pool)
4451 		pci_free_consistent(h->pdev,
4452 			    h->nr_cmds * sizeof(struct CommandList),
4453 			    h->cmd_pool, h->cmd_pool_dhandle);
4454 	if (h->errinfo_pool)
4455 		pci_free_consistent(h->pdev,
4456 			    h->nr_cmds * sizeof(struct ErrorInfo),
4457 			    h->errinfo_pool,
4458 			    h->errinfo_pool_dhandle);
4459 }
4460 
4461 static int hpsa_request_irq(struct ctlr_info *h,
4462 	irqreturn_t (*msixhandler)(int, void *),
4463 	irqreturn_t (*intxhandler)(int, void *))
4464 {
4465 	int rc, i;
4466 
4467 	/*
4468 	 * initialize h->q[x] = x so that interrupt handlers know which
4469 	 * queue to process.
4470 	 */
4471 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
4472 		h->q[i] = (u8) i;
4473 
4474 	if (h->intr_mode == PERF_MODE_INT && h->msix_vector) {
4475 		/* If performant mode and MSI-X, use multiple reply queues */
4476 		for (i = 0; i < MAX_REPLY_QUEUES; i++)
4477 			rc = request_irq(h->intr[i], msixhandler,
4478 					0, h->devname,
4479 					&h->q[i]);
4480 	} else {
4481 		/* Use single reply pool */
4482 		if (h->msix_vector || h->msi_vector) {
4483 			rc = request_irq(h->intr[h->intr_mode],
4484 				msixhandler, 0, h->devname,
4485 				&h->q[h->intr_mode]);
4486 		} else {
4487 			rc = request_irq(h->intr[h->intr_mode],
4488 				intxhandler, IRQF_SHARED, h->devname,
4489 				&h->q[h->intr_mode]);
4490 		}
4491 	}
4492 	if (rc) {
4493 		dev_err(&h->pdev->dev, "unable to get irq %d for %s\n",
4494 		       h->intr[h->intr_mode], h->devname);
4495 		return -ENODEV;
4496 	}
4497 	return 0;
4498 }
4499 
4500 static int hpsa_kdump_soft_reset(struct ctlr_info *h)
4501 {
4502 	if (hpsa_send_host_reset(h, RAID_CTLR_LUNID,
4503 		HPSA_RESET_TYPE_CONTROLLER)) {
4504 		dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4505 		return -EIO;
4506 	}
4507 
4508 	dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4509 	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4510 		dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4511 		return -1;
4512 	}
4513 
4514 	dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4515 	if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4516 		dev_warn(&h->pdev->dev, "Board failed to become ready "
4517 			"after soft reset.\n");
4518 		return -1;
4519 	}
4520 
4521 	return 0;
4522 }
4523 
4524 static void free_irqs(struct ctlr_info *h)
4525 {
4526 	int i;
4527 
4528 	if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) {
4529 		/* Single reply queue, only one irq to free */
4530 		i = h->intr_mode;
4531 		free_irq(h->intr[i], &h->q[i]);
4532 		return;
4533 	}
4534 
4535 	for (i = 0; i < MAX_REPLY_QUEUES; i++)
4536 		free_irq(h->intr[i], &h->q[i]);
4537 }
4538 
4539 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h)
4540 {
4541 	free_irqs(h);
4542 #ifdef CONFIG_PCI_MSI
4543 	if (h->msix_vector) {
4544 		if (h->pdev->msix_enabled)
4545 			pci_disable_msix(h->pdev);
4546 	} else if (h->msi_vector) {
4547 		if (h->pdev->msi_enabled)
4548 			pci_disable_msi(h->pdev);
4549 	}
4550 #endif /* CONFIG_PCI_MSI */
4551 }
4552 
4553 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h)
4554 {
4555 	hpsa_free_irqs_and_disable_msix(h);
4556 	hpsa_free_sg_chain_blocks(h);
4557 	hpsa_free_cmd_pool(h);
4558 	kfree(h->blockFetchTable);
4559 	pci_free_consistent(h->pdev, h->reply_pool_size,
4560 		h->reply_pool, h->reply_pool_dhandle);
4561 	if (h->vaddr)
4562 		iounmap(h->vaddr);
4563 	if (h->transtable)
4564 		iounmap(h->transtable);
4565 	if (h->cfgtable)
4566 		iounmap(h->cfgtable);
4567 	pci_release_regions(h->pdev);
4568 	kfree(h);
4569 }
4570 
4571 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h)
4572 {
4573 	assert_spin_locked(&lockup_detector_lock);
4574 	if (!hpsa_lockup_detector)
4575 		return;
4576 	if (h->lockup_detected)
4577 		return; /* already stopped the lockup detector */
4578 	list_del(&h->lockup_list);
4579 }
4580 
4581 /* Called when controller lockup detected. */
4582 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list)
4583 {
4584 	struct CommandList *c = NULL;
4585 
4586 	assert_spin_locked(&h->lock);
4587 	/* Mark all outstanding commands as failed and complete them. */
4588 	while (!list_empty(list)) {
4589 		c = list_entry(list->next, struct CommandList, list);
4590 		c->err_info->CommandStatus = CMD_HARDWARE_ERR;
4591 		finish_cmd(c);
4592 	}
4593 }
4594 
4595 static void controller_lockup_detected(struct ctlr_info *h)
4596 {
4597 	unsigned long flags;
4598 
4599 	assert_spin_locked(&lockup_detector_lock);
4600 	remove_ctlr_from_lockup_detector_list(h);
4601 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
4602 	spin_lock_irqsave(&h->lock, flags);
4603 	h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
4604 	spin_unlock_irqrestore(&h->lock, flags);
4605 	dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n",
4606 			h->lockup_detected);
4607 	pci_disable_device(h->pdev);
4608 	spin_lock_irqsave(&h->lock, flags);
4609 	fail_all_cmds_on_list(h, &h->cmpQ);
4610 	fail_all_cmds_on_list(h, &h->reqQ);
4611 	spin_unlock_irqrestore(&h->lock, flags);
4612 }
4613 
4614 static void detect_controller_lockup(struct ctlr_info *h)
4615 {
4616 	u64 now;
4617 	u32 heartbeat;
4618 	unsigned long flags;
4619 
4620 	assert_spin_locked(&lockup_detector_lock);
4621 	now = get_jiffies_64();
4622 	/* If we've received an interrupt recently, we're ok. */
4623 	if (time_after64(h->last_intr_timestamp +
4624 				(h->heartbeat_sample_interval), now))
4625 		return;
4626 
4627 	/*
4628 	 * If we've already checked the heartbeat recently, we're ok.
4629 	 * This could happen if someone sends us a signal. We
4630 	 * otherwise don't care about signals in this thread.
4631 	 */
4632 	if (time_after64(h->last_heartbeat_timestamp +
4633 				(h->heartbeat_sample_interval), now))
4634 		return;
4635 
4636 	/* If heartbeat has not changed since we last looked, we're not ok. */
4637 	spin_lock_irqsave(&h->lock, flags);
4638 	heartbeat = readl(&h->cfgtable->HeartBeat);
4639 	spin_unlock_irqrestore(&h->lock, flags);
4640 	if (h->last_heartbeat == heartbeat) {
4641 		controller_lockup_detected(h);
4642 		return;
4643 	}
4644 
4645 	/* We're ok. */
4646 	h->last_heartbeat = heartbeat;
4647 	h->last_heartbeat_timestamp = now;
4648 }
4649 
4650 static int detect_controller_lockup_thread(void *notused)
4651 {
4652 	struct ctlr_info *h;
4653 	unsigned long flags;
4654 
4655 	while (1) {
4656 		struct list_head *this, *tmp;
4657 
4658 		schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL);
4659 		if (kthread_should_stop())
4660 			break;
4661 		spin_lock_irqsave(&lockup_detector_lock, flags);
4662 		list_for_each_safe(this, tmp, &hpsa_ctlr_list) {
4663 			h = list_entry(this, struct ctlr_info, lockup_list);
4664 			detect_controller_lockup(h);
4665 		}
4666 		spin_unlock_irqrestore(&lockup_detector_lock, flags);
4667 	}
4668 	return 0;
4669 }
4670 
4671 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h)
4672 {
4673 	unsigned long flags;
4674 
4675 	h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL;
4676 	spin_lock_irqsave(&lockup_detector_lock, flags);
4677 	list_add_tail(&h->lockup_list, &hpsa_ctlr_list);
4678 	spin_unlock_irqrestore(&lockup_detector_lock, flags);
4679 }
4680 
4681 static void start_controller_lockup_detector(struct ctlr_info *h)
4682 {
4683 	/* Start the lockup detector thread if not already started */
4684 	if (!hpsa_lockup_detector) {
4685 		spin_lock_init(&lockup_detector_lock);
4686 		hpsa_lockup_detector =
4687 			kthread_run(detect_controller_lockup_thread,
4688 						NULL, HPSA);
4689 	}
4690 	if (!hpsa_lockup_detector) {
4691 		dev_warn(&h->pdev->dev,
4692 			"Could not start lockup detector thread\n");
4693 		return;
4694 	}
4695 	add_ctlr_to_lockup_detector_list(h);
4696 }
4697 
4698 static void stop_controller_lockup_detector(struct ctlr_info *h)
4699 {
4700 	unsigned long flags;
4701 
4702 	spin_lock_irqsave(&lockup_detector_lock, flags);
4703 	remove_ctlr_from_lockup_detector_list(h);
4704 	/* If the list of ctlr's to monitor is empty, stop the thread */
4705 	if (list_empty(&hpsa_ctlr_list)) {
4706 		spin_unlock_irqrestore(&lockup_detector_lock, flags);
4707 		kthread_stop(hpsa_lockup_detector);
4708 		spin_lock_irqsave(&lockup_detector_lock, flags);
4709 		hpsa_lockup_detector = NULL;
4710 	}
4711 	spin_unlock_irqrestore(&lockup_detector_lock, flags);
4712 }
4713 
4714 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
4715 {
4716 	int dac, rc;
4717 	struct ctlr_info *h;
4718 	int try_soft_reset = 0;
4719 	unsigned long flags;
4720 
4721 	if (number_of_controllers == 0)
4722 		printk(KERN_INFO DRIVER_NAME "\n");
4723 
4724 	rc = hpsa_init_reset_devices(pdev);
4725 	if (rc) {
4726 		if (rc != -ENOTSUPP)
4727 			return rc;
4728 		/* If the reset fails in a particular way (it has no way to do
4729 		 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4730 		 * a soft reset once we get the controller configured up to the
4731 		 * point that it can accept a command.
4732 		 */
4733 		try_soft_reset = 1;
4734 		rc = 0;
4735 	}
4736 
4737 reinit_after_soft_reset:
4738 
4739 	/* Command structures must be aligned on a 32-byte boundary because
4740 	 * the 5 lower bits of the address are used by the hardware. and by
4741 	 * the driver.  See comments in hpsa.h for more info.
4742 	 */
4743 #define COMMANDLIST_ALIGNMENT 32
4744 	BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT);
4745 	h = kzalloc(sizeof(*h), GFP_KERNEL);
4746 	if (!h)
4747 		return -ENOMEM;
4748 
4749 	h->pdev = pdev;
4750 	h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
4751 	INIT_LIST_HEAD(&h->cmpQ);
4752 	INIT_LIST_HEAD(&h->reqQ);
4753 	spin_lock_init(&h->lock);
4754 	spin_lock_init(&h->scan_lock);
4755 	rc = hpsa_pci_init(h);
4756 	if (rc != 0)
4757 		goto clean1;
4758 
4759 	sprintf(h->devname, HPSA "%d", number_of_controllers);
4760 	h->ctlr = number_of_controllers;
4761 	number_of_controllers++;
4762 
4763 	/* configure PCI DMA stuff */
4764 	rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
4765 	if (rc == 0) {
4766 		dac = 1;
4767 	} else {
4768 		rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
4769 		if (rc == 0) {
4770 			dac = 0;
4771 		} else {
4772 			dev_err(&pdev->dev, "no suitable DMA available\n");
4773 			goto clean1;
4774 		}
4775 	}
4776 
4777 	/* make sure the board interrupts are off */
4778 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
4779 
4780 	if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx))
4781 		goto clean2;
4782 	dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n",
4783 	       h->devname, pdev->device,
4784 	       h->intr[h->intr_mode], dac ? "" : " not");
4785 	if (hpsa_allocate_cmd_pool(h))
4786 		goto clean4;
4787 	if (hpsa_allocate_sg_chain_blocks(h))
4788 		goto clean4;
4789 	init_waitqueue_head(&h->scan_wait_queue);
4790 	h->scan_finished = 1; /* no scan currently in progress */
4791 
4792 	pci_set_drvdata(pdev, h);
4793 	h->ndevices = 0;
4794 	h->scsi_host = NULL;
4795 	spin_lock_init(&h->devlock);
4796 	hpsa_put_ctlr_into_performant_mode(h);
4797 
4798 	/* At this point, the controller is ready to take commands.
4799 	 * Now, if reset_devices and the hard reset didn't work, try
4800 	 * the soft reset and see if that works.
4801 	 */
4802 	if (try_soft_reset) {
4803 
4804 		/* This is kind of gross.  We may or may not get a completion
4805 		 * from the soft reset command, and if we do, then the value
4806 		 * from the fifo may or may not be valid.  So, we wait 10 secs
4807 		 * after the reset throwing away any completions we get during
4808 		 * that time.  Unregister the interrupt handler and register
4809 		 * fake ones to scoop up any residual completions.
4810 		 */
4811 		spin_lock_irqsave(&h->lock, flags);
4812 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
4813 		spin_unlock_irqrestore(&h->lock, flags);
4814 		free_irqs(h);
4815 		rc = hpsa_request_irq(h, hpsa_msix_discard_completions,
4816 					hpsa_intx_discard_completions);
4817 		if (rc) {
4818 			dev_warn(&h->pdev->dev, "Failed to request_irq after "
4819 				"soft reset.\n");
4820 			goto clean4;
4821 		}
4822 
4823 		rc = hpsa_kdump_soft_reset(h);
4824 		if (rc)
4825 			/* Neither hard nor soft reset worked, we're hosed. */
4826 			goto clean4;
4827 
4828 		dev_info(&h->pdev->dev, "Board READY.\n");
4829 		dev_info(&h->pdev->dev,
4830 			"Waiting for stale completions to drain.\n");
4831 		h->access.set_intr_mask(h, HPSA_INTR_ON);
4832 		msleep(10000);
4833 		h->access.set_intr_mask(h, HPSA_INTR_OFF);
4834 
4835 		rc = controller_reset_failed(h->cfgtable);
4836 		if (rc)
4837 			dev_info(&h->pdev->dev,
4838 				"Soft reset appears to have failed.\n");
4839 
4840 		/* since the controller's reset, we have to go back and re-init
4841 		 * everything.  Easiest to just forget what we've done and do it
4842 		 * all over again.
4843 		 */
4844 		hpsa_undo_allocations_after_kdump_soft_reset(h);
4845 		try_soft_reset = 0;
4846 		if (rc)
4847 			/* don't go to clean4, we already unallocated */
4848 			return -ENODEV;
4849 
4850 		goto reinit_after_soft_reset;
4851 	}
4852 
4853 	/* Turn the interrupts on so we can service requests */
4854 	h->access.set_intr_mask(h, HPSA_INTR_ON);
4855 
4856 	hpsa_hba_inquiry(h);
4857 	hpsa_register_scsi(h);	/* hook ourselves into SCSI subsystem */
4858 	start_controller_lockup_detector(h);
4859 	return 1;
4860 
4861 clean4:
4862 	hpsa_free_sg_chain_blocks(h);
4863 	hpsa_free_cmd_pool(h);
4864 	free_irqs(h);
4865 clean2:
4866 clean1:
4867 	kfree(h);
4868 	return rc;
4869 }
4870 
4871 static void hpsa_flush_cache(struct ctlr_info *h)
4872 {
4873 	char *flush_buf;
4874 	struct CommandList *c;
4875 
4876 	flush_buf = kzalloc(4, GFP_KERNEL);
4877 	if (!flush_buf)
4878 		return;
4879 
4880 	c = cmd_special_alloc(h);
4881 	if (!c) {
4882 		dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n");
4883 		goto out_of_memory;
4884 	}
4885 	fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0,
4886 		RAID_CTLR_LUNID, TYPE_CMD);
4887 	hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE);
4888 	if (c->err_info->CommandStatus != 0)
4889 		dev_warn(&h->pdev->dev,
4890 			"error flushing cache on controller\n");
4891 	cmd_special_free(h, c);
4892 out_of_memory:
4893 	kfree(flush_buf);
4894 }
4895 
4896 static void hpsa_shutdown(struct pci_dev *pdev)
4897 {
4898 	struct ctlr_info *h;
4899 
4900 	h = pci_get_drvdata(pdev);
4901 	/* Turn board interrupts off  and send the flush cache command
4902 	 * sendcmd will turn off interrupt, and send the flush...
4903 	 * To write all data in the battery backed cache to disks
4904 	 */
4905 	hpsa_flush_cache(h);
4906 	h->access.set_intr_mask(h, HPSA_INTR_OFF);
4907 	hpsa_free_irqs_and_disable_msix(h);
4908 }
4909 
4910 static void hpsa_free_device_info(struct ctlr_info *h)
4911 {
4912 	int i;
4913 
4914 	for (i = 0; i < h->ndevices; i++)
4915 		kfree(h->dev[i]);
4916 }
4917 
4918 static void hpsa_remove_one(struct pci_dev *pdev)
4919 {
4920 	struct ctlr_info *h;
4921 
4922 	if (pci_get_drvdata(pdev) == NULL) {
4923 		dev_err(&pdev->dev, "unable to remove device\n");
4924 		return;
4925 	}
4926 	h = pci_get_drvdata(pdev);
4927 	stop_controller_lockup_detector(h);
4928 	hpsa_unregister_scsi(h);	/* unhook from SCSI subsystem */
4929 	hpsa_shutdown(pdev);
4930 	iounmap(h->vaddr);
4931 	iounmap(h->transtable);
4932 	iounmap(h->cfgtable);
4933 	hpsa_free_device_info(h);
4934 	hpsa_free_sg_chain_blocks(h);
4935 	pci_free_consistent(h->pdev,
4936 		h->nr_cmds * sizeof(struct CommandList),
4937 		h->cmd_pool, h->cmd_pool_dhandle);
4938 	pci_free_consistent(h->pdev,
4939 		h->nr_cmds * sizeof(struct ErrorInfo),
4940 		h->errinfo_pool, h->errinfo_pool_dhandle);
4941 	pci_free_consistent(h->pdev, h->reply_pool_size,
4942 		h->reply_pool, h->reply_pool_dhandle);
4943 	kfree(h->cmd_pool_bits);
4944 	kfree(h->blockFetchTable);
4945 	kfree(h->hba_inquiry_data);
4946 	pci_disable_device(pdev);
4947 	pci_release_regions(pdev);
4948 	pci_set_drvdata(pdev, NULL);
4949 	kfree(h);
4950 }
4951 
4952 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev,
4953 	__attribute__((unused)) pm_message_t state)
4954 {
4955 	return -ENOSYS;
4956 }
4957 
4958 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev)
4959 {
4960 	return -ENOSYS;
4961 }
4962 
4963 static struct pci_driver hpsa_pci_driver = {
4964 	.name = HPSA,
4965 	.probe = hpsa_init_one,
4966 	.remove = hpsa_remove_one,
4967 	.id_table = hpsa_pci_device_id,	/* id_table */
4968 	.shutdown = hpsa_shutdown,
4969 	.suspend = hpsa_suspend,
4970 	.resume = hpsa_resume,
4971 };
4972 
4973 /* Fill in bucket_map[], given nsgs (the max number of
4974  * scatter gather elements supported) and bucket[],
4975  * which is an array of 8 integers.  The bucket[] array
4976  * contains 8 different DMA transfer sizes (in 16
4977  * byte increments) which the controller uses to fetch
4978  * commands.  This function fills in bucket_map[], which
4979  * maps a given number of scatter gather elements to one of
4980  * the 8 DMA transfer sizes.  The point of it is to allow the
4981  * controller to only do as much DMA as needed to fetch the
4982  * command, with the DMA transfer size encoded in the lower
4983  * bits of the command address.
4984  */
4985 static void  calc_bucket_map(int bucket[], int num_buckets,
4986 	int nsgs, int *bucket_map)
4987 {
4988 	int i, j, b, size;
4989 
4990 	/* even a command with 0 SGs requires 4 blocks */
4991 #define MINIMUM_TRANSFER_BLOCKS 4
4992 #define NUM_BUCKETS 8
4993 	/* Note, bucket_map must have nsgs+1 entries. */
4994 	for (i = 0; i <= nsgs; i++) {
4995 		/* Compute size of a command with i SG entries */
4996 		size = i + MINIMUM_TRANSFER_BLOCKS;
4997 		b = num_buckets; /* Assume the biggest bucket */
4998 		/* Find the bucket that is just big enough */
4999 		for (j = 0; j < 8; j++) {
5000 			if (bucket[j] >= size) {
5001 				b = j;
5002 				break;
5003 			}
5004 		}
5005 		/* for a command with i SG entries, use bucket b. */
5006 		bucket_map[i] = b;
5007 	}
5008 }
5009 
5010 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags)
5011 {
5012 	int i;
5013 	unsigned long register_value;
5014 
5015 	/* This is a bit complicated.  There are 8 registers on
5016 	 * the controller which we write to to tell it 8 different
5017 	 * sizes of commands which there may be.  It's a way of
5018 	 * reducing the DMA done to fetch each command.  Encoded into
5019 	 * each command's tag are 3 bits which communicate to the controller
5020 	 * which of the eight sizes that command fits within.  The size of
5021 	 * each command depends on how many scatter gather entries there are.
5022 	 * Each SG entry requires 16 bytes.  The eight registers are programmed
5023 	 * with the number of 16-byte blocks a command of that size requires.
5024 	 * The smallest command possible requires 5 such 16 byte blocks.
5025 	 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte
5026 	 * blocks.  Note, this only extends to the SG entries contained
5027 	 * within the command block, and does not extend to chained blocks
5028 	 * of SG elements.   bft[] contains the eight values we write to
5029 	 * the registers.  They are not evenly distributed, but have more
5030 	 * sizes for small commands, and fewer sizes for larger commands.
5031 	 */
5032 	int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
5033 	BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
5034 	/*  5 = 1 s/g entry or 4k
5035 	 *  6 = 2 s/g entry or 8k
5036 	 *  8 = 4 s/g entry or 16k
5037 	 * 10 = 6 s/g entry or 24k
5038 	 */
5039 
5040 	/* Controller spec: zero out this buffer. */
5041 	memset(h->reply_pool, 0, h->reply_pool_size);
5042 
5043 	bft[7] = SG_ENTRIES_IN_CMD + 4;
5044 	calc_bucket_map(bft, ARRAY_SIZE(bft),
5045 				SG_ENTRIES_IN_CMD, h->blockFetchTable);
5046 	for (i = 0; i < 8; i++)
5047 		writel(bft[i], &h->transtable->BlockFetch[i]);
5048 
5049 	/* size of controller ring buffer */
5050 	writel(h->max_commands, &h->transtable->RepQSize);
5051 	writel(h->nreply_queues, &h->transtable->RepQCount);
5052 	writel(0, &h->transtable->RepQCtrAddrLow32);
5053 	writel(0, &h->transtable->RepQCtrAddrHigh32);
5054 
5055 	for (i = 0; i < h->nreply_queues; i++) {
5056 		writel(0, &h->transtable->RepQAddr[i].upper);
5057 		writel(h->reply_pool_dhandle +
5058 			(h->max_commands * sizeof(u64) * i),
5059 			&h->transtable->RepQAddr[i].lower);
5060 	}
5061 
5062 	writel(CFGTBL_Trans_Performant | use_short_tags |
5063 		CFGTBL_Trans_enable_directed_msix,
5064 		&(h->cfgtable->HostWrite.TransportRequest));
5065 	writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5066 	hpsa_wait_for_mode_change_ack(h);
5067 	register_value = readl(&(h->cfgtable->TransportActive));
5068 	if (!(register_value & CFGTBL_Trans_Performant)) {
5069 		dev_warn(&h->pdev->dev, "unable to get board into"
5070 					" performant mode\n");
5071 		return;
5072 	}
5073 	/* Change the access methods to the performant access methods */
5074 	h->access = SA5_performant_access;
5075 	h->transMethod = CFGTBL_Trans_Performant;
5076 }
5077 
5078 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h)
5079 {
5080 	u32 trans_support;
5081 	int i;
5082 
5083 	if (hpsa_simple_mode)
5084 		return;
5085 
5086 	trans_support = readl(&(h->cfgtable->TransportSupport));
5087 	if (!(trans_support & PERFORMANT_MODE))
5088 		return;
5089 
5090 	h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1;
5091 	hpsa_get_max_perf_mode_cmds(h);
5092 	/* Performant mode ring buffer and supporting data structures */
5093 	h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues;
5094 	h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size,
5095 				&(h->reply_pool_dhandle));
5096 
5097 	for (i = 0; i < h->nreply_queues; i++) {
5098 		h->reply_queue[i].head = &h->reply_pool[h->max_commands * i];
5099 		h->reply_queue[i].size = h->max_commands;
5100 		h->reply_queue[i].wraparound = 1;  /* spec: init to 1 */
5101 		h->reply_queue[i].current_entry = 0;
5102 	}
5103 
5104 	/* Need a block fetch table for performant mode */
5105 	h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) *
5106 				sizeof(u32)), GFP_KERNEL);
5107 
5108 	if ((h->reply_pool == NULL)
5109 		|| (h->blockFetchTable == NULL))
5110 		goto clean_up;
5111 
5112 	hpsa_enter_performant_mode(h,
5113 		trans_support & CFGTBL_Trans_use_short_tags);
5114 
5115 	return;
5116 
5117 clean_up:
5118 	if (h->reply_pool)
5119 		pci_free_consistent(h->pdev, h->reply_pool_size,
5120 			h->reply_pool, h->reply_pool_dhandle);
5121 	kfree(h->blockFetchTable);
5122 }
5123 
5124 /*
5125  *  This is it.  Register the PCI driver information for the cards we control
5126  *  the OS will call our registered routines when it finds one of our cards.
5127  */
5128 static int __init hpsa_init(void)
5129 {
5130 	return pci_register_driver(&hpsa_pci_driver);
5131 }
5132 
5133 static void __exit hpsa_cleanup(void)
5134 {
5135 	pci_unregister_driver(&hpsa_pci_driver);
5136 }
5137 
5138 module_init(hpsa_init);
5139 module_exit(hpsa_cleanup);
5140