1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2016 Microsemi Corporation 4 * Copyright 2014-2015 PMC-Sierra, Inc. 5 * Copyright 2000,2009-2015 Hewlett-Packard Development Company, L.P. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; version 2 of the License. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 14 * NON INFRINGEMENT. See the GNU General Public License for more details. 15 * 16 * Questions/Comments/Bugfixes to esc.storagedev@microsemi.com 17 * 18 */ 19 20 #include <linux/module.h> 21 #include <linux/interrupt.h> 22 #include <linux/types.h> 23 #include <linux/pci.h> 24 #include <linux/kernel.h> 25 #include <linux/slab.h> 26 #include <linux/delay.h> 27 #include <linux/fs.h> 28 #include <linux/timer.h> 29 #include <linux/init.h> 30 #include <linux/spinlock.h> 31 #include <linux/compat.h> 32 #include <linux/blktrace_api.h> 33 #include <linux/uaccess.h> 34 #include <linux/io.h> 35 #include <linux/dma-mapping.h> 36 #include <linux/completion.h> 37 #include <linux/moduleparam.h> 38 #include <scsi/scsi.h> 39 #include <scsi/scsi_cmnd.h> 40 #include <scsi/scsi_device.h> 41 #include <scsi/scsi_host.h> 42 #include <scsi/scsi_tcq.h> 43 #include <scsi/scsi_eh.h> 44 #include <scsi/scsi_transport_sas.h> 45 #include <scsi/scsi_dbg.h> 46 #include <linux/cciss_ioctl.h> 47 #include <linux/string.h> 48 #include <linux/bitmap.h> 49 #include <linux/atomic.h> 50 #include <linux/jiffies.h> 51 #include <linux/percpu-defs.h> 52 #include <linux/percpu.h> 53 #include <asm/unaligned.h> 54 #include <asm/div64.h> 55 #include "hpsa_cmd.h" 56 #include "hpsa.h" 57 58 /* 59 * HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' 60 * with an optional trailing '-' followed by a byte value (0-255). 61 */ 62 #define HPSA_DRIVER_VERSION "3.4.20-170" 63 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 64 #define HPSA "hpsa" 65 66 /* How long to wait for CISS doorbell communication */ 67 #define CLEAR_EVENT_WAIT_INTERVAL 20 /* ms for each msleep() call */ 68 #define MODE_CHANGE_WAIT_INTERVAL 10 /* ms for each msleep() call */ 69 #define MAX_CLEAR_EVENT_WAIT 30000 /* times 20 ms = 600 s */ 70 #define MAX_MODE_CHANGE_WAIT 2000 /* times 10 ms = 20 s */ 71 #define MAX_IOCTL_CONFIG_WAIT 1000 72 73 /*define how many times we will try a command because of bus resets */ 74 #define MAX_CMD_RETRIES 3 75 /* How long to wait before giving up on a command */ 76 #define HPSA_EH_PTRAID_TIMEOUT (240 * HZ) 77 78 /* Embedded module documentation macros - see modules.h */ 79 MODULE_AUTHOR("Hewlett-Packard Company"); 80 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 81 HPSA_DRIVER_VERSION); 82 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 83 MODULE_VERSION(HPSA_DRIVER_VERSION); 84 MODULE_LICENSE("GPL"); 85 MODULE_ALIAS("cciss"); 86 87 static int hpsa_simple_mode; 88 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 89 MODULE_PARM_DESC(hpsa_simple_mode, 90 "Use 'simple mode' rather than 'performant mode'"); 91 92 /* define the PCI info for the cards we can control */ 93 static const struct pci_device_id hpsa_pci_device_id[] = { 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1920}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103c, 0x1925}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 124 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 125 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 126 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 127 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C6}, 128 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 129 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 130 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 131 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CA}, 132 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CB}, 133 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CC}, 134 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CD}, 135 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21CE}, 136 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0580}, 137 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0581}, 138 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0582}, 139 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0583}, 140 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0584}, 141 {PCI_VENDOR_ID_ADAPTEC2, 0x0290, 0x9005, 0x0585}, 142 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0076}, 143 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0087}, 144 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x007D}, 145 {PCI_VENDOR_ID_HP_3PAR, 0x0075, 0x1590, 0x0088}, 146 {PCI_VENDOR_ID_HP, 0x333f, 0x103c, 0x333f}, 147 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 148 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 149 {PCI_VENDOR_ID_COMPAQ, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 150 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 151 {0,} 152 }; 153 154 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 155 156 /* board_id = Subsystem Device ID & Vendor ID 157 * product = Marketing Name for the board 158 * access = Address of the struct of function pointers 159 */ 160 static struct board_type products[] = { 161 {0x40700E11, "Smart Array 5300", &SA5A_access}, 162 {0x40800E11, "Smart Array 5i", &SA5B_access}, 163 {0x40820E11, "Smart Array 532", &SA5B_access}, 164 {0x40830E11, "Smart Array 5312", &SA5B_access}, 165 {0x409A0E11, "Smart Array 641", &SA5A_access}, 166 {0x409B0E11, "Smart Array 642", &SA5A_access}, 167 {0x409C0E11, "Smart Array 6400", &SA5A_access}, 168 {0x409D0E11, "Smart Array 6400 EM", &SA5A_access}, 169 {0x40910E11, "Smart Array 6i", &SA5A_access}, 170 {0x3225103C, "Smart Array P600", &SA5A_access}, 171 {0x3223103C, "Smart Array P800", &SA5A_access}, 172 {0x3234103C, "Smart Array P400", &SA5A_access}, 173 {0x3235103C, "Smart Array P400i", &SA5A_access}, 174 {0x3211103C, "Smart Array E200i", &SA5A_access}, 175 {0x3212103C, "Smart Array E200", &SA5A_access}, 176 {0x3213103C, "Smart Array E200i", &SA5A_access}, 177 {0x3214103C, "Smart Array E200i", &SA5A_access}, 178 {0x3215103C, "Smart Array E200i", &SA5A_access}, 179 {0x3237103C, "Smart Array E500", &SA5A_access}, 180 {0x323D103C, "Smart Array P700m", &SA5A_access}, 181 {0x3241103C, "Smart Array P212", &SA5_access}, 182 {0x3243103C, "Smart Array P410", &SA5_access}, 183 {0x3245103C, "Smart Array P410i", &SA5_access}, 184 {0x3247103C, "Smart Array P411", &SA5_access}, 185 {0x3249103C, "Smart Array P812", &SA5_access}, 186 {0x324A103C, "Smart Array P712m", &SA5_access}, 187 {0x324B103C, "Smart Array P711m", &SA5_access}, 188 {0x3233103C, "HP StorageWorks 1210m", &SA5_access}, /* alias of 333f */ 189 {0x3350103C, "Smart Array P222", &SA5_access}, 190 {0x3351103C, "Smart Array P420", &SA5_access}, 191 {0x3352103C, "Smart Array P421", &SA5_access}, 192 {0x3353103C, "Smart Array P822", &SA5_access}, 193 {0x3354103C, "Smart Array P420i", &SA5_access}, 194 {0x3355103C, "Smart Array P220i", &SA5_access}, 195 {0x3356103C, "Smart Array P721m", &SA5_access}, 196 {0x1920103C, "Smart Array P430i", &SA5_access}, 197 {0x1921103C, "Smart Array P830i", &SA5_access}, 198 {0x1922103C, "Smart Array P430", &SA5_access}, 199 {0x1923103C, "Smart Array P431", &SA5_access}, 200 {0x1924103C, "Smart Array P830", &SA5_access}, 201 {0x1925103C, "Smart Array P831", &SA5_access}, 202 {0x1926103C, "Smart Array P731m", &SA5_access}, 203 {0x1928103C, "Smart Array P230i", &SA5_access}, 204 {0x1929103C, "Smart Array P530", &SA5_access}, 205 {0x21BD103C, "Smart Array P244br", &SA5_access}, 206 {0x21BE103C, "Smart Array P741m", &SA5_access}, 207 {0x21BF103C, "Smart HBA H240ar", &SA5_access}, 208 {0x21C0103C, "Smart Array P440ar", &SA5_access}, 209 {0x21C1103C, "Smart Array P840ar", &SA5_access}, 210 {0x21C2103C, "Smart Array P440", &SA5_access}, 211 {0x21C3103C, "Smart Array P441", &SA5_access}, 212 {0x21C4103C, "Smart Array", &SA5_access}, 213 {0x21C5103C, "Smart Array P841", &SA5_access}, 214 {0x21C6103C, "Smart HBA H244br", &SA5_access}, 215 {0x21C7103C, "Smart HBA H240", &SA5_access}, 216 {0x21C8103C, "Smart HBA H241", &SA5_access}, 217 {0x21C9103C, "Smart Array", &SA5_access}, 218 {0x21CA103C, "Smart Array P246br", &SA5_access}, 219 {0x21CB103C, "Smart Array P840", &SA5_access}, 220 {0x21CC103C, "Smart Array", &SA5_access}, 221 {0x21CD103C, "Smart Array", &SA5_access}, 222 {0x21CE103C, "Smart HBA", &SA5_access}, 223 {0x05809005, "SmartHBA-SA", &SA5_access}, 224 {0x05819005, "SmartHBA-SA 8i", &SA5_access}, 225 {0x05829005, "SmartHBA-SA 8i8e", &SA5_access}, 226 {0x05839005, "SmartHBA-SA 8e", &SA5_access}, 227 {0x05849005, "SmartHBA-SA 16i", &SA5_access}, 228 {0x05859005, "SmartHBA-SA 4i4e", &SA5_access}, 229 {0x00761590, "HP Storage P1224 Array Controller", &SA5_access}, 230 {0x00871590, "HP Storage P1224e Array Controller", &SA5_access}, 231 {0x007D1590, "HP Storage P1228 Array Controller", &SA5_access}, 232 {0x00881590, "HP Storage P1228e Array Controller", &SA5_access}, 233 {0x333f103c, "HP StorageWorks 1210m Array Controller", &SA5_access}, 234 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 235 }; 236 237 static struct scsi_transport_template *hpsa_sas_transport_template; 238 static int hpsa_add_sas_host(struct ctlr_info *h); 239 static void hpsa_delete_sas_host(struct ctlr_info *h); 240 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 241 struct hpsa_scsi_dev_t *device); 242 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device); 243 static struct hpsa_scsi_dev_t 244 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 245 struct sas_rphy *rphy); 246 247 #define SCSI_CMD_BUSY ((struct scsi_cmnd *)&hpsa_cmd_busy) 248 static const struct scsi_cmnd hpsa_cmd_busy; 249 #define SCSI_CMD_IDLE ((struct scsi_cmnd *)&hpsa_cmd_idle) 250 static const struct scsi_cmnd hpsa_cmd_idle; 251 static int number_of_controllers; 252 253 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 254 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 255 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 256 void __user *arg); 257 static int hpsa_passthru_ioctl(struct ctlr_info *h, 258 IOCTL_Command_struct *iocommand); 259 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 260 BIG_IOCTL_Command_struct *ioc); 261 262 #ifdef CONFIG_COMPAT 263 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 264 void __user *arg); 265 #endif 266 267 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 268 static struct CommandList *cmd_alloc(struct ctlr_info *h); 269 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c); 270 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 271 struct scsi_cmnd *scmd); 272 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 273 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 274 int cmd_type); 275 static void hpsa_free_cmd_pool(struct ctlr_info *h); 276 #define VPD_PAGE (1 << 8) 277 #define HPSA_SIMPLE_ERROR_BITS 0x03 278 279 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 280 static void hpsa_scan_start(struct Scsi_Host *); 281 static int hpsa_scan_finished(struct Scsi_Host *sh, 282 unsigned long elapsed_time); 283 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth); 284 285 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 286 static int hpsa_slave_alloc(struct scsi_device *sdev); 287 static int hpsa_slave_configure(struct scsi_device *sdev); 288 static void hpsa_slave_destroy(struct scsi_device *sdev); 289 290 static void hpsa_update_scsi_devices(struct ctlr_info *h); 291 static int check_for_unit_attention(struct ctlr_info *h, 292 struct CommandList *c); 293 static void check_ioctl_unit_attention(struct ctlr_info *h, 294 struct CommandList *c); 295 /* performant mode helper functions */ 296 static void calc_bucket_map(int *bucket, int num_buckets, 297 int nsgs, int min_blocks, u32 *bucket_map); 298 static void hpsa_free_performant_mode(struct ctlr_info *h); 299 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 300 static inline u32 next_command(struct ctlr_info *h, u8 q); 301 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 302 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 303 u64 *cfg_offset); 304 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 305 unsigned long *memory_bar); 306 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 307 bool *legacy_board); 308 static int wait_for_device_to_become_ready(struct ctlr_info *h, 309 unsigned char lunaddr[], 310 int reply_queue); 311 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 312 int wait_for_ready); 313 static inline void finish_cmd(struct CommandList *c); 314 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h); 315 #define BOARD_NOT_READY 0 316 #define BOARD_READY 1 317 static void hpsa_drain_accel_commands(struct ctlr_info *h); 318 static void hpsa_flush_cache(struct ctlr_info *h); 319 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 320 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 321 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk); 322 static void hpsa_command_resubmit_worker(struct work_struct *work); 323 static u32 lockup_detected(struct ctlr_info *h); 324 static int detect_controller_lockup(struct ctlr_info *h); 325 static void hpsa_disable_rld_caching(struct ctlr_info *h); 326 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 327 struct ReportExtendedLUNdata *buf, int bufsize); 328 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 329 unsigned char scsi3addr[], u8 page); 330 static int hpsa_luns_changed(struct ctlr_info *h); 331 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 332 struct hpsa_scsi_dev_t *dev, 333 unsigned char *scsi3addr); 334 335 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 336 { 337 unsigned long *priv = shost_priv(sdev->host); 338 return (struct ctlr_info *) *priv; 339 } 340 341 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 342 { 343 unsigned long *priv = shost_priv(sh); 344 return (struct ctlr_info *) *priv; 345 } 346 347 static inline bool hpsa_is_cmd_idle(struct CommandList *c) 348 { 349 return c->scsi_cmd == SCSI_CMD_IDLE; 350 } 351 352 /* extract sense key, asc, and ascq from sense data. -1 means invalid. */ 353 static void decode_sense_data(const u8 *sense_data, int sense_data_len, 354 u8 *sense_key, u8 *asc, u8 *ascq) 355 { 356 struct scsi_sense_hdr sshdr; 357 bool rc; 358 359 *sense_key = -1; 360 *asc = -1; 361 *ascq = -1; 362 363 if (sense_data_len < 1) 364 return; 365 366 rc = scsi_normalize_sense(sense_data, sense_data_len, &sshdr); 367 if (rc) { 368 *sense_key = sshdr.sense_key; 369 *asc = sshdr.asc; 370 *ascq = sshdr.ascq; 371 } 372 } 373 374 static int check_for_unit_attention(struct ctlr_info *h, 375 struct CommandList *c) 376 { 377 u8 sense_key, asc, ascq; 378 int sense_len; 379 380 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 381 sense_len = sizeof(c->err_info->SenseInfo); 382 else 383 sense_len = c->err_info->SenseLen; 384 385 decode_sense_data(c->err_info->SenseInfo, sense_len, 386 &sense_key, &asc, &ascq); 387 if (sense_key != UNIT_ATTENTION || asc == 0xff) 388 return 0; 389 390 switch (asc) { 391 case STATE_CHANGED: 392 dev_warn(&h->pdev->dev, 393 "%s: a state change detected, command retried\n", 394 h->devname); 395 break; 396 case LUN_FAILED: 397 dev_warn(&h->pdev->dev, 398 "%s: LUN failure detected\n", h->devname); 399 break; 400 case REPORT_LUNS_CHANGED: 401 dev_warn(&h->pdev->dev, 402 "%s: report LUN data changed\n", h->devname); 403 /* 404 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 405 * target (array) devices. 406 */ 407 break; 408 case POWER_OR_RESET: 409 dev_warn(&h->pdev->dev, 410 "%s: a power on or device reset detected\n", 411 h->devname); 412 break; 413 case UNIT_ATTENTION_CLEARED: 414 dev_warn(&h->pdev->dev, 415 "%s: unit attention cleared by another initiator\n", 416 h->devname); 417 break; 418 default: 419 dev_warn(&h->pdev->dev, 420 "%s: unknown unit attention detected\n", 421 h->devname); 422 break; 423 } 424 return 1; 425 } 426 427 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 428 { 429 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 430 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 431 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 432 return 0; 433 dev_warn(&h->pdev->dev, HPSA "device busy"); 434 return 1; 435 } 436 437 static u32 lockup_detected(struct ctlr_info *h); 438 static ssize_t host_show_lockup_detected(struct device *dev, 439 struct device_attribute *attr, char *buf) 440 { 441 int ld; 442 struct ctlr_info *h; 443 struct Scsi_Host *shost = class_to_shost(dev); 444 445 h = shost_to_hba(shost); 446 ld = lockup_detected(h); 447 448 return sprintf(buf, "ld=%d\n", ld); 449 } 450 451 static ssize_t host_store_hp_ssd_smart_path_status(struct device *dev, 452 struct device_attribute *attr, 453 const char *buf, size_t count) 454 { 455 int status, len; 456 struct ctlr_info *h; 457 struct Scsi_Host *shost = class_to_shost(dev); 458 char tmpbuf[10]; 459 460 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 461 return -EACCES; 462 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 463 strncpy(tmpbuf, buf, len); 464 tmpbuf[len] = '\0'; 465 if (sscanf(tmpbuf, "%d", &status) != 1) 466 return -EINVAL; 467 h = shost_to_hba(shost); 468 h->acciopath_status = !!status; 469 dev_warn(&h->pdev->dev, 470 "hpsa: HP SSD Smart Path %s via sysfs update.\n", 471 h->acciopath_status ? "enabled" : "disabled"); 472 return count; 473 } 474 475 static ssize_t host_store_raid_offload_debug(struct device *dev, 476 struct device_attribute *attr, 477 const char *buf, size_t count) 478 { 479 int debug_level, len; 480 struct ctlr_info *h; 481 struct Scsi_Host *shost = class_to_shost(dev); 482 char tmpbuf[10]; 483 484 if (!capable(CAP_SYS_ADMIN) || !capable(CAP_SYS_RAWIO)) 485 return -EACCES; 486 len = count > sizeof(tmpbuf) - 1 ? sizeof(tmpbuf) - 1 : count; 487 strncpy(tmpbuf, buf, len); 488 tmpbuf[len] = '\0'; 489 if (sscanf(tmpbuf, "%d", &debug_level) != 1) 490 return -EINVAL; 491 if (debug_level < 0) 492 debug_level = 0; 493 h = shost_to_hba(shost); 494 h->raid_offload_debug = debug_level; 495 dev_warn(&h->pdev->dev, "hpsa: Set raid_offload_debug level = %d\n", 496 h->raid_offload_debug); 497 return count; 498 } 499 500 static ssize_t host_store_rescan(struct device *dev, 501 struct device_attribute *attr, 502 const char *buf, size_t count) 503 { 504 struct ctlr_info *h; 505 struct Scsi_Host *shost = class_to_shost(dev); 506 h = shost_to_hba(shost); 507 hpsa_scan_start(h->scsi_host); 508 return count; 509 } 510 511 static void hpsa_turn_off_ioaccel_for_device(struct hpsa_scsi_dev_t *device) 512 { 513 device->offload_enabled = 0; 514 device->offload_to_be_enabled = 0; 515 } 516 517 static ssize_t host_show_firmware_revision(struct device *dev, 518 struct device_attribute *attr, char *buf) 519 { 520 struct ctlr_info *h; 521 struct Scsi_Host *shost = class_to_shost(dev); 522 unsigned char *fwrev; 523 524 h = shost_to_hba(shost); 525 if (!h->hba_inquiry_data) 526 return 0; 527 fwrev = &h->hba_inquiry_data[32]; 528 return snprintf(buf, 20, "%c%c%c%c\n", 529 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 530 } 531 532 static ssize_t host_show_commands_outstanding(struct device *dev, 533 struct device_attribute *attr, char *buf) 534 { 535 struct Scsi_Host *shost = class_to_shost(dev); 536 struct ctlr_info *h = shost_to_hba(shost); 537 538 return snprintf(buf, 20, "%d\n", 539 atomic_read(&h->commands_outstanding)); 540 } 541 542 static ssize_t host_show_transport_mode(struct device *dev, 543 struct device_attribute *attr, char *buf) 544 { 545 struct ctlr_info *h; 546 struct Scsi_Host *shost = class_to_shost(dev); 547 548 h = shost_to_hba(shost); 549 return snprintf(buf, 20, "%s\n", 550 h->transMethod & CFGTBL_Trans_Performant ? 551 "performant" : "simple"); 552 } 553 554 static ssize_t host_show_hp_ssd_smart_path_status(struct device *dev, 555 struct device_attribute *attr, char *buf) 556 { 557 struct ctlr_info *h; 558 struct Scsi_Host *shost = class_to_shost(dev); 559 560 h = shost_to_hba(shost); 561 return snprintf(buf, 30, "HP SSD Smart Path %s\n", 562 (h->acciopath_status == 1) ? "enabled" : "disabled"); 563 } 564 565 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 566 static u32 unresettable_controller[] = { 567 0x324a103C, /* Smart Array P712m */ 568 0x324b103C, /* Smart Array P711m */ 569 0x3223103C, /* Smart Array P800 */ 570 0x3234103C, /* Smart Array P400 */ 571 0x3235103C, /* Smart Array P400i */ 572 0x3211103C, /* Smart Array E200i */ 573 0x3212103C, /* Smart Array E200 */ 574 0x3213103C, /* Smart Array E200i */ 575 0x3214103C, /* Smart Array E200i */ 576 0x3215103C, /* Smart Array E200i */ 577 0x3237103C, /* Smart Array E500 */ 578 0x323D103C, /* Smart Array P700m */ 579 0x40800E11, /* Smart Array 5i */ 580 0x409C0E11, /* Smart Array 6400 */ 581 0x409D0E11, /* Smart Array 6400 EM */ 582 0x40700E11, /* Smart Array 5300 */ 583 0x40820E11, /* Smart Array 532 */ 584 0x40830E11, /* Smart Array 5312 */ 585 0x409A0E11, /* Smart Array 641 */ 586 0x409B0E11, /* Smart Array 642 */ 587 0x40910E11, /* Smart Array 6i */ 588 }; 589 590 /* List of controllers which cannot even be soft reset */ 591 static u32 soft_unresettable_controller[] = { 592 0x40800E11, /* Smart Array 5i */ 593 0x40700E11, /* Smart Array 5300 */ 594 0x40820E11, /* Smart Array 532 */ 595 0x40830E11, /* Smart Array 5312 */ 596 0x409A0E11, /* Smart Array 641 */ 597 0x409B0E11, /* Smart Array 642 */ 598 0x40910E11, /* Smart Array 6i */ 599 /* Exclude 640x boards. These are two pci devices in one slot 600 * which share a battery backed cache module. One controls the 601 * cache, the other accesses the cache through the one that controls 602 * it. If we reset the one controlling the cache, the other will 603 * likely not be happy. Just forbid resetting this conjoined mess. 604 * The 640x isn't really supported by hpsa anyway. 605 */ 606 0x409C0E11, /* Smart Array 6400 */ 607 0x409D0E11, /* Smart Array 6400 EM */ 608 }; 609 610 static int board_id_in_array(u32 a[], int nelems, u32 board_id) 611 { 612 int i; 613 614 for (i = 0; i < nelems; i++) 615 if (a[i] == board_id) 616 return 1; 617 return 0; 618 } 619 620 static int ctlr_is_hard_resettable(u32 board_id) 621 { 622 return !board_id_in_array(unresettable_controller, 623 ARRAY_SIZE(unresettable_controller), board_id); 624 } 625 626 static int ctlr_is_soft_resettable(u32 board_id) 627 { 628 return !board_id_in_array(soft_unresettable_controller, 629 ARRAY_SIZE(soft_unresettable_controller), board_id); 630 } 631 632 static int ctlr_is_resettable(u32 board_id) 633 { 634 return ctlr_is_hard_resettable(board_id) || 635 ctlr_is_soft_resettable(board_id); 636 } 637 638 static ssize_t host_show_resettable(struct device *dev, 639 struct device_attribute *attr, char *buf) 640 { 641 struct ctlr_info *h; 642 struct Scsi_Host *shost = class_to_shost(dev); 643 644 h = shost_to_hba(shost); 645 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 646 } 647 648 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 649 { 650 return (scsi3addr[3] & 0xC0) == 0x40; 651 } 652 653 static const char * const raid_label[] = { "0", "4", "1(+0)", "5", "5+1", "6", 654 "1(+0)ADM", "UNKNOWN", "PHYS DRV" 655 }; 656 #define HPSA_RAID_0 0 657 #define HPSA_RAID_4 1 658 #define HPSA_RAID_1 2 /* also used for RAID 10 */ 659 #define HPSA_RAID_5 3 /* also used for RAID 50 */ 660 #define HPSA_RAID_51 4 661 #define HPSA_RAID_6 5 /* also used for RAID 60 */ 662 #define HPSA_RAID_ADM 6 /* also used for RAID 1+0 ADM */ 663 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 2) 664 #define PHYSICAL_DRIVE (ARRAY_SIZE(raid_label) - 1) 665 666 static inline bool is_logical_device(struct hpsa_scsi_dev_t *device) 667 { 668 return !device->physical_device; 669 } 670 671 static ssize_t raid_level_show(struct device *dev, 672 struct device_attribute *attr, char *buf) 673 { 674 ssize_t l = 0; 675 unsigned char rlevel; 676 struct ctlr_info *h; 677 struct scsi_device *sdev; 678 struct hpsa_scsi_dev_t *hdev; 679 unsigned long flags; 680 681 sdev = to_scsi_device(dev); 682 h = sdev_to_hba(sdev); 683 spin_lock_irqsave(&h->lock, flags); 684 hdev = sdev->hostdata; 685 if (!hdev) { 686 spin_unlock_irqrestore(&h->lock, flags); 687 return -ENODEV; 688 } 689 690 /* Is this even a logical drive? */ 691 if (!is_logical_device(hdev)) { 692 spin_unlock_irqrestore(&h->lock, flags); 693 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 694 return l; 695 } 696 697 rlevel = hdev->raid_level; 698 spin_unlock_irqrestore(&h->lock, flags); 699 if (rlevel > RAID_UNKNOWN) 700 rlevel = RAID_UNKNOWN; 701 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 702 return l; 703 } 704 705 static ssize_t lunid_show(struct device *dev, 706 struct device_attribute *attr, char *buf) 707 { 708 struct ctlr_info *h; 709 struct scsi_device *sdev; 710 struct hpsa_scsi_dev_t *hdev; 711 unsigned long flags; 712 unsigned char lunid[8]; 713 714 sdev = to_scsi_device(dev); 715 h = sdev_to_hba(sdev); 716 spin_lock_irqsave(&h->lock, flags); 717 hdev = sdev->hostdata; 718 if (!hdev) { 719 spin_unlock_irqrestore(&h->lock, flags); 720 return -ENODEV; 721 } 722 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 723 spin_unlock_irqrestore(&h->lock, flags); 724 return snprintf(buf, 20, "0x%8phN\n", lunid); 725 } 726 727 static ssize_t unique_id_show(struct device *dev, 728 struct device_attribute *attr, char *buf) 729 { 730 struct ctlr_info *h; 731 struct scsi_device *sdev; 732 struct hpsa_scsi_dev_t *hdev; 733 unsigned long flags; 734 unsigned char sn[16]; 735 736 sdev = to_scsi_device(dev); 737 h = sdev_to_hba(sdev); 738 spin_lock_irqsave(&h->lock, flags); 739 hdev = sdev->hostdata; 740 if (!hdev) { 741 spin_unlock_irqrestore(&h->lock, flags); 742 return -ENODEV; 743 } 744 memcpy(sn, hdev->device_id, sizeof(sn)); 745 spin_unlock_irqrestore(&h->lock, flags); 746 return snprintf(buf, 16 * 2 + 2, 747 "%02X%02X%02X%02X%02X%02X%02X%02X" 748 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 749 sn[0], sn[1], sn[2], sn[3], 750 sn[4], sn[5], sn[6], sn[7], 751 sn[8], sn[9], sn[10], sn[11], 752 sn[12], sn[13], sn[14], sn[15]); 753 } 754 755 static ssize_t sas_address_show(struct device *dev, 756 struct device_attribute *attr, char *buf) 757 { 758 struct ctlr_info *h; 759 struct scsi_device *sdev; 760 struct hpsa_scsi_dev_t *hdev; 761 unsigned long flags; 762 u64 sas_address; 763 764 sdev = to_scsi_device(dev); 765 h = sdev_to_hba(sdev); 766 spin_lock_irqsave(&h->lock, flags); 767 hdev = sdev->hostdata; 768 if (!hdev || is_logical_device(hdev) || !hdev->expose_device) { 769 spin_unlock_irqrestore(&h->lock, flags); 770 return -ENODEV; 771 } 772 sas_address = hdev->sas_address; 773 spin_unlock_irqrestore(&h->lock, flags); 774 775 return snprintf(buf, PAGE_SIZE, "0x%016llx\n", sas_address); 776 } 777 778 static ssize_t host_show_hp_ssd_smart_path_enabled(struct device *dev, 779 struct device_attribute *attr, char *buf) 780 { 781 struct ctlr_info *h; 782 struct scsi_device *sdev; 783 struct hpsa_scsi_dev_t *hdev; 784 unsigned long flags; 785 int offload_enabled; 786 787 sdev = to_scsi_device(dev); 788 h = sdev_to_hba(sdev); 789 spin_lock_irqsave(&h->lock, flags); 790 hdev = sdev->hostdata; 791 if (!hdev) { 792 spin_unlock_irqrestore(&h->lock, flags); 793 return -ENODEV; 794 } 795 offload_enabled = hdev->offload_enabled; 796 spin_unlock_irqrestore(&h->lock, flags); 797 798 if (hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) 799 return snprintf(buf, 20, "%d\n", offload_enabled); 800 else 801 return snprintf(buf, 40, "%s\n", 802 "Not applicable for a controller"); 803 } 804 805 #define MAX_PATHS 8 806 static ssize_t path_info_show(struct device *dev, 807 struct device_attribute *attr, char *buf) 808 { 809 struct ctlr_info *h; 810 struct scsi_device *sdev; 811 struct hpsa_scsi_dev_t *hdev; 812 unsigned long flags; 813 int i; 814 int output_len = 0; 815 u8 box; 816 u8 bay; 817 u8 path_map_index = 0; 818 char *active; 819 unsigned char phys_connector[2]; 820 821 sdev = to_scsi_device(dev); 822 h = sdev_to_hba(sdev); 823 spin_lock_irqsave(&h->devlock, flags); 824 hdev = sdev->hostdata; 825 if (!hdev) { 826 spin_unlock_irqrestore(&h->devlock, flags); 827 return -ENODEV; 828 } 829 830 bay = hdev->bay; 831 for (i = 0; i < MAX_PATHS; i++) { 832 path_map_index = 1<<i; 833 if (i == hdev->active_path_index) 834 active = "Active"; 835 else if (hdev->path_map & path_map_index) 836 active = "Inactive"; 837 else 838 continue; 839 840 output_len += scnprintf(buf + output_len, 841 PAGE_SIZE - output_len, 842 "[%d:%d:%d:%d] %20.20s ", 843 h->scsi_host->host_no, 844 hdev->bus, hdev->target, hdev->lun, 845 scsi_device_type(hdev->devtype)); 846 847 if (hdev->devtype == TYPE_RAID || is_logical_device(hdev)) { 848 output_len += scnprintf(buf + output_len, 849 PAGE_SIZE - output_len, 850 "%s\n", active); 851 continue; 852 } 853 854 box = hdev->box[i]; 855 memcpy(&phys_connector, &hdev->phys_connector[i], 856 sizeof(phys_connector)); 857 if (phys_connector[0] < '0') 858 phys_connector[0] = '0'; 859 if (phys_connector[1] < '0') 860 phys_connector[1] = '0'; 861 output_len += scnprintf(buf + output_len, 862 PAGE_SIZE - output_len, 863 "PORT: %.2s ", 864 phys_connector); 865 if ((hdev->devtype == TYPE_DISK || hdev->devtype == TYPE_ZBC) && 866 hdev->expose_device) { 867 if (box == 0 || box == 0xFF) { 868 output_len += scnprintf(buf + output_len, 869 PAGE_SIZE - output_len, 870 "BAY: %hhu %s\n", 871 bay, active); 872 } else { 873 output_len += scnprintf(buf + output_len, 874 PAGE_SIZE - output_len, 875 "BOX: %hhu BAY: %hhu %s\n", 876 box, bay, active); 877 } 878 } else if (box != 0 && box != 0xFF) { 879 output_len += scnprintf(buf + output_len, 880 PAGE_SIZE - output_len, "BOX: %hhu %s\n", 881 box, active); 882 } else 883 output_len += scnprintf(buf + output_len, 884 PAGE_SIZE - output_len, "%s\n", active); 885 } 886 887 spin_unlock_irqrestore(&h->devlock, flags); 888 return output_len; 889 } 890 891 static ssize_t host_show_ctlr_num(struct device *dev, 892 struct device_attribute *attr, char *buf) 893 { 894 struct ctlr_info *h; 895 struct Scsi_Host *shost = class_to_shost(dev); 896 897 h = shost_to_hba(shost); 898 return snprintf(buf, 20, "%d\n", h->ctlr); 899 } 900 901 static ssize_t host_show_legacy_board(struct device *dev, 902 struct device_attribute *attr, char *buf) 903 { 904 struct ctlr_info *h; 905 struct Scsi_Host *shost = class_to_shost(dev); 906 907 h = shost_to_hba(shost); 908 return snprintf(buf, 20, "%d\n", h->legacy_board ? 1 : 0); 909 } 910 911 static DEVICE_ATTR_RO(raid_level); 912 static DEVICE_ATTR_RO(lunid); 913 static DEVICE_ATTR_RO(unique_id); 914 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 915 static DEVICE_ATTR_RO(sas_address); 916 static DEVICE_ATTR(hp_ssd_smart_path_enabled, S_IRUGO, 917 host_show_hp_ssd_smart_path_enabled, NULL); 918 static DEVICE_ATTR_RO(path_info); 919 static DEVICE_ATTR(hp_ssd_smart_path_status, S_IWUSR|S_IRUGO|S_IROTH, 920 host_show_hp_ssd_smart_path_status, 921 host_store_hp_ssd_smart_path_status); 922 static DEVICE_ATTR(raid_offload_debug, S_IWUSR, NULL, 923 host_store_raid_offload_debug); 924 static DEVICE_ATTR(firmware_revision, S_IRUGO, 925 host_show_firmware_revision, NULL); 926 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 927 host_show_commands_outstanding, NULL); 928 static DEVICE_ATTR(transport_mode, S_IRUGO, 929 host_show_transport_mode, NULL); 930 static DEVICE_ATTR(resettable, S_IRUGO, 931 host_show_resettable, NULL); 932 static DEVICE_ATTR(lockup_detected, S_IRUGO, 933 host_show_lockup_detected, NULL); 934 static DEVICE_ATTR(ctlr_num, S_IRUGO, 935 host_show_ctlr_num, NULL); 936 static DEVICE_ATTR(legacy_board, S_IRUGO, 937 host_show_legacy_board, NULL); 938 939 static struct device_attribute *hpsa_sdev_attrs[] = { 940 &dev_attr_raid_level, 941 &dev_attr_lunid, 942 &dev_attr_unique_id, 943 &dev_attr_hp_ssd_smart_path_enabled, 944 &dev_attr_path_info, 945 &dev_attr_sas_address, 946 NULL, 947 }; 948 949 static struct device_attribute *hpsa_shost_attrs[] = { 950 &dev_attr_rescan, 951 &dev_attr_firmware_revision, 952 &dev_attr_commands_outstanding, 953 &dev_attr_transport_mode, 954 &dev_attr_resettable, 955 &dev_attr_hp_ssd_smart_path_status, 956 &dev_attr_raid_offload_debug, 957 &dev_attr_lockup_detected, 958 &dev_attr_ctlr_num, 959 &dev_attr_legacy_board, 960 NULL, 961 }; 962 963 #define HPSA_NRESERVED_CMDS (HPSA_CMDS_RESERVED_FOR_DRIVER +\ 964 HPSA_MAX_CONCURRENT_PASSTHRUS) 965 966 static struct scsi_host_template hpsa_driver_template = { 967 .module = THIS_MODULE, 968 .name = HPSA, 969 .proc_name = HPSA, 970 .queuecommand = hpsa_scsi_queue_command, 971 .scan_start = hpsa_scan_start, 972 .scan_finished = hpsa_scan_finished, 973 .change_queue_depth = hpsa_change_queue_depth, 974 .this_id = -1, 975 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 976 .ioctl = hpsa_ioctl, 977 .slave_alloc = hpsa_slave_alloc, 978 .slave_configure = hpsa_slave_configure, 979 .slave_destroy = hpsa_slave_destroy, 980 #ifdef CONFIG_COMPAT 981 .compat_ioctl = hpsa_compat_ioctl, 982 #endif 983 .sdev_attrs = hpsa_sdev_attrs, 984 .shost_attrs = hpsa_shost_attrs, 985 .max_sectors = 2048, 986 .no_write_same = 1, 987 }; 988 989 static inline u32 next_command(struct ctlr_info *h, u8 q) 990 { 991 u32 a; 992 struct reply_queue_buffer *rq = &h->reply_queue[q]; 993 994 if (h->transMethod & CFGTBL_Trans_io_accel1) 995 return h->access.command_completed(h, q); 996 997 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 998 return h->access.command_completed(h, q); 999 1000 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 1001 a = rq->head[rq->current_entry]; 1002 rq->current_entry++; 1003 atomic_dec(&h->commands_outstanding); 1004 } else { 1005 a = FIFO_EMPTY; 1006 } 1007 /* Check for wraparound */ 1008 if (rq->current_entry == h->max_commands) { 1009 rq->current_entry = 0; 1010 rq->wraparound ^= 1; 1011 } 1012 return a; 1013 } 1014 1015 /* 1016 * There are some special bits in the bus address of the 1017 * command that we have to set for the controller to know 1018 * how to process the command: 1019 * 1020 * Normal performant mode: 1021 * bit 0: 1 means performant mode, 0 means simple mode. 1022 * bits 1-3 = block fetch table entry 1023 * bits 4-6 = command type (== 0) 1024 * 1025 * ioaccel1 mode: 1026 * bit 0 = "performant mode" bit. 1027 * bits 1-3 = block fetch table entry 1028 * bits 4-6 = command type (== 110) 1029 * (command type is needed because ioaccel1 mode 1030 * commands are submitted through the same register as normal 1031 * mode commands, so this is how the controller knows whether 1032 * the command is normal mode or ioaccel1 mode.) 1033 * 1034 * ioaccel2 mode: 1035 * bit 0 = "performant mode" bit. 1036 * bits 1-4 = block fetch table entry (note extra bit) 1037 * bits 4-6 = not needed, because ioaccel2 mode has 1038 * a separate special register for submitting commands. 1039 */ 1040 1041 /* 1042 * set_performant_mode: Modify the tag for cciss performant 1043 * set bit 0 for pull model, bits 3-1 for block fetch 1044 * register number 1045 */ 1046 #define DEFAULT_REPLY_QUEUE (-1) 1047 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c, 1048 int reply_queue) 1049 { 1050 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 1051 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 1052 if (unlikely(!h->msix_vectors)) 1053 return; 1054 c->Header.ReplyQueue = reply_queue; 1055 } 1056 } 1057 1058 static void set_ioaccel1_performant_mode(struct ctlr_info *h, 1059 struct CommandList *c, 1060 int reply_queue) 1061 { 1062 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 1063 1064 /* 1065 * Tell the controller to post the reply to the queue for this 1066 * processor. This seems to give the best I/O throughput. 1067 */ 1068 cp->ReplyQueue = reply_queue; 1069 /* 1070 * Set the bits in the address sent down to include: 1071 * - performant mode bit (bit 0) 1072 * - pull count (bits 1-3) 1073 * - command type (bits 4-6) 1074 */ 1075 c->busaddr |= 1 | (h->ioaccel1_blockFetchTable[c->Header.SGList] << 1) | 1076 IOACCEL1_BUSADDR_CMDTYPE; 1077 } 1078 1079 static void set_ioaccel2_tmf_performant_mode(struct ctlr_info *h, 1080 struct CommandList *c, 1081 int reply_queue) 1082 { 1083 struct hpsa_tmf_struct *cp = (struct hpsa_tmf_struct *) 1084 &h->ioaccel2_cmd_pool[c->cmdindex]; 1085 1086 /* Tell the controller to post the reply to the queue for this 1087 * processor. This seems to give the best I/O throughput. 1088 */ 1089 cp->reply_queue = reply_queue; 1090 /* Set the bits in the address sent down to include: 1091 * - performant mode bit not used in ioaccel mode 2 1092 * - pull count (bits 0-3) 1093 * - command type isn't needed for ioaccel2 1094 */ 1095 c->busaddr |= h->ioaccel2_blockFetchTable[0]; 1096 } 1097 1098 static void set_ioaccel2_performant_mode(struct ctlr_info *h, 1099 struct CommandList *c, 1100 int reply_queue) 1101 { 1102 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 1103 1104 /* 1105 * Tell the controller to post the reply to the queue for this 1106 * processor. This seems to give the best I/O throughput. 1107 */ 1108 cp->reply_queue = reply_queue; 1109 /* 1110 * Set the bits in the address sent down to include: 1111 * - performant mode bit not used in ioaccel mode 2 1112 * - pull count (bits 0-3) 1113 * - command type isn't needed for ioaccel2 1114 */ 1115 c->busaddr |= (h->ioaccel2_blockFetchTable[cp->sg_count]); 1116 } 1117 1118 static int is_firmware_flash_cmd(u8 *cdb) 1119 { 1120 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 1121 } 1122 1123 /* 1124 * During firmware flash, the heartbeat register may not update as frequently 1125 * as it should. So we dial down lockup detection during firmware flash. and 1126 * dial it back up when firmware flash completes. 1127 */ 1128 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 1129 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 1130 #define HPSA_EVENT_MONITOR_INTERVAL (15 * HZ) 1131 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 1132 struct CommandList *c) 1133 { 1134 if (!is_firmware_flash_cmd(c->Request.CDB)) 1135 return; 1136 atomic_inc(&h->firmware_flash_in_progress); 1137 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 1138 } 1139 1140 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 1141 struct CommandList *c) 1142 { 1143 if (is_firmware_flash_cmd(c->Request.CDB) && 1144 atomic_dec_and_test(&h->firmware_flash_in_progress)) 1145 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 1146 } 1147 1148 static void __enqueue_cmd_and_start_io(struct ctlr_info *h, 1149 struct CommandList *c, int reply_queue) 1150 { 1151 dial_down_lockup_detection_during_fw_flash(h, c); 1152 atomic_inc(&h->commands_outstanding); 1153 if (c->device) 1154 atomic_inc(&c->device->commands_outstanding); 1155 1156 reply_queue = h->reply_map[raw_smp_processor_id()]; 1157 switch (c->cmd_type) { 1158 case CMD_IOACCEL1: 1159 set_ioaccel1_performant_mode(h, c, reply_queue); 1160 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); 1161 break; 1162 case CMD_IOACCEL2: 1163 set_ioaccel2_performant_mode(h, c, reply_queue); 1164 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1165 break; 1166 case IOACCEL2_TMF: 1167 set_ioaccel2_tmf_performant_mode(h, c, reply_queue); 1168 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32); 1169 break; 1170 default: 1171 set_performant_mode(h, c, reply_queue); 1172 h->access.submit_command(h, c); 1173 } 1174 } 1175 1176 static void enqueue_cmd_and_start_io(struct ctlr_info *h, struct CommandList *c) 1177 { 1178 __enqueue_cmd_and_start_io(h, c, DEFAULT_REPLY_QUEUE); 1179 } 1180 1181 static inline int is_hba_lunid(unsigned char scsi3addr[]) 1182 { 1183 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 1184 } 1185 1186 static inline int is_scsi_rev_5(struct ctlr_info *h) 1187 { 1188 if (!h->hba_inquiry_data) 1189 return 0; 1190 if ((h->hba_inquiry_data[2] & 0x07) == 5) 1191 return 1; 1192 return 0; 1193 } 1194 1195 static int hpsa_find_target_lun(struct ctlr_info *h, 1196 unsigned char scsi3addr[], int bus, int *target, int *lun) 1197 { 1198 /* finds an unused bus, target, lun for a new physical device 1199 * assumes h->devlock is held 1200 */ 1201 int i, found = 0; 1202 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 1203 1204 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 1205 1206 for (i = 0; i < h->ndevices; i++) { 1207 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 1208 __set_bit(h->dev[i]->target, lun_taken); 1209 } 1210 1211 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 1212 if (i < HPSA_MAX_DEVICES) { 1213 /* *bus = 1; */ 1214 *target = i; 1215 *lun = 0; 1216 found = 1; 1217 } 1218 return !found; 1219 } 1220 1221 static void hpsa_show_dev_msg(const char *level, struct ctlr_info *h, 1222 struct hpsa_scsi_dev_t *dev, char *description) 1223 { 1224 #define LABEL_SIZE 25 1225 char label[LABEL_SIZE]; 1226 1227 if (h == NULL || h->pdev == NULL || h->scsi_host == NULL) 1228 return; 1229 1230 switch (dev->devtype) { 1231 case TYPE_RAID: 1232 snprintf(label, LABEL_SIZE, "controller"); 1233 break; 1234 case TYPE_ENCLOSURE: 1235 snprintf(label, LABEL_SIZE, "enclosure"); 1236 break; 1237 case TYPE_DISK: 1238 case TYPE_ZBC: 1239 if (dev->external) 1240 snprintf(label, LABEL_SIZE, "external"); 1241 else if (!is_logical_dev_addr_mode(dev->scsi3addr)) 1242 snprintf(label, LABEL_SIZE, "%s", 1243 raid_label[PHYSICAL_DRIVE]); 1244 else 1245 snprintf(label, LABEL_SIZE, "RAID-%s", 1246 dev->raid_level > RAID_UNKNOWN ? "?" : 1247 raid_label[dev->raid_level]); 1248 break; 1249 case TYPE_ROM: 1250 snprintf(label, LABEL_SIZE, "rom"); 1251 break; 1252 case TYPE_TAPE: 1253 snprintf(label, LABEL_SIZE, "tape"); 1254 break; 1255 case TYPE_MEDIUM_CHANGER: 1256 snprintf(label, LABEL_SIZE, "changer"); 1257 break; 1258 default: 1259 snprintf(label, LABEL_SIZE, "UNKNOWN"); 1260 break; 1261 } 1262 1263 dev_printk(level, &h->pdev->dev, 1264 "scsi %d:%d:%d:%d: %s %s %.8s %.16s %s SSDSmartPathCap%c En%c Exp=%d\n", 1265 h->scsi_host->host_no, dev->bus, dev->target, dev->lun, 1266 description, 1267 scsi_device_type(dev->devtype), 1268 dev->vendor, 1269 dev->model, 1270 label, 1271 dev->offload_config ? '+' : '-', 1272 dev->offload_to_be_enabled ? '+' : '-', 1273 dev->expose_device); 1274 } 1275 1276 /* Add an entry into h->dev[] array. */ 1277 static int hpsa_scsi_add_entry(struct ctlr_info *h, 1278 struct hpsa_scsi_dev_t *device, 1279 struct hpsa_scsi_dev_t *added[], int *nadded) 1280 { 1281 /* assumes h->devlock is held */ 1282 int n = h->ndevices; 1283 int i; 1284 unsigned char addr1[8], addr2[8]; 1285 struct hpsa_scsi_dev_t *sd; 1286 1287 if (n >= HPSA_MAX_DEVICES) { 1288 dev_err(&h->pdev->dev, "too many devices, some will be " 1289 "inaccessible.\n"); 1290 return -1; 1291 } 1292 1293 /* physical devices do not have lun or target assigned until now. */ 1294 if (device->lun != -1) 1295 /* Logical device, lun is already assigned. */ 1296 goto lun_assigned; 1297 1298 /* If this device a non-zero lun of a multi-lun device 1299 * byte 4 of the 8-byte LUN addr will contain the logical 1300 * unit no, zero otherwise. 1301 */ 1302 if (device->scsi3addr[4] == 0) { 1303 /* This is not a non-zero lun of a multi-lun device */ 1304 if (hpsa_find_target_lun(h, device->scsi3addr, 1305 device->bus, &device->target, &device->lun) != 0) 1306 return -1; 1307 goto lun_assigned; 1308 } 1309 1310 /* This is a non-zero lun of a multi-lun device. 1311 * Search through our list and find the device which 1312 * has the same 8 byte LUN address, excepting byte 4 and 5. 1313 * Assign the same bus and target for this new LUN. 1314 * Use the logical unit number from the firmware. 1315 */ 1316 memcpy(addr1, device->scsi3addr, 8); 1317 addr1[4] = 0; 1318 addr1[5] = 0; 1319 for (i = 0; i < n; i++) { 1320 sd = h->dev[i]; 1321 memcpy(addr2, sd->scsi3addr, 8); 1322 addr2[4] = 0; 1323 addr2[5] = 0; 1324 /* differ only in byte 4 and 5? */ 1325 if (memcmp(addr1, addr2, 8) == 0) { 1326 device->bus = sd->bus; 1327 device->target = sd->target; 1328 device->lun = device->scsi3addr[4]; 1329 break; 1330 } 1331 } 1332 if (device->lun == -1) { 1333 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 1334 " suspect firmware bug or unsupported hardware " 1335 "configuration.\n"); 1336 return -1; 1337 } 1338 1339 lun_assigned: 1340 1341 h->dev[n] = device; 1342 h->ndevices++; 1343 added[*nadded] = device; 1344 (*nadded)++; 1345 hpsa_show_dev_msg(KERN_INFO, h, device, 1346 device->expose_device ? "added" : "masked"); 1347 return 0; 1348 } 1349 1350 /* 1351 * Called during a scan operation. 1352 * 1353 * Update an entry in h->dev[] array. 1354 */ 1355 static void hpsa_scsi_update_entry(struct ctlr_info *h, 1356 int entry, struct hpsa_scsi_dev_t *new_entry) 1357 { 1358 /* assumes h->devlock is held */ 1359 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1360 1361 /* Raid level changed. */ 1362 h->dev[entry]->raid_level = new_entry->raid_level; 1363 1364 /* 1365 * ioacccel_handle may have changed for a dual domain disk 1366 */ 1367 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1368 1369 /* Raid offload parameters changed. Careful about the ordering. */ 1370 if (new_entry->offload_config && new_entry->offload_to_be_enabled) { 1371 /* 1372 * if drive is newly offload_enabled, we want to copy the 1373 * raid map data first. If previously offload_enabled and 1374 * offload_config were set, raid map data had better be 1375 * the same as it was before. If raid map data has changed 1376 * then it had better be the case that 1377 * h->dev[entry]->offload_enabled is currently 0. 1378 */ 1379 h->dev[entry]->raid_map = new_entry->raid_map; 1380 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1381 } 1382 if (new_entry->offload_to_be_enabled) { 1383 h->dev[entry]->ioaccel_handle = new_entry->ioaccel_handle; 1384 wmb(); /* set ioaccel_handle *before* hba_ioaccel_enabled */ 1385 } 1386 h->dev[entry]->hba_ioaccel_enabled = new_entry->hba_ioaccel_enabled; 1387 h->dev[entry]->offload_config = new_entry->offload_config; 1388 h->dev[entry]->offload_to_mirror = new_entry->offload_to_mirror; 1389 h->dev[entry]->queue_depth = new_entry->queue_depth; 1390 1391 /* 1392 * We can turn off ioaccel offload now, but need to delay turning 1393 * ioaccel on until we can update h->dev[entry]->phys_disk[], but we 1394 * can't do that until all the devices are updated. 1395 */ 1396 h->dev[entry]->offload_to_be_enabled = new_entry->offload_to_be_enabled; 1397 1398 /* 1399 * turn ioaccel off immediately if told to do so. 1400 */ 1401 if (!new_entry->offload_to_be_enabled) 1402 h->dev[entry]->offload_enabled = 0; 1403 1404 hpsa_show_dev_msg(KERN_INFO, h, h->dev[entry], "updated"); 1405 } 1406 1407 /* Replace an entry from h->dev[] array. */ 1408 static void hpsa_scsi_replace_entry(struct ctlr_info *h, 1409 int entry, struct hpsa_scsi_dev_t *new_entry, 1410 struct hpsa_scsi_dev_t *added[], int *nadded, 1411 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1412 { 1413 /* assumes h->devlock is held */ 1414 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1415 removed[*nremoved] = h->dev[entry]; 1416 (*nremoved)++; 1417 1418 /* 1419 * New physical devices won't have target/lun assigned yet 1420 * so we need to preserve the values in the slot we are replacing. 1421 */ 1422 if (new_entry->target == -1) { 1423 new_entry->target = h->dev[entry]->target; 1424 new_entry->lun = h->dev[entry]->lun; 1425 } 1426 1427 h->dev[entry] = new_entry; 1428 added[*nadded] = new_entry; 1429 (*nadded)++; 1430 1431 hpsa_show_dev_msg(KERN_INFO, h, new_entry, "replaced"); 1432 } 1433 1434 /* Remove an entry from h->dev[] array. */ 1435 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int entry, 1436 struct hpsa_scsi_dev_t *removed[], int *nremoved) 1437 { 1438 /* assumes h->devlock is held */ 1439 int i; 1440 struct hpsa_scsi_dev_t *sd; 1441 1442 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 1443 1444 sd = h->dev[entry]; 1445 removed[*nremoved] = h->dev[entry]; 1446 (*nremoved)++; 1447 1448 for (i = entry; i < h->ndevices-1; i++) 1449 h->dev[i] = h->dev[i+1]; 1450 h->ndevices--; 1451 hpsa_show_dev_msg(KERN_INFO, h, sd, "removed"); 1452 } 1453 1454 #define SCSI3ADDR_EQ(a, b) ( \ 1455 (a)[7] == (b)[7] && \ 1456 (a)[6] == (b)[6] && \ 1457 (a)[5] == (b)[5] && \ 1458 (a)[4] == (b)[4] && \ 1459 (a)[3] == (b)[3] && \ 1460 (a)[2] == (b)[2] && \ 1461 (a)[1] == (b)[1] && \ 1462 (a)[0] == (b)[0]) 1463 1464 static void fixup_botched_add(struct ctlr_info *h, 1465 struct hpsa_scsi_dev_t *added) 1466 { 1467 /* called when scsi_add_device fails in order to re-adjust 1468 * h->dev[] to match the mid layer's view. 1469 */ 1470 unsigned long flags; 1471 int i, j; 1472 1473 spin_lock_irqsave(&h->lock, flags); 1474 for (i = 0; i < h->ndevices; i++) { 1475 if (h->dev[i] == added) { 1476 for (j = i; j < h->ndevices-1; j++) 1477 h->dev[j] = h->dev[j+1]; 1478 h->ndevices--; 1479 break; 1480 } 1481 } 1482 spin_unlock_irqrestore(&h->lock, flags); 1483 kfree(added); 1484 } 1485 1486 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 1487 struct hpsa_scsi_dev_t *dev2) 1488 { 1489 /* we compare everything except lun and target as these 1490 * are not yet assigned. Compare parts likely 1491 * to differ first 1492 */ 1493 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 1494 sizeof(dev1->scsi3addr)) != 0) 1495 return 0; 1496 if (memcmp(dev1->device_id, dev2->device_id, 1497 sizeof(dev1->device_id)) != 0) 1498 return 0; 1499 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 1500 return 0; 1501 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 1502 return 0; 1503 if (dev1->devtype != dev2->devtype) 1504 return 0; 1505 if (dev1->bus != dev2->bus) 1506 return 0; 1507 return 1; 1508 } 1509 1510 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 1511 struct hpsa_scsi_dev_t *dev2) 1512 { 1513 /* Device attributes that can change, but don't mean 1514 * that the device is a different device, nor that the OS 1515 * needs to be told anything about the change. 1516 */ 1517 if (dev1->raid_level != dev2->raid_level) 1518 return 1; 1519 if (dev1->offload_config != dev2->offload_config) 1520 return 1; 1521 if (dev1->offload_to_be_enabled != dev2->offload_to_be_enabled) 1522 return 1; 1523 if (!is_logical_dev_addr_mode(dev1->scsi3addr)) 1524 if (dev1->queue_depth != dev2->queue_depth) 1525 return 1; 1526 /* 1527 * This can happen for dual domain devices. An active 1528 * path change causes the ioaccel handle to change 1529 * 1530 * for example note the handle differences between p0 and p1 1531 * Device WWN ,WWN hash,Handle 1532 * D016 p0|0x3 [02]P2E:01:01,0x5000C5005FC4DACA,0x9B5616,0x01030003 1533 * p1 0x5000C5005FC4DAC9,0x6798C0,0x00040004 1534 */ 1535 if (dev1->ioaccel_handle != dev2->ioaccel_handle) 1536 return 1; 1537 return 0; 1538 } 1539 1540 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 1541 * and return needle location in *index. If scsi3addr matches, but not 1542 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 1543 * location in *index. 1544 * In the case of a minor device attribute change, such as RAID level, just 1545 * return DEVICE_UPDATED, along with the updated device's location in index. 1546 * If needle not found, return DEVICE_NOT_FOUND. 1547 */ 1548 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 1549 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 1550 int *index) 1551 { 1552 int i; 1553 #define DEVICE_NOT_FOUND 0 1554 #define DEVICE_CHANGED 1 1555 #define DEVICE_SAME 2 1556 #define DEVICE_UPDATED 3 1557 if (needle == NULL) 1558 return DEVICE_NOT_FOUND; 1559 1560 for (i = 0; i < haystack_size; i++) { 1561 if (haystack[i] == NULL) /* previously removed. */ 1562 continue; 1563 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 1564 *index = i; 1565 if (device_is_the_same(needle, haystack[i])) { 1566 if (device_updated(needle, haystack[i])) 1567 return DEVICE_UPDATED; 1568 return DEVICE_SAME; 1569 } else { 1570 /* Keep offline devices offline */ 1571 if (needle->volume_offline) 1572 return DEVICE_NOT_FOUND; 1573 return DEVICE_CHANGED; 1574 } 1575 } 1576 } 1577 *index = -1; 1578 return DEVICE_NOT_FOUND; 1579 } 1580 1581 static void hpsa_monitor_offline_device(struct ctlr_info *h, 1582 unsigned char scsi3addr[]) 1583 { 1584 struct offline_device_entry *device; 1585 unsigned long flags; 1586 1587 /* Check to see if device is already on the list */ 1588 spin_lock_irqsave(&h->offline_device_lock, flags); 1589 list_for_each_entry(device, &h->offline_device_list, offline_list) { 1590 if (memcmp(device->scsi3addr, scsi3addr, 1591 sizeof(device->scsi3addr)) == 0) { 1592 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1593 return; 1594 } 1595 } 1596 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1597 1598 /* Device is not on the list, add it. */ 1599 device = kmalloc(sizeof(*device), GFP_KERNEL); 1600 if (!device) 1601 return; 1602 1603 memcpy(device->scsi3addr, scsi3addr, sizeof(device->scsi3addr)); 1604 spin_lock_irqsave(&h->offline_device_lock, flags); 1605 list_add_tail(&device->offline_list, &h->offline_device_list); 1606 spin_unlock_irqrestore(&h->offline_device_lock, flags); 1607 } 1608 1609 /* Print a message explaining various offline volume states */ 1610 static void hpsa_show_volume_status(struct ctlr_info *h, 1611 struct hpsa_scsi_dev_t *sd) 1612 { 1613 if (sd->volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED) 1614 dev_info(&h->pdev->dev, 1615 "C%d:B%d:T%d:L%d Volume status is not available through vital product data pages.\n", 1616 h->scsi_host->host_no, 1617 sd->bus, sd->target, sd->lun); 1618 switch (sd->volume_offline) { 1619 case HPSA_LV_OK: 1620 break; 1621 case HPSA_LV_UNDERGOING_ERASE: 1622 dev_info(&h->pdev->dev, 1623 "C%d:B%d:T%d:L%d Volume is undergoing background erase process.\n", 1624 h->scsi_host->host_no, 1625 sd->bus, sd->target, sd->lun); 1626 break; 1627 case HPSA_LV_NOT_AVAILABLE: 1628 dev_info(&h->pdev->dev, 1629 "C%d:B%d:T%d:L%d Volume is waiting for transforming volume.\n", 1630 h->scsi_host->host_no, 1631 sd->bus, sd->target, sd->lun); 1632 break; 1633 case HPSA_LV_UNDERGOING_RPI: 1634 dev_info(&h->pdev->dev, 1635 "C%d:B%d:T%d:L%d Volume is undergoing rapid parity init.\n", 1636 h->scsi_host->host_no, 1637 sd->bus, sd->target, sd->lun); 1638 break; 1639 case HPSA_LV_PENDING_RPI: 1640 dev_info(&h->pdev->dev, 1641 "C%d:B%d:T%d:L%d Volume is queued for rapid parity initialization process.\n", 1642 h->scsi_host->host_no, 1643 sd->bus, sd->target, sd->lun); 1644 break; 1645 case HPSA_LV_ENCRYPTED_NO_KEY: 1646 dev_info(&h->pdev->dev, 1647 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because key is not present.\n", 1648 h->scsi_host->host_no, 1649 sd->bus, sd->target, sd->lun); 1650 break; 1651 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 1652 dev_info(&h->pdev->dev, 1653 "C%d:B%d:T%d:L%d Volume is not encrypted and cannot be accessed because controller is in encryption-only mode.\n", 1654 h->scsi_host->host_no, 1655 sd->bus, sd->target, sd->lun); 1656 break; 1657 case HPSA_LV_UNDERGOING_ENCRYPTION: 1658 dev_info(&h->pdev->dev, 1659 "C%d:B%d:T%d:L%d Volume is undergoing encryption process.\n", 1660 h->scsi_host->host_no, 1661 sd->bus, sd->target, sd->lun); 1662 break; 1663 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 1664 dev_info(&h->pdev->dev, 1665 "C%d:B%d:T%d:L%d Volume is undergoing encryption re-keying process.\n", 1666 h->scsi_host->host_no, 1667 sd->bus, sd->target, sd->lun); 1668 break; 1669 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 1670 dev_info(&h->pdev->dev, 1671 "C%d:B%d:T%d:L%d Volume is encrypted and cannot be accessed because controller does not have encryption enabled.\n", 1672 h->scsi_host->host_no, 1673 sd->bus, sd->target, sd->lun); 1674 break; 1675 case HPSA_LV_PENDING_ENCRYPTION: 1676 dev_info(&h->pdev->dev, 1677 "C%d:B%d:T%d:L%d Volume is pending migration to encrypted state, but process has not started.\n", 1678 h->scsi_host->host_no, 1679 sd->bus, sd->target, sd->lun); 1680 break; 1681 case HPSA_LV_PENDING_ENCRYPTION_REKEYING: 1682 dev_info(&h->pdev->dev, 1683 "C%d:B%d:T%d:L%d Volume is encrypted and is pending encryption rekeying.\n", 1684 h->scsi_host->host_no, 1685 sd->bus, sd->target, sd->lun); 1686 break; 1687 } 1688 } 1689 1690 /* 1691 * Figure the list of physical drive pointers for a logical drive with 1692 * raid offload configured. 1693 */ 1694 static void hpsa_figure_phys_disk_ptrs(struct ctlr_info *h, 1695 struct hpsa_scsi_dev_t *dev[], int ndevices, 1696 struct hpsa_scsi_dev_t *logical_drive) 1697 { 1698 struct raid_map_data *map = &logical_drive->raid_map; 1699 struct raid_map_disk_data *dd = &map->data[0]; 1700 int i, j; 1701 int total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 1702 le16_to_cpu(map->metadata_disks_per_row); 1703 int nraid_map_entries = le16_to_cpu(map->row_cnt) * 1704 le16_to_cpu(map->layout_map_count) * 1705 total_disks_per_row; 1706 int nphys_disk = le16_to_cpu(map->layout_map_count) * 1707 total_disks_per_row; 1708 int qdepth; 1709 1710 if (nraid_map_entries > RAID_MAP_MAX_ENTRIES) 1711 nraid_map_entries = RAID_MAP_MAX_ENTRIES; 1712 1713 logical_drive->nphysical_disks = nraid_map_entries; 1714 1715 qdepth = 0; 1716 for (i = 0; i < nraid_map_entries; i++) { 1717 logical_drive->phys_disk[i] = NULL; 1718 if (!logical_drive->offload_config) 1719 continue; 1720 for (j = 0; j < ndevices; j++) { 1721 if (dev[j] == NULL) 1722 continue; 1723 if (dev[j]->devtype != TYPE_DISK && 1724 dev[j]->devtype != TYPE_ZBC) 1725 continue; 1726 if (is_logical_device(dev[j])) 1727 continue; 1728 if (dev[j]->ioaccel_handle != dd[i].ioaccel_handle) 1729 continue; 1730 1731 logical_drive->phys_disk[i] = dev[j]; 1732 if (i < nphys_disk) 1733 qdepth = min(h->nr_cmds, qdepth + 1734 logical_drive->phys_disk[i]->queue_depth); 1735 break; 1736 } 1737 1738 /* 1739 * This can happen if a physical drive is removed and 1740 * the logical drive is degraded. In that case, the RAID 1741 * map data will refer to a physical disk which isn't actually 1742 * present. And in that case offload_enabled should already 1743 * be 0, but we'll turn it off here just in case 1744 */ 1745 if (!logical_drive->phys_disk[i]) { 1746 dev_warn(&h->pdev->dev, 1747 "%s: [%d:%d:%d:%d] A phys disk component of LV is missing, turning off offload_enabled for LV.\n", 1748 __func__, 1749 h->scsi_host->host_no, logical_drive->bus, 1750 logical_drive->target, logical_drive->lun); 1751 hpsa_turn_off_ioaccel_for_device(logical_drive); 1752 logical_drive->queue_depth = 8; 1753 } 1754 } 1755 if (nraid_map_entries) 1756 /* 1757 * This is correct for reads, too high for full stripe writes, 1758 * way too high for partial stripe writes 1759 */ 1760 logical_drive->queue_depth = qdepth; 1761 else { 1762 if (logical_drive->external) 1763 logical_drive->queue_depth = EXTERNAL_QD; 1764 else 1765 logical_drive->queue_depth = h->nr_cmds; 1766 } 1767 } 1768 1769 static void hpsa_update_log_drive_phys_drive_ptrs(struct ctlr_info *h, 1770 struct hpsa_scsi_dev_t *dev[], int ndevices) 1771 { 1772 int i; 1773 1774 for (i = 0; i < ndevices; i++) { 1775 if (dev[i] == NULL) 1776 continue; 1777 if (dev[i]->devtype != TYPE_DISK && 1778 dev[i]->devtype != TYPE_ZBC) 1779 continue; 1780 if (!is_logical_device(dev[i])) 1781 continue; 1782 1783 /* 1784 * If offload is currently enabled, the RAID map and 1785 * phys_disk[] assignment *better* not be changing 1786 * because we would be changing ioaccel phsy_disk[] pointers 1787 * on a ioaccel volume processing I/O requests. 1788 * 1789 * If an ioaccel volume status changed, initially because it was 1790 * re-configured and thus underwent a transformation, or 1791 * a drive failed, we would have received a state change 1792 * request and ioaccel should have been turned off. When the 1793 * transformation completes, we get another state change 1794 * request to turn ioaccel back on. In this case, we need 1795 * to update the ioaccel information. 1796 * 1797 * Thus: If it is not currently enabled, but will be after 1798 * the scan completes, make sure the ioaccel pointers 1799 * are up to date. 1800 */ 1801 1802 if (!dev[i]->offload_enabled && dev[i]->offload_to_be_enabled) 1803 hpsa_figure_phys_disk_ptrs(h, dev, ndevices, dev[i]); 1804 } 1805 } 1806 1807 static int hpsa_add_device(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1808 { 1809 int rc = 0; 1810 1811 if (!h->scsi_host) 1812 return 1; 1813 1814 if (is_logical_device(device)) /* RAID */ 1815 rc = scsi_add_device(h->scsi_host, device->bus, 1816 device->target, device->lun); 1817 else /* HBA */ 1818 rc = hpsa_add_sas_device(h->sas_host, device); 1819 1820 return rc; 1821 } 1822 1823 static int hpsa_find_outstanding_commands_for_dev(struct ctlr_info *h, 1824 struct hpsa_scsi_dev_t *dev) 1825 { 1826 int i; 1827 int count = 0; 1828 1829 for (i = 0; i < h->nr_cmds; i++) { 1830 struct CommandList *c = h->cmd_pool + i; 1831 int refcount = atomic_inc_return(&c->refcount); 1832 1833 if (refcount > 1 && hpsa_cmd_dev_match(h, c, dev, 1834 dev->scsi3addr)) { 1835 unsigned long flags; 1836 1837 spin_lock_irqsave(&h->lock, flags); /* Implied MB */ 1838 if (!hpsa_is_cmd_idle(c)) 1839 ++count; 1840 spin_unlock_irqrestore(&h->lock, flags); 1841 } 1842 1843 cmd_free(h, c); 1844 } 1845 1846 return count; 1847 } 1848 1849 #define NUM_WAIT 20 1850 static void hpsa_wait_for_outstanding_commands_for_dev(struct ctlr_info *h, 1851 struct hpsa_scsi_dev_t *device) 1852 { 1853 int cmds = 0; 1854 int waits = 0; 1855 int num_wait = NUM_WAIT; 1856 1857 if (device->external) 1858 num_wait = HPSA_EH_PTRAID_TIMEOUT; 1859 1860 while (1) { 1861 cmds = hpsa_find_outstanding_commands_for_dev(h, device); 1862 if (cmds == 0) 1863 break; 1864 if (++waits > num_wait) 1865 break; 1866 msleep(1000); 1867 } 1868 1869 if (waits > num_wait) { 1870 dev_warn(&h->pdev->dev, 1871 "%s: removing device [%d:%d:%d:%d] with %d outstanding commands!\n", 1872 __func__, 1873 h->scsi_host->host_no, 1874 device->bus, device->target, device->lun, cmds); 1875 } 1876 } 1877 1878 static void hpsa_remove_device(struct ctlr_info *h, 1879 struct hpsa_scsi_dev_t *device) 1880 { 1881 struct scsi_device *sdev = NULL; 1882 1883 if (!h->scsi_host) 1884 return; 1885 1886 /* 1887 * Allow for commands to drain 1888 */ 1889 device->removed = 1; 1890 hpsa_wait_for_outstanding_commands_for_dev(h, device); 1891 1892 if (is_logical_device(device)) { /* RAID */ 1893 sdev = scsi_device_lookup(h->scsi_host, device->bus, 1894 device->target, device->lun); 1895 if (sdev) { 1896 scsi_remove_device(sdev); 1897 scsi_device_put(sdev); 1898 } else { 1899 /* 1900 * We don't expect to get here. Future commands 1901 * to this device will get a selection timeout as 1902 * if the device were gone. 1903 */ 1904 hpsa_show_dev_msg(KERN_WARNING, h, device, 1905 "didn't find device for removal."); 1906 } 1907 } else { /* HBA */ 1908 1909 hpsa_remove_sas_device(device); 1910 } 1911 } 1912 1913 static void adjust_hpsa_scsi_table(struct ctlr_info *h, 1914 struct hpsa_scsi_dev_t *sd[], int nsds) 1915 { 1916 /* sd contains scsi3 addresses and devtypes, and inquiry 1917 * data. This function takes what's in sd to be the current 1918 * reality and updates h->dev[] to reflect that reality. 1919 */ 1920 int i, entry, device_change, changes = 0; 1921 struct hpsa_scsi_dev_t *csd; 1922 unsigned long flags; 1923 struct hpsa_scsi_dev_t **added, **removed; 1924 int nadded, nremoved; 1925 1926 /* 1927 * A reset can cause a device status to change 1928 * re-schedule the scan to see what happened. 1929 */ 1930 spin_lock_irqsave(&h->reset_lock, flags); 1931 if (h->reset_in_progress) { 1932 h->drv_req_rescan = 1; 1933 spin_unlock_irqrestore(&h->reset_lock, flags); 1934 return; 1935 } 1936 spin_unlock_irqrestore(&h->reset_lock, flags); 1937 1938 added = kcalloc(HPSA_MAX_DEVICES, sizeof(*added), GFP_KERNEL); 1939 removed = kcalloc(HPSA_MAX_DEVICES, sizeof(*removed), GFP_KERNEL); 1940 1941 if (!added || !removed) { 1942 dev_warn(&h->pdev->dev, "out of memory in " 1943 "adjust_hpsa_scsi_table\n"); 1944 goto free_and_out; 1945 } 1946 1947 spin_lock_irqsave(&h->devlock, flags); 1948 1949 /* find any devices in h->dev[] that are not in 1950 * sd[] and remove them from h->dev[], and for any 1951 * devices which have changed, remove the old device 1952 * info and add the new device info. 1953 * If minor device attributes change, just update 1954 * the existing device structure. 1955 */ 1956 i = 0; 1957 nremoved = 0; 1958 nadded = 0; 1959 while (i < h->ndevices) { 1960 csd = h->dev[i]; 1961 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 1962 if (device_change == DEVICE_NOT_FOUND) { 1963 changes++; 1964 hpsa_scsi_remove_entry(h, i, removed, &nremoved); 1965 continue; /* remove ^^^, hence i not incremented */ 1966 } else if (device_change == DEVICE_CHANGED) { 1967 changes++; 1968 hpsa_scsi_replace_entry(h, i, sd[entry], 1969 added, &nadded, removed, &nremoved); 1970 /* Set it to NULL to prevent it from being freed 1971 * at the bottom of hpsa_update_scsi_devices() 1972 */ 1973 sd[entry] = NULL; 1974 } else if (device_change == DEVICE_UPDATED) { 1975 hpsa_scsi_update_entry(h, i, sd[entry]); 1976 } 1977 i++; 1978 } 1979 1980 /* Now, make sure every device listed in sd[] is also 1981 * listed in h->dev[], adding them if they aren't found 1982 */ 1983 1984 for (i = 0; i < nsds; i++) { 1985 if (!sd[i]) /* if already added above. */ 1986 continue; 1987 1988 /* Don't add devices which are NOT READY, FORMAT IN PROGRESS 1989 * as the SCSI mid-layer does not handle such devices well. 1990 * It relentlessly loops sending TUR at 3Hz, then READ(10) 1991 * at 160Hz, and prevents the system from coming up. 1992 */ 1993 if (sd[i]->volume_offline) { 1994 hpsa_show_volume_status(h, sd[i]); 1995 hpsa_show_dev_msg(KERN_INFO, h, sd[i], "offline"); 1996 continue; 1997 } 1998 1999 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 2000 h->ndevices, &entry); 2001 if (device_change == DEVICE_NOT_FOUND) { 2002 changes++; 2003 if (hpsa_scsi_add_entry(h, sd[i], added, &nadded) != 0) 2004 break; 2005 sd[i] = NULL; /* prevent from being freed later. */ 2006 } else if (device_change == DEVICE_CHANGED) { 2007 /* should never happen... */ 2008 changes++; 2009 dev_warn(&h->pdev->dev, 2010 "device unexpectedly changed.\n"); 2011 /* but if it does happen, we just ignore that device */ 2012 } 2013 } 2014 hpsa_update_log_drive_phys_drive_ptrs(h, h->dev, h->ndevices); 2015 2016 /* 2017 * Now that h->dev[]->phys_disk[] is coherent, we can enable 2018 * any logical drives that need it enabled. 2019 * 2020 * The raid map should be current by now. 2021 * 2022 * We are updating the device list used for I/O requests. 2023 */ 2024 for (i = 0; i < h->ndevices; i++) { 2025 if (h->dev[i] == NULL) 2026 continue; 2027 h->dev[i]->offload_enabled = h->dev[i]->offload_to_be_enabled; 2028 } 2029 2030 spin_unlock_irqrestore(&h->devlock, flags); 2031 2032 /* Monitor devices which are in one of several NOT READY states to be 2033 * brought online later. This must be done without holding h->devlock, 2034 * so don't touch h->dev[] 2035 */ 2036 for (i = 0; i < nsds; i++) { 2037 if (!sd[i]) /* if already added above. */ 2038 continue; 2039 if (sd[i]->volume_offline) 2040 hpsa_monitor_offline_device(h, sd[i]->scsi3addr); 2041 } 2042 2043 /* Don't notify scsi mid layer of any changes the first time through 2044 * (or if there are no changes) scsi_scan_host will do it later the 2045 * first time through. 2046 */ 2047 if (!changes) 2048 goto free_and_out; 2049 2050 /* Notify scsi mid layer of any removed devices */ 2051 for (i = 0; i < nremoved; i++) { 2052 if (removed[i] == NULL) 2053 continue; 2054 if (removed[i]->expose_device) 2055 hpsa_remove_device(h, removed[i]); 2056 kfree(removed[i]); 2057 removed[i] = NULL; 2058 } 2059 2060 /* Notify scsi mid layer of any added devices */ 2061 for (i = 0; i < nadded; i++) { 2062 int rc = 0; 2063 2064 if (added[i] == NULL) 2065 continue; 2066 if (!(added[i]->expose_device)) 2067 continue; 2068 rc = hpsa_add_device(h, added[i]); 2069 if (!rc) 2070 continue; 2071 dev_warn(&h->pdev->dev, 2072 "addition failed %d, device not added.", rc); 2073 /* now we have to remove it from h->dev, 2074 * since it didn't get added to scsi mid layer 2075 */ 2076 fixup_botched_add(h, added[i]); 2077 h->drv_req_rescan = 1; 2078 } 2079 2080 free_and_out: 2081 kfree(added); 2082 kfree(removed); 2083 } 2084 2085 /* 2086 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 2087 * Assume's h->devlock is held. 2088 */ 2089 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 2090 int bus, int target, int lun) 2091 { 2092 int i; 2093 struct hpsa_scsi_dev_t *sd; 2094 2095 for (i = 0; i < h->ndevices; i++) { 2096 sd = h->dev[i]; 2097 if (sd->bus == bus && sd->target == target && sd->lun == lun) 2098 return sd; 2099 } 2100 return NULL; 2101 } 2102 2103 static int hpsa_slave_alloc(struct scsi_device *sdev) 2104 { 2105 struct hpsa_scsi_dev_t *sd = NULL; 2106 unsigned long flags; 2107 struct ctlr_info *h; 2108 2109 h = sdev_to_hba(sdev); 2110 spin_lock_irqsave(&h->devlock, flags); 2111 if (sdev_channel(sdev) == HPSA_PHYSICAL_DEVICE_BUS) { 2112 struct scsi_target *starget; 2113 struct sas_rphy *rphy; 2114 2115 starget = scsi_target(sdev); 2116 rphy = target_to_rphy(starget); 2117 sd = hpsa_find_device_by_sas_rphy(h, rphy); 2118 if (sd) { 2119 sd->target = sdev_id(sdev); 2120 sd->lun = sdev->lun; 2121 } 2122 } 2123 if (!sd) 2124 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 2125 sdev_id(sdev), sdev->lun); 2126 2127 if (sd && sd->expose_device) { 2128 atomic_set(&sd->ioaccel_cmds_out, 0); 2129 sdev->hostdata = sd; 2130 } else 2131 sdev->hostdata = NULL; 2132 spin_unlock_irqrestore(&h->devlock, flags); 2133 return 0; 2134 } 2135 2136 /* configure scsi device based on internal per-device structure */ 2137 static int hpsa_slave_configure(struct scsi_device *sdev) 2138 { 2139 struct hpsa_scsi_dev_t *sd; 2140 int queue_depth; 2141 2142 sd = sdev->hostdata; 2143 sdev->no_uld_attach = !sd || !sd->expose_device; 2144 2145 if (sd) { 2146 sd->was_removed = 0; 2147 if (sd->external) { 2148 queue_depth = EXTERNAL_QD; 2149 sdev->eh_timeout = HPSA_EH_PTRAID_TIMEOUT; 2150 blk_queue_rq_timeout(sdev->request_queue, 2151 HPSA_EH_PTRAID_TIMEOUT); 2152 } else { 2153 queue_depth = sd->queue_depth != 0 ? 2154 sd->queue_depth : sdev->host->can_queue; 2155 } 2156 } else 2157 queue_depth = sdev->host->can_queue; 2158 2159 scsi_change_queue_depth(sdev, queue_depth); 2160 2161 return 0; 2162 } 2163 2164 static void hpsa_slave_destroy(struct scsi_device *sdev) 2165 { 2166 struct hpsa_scsi_dev_t *hdev = NULL; 2167 2168 hdev = sdev->hostdata; 2169 2170 if (hdev) 2171 hdev->was_removed = 1; 2172 } 2173 2174 static void hpsa_free_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2175 { 2176 int i; 2177 2178 if (!h->ioaccel2_cmd_sg_list) 2179 return; 2180 for (i = 0; i < h->nr_cmds; i++) { 2181 kfree(h->ioaccel2_cmd_sg_list[i]); 2182 h->ioaccel2_cmd_sg_list[i] = NULL; 2183 } 2184 kfree(h->ioaccel2_cmd_sg_list); 2185 h->ioaccel2_cmd_sg_list = NULL; 2186 } 2187 2188 static int hpsa_allocate_ioaccel2_sg_chain_blocks(struct ctlr_info *h) 2189 { 2190 int i; 2191 2192 if (h->chainsize <= 0) 2193 return 0; 2194 2195 h->ioaccel2_cmd_sg_list = 2196 kcalloc(h->nr_cmds, sizeof(*h->ioaccel2_cmd_sg_list), 2197 GFP_KERNEL); 2198 if (!h->ioaccel2_cmd_sg_list) 2199 return -ENOMEM; 2200 for (i = 0; i < h->nr_cmds; i++) { 2201 h->ioaccel2_cmd_sg_list[i] = 2202 kmalloc_array(h->maxsgentries, 2203 sizeof(*h->ioaccel2_cmd_sg_list[i]), 2204 GFP_KERNEL); 2205 if (!h->ioaccel2_cmd_sg_list[i]) 2206 goto clean; 2207 } 2208 return 0; 2209 2210 clean: 2211 hpsa_free_ioaccel2_sg_chain_blocks(h); 2212 return -ENOMEM; 2213 } 2214 2215 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 2216 { 2217 int i; 2218 2219 if (!h->cmd_sg_list) 2220 return; 2221 for (i = 0; i < h->nr_cmds; i++) { 2222 kfree(h->cmd_sg_list[i]); 2223 h->cmd_sg_list[i] = NULL; 2224 } 2225 kfree(h->cmd_sg_list); 2226 h->cmd_sg_list = NULL; 2227 } 2228 2229 static int hpsa_alloc_sg_chain_blocks(struct ctlr_info *h) 2230 { 2231 int i; 2232 2233 if (h->chainsize <= 0) 2234 return 0; 2235 2236 h->cmd_sg_list = kcalloc(h->nr_cmds, sizeof(*h->cmd_sg_list), 2237 GFP_KERNEL); 2238 if (!h->cmd_sg_list) 2239 return -ENOMEM; 2240 2241 for (i = 0; i < h->nr_cmds; i++) { 2242 h->cmd_sg_list[i] = kmalloc_array(h->chainsize, 2243 sizeof(*h->cmd_sg_list[i]), 2244 GFP_KERNEL); 2245 if (!h->cmd_sg_list[i]) 2246 goto clean; 2247 2248 } 2249 return 0; 2250 2251 clean: 2252 hpsa_free_sg_chain_blocks(h); 2253 return -ENOMEM; 2254 } 2255 2256 static int hpsa_map_ioaccel2_sg_chain_block(struct ctlr_info *h, 2257 struct io_accel2_cmd *cp, struct CommandList *c) 2258 { 2259 struct ioaccel2_sg_element *chain_block; 2260 u64 temp64; 2261 u32 chain_size; 2262 2263 chain_block = h->ioaccel2_cmd_sg_list[c->cmdindex]; 2264 chain_size = le32_to_cpu(cp->sg[0].length); 2265 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_size, 2266 DMA_TO_DEVICE); 2267 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2268 /* prevent subsequent unmapping */ 2269 cp->sg->address = 0; 2270 return -1; 2271 } 2272 cp->sg->address = cpu_to_le64(temp64); 2273 return 0; 2274 } 2275 2276 static void hpsa_unmap_ioaccel2_sg_chain_block(struct ctlr_info *h, 2277 struct io_accel2_cmd *cp) 2278 { 2279 struct ioaccel2_sg_element *chain_sg; 2280 u64 temp64; 2281 u32 chain_size; 2282 2283 chain_sg = cp->sg; 2284 temp64 = le64_to_cpu(chain_sg->address); 2285 chain_size = le32_to_cpu(cp->sg[0].length); 2286 dma_unmap_single(&h->pdev->dev, temp64, chain_size, DMA_TO_DEVICE); 2287 } 2288 2289 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 2290 struct CommandList *c) 2291 { 2292 struct SGDescriptor *chain_sg, *chain_block; 2293 u64 temp64; 2294 u32 chain_len; 2295 2296 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2297 chain_block = h->cmd_sg_list[c->cmdindex]; 2298 chain_sg->Ext = cpu_to_le32(HPSA_SG_CHAIN); 2299 chain_len = sizeof(*chain_sg) * 2300 (le16_to_cpu(c->Header.SGTotal) - h->max_cmd_sg_entries); 2301 chain_sg->Len = cpu_to_le32(chain_len); 2302 temp64 = dma_map_single(&h->pdev->dev, chain_block, chain_len, 2303 DMA_TO_DEVICE); 2304 if (dma_mapping_error(&h->pdev->dev, temp64)) { 2305 /* prevent subsequent unmapping */ 2306 chain_sg->Addr = cpu_to_le64(0); 2307 return -1; 2308 } 2309 chain_sg->Addr = cpu_to_le64(temp64); 2310 return 0; 2311 } 2312 2313 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 2314 struct CommandList *c) 2315 { 2316 struct SGDescriptor *chain_sg; 2317 2318 if (le16_to_cpu(c->Header.SGTotal) <= h->max_cmd_sg_entries) 2319 return; 2320 2321 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 2322 dma_unmap_single(&h->pdev->dev, le64_to_cpu(chain_sg->Addr), 2323 le32_to_cpu(chain_sg->Len), DMA_TO_DEVICE); 2324 } 2325 2326 2327 /* Decode the various types of errors on ioaccel2 path. 2328 * Return 1 for any error that should generate a RAID path retry. 2329 * Return 0 for errors that don't require a RAID path retry. 2330 */ 2331 static int handle_ioaccel_mode2_error(struct ctlr_info *h, 2332 struct CommandList *c, 2333 struct scsi_cmnd *cmd, 2334 struct io_accel2_cmd *c2, 2335 struct hpsa_scsi_dev_t *dev) 2336 { 2337 int data_len; 2338 int retry = 0; 2339 u32 ioaccel2_resid = 0; 2340 2341 switch (c2->error_data.serv_response) { 2342 case IOACCEL2_SERV_RESPONSE_COMPLETE: 2343 switch (c2->error_data.status) { 2344 case IOACCEL2_STATUS_SR_TASK_COMP_GOOD: 2345 if (cmd) 2346 cmd->result = 0; 2347 break; 2348 case IOACCEL2_STATUS_SR_TASK_COMP_CHK_COND: 2349 cmd->result |= SAM_STAT_CHECK_CONDITION; 2350 if (c2->error_data.data_present != 2351 IOACCEL2_SENSE_DATA_PRESENT) { 2352 memset(cmd->sense_buffer, 0, 2353 SCSI_SENSE_BUFFERSIZE); 2354 break; 2355 } 2356 /* copy the sense data */ 2357 data_len = c2->error_data.sense_data_len; 2358 if (data_len > SCSI_SENSE_BUFFERSIZE) 2359 data_len = SCSI_SENSE_BUFFERSIZE; 2360 if (data_len > sizeof(c2->error_data.sense_data_buff)) 2361 data_len = 2362 sizeof(c2->error_data.sense_data_buff); 2363 memcpy(cmd->sense_buffer, 2364 c2->error_data.sense_data_buff, data_len); 2365 retry = 1; 2366 break; 2367 case IOACCEL2_STATUS_SR_TASK_COMP_BUSY: 2368 retry = 1; 2369 break; 2370 case IOACCEL2_STATUS_SR_TASK_COMP_RES_CON: 2371 retry = 1; 2372 break; 2373 case IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL: 2374 retry = 1; 2375 break; 2376 case IOACCEL2_STATUS_SR_TASK_COMP_ABORTED: 2377 retry = 1; 2378 break; 2379 default: 2380 retry = 1; 2381 break; 2382 } 2383 break; 2384 case IOACCEL2_SERV_RESPONSE_FAILURE: 2385 switch (c2->error_data.status) { 2386 case IOACCEL2_STATUS_SR_IO_ERROR: 2387 case IOACCEL2_STATUS_SR_IO_ABORTED: 2388 case IOACCEL2_STATUS_SR_OVERRUN: 2389 retry = 1; 2390 break; 2391 case IOACCEL2_STATUS_SR_UNDERRUN: 2392 cmd->result = (DID_OK << 16); /* host byte */ 2393 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2394 ioaccel2_resid = get_unaligned_le32( 2395 &c2->error_data.resid_cnt[0]); 2396 scsi_set_resid(cmd, ioaccel2_resid); 2397 break; 2398 case IOACCEL2_STATUS_SR_NO_PATH_TO_DEVICE: 2399 case IOACCEL2_STATUS_SR_INVALID_DEVICE: 2400 case IOACCEL2_STATUS_SR_IOACCEL_DISABLED: 2401 /* 2402 * Did an HBA disk disappear? We will eventually 2403 * get a state change event from the controller but 2404 * in the meantime, we need to tell the OS that the 2405 * HBA disk is no longer there and stop I/O 2406 * from going down. This allows the potential re-insert 2407 * of the disk to get the same device node. 2408 */ 2409 if (dev->physical_device && dev->expose_device) { 2410 cmd->result = DID_NO_CONNECT << 16; 2411 dev->removed = 1; 2412 h->drv_req_rescan = 1; 2413 dev_warn(&h->pdev->dev, 2414 "%s: device is gone!\n", __func__); 2415 } else 2416 /* 2417 * Retry by sending down the RAID path. 2418 * We will get an event from ctlr to 2419 * trigger rescan regardless. 2420 */ 2421 retry = 1; 2422 break; 2423 default: 2424 retry = 1; 2425 } 2426 break; 2427 case IOACCEL2_SERV_RESPONSE_TMF_COMPLETE: 2428 break; 2429 case IOACCEL2_SERV_RESPONSE_TMF_SUCCESS: 2430 break; 2431 case IOACCEL2_SERV_RESPONSE_TMF_REJECTED: 2432 retry = 1; 2433 break; 2434 case IOACCEL2_SERV_RESPONSE_TMF_WRONG_LUN: 2435 break; 2436 default: 2437 retry = 1; 2438 break; 2439 } 2440 2441 if (dev->in_reset) 2442 retry = 0; 2443 2444 return retry; /* retry on raid path? */ 2445 } 2446 2447 static void hpsa_cmd_resolve_events(struct ctlr_info *h, 2448 struct CommandList *c) 2449 { 2450 struct hpsa_scsi_dev_t *dev = c->device; 2451 2452 /* 2453 * Reset c->scsi_cmd here so that the reset handler will know 2454 * this command has completed. Then, check to see if the handler is 2455 * waiting for this command, and, if so, wake it. 2456 */ 2457 c->scsi_cmd = SCSI_CMD_IDLE; 2458 mb(); /* Declare command idle before checking for pending events. */ 2459 if (dev) { 2460 atomic_dec(&dev->commands_outstanding); 2461 if (dev->in_reset && 2462 atomic_read(&dev->commands_outstanding) <= 0) 2463 wake_up_all(&h->event_sync_wait_queue); 2464 } 2465 } 2466 2467 static void hpsa_cmd_resolve_and_free(struct ctlr_info *h, 2468 struct CommandList *c) 2469 { 2470 hpsa_cmd_resolve_events(h, c); 2471 cmd_tagged_free(h, c); 2472 } 2473 2474 static void hpsa_cmd_free_and_done(struct ctlr_info *h, 2475 struct CommandList *c, struct scsi_cmnd *cmd) 2476 { 2477 hpsa_cmd_resolve_and_free(h, c); 2478 if (cmd && cmd->scsi_done) 2479 cmd->scsi_done(cmd); 2480 } 2481 2482 static void hpsa_retry_cmd(struct ctlr_info *h, struct CommandList *c) 2483 { 2484 INIT_WORK(&c->work, hpsa_command_resubmit_worker); 2485 queue_work_on(raw_smp_processor_id(), h->resubmit_wq, &c->work); 2486 } 2487 2488 static void process_ioaccel2_completion(struct ctlr_info *h, 2489 struct CommandList *c, struct scsi_cmnd *cmd, 2490 struct hpsa_scsi_dev_t *dev) 2491 { 2492 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 2493 2494 /* check for good status */ 2495 if (likely(c2->error_data.serv_response == 0 && 2496 c2->error_data.status == 0)) { 2497 cmd->result = 0; 2498 return hpsa_cmd_free_and_done(h, c, cmd); 2499 } 2500 2501 /* 2502 * Any RAID offload error results in retry which will use 2503 * the normal I/O path so the controller can handle whatever is 2504 * wrong. 2505 */ 2506 if (is_logical_device(dev) && 2507 c2->error_data.serv_response == 2508 IOACCEL2_SERV_RESPONSE_FAILURE) { 2509 if (c2->error_data.status == 2510 IOACCEL2_STATUS_SR_IOACCEL_DISABLED) { 2511 hpsa_turn_off_ioaccel_for_device(dev); 2512 } 2513 2514 if (dev->in_reset) { 2515 cmd->result = DID_RESET << 16; 2516 return hpsa_cmd_free_and_done(h, c, cmd); 2517 } 2518 2519 return hpsa_retry_cmd(h, c); 2520 } 2521 2522 if (handle_ioaccel_mode2_error(h, c, cmd, c2, dev)) 2523 return hpsa_retry_cmd(h, c); 2524 2525 return hpsa_cmd_free_and_done(h, c, cmd); 2526 } 2527 2528 /* Returns 0 on success, < 0 otherwise. */ 2529 static int hpsa_evaluate_tmf_status(struct ctlr_info *h, 2530 struct CommandList *cp) 2531 { 2532 u8 tmf_status = cp->err_info->ScsiStatus; 2533 2534 switch (tmf_status) { 2535 case CISS_TMF_COMPLETE: 2536 /* 2537 * CISS_TMF_COMPLETE never happens, instead, 2538 * ei->CommandStatus == 0 for this case. 2539 */ 2540 case CISS_TMF_SUCCESS: 2541 return 0; 2542 case CISS_TMF_INVALID_FRAME: 2543 case CISS_TMF_NOT_SUPPORTED: 2544 case CISS_TMF_FAILED: 2545 case CISS_TMF_WRONG_LUN: 2546 case CISS_TMF_OVERLAPPED_TAG: 2547 break; 2548 default: 2549 dev_warn(&h->pdev->dev, "Unknown TMF status: 0x%02x\n", 2550 tmf_status); 2551 break; 2552 } 2553 return -tmf_status; 2554 } 2555 2556 static void complete_scsi_command(struct CommandList *cp) 2557 { 2558 struct scsi_cmnd *cmd; 2559 struct ctlr_info *h; 2560 struct ErrorInfo *ei; 2561 struct hpsa_scsi_dev_t *dev; 2562 struct io_accel2_cmd *c2; 2563 2564 u8 sense_key; 2565 u8 asc; /* additional sense code */ 2566 u8 ascq; /* additional sense code qualifier */ 2567 unsigned long sense_data_size; 2568 2569 ei = cp->err_info; 2570 cmd = cp->scsi_cmd; 2571 h = cp->h; 2572 2573 if (!cmd->device) { 2574 cmd->result = DID_NO_CONNECT << 16; 2575 return hpsa_cmd_free_and_done(h, cp, cmd); 2576 } 2577 2578 dev = cmd->device->hostdata; 2579 if (!dev) { 2580 cmd->result = DID_NO_CONNECT << 16; 2581 return hpsa_cmd_free_and_done(h, cp, cmd); 2582 } 2583 c2 = &h->ioaccel2_cmd_pool[cp->cmdindex]; 2584 2585 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 2586 if ((cp->cmd_type == CMD_SCSI) && 2587 (le16_to_cpu(cp->Header.SGTotal) > h->max_cmd_sg_entries)) 2588 hpsa_unmap_sg_chain_block(h, cp); 2589 2590 if ((cp->cmd_type == CMD_IOACCEL2) && 2591 (c2->sg[0].chain_indicator == IOACCEL2_CHAIN)) 2592 hpsa_unmap_ioaccel2_sg_chain_block(h, c2); 2593 2594 cmd->result = (DID_OK << 16); /* host byte */ 2595 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 2596 2597 /* SCSI command has already been cleaned up in SML */ 2598 if (dev->was_removed) { 2599 hpsa_cmd_resolve_and_free(h, cp); 2600 return; 2601 } 2602 2603 if (cp->cmd_type == CMD_IOACCEL2 || cp->cmd_type == CMD_IOACCEL1) { 2604 if (dev->physical_device && dev->expose_device && 2605 dev->removed) { 2606 cmd->result = DID_NO_CONNECT << 16; 2607 return hpsa_cmd_free_and_done(h, cp, cmd); 2608 } 2609 if (likely(cp->phys_disk != NULL)) 2610 atomic_dec(&cp->phys_disk->ioaccel_cmds_out); 2611 } 2612 2613 /* 2614 * We check for lockup status here as it may be set for 2615 * CMD_SCSI, CMD_IOACCEL1 and CMD_IOACCEL2 commands by 2616 * fail_all_oustanding_cmds() 2617 */ 2618 if (unlikely(ei->CommandStatus == CMD_CTLR_LOCKUP)) { 2619 /* DID_NO_CONNECT will prevent a retry */ 2620 cmd->result = DID_NO_CONNECT << 16; 2621 return hpsa_cmd_free_and_done(h, cp, cmd); 2622 } 2623 2624 if (cp->cmd_type == CMD_IOACCEL2) 2625 return process_ioaccel2_completion(h, cp, cmd, dev); 2626 2627 scsi_set_resid(cmd, ei->ResidualCnt); 2628 if (ei->CommandStatus == 0) 2629 return hpsa_cmd_free_and_done(h, cp, cmd); 2630 2631 /* For I/O accelerator commands, copy over some fields to the normal 2632 * CISS header used below for error handling. 2633 */ 2634 if (cp->cmd_type == CMD_IOACCEL1) { 2635 struct io_accel1_cmd *c = &h->ioaccel_cmd_pool[cp->cmdindex]; 2636 cp->Header.SGList = scsi_sg_count(cmd); 2637 cp->Header.SGTotal = cpu_to_le16(cp->Header.SGList); 2638 cp->Request.CDBLen = le16_to_cpu(c->io_flags) & 2639 IOACCEL1_IOFLAGS_CDBLEN_MASK; 2640 cp->Header.tag = c->tag; 2641 memcpy(cp->Header.LUN.LunAddrBytes, c->CISS_LUN, 8); 2642 memcpy(cp->Request.CDB, c->CDB, cp->Request.CDBLen); 2643 2644 /* Any RAID offload error results in retry which will use 2645 * the normal I/O path so the controller can handle whatever's 2646 * wrong. 2647 */ 2648 if (is_logical_device(dev)) { 2649 if (ei->CommandStatus == CMD_IOACCEL_DISABLED) 2650 dev->offload_enabled = 0; 2651 return hpsa_retry_cmd(h, cp); 2652 } 2653 } 2654 2655 /* an error has occurred */ 2656 switch (ei->CommandStatus) { 2657 2658 case CMD_TARGET_STATUS: 2659 cmd->result |= ei->ScsiStatus; 2660 /* copy the sense data */ 2661 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 2662 sense_data_size = SCSI_SENSE_BUFFERSIZE; 2663 else 2664 sense_data_size = sizeof(ei->SenseInfo); 2665 if (ei->SenseLen < sense_data_size) 2666 sense_data_size = ei->SenseLen; 2667 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 2668 if (ei->ScsiStatus) 2669 decode_sense_data(ei->SenseInfo, sense_data_size, 2670 &sense_key, &asc, &ascq); 2671 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 2672 switch (sense_key) { 2673 case ABORTED_COMMAND: 2674 cmd->result |= DID_SOFT_ERROR << 16; 2675 break; 2676 case UNIT_ATTENTION: 2677 if (asc == 0x3F && ascq == 0x0E) 2678 h->drv_req_rescan = 1; 2679 break; 2680 case ILLEGAL_REQUEST: 2681 if (asc == 0x25 && ascq == 0x00) { 2682 dev->removed = 1; 2683 cmd->result = DID_NO_CONNECT << 16; 2684 } 2685 break; 2686 } 2687 break; 2688 } 2689 /* Problem was not a check condition 2690 * Pass it up to the upper layers... 2691 */ 2692 if (ei->ScsiStatus) { 2693 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 2694 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 2695 "Returning result: 0x%x\n", 2696 cp, ei->ScsiStatus, 2697 sense_key, asc, ascq, 2698 cmd->result); 2699 } else { /* scsi status is zero??? How??? */ 2700 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 2701 "Returning no connection.\n", cp), 2702 2703 /* Ordinarily, this case should never happen, 2704 * but there is a bug in some released firmware 2705 * revisions that allows it to happen if, for 2706 * example, a 4100 backplane loses power and 2707 * the tape drive is in it. We assume that 2708 * it's a fatal error of some kind because we 2709 * can't show that it wasn't. We will make it 2710 * look like selection timeout since that is 2711 * the most common reason for this to occur, 2712 * and it's severe enough. 2713 */ 2714 2715 cmd->result = DID_NO_CONNECT << 16; 2716 } 2717 break; 2718 2719 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2720 break; 2721 case CMD_DATA_OVERRUN: 2722 dev_warn(&h->pdev->dev, 2723 "CDB %16phN data overrun\n", cp->Request.CDB); 2724 break; 2725 case CMD_INVALID: { 2726 /* print_bytes(cp, sizeof(*cp), 1, 0); 2727 print_cmd(cp); */ 2728 /* We get CMD_INVALID if you address a non-existent device 2729 * instead of a selection timeout (no response). You will 2730 * see this if you yank out a drive, then try to access it. 2731 * This is kind of a shame because it means that any other 2732 * CMD_INVALID (e.g. driver bug) will get interpreted as a 2733 * missing target. */ 2734 cmd->result = DID_NO_CONNECT << 16; 2735 } 2736 break; 2737 case CMD_PROTOCOL_ERR: 2738 cmd->result = DID_ERROR << 16; 2739 dev_warn(&h->pdev->dev, "CDB %16phN : protocol error\n", 2740 cp->Request.CDB); 2741 break; 2742 case CMD_HARDWARE_ERR: 2743 cmd->result = DID_ERROR << 16; 2744 dev_warn(&h->pdev->dev, "CDB %16phN : hardware error\n", 2745 cp->Request.CDB); 2746 break; 2747 case CMD_CONNECTION_LOST: 2748 cmd->result = DID_ERROR << 16; 2749 dev_warn(&h->pdev->dev, "CDB %16phN : connection lost\n", 2750 cp->Request.CDB); 2751 break; 2752 case CMD_ABORTED: 2753 cmd->result = DID_ABORT << 16; 2754 break; 2755 case CMD_ABORT_FAILED: 2756 cmd->result = DID_ERROR << 16; 2757 dev_warn(&h->pdev->dev, "CDB %16phN : abort failed\n", 2758 cp->Request.CDB); 2759 break; 2760 case CMD_UNSOLICITED_ABORT: 2761 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 2762 dev_warn(&h->pdev->dev, "CDB %16phN : unsolicited abort\n", 2763 cp->Request.CDB); 2764 break; 2765 case CMD_TIMEOUT: 2766 cmd->result = DID_TIME_OUT << 16; 2767 dev_warn(&h->pdev->dev, "CDB %16phN timed out\n", 2768 cp->Request.CDB); 2769 break; 2770 case CMD_UNABORTABLE: 2771 cmd->result = DID_ERROR << 16; 2772 dev_warn(&h->pdev->dev, "Command unabortable\n"); 2773 break; 2774 case CMD_TMF_STATUS: 2775 if (hpsa_evaluate_tmf_status(h, cp)) /* TMF failed? */ 2776 cmd->result = DID_ERROR << 16; 2777 break; 2778 case CMD_IOACCEL_DISABLED: 2779 /* This only handles the direct pass-through case since RAID 2780 * offload is handled above. Just attempt a retry. 2781 */ 2782 cmd->result = DID_SOFT_ERROR << 16; 2783 dev_warn(&h->pdev->dev, 2784 "cp %p had HP SSD Smart Path error\n", cp); 2785 break; 2786 default: 2787 cmd->result = DID_ERROR << 16; 2788 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 2789 cp, ei->CommandStatus); 2790 } 2791 2792 return hpsa_cmd_free_and_done(h, cp, cmd); 2793 } 2794 2795 static void hpsa_pci_unmap(struct pci_dev *pdev, struct CommandList *c, 2796 int sg_used, enum dma_data_direction data_direction) 2797 { 2798 int i; 2799 2800 for (i = 0; i < sg_used; i++) 2801 dma_unmap_single(&pdev->dev, le64_to_cpu(c->SG[i].Addr), 2802 le32_to_cpu(c->SG[i].Len), 2803 data_direction); 2804 } 2805 2806 static int hpsa_map_one(struct pci_dev *pdev, 2807 struct CommandList *cp, 2808 unsigned char *buf, 2809 size_t buflen, 2810 enum dma_data_direction data_direction) 2811 { 2812 u64 addr64; 2813 2814 if (buflen == 0 || data_direction == DMA_NONE) { 2815 cp->Header.SGList = 0; 2816 cp->Header.SGTotal = cpu_to_le16(0); 2817 return 0; 2818 } 2819 2820 addr64 = dma_map_single(&pdev->dev, buf, buflen, data_direction); 2821 if (dma_mapping_error(&pdev->dev, addr64)) { 2822 /* Prevent subsequent unmap of something never mapped */ 2823 cp->Header.SGList = 0; 2824 cp->Header.SGTotal = cpu_to_le16(0); 2825 return -1; 2826 } 2827 cp->SG[0].Addr = cpu_to_le64(addr64); 2828 cp->SG[0].Len = cpu_to_le32(buflen); 2829 cp->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* we are not chaining */ 2830 cp->Header.SGList = 1; /* no. SGs contig in this cmd */ 2831 cp->Header.SGTotal = cpu_to_le16(1); /* total sgs in cmd list */ 2832 return 0; 2833 } 2834 2835 #define NO_TIMEOUT ((unsigned long) -1) 2836 #define DEFAULT_TIMEOUT 30000 /* milliseconds */ 2837 static int hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 2838 struct CommandList *c, int reply_queue, unsigned long timeout_msecs) 2839 { 2840 DECLARE_COMPLETION_ONSTACK(wait); 2841 2842 c->waiting = &wait; 2843 __enqueue_cmd_and_start_io(h, c, reply_queue); 2844 if (timeout_msecs == NO_TIMEOUT) { 2845 /* TODO: get rid of this no-timeout thing */ 2846 wait_for_completion_io(&wait); 2847 return IO_OK; 2848 } 2849 if (!wait_for_completion_io_timeout(&wait, 2850 msecs_to_jiffies(timeout_msecs))) { 2851 dev_warn(&h->pdev->dev, "Command timed out.\n"); 2852 return -ETIMEDOUT; 2853 } 2854 return IO_OK; 2855 } 2856 2857 static int hpsa_scsi_do_simple_cmd(struct ctlr_info *h, struct CommandList *c, 2858 int reply_queue, unsigned long timeout_msecs) 2859 { 2860 if (unlikely(lockup_detected(h))) { 2861 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 2862 return IO_OK; 2863 } 2864 return hpsa_scsi_do_simple_cmd_core(h, c, reply_queue, timeout_msecs); 2865 } 2866 2867 static u32 lockup_detected(struct ctlr_info *h) 2868 { 2869 int cpu; 2870 u32 rc, *lockup_detected; 2871 2872 cpu = get_cpu(); 2873 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 2874 rc = *lockup_detected; 2875 put_cpu(); 2876 return rc; 2877 } 2878 2879 #define MAX_DRIVER_CMD_RETRIES 25 2880 static int hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 2881 struct CommandList *c, enum dma_data_direction data_direction, 2882 unsigned long timeout_msecs) 2883 { 2884 int backoff_time = 10, retry_count = 0; 2885 int rc; 2886 2887 do { 2888 memset(c->err_info, 0, sizeof(*c->err_info)); 2889 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 2890 timeout_msecs); 2891 if (rc) 2892 break; 2893 retry_count++; 2894 if (retry_count > 3) { 2895 msleep(backoff_time); 2896 if (backoff_time < 1000) 2897 backoff_time *= 2; 2898 } 2899 } while ((check_for_unit_attention(h, c) || 2900 check_for_busy(h, c)) && 2901 retry_count <= MAX_DRIVER_CMD_RETRIES); 2902 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 2903 if (retry_count > MAX_DRIVER_CMD_RETRIES) 2904 rc = -EIO; 2905 return rc; 2906 } 2907 2908 static void hpsa_print_cmd(struct ctlr_info *h, char *txt, 2909 struct CommandList *c) 2910 { 2911 const u8 *cdb = c->Request.CDB; 2912 const u8 *lun = c->Header.LUN.LunAddrBytes; 2913 2914 dev_warn(&h->pdev->dev, "%s: LUN:%8phN CDB:%16phN\n", 2915 txt, lun, cdb); 2916 } 2917 2918 static void hpsa_scsi_interpret_error(struct ctlr_info *h, 2919 struct CommandList *cp) 2920 { 2921 const struct ErrorInfo *ei = cp->err_info; 2922 struct device *d = &cp->h->pdev->dev; 2923 u8 sense_key, asc, ascq; 2924 int sense_len; 2925 2926 switch (ei->CommandStatus) { 2927 case CMD_TARGET_STATUS: 2928 if (ei->SenseLen > sizeof(ei->SenseInfo)) 2929 sense_len = sizeof(ei->SenseInfo); 2930 else 2931 sense_len = ei->SenseLen; 2932 decode_sense_data(ei->SenseInfo, sense_len, 2933 &sense_key, &asc, &ascq); 2934 hpsa_print_cmd(h, "SCSI status", cp); 2935 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) 2936 dev_warn(d, "SCSI Status = 02, Sense key = 0x%02x, ASC = 0x%02x, ASCQ = 0x%02x\n", 2937 sense_key, asc, ascq); 2938 else 2939 dev_warn(d, "SCSI Status = 0x%02x\n", ei->ScsiStatus); 2940 if (ei->ScsiStatus == 0) 2941 dev_warn(d, "SCSI status is abnormally zero. " 2942 "(probably indicates selection timeout " 2943 "reported incorrectly due to a known " 2944 "firmware bug, circa July, 2001.)\n"); 2945 break; 2946 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 2947 break; 2948 case CMD_DATA_OVERRUN: 2949 hpsa_print_cmd(h, "overrun condition", cp); 2950 break; 2951 case CMD_INVALID: { 2952 /* controller unfortunately reports SCSI passthru's 2953 * to non-existent targets as invalid commands. 2954 */ 2955 hpsa_print_cmd(h, "invalid command", cp); 2956 dev_warn(d, "probably means device no longer present\n"); 2957 } 2958 break; 2959 case CMD_PROTOCOL_ERR: 2960 hpsa_print_cmd(h, "protocol error", cp); 2961 break; 2962 case CMD_HARDWARE_ERR: 2963 hpsa_print_cmd(h, "hardware error", cp); 2964 break; 2965 case CMD_CONNECTION_LOST: 2966 hpsa_print_cmd(h, "connection lost", cp); 2967 break; 2968 case CMD_ABORTED: 2969 hpsa_print_cmd(h, "aborted", cp); 2970 break; 2971 case CMD_ABORT_FAILED: 2972 hpsa_print_cmd(h, "abort failed", cp); 2973 break; 2974 case CMD_UNSOLICITED_ABORT: 2975 hpsa_print_cmd(h, "unsolicited abort", cp); 2976 break; 2977 case CMD_TIMEOUT: 2978 hpsa_print_cmd(h, "timed out", cp); 2979 break; 2980 case CMD_UNABORTABLE: 2981 hpsa_print_cmd(h, "unabortable", cp); 2982 break; 2983 case CMD_CTLR_LOCKUP: 2984 hpsa_print_cmd(h, "controller lockup detected", cp); 2985 break; 2986 default: 2987 hpsa_print_cmd(h, "unknown status", cp); 2988 dev_warn(d, "Unknown command status %x\n", 2989 ei->CommandStatus); 2990 } 2991 } 2992 2993 static int hpsa_do_receive_diagnostic(struct ctlr_info *h, u8 *scsi3addr, 2994 u8 page, u8 *buf, size_t bufsize) 2995 { 2996 int rc = IO_OK; 2997 struct CommandList *c; 2998 struct ErrorInfo *ei; 2999 3000 c = cmd_alloc(h); 3001 if (fill_cmd(c, RECEIVE_DIAGNOSTIC, h, buf, bufsize, 3002 page, scsi3addr, TYPE_CMD)) { 3003 rc = -1; 3004 goto out; 3005 } 3006 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3007 NO_TIMEOUT); 3008 if (rc) 3009 goto out; 3010 ei = c->err_info; 3011 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3012 hpsa_scsi_interpret_error(h, c); 3013 rc = -1; 3014 } 3015 out: 3016 cmd_free(h, c); 3017 return rc; 3018 } 3019 3020 static u64 hpsa_get_enclosure_logical_identifier(struct ctlr_info *h, 3021 u8 *scsi3addr) 3022 { 3023 u8 *buf; 3024 u64 sa = 0; 3025 int rc = 0; 3026 3027 buf = kzalloc(1024, GFP_KERNEL); 3028 if (!buf) 3029 return 0; 3030 3031 rc = hpsa_do_receive_diagnostic(h, scsi3addr, RECEIVE_DIAGNOSTIC, 3032 buf, 1024); 3033 3034 if (rc) 3035 goto out; 3036 3037 sa = get_unaligned_be64(buf+12); 3038 3039 out: 3040 kfree(buf); 3041 return sa; 3042 } 3043 3044 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 3045 u16 page, unsigned char *buf, 3046 unsigned char bufsize) 3047 { 3048 int rc = IO_OK; 3049 struct CommandList *c; 3050 struct ErrorInfo *ei; 3051 3052 c = cmd_alloc(h); 3053 3054 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 3055 page, scsi3addr, TYPE_CMD)) { 3056 rc = -1; 3057 goto out; 3058 } 3059 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3060 NO_TIMEOUT); 3061 if (rc) 3062 goto out; 3063 ei = c->err_info; 3064 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3065 hpsa_scsi_interpret_error(h, c); 3066 rc = -1; 3067 } 3068 out: 3069 cmd_free(h, c); 3070 return rc; 3071 } 3072 3073 static int hpsa_send_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3074 u8 reset_type, int reply_queue) 3075 { 3076 int rc = IO_OK; 3077 struct CommandList *c; 3078 struct ErrorInfo *ei; 3079 3080 c = cmd_alloc(h); 3081 c->device = dev; 3082 3083 /* fill_cmd can't fail here, no data buffer to map. */ 3084 (void) fill_cmd(c, reset_type, h, NULL, 0, 0, dev->scsi3addr, TYPE_MSG); 3085 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 3086 if (rc) { 3087 dev_warn(&h->pdev->dev, "Failed to send reset command\n"); 3088 goto out; 3089 } 3090 /* no unmap needed here because no data xfer. */ 3091 3092 ei = c->err_info; 3093 if (ei->CommandStatus != 0) { 3094 hpsa_scsi_interpret_error(h, c); 3095 rc = -1; 3096 } 3097 out: 3098 cmd_free(h, c); 3099 return rc; 3100 } 3101 3102 static bool hpsa_cmd_dev_match(struct ctlr_info *h, struct CommandList *c, 3103 struct hpsa_scsi_dev_t *dev, 3104 unsigned char *scsi3addr) 3105 { 3106 int i; 3107 bool match = false; 3108 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 3109 struct hpsa_tmf_struct *ac = (struct hpsa_tmf_struct *) c2; 3110 3111 if (hpsa_is_cmd_idle(c)) 3112 return false; 3113 3114 switch (c->cmd_type) { 3115 case CMD_SCSI: 3116 case CMD_IOCTL_PEND: 3117 match = !memcmp(scsi3addr, &c->Header.LUN.LunAddrBytes, 3118 sizeof(c->Header.LUN.LunAddrBytes)); 3119 break; 3120 3121 case CMD_IOACCEL1: 3122 case CMD_IOACCEL2: 3123 if (c->phys_disk == dev) { 3124 /* HBA mode match */ 3125 match = true; 3126 } else { 3127 /* Possible RAID mode -- check each phys dev. */ 3128 /* FIXME: Do we need to take out a lock here? If 3129 * so, we could just call hpsa_get_pdisk_of_ioaccel2() 3130 * instead. */ 3131 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3132 /* FIXME: an alternate test might be 3133 * 3134 * match = dev->phys_disk[i]->ioaccel_handle 3135 * == c2->scsi_nexus; */ 3136 match = dev->phys_disk[i] == c->phys_disk; 3137 } 3138 } 3139 break; 3140 3141 case IOACCEL2_TMF: 3142 for (i = 0; i < dev->nphysical_disks && !match; i++) { 3143 match = dev->phys_disk[i]->ioaccel_handle == 3144 le32_to_cpu(ac->it_nexus); 3145 } 3146 break; 3147 3148 case 0: /* The command is in the middle of being initialized. */ 3149 match = false; 3150 break; 3151 3152 default: 3153 dev_err(&h->pdev->dev, "unexpected cmd_type: %d\n", 3154 c->cmd_type); 3155 BUG(); 3156 } 3157 3158 return match; 3159 } 3160 3161 static int hpsa_do_reset(struct ctlr_info *h, struct hpsa_scsi_dev_t *dev, 3162 u8 reset_type, int reply_queue) 3163 { 3164 int rc = 0; 3165 3166 /* We can really only handle one reset at a time */ 3167 if (mutex_lock_interruptible(&h->reset_mutex) == -EINTR) { 3168 dev_warn(&h->pdev->dev, "concurrent reset wait interrupted.\n"); 3169 return -EINTR; 3170 } 3171 3172 rc = hpsa_send_reset(h, dev, reset_type, reply_queue); 3173 if (!rc) { 3174 /* incremented by sending the reset request */ 3175 atomic_dec(&dev->commands_outstanding); 3176 wait_event(h->event_sync_wait_queue, 3177 atomic_read(&dev->commands_outstanding) <= 0 || 3178 lockup_detected(h)); 3179 } 3180 3181 if (unlikely(lockup_detected(h))) { 3182 dev_warn(&h->pdev->dev, 3183 "Controller lockup detected during reset wait\n"); 3184 rc = -ENODEV; 3185 } 3186 3187 if (!rc) 3188 rc = wait_for_device_to_become_ready(h, dev->scsi3addr, 0); 3189 3190 mutex_unlock(&h->reset_mutex); 3191 return rc; 3192 } 3193 3194 static void hpsa_get_raid_level(struct ctlr_info *h, 3195 unsigned char *scsi3addr, unsigned char *raid_level) 3196 { 3197 int rc; 3198 unsigned char *buf; 3199 3200 *raid_level = RAID_UNKNOWN; 3201 buf = kzalloc(64, GFP_KERNEL); 3202 if (!buf) 3203 return; 3204 3205 if (!hpsa_vpd_page_supported(h, scsi3addr, 3206 HPSA_VPD_LV_DEVICE_GEOMETRY)) 3207 goto exit; 3208 3209 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3210 HPSA_VPD_LV_DEVICE_GEOMETRY, buf, 64); 3211 3212 if (rc == 0) 3213 *raid_level = buf[8]; 3214 if (*raid_level > RAID_UNKNOWN) 3215 *raid_level = RAID_UNKNOWN; 3216 exit: 3217 kfree(buf); 3218 return; 3219 } 3220 3221 #define HPSA_MAP_DEBUG 3222 #ifdef HPSA_MAP_DEBUG 3223 static void hpsa_debug_map_buff(struct ctlr_info *h, int rc, 3224 struct raid_map_data *map_buff) 3225 { 3226 struct raid_map_disk_data *dd = &map_buff->data[0]; 3227 int map, row, col; 3228 u16 map_cnt, row_cnt, disks_per_row; 3229 3230 if (rc != 0) 3231 return; 3232 3233 /* Show details only if debugging has been activated. */ 3234 if (h->raid_offload_debug < 2) 3235 return; 3236 3237 dev_info(&h->pdev->dev, "structure_size = %u\n", 3238 le32_to_cpu(map_buff->structure_size)); 3239 dev_info(&h->pdev->dev, "volume_blk_size = %u\n", 3240 le32_to_cpu(map_buff->volume_blk_size)); 3241 dev_info(&h->pdev->dev, "volume_blk_cnt = 0x%llx\n", 3242 le64_to_cpu(map_buff->volume_blk_cnt)); 3243 dev_info(&h->pdev->dev, "physicalBlockShift = %u\n", 3244 map_buff->phys_blk_shift); 3245 dev_info(&h->pdev->dev, "parity_rotation_shift = %u\n", 3246 map_buff->parity_rotation_shift); 3247 dev_info(&h->pdev->dev, "strip_size = %u\n", 3248 le16_to_cpu(map_buff->strip_size)); 3249 dev_info(&h->pdev->dev, "disk_starting_blk = 0x%llx\n", 3250 le64_to_cpu(map_buff->disk_starting_blk)); 3251 dev_info(&h->pdev->dev, "disk_blk_cnt = 0x%llx\n", 3252 le64_to_cpu(map_buff->disk_blk_cnt)); 3253 dev_info(&h->pdev->dev, "data_disks_per_row = %u\n", 3254 le16_to_cpu(map_buff->data_disks_per_row)); 3255 dev_info(&h->pdev->dev, "metadata_disks_per_row = %u\n", 3256 le16_to_cpu(map_buff->metadata_disks_per_row)); 3257 dev_info(&h->pdev->dev, "row_cnt = %u\n", 3258 le16_to_cpu(map_buff->row_cnt)); 3259 dev_info(&h->pdev->dev, "layout_map_count = %u\n", 3260 le16_to_cpu(map_buff->layout_map_count)); 3261 dev_info(&h->pdev->dev, "flags = 0x%x\n", 3262 le16_to_cpu(map_buff->flags)); 3263 dev_info(&h->pdev->dev, "encryption = %s\n", 3264 le16_to_cpu(map_buff->flags) & 3265 RAID_MAP_FLAG_ENCRYPT_ON ? "ON" : "OFF"); 3266 dev_info(&h->pdev->dev, "dekindex = %u\n", 3267 le16_to_cpu(map_buff->dekindex)); 3268 map_cnt = le16_to_cpu(map_buff->layout_map_count); 3269 for (map = 0; map < map_cnt; map++) { 3270 dev_info(&h->pdev->dev, "Map%u:\n", map); 3271 row_cnt = le16_to_cpu(map_buff->row_cnt); 3272 for (row = 0; row < row_cnt; row++) { 3273 dev_info(&h->pdev->dev, " Row%u:\n", row); 3274 disks_per_row = 3275 le16_to_cpu(map_buff->data_disks_per_row); 3276 for (col = 0; col < disks_per_row; col++, dd++) 3277 dev_info(&h->pdev->dev, 3278 " D%02u: h=0x%04x xor=%u,%u\n", 3279 col, dd->ioaccel_handle, 3280 dd->xor_mult[0], dd->xor_mult[1]); 3281 disks_per_row = 3282 le16_to_cpu(map_buff->metadata_disks_per_row); 3283 for (col = 0; col < disks_per_row; col++, dd++) 3284 dev_info(&h->pdev->dev, 3285 " M%02u: h=0x%04x xor=%u,%u\n", 3286 col, dd->ioaccel_handle, 3287 dd->xor_mult[0], dd->xor_mult[1]); 3288 } 3289 } 3290 } 3291 #else 3292 static void hpsa_debug_map_buff(__attribute__((unused)) struct ctlr_info *h, 3293 __attribute__((unused)) int rc, 3294 __attribute__((unused)) struct raid_map_data *map_buff) 3295 { 3296 } 3297 #endif 3298 3299 static int hpsa_get_raid_map(struct ctlr_info *h, 3300 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3301 { 3302 int rc = 0; 3303 struct CommandList *c; 3304 struct ErrorInfo *ei; 3305 3306 c = cmd_alloc(h); 3307 3308 if (fill_cmd(c, HPSA_GET_RAID_MAP, h, &this_device->raid_map, 3309 sizeof(this_device->raid_map), 0, 3310 scsi3addr, TYPE_CMD)) { 3311 dev_warn(&h->pdev->dev, "hpsa_get_raid_map fill_cmd failed\n"); 3312 cmd_free(h, c); 3313 return -1; 3314 } 3315 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3316 NO_TIMEOUT); 3317 if (rc) 3318 goto out; 3319 ei = c->err_info; 3320 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3321 hpsa_scsi_interpret_error(h, c); 3322 rc = -1; 3323 goto out; 3324 } 3325 cmd_free(h, c); 3326 3327 /* @todo in the future, dynamically allocate RAID map memory */ 3328 if (le32_to_cpu(this_device->raid_map.structure_size) > 3329 sizeof(this_device->raid_map)) { 3330 dev_warn(&h->pdev->dev, "RAID map size is too large!\n"); 3331 rc = -1; 3332 } 3333 hpsa_debug_map_buff(h, rc, &this_device->raid_map); 3334 return rc; 3335 out: 3336 cmd_free(h, c); 3337 return rc; 3338 } 3339 3340 static int hpsa_bmic_sense_subsystem_information(struct ctlr_info *h, 3341 unsigned char scsi3addr[], u16 bmic_device_index, 3342 struct bmic_sense_subsystem_info *buf, size_t bufsize) 3343 { 3344 int rc = IO_OK; 3345 struct CommandList *c; 3346 struct ErrorInfo *ei; 3347 3348 c = cmd_alloc(h); 3349 3350 rc = fill_cmd(c, BMIC_SENSE_SUBSYSTEM_INFORMATION, h, buf, bufsize, 3351 0, RAID_CTLR_LUNID, TYPE_CMD); 3352 if (rc) 3353 goto out; 3354 3355 c->Request.CDB[2] = bmic_device_index & 0xff; 3356 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3357 3358 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3359 NO_TIMEOUT); 3360 if (rc) 3361 goto out; 3362 ei = c->err_info; 3363 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3364 hpsa_scsi_interpret_error(h, c); 3365 rc = -1; 3366 } 3367 out: 3368 cmd_free(h, c); 3369 return rc; 3370 } 3371 3372 static int hpsa_bmic_id_controller(struct ctlr_info *h, 3373 struct bmic_identify_controller *buf, size_t bufsize) 3374 { 3375 int rc = IO_OK; 3376 struct CommandList *c; 3377 struct ErrorInfo *ei; 3378 3379 c = cmd_alloc(h); 3380 3381 rc = fill_cmd(c, BMIC_IDENTIFY_CONTROLLER, h, buf, bufsize, 3382 0, RAID_CTLR_LUNID, TYPE_CMD); 3383 if (rc) 3384 goto out; 3385 3386 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3387 NO_TIMEOUT); 3388 if (rc) 3389 goto out; 3390 ei = c->err_info; 3391 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3392 hpsa_scsi_interpret_error(h, c); 3393 rc = -1; 3394 } 3395 out: 3396 cmd_free(h, c); 3397 return rc; 3398 } 3399 3400 static int hpsa_bmic_id_physical_device(struct ctlr_info *h, 3401 unsigned char scsi3addr[], u16 bmic_device_index, 3402 struct bmic_identify_physical_device *buf, size_t bufsize) 3403 { 3404 int rc = IO_OK; 3405 struct CommandList *c; 3406 struct ErrorInfo *ei; 3407 3408 c = cmd_alloc(h); 3409 rc = fill_cmd(c, BMIC_IDENTIFY_PHYSICAL_DEVICE, h, buf, bufsize, 3410 0, RAID_CTLR_LUNID, TYPE_CMD); 3411 if (rc) 3412 goto out; 3413 3414 c->Request.CDB[2] = bmic_device_index & 0xff; 3415 c->Request.CDB[9] = (bmic_device_index >> 8) & 0xff; 3416 3417 hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3418 NO_TIMEOUT); 3419 ei = c->err_info; 3420 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3421 hpsa_scsi_interpret_error(h, c); 3422 rc = -1; 3423 } 3424 out: 3425 cmd_free(h, c); 3426 3427 return rc; 3428 } 3429 3430 /* 3431 * get enclosure information 3432 * struct ReportExtendedLUNdata *rlep - Used for BMIC drive number 3433 * struct hpsa_scsi_dev_t *encl_dev - device entry for enclosure 3434 * Uses id_physical_device to determine the box_index. 3435 */ 3436 static void hpsa_get_enclosure_info(struct ctlr_info *h, 3437 unsigned char *scsi3addr, 3438 struct ReportExtendedLUNdata *rlep, int rle_index, 3439 struct hpsa_scsi_dev_t *encl_dev) 3440 { 3441 int rc = -1; 3442 struct CommandList *c = NULL; 3443 struct ErrorInfo *ei = NULL; 3444 struct bmic_sense_storage_box_params *bssbp = NULL; 3445 struct bmic_identify_physical_device *id_phys = NULL; 3446 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 3447 u16 bmic_device_index = 0; 3448 3449 encl_dev->eli = 3450 hpsa_get_enclosure_logical_identifier(h, scsi3addr); 3451 3452 bmic_device_index = GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]); 3453 3454 if (encl_dev->target == -1 || encl_dev->lun == -1) { 3455 rc = IO_OK; 3456 goto out; 3457 } 3458 3459 if (bmic_device_index == 0xFF00 || MASKED_DEVICE(&rle->lunid[0])) { 3460 rc = IO_OK; 3461 goto out; 3462 } 3463 3464 bssbp = kzalloc(sizeof(*bssbp), GFP_KERNEL); 3465 if (!bssbp) 3466 goto out; 3467 3468 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 3469 if (!id_phys) 3470 goto out; 3471 3472 rc = hpsa_bmic_id_physical_device(h, scsi3addr, bmic_device_index, 3473 id_phys, sizeof(*id_phys)); 3474 if (rc) { 3475 dev_warn(&h->pdev->dev, "%s: id_phys failed %d bdi[0x%x]\n", 3476 __func__, encl_dev->external, bmic_device_index); 3477 goto out; 3478 } 3479 3480 c = cmd_alloc(h); 3481 3482 rc = fill_cmd(c, BMIC_SENSE_STORAGE_BOX_PARAMS, h, bssbp, 3483 sizeof(*bssbp), 0, RAID_CTLR_LUNID, TYPE_CMD); 3484 3485 if (rc) 3486 goto out; 3487 3488 if (id_phys->phys_connector[1] == 'E') 3489 c->Request.CDB[5] = id_phys->box_index; 3490 else 3491 c->Request.CDB[5] = 0; 3492 3493 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3494 NO_TIMEOUT); 3495 if (rc) 3496 goto out; 3497 3498 ei = c->err_info; 3499 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 3500 rc = -1; 3501 goto out; 3502 } 3503 3504 encl_dev->box[id_phys->active_path_number] = bssbp->phys_box_on_port; 3505 memcpy(&encl_dev->phys_connector[id_phys->active_path_number], 3506 bssbp->phys_connector, sizeof(bssbp->phys_connector)); 3507 3508 rc = IO_OK; 3509 out: 3510 kfree(bssbp); 3511 kfree(id_phys); 3512 3513 if (c) 3514 cmd_free(h, c); 3515 3516 if (rc != IO_OK) 3517 hpsa_show_dev_msg(KERN_INFO, h, encl_dev, 3518 "Error, could not get enclosure information"); 3519 } 3520 3521 static u64 hpsa_get_sas_address_from_report_physical(struct ctlr_info *h, 3522 unsigned char *scsi3addr) 3523 { 3524 struct ReportExtendedLUNdata *physdev; 3525 u32 nphysicals; 3526 u64 sa = 0; 3527 int i; 3528 3529 physdev = kzalloc(sizeof(*physdev), GFP_KERNEL); 3530 if (!physdev) 3531 return 0; 3532 3533 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 3534 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 3535 kfree(physdev); 3536 return 0; 3537 } 3538 nphysicals = get_unaligned_be32(physdev->LUNListLength) / 24; 3539 3540 for (i = 0; i < nphysicals; i++) 3541 if (!memcmp(&physdev->LUN[i].lunid[0], scsi3addr, 8)) { 3542 sa = get_unaligned_be64(&physdev->LUN[i].wwid[0]); 3543 break; 3544 } 3545 3546 kfree(physdev); 3547 3548 return sa; 3549 } 3550 3551 static void hpsa_get_sas_address(struct ctlr_info *h, unsigned char *scsi3addr, 3552 struct hpsa_scsi_dev_t *dev) 3553 { 3554 int rc; 3555 u64 sa = 0; 3556 3557 if (is_hba_lunid(scsi3addr)) { 3558 struct bmic_sense_subsystem_info *ssi; 3559 3560 ssi = kzalloc(sizeof(*ssi), GFP_KERNEL); 3561 if (!ssi) 3562 return; 3563 3564 rc = hpsa_bmic_sense_subsystem_information(h, 3565 scsi3addr, 0, ssi, sizeof(*ssi)); 3566 if (rc == 0) { 3567 sa = get_unaligned_be64(ssi->primary_world_wide_id); 3568 h->sas_address = sa; 3569 } 3570 3571 kfree(ssi); 3572 } else 3573 sa = hpsa_get_sas_address_from_report_physical(h, scsi3addr); 3574 3575 dev->sas_address = sa; 3576 } 3577 3578 static void hpsa_ext_ctrl_present(struct ctlr_info *h, 3579 struct ReportExtendedLUNdata *physdev) 3580 { 3581 u32 nphysicals; 3582 int i; 3583 3584 if (h->discovery_polling) 3585 return; 3586 3587 nphysicals = (get_unaligned_be32(physdev->LUNListLength) / 24) + 1; 3588 3589 for (i = 0; i < nphysicals; i++) { 3590 if (physdev->LUN[i].device_type == 3591 BMIC_DEVICE_TYPE_CONTROLLER 3592 && !is_hba_lunid(physdev->LUN[i].lunid)) { 3593 dev_info(&h->pdev->dev, 3594 "External controller present, activate discovery polling and disable rld caching\n"); 3595 hpsa_disable_rld_caching(h); 3596 h->discovery_polling = 1; 3597 break; 3598 } 3599 } 3600 } 3601 3602 /* Get a device id from inquiry page 0x83 */ 3603 static bool hpsa_vpd_page_supported(struct ctlr_info *h, 3604 unsigned char scsi3addr[], u8 page) 3605 { 3606 int rc; 3607 int i; 3608 int pages; 3609 unsigned char *buf, bufsize; 3610 3611 buf = kzalloc(256, GFP_KERNEL); 3612 if (!buf) 3613 return false; 3614 3615 /* Get the size of the page list first */ 3616 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3617 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3618 buf, HPSA_VPD_HEADER_SZ); 3619 if (rc != 0) 3620 goto exit_unsupported; 3621 pages = buf[3]; 3622 if ((pages + HPSA_VPD_HEADER_SZ) <= 255) 3623 bufsize = pages + HPSA_VPD_HEADER_SZ; 3624 else 3625 bufsize = 255; 3626 3627 /* Get the whole VPD page list */ 3628 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3629 VPD_PAGE | HPSA_VPD_SUPPORTED_PAGES, 3630 buf, bufsize); 3631 if (rc != 0) 3632 goto exit_unsupported; 3633 3634 pages = buf[3]; 3635 for (i = 1; i <= pages; i++) 3636 if (buf[3 + i] == page) 3637 goto exit_supported; 3638 exit_unsupported: 3639 kfree(buf); 3640 return false; 3641 exit_supported: 3642 kfree(buf); 3643 return true; 3644 } 3645 3646 /* 3647 * Called during a scan operation. 3648 * Sets ioaccel status on the new device list, not the existing device list 3649 * 3650 * The device list used during I/O will be updated later in 3651 * adjust_hpsa_scsi_table. 3652 */ 3653 static void hpsa_get_ioaccel_status(struct ctlr_info *h, 3654 unsigned char *scsi3addr, struct hpsa_scsi_dev_t *this_device) 3655 { 3656 int rc; 3657 unsigned char *buf; 3658 u8 ioaccel_status; 3659 3660 this_device->offload_config = 0; 3661 this_device->offload_enabled = 0; 3662 this_device->offload_to_be_enabled = 0; 3663 3664 buf = kzalloc(64, GFP_KERNEL); 3665 if (!buf) 3666 return; 3667 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_IOACCEL_STATUS)) 3668 goto out; 3669 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 3670 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, buf, 64); 3671 if (rc != 0) 3672 goto out; 3673 3674 #define IOACCEL_STATUS_BYTE 4 3675 #define OFFLOAD_CONFIGURED_BIT 0x01 3676 #define OFFLOAD_ENABLED_BIT 0x02 3677 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 3678 this_device->offload_config = 3679 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 3680 if (this_device->offload_config) { 3681 bool offload_enabled = 3682 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 3683 /* 3684 * Check to see if offload can be enabled. 3685 */ 3686 if (offload_enabled) { 3687 rc = hpsa_get_raid_map(h, scsi3addr, this_device); 3688 if (rc) /* could not load raid_map */ 3689 goto out; 3690 this_device->offload_to_be_enabled = 1; 3691 } 3692 } 3693 3694 out: 3695 kfree(buf); 3696 return; 3697 } 3698 3699 /* Get the device id from inquiry page 0x83 */ 3700 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 3701 unsigned char *device_id, int index, int buflen) 3702 { 3703 int rc; 3704 unsigned char *buf; 3705 3706 /* Does controller have VPD for device id? */ 3707 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_DEVICE_ID)) 3708 return 1; /* not supported */ 3709 3710 buf = kzalloc(64, GFP_KERNEL); 3711 if (!buf) 3712 return -ENOMEM; 3713 3714 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | 3715 HPSA_VPD_LV_DEVICE_ID, buf, 64); 3716 if (rc == 0) { 3717 if (buflen > 16) 3718 buflen = 16; 3719 memcpy(device_id, &buf[8], buflen); 3720 } 3721 3722 kfree(buf); 3723 3724 return rc; /*0 - got id, otherwise, didn't */ 3725 } 3726 3727 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 3728 void *buf, int bufsize, 3729 int extended_response) 3730 { 3731 int rc = IO_OK; 3732 struct CommandList *c; 3733 unsigned char scsi3addr[8]; 3734 struct ErrorInfo *ei; 3735 3736 c = cmd_alloc(h); 3737 3738 /* address the controller */ 3739 memset(scsi3addr, 0, sizeof(scsi3addr)); 3740 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 3741 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 3742 rc = -EAGAIN; 3743 goto out; 3744 } 3745 if (extended_response) 3746 c->Request.CDB[1] = extended_response; 3747 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 3748 NO_TIMEOUT); 3749 if (rc) 3750 goto out; 3751 ei = c->err_info; 3752 if (ei->CommandStatus != 0 && 3753 ei->CommandStatus != CMD_DATA_UNDERRUN) { 3754 hpsa_scsi_interpret_error(h, c); 3755 rc = -EIO; 3756 } else { 3757 struct ReportLUNdata *rld = buf; 3758 3759 if (rld->extended_response_flag != extended_response) { 3760 if (!h->legacy_board) { 3761 dev_err(&h->pdev->dev, 3762 "report luns requested format %u, got %u\n", 3763 extended_response, 3764 rld->extended_response_flag); 3765 rc = -EINVAL; 3766 } else 3767 rc = -EOPNOTSUPP; 3768 } 3769 } 3770 out: 3771 cmd_free(h, c); 3772 return rc; 3773 } 3774 3775 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 3776 struct ReportExtendedLUNdata *buf, int bufsize) 3777 { 3778 int rc; 3779 struct ReportLUNdata *lbuf; 3780 3781 rc = hpsa_scsi_do_report_luns(h, 0, buf, bufsize, 3782 HPSA_REPORT_PHYS_EXTENDED); 3783 if (!rc || rc != -EOPNOTSUPP) 3784 return rc; 3785 3786 /* REPORT PHYS EXTENDED is not supported */ 3787 lbuf = kzalloc(sizeof(*lbuf), GFP_KERNEL); 3788 if (!lbuf) 3789 return -ENOMEM; 3790 3791 rc = hpsa_scsi_do_report_luns(h, 0, lbuf, sizeof(*lbuf), 0); 3792 if (!rc) { 3793 int i; 3794 u32 nphys; 3795 3796 /* Copy ReportLUNdata header */ 3797 memcpy(buf, lbuf, 8); 3798 nphys = be32_to_cpu(*((__be32 *)lbuf->LUNListLength)) / 8; 3799 for (i = 0; i < nphys; i++) 3800 memcpy(buf->LUN[i].lunid, lbuf->LUN[i], 8); 3801 } 3802 kfree(lbuf); 3803 return rc; 3804 } 3805 3806 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 3807 struct ReportLUNdata *buf, int bufsize) 3808 { 3809 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 3810 } 3811 3812 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 3813 int bus, int target, int lun) 3814 { 3815 device->bus = bus; 3816 device->target = target; 3817 device->lun = lun; 3818 } 3819 3820 /* Use VPD inquiry to get details of volume status */ 3821 static int hpsa_get_volume_status(struct ctlr_info *h, 3822 unsigned char scsi3addr[]) 3823 { 3824 int rc; 3825 int status; 3826 int size; 3827 unsigned char *buf; 3828 3829 buf = kzalloc(64, GFP_KERNEL); 3830 if (!buf) 3831 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3832 3833 /* Does controller have VPD for logical volume status? */ 3834 if (!hpsa_vpd_page_supported(h, scsi3addr, HPSA_VPD_LV_STATUS)) 3835 goto exit_failed; 3836 3837 /* Get the size of the VPD return buffer */ 3838 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3839 buf, HPSA_VPD_HEADER_SZ); 3840 if (rc != 0) 3841 goto exit_failed; 3842 size = buf[3]; 3843 3844 /* Now get the whole VPD buffer */ 3845 rc = hpsa_scsi_do_inquiry(h, scsi3addr, VPD_PAGE | HPSA_VPD_LV_STATUS, 3846 buf, size + HPSA_VPD_HEADER_SZ); 3847 if (rc != 0) 3848 goto exit_failed; 3849 status = buf[4]; /* status byte */ 3850 3851 kfree(buf); 3852 return status; 3853 exit_failed: 3854 kfree(buf); 3855 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3856 } 3857 3858 /* Determine offline status of a volume. 3859 * Return either: 3860 * 0 (not offline) 3861 * 0xff (offline for unknown reasons) 3862 * # (integer code indicating one of several NOT READY states 3863 * describing why a volume is to be kept offline) 3864 */ 3865 static unsigned char hpsa_volume_offline(struct ctlr_info *h, 3866 unsigned char scsi3addr[]) 3867 { 3868 struct CommandList *c; 3869 unsigned char *sense; 3870 u8 sense_key, asc, ascq; 3871 int sense_len; 3872 int rc, ldstat = 0; 3873 u16 cmd_status; 3874 u8 scsi_status; 3875 #define ASC_LUN_NOT_READY 0x04 3876 #define ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS 0x04 3877 #define ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ 0x02 3878 3879 c = cmd_alloc(h); 3880 3881 (void) fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, scsi3addr, TYPE_CMD); 3882 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 3883 NO_TIMEOUT); 3884 if (rc) { 3885 cmd_free(h, c); 3886 return HPSA_VPD_LV_STATUS_UNSUPPORTED; 3887 } 3888 sense = c->err_info->SenseInfo; 3889 if (c->err_info->SenseLen > sizeof(c->err_info->SenseInfo)) 3890 sense_len = sizeof(c->err_info->SenseInfo); 3891 else 3892 sense_len = c->err_info->SenseLen; 3893 decode_sense_data(sense, sense_len, &sense_key, &asc, &ascq); 3894 cmd_status = c->err_info->CommandStatus; 3895 scsi_status = c->err_info->ScsiStatus; 3896 cmd_free(h, c); 3897 3898 /* Determine the reason for not ready state */ 3899 ldstat = hpsa_get_volume_status(h, scsi3addr); 3900 3901 /* Keep volume offline in certain cases: */ 3902 switch (ldstat) { 3903 case HPSA_LV_FAILED: 3904 case HPSA_LV_UNDERGOING_ERASE: 3905 case HPSA_LV_NOT_AVAILABLE: 3906 case HPSA_LV_UNDERGOING_RPI: 3907 case HPSA_LV_PENDING_RPI: 3908 case HPSA_LV_ENCRYPTED_NO_KEY: 3909 case HPSA_LV_PLAINTEXT_IN_ENCRYPT_ONLY_CONTROLLER: 3910 case HPSA_LV_UNDERGOING_ENCRYPTION: 3911 case HPSA_LV_UNDERGOING_ENCRYPTION_REKEYING: 3912 case HPSA_LV_ENCRYPTED_IN_NON_ENCRYPTED_CONTROLLER: 3913 return ldstat; 3914 case HPSA_VPD_LV_STATUS_UNSUPPORTED: 3915 /* If VPD status page isn't available, 3916 * use ASC/ASCQ to determine state 3917 */ 3918 if ((ascq == ASCQ_LUN_NOT_READY_FORMAT_IN_PROGRESS) || 3919 (ascq == ASCQ_LUN_NOT_READY_INITIALIZING_CMD_REQ)) 3920 return ldstat; 3921 break; 3922 default: 3923 break; 3924 } 3925 return HPSA_LV_OK; 3926 } 3927 3928 static int hpsa_update_device_info(struct ctlr_info *h, 3929 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 3930 unsigned char *is_OBDR_device) 3931 { 3932 3933 #define OBDR_SIG_OFFSET 43 3934 #define OBDR_TAPE_SIG "$DR-10" 3935 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 3936 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 3937 3938 unsigned char *inq_buff; 3939 unsigned char *obdr_sig; 3940 int rc = 0; 3941 3942 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 3943 if (!inq_buff) { 3944 rc = -ENOMEM; 3945 goto bail_out; 3946 } 3947 3948 /* Do an inquiry to the device to see what it is. */ 3949 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 3950 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 3951 dev_err(&h->pdev->dev, 3952 "%s: inquiry failed, device will be skipped.\n", 3953 __func__); 3954 rc = HPSA_INQUIRY_FAILED; 3955 goto bail_out; 3956 } 3957 3958 scsi_sanitize_inquiry_string(&inq_buff[8], 8); 3959 scsi_sanitize_inquiry_string(&inq_buff[16], 16); 3960 3961 this_device->devtype = (inq_buff[0] & 0x1f); 3962 memcpy(this_device->scsi3addr, scsi3addr, 8); 3963 memcpy(this_device->vendor, &inq_buff[8], 3964 sizeof(this_device->vendor)); 3965 memcpy(this_device->model, &inq_buff[16], 3966 sizeof(this_device->model)); 3967 this_device->rev = inq_buff[2]; 3968 memset(this_device->device_id, 0, 3969 sizeof(this_device->device_id)); 3970 if (hpsa_get_device_id(h, scsi3addr, this_device->device_id, 8, 3971 sizeof(this_device->device_id)) < 0) { 3972 dev_err(&h->pdev->dev, 3973 "hpsa%d: %s: can't get device id for [%d:%d:%d:%d]\t%s\t%.16s\n", 3974 h->ctlr, __func__, 3975 h->scsi_host->host_no, 3976 this_device->bus, this_device->target, 3977 this_device->lun, 3978 scsi_device_type(this_device->devtype), 3979 this_device->model); 3980 rc = HPSA_LV_FAILED; 3981 goto bail_out; 3982 } 3983 3984 if ((this_device->devtype == TYPE_DISK || 3985 this_device->devtype == TYPE_ZBC) && 3986 is_logical_dev_addr_mode(scsi3addr)) { 3987 unsigned char volume_offline; 3988 3989 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 3990 if (h->fw_support & MISC_FW_RAID_OFFLOAD_BASIC) 3991 hpsa_get_ioaccel_status(h, scsi3addr, this_device); 3992 volume_offline = hpsa_volume_offline(h, scsi3addr); 3993 if (volume_offline == HPSA_VPD_LV_STATUS_UNSUPPORTED && 3994 h->legacy_board) { 3995 /* 3996 * Legacy boards might not support volume status 3997 */ 3998 dev_info(&h->pdev->dev, 3999 "C0:T%d:L%d Volume status not available, assuming online.\n", 4000 this_device->target, this_device->lun); 4001 volume_offline = 0; 4002 } 4003 this_device->volume_offline = volume_offline; 4004 if (volume_offline == HPSA_LV_FAILED) { 4005 rc = HPSA_LV_FAILED; 4006 dev_err(&h->pdev->dev, 4007 "%s: LV failed, device will be skipped.\n", 4008 __func__); 4009 goto bail_out; 4010 } 4011 } else { 4012 this_device->raid_level = RAID_UNKNOWN; 4013 this_device->offload_config = 0; 4014 hpsa_turn_off_ioaccel_for_device(this_device); 4015 this_device->hba_ioaccel_enabled = 0; 4016 this_device->volume_offline = 0; 4017 this_device->queue_depth = h->nr_cmds; 4018 } 4019 4020 if (this_device->external) 4021 this_device->queue_depth = EXTERNAL_QD; 4022 4023 if (is_OBDR_device) { 4024 /* See if this is a One-Button-Disaster-Recovery device 4025 * by looking for "$DR-10" at offset 43 in inquiry data. 4026 */ 4027 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 4028 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 4029 strncmp(obdr_sig, OBDR_TAPE_SIG, 4030 OBDR_SIG_LEN) == 0); 4031 } 4032 kfree(inq_buff); 4033 return 0; 4034 4035 bail_out: 4036 kfree(inq_buff); 4037 return rc; 4038 } 4039 4040 /* 4041 * Helper function to assign bus, target, lun mapping of devices. 4042 * Logical drive target and lun are assigned at this time, but 4043 * physical device lun and target assignment are deferred (assigned 4044 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 4045 */ 4046 static void figure_bus_target_lun(struct ctlr_info *h, 4047 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 4048 { 4049 u32 lunid = get_unaligned_le32(lunaddrbytes); 4050 4051 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 4052 /* physical device, target and lun filled in later */ 4053 if (is_hba_lunid(lunaddrbytes)) { 4054 int bus = HPSA_HBA_BUS; 4055 4056 if (!device->rev) 4057 bus = HPSA_LEGACY_HBA_BUS; 4058 hpsa_set_bus_target_lun(device, 4059 bus, 0, lunid & 0x3fff); 4060 } else 4061 /* defer target, lun assignment for physical devices */ 4062 hpsa_set_bus_target_lun(device, 4063 HPSA_PHYSICAL_DEVICE_BUS, -1, -1); 4064 return; 4065 } 4066 /* It's a logical device */ 4067 if (device->external) { 4068 hpsa_set_bus_target_lun(device, 4069 HPSA_EXTERNAL_RAID_VOLUME_BUS, (lunid >> 16) & 0x3fff, 4070 lunid & 0x00ff); 4071 return; 4072 } 4073 hpsa_set_bus_target_lun(device, HPSA_RAID_VOLUME_BUS, 4074 0, lunid & 0x3fff); 4075 } 4076 4077 static int figure_external_status(struct ctlr_info *h, int raid_ctlr_position, 4078 int i, int nphysicals, int nlocal_logicals) 4079 { 4080 /* In report logicals, local logicals are listed first, 4081 * then any externals. 4082 */ 4083 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4084 4085 if (i == raid_ctlr_position) 4086 return 0; 4087 4088 if (i < logicals_start) 4089 return 0; 4090 4091 /* i is in logicals range, but still within local logicals */ 4092 if ((i - nphysicals - (raid_ctlr_position == 0)) < nlocal_logicals) 4093 return 0; 4094 4095 return 1; /* it's an external lun */ 4096 } 4097 4098 /* 4099 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 4100 * logdev. The number of luns in physdev and logdev are returned in 4101 * *nphysicals and *nlogicals, respectively. 4102 * Returns 0 on success, -1 otherwise. 4103 */ 4104 static int hpsa_gather_lun_info(struct ctlr_info *h, 4105 struct ReportExtendedLUNdata *physdev, u32 *nphysicals, 4106 struct ReportLUNdata *logdev, u32 *nlogicals) 4107 { 4108 if (hpsa_scsi_do_report_phys_luns(h, physdev, sizeof(*physdev))) { 4109 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 4110 return -1; 4111 } 4112 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 24; 4113 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 4114 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded. %d LUNs ignored.\n", 4115 HPSA_MAX_PHYS_LUN, *nphysicals - HPSA_MAX_PHYS_LUN); 4116 *nphysicals = HPSA_MAX_PHYS_LUN; 4117 } 4118 if (hpsa_scsi_do_report_log_luns(h, logdev, sizeof(*logdev))) { 4119 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 4120 return -1; 4121 } 4122 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 4123 /* Reject Logicals in excess of our max capability. */ 4124 if (*nlogicals > HPSA_MAX_LUN) { 4125 dev_warn(&h->pdev->dev, 4126 "maximum logical LUNs (%d) exceeded. " 4127 "%d LUNs ignored.\n", HPSA_MAX_LUN, 4128 *nlogicals - HPSA_MAX_LUN); 4129 *nlogicals = HPSA_MAX_LUN; 4130 } 4131 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 4132 dev_warn(&h->pdev->dev, 4133 "maximum logical + physical LUNs (%d) exceeded. " 4134 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 4135 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 4136 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 4137 } 4138 return 0; 4139 } 4140 4141 static u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, 4142 int i, int nphysicals, int nlogicals, 4143 struct ReportExtendedLUNdata *physdev_list, 4144 struct ReportLUNdata *logdev_list) 4145 { 4146 /* Helper function, figure out where the LUN ID info is coming from 4147 * given index i, lists of physical and logical devices, where in 4148 * the list the raid controller is supposed to appear (first or last) 4149 */ 4150 4151 int logicals_start = nphysicals + (raid_ctlr_position == 0); 4152 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 4153 4154 if (i == raid_ctlr_position) 4155 return RAID_CTLR_LUNID; 4156 4157 if (i < logicals_start) 4158 return &physdev_list->LUN[i - 4159 (raid_ctlr_position == 0)].lunid[0]; 4160 4161 if (i < last_device) 4162 return &logdev_list->LUN[i - nphysicals - 4163 (raid_ctlr_position == 0)][0]; 4164 BUG(); 4165 return NULL; 4166 } 4167 4168 /* get physical drive ioaccel handle and queue depth */ 4169 static void hpsa_get_ioaccel_drive_info(struct ctlr_info *h, 4170 struct hpsa_scsi_dev_t *dev, 4171 struct ReportExtendedLUNdata *rlep, int rle_index, 4172 struct bmic_identify_physical_device *id_phys) 4173 { 4174 int rc; 4175 struct ext_report_lun_entry *rle; 4176 4177 rle = &rlep->LUN[rle_index]; 4178 4179 dev->ioaccel_handle = rle->ioaccel_handle; 4180 if ((rle->device_flags & 0x08) && dev->ioaccel_handle) 4181 dev->hba_ioaccel_enabled = 1; 4182 memset(id_phys, 0, sizeof(*id_phys)); 4183 rc = hpsa_bmic_id_physical_device(h, &rle->lunid[0], 4184 GET_BMIC_DRIVE_NUMBER(&rle->lunid[0]), id_phys, 4185 sizeof(*id_phys)); 4186 if (!rc) 4187 /* Reserve space for FW operations */ 4188 #define DRIVE_CMDS_RESERVED_FOR_FW 2 4189 #define DRIVE_QUEUE_DEPTH 7 4190 dev->queue_depth = 4191 le16_to_cpu(id_phys->current_queue_depth_limit) - 4192 DRIVE_CMDS_RESERVED_FOR_FW; 4193 else 4194 dev->queue_depth = DRIVE_QUEUE_DEPTH; /* conservative */ 4195 } 4196 4197 static void hpsa_get_path_info(struct hpsa_scsi_dev_t *this_device, 4198 struct ReportExtendedLUNdata *rlep, int rle_index, 4199 struct bmic_identify_physical_device *id_phys) 4200 { 4201 struct ext_report_lun_entry *rle = &rlep->LUN[rle_index]; 4202 4203 if ((rle->device_flags & 0x08) && this_device->ioaccel_handle) 4204 this_device->hba_ioaccel_enabled = 1; 4205 4206 memcpy(&this_device->active_path_index, 4207 &id_phys->active_path_number, 4208 sizeof(this_device->active_path_index)); 4209 memcpy(&this_device->path_map, 4210 &id_phys->redundant_path_present_map, 4211 sizeof(this_device->path_map)); 4212 memcpy(&this_device->box, 4213 &id_phys->alternate_paths_phys_box_on_port, 4214 sizeof(this_device->box)); 4215 memcpy(&this_device->phys_connector, 4216 &id_phys->alternate_paths_phys_connector, 4217 sizeof(this_device->phys_connector)); 4218 memcpy(&this_device->bay, 4219 &id_phys->phys_bay_in_box, 4220 sizeof(this_device->bay)); 4221 } 4222 4223 /* get number of local logical disks. */ 4224 static int hpsa_set_local_logical_count(struct ctlr_info *h, 4225 struct bmic_identify_controller *id_ctlr, 4226 u32 *nlocals) 4227 { 4228 int rc; 4229 4230 if (!id_ctlr) { 4231 dev_warn(&h->pdev->dev, "%s: id_ctlr buffer is NULL.\n", 4232 __func__); 4233 return -ENOMEM; 4234 } 4235 memset(id_ctlr, 0, sizeof(*id_ctlr)); 4236 rc = hpsa_bmic_id_controller(h, id_ctlr, sizeof(*id_ctlr)); 4237 if (!rc) 4238 if (id_ctlr->configured_logical_drive_count < 255) 4239 *nlocals = id_ctlr->configured_logical_drive_count; 4240 else 4241 *nlocals = le16_to_cpu( 4242 id_ctlr->extended_logical_unit_count); 4243 else 4244 *nlocals = -1; 4245 return rc; 4246 } 4247 4248 static bool hpsa_is_disk_spare(struct ctlr_info *h, u8 *lunaddrbytes) 4249 { 4250 struct bmic_identify_physical_device *id_phys; 4251 bool is_spare = false; 4252 int rc; 4253 4254 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4255 if (!id_phys) 4256 return false; 4257 4258 rc = hpsa_bmic_id_physical_device(h, 4259 lunaddrbytes, 4260 GET_BMIC_DRIVE_NUMBER(lunaddrbytes), 4261 id_phys, sizeof(*id_phys)); 4262 if (rc == 0) 4263 is_spare = (id_phys->more_flags >> 6) & 0x01; 4264 4265 kfree(id_phys); 4266 return is_spare; 4267 } 4268 4269 #define RPL_DEV_FLAG_NON_DISK 0x1 4270 #define RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED 0x2 4271 #define RPL_DEV_FLAG_UNCONFIG_DISK 0x4 4272 4273 #define BMIC_DEVICE_TYPE_ENCLOSURE 6 4274 4275 static bool hpsa_skip_device(struct ctlr_info *h, u8 *lunaddrbytes, 4276 struct ext_report_lun_entry *rle) 4277 { 4278 u8 device_flags; 4279 u8 device_type; 4280 4281 if (!MASKED_DEVICE(lunaddrbytes)) 4282 return false; 4283 4284 device_flags = rle->device_flags; 4285 device_type = rle->device_type; 4286 4287 if (device_flags & RPL_DEV_FLAG_NON_DISK) { 4288 if (device_type == BMIC_DEVICE_TYPE_ENCLOSURE) 4289 return false; 4290 return true; 4291 } 4292 4293 if (!(device_flags & RPL_DEV_FLAG_UNCONFIG_DISK_REPORTING_SUPPORTED)) 4294 return false; 4295 4296 if (device_flags & RPL_DEV_FLAG_UNCONFIG_DISK) 4297 return false; 4298 4299 /* 4300 * Spares may be spun down, we do not want to 4301 * do an Inquiry to a RAID set spare drive as 4302 * that would have them spun up, that is a 4303 * performance hit because I/O to the RAID device 4304 * stops while the spin up occurs which can take 4305 * over 50 seconds. 4306 */ 4307 if (hpsa_is_disk_spare(h, lunaddrbytes)) 4308 return true; 4309 4310 return false; 4311 } 4312 4313 static void hpsa_update_scsi_devices(struct ctlr_info *h) 4314 { 4315 /* the idea here is we could get notified 4316 * that some devices have changed, so we do a report 4317 * physical luns and report logical luns cmd, and adjust 4318 * our list of devices accordingly. 4319 * 4320 * The scsi3addr's of devices won't change so long as the 4321 * adapter is not reset. That means we can rescan and 4322 * tell which devices we already know about, vs. new 4323 * devices, vs. disappearing devices. 4324 */ 4325 struct ReportExtendedLUNdata *physdev_list = NULL; 4326 struct ReportLUNdata *logdev_list = NULL; 4327 struct bmic_identify_physical_device *id_phys = NULL; 4328 struct bmic_identify_controller *id_ctlr = NULL; 4329 u32 nphysicals = 0; 4330 u32 nlogicals = 0; 4331 u32 nlocal_logicals = 0; 4332 u32 ndev_allocated = 0; 4333 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 4334 int ncurrent = 0; 4335 int i, n_ext_target_devs, ndevs_to_allocate; 4336 int raid_ctlr_position; 4337 bool physical_device; 4338 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 4339 4340 currentsd = kcalloc(HPSA_MAX_DEVICES, sizeof(*currentsd), GFP_KERNEL); 4341 physdev_list = kzalloc(sizeof(*physdev_list), GFP_KERNEL); 4342 logdev_list = kzalloc(sizeof(*logdev_list), GFP_KERNEL); 4343 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 4344 id_phys = kzalloc(sizeof(*id_phys), GFP_KERNEL); 4345 id_ctlr = kzalloc(sizeof(*id_ctlr), GFP_KERNEL); 4346 4347 if (!currentsd || !physdev_list || !logdev_list || 4348 !tmpdevice || !id_phys || !id_ctlr) { 4349 dev_err(&h->pdev->dev, "out of memory\n"); 4350 goto out; 4351 } 4352 memset(lunzerobits, 0, sizeof(lunzerobits)); 4353 4354 h->drv_req_rescan = 0; /* cancel scheduled rescan - we're doing it. */ 4355 4356 if (hpsa_gather_lun_info(h, physdev_list, &nphysicals, 4357 logdev_list, &nlogicals)) { 4358 h->drv_req_rescan = 1; 4359 goto out; 4360 } 4361 4362 /* Set number of local logicals (non PTRAID) */ 4363 if (hpsa_set_local_logical_count(h, id_ctlr, &nlocal_logicals)) { 4364 dev_warn(&h->pdev->dev, 4365 "%s: Can't determine number of local logical devices.\n", 4366 __func__); 4367 } 4368 4369 /* We might see up to the maximum number of logical and physical disks 4370 * plus external target devices, and a device for the local RAID 4371 * controller. 4372 */ 4373 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 4374 4375 hpsa_ext_ctrl_present(h, physdev_list); 4376 4377 /* Allocate the per device structures */ 4378 for (i = 0; i < ndevs_to_allocate; i++) { 4379 if (i >= HPSA_MAX_DEVICES) { 4380 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 4381 " %d devices ignored.\n", HPSA_MAX_DEVICES, 4382 ndevs_to_allocate - HPSA_MAX_DEVICES); 4383 break; 4384 } 4385 4386 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 4387 if (!currentsd[i]) { 4388 h->drv_req_rescan = 1; 4389 goto out; 4390 } 4391 ndev_allocated++; 4392 } 4393 4394 if (is_scsi_rev_5(h)) 4395 raid_ctlr_position = 0; 4396 else 4397 raid_ctlr_position = nphysicals + nlogicals; 4398 4399 /* adjust our table of devices */ 4400 n_ext_target_devs = 0; 4401 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 4402 u8 *lunaddrbytes, is_OBDR = 0; 4403 int rc = 0; 4404 int phys_dev_index = i - (raid_ctlr_position == 0); 4405 bool skip_device = false; 4406 4407 memset(tmpdevice, 0, sizeof(*tmpdevice)); 4408 4409 physical_device = i < nphysicals + (raid_ctlr_position == 0); 4410 4411 /* Figure out where the LUN ID info is coming from */ 4412 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 4413 i, nphysicals, nlogicals, physdev_list, logdev_list); 4414 4415 /* Determine if this is a lun from an external target array */ 4416 tmpdevice->external = 4417 figure_external_status(h, raid_ctlr_position, i, 4418 nphysicals, nlocal_logicals); 4419 4420 /* 4421 * Skip over some devices such as a spare. 4422 */ 4423 if (!tmpdevice->external && physical_device) { 4424 skip_device = hpsa_skip_device(h, lunaddrbytes, 4425 &physdev_list->LUN[phys_dev_index]); 4426 if (skip_device) 4427 continue; 4428 } 4429 4430 /* Get device type, vendor, model, device id, raid_map */ 4431 rc = hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 4432 &is_OBDR); 4433 if (rc == -ENOMEM) { 4434 dev_warn(&h->pdev->dev, 4435 "Out of memory, rescan deferred.\n"); 4436 h->drv_req_rescan = 1; 4437 goto out; 4438 } 4439 if (rc) { 4440 h->drv_req_rescan = 1; 4441 continue; 4442 } 4443 4444 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 4445 this_device = currentsd[ncurrent]; 4446 4447 *this_device = *tmpdevice; 4448 this_device->physical_device = physical_device; 4449 4450 /* 4451 * Expose all devices except for physical devices that 4452 * are masked. 4453 */ 4454 if (MASKED_DEVICE(lunaddrbytes) && this_device->physical_device) 4455 this_device->expose_device = 0; 4456 else 4457 this_device->expose_device = 1; 4458 4459 4460 /* 4461 * Get the SAS address for physical devices that are exposed. 4462 */ 4463 if (this_device->physical_device && this_device->expose_device) 4464 hpsa_get_sas_address(h, lunaddrbytes, this_device); 4465 4466 switch (this_device->devtype) { 4467 case TYPE_ROM: 4468 /* We don't *really* support actual CD-ROM devices, 4469 * just "One Button Disaster Recovery" tape drive 4470 * which temporarily pretends to be a CD-ROM drive. 4471 * So we check that the device is really an OBDR tape 4472 * device by checking for "$DR-10" in bytes 43-48 of 4473 * the inquiry data. 4474 */ 4475 if (is_OBDR) 4476 ncurrent++; 4477 break; 4478 case TYPE_DISK: 4479 case TYPE_ZBC: 4480 if (this_device->physical_device) { 4481 /* The disk is in HBA mode. */ 4482 /* Never use RAID mapper in HBA mode. */ 4483 this_device->offload_enabled = 0; 4484 hpsa_get_ioaccel_drive_info(h, this_device, 4485 physdev_list, phys_dev_index, id_phys); 4486 hpsa_get_path_info(this_device, 4487 physdev_list, phys_dev_index, id_phys); 4488 } 4489 ncurrent++; 4490 break; 4491 case TYPE_TAPE: 4492 case TYPE_MEDIUM_CHANGER: 4493 ncurrent++; 4494 break; 4495 case TYPE_ENCLOSURE: 4496 if (!this_device->external) 4497 hpsa_get_enclosure_info(h, lunaddrbytes, 4498 physdev_list, phys_dev_index, 4499 this_device); 4500 ncurrent++; 4501 break; 4502 case TYPE_RAID: 4503 /* Only present the Smartarray HBA as a RAID controller. 4504 * If it's a RAID controller other than the HBA itself 4505 * (an external RAID controller, MSA500 or similar) 4506 * don't present it. 4507 */ 4508 if (!is_hba_lunid(lunaddrbytes)) 4509 break; 4510 ncurrent++; 4511 break; 4512 default: 4513 break; 4514 } 4515 if (ncurrent >= HPSA_MAX_DEVICES) 4516 break; 4517 } 4518 4519 if (h->sas_host == NULL) { 4520 int rc = 0; 4521 4522 rc = hpsa_add_sas_host(h); 4523 if (rc) { 4524 dev_warn(&h->pdev->dev, 4525 "Could not add sas host %d\n", rc); 4526 goto out; 4527 } 4528 } 4529 4530 adjust_hpsa_scsi_table(h, currentsd, ncurrent); 4531 out: 4532 kfree(tmpdevice); 4533 for (i = 0; i < ndev_allocated; i++) 4534 kfree(currentsd[i]); 4535 kfree(currentsd); 4536 kfree(physdev_list); 4537 kfree(logdev_list); 4538 kfree(id_ctlr); 4539 kfree(id_phys); 4540 } 4541 4542 static void hpsa_set_sg_descriptor(struct SGDescriptor *desc, 4543 struct scatterlist *sg) 4544 { 4545 u64 addr64 = (u64) sg_dma_address(sg); 4546 unsigned int len = sg_dma_len(sg); 4547 4548 desc->Addr = cpu_to_le64(addr64); 4549 desc->Len = cpu_to_le32(len); 4550 desc->Ext = 0; 4551 } 4552 4553 /* 4554 * hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 4555 * dma mapping and fills in the scatter gather entries of the 4556 * hpsa command, cp. 4557 */ 4558 static int hpsa_scatter_gather(struct ctlr_info *h, 4559 struct CommandList *cp, 4560 struct scsi_cmnd *cmd) 4561 { 4562 struct scatterlist *sg; 4563 int use_sg, i, sg_limit, chained, last_sg; 4564 struct SGDescriptor *curr_sg; 4565 4566 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4567 4568 use_sg = scsi_dma_map(cmd); 4569 if (use_sg < 0) 4570 return use_sg; 4571 4572 if (!use_sg) 4573 goto sglist_finished; 4574 4575 /* 4576 * If the number of entries is greater than the max for a single list, 4577 * then we have a chained list; we will set up all but one entry in the 4578 * first list (the last entry is saved for link information); 4579 * otherwise, we don't have a chained list and we'll set up at each of 4580 * the entries in the one list. 4581 */ 4582 curr_sg = cp->SG; 4583 chained = use_sg > h->max_cmd_sg_entries; 4584 sg_limit = chained ? h->max_cmd_sg_entries - 1 : use_sg; 4585 last_sg = scsi_sg_count(cmd) - 1; 4586 scsi_for_each_sg(cmd, sg, sg_limit, i) { 4587 hpsa_set_sg_descriptor(curr_sg, sg); 4588 curr_sg++; 4589 } 4590 4591 if (chained) { 4592 /* 4593 * Continue with the chained list. Set curr_sg to the chained 4594 * list. Modify the limit to the total count less the entries 4595 * we've already set up. Resume the scan at the list entry 4596 * where the previous loop left off. 4597 */ 4598 curr_sg = h->cmd_sg_list[cp->cmdindex]; 4599 sg_limit = use_sg - sg_limit; 4600 for_each_sg(sg, sg, sg_limit, i) { 4601 hpsa_set_sg_descriptor(curr_sg, sg); 4602 curr_sg++; 4603 } 4604 } 4605 4606 /* Back the pointer up to the last entry and mark it as "last". */ 4607 (curr_sg - 1)->Ext = cpu_to_le32(HPSA_SG_LAST); 4608 4609 if (use_sg + chained > h->maxSG) 4610 h->maxSG = use_sg + chained; 4611 4612 if (chained) { 4613 cp->Header.SGList = h->max_cmd_sg_entries; 4614 cp->Header.SGTotal = cpu_to_le16(use_sg + 1); 4615 if (hpsa_map_sg_chain_block(h, cp)) { 4616 scsi_dma_unmap(cmd); 4617 return -1; 4618 } 4619 return 0; 4620 } 4621 4622 sglist_finished: 4623 4624 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 4625 cp->Header.SGTotal = cpu_to_le16(use_sg); /* total sgs in cmd list */ 4626 return 0; 4627 } 4628 4629 static inline void warn_zero_length_transfer(struct ctlr_info *h, 4630 u8 *cdb, int cdb_len, 4631 const char *func) 4632 { 4633 dev_warn(&h->pdev->dev, 4634 "%s: Blocking zero-length request: CDB:%*phN\n", 4635 func, cdb_len, cdb); 4636 } 4637 4638 #define IO_ACCEL_INELIGIBLE 1 4639 /* zero-length transfers trigger hardware errors. */ 4640 static bool is_zero_length_transfer(u8 *cdb) 4641 { 4642 u32 block_cnt; 4643 4644 /* Block zero-length transfer sizes on certain commands. */ 4645 switch (cdb[0]) { 4646 case READ_10: 4647 case WRITE_10: 4648 case VERIFY: /* 0x2F */ 4649 case WRITE_VERIFY: /* 0x2E */ 4650 block_cnt = get_unaligned_be16(&cdb[7]); 4651 break; 4652 case READ_12: 4653 case WRITE_12: 4654 case VERIFY_12: /* 0xAF */ 4655 case WRITE_VERIFY_12: /* 0xAE */ 4656 block_cnt = get_unaligned_be32(&cdb[6]); 4657 break; 4658 case READ_16: 4659 case WRITE_16: 4660 case VERIFY_16: /* 0x8F */ 4661 block_cnt = get_unaligned_be32(&cdb[10]); 4662 break; 4663 default: 4664 return false; 4665 } 4666 4667 return block_cnt == 0; 4668 } 4669 4670 static int fixup_ioaccel_cdb(u8 *cdb, int *cdb_len) 4671 { 4672 int is_write = 0; 4673 u32 block; 4674 u32 block_cnt; 4675 4676 /* Perform some CDB fixups if needed using 10 byte reads/writes only */ 4677 switch (cdb[0]) { 4678 case WRITE_6: 4679 case WRITE_12: 4680 is_write = 1; 4681 /* fall through */ 4682 case READ_6: 4683 case READ_12: 4684 if (*cdb_len == 6) { 4685 block = (((cdb[1] & 0x1F) << 16) | 4686 (cdb[2] << 8) | 4687 cdb[3]); 4688 block_cnt = cdb[4]; 4689 if (block_cnt == 0) 4690 block_cnt = 256; 4691 } else { 4692 BUG_ON(*cdb_len != 12); 4693 block = get_unaligned_be32(&cdb[2]); 4694 block_cnt = get_unaligned_be32(&cdb[6]); 4695 } 4696 if (block_cnt > 0xffff) 4697 return IO_ACCEL_INELIGIBLE; 4698 4699 cdb[0] = is_write ? WRITE_10 : READ_10; 4700 cdb[1] = 0; 4701 cdb[2] = (u8) (block >> 24); 4702 cdb[3] = (u8) (block >> 16); 4703 cdb[4] = (u8) (block >> 8); 4704 cdb[5] = (u8) (block); 4705 cdb[6] = 0; 4706 cdb[7] = (u8) (block_cnt >> 8); 4707 cdb[8] = (u8) (block_cnt); 4708 cdb[9] = 0; 4709 *cdb_len = 10; 4710 break; 4711 } 4712 return 0; 4713 } 4714 4715 static int hpsa_scsi_ioaccel1_queue_command(struct ctlr_info *h, 4716 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4717 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4718 { 4719 struct scsi_cmnd *cmd = c->scsi_cmd; 4720 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[c->cmdindex]; 4721 unsigned int len; 4722 unsigned int total_len = 0; 4723 struct scatterlist *sg; 4724 u64 addr64; 4725 int use_sg, i; 4726 struct SGDescriptor *curr_sg; 4727 u32 control = IOACCEL1_CONTROL_SIMPLEQUEUE; 4728 4729 /* TODO: implement chaining support */ 4730 if (scsi_sg_count(cmd) > h->ioaccel_maxsg) { 4731 atomic_dec(&phys_disk->ioaccel_cmds_out); 4732 return IO_ACCEL_INELIGIBLE; 4733 } 4734 4735 BUG_ON(cmd->cmd_len > IOACCEL1_IOFLAGS_CDBLEN_MAX); 4736 4737 if (is_zero_length_transfer(cdb)) { 4738 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4739 atomic_dec(&phys_disk->ioaccel_cmds_out); 4740 return IO_ACCEL_INELIGIBLE; 4741 } 4742 4743 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4744 atomic_dec(&phys_disk->ioaccel_cmds_out); 4745 return IO_ACCEL_INELIGIBLE; 4746 } 4747 4748 c->cmd_type = CMD_IOACCEL1; 4749 4750 /* Adjust the DMA address to point to the accelerated command buffer */ 4751 c->busaddr = (u32) h->ioaccel_cmd_pool_dhandle + 4752 (c->cmdindex * sizeof(*cp)); 4753 BUG_ON(c->busaddr & 0x0000007F); 4754 4755 use_sg = scsi_dma_map(cmd); 4756 if (use_sg < 0) { 4757 atomic_dec(&phys_disk->ioaccel_cmds_out); 4758 return use_sg; 4759 } 4760 4761 if (use_sg) { 4762 curr_sg = cp->SG; 4763 scsi_for_each_sg(cmd, sg, use_sg, i) { 4764 addr64 = (u64) sg_dma_address(sg); 4765 len = sg_dma_len(sg); 4766 total_len += len; 4767 curr_sg->Addr = cpu_to_le64(addr64); 4768 curr_sg->Len = cpu_to_le32(len); 4769 curr_sg->Ext = cpu_to_le32(0); 4770 curr_sg++; 4771 } 4772 (--curr_sg)->Ext = cpu_to_le32(HPSA_SG_LAST); 4773 4774 switch (cmd->sc_data_direction) { 4775 case DMA_TO_DEVICE: 4776 control |= IOACCEL1_CONTROL_DATA_OUT; 4777 break; 4778 case DMA_FROM_DEVICE: 4779 control |= IOACCEL1_CONTROL_DATA_IN; 4780 break; 4781 case DMA_NONE: 4782 control |= IOACCEL1_CONTROL_NODATAXFER; 4783 break; 4784 default: 4785 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4786 cmd->sc_data_direction); 4787 BUG(); 4788 break; 4789 } 4790 } else { 4791 control |= IOACCEL1_CONTROL_NODATAXFER; 4792 } 4793 4794 c->Header.SGList = use_sg; 4795 /* Fill out the command structure to submit */ 4796 cp->dev_handle = cpu_to_le16(ioaccel_handle & 0xFFFF); 4797 cp->transfer_len = cpu_to_le32(total_len); 4798 cp->io_flags = cpu_to_le16(IOACCEL1_IOFLAGS_IO_REQ | 4799 (cdb_len & IOACCEL1_IOFLAGS_CDBLEN_MASK)); 4800 cp->control = cpu_to_le32(control); 4801 memcpy(cp->CDB, cdb, cdb_len); 4802 memcpy(cp->CISS_LUN, scsi3addr, 8); 4803 /* Tag was already set at init time. */ 4804 enqueue_cmd_and_start_io(h, c); 4805 return 0; 4806 } 4807 4808 /* 4809 * Queue a command directly to a device behind the controller using the 4810 * I/O accelerator path. 4811 */ 4812 static int hpsa_scsi_ioaccel_direct_map(struct ctlr_info *h, 4813 struct CommandList *c) 4814 { 4815 struct scsi_cmnd *cmd = c->scsi_cmd; 4816 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4817 4818 if (!dev) 4819 return -1; 4820 4821 c->phys_disk = dev; 4822 4823 if (dev->in_reset) 4824 return -1; 4825 4826 return hpsa_scsi_ioaccel_queue_command(h, c, dev->ioaccel_handle, 4827 cmd->cmnd, cmd->cmd_len, dev->scsi3addr, dev); 4828 } 4829 4830 /* 4831 * Set encryption parameters for the ioaccel2 request 4832 */ 4833 static void set_encrypt_ioaccel2(struct ctlr_info *h, 4834 struct CommandList *c, struct io_accel2_cmd *cp) 4835 { 4836 struct scsi_cmnd *cmd = c->scsi_cmd; 4837 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 4838 struct raid_map_data *map = &dev->raid_map; 4839 u64 first_block; 4840 4841 /* Are we doing encryption on this device */ 4842 if (!(le16_to_cpu(map->flags) & RAID_MAP_FLAG_ENCRYPT_ON)) 4843 return; 4844 /* Set the data encryption key index. */ 4845 cp->dekindex = map->dekindex; 4846 4847 /* Set the encryption enable flag, encoded into direction field. */ 4848 cp->direction |= IOACCEL2_DIRECTION_ENCRYPT_MASK; 4849 4850 /* Set encryption tweak values based on logical block address 4851 * If block size is 512, tweak value is LBA. 4852 * For other block sizes, tweak is (LBA * block size)/ 512) 4853 */ 4854 switch (cmd->cmnd[0]) { 4855 /* Required? 6-byte cdbs eliminated by fixup_ioaccel_cdb */ 4856 case READ_6: 4857 case WRITE_6: 4858 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 4859 (cmd->cmnd[2] << 8) | 4860 cmd->cmnd[3]); 4861 break; 4862 case WRITE_10: 4863 case READ_10: 4864 /* Required? 12-byte cdbs eliminated by fixup_ioaccel_cdb */ 4865 case WRITE_12: 4866 case READ_12: 4867 first_block = get_unaligned_be32(&cmd->cmnd[2]); 4868 break; 4869 case WRITE_16: 4870 case READ_16: 4871 first_block = get_unaligned_be64(&cmd->cmnd[2]); 4872 break; 4873 default: 4874 dev_err(&h->pdev->dev, 4875 "ERROR: %s: size (0x%x) not supported for encryption\n", 4876 __func__, cmd->cmnd[0]); 4877 BUG(); 4878 break; 4879 } 4880 4881 if (le32_to_cpu(map->volume_blk_size) != 512) 4882 first_block = first_block * 4883 le32_to_cpu(map->volume_blk_size)/512; 4884 4885 cp->tweak_lower = cpu_to_le32(first_block); 4886 cp->tweak_upper = cpu_to_le32(first_block >> 32); 4887 } 4888 4889 static int hpsa_scsi_ioaccel2_queue_command(struct ctlr_info *h, 4890 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 4891 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 4892 { 4893 struct scsi_cmnd *cmd = c->scsi_cmd; 4894 struct io_accel2_cmd *cp = &h->ioaccel2_cmd_pool[c->cmdindex]; 4895 struct ioaccel2_sg_element *curr_sg; 4896 int use_sg, i; 4897 struct scatterlist *sg; 4898 u64 addr64; 4899 u32 len; 4900 u32 total_len = 0; 4901 4902 if (!cmd->device) 4903 return -1; 4904 4905 if (!cmd->device->hostdata) 4906 return -1; 4907 4908 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 4909 4910 if (is_zero_length_transfer(cdb)) { 4911 warn_zero_length_transfer(h, cdb, cdb_len, __func__); 4912 atomic_dec(&phys_disk->ioaccel_cmds_out); 4913 return IO_ACCEL_INELIGIBLE; 4914 } 4915 4916 if (fixup_ioaccel_cdb(cdb, &cdb_len)) { 4917 atomic_dec(&phys_disk->ioaccel_cmds_out); 4918 return IO_ACCEL_INELIGIBLE; 4919 } 4920 4921 c->cmd_type = CMD_IOACCEL2; 4922 /* Adjust the DMA address to point to the accelerated command buffer */ 4923 c->busaddr = (u32) h->ioaccel2_cmd_pool_dhandle + 4924 (c->cmdindex * sizeof(*cp)); 4925 BUG_ON(c->busaddr & 0x0000007F); 4926 4927 memset(cp, 0, sizeof(*cp)); 4928 cp->IU_type = IOACCEL2_IU_TYPE; 4929 4930 use_sg = scsi_dma_map(cmd); 4931 if (use_sg < 0) { 4932 atomic_dec(&phys_disk->ioaccel_cmds_out); 4933 return use_sg; 4934 } 4935 4936 if (use_sg) { 4937 curr_sg = cp->sg; 4938 if (use_sg > h->ioaccel_maxsg) { 4939 addr64 = le64_to_cpu( 4940 h->ioaccel2_cmd_sg_list[c->cmdindex]->address); 4941 curr_sg->address = cpu_to_le64(addr64); 4942 curr_sg->length = 0; 4943 curr_sg->reserved[0] = 0; 4944 curr_sg->reserved[1] = 0; 4945 curr_sg->reserved[2] = 0; 4946 curr_sg->chain_indicator = IOACCEL2_CHAIN; 4947 4948 curr_sg = h->ioaccel2_cmd_sg_list[c->cmdindex]; 4949 } 4950 scsi_for_each_sg(cmd, sg, use_sg, i) { 4951 addr64 = (u64) sg_dma_address(sg); 4952 len = sg_dma_len(sg); 4953 total_len += len; 4954 curr_sg->address = cpu_to_le64(addr64); 4955 curr_sg->length = cpu_to_le32(len); 4956 curr_sg->reserved[0] = 0; 4957 curr_sg->reserved[1] = 0; 4958 curr_sg->reserved[2] = 0; 4959 curr_sg->chain_indicator = 0; 4960 curr_sg++; 4961 } 4962 4963 /* 4964 * Set the last s/g element bit 4965 */ 4966 (curr_sg - 1)->chain_indicator = IOACCEL2_LAST_SG; 4967 4968 switch (cmd->sc_data_direction) { 4969 case DMA_TO_DEVICE: 4970 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4971 cp->direction |= IOACCEL2_DIR_DATA_OUT; 4972 break; 4973 case DMA_FROM_DEVICE: 4974 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4975 cp->direction |= IOACCEL2_DIR_DATA_IN; 4976 break; 4977 case DMA_NONE: 4978 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4979 cp->direction |= IOACCEL2_DIR_NO_DATA; 4980 break; 4981 default: 4982 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 4983 cmd->sc_data_direction); 4984 BUG(); 4985 break; 4986 } 4987 } else { 4988 cp->direction &= ~IOACCEL2_DIRECTION_MASK; 4989 cp->direction |= IOACCEL2_DIR_NO_DATA; 4990 } 4991 4992 /* Set encryption parameters, if necessary */ 4993 set_encrypt_ioaccel2(h, c, cp); 4994 4995 cp->scsi_nexus = cpu_to_le32(ioaccel_handle); 4996 cp->Tag = cpu_to_le32(c->cmdindex << DIRECT_LOOKUP_SHIFT); 4997 memcpy(cp->cdb, cdb, sizeof(cp->cdb)); 4998 4999 cp->data_len = cpu_to_le32(total_len); 5000 cp->err_ptr = cpu_to_le64(c->busaddr + 5001 offsetof(struct io_accel2_cmd, error_data)); 5002 cp->err_len = cpu_to_le32(sizeof(cp->error_data)); 5003 5004 /* fill in sg elements */ 5005 if (use_sg > h->ioaccel_maxsg) { 5006 cp->sg_count = 1; 5007 cp->sg[0].length = cpu_to_le32(use_sg * sizeof(cp->sg[0])); 5008 if (hpsa_map_ioaccel2_sg_chain_block(h, cp, c)) { 5009 atomic_dec(&phys_disk->ioaccel_cmds_out); 5010 scsi_dma_unmap(cmd); 5011 return -1; 5012 } 5013 } else 5014 cp->sg_count = (u8) use_sg; 5015 5016 if (phys_disk->in_reset) { 5017 cmd->result = DID_RESET << 16; 5018 return -1; 5019 } 5020 5021 enqueue_cmd_and_start_io(h, c); 5022 return 0; 5023 } 5024 5025 /* 5026 * Queue a command to the correct I/O accelerator path. 5027 */ 5028 static int hpsa_scsi_ioaccel_queue_command(struct ctlr_info *h, 5029 struct CommandList *c, u32 ioaccel_handle, u8 *cdb, int cdb_len, 5030 u8 *scsi3addr, struct hpsa_scsi_dev_t *phys_disk) 5031 { 5032 if (!c->scsi_cmd->device) 5033 return -1; 5034 5035 if (!c->scsi_cmd->device->hostdata) 5036 return -1; 5037 5038 if (phys_disk->in_reset) 5039 return -1; 5040 5041 /* Try to honor the device's queue depth */ 5042 if (atomic_inc_return(&phys_disk->ioaccel_cmds_out) > 5043 phys_disk->queue_depth) { 5044 atomic_dec(&phys_disk->ioaccel_cmds_out); 5045 return IO_ACCEL_INELIGIBLE; 5046 } 5047 if (h->transMethod & CFGTBL_Trans_io_accel1) 5048 return hpsa_scsi_ioaccel1_queue_command(h, c, ioaccel_handle, 5049 cdb, cdb_len, scsi3addr, 5050 phys_disk); 5051 else 5052 return hpsa_scsi_ioaccel2_queue_command(h, c, ioaccel_handle, 5053 cdb, cdb_len, scsi3addr, 5054 phys_disk); 5055 } 5056 5057 static void raid_map_helper(struct raid_map_data *map, 5058 int offload_to_mirror, u32 *map_index, u32 *current_group) 5059 { 5060 if (offload_to_mirror == 0) { 5061 /* use physical disk in the first mirrored group. */ 5062 *map_index %= le16_to_cpu(map->data_disks_per_row); 5063 return; 5064 } 5065 do { 5066 /* determine mirror group that *map_index indicates */ 5067 *current_group = *map_index / 5068 le16_to_cpu(map->data_disks_per_row); 5069 if (offload_to_mirror == *current_group) 5070 continue; 5071 if (*current_group < le16_to_cpu(map->layout_map_count) - 1) { 5072 /* select map index from next group */ 5073 *map_index += le16_to_cpu(map->data_disks_per_row); 5074 (*current_group)++; 5075 } else { 5076 /* select map index from first group */ 5077 *map_index %= le16_to_cpu(map->data_disks_per_row); 5078 *current_group = 0; 5079 } 5080 } while (offload_to_mirror != *current_group); 5081 } 5082 5083 /* 5084 * Attempt to perform offload RAID mapping for a logical volume I/O. 5085 */ 5086 static int hpsa_scsi_ioaccel_raid_map(struct ctlr_info *h, 5087 struct CommandList *c) 5088 { 5089 struct scsi_cmnd *cmd = c->scsi_cmd; 5090 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5091 struct raid_map_data *map = &dev->raid_map; 5092 struct raid_map_disk_data *dd = &map->data[0]; 5093 int is_write = 0; 5094 u32 map_index; 5095 u64 first_block, last_block; 5096 u32 block_cnt; 5097 u32 blocks_per_row; 5098 u64 first_row, last_row; 5099 u32 first_row_offset, last_row_offset; 5100 u32 first_column, last_column; 5101 u64 r0_first_row, r0_last_row; 5102 u32 r5or6_blocks_per_row; 5103 u64 r5or6_first_row, r5or6_last_row; 5104 u32 r5or6_first_row_offset, r5or6_last_row_offset; 5105 u32 r5or6_first_column, r5or6_last_column; 5106 u32 total_disks_per_row; 5107 u32 stripesize; 5108 u32 first_group, last_group, current_group; 5109 u32 map_row; 5110 u32 disk_handle; 5111 u64 disk_block; 5112 u32 disk_block_cnt; 5113 u8 cdb[16]; 5114 u8 cdb_len; 5115 u16 strip_size; 5116 #if BITS_PER_LONG == 32 5117 u64 tmpdiv; 5118 #endif 5119 int offload_to_mirror; 5120 5121 if (!dev) 5122 return -1; 5123 5124 if (dev->in_reset) 5125 return -1; 5126 5127 /* check for valid opcode, get LBA and block count */ 5128 switch (cmd->cmnd[0]) { 5129 case WRITE_6: 5130 is_write = 1; 5131 /* fall through */ 5132 case READ_6: 5133 first_block = (((cmd->cmnd[1] & 0x1F) << 16) | 5134 (cmd->cmnd[2] << 8) | 5135 cmd->cmnd[3]); 5136 block_cnt = cmd->cmnd[4]; 5137 if (block_cnt == 0) 5138 block_cnt = 256; 5139 break; 5140 case WRITE_10: 5141 is_write = 1; 5142 /* fall through */ 5143 case READ_10: 5144 first_block = 5145 (((u64) cmd->cmnd[2]) << 24) | 5146 (((u64) cmd->cmnd[3]) << 16) | 5147 (((u64) cmd->cmnd[4]) << 8) | 5148 cmd->cmnd[5]; 5149 block_cnt = 5150 (((u32) cmd->cmnd[7]) << 8) | 5151 cmd->cmnd[8]; 5152 break; 5153 case WRITE_12: 5154 is_write = 1; 5155 /* fall through */ 5156 case READ_12: 5157 first_block = 5158 (((u64) cmd->cmnd[2]) << 24) | 5159 (((u64) cmd->cmnd[3]) << 16) | 5160 (((u64) cmd->cmnd[4]) << 8) | 5161 cmd->cmnd[5]; 5162 block_cnt = 5163 (((u32) cmd->cmnd[6]) << 24) | 5164 (((u32) cmd->cmnd[7]) << 16) | 5165 (((u32) cmd->cmnd[8]) << 8) | 5166 cmd->cmnd[9]; 5167 break; 5168 case WRITE_16: 5169 is_write = 1; 5170 /* fall through */ 5171 case READ_16: 5172 first_block = 5173 (((u64) cmd->cmnd[2]) << 56) | 5174 (((u64) cmd->cmnd[3]) << 48) | 5175 (((u64) cmd->cmnd[4]) << 40) | 5176 (((u64) cmd->cmnd[5]) << 32) | 5177 (((u64) cmd->cmnd[6]) << 24) | 5178 (((u64) cmd->cmnd[7]) << 16) | 5179 (((u64) cmd->cmnd[8]) << 8) | 5180 cmd->cmnd[9]; 5181 block_cnt = 5182 (((u32) cmd->cmnd[10]) << 24) | 5183 (((u32) cmd->cmnd[11]) << 16) | 5184 (((u32) cmd->cmnd[12]) << 8) | 5185 cmd->cmnd[13]; 5186 break; 5187 default: 5188 return IO_ACCEL_INELIGIBLE; /* process via normal I/O path */ 5189 } 5190 last_block = first_block + block_cnt - 1; 5191 5192 /* check for write to non-RAID-0 */ 5193 if (is_write && dev->raid_level != 0) 5194 return IO_ACCEL_INELIGIBLE; 5195 5196 /* check for invalid block or wraparound */ 5197 if (last_block >= le64_to_cpu(map->volume_blk_cnt) || 5198 last_block < first_block) 5199 return IO_ACCEL_INELIGIBLE; 5200 5201 /* calculate stripe information for the request */ 5202 blocks_per_row = le16_to_cpu(map->data_disks_per_row) * 5203 le16_to_cpu(map->strip_size); 5204 strip_size = le16_to_cpu(map->strip_size); 5205 #if BITS_PER_LONG == 32 5206 tmpdiv = first_block; 5207 (void) do_div(tmpdiv, blocks_per_row); 5208 first_row = tmpdiv; 5209 tmpdiv = last_block; 5210 (void) do_div(tmpdiv, blocks_per_row); 5211 last_row = tmpdiv; 5212 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5213 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5214 tmpdiv = first_row_offset; 5215 (void) do_div(tmpdiv, strip_size); 5216 first_column = tmpdiv; 5217 tmpdiv = last_row_offset; 5218 (void) do_div(tmpdiv, strip_size); 5219 last_column = tmpdiv; 5220 #else 5221 first_row = first_block / blocks_per_row; 5222 last_row = last_block / blocks_per_row; 5223 first_row_offset = (u32) (first_block - (first_row * blocks_per_row)); 5224 last_row_offset = (u32) (last_block - (last_row * blocks_per_row)); 5225 first_column = first_row_offset / strip_size; 5226 last_column = last_row_offset / strip_size; 5227 #endif 5228 5229 /* if this isn't a single row/column then give to the controller */ 5230 if ((first_row != last_row) || (first_column != last_column)) 5231 return IO_ACCEL_INELIGIBLE; 5232 5233 /* proceeding with driver mapping */ 5234 total_disks_per_row = le16_to_cpu(map->data_disks_per_row) + 5235 le16_to_cpu(map->metadata_disks_per_row); 5236 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5237 le16_to_cpu(map->row_cnt); 5238 map_index = (map_row * total_disks_per_row) + first_column; 5239 5240 switch (dev->raid_level) { 5241 case HPSA_RAID_0: 5242 break; /* nothing special to do */ 5243 case HPSA_RAID_1: 5244 /* Handles load balance across RAID 1 members. 5245 * (2-drive R1 and R10 with even # of drives.) 5246 * Appropriate for SSDs, not optimal for HDDs 5247 * Ensure we have the correct raid_map. 5248 */ 5249 if (le16_to_cpu(map->layout_map_count) != 2) { 5250 hpsa_turn_off_ioaccel_for_device(dev); 5251 return IO_ACCEL_INELIGIBLE; 5252 } 5253 if (dev->offload_to_mirror) 5254 map_index += le16_to_cpu(map->data_disks_per_row); 5255 dev->offload_to_mirror = !dev->offload_to_mirror; 5256 break; 5257 case HPSA_RAID_ADM: 5258 /* Handles N-way mirrors (R1-ADM) 5259 * and R10 with # of drives divisible by 3.) 5260 * Ensure we have the correct raid_map. 5261 */ 5262 if (le16_to_cpu(map->layout_map_count) != 3) { 5263 hpsa_turn_off_ioaccel_for_device(dev); 5264 return IO_ACCEL_INELIGIBLE; 5265 } 5266 5267 offload_to_mirror = dev->offload_to_mirror; 5268 raid_map_helper(map, offload_to_mirror, 5269 &map_index, ¤t_group); 5270 /* set mirror group to use next time */ 5271 offload_to_mirror = 5272 (offload_to_mirror >= 5273 le16_to_cpu(map->layout_map_count) - 1) 5274 ? 0 : offload_to_mirror + 1; 5275 dev->offload_to_mirror = offload_to_mirror; 5276 /* Avoid direct use of dev->offload_to_mirror within this 5277 * function since multiple threads might simultaneously 5278 * increment it beyond the range of dev->layout_map_count -1. 5279 */ 5280 break; 5281 case HPSA_RAID_5: 5282 case HPSA_RAID_6: 5283 if (le16_to_cpu(map->layout_map_count) <= 1) 5284 break; 5285 5286 /* Verify first and last block are in same RAID group */ 5287 r5or6_blocks_per_row = 5288 le16_to_cpu(map->strip_size) * 5289 le16_to_cpu(map->data_disks_per_row); 5290 if (r5or6_blocks_per_row == 0) { 5291 hpsa_turn_off_ioaccel_for_device(dev); 5292 return IO_ACCEL_INELIGIBLE; 5293 } 5294 stripesize = r5or6_blocks_per_row * 5295 le16_to_cpu(map->layout_map_count); 5296 #if BITS_PER_LONG == 32 5297 tmpdiv = first_block; 5298 first_group = do_div(tmpdiv, stripesize); 5299 tmpdiv = first_group; 5300 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5301 first_group = tmpdiv; 5302 tmpdiv = last_block; 5303 last_group = do_div(tmpdiv, stripesize); 5304 tmpdiv = last_group; 5305 (void) do_div(tmpdiv, r5or6_blocks_per_row); 5306 last_group = tmpdiv; 5307 #else 5308 first_group = (first_block % stripesize) / r5or6_blocks_per_row; 5309 last_group = (last_block % stripesize) / r5or6_blocks_per_row; 5310 #endif 5311 if (first_group != last_group) 5312 return IO_ACCEL_INELIGIBLE; 5313 5314 /* Verify request is in a single row of RAID 5/6 */ 5315 #if BITS_PER_LONG == 32 5316 tmpdiv = first_block; 5317 (void) do_div(tmpdiv, stripesize); 5318 first_row = r5or6_first_row = r0_first_row = tmpdiv; 5319 tmpdiv = last_block; 5320 (void) do_div(tmpdiv, stripesize); 5321 r5or6_last_row = r0_last_row = tmpdiv; 5322 #else 5323 first_row = r5or6_first_row = r0_first_row = 5324 first_block / stripesize; 5325 r5or6_last_row = r0_last_row = last_block / stripesize; 5326 #endif 5327 if (r5or6_first_row != r5or6_last_row) 5328 return IO_ACCEL_INELIGIBLE; 5329 5330 5331 /* Verify request is in a single column */ 5332 #if BITS_PER_LONG == 32 5333 tmpdiv = first_block; 5334 first_row_offset = do_div(tmpdiv, stripesize); 5335 tmpdiv = first_row_offset; 5336 first_row_offset = (u32) do_div(tmpdiv, r5or6_blocks_per_row); 5337 r5or6_first_row_offset = first_row_offset; 5338 tmpdiv = last_block; 5339 r5or6_last_row_offset = do_div(tmpdiv, stripesize); 5340 tmpdiv = r5or6_last_row_offset; 5341 r5or6_last_row_offset = do_div(tmpdiv, r5or6_blocks_per_row); 5342 tmpdiv = r5or6_first_row_offset; 5343 (void) do_div(tmpdiv, map->strip_size); 5344 first_column = r5or6_first_column = tmpdiv; 5345 tmpdiv = r5or6_last_row_offset; 5346 (void) do_div(tmpdiv, map->strip_size); 5347 r5or6_last_column = tmpdiv; 5348 #else 5349 first_row_offset = r5or6_first_row_offset = 5350 (u32)((first_block % stripesize) % 5351 r5or6_blocks_per_row); 5352 5353 r5or6_last_row_offset = 5354 (u32)((last_block % stripesize) % 5355 r5or6_blocks_per_row); 5356 5357 first_column = r5or6_first_column = 5358 r5or6_first_row_offset / le16_to_cpu(map->strip_size); 5359 r5or6_last_column = 5360 r5or6_last_row_offset / le16_to_cpu(map->strip_size); 5361 #endif 5362 if (r5or6_first_column != r5or6_last_column) 5363 return IO_ACCEL_INELIGIBLE; 5364 5365 /* Request is eligible */ 5366 map_row = ((u32)(first_row >> map->parity_rotation_shift)) % 5367 le16_to_cpu(map->row_cnt); 5368 5369 map_index = (first_group * 5370 (le16_to_cpu(map->row_cnt) * total_disks_per_row)) + 5371 (map_row * total_disks_per_row) + first_column; 5372 break; 5373 default: 5374 return IO_ACCEL_INELIGIBLE; 5375 } 5376 5377 if (unlikely(map_index >= RAID_MAP_MAX_ENTRIES)) 5378 return IO_ACCEL_INELIGIBLE; 5379 5380 c->phys_disk = dev->phys_disk[map_index]; 5381 if (!c->phys_disk) 5382 return IO_ACCEL_INELIGIBLE; 5383 5384 disk_handle = dd[map_index].ioaccel_handle; 5385 disk_block = le64_to_cpu(map->disk_starting_blk) + 5386 first_row * le16_to_cpu(map->strip_size) + 5387 (first_row_offset - first_column * 5388 le16_to_cpu(map->strip_size)); 5389 disk_block_cnt = block_cnt; 5390 5391 /* handle differing logical/physical block sizes */ 5392 if (map->phys_blk_shift) { 5393 disk_block <<= map->phys_blk_shift; 5394 disk_block_cnt <<= map->phys_blk_shift; 5395 } 5396 BUG_ON(disk_block_cnt > 0xffff); 5397 5398 /* build the new CDB for the physical disk I/O */ 5399 if (disk_block > 0xffffffff) { 5400 cdb[0] = is_write ? WRITE_16 : READ_16; 5401 cdb[1] = 0; 5402 cdb[2] = (u8) (disk_block >> 56); 5403 cdb[3] = (u8) (disk_block >> 48); 5404 cdb[4] = (u8) (disk_block >> 40); 5405 cdb[5] = (u8) (disk_block >> 32); 5406 cdb[6] = (u8) (disk_block >> 24); 5407 cdb[7] = (u8) (disk_block >> 16); 5408 cdb[8] = (u8) (disk_block >> 8); 5409 cdb[9] = (u8) (disk_block); 5410 cdb[10] = (u8) (disk_block_cnt >> 24); 5411 cdb[11] = (u8) (disk_block_cnt >> 16); 5412 cdb[12] = (u8) (disk_block_cnt >> 8); 5413 cdb[13] = (u8) (disk_block_cnt); 5414 cdb[14] = 0; 5415 cdb[15] = 0; 5416 cdb_len = 16; 5417 } else { 5418 cdb[0] = is_write ? WRITE_10 : READ_10; 5419 cdb[1] = 0; 5420 cdb[2] = (u8) (disk_block >> 24); 5421 cdb[3] = (u8) (disk_block >> 16); 5422 cdb[4] = (u8) (disk_block >> 8); 5423 cdb[5] = (u8) (disk_block); 5424 cdb[6] = 0; 5425 cdb[7] = (u8) (disk_block_cnt >> 8); 5426 cdb[8] = (u8) (disk_block_cnt); 5427 cdb[9] = 0; 5428 cdb_len = 10; 5429 } 5430 return hpsa_scsi_ioaccel_queue_command(h, c, disk_handle, cdb, cdb_len, 5431 dev->scsi3addr, 5432 dev->phys_disk[map_index]); 5433 } 5434 5435 /* 5436 * Submit commands down the "normal" RAID stack path 5437 * All callers to hpsa_ciss_submit must check lockup_detected 5438 * beforehand, before (opt.) and after calling cmd_alloc 5439 */ 5440 static int hpsa_ciss_submit(struct ctlr_info *h, 5441 struct CommandList *c, struct scsi_cmnd *cmd, 5442 struct hpsa_scsi_dev_t *dev) 5443 { 5444 cmd->host_scribble = (unsigned char *) c; 5445 c->cmd_type = CMD_SCSI; 5446 c->scsi_cmd = cmd; 5447 c->Header.ReplyQueue = 0; /* unused in simple mode */ 5448 memcpy(&c->Header.LUN.LunAddrBytes[0], &dev->scsi3addr[0], 8); 5449 c->Header.tag = cpu_to_le64((c->cmdindex << DIRECT_LOOKUP_SHIFT)); 5450 5451 /* Fill in the request block... */ 5452 5453 c->Request.Timeout = 0; 5454 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 5455 c->Request.CDBLen = cmd->cmd_len; 5456 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 5457 switch (cmd->sc_data_direction) { 5458 case DMA_TO_DEVICE: 5459 c->Request.type_attr_dir = 5460 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_WRITE); 5461 break; 5462 case DMA_FROM_DEVICE: 5463 c->Request.type_attr_dir = 5464 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_READ); 5465 break; 5466 case DMA_NONE: 5467 c->Request.type_attr_dir = 5468 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_NONE); 5469 break; 5470 case DMA_BIDIRECTIONAL: 5471 /* This can happen if a buggy application does a scsi passthru 5472 * and sets both inlen and outlen to non-zero. ( see 5473 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 5474 */ 5475 5476 c->Request.type_attr_dir = 5477 TYPE_ATTR_DIR(TYPE_CMD, ATTR_SIMPLE, XFER_RSVD); 5478 /* This is technically wrong, and hpsa controllers should 5479 * reject it with CMD_INVALID, which is the most correct 5480 * response, but non-fibre backends appear to let it 5481 * slide by, and give the same results as if this field 5482 * were set correctly. Either way is acceptable for 5483 * our purposes here. 5484 */ 5485 5486 break; 5487 5488 default: 5489 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 5490 cmd->sc_data_direction); 5491 BUG(); 5492 break; 5493 } 5494 5495 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 5496 hpsa_cmd_resolve_and_free(h, c); 5497 return SCSI_MLQUEUE_HOST_BUSY; 5498 } 5499 5500 if (dev->in_reset) { 5501 hpsa_cmd_resolve_and_free(h, c); 5502 return SCSI_MLQUEUE_HOST_BUSY; 5503 } 5504 5505 c->device = dev; 5506 5507 enqueue_cmd_and_start_io(h, c); 5508 /* the cmd'll come back via intr handler in complete_scsi_command() */ 5509 return 0; 5510 } 5511 5512 static void hpsa_cmd_init(struct ctlr_info *h, int index, 5513 struct CommandList *c) 5514 { 5515 dma_addr_t cmd_dma_handle, err_dma_handle; 5516 5517 /* Zero out all of commandlist except the last field, refcount */ 5518 memset(c, 0, offsetof(struct CommandList, refcount)); 5519 c->Header.tag = cpu_to_le64((u64) (index << DIRECT_LOOKUP_SHIFT)); 5520 cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5521 c->err_info = h->errinfo_pool + index; 5522 memset(c->err_info, 0, sizeof(*c->err_info)); 5523 err_dma_handle = h->errinfo_pool_dhandle 5524 + index * sizeof(*c->err_info); 5525 c->cmdindex = index; 5526 c->busaddr = (u32) cmd_dma_handle; 5527 c->ErrDesc.Addr = cpu_to_le64((u64) err_dma_handle); 5528 c->ErrDesc.Len = cpu_to_le32((u32) sizeof(*c->err_info)); 5529 c->h = h; 5530 c->scsi_cmd = SCSI_CMD_IDLE; 5531 } 5532 5533 static void hpsa_preinitialize_commands(struct ctlr_info *h) 5534 { 5535 int i; 5536 5537 for (i = 0; i < h->nr_cmds; i++) { 5538 struct CommandList *c = h->cmd_pool + i; 5539 5540 hpsa_cmd_init(h, i, c); 5541 atomic_set(&c->refcount, 0); 5542 } 5543 } 5544 5545 static inline void hpsa_cmd_partial_init(struct ctlr_info *h, int index, 5546 struct CommandList *c) 5547 { 5548 dma_addr_t cmd_dma_handle = h->cmd_pool_dhandle + index * sizeof(*c); 5549 5550 BUG_ON(c->cmdindex != index); 5551 5552 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 5553 memset(c->err_info, 0, sizeof(*c->err_info)); 5554 c->busaddr = (u32) cmd_dma_handle; 5555 } 5556 5557 static int hpsa_ioaccel_submit(struct ctlr_info *h, 5558 struct CommandList *c, struct scsi_cmnd *cmd) 5559 { 5560 struct hpsa_scsi_dev_t *dev = cmd->device->hostdata; 5561 int rc = IO_ACCEL_INELIGIBLE; 5562 5563 if (!dev) 5564 return SCSI_MLQUEUE_HOST_BUSY; 5565 5566 if (dev->in_reset) 5567 return SCSI_MLQUEUE_HOST_BUSY; 5568 5569 if (hpsa_simple_mode) 5570 return IO_ACCEL_INELIGIBLE; 5571 5572 cmd->host_scribble = (unsigned char *) c; 5573 5574 if (dev->offload_enabled) { 5575 hpsa_cmd_init(h, c->cmdindex, c); 5576 c->cmd_type = CMD_SCSI; 5577 c->scsi_cmd = cmd; 5578 c->device = dev; 5579 rc = hpsa_scsi_ioaccel_raid_map(h, c); 5580 if (rc < 0) /* scsi_dma_map failed. */ 5581 rc = SCSI_MLQUEUE_HOST_BUSY; 5582 } else if (dev->hba_ioaccel_enabled) { 5583 hpsa_cmd_init(h, c->cmdindex, c); 5584 c->cmd_type = CMD_SCSI; 5585 c->scsi_cmd = cmd; 5586 c->device = dev; 5587 rc = hpsa_scsi_ioaccel_direct_map(h, c); 5588 if (rc < 0) /* scsi_dma_map failed. */ 5589 rc = SCSI_MLQUEUE_HOST_BUSY; 5590 } 5591 return rc; 5592 } 5593 5594 static void hpsa_command_resubmit_worker(struct work_struct *work) 5595 { 5596 struct scsi_cmnd *cmd; 5597 struct hpsa_scsi_dev_t *dev; 5598 struct CommandList *c = container_of(work, struct CommandList, work); 5599 5600 cmd = c->scsi_cmd; 5601 dev = cmd->device->hostdata; 5602 if (!dev) { 5603 cmd->result = DID_NO_CONNECT << 16; 5604 return hpsa_cmd_free_and_done(c->h, c, cmd); 5605 } 5606 5607 if (dev->in_reset) { 5608 cmd->result = DID_RESET << 16; 5609 return hpsa_cmd_free_and_done(c->h, c, cmd); 5610 } 5611 5612 if (c->cmd_type == CMD_IOACCEL2) { 5613 struct ctlr_info *h = c->h; 5614 struct io_accel2_cmd *c2 = &h->ioaccel2_cmd_pool[c->cmdindex]; 5615 int rc; 5616 5617 if (c2->error_data.serv_response == 5618 IOACCEL2_STATUS_SR_TASK_COMP_SET_FULL) { 5619 rc = hpsa_ioaccel_submit(h, c, cmd); 5620 if (rc == 0) 5621 return; 5622 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5623 /* 5624 * If we get here, it means dma mapping failed. 5625 * Try again via scsi mid layer, which will 5626 * then get SCSI_MLQUEUE_HOST_BUSY. 5627 */ 5628 cmd->result = DID_IMM_RETRY << 16; 5629 return hpsa_cmd_free_and_done(h, c, cmd); 5630 } 5631 /* else, fall thru and resubmit down CISS path */ 5632 } 5633 } 5634 hpsa_cmd_partial_init(c->h, c->cmdindex, c); 5635 if (hpsa_ciss_submit(c->h, c, cmd, dev)) { 5636 /* 5637 * If we get here, it means dma mapping failed. Try 5638 * again via scsi mid layer, which will then get 5639 * SCSI_MLQUEUE_HOST_BUSY. 5640 * 5641 * hpsa_ciss_submit will have already freed c 5642 * if it encountered a dma mapping failure. 5643 */ 5644 cmd->result = DID_IMM_RETRY << 16; 5645 cmd->scsi_done(cmd); 5646 } 5647 } 5648 5649 /* Running in struct Scsi_Host->host_lock less mode */ 5650 static int hpsa_scsi_queue_command(struct Scsi_Host *sh, struct scsi_cmnd *cmd) 5651 { 5652 struct ctlr_info *h; 5653 struct hpsa_scsi_dev_t *dev; 5654 struct CommandList *c; 5655 int rc = 0; 5656 5657 /* Get the ptr to our adapter structure out of cmd->host. */ 5658 h = sdev_to_hba(cmd->device); 5659 5660 BUG_ON(cmd->request->tag < 0); 5661 5662 dev = cmd->device->hostdata; 5663 if (!dev) { 5664 cmd->result = DID_NO_CONNECT << 16; 5665 cmd->scsi_done(cmd); 5666 return 0; 5667 } 5668 5669 if (dev->removed) { 5670 cmd->result = DID_NO_CONNECT << 16; 5671 cmd->scsi_done(cmd); 5672 return 0; 5673 } 5674 5675 if (unlikely(lockup_detected(h))) { 5676 cmd->result = DID_NO_CONNECT << 16; 5677 cmd->scsi_done(cmd); 5678 return 0; 5679 } 5680 5681 if (dev->in_reset) 5682 return SCSI_MLQUEUE_DEVICE_BUSY; 5683 5684 c = cmd_tagged_alloc(h, cmd); 5685 if (c == NULL) 5686 return SCSI_MLQUEUE_DEVICE_BUSY; 5687 5688 /* 5689 * This is necessary because the SML doesn't zero out this field during 5690 * error recovery. 5691 */ 5692 cmd->result = 0; 5693 5694 /* 5695 * Call alternate submit routine for I/O accelerated commands. 5696 * Retries always go down the normal I/O path. 5697 */ 5698 if (likely(cmd->retries == 0 && 5699 !blk_rq_is_passthrough(cmd->request) && 5700 h->acciopath_status)) { 5701 rc = hpsa_ioaccel_submit(h, c, cmd); 5702 if (rc == 0) 5703 return 0; 5704 if (rc == SCSI_MLQUEUE_HOST_BUSY) { 5705 hpsa_cmd_resolve_and_free(h, c); 5706 return SCSI_MLQUEUE_HOST_BUSY; 5707 } 5708 } 5709 return hpsa_ciss_submit(h, c, cmd, dev); 5710 } 5711 5712 static void hpsa_scan_complete(struct ctlr_info *h) 5713 { 5714 unsigned long flags; 5715 5716 spin_lock_irqsave(&h->scan_lock, flags); 5717 h->scan_finished = 1; 5718 wake_up(&h->scan_wait_queue); 5719 spin_unlock_irqrestore(&h->scan_lock, flags); 5720 } 5721 5722 static void hpsa_scan_start(struct Scsi_Host *sh) 5723 { 5724 struct ctlr_info *h = shost_to_hba(sh); 5725 unsigned long flags; 5726 5727 /* 5728 * Don't let rescans be initiated on a controller known to be locked 5729 * up. If the controller locks up *during* a rescan, that thread is 5730 * probably hosed, but at least we can prevent new rescan threads from 5731 * piling up on a locked up controller. 5732 */ 5733 if (unlikely(lockup_detected(h))) 5734 return hpsa_scan_complete(h); 5735 5736 /* 5737 * If a scan is already waiting to run, no need to add another 5738 */ 5739 spin_lock_irqsave(&h->scan_lock, flags); 5740 if (h->scan_waiting) { 5741 spin_unlock_irqrestore(&h->scan_lock, flags); 5742 return; 5743 } 5744 5745 spin_unlock_irqrestore(&h->scan_lock, flags); 5746 5747 /* wait until any scan already in progress is finished. */ 5748 while (1) { 5749 spin_lock_irqsave(&h->scan_lock, flags); 5750 if (h->scan_finished) 5751 break; 5752 h->scan_waiting = 1; 5753 spin_unlock_irqrestore(&h->scan_lock, flags); 5754 wait_event(h->scan_wait_queue, h->scan_finished); 5755 /* Note: We don't need to worry about a race between this 5756 * thread and driver unload because the midlayer will 5757 * have incremented the reference count, so unload won't 5758 * happen if we're in here. 5759 */ 5760 } 5761 h->scan_finished = 0; /* mark scan as in progress */ 5762 h->scan_waiting = 0; 5763 spin_unlock_irqrestore(&h->scan_lock, flags); 5764 5765 if (unlikely(lockup_detected(h))) 5766 return hpsa_scan_complete(h); 5767 5768 /* 5769 * Do the scan after a reset completion 5770 */ 5771 spin_lock_irqsave(&h->reset_lock, flags); 5772 if (h->reset_in_progress) { 5773 h->drv_req_rescan = 1; 5774 spin_unlock_irqrestore(&h->reset_lock, flags); 5775 hpsa_scan_complete(h); 5776 return; 5777 } 5778 spin_unlock_irqrestore(&h->reset_lock, flags); 5779 5780 hpsa_update_scsi_devices(h); 5781 5782 hpsa_scan_complete(h); 5783 } 5784 5785 static int hpsa_change_queue_depth(struct scsi_device *sdev, int qdepth) 5786 { 5787 struct hpsa_scsi_dev_t *logical_drive = sdev->hostdata; 5788 5789 if (!logical_drive) 5790 return -ENODEV; 5791 5792 if (qdepth < 1) 5793 qdepth = 1; 5794 else if (qdepth > logical_drive->queue_depth) 5795 qdepth = logical_drive->queue_depth; 5796 5797 return scsi_change_queue_depth(sdev, qdepth); 5798 } 5799 5800 static int hpsa_scan_finished(struct Scsi_Host *sh, 5801 unsigned long elapsed_time) 5802 { 5803 struct ctlr_info *h = shost_to_hba(sh); 5804 unsigned long flags; 5805 int finished; 5806 5807 spin_lock_irqsave(&h->scan_lock, flags); 5808 finished = h->scan_finished; 5809 spin_unlock_irqrestore(&h->scan_lock, flags); 5810 return finished; 5811 } 5812 5813 static int hpsa_scsi_host_alloc(struct ctlr_info *h) 5814 { 5815 struct Scsi_Host *sh; 5816 5817 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 5818 if (sh == NULL) { 5819 dev_err(&h->pdev->dev, "scsi_host_alloc failed\n"); 5820 return -ENOMEM; 5821 } 5822 5823 sh->io_port = 0; 5824 sh->n_io_port = 0; 5825 sh->this_id = -1; 5826 sh->max_channel = 3; 5827 sh->max_cmd_len = MAX_COMMAND_SIZE; 5828 sh->max_lun = HPSA_MAX_LUN; 5829 sh->max_id = HPSA_MAX_LUN; 5830 sh->can_queue = h->nr_cmds - HPSA_NRESERVED_CMDS; 5831 sh->cmd_per_lun = sh->can_queue; 5832 sh->sg_tablesize = h->maxsgentries; 5833 sh->transportt = hpsa_sas_transport_template; 5834 sh->hostdata[0] = (unsigned long) h; 5835 sh->irq = pci_irq_vector(h->pdev, 0); 5836 sh->unique_id = sh->irq; 5837 5838 h->scsi_host = sh; 5839 return 0; 5840 } 5841 5842 static int hpsa_scsi_add_host(struct ctlr_info *h) 5843 { 5844 int rv; 5845 5846 rv = scsi_add_host(h->scsi_host, &h->pdev->dev); 5847 if (rv) { 5848 dev_err(&h->pdev->dev, "scsi_add_host failed\n"); 5849 return rv; 5850 } 5851 scsi_scan_host(h->scsi_host); 5852 return 0; 5853 } 5854 5855 /* 5856 * The block layer has already gone to the trouble of picking out a unique, 5857 * small-integer tag for this request. We use an offset from that value as 5858 * an index to select our command block. (The offset allows us to reserve the 5859 * low-numbered entries for our own uses.) 5860 */ 5861 static int hpsa_get_cmd_index(struct scsi_cmnd *scmd) 5862 { 5863 int idx = scmd->request->tag; 5864 5865 if (idx < 0) 5866 return idx; 5867 5868 /* Offset to leave space for internal cmds. */ 5869 return idx += HPSA_NRESERVED_CMDS; 5870 } 5871 5872 /* 5873 * Send a TEST_UNIT_READY command to the specified LUN using the specified 5874 * reply queue; returns zero if the unit is ready, and non-zero otherwise. 5875 */ 5876 static int hpsa_send_test_unit_ready(struct ctlr_info *h, 5877 struct CommandList *c, unsigned char lunaddr[], 5878 int reply_queue) 5879 { 5880 int rc; 5881 5882 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 5883 (void) fill_cmd(c, TEST_UNIT_READY, h, 5884 NULL, 0, 0, lunaddr, TYPE_CMD); 5885 rc = hpsa_scsi_do_simple_cmd(h, c, reply_queue, NO_TIMEOUT); 5886 if (rc) 5887 return rc; 5888 /* no unmap needed here because no data xfer. */ 5889 5890 /* Check if the unit is already ready. */ 5891 if (c->err_info->CommandStatus == CMD_SUCCESS) 5892 return 0; 5893 5894 /* 5895 * The first command sent after reset will receive "unit attention" to 5896 * indicate that the LUN has been reset...this is actually what we're 5897 * looking for (but, success is good too). 5898 */ 5899 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 5900 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 5901 (c->err_info->SenseInfo[2] == NO_SENSE || 5902 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 5903 return 0; 5904 5905 return 1; 5906 } 5907 5908 /* 5909 * Wait for a TEST_UNIT_READY command to complete, retrying as necessary; 5910 * returns zero when the unit is ready, and non-zero when giving up. 5911 */ 5912 static int hpsa_wait_for_test_unit_ready(struct ctlr_info *h, 5913 struct CommandList *c, 5914 unsigned char lunaddr[], int reply_queue) 5915 { 5916 int rc; 5917 int count = 0; 5918 int waittime = 1; /* seconds */ 5919 5920 /* Send test unit ready until device ready, or give up. */ 5921 for (count = 0; count < HPSA_TUR_RETRY_LIMIT; count++) { 5922 5923 /* 5924 * Wait for a bit. do this first, because if we send 5925 * the TUR right away, the reset will just abort it. 5926 */ 5927 msleep(1000 * waittime); 5928 5929 rc = hpsa_send_test_unit_ready(h, c, lunaddr, reply_queue); 5930 if (!rc) 5931 break; 5932 5933 /* Increase wait time with each try, up to a point. */ 5934 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 5935 waittime *= 2; 5936 5937 dev_warn(&h->pdev->dev, 5938 "waiting %d secs for device to become ready.\n", 5939 waittime); 5940 } 5941 5942 return rc; 5943 } 5944 5945 static int wait_for_device_to_become_ready(struct ctlr_info *h, 5946 unsigned char lunaddr[], 5947 int reply_queue) 5948 { 5949 int first_queue; 5950 int last_queue; 5951 int rq; 5952 int rc = 0; 5953 struct CommandList *c; 5954 5955 c = cmd_alloc(h); 5956 5957 /* 5958 * If no specific reply queue was requested, then send the TUR 5959 * repeatedly, requesting a reply on each reply queue; otherwise execute 5960 * the loop exactly once using only the specified queue. 5961 */ 5962 if (reply_queue == DEFAULT_REPLY_QUEUE) { 5963 first_queue = 0; 5964 last_queue = h->nreply_queues - 1; 5965 } else { 5966 first_queue = reply_queue; 5967 last_queue = reply_queue; 5968 } 5969 5970 for (rq = first_queue; rq <= last_queue; rq++) { 5971 rc = hpsa_wait_for_test_unit_ready(h, c, lunaddr, rq); 5972 if (rc) 5973 break; 5974 } 5975 5976 if (rc) 5977 dev_warn(&h->pdev->dev, "giving up on device.\n"); 5978 else 5979 dev_warn(&h->pdev->dev, "device is ready.\n"); 5980 5981 cmd_free(h, c); 5982 return rc; 5983 } 5984 5985 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 5986 * complaining. Doing a host- or bus-reset can't do anything good here. 5987 */ 5988 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 5989 { 5990 int rc = SUCCESS; 5991 int i; 5992 struct ctlr_info *h; 5993 struct hpsa_scsi_dev_t *dev = NULL; 5994 u8 reset_type; 5995 char msg[48]; 5996 unsigned long flags; 5997 5998 /* find the controller to which the command to be aborted was sent */ 5999 h = sdev_to_hba(scsicmd->device); 6000 if (h == NULL) /* paranoia */ 6001 return FAILED; 6002 6003 spin_lock_irqsave(&h->reset_lock, flags); 6004 h->reset_in_progress = 1; 6005 spin_unlock_irqrestore(&h->reset_lock, flags); 6006 6007 if (lockup_detected(h)) { 6008 rc = FAILED; 6009 goto return_reset_status; 6010 } 6011 6012 dev = scsicmd->device->hostdata; 6013 if (!dev) { 6014 dev_err(&h->pdev->dev, "%s: device lookup failed\n", __func__); 6015 rc = FAILED; 6016 goto return_reset_status; 6017 } 6018 6019 if (dev->devtype == TYPE_ENCLOSURE) { 6020 rc = SUCCESS; 6021 goto return_reset_status; 6022 } 6023 6024 /* if controller locked up, we can guarantee command won't complete */ 6025 if (lockup_detected(h)) { 6026 snprintf(msg, sizeof(msg), 6027 "cmd %d RESET FAILED, lockup detected", 6028 hpsa_get_cmd_index(scsicmd)); 6029 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6030 rc = FAILED; 6031 goto return_reset_status; 6032 } 6033 6034 /* this reset request might be the result of a lockup; check */ 6035 if (detect_controller_lockup(h)) { 6036 snprintf(msg, sizeof(msg), 6037 "cmd %d RESET FAILED, new lockup detected", 6038 hpsa_get_cmd_index(scsicmd)); 6039 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6040 rc = FAILED; 6041 goto return_reset_status; 6042 } 6043 6044 /* Do not attempt on controller */ 6045 if (is_hba_lunid(dev->scsi3addr)) { 6046 rc = SUCCESS; 6047 goto return_reset_status; 6048 } 6049 6050 if (is_logical_dev_addr_mode(dev->scsi3addr)) 6051 reset_type = HPSA_DEVICE_RESET_MSG; 6052 else 6053 reset_type = HPSA_PHYS_TARGET_RESET; 6054 6055 sprintf(msg, "resetting %s", 6056 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical "); 6057 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6058 6059 /* 6060 * wait to see if any commands will complete before sending reset 6061 */ 6062 dev->in_reset = true; /* block any new cmds from OS for this device */ 6063 for (i = 0; i < 10; i++) { 6064 if (atomic_read(&dev->commands_outstanding) > 0) 6065 msleep(1000); 6066 else 6067 break; 6068 } 6069 6070 /* send a reset to the SCSI LUN which the command was sent to */ 6071 rc = hpsa_do_reset(h, dev, reset_type, DEFAULT_REPLY_QUEUE); 6072 if (rc == 0) 6073 rc = SUCCESS; 6074 else 6075 rc = FAILED; 6076 6077 sprintf(msg, "reset %s %s", 6078 reset_type == HPSA_DEVICE_RESET_MSG ? "logical " : "physical ", 6079 rc == SUCCESS ? "completed successfully" : "failed"); 6080 hpsa_show_dev_msg(KERN_WARNING, h, dev, msg); 6081 6082 return_reset_status: 6083 spin_lock_irqsave(&h->reset_lock, flags); 6084 h->reset_in_progress = 0; 6085 if (dev) 6086 dev->in_reset = false; 6087 spin_unlock_irqrestore(&h->reset_lock, flags); 6088 return rc; 6089 } 6090 6091 /* 6092 * For operations with an associated SCSI command, a command block is allocated 6093 * at init, and managed by cmd_tagged_alloc() and cmd_tagged_free() using the 6094 * block request tag as an index into a table of entries. cmd_tagged_free() is 6095 * the complement, although cmd_free() may be called instead. 6096 */ 6097 static struct CommandList *cmd_tagged_alloc(struct ctlr_info *h, 6098 struct scsi_cmnd *scmd) 6099 { 6100 int idx = hpsa_get_cmd_index(scmd); 6101 struct CommandList *c = h->cmd_pool + idx; 6102 6103 if (idx < HPSA_NRESERVED_CMDS || idx >= h->nr_cmds) { 6104 dev_err(&h->pdev->dev, "Bad block tag: %d not in [%d..%d]\n", 6105 idx, HPSA_NRESERVED_CMDS, h->nr_cmds - 1); 6106 /* The index value comes from the block layer, so if it's out of 6107 * bounds, it's probably not our bug. 6108 */ 6109 BUG(); 6110 } 6111 6112 if (unlikely(!hpsa_is_cmd_idle(c))) { 6113 /* 6114 * We expect that the SCSI layer will hand us a unique tag 6115 * value. Thus, there should never be a collision here between 6116 * two requests...because if the selected command isn't idle 6117 * then someone is going to be very disappointed. 6118 */ 6119 if (idx != h->last_collision_tag) { /* Print once per tag */ 6120 dev_warn(&h->pdev->dev, 6121 "%s: tag collision (tag=%d)\n", __func__, idx); 6122 if (scmd) 6123 scsi_print_command(scmd); 6124 h->last_collision_tag = idx; 6125 } 6126 return NULL; 6127 } 6128 6129 atomic_inc(&c->refcount); 6130 6131 hpsa_cmd_partial_init(h, idx, c); 6132 return c; 6133 } 6134 6135 static void cmd_tagged_free(struct ctlr_info *h, struct CommandList *c) 6136 { 6137 /* 6138 * Release our reference to the block. We don't need to do anything 6139 * else to free it, because it is accessed by index. 6140 */ 6141 (void)atomic_dec(&c->refcount); 6142 } 6143 6144 /* 6145 * For operations that cannot sleep, a command block is allocated at init, 6146 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 6147 * which ones are free or in use. Lock must be held when calling this. 6148 * cmd_free() is the complement. 6149 * This function never gives up and returns NULL. If it hangs, 6150 * another thread must call cmd_free() to free some tags. 6151 */ 6152 6153 static struct CommandList *cmd_alloc(struct ctlr_info *h) 6154 { 6155 struct CommandList *c; 6156 int refcount, i; 6157 int offset = 0; 6158 6159 /* 6160 * There is some *extremely* small but non-zero chance that that 6161 * multiple threads could get in here, and one thread could 6162 * be scanning through the list of bits looking for a free 6163 * one, but the free ones are always behind him, and other 6164 * threads sneak in behind him and eat them before he can 6165 * get to them, so that while there is always a free one, a 6166 * very unlucky thread might be starved anyway, never able to 6167 * beat the other threads. In reality, this happens so 6168 * infrequently as to be indistinguishable from never. 6169 * 6170 * Note that we start allocating commands before the SCSI host structure 6171 * is initialized. Since the search starts at bit zero, this 6172 * all works, since we have at least one command structure available; 6173 * however, it means that the structures with the low indexes have to be 6174 * reserved for driver-initiated requests, while requests from the block 6175 * layer will use the higher indexes. 6176 */ 6177 6178 for (;;) { 6179 i = find_next_zero_bit(h->cmd_pool_bits, 6180 HPSA_NRESERVED_CMDS, 6181 offset); 6182 if (unlikely(i >= HPSA_NRESERVED_CMDS)) { 6183 offset = 0; 6184 continue; 6185 } 6186 c = h->cmd_pool + i; 6187 refcount = atomic_inc_return(&c->refcount); 6188 if (unlikely(refcount > 1)) { 6189 cmd_free(h, c); /* already in use */ 6190 offset = (i + 1) % HPSA_NRESERVED_CMDS; 6191 continue; 6192 } 6193 set_bit(i & (BITS_PER_LONG - 1), 6194 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6195 break; /* it's ours now. */ 6196 } 6197 hpsa_cmd_partial_init(h, i, c); 6198 c->device = NULL; 6199 return c; 6200 } 6201 6202 /* 6203 * This is the complementary operation to cmd_alloc(). Note, however, in some 6204 * corner cases it may also be used to free blocks allocated by 6205 * cmd_tagged_alloc() in which case the ref-count decrement does the trick and 6206 * the clear-bit is harmless. 6207 */ 6208 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 6209 { 6210 if (atomic_dec_and_test(&c->refcount)) { 6211 int i; 6212 6213 i = c - h->cmd_pool; 6214 clear_bit(i & (BITS_PER_LONG - 1), 6215 h->cmd_pool_bits + (i / BITS_PER_LONG)); 6216 } 6217 } 6218 6219 #ifdef CONFIG_COMPAT 6220 6221 static int hpsa_ioctl32_passthru(struct scsi_device *dev, unsigned int cmd, 6222 void __user *arg) 6223 { 6224 struct ctlr_info *h = sdev_to_hba(dev); 6225 IOCTL32_Command_struct __user *arg32 = arg; 6226 IOCTL_Command_struct arg64; 6227 int err; 6228 u32 cp; 6229 6230 if (!arg) 6231 return -EINVAL; 6232 6233 memset(&arg64, 0, sizeof(arg64)); 6234 if (copy_from_user(&arg64, arg32, offsetof(IOCTL_Command_struct, buf))) 6235 return -EFAULT; 6236 if (get_user(cp, &arg32->buf)) 6237 return -EFAULT; 6238 arg64.buf = compat_ptr(cp); 6239 6240 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6241 return -EAGAIN; 6242 err = hpsa_passthru_ioctl(h, &arg64); 6243 atomic_inc(&h->passthru_cmds_avail); 6244 if (err) 6245 return err; 6246 if (copy_to_user(&arg32->error_info, &arg64.error_info, 6247 sizeof(arg32->error_info))) 6248 return -EFAULT; 6249 return 0; 6250 } 6251 6252 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 6253 unsigned int cmd, void __user *arg) 6254 { 6255 struct ctlr_info *h = sdev_to_hba(dev); 6256 BIG_IOCTL32_Command_struct __user *arg32 = arg; 6257 BIG_IOCTL_Command_struct arg64; 6258 int err; 6259 u32 cp; 6260 6261 if (!arg) 6262 return -EINVAL; 6263 memset(&arg64, 0, sizeof(arg64)); 6264 if (copy_from_user(&arg64, arg32, 6265 offsetof(BIG_IOCTL32_Command_struct, buf))) 6266 return -EFAULT; 6267 if (get_user(cp, &arg32->buf)) 6268 return -EFAULT; 6269 arg64.buf = compat_ptr(cp); 6270 6271 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6272 return -EAGAIN; 6273 err = hpsa_big_passthru_ioctl(h, &arg64); 6274 atomic_inc(&h->passthru_cmds_avail); 6275 if (err) 6276 return err; 6277 if (copy_to_user(&arg32->error_info, &arg64.error_info, 6278 sizeof(arg32->error_info))) 6279 return -EFAULT; 6280 return 0; 6281 } 6282 6283 static int hpsa_compat_ioctl(struct scsi_device *dev, unsigned int cmd, 6284 void __user *arg) 6285 { 6286 switch (cmd) { 6287 case CCISS_GETPCIINFO: 6288 case CCISS_GETINTINFO: 6289 case CCISS_SETINTINFO: 6290 case CCISS_GETNODENAME: 6291 case CCISS_SETNODENAME: 6292 case CCISS_GETHEARTBEAT: 6293 case CCISS_GETBUSTYPES: 6294 case CCISS_GETFIRMVER: 6295 case CCISS_GETDRIVVER: 6296 case CCISS_REVALIDVOLS: 6297 case CCISS_DEREGDISK: 6298 case CCISS_REGNEWDISK: 6299 case CCISS_REGNEWD: 6300 case CCISS_RESCANDISK: 6301 case CCISS_GETLUNINFO: 6302 return hpsa_ioctl(dev, cmd, arg); 6303 6304 case CCISS_PASSTHRU32: 6305 return hpsa_ioctl32_passthru(dev, cmd, arg); 6306 case CCISS_BIG_PASSTHRU32: 6307 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 6308 6309 default: 6310 return -ENOIOCTLCMD; 6311 } 6312 } 6313 #endif 6314 6315 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 6316 { 6317 struct hpsa_pci_info pciinfo; 6318 6319 if (!argp) 6320 return -EINVAL; 6321 pciinfo.domain = pci_domain_nr(h->pdev->bus); 6322 pciinfo.bus = h->pdev->bus->number; 6323 pciinfo.dev_fn = h->pdev->devfn; 6324 pciinfo.board_id = h->board_id; 6325 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 6326 return -EFAULT; 6327 return 0; 6328 } 6329 6330 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 6331 { 6332 DriverVer_type DriverVer; 6333 unsigned char vmaj, vmin, vsubmin; 6334 int rc; 6335 6336 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 6337 &vmaj, &vmin, &vsubmin); 6338 if (rc != 3) { 6339 dev_info(&h->pdev->dev, "driver version string '%s' " 6340 "unrecognized.", HPSA_DRIVER_VERSION); 6341 vmaj = 0; 6342 vmin = 0; 6343 vsubmin = 0; 6344 } 6345 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 6346 if (!argp) 6347 return -EINVAL; 6348 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 6349 return -EFAULT; 6350 return 0; 6351 } 6352 6353 static int hpsa_passthru_ioctl(struct ctlr_info *h, 6354 IOCTL_Command_struct *iocommand) 6355 { 6356 struct CommandList *c; 6357 char *buff = NULL; 6358 u64 temp64; 6359 int rc = 0; 6360 6361 if (!capable(CAP_SYS_RAWIO)) 6362 return -EPERM; 6363 if ((iocommand->buf_size < 1) && 6364 (iocommand->Request.Type.Direction != XFER_NONE)) { 6365 return -EINVAL; 6366 } 6367 if (iocommand->buf_size > 0) { 6368 buff = kmalloc(iocommand->buf_size, GFP_KERNEL); 6369 if (buff == NULL) 6370 return -ENOMEM; 6371 if (iocommand->Request.Type.Direction & XFER_WRITE) { 6372 /* Copy the data into the buffer we created */ 6373 if (copy_from_user(buff, iocommand->buf, 6374 iocommand->buf_size)) { 6375 rc = -EFAULT; 6376 goto out_kfree; 6377 } 6378 } else { 6379 memset(buff, 0, iocommand->buf_size); 6380 } 6381 } 6382 c = cmd_alloc(h); 6383 6384 /* Fill in the command type */ 6385 c->cmd_type = CMD_IOCTL_PEND; 6386 c->scsi_cmd = SCSI_CMD_BUSY; 6387 /* Fill in Command Header */ 6388 c->Header.ReplyQueue = 0; /* unused in simple mode */ 6389 if (iocommand->buf_size > 0) { /* buffer to fill */ 6390 c->Header.SGList = 1; 6391 c->Header.SGTotal = cpu_to_le16(1); 6392 } else { /* no buffers to fill */ 6393 c->Header.SGList = 0; 6394 c->Header.SGTotal = cpu_to_le16(0); 6395 } 6396 memcpy(&c->Header.LUN, &iocommand->LUN_info, sizeof(c->Header.LUN)); 6397 6398 /* Fill in Request block */ 6399 memcpy(&c->Request, &iocommand->Request, 6400 sizeof(c->Request)); 6401 6402 /* Fill in the scatter gather information */ 6403 if (iocommand->buf_size > 0) { 6404 temp64 = dma_map_single(&h->pdev->dev, buff, 6405 iocommand->buf_size, DMA_BIDIRECTIONAL); 6406 if (dma_mapping_error(&h->pdev->dev, (dma_addr_t) temp64)) { 6407 c->SG[0].Addr = cpu_to_le64(0); 6408 c->SG[0].Len = cpu_to_le32(0); 6409 rc = -ENOMEM; 6410 goto out; 6411 } 6412 c->SG[0].Addr = cpu_to_le64(temp64); 6413 c->SG[0].Len = cpu_to_le32(iocommand->buf_size); 6414 c->SG[0].Ext = cpu_to_le32(HPSA_SG_LAST); /* not chaining */ 6415 } 6416 rc = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6417 NO_TIMEOUT); 6418 if (iocommand->buf_size > 0) 6419 hpsa_pci_unmap(h->pdev, c, 1, DMA_BIDIRECTIONAL); 6420 check_ioctl_unit_attention(h, c); 6421 if (rc) { 6422 rc = -EIO; 6423 goto out; 6424 } 6425 6426 /* Copy the error information out */ 6427 memcpy(&iocommand->error_info, c->err_info, 6428 sizeof(iocommand->error_info)); 6429 if ((iocommand->Request.Type.Direction & XFER_READ) && 6430 iocommand->buf_size > 0) { 6431 /* Copy the data out of the buffer we created */ 6432 if (copy_to_user(iocommand->buf, buff, iocommand->buf_size)) { 6433 rc = -EFAULT; 6434 goto out; 6435 } 6436 } 6437 out: 6438 cmd_free(h, c); 6439 out_kfree: 6440 kfree(buff); 6441 return rc; 6442 } 6443 6444 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, 6445 BIG_IOCTL_Command_struct *ioc) 6446 { 6447 struct CommandList *c; 6448 unsigned char **buff = NULL; 6449 int *buff_size = NULL; 6450 u64 temp64; 6451 BYTE sg_used = 0; 6452 int status = 0; 6453 u32 left; 6454 u32 sz; 6455 BYTE __user *data_ptr; 6456 6457 if (!capable(CAP_SYS_RAWIO)) 6458 return -EPERM; 6459 6460 if ((ioc->buf_size < 1) && 6461 (ioc->Request.Type.Direction != XFER_NONE)) 6462 return -EINVAL; 6463 /* Check kmalloc limits using all SGs */ 6464 if (ioc->malloc_size > MAX_KMALLOC_SIZE) 6465 return -EINVAL; 6466 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) 6467 return -EINVAL; 6468 buff = kcalloc(SG_ENTRIES_IN_CMD, sizeof(char *), GFP_KERNEL); 6469 if (!buff) { 6470 status = -ENOMEM; 6471 goto cleanup1; 6472 } 6473 buff_size = kmalloc_array(SG_ENTRIES_IN_CMD, sizeof(int), GFP_KERNEL); 6474 if (!buff_size) { 6475 status = -ENOMEM; 6476 goto cleanup1; 6477 } 6478 left = ioc->buf_size; 6479 data_ptr = ioc->buf; 6480 while (left) { 6481 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 6482 buff_size[sg_used] = sz; 6483 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 6484 if (buff[sg_used] == NULL) { 6485 status = -ENOMEM; 6486 goto cleanup1; 6487 } 6488 if (ioc->Request.Type.Direction & XFER_WRITE) { 6489 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 6490 status = -EFAULT; 6491 goto cleanup1; 6492 } 6493 } else 6494 memset(buff[sg_used], 0, sz); 6495 left -= sz; 6496 data_ptr += sz; 6497 sg_used++; 6498 } 6499 c = cmd_alloc(h); 6500 6501 c->cmd_type = CMD_IOCTL_PEND; 6502 c->scsi_cmd = SCSI_CMD_BUSY; 6503 c->Header.ReplyQueue = 0; 6504 c->Header.SGList = (u8) sg_used; 6505 c->Header.SGTotal = cpu_to_le16(sg_used); 6506 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 6507 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 6508 if (ioc->buf_size > 0) { 6509 int i; 6510 for (i = 0; i < sg_used; i++) { 6511 temp64 = dma_map_single(&h->pdev->dev, buff[i], 6512 buff_size[i], DMA_BIDIRECTIONAL); 6513 if (dma_mapping_error(&h->pdev->dev, 6514 (dma_addr_t) temp64)) { 6515 c->SG[i].Addr = cpu_to_le64(0); 6516 c->SG[i].Len = cpu_to_le32(0); 6517 hpsa_pci_unmap(h->pdev, c, i, 6518 DMA_BIDIRECTIONAL); 6519 status = -ENOMEM; 6520 goto cleanup0; 6521 } 6522 c->SG[i].Addr = cpu_to_le64(temp64); 6523 c->SG[i].Len = cpu_to_le32(buff_size[i]); 6524 c->SG[i].Ext = cpu_to_le32(0); 6525 } 6526 c->SG[--i].Ext = cpu_to_le32(HPSA_SG_LAST); 6527 } 6528 status = hpsa_scsi_do_simple_cmd(h, c, DEFAULT_REPLY_QUEUE, 6529 NO_TIMEOUT); 6530 if (sg_used) 6531 hpsa_pci_unmap(h->pdev, c, sg_used, DMA_BIDIRECTIONAL); 6532 check_ioctl_unit_attention(h, c); 6533 if (status) { 6534 status = -EIO; 6535 goto cleanup0; 6536 } 6537 6538 /* Copy the error information out */ 6539 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 6540 if ((ioc->Request.Type.Direction & XFER_READ) && ioc->buf_size > 0) { 6541 int i; 6542 6543 /* Copy the data out of the buffer we created */ 6544 BYTE __user *ptr = ioc->buf; 6545 for (i = 0; i < sg_used; i++) { 6546 if (copy_to_user(ptr, buff[i], buff_size[i])) { 6547 status = -EFAULT; 6548 goto cleanup0; 6549 } 6550 ptr += buff_size[i]; 6551 } 6552 } 6553 status = 0; 6554 cleanup0: 6555 cmd_free(h, c); 6556 cleanup1: 6557 if (buff) { 6558 int i; 6559 6560 for (i = 0; i < sg_used; i++) 6561 kfree(buff[i]); 6562 kfree(buff); 6563 } 6564 kfree(buff_size); 6565 return status; 6566 } 6567 6568 static void check_ioctl_unit_attention(struct ctlr_info *h, 6569 struct CommandList *c) 6570 { 6571 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 6572 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 6573 (void) check_for_unit_attention(h, c); 6574 } 6575 6576 /* 6577 * ioctl 6578 */ 6579 static int hpsa_ioctl(struct scsi_device *dev, unsigned int cmd, 6580 void __user *argp) 6581 { 6582 struct ctlr_info *h = sdev_to_hba(dev); 6583 int rc; 6584 6585 switch (cmd) { 6586 case CCISS_DEREGDISK: 6587 case CCISS_REGNEWDISK: 6588 case CCISS_REGNEWD: 6589 hpsa_scan_start(h->scsi_host); 6590 return 0; 6591 case CCISS_GETPCIINFO: 6592 return hpsa_getpciinfo_ioctl(h, argp); 6593 case CCISS_GETDRIVVER: 6594 return hpsa_getdrivver_ioctl(h, argp); 6595 case CCISS_PASSTHRU: { 6596 IOCTL_Command_struct iocommand; 6597 6598 if (!argp) 6599 return -EINVAL; 6600 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 6601 return -EFAULT; 6602 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6603 return -EAGAIN; 6604 rc = hpsa_passthru_ioctl(h, &iocommand); 6605 atomic_inc(&h->passthru_cmds_avail); 6606 if (!rc && copy_to_user(argp, &iocommand, sizeof(iocommand))) 6607 rc = -EFAULT; 6608 return rc; 6609 } 6610 case CCISS_BIG_PASSTHRU: { 6611 BIG_IOCTL_Command_struct ioc; 6612 if (!argp) 6613 return -EINVAL; 6614 if (copy_from_user(&ioc, argp, sizeof(ioc))) 6615 return -EFAULT; 6616 if (atomic_dec_if_positive(&h->passthru_cmds_avail) < 0) 6617 return -EAGAIN; 6618 rc = hpsa_big_passthru_ioctl(h, &ioc); 6619 atomic_inc(&h->passthru_cmds_avail); 6620 if (!rc && copy_to_user(argp, &ioc, sizeof(ioc))) 6621 rc = -EFAULT; 6622 return rc; 6623 } 6624 default: 6625 return -ENOTTY; 6626 } 6627 } 6628 6629 static void hpsa_send_host_reset(struct ctlr_info *h, u8 reset_type) 6630 { 6631 struct CommandList *c; 6632 6633 c = cmd_alloc(h); 6634 6635 /* fill_cmd can't fail here, no data buffer to map */ 6636 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 6637 RAID_CTLR_LUNID, TYPE_MSG); 6638 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 6639 c->waiting = NULL; 6640 enqueue_cmd_and_start_io(h, c); 6641 /* Don't wait for completion, the reset won't complete. Don't free 6642 * the command either. This is the last command we will send before 6643 * re-initializing everything, so it doesn't matter and won't leak. 6644 */ 6645 return; 6646 } 6647 6648 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 6649 void *buff, size_t size, u16 page_code, unsigned char *scsi3addr, 6650 int cmd_type) 6651 { 6652 enum dma_data_direction dir = DMA_NONE; 6653 6654 c->cmd_type = CMD_IOCTL_PEND; 6655 c->scsi_cmd = SCSI_CMD_BUSY; 6656 c->Header.ReplyQueue = 0; 6657 if (buff != NULL && size > 0) { 6658 c->Header.SGList = 1; 6659 c->Header.SGTotal = cpu_to_le16(1); 6660 } else { 6661 c->Header.SGList = 0; 6662 c->Header.SGTotal = cpu_to_le16(0); 6663 } 6664 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 6665 6666 if (cmd_type == TYPE_CMD) { 6667 switch (cmd) { 6668 case HPSA_INQUIRY: 6669 /* are we trying to read a vital product page */ 6670 if (page_code & VPD_PAGE) { 6671 c->Request.CDB[1] = 0x01; 6672 c->Request.CDB[2] = (page_code & 0xff); 6673 } 6674 c->Request.CDBLen = 6; 6675 c->Request.type_attr_dir = 6676 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6677 c->Request.Timeout = 0; 6678 c->Request.CDB[0] = HPSA_INQUIRY; 6679 c->Request.CDB[4] = size & 0xFF; 6680 break; 6681 case RECEIVE_DIAGNOSTIC: 6682 c->Request.CDBLen = 6; 6683 c->Request.type_attr_dir = 6684 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6685 c->Request.Timeout = 0; 6686 c->Request.CDB[0] = cmd; 6687 c->Request.CDB[1] = 1; 6688 c->Request.CDB[2] = 1; 6689 c->Request.CDB[3] = (size >> 8) & 0xFF; 6690 c->Request.CDB[4] = size & 0xFF; 6691 break; 6692 case HPSA_REPORT_LOG: 6693 case HPSA_REPORT_PHYS: 6694 /* Talking to controller so It's a physical command 6695 mode = 00 target = 0. Nothing to write. 6696 */ 6697 c->Request.CDBLen = 12; 6698 c->Request.type_attr_dir = 6699 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6700 c->Request.Timeout = 0; 6701 c->Request.CDB[0] = cmd; 6702 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6703 c->Request.CDB[7] = (size >> 16) & 0xFF; 6704 c->Request.CDB[8] = (size >> 8) & 0xFF; 6705 c->Request.CDB[9] = size & 0xFF; 6706 break; 6707 case BMIC_SENSE_DIAG_OPTIONS: 6708 c->Request.CDBLen = 16; 6709 c->Request.type_attr_dir = 6710 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6711 c->Request.Timeout = 0; 6712 /* Spec says this should be BMIC_WRITE */ 6713 c->Request.CDB[0] = BMIC_READ; 6714 c->Request.CDB[6] = BMIC_SENSE_DIAG_OPTIONS; 6715 break; 6716 case BMIC_SET_DIAG_OPTIONS: 6717 c->Request.CDBLen = 16; 6718 c->Request.type_attr_dir = 6719 TYPE_ATTR_DIR(cmd_type, 6720 ATTR_SIMPLE, XFER_WRITE); 6721 c->Request.Timeout = 0; 6722 c->Request.CDB[0] = BMIC_WRITE; 6723 c->Request.CDB[6] = BMIC_SET_DIAG_OPTIONS; 6724 break; 6725 case HPSA_CACHE_FLUSH: 6726 c->Request.CDBLen = 12; 6727 c->Request.type_attr_dir = 6728 TYPE_ATTR_DIR(cmd_type, 6729 ATTR_SIMPLE, XFER_WRITE); 6730 c->Request.Timeout = 0; 6731 c->Request.CDB[0] = BMIC_WRITE; 6732 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 6733 c->Request.CDB[7] = (size >> 8) & 0xFF; 6734 c->Request.CDB[8] = size & 0xFF; 6735 break; 6736 case TEST_UNIT_READY: 6737 c->Request.CDBLen = 6; 6738 c->Request.type_attr_dir = 6739 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6740 c->Request.Timeout = 0; 6741 break; 6742 case HPSA_GET_RAID_MAP: 6743 c->Request.CDBLen = 12; 6744 c->Request.type_attr_dir = 6745 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6746 c->Request.Timeout = 0; 6747 c->Request.CDB[0] = HPSA_CISS_READ; 6748 c->Request.CDB[1] = cmd; 6749 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 6750 c->Request.CDB[7] = (size >> 16) & 0xFF; 6751 c->Request.CDB[8] = (size >> 8) & 0xFF; 6752 c->Request.CDB[9] = size & 0xFF; 6753 break; 6754 case BMIC_SENSE_CONTROLLER_PARAMETERS: 6755 c->Request.CDBLen = 10; 6756 c->Request.type_attr_dir = 6757 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6758 c->Request.Timeout = 0; 6759 c->Request.CDB[0] = BMIC_READ; 6760 c->Request.CDB[6] = BMIC_SENSE_CONTROLLER_PARAMETERS; 6761 c->Request.CDB[7] = (size >> 16) & 0xFF; 6762 c->Request.CDB[8] = (size >> 8) & 0xFF; 6763 break; 6764 case BMIC_IDENTIFY_PHYSICAL_DEVICE: 6765 c->Request.CDBLen = 10; 6766 c->Request.type_attr_dir = 6767 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6768 c->Request.Timeout = 0; 6769 c->Request.CDB[0] = BMIC_READ; 6770 c->Request.CDB[6] = BMIC_IDENTIFY_PHYSICAL_DEVICE; 6771 c->Request.CDB[7] = (size >> 16) & 0xFF; 6772 c->Request.CDB[8] = (size >> 8) & 0XFF; 6773 break; 6774 case BMIC_SENSE_SUBSYSTEM_INFORMATION: 6775 c->Request.CDBLen = 10; 6776 c->Request.type_attr_dir = 6777 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6778 c->Request.Timeout = 0; 6779 c->Request.CDB[0] = BMIC_READ; 6780 c->Request.CDB[6] = BMIC_SENSE_SUBSYSTEM_INFORMATION; 6781 c->Request.CDB[7] = (size >> 16) & 0xFF; 6782 c->Request.CDB[8] = (size >> 8) & 0XFF; 6783 break; 6784 case BMIC_SENSE_STORAGE_BOX_PARAMS: 6785 c->Request.CDBLen = 10; 6786 c->Request.type_attr_dir = 6787 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6788 c->Request.Timeout = 0; 6789 c->Request.CDB[0] = BMIC_READ; 6790 c->Request.CDB[6] = BMIC_SENSE_STORAGE_BOX_PARAMS; 6791 c->Request.CDB[7] = (size >> 16) & 0xFF; 6792 c->Request.CDB[8] = (size >> 8) & 0XFF; 6793 break; 6794 case BMIC_IDENTIFY_CONTROLLER: 6795 c->Request.CDBLen = 10; 6796 c->Request.type_attr_dir = 6797 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_READ); 6798 c->Request.Timeout = 0; 6799 c->Request.CDB[0] = BMIC_READ; 6800 c->Request.CDB[1] = 0; 6801 c->Request.CDB[2] = 0; 6802 c->Request.CDB[3] = 0; 6803 c->Request.CDB[4] = 0; 6804 c->Request.CDB[5] = 0; 6805 c->Request.CDB[6] = BMIC_IDENTIFY_CONTROLLER; 6806 c->Request.CDB[7] = (size >> 16) & 0xFF; 6807 c->Request.CDB[8] = (size >> 8) & 0XFF; 6808 c->Request.CDB[9] = 0; 6809 break; 6810 default: 6811 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 6812 BUG(); 6813 } 6814 } else if (cmd_type == TYPE_MSG) { 6815 switch (cmd) { 6816 6817 case HPSA_PHYS_TARGET_RESET: 6818 c->Request.CDBLen = 16; 6819 c->Request.type_attr_dir = 6820 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6821 c->Request.Timeout = 0; /* Don't time out */ 6822 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6823 c->Request.CDB[0] = HPSA_RESET; 6824 c->Request.CDB[1] = HPSA_TARGET_RESET_TYPE; 6825 /* Physical target reset needs no control bytes 4-7*/ 6826 c->Request.CDB[4] = 0x00; 6827 c->Request.CDB[5] = 0x00; 6828 c->Request.CDB[6] = 0x00; 6829 c->Request.CDB[7] = 0x00; 6830 break; 6831 case HPSA_DEVICE_RESET_MSG: 6832 c->Request.CDBLen = 16; 6833 c->Request.type_attr_dir = 6834 TYPE_ATTR_DIR(cmd_type, ATTR_SIMPLE, XFER_NONE); 6835 c->Request.Timeout = 0; /* Don't time out */ 6836 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 6837 c->Request.CDB[0] = cmd; 6838 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 6839 /* If bytes 4-7 are zero, it means reset the */ 6840 /* LunID device */ 6841 c->Request.CDB[4] = 0x00; 6842 c->Request.CDB[5] = 0x00; 6843 c->Request.CDB[6] = 0x00; 6844 c->Request.CDB[7] = 0x00; 6845 break; 6846 default: 6847 dev_warn(&h->pdev->dev, "unknown message type %d\n", 6848 cmd); 6849 BUG(); 6850 } 6851 } else { 6852 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 6853 BUG(); 6854 } 6855 6856 switch (GET_DIR(c->Request.type_attr_dir)) { 6857 case XFER_READ: 6858 dir = DMA_FROM_DEVICE; 6859 break; 6860 case XFER_WRITE: 6861 dir = DMA_TO_DEVICE; 6862 break; 6863 case XFER_NONE: 6864 dir = DMA_NONE; 6865 break; 6866 default: 6867 dir = DMA_BIDIRECTIONAL; 6868 } 6869 if (hpsa_map_one(h->pdev, c, buff, size, dir)) 6870 return -1; 6871 return 0; 6872 } 6873 6874 /* 6875 * Map (physical) PCI mem into (virtual) kernel space 6876 */ 6877 static void __iomem *remap_pci_mem(ulong base, ulong size) 6878 { 6879 ulong page_base = ((ulong) base) & PAGE_MASK; 6880 ulong page_offs = ((ulong) base) - page_base; 6881 void __iomem *page_remapped = ioremap(page_base, 6882 page_offs + size); 6883 6884 return page_remapped ? (page_remapped + page_offs) : NULL; 6885 } 6886 6887 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 6888 { 6889 return h->access.command_completed(h, q); 6890 } 6891 6892 static inline bool interrupt_pending(struct ctlr_info *h) 6893 { 6894 return h->access.intr_pending(h); 6895 } 6896 6897 static inline long interrupt_not_for_us(struct ctlr_info *h) 6898 { 6899 return (h->access.intr_pending(h) == 0) || 6900 (h->interrupts_enabled == 0); 6901 } 6902 6903 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 6904 u32 raw_tag) 6905 { 6906 if (unlikely(tag_index >= h->nr_cmds)) { 6907 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 6908 return 1; 6909 } 6910 return 0; 6911 } 6912 6913 static inline void finish_cmd(struct CommandList *c) 6914 { 6915 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 6916 if (likely(c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_SCSI 6917 || c->cmd_type == CMD_IOACCEL2)) 6918 complete_scsi_command(c); 6919 else if (c->cmd_type == CMD_IOCTL_PEND || c->cmd_type == IOACCEL2_TMF) 6920 complete(c->waiting); 6921 } 6922 6923 /* process completion of an indexed ("direct lookup") command */ 6924 static inline void process_indexed_cmd(struct ctlr_info *h, 6925 u32 raw_tag) 6926 { 6927 u32 tag_index; 6928 struct CommandList *c; 6929 6930 tag_index = raw_tag >> DIRECT_LOOKUP_SHIFT; 6931 if (!bad_tag(h, tag_index, raw_tag)) { 6932 c = h->cmd_pool + tag_index; 6933 finish_cmd(c); 6934 } 6935 } 6936 6937 /* Some controllers, like p400, will give us one interrupt 6938 * after a soft reset, even if we turned interrupts off. 6939 * Only need to check for this in the hpsa_xxx_discard_completions 6940 * functions. 6941 */ 6942 static int ignore_bogus_interrupt(struct ctlr_info *h) 6943 { 6944 if (likely(!reset_devices)) 6945 return 0; 6946 6947 if (likely(h->interrupts_enabled)) 6948 return 0; 6949 6950 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 6951 "(known firmware bug.) Ignoring.\n"); 6952 6953 return 1; 6954 } 6955 6956 /* 6957 * Convert &h->q[x] (passed to interrupt handlers) back to h. 6958 * Relies on (h-q[x] == x) being true for x such that 6959 * 0 <= x < MAX_REPLY_QUEUES. 6960 */ 6961 static struct ctlr_info *queue_to_hba(u8 *queue) 6962 { 6963 return container_of((queue - *queue), struct ctlr_info, q[0]); 6964 } 6965 6966 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 6967 { 6968 struct ctlr_info *h = queue_to_hba(queue); 6969 u8 q = *(u8 *) queue; 6970 u32 raw_tag; 6971 6972 if (ignore_bogus_interrupt(h)) 6973 return IRQ_NONE; 6974 6975 if (interrupt_not_for_us(h)) 6976 return IRQ_NONE; 6977 h->last_intr_timestamp = get_jiffies_64(); 6978 while (interrupt_pending(h)) { 6979 raw_tag = get_next_completion(h, q); 6980 while (raw_tag != FIFO_EMPTY) 6981 raw_tag = next_command(h, q); 6982 } 6983 return IRQ_HANDLED; 6984 } 6985 6986 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 6987 { 6988 struct ctlr_info *h = queue_to_hba(queue); 6989 u32 raw_tag; 6990 u8 q = *(u8 *) queue; 6991 6992 if (ignore_bogus_interrupt(h)) 6993 return IRQ_NONE; 6994 6995 h->last_intr_timestamp = get_jiffies_64(); 6996 raw_tag = get_next_completion(h, q); 6997 while (raw_tag != FIFO_EMPTY) 6998 raw_tag = next_command(h, q); 6999 return IRQ_HANDLED; 7000 } 7001 7002 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 7003 { 7004 struct ctlr_info *h = queue_to_hba((u8 *) queue); 7005 u32 raw_tag; 7006 u8 q = *(u8 *) queue; 7007 7008 if (interrupt_not_for_us(h)) 7009 return IRQ_NONE; 7010 h->last_intr_timestamp = get_jiffies_64(); 7011 while (interrupt_pending(h)) { 7012 raw_tag = get_next_completion(h, q); 7013 while (raw_tag != FIFO_EMPTY) { 7014 process_indexed_cmd(h, raw_tag); 7015 raw_tag = next_command(h, q); 7016 } 7017 } 7018 return IRQ_HANDLED; 7019 } 7020 7021 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 7022 { 7023 struct ctlr_info *h = queue_to_hba(queue); 7024 u32 raw_tag; 7025 u8 q = *(u8 *) queue; 7026 7027 h->last_intr_timestamp = get_jiffies_64(); 7028 raw_tag = get_next_completion(h, q); 7029 while (raw_tag != FIFO_EMPTY) { 7030 process_indexed_cmd(h, raw_tag); 7031 raw_tag = next_command(h, q); 7032 } 7033 return IRQ_HANDLED; 7034 } 7035 7036 /* Send a message CDB to the firmware. Careful, this only works 7037 * in simple mode, not performant mode due to the tag lookup. 7038 * We only ever use this immediately after a controller reset. 7039 */ 7040 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 7041 unsigned char type) 7042 { 7043 struct Command { 7044 struct CommandListHeader CommandHeader; 7045 struct RequestBlock Request; 7046 struct ErrDescriptor ErrorDescriptor; 7047 }; 7048 struct Command *cmd; 7049 static const size_t cmd_sz = sizeof(*cmd) + 7050 sizeof(cmd->ErrorDescriptor); 7051 dma_addr_t paddr64; 7052 __le32 paddr32; 7053 u32 tag; 7054 void __iomem *vaddr; 7055 int i, err; 7056 7057 vaddr = pci_ioremap_bar(pdev, 0); 7058 if (vaddr == NULL) 7059 return -ENOMEM; 7060 7061 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 7062 * CCISS commands, so they must be allocated from the lower 4GiB of 7063 * memory. 7064 */ 7065 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 7066 if (err) { 7067 iounmap(vaddr); 7068 return err; 7069 } 7070 7071 cmd = dma_alloc_coherent(&pdev->dev, cmd_sz, &paddr64, GFP_KERNEL); 7072 if (cmd == NULL) { 7073 iounmap(vaddr); 7074 return -ENOMEM; 7075 } 7076 7077 /* This must fit, because of the 32-bit consistent DMA mask. Also, 7078 * although there's no guarantee, we assume that the address is at 7079 * least 4-byte aligned (most likely, it's page-aligned). 7080 */ 7081 paddr32 = cpu_to_le32(paddr64); 7082 7083 cmd->CommandHeader.ReplyQueue = 0; 7084 cmd->CommandHeader.SGList = 0; 7085 cmd->CommandHeader.SGTotal = cpu_to_le16(0); 7086 cmd->CommandHeader.tag = cpu_to_le64(paddr64); 7087 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 7088 7089 cmd->Request.CDBLen = 16; 7090 cmd->Request.type_attr_dir = 7091 TYPE_ATTR_DIR(TYPE_MSG, ATTR_HEADOFQUEUE, XFER_NONE); 7092 cmd->Request.Timeout = 0; /* Don't time out */ 7093 cmd->Request.CDB[0] = opcode; 7094 cmd->Request.CDB[1] = type; 7095 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 7096 cmd->ErrorDescriptor.Addr = 7097 cpu_to_le64((le32_to_cpu(paddr32) + sizeof(*cmd))); 7098 cmd->ErrorDescriptor.Len = cpu_to_le32(sizeof(struct ErrorInfo)); 7099 7100 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET); 7101 7102 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 7103 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 7104 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr64) 7105 break; 7106 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 7107 } 7108 7109 iounmap(vaddr); 7110 7111 /* we leak the DMA buffer here ... no choice since the controller could 7112 * still complete the command. 7113 */ 7114 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 7115 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 7116 opcode, type); 7117 return -ETIMEDOUT; 7118 } 7119 7120 dma_free_coherent(&pdev->dev, cmd_sz, cmd, paddr64); 7121 7122 if (tag & HPSA_ERROR_BIT) { 7123 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 7124 opcode, type); 7125 return -EIO; 7126 } 7127 7128 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 7129 opcode, type); 7130 return 0; 7131 } 7132 7133 #define hpsa_noop(p) hpsa_message(p, 3, 0) 7134 7135 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 7136 void __iomem *vaddr, u32 use_doorbell) 7137 { 7138 7139 if (use_doorbell) { 7140 /* For everything after the P600, the PCI power state method 7141 * of resetting the controller doesn't work, so we have this 7142 * other way using the doorbell register. 7143 */ 7144 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 7145 writel(use_doorbell, vaddr + SA5_DOORBELL); 7146 7147 /* PMC hardware guys tell us we need a 10 second delay after 7148 * doorbell reset and before any attempt to talk to the board 7149 * at all to ensure that this actually works and doesn't fall 7150 * over in some weird corner cases. 7151 */ 7152 msleep(10000); 7153 } else { /* Try to do it the PCI power state way */ 7154 7155 /* Quoting from the Open CISS Specification: "The Power 7156 * Management Control/Status Register (CSR) controls the power 7157 * state of the device. The normal operating state is D0, 7158 * CSR=00h. The software off state is D3, CSR=03h. To reset 7159 * the controller, place the interface device in D3 then to D0, 7160 * this causes a secondary PCI reset which will reset the 7161 * controller." */ 7162 7163 int rc = 0; 7164 7165 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 7166 7167 /* enter the D3hot power management state */ 7168 rc = pci_set_power_state(pdev, PCI_D3hot); 7169 if (rc) 7170 return rc; 7171 7172 msleep(500); 7173 7174 /* enter the D0 power management state */ 7175 rc = pci_set_power_state(pdev, PCI_D0); 7176 if (rc) 7177 return rc; 7178 7179 /* 7180 * The P600 requires a small delay when changing states. 7181 * Otherwise we may think the board did not reset and we bail. 7182 * This for kdump only and is particular to the P600. 7183 */ 7184 msleep(500); 7185 } 7186 return 0; 7187 } 7188 7189 static void init_driver_version(char *driver_version, int len) 7190 { 7191 memset(driver_version, 0, len); 7192 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 7193 } 7194 7195 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 7196 { 7197 char *driver_version; 7198 int i, size = sizeof(cfgtable->driver_version); 7199 7200 driver_version = kmalloc(size, GFP_KERNEL); 7201 if (!driver_version) 7202 return -ENOMEM; 7203 7204 init_driver_version(driver_version, size); 7205 for (i = 0; i < size; i++) 7206 writeb(driver_version[i], &cfgtable->driver_version[i]); 7207 kfree(driver_version); 7208 return 0; 7209 } 7210 7211 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 7212 unsigned char *driver_ver) 7213 { 7214 int i; 7215 7216 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 7217 driver_ver[i] = readb(&cfgtable->driver_version[i]); 7218 } 7219 7220 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 7221 { 7222 7223 char *driver_ver, *old_driver_ver; 7224 int rc, size = sizeof(cfgtable->driver_version); 7225 7226 old_driver_ver = kmalloc_array(2, size, GFP_KERNEL); 7227 if (!old_driver_ver) 7228 return -ENOMEM; 7229 driver_ver = old_driver_ver + size; 7230 7231 /* After a reset, the 32 bytes of "driver version" in the cfgtable 7232 * should have been changed, otherwise we know the reset failed. 7233 */ 7234 init_driver_version(old_driver_ver, size); 7235 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 7236 rc = !memcmp(driver_ver, old_driver_ver, size); 7237 kfree(old_driver_ver); 7238 return rc; 7239 } 7240 /* This does a hard reset of the controller using PCI power management 7241 * states or the using the doorbell register. 7242 */ 7243 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev, u32 board_id) 7244 { 7245 u64 cfg_offset; 7246 u32 cfg_base_addr; 7247 u64 cfg_base_addr_index; 7248 void __iomem *vaddr; 7249 unsigned long paddr; 7250 u32 misc_fw_support; 7251 int rc; 7252 struct CfgTable __iomem *cfgtable; 7253 u32 use_doorbell; 7254 u16 command_register; 7255 7256 /* For controllers as old as the P600, this is very nearly 7257 * the same thing as 7258 * 7259 * pci_save_state(pci_dev); 7260 * pci_set_power_state(pci_dev, PCI_D3hot); 7261 * pci_set_power_state(pci_dev, PCI_D0); 7262 * pci_restore_state(pci_dev); 7263 * 7264 * For controllers newer than the P600, the pci power state 7265 * method of resetting doesn't work so we have another way 7266 * using the doorbell register. 7267 */ 7268 7269 if (!ctlr_is_resettable(board_id)) { 7270 dev_warn(&pdev->dev, "Controller not resettable\n"); 7271 return -ENODEV; 7272 } 7273 7274 /* if controller is soft- but not hard resettable... */ 7275 if (!ctlr_is_hard_resettable(board_id)) 7276 return -ENOTSUPP; /* try soft reset later. */ 7277 7278 /* Save the PCI command register */ 7279 pci_read_config_word(pdev, 4, &command_register); 7280 pci_save_state(pdev); 7281 7282 /* find the first memory BAR, so we can find the cfg table */ 7283 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 7284 if (rc) 7285 return rc; 7286 vaddr = remap_pci_mem(paddr, 0x250); 7287 if (!vaddr) 7288 return -ENOMEM; 7289 7290 /* find cfgtable in order to check if reset via doorbell is supported */ 7291 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 7292 &cfg_base_addr_index, &cfg_offset); 7293 if (rc) 7294 goto unmap_vaddr; 7295 cfgtable = remap_pci_mem(pci_resource_start(pdev, 7296 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 7297 if (!cfgtable) { 7298 rc = -ENOMEM; 7299 goto unmap_vaddr; 7300 } 7301 rc = write_driver_ver_to_cfgtable(cfgtable); 7302 if (rc) 7303 goto unmap_cfgtable; 7304 7305 /* If reset via doorbell register is supported, use that. 7306 * There are two such methods. Favor the newest method. 7307 */ 7308 misc_fw_support = readl(&cfgtable->misc_fw_support); 7309 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 7310 if (use_doorbell) { 7311 use_doorbell = DOORBELL_CTLR_RESET2; 7312 } else { 7313 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 7314 if (use_doorbell) { 7315 dev_warn(&pdev->dev, 7316 "Soft reset not supported. Firmware update is required.\n"); 7317 rc = -ENOTSUPP; /* try soft reset */ 7318 goto unmap_cfgtable; 7319 } 7320 } 7321 7322 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 7323 if (rc) 7324 goto unmap_cfgtable; 7325 7326 pci_restore_state(pdev); 7327 pci_write_config_word(pdev, 4, command_register); 7328 7329 /* Some devices (notably the HP Smart Array 5i Controller) 7330 need a little pause here */ 7331 msleep(HPSA_POST_RESET_PAUSE_MSECS); 7332 7333 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 7334 if (rc) { 7335 dev_warn(&pdev->dev, 7336 "Failed waiting for board to become ready after hard reset\n"); 7337 goto unmap_cfgtable; 7338 } 7339 7340 rc = controller_reset_failed(vaddr); 7341 if (rc < 0) 7342 goto unmap_cfgtable; 7343 if (rc) { 7344 dev_warn(&pdev->dev, "Unable to successfully reset " 7345 "controller. Will try soft reset.\n"); 7346 rc = -ENOTSUPP; 7347 } else { 7348 dev_info(&pdev->dev, "board ready after hard reset.\n"); 7349 } 7350 7351 unmap_cfgtable: 7352 iounmap(cfgtable); 7353 7354 unmap_vaddr: 7355 iounmap(vaddr); 7356 return rc; 7357 } 7358 7359 /* 7360 * We cannot read the structure directly, for portability we must use 7361 * the io functions. 7362 * This is for debug only. 7363 */ 7364 static void print_cfg_table(struct device *dev, struct CfgTable __iomem *tb) 7365 { 7366 #ifdef HPSA_DEBUG 7367 int i; 7368 char temp_name[17]; 7369 7370 dev_info(dev, "Controller Configuration information\n"); 7371 dev_info(dev, "------------------------------------\n"); 7372 for (i = 0; i < 4; i++) 7373 temp_name[i] = readb(&(tb->Signature[i])); 7374 temp_name[4] = '\0'; 7375 dev_info(dev, " Signature = %s\n", temp_name); 7376 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 7377 dev_info(dev, " Transport methods supported = 0x%x\n", 7378 readl(&(tb->TransportSupport))); 7379 dev_info(dev, " Transport methods active = 0x%x\n", 7380 readl(&(tb->TransportActive))); 7381 dev_info(dev, " Requested transport Method = 0x%x\n", 7382 readl(&(tb->HostWrite.TransportRequest))); 7383 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 7384 readl(&(tb->HostWrite.CoalIntDelay))); 7385 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 7386 readl(&(tb->HostWrite.CoalIntCount))); 7387 dev_info(dev, " Max outstanding commands = %d\n", 7388 readl(&(tb->CmdsOutMax))); 7389 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 7390 for (i = 0; i < 16; i++) 7391 temp_name[i] = readb(&(tb->ServerName[i])); 7392 temp_name[16] = '\0'; 7393 dev_info(dev, " Server Name = %s\n", temp_name); 7394 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 7395 readl(&(tb->HeartBeat))); 7396 #endif /* HPSA_DEBUG */ 7397 } 7398 7399 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 7400 { 7401 int i, offset, mem_type, bar_type; 7402 7403 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 7404 return 0; 7405 offset = 0; 7406 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 7407 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 7408 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 7409 offset += 4; 7410 else { 7411 mem_type = pci_resource_flags(pdev, i) & 7412 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 7413 switch (mem_type) { 7414 case PCI_BASE_ADDRESS_MEM_TYPE_32: 7415 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 7416 offset += 4; /* 32 bit */ 7417 break; 7418 case PCI_BASE_ADDRESS_MEM_TYPE_64: 7419 offset += 8; 7420 break; 7421 default: /* reserved in PCI 2.2 */ 7422 dev_warn(&pdev->dev, 7423 "base address is invalid\n"); 7424 return -1; 7425 break; 7426 } 7427 } 7428 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 7429 return i + 1; 7430 } 7431 return -1; 7432 } 7433 7434 static void hpsa_disable_interrupt_mode(struct ctlr_info *h) 7435 { 7436 pci_free_irq_vectors(h->pdev); 7437 h->msix_vectors = 0; 7438 } 7439 7440 static void hpsa_setup_reply_map(struct ctlr_info *h) 7441 { 7442 const struct cpumask *mask; 7443 unsigned int queue, cpu; 7444 7445 for (queue = 0; queue < h->msix_vectors; queue++) { 7446 mask = pci_irq_get_affinity(h->pdev, queue); 7447 if (!mask) 7448 goto fallback; 7449 7450 for_each_cpu(cpu, mask) 7451 h->reply_map[cpu] = queue; 7452 } 7453 return; 7454 7455 fallback: 7456 for_each_possible_cpu(cpu) 7457 h->reply_map[cpu] = 0; 7458 } 7459 7460 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 7461 * controllers that are capable. If not, we use legacy INTx mode. 7462 */ 7463 static int hpsa_interrupt_mode(struct ctlr_info *h) 7464 { 7465 unsigned int flags = PCI_IRQ_LEGACY; 7466 int ret; 7467 7468 /* Some boards advertise MSI but don't really support it */ 7469 switch (h->board_id) { 7470 case 0x40700E11: 7471 case 0x40800E11: 7472 case 0x40820E11: 7473 case 0x40830E11: 7474 break; 7475 default: 7476 ret = pci_alloc_irq_vectors(h->pdev, 1, MAX_REPLY_QUEUES, 7477 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 7478 if (ret > 0) { 7479 h->msix_vectors = ret; 7480 return 0; 7481 } 7482 7483 flags |= PCI_IRQ_MSI; 7484 break; 7485 } 7486 7487 ret = pci_alloc_irq_vectors(h->pdev, 1, 1, flags); 7488 if (ret < 0) 7489 return ret; 7490 return 0; 7491 } 7492 7493 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id, 7494 bool *legacy_board) 7495 { 7496 int i; 7497 u32 subsystem_vendor_id, subsystem_device_id; 7498 7499 subsystem_vendor_id = pdev->subsystem_vendor; 7500 subsystem_device_id = pdev->subsystem_device; 7501 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 7502 subsystem_vendor_id; 7503 7504 if (legacy_board) 7505 *legacy_board = false; 7506 for (i = 0; i < ARRAY_SIZE(products); i++) 7507 if (*board_id == products[i].board_id) { 7508 if (products[i].access != &SA5A_access && 7509 products[i].access != &SA5B_access) 7510 return i; 7511 dev_warn(&pdev->dev, 7512 "legacy board ID: 0x%08x\n", 7513 *board_id); 7514 if (legacy_board) 7515 *legacy_board = true; 7516 return i; 7517 } 7518 7519 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x\n", *board_id); 7520 if (legacy_board) 7521 *legacy_board = true; 7522 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 7523 } 7524 7525 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 7526 unsigned long *memory_bar) 7527 { 7528 int i; 7529 7530 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 7531 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 7532 /* addressing mode bits already removed */ 7533 *memory_bar = pci_resource_start(pdev, i); 7534 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 7535 *memory_bar); 7536 return 0; 7537 } 7538 dev_warn(&pdev->dev, "no memory BAR found\n"); 7539 return -ENODEV; 7540 } 7541 7542 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 7543 int wait_for_ready) 7544 { 7545 int i, iterations; 7546 u32 scratchpad; 7547 if (wait_for_ready) 7548 iterations = HPSA_BOARD_READY_ITERATIONS; 7549 else 7550 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 7551 7552 for (i = 0; i < iterations; i++) { 7553 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 7554 if (wait_for_ready) { 7555 if (scratchpad == HPSA_FIRMWARE_READY) 7556 return 0; 7557 } else { 7558 if (scratchpad != HPSA_FIRMWARE_READY) 7559 return 0; 7560 } 7561 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 7562 } 7563 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 7564 return -ENODEV; 7565 } 7566 7567 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 7568 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 7569 u64 *cfg_offset) 7570 { 7571 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 7572 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 7573 *cfg_base_addr &= (u32) 0x0000ffff; 7574 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 7575 if (*cfg_base_addr_index == -1) { 7576 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 7577 return -ENODEV; 7578 } 7579 return 0; 7580 } 7581 7582 static void hpsa_free_cfgtables(struct ctlr_info *h) 7583 { 7584 if (h->transtable) { 7585 iounmap(h->transtable); 7586 h->transtable = NULL; 7587 } 7588 if (h->cfgtable) { 7589 iounmap(h->cfgtable); 7590 h->cfgtable = NULL; 7591 } 7592 } 7593 7594 /* Find and map CISS config table and transfer table 7595 + * several items must be unmapped (freed) later 7596 + * */ 7597 static int hpsa_find_cfgtables(struct ctlr_info *h) 7598 { 7599 u64 cfg_offset; 7600 u32 cfg_base_addr; 7601 u64 cfg_base_addr_index; 7602 u32 trans_offset; 7603 int rc; 7604 7605 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 7606 &cfg_base_addr_index, &cfg_offset); 7607 if (rc) 7608 return rc; 7609 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 7610 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 7611 if (!h->cfgtable) { 7612 dev_err(&h->pdev->dev, "Failed mapping cfgtable\n"); 7613 return -ENOMEM; 7614 } 7615 rc = write_driver_ver_to_cfgtable(h->cfgtable); 7616 if (rc) 7617 return rc; 7618 /* Find performant mode table. */ 7619 trans_offset = readl(&h->cfgtable->TransMethodOffset); 7620 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 7621 cfg_base_addr_index)+cfg_offset+trans_offset, 7622 sizeof(*h->transtable)); 7623 if (!h->transtable) { 7624 dev_err(&h->pdev->dev, "Failed mapping transfer table\n"); 7625 hpsa_free_cfgtables(h); 7626 return -ENOMEM; 7627 } 7628 return 0; 7629 } 7630 7631 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 7632 { 7633 #define MIN_MAX_COMMANDS 16 7634 BUILD_BUG_ON(MIN_MAX_COMMANDS <= HPSA_NRESERVED_CMDS); 7635 7636 h->max_commands = readl(&h->cfgtable->MaxPerformantModeCommands); 7637 7638 /* Limit commands in memory limited kdump scenario. */ 7639 if (reset_devices && h->max_commands > 32) 7640 h->max_commands = 32; 7641 7642 if (h->max_commands < MIN_MAX_COMMANDS) { 7643 dev_warn(&h->pdev->dev, 7644 "Controller reports max supported commands of %d Using %d instead. Ensure that firmware is up to date.\n", 7645 h->max_commands, 7646 MIN_MAX_COMMANDS); 7647 h->max_commands = MIN_MAX_COMMANDS; 7648 } 7649 } 7650 7651 /* If the controller reports that the total max sg entries is greater than 512, 7652 * then we know that chained SG blocks work. (Original smart arrays did not 7653 * support chained SG blocks and would return zero for max sg entries.) 7654 */ 7655 static int hpsa_supports_chained_sg_blocks(struct ctlr_info *h) 7656 { 7657 return h->maxsgentries > 512; 7658 } 7659 7660 /* Interrogate the hardware for some limits: 7661 * max commands, max SG elements without chaining, and with chaining, 7662 * SG chain block size, etc. 7663 */ 7664 static void hpsa_find_board_params(struct ctlr_info *h) 7665 { 7666 hpsa_get_max_perf_mode_cmds(h); 7667 h->nr_cmds = h->max_commands; 7668 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 7669 h->fw_support = readl(&(h->cfgtable->misc_fw_support)); 7670 if (hpsa_supports_chained_sg_blocks(h)) { 7671 /* Limit in-command s/g elements to 32 save dma'able memory. */ 7672 h->max_cmd_sg_entries = 32; 7673 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries; 7674 h->maxsgentries--; /* save one for chain pointer */ 7675 } else { 7676 /* 7677 * Original smart arrays supported at most 31 s/g entries 7678 * embedded inline in the command (trying to use more 7679 * would lock up the controller) 7680 */ 7681 h->max_cmd_sg_entries = 31; 7682 h->maxsgentries = 31; /* default to traditional values */ 7683 h->chainsize = 0; 7684 } 7685 7686 /* Find out what task management functions are supported and cache */ 7687 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 7688 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags)) 7689 dev_warn(&h->pdev->dev, "Physical aborts not supported\n"); 7690 if (!(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 7691 dev_warn(&h->pdev->dev, "Logical aborts not supported\n"); 7692 if (!(HPSATMF_IOACCEL_ENABLED & h->TMFSupportFlags)) 7693 dev_warn(&h->pdev->dev, "HP SSD Smart Path aborts not supported\n"); 7694 } 7695 7696 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 7697 { 7698 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 7699 dev_err(&h->pdev->dev, "not a valid CISS config table\n"); 7700 return false; 7701 } 7702 return true; 7703 } 7704 7705 static inline void hpsa_set_driver_support_bits(struct ctlr_info *h) 7706 { 7707 u32 driver_support; 7708 7709 driver_support = readl(&(h->cfgtable->driver_support)); 7710 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 7711 #ifdef CONFIG_X86 7712 driver_support |= ENABLE_SCSI_PREFETCH; 7713 #endif 7714 driver_support |= ENABLE_UNIT_ATTN; 7715 writel(driver_support, &(h->cfgtable->driver_support)); 7716 } 7717 7718 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 7719 * in a prefetch beyond physical memory. 7720 */ 7721 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 7722 { 7723 u32 dma_prefetch; 7724 7725 if (h->board_id != 0x3225103C) 7726 return; 7727 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 7728 dma_prefetch |= 0x8000; 7729 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 7730 } 7731 7732 static int hpsa_wait_for_clear_event_notify_ack(struct ctlr_info *h) 7733 { 7734 int i; 7735 u32 doorbell_value; 7736 unsigned long flags; 7737 /* wait until the clear_event_notify bit 6 is cleared by controller. */ 7738 for (i = 0; i < MAX_CLEAR_EVENT_WAIT; i++) { 7739 spin_lock_irqsave(&h->lock, flags); 7740 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7741 spin_unlock_irqrestore(&h->lock, flags); 7742 if (!(doorbell_value & DOORBELL_CLEAR_EVENTS)) 7743 goto done; 7744 /* delay and try again */ 7745 msleep(CLEAR_EVENT_WAIT_INTERVAL); 7746 } 7747 return -ENODEV; 7748 done: 7749 return 0; 7750 } 7751 7752 static int hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 7753 { 7754 int i; 7755 u32 doorbell_value; 7756 unsigned long flags; 7757 7758 /* under certain very rare conditions, this can take awhile. 7759 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 7760 * as we enter this code.) 7761 */ 7762 for (i = 0; i < MAX_MODE_CHANGE_WAIT; i++) { 7763 if (h->remove_in_progress) 7764 goto done; 7765 spin_lock_irqsave(&h->lock, flags); 7766 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 7767 spin_unlock_irqrestore(&h->lock, flags); 7768 if (!(doorbell_value & CFGTBL_ChangeReq)) 7769 goto done; 7770 /* delay and try again */ 7771 msleep(MODE_CHANGE_WAIT_INTERVAL); 7772 } 7773 return -ENODEV; 7774 done: 7775 return 0; 7776 } 7777 7778 /* return -ENODEV or other reason on error, 0 on success */ 7779 static int hpsa_enter_simple_mode(struct ctlr_info *h) 7780 { 7781 u32 trans_support; 7782 7783 trans_support = readl(&(h->cfgtable->TransportSupport)); 7784 if (!(trans_support & SIMPLE_MODE)) 7785 return -ENOTSUPP; 7786 7787 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 7788 7789 /* Update the field, and then ring the doorbell */ 7790 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 7791 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 7792 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 7793 if (hpsa_wait_for_mode_change_ack(h)) 7794 goto error; 7795 print_cfg_table(&h->pdev->dev, h->cfgtable); 7796 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) 7797 goto error; 7798 h->transMethod = CFGTBL_Trans_Simple; 7799 return 0; 7800 error: 7801 dev_err(&h->pdev->dev, "failed to enter simple mode\n"); 7802 return -ENODEV; 7803 } 7804 7805 /* free items allocated or mapped by hpsa_pci_init */ 7806 static void hpsa_free_pci_init(struct ctlr_info *h) 7807 { 7808 hpsa_free_cfgtables(h); /* pci_init 4 */ 7809 iounmap(h->vaddr); /* pci_init 3 */ 7810 h->vaddr = NULL; 7811 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 7812 /* 7813 * call pci_disable_device before pci_release_regions per 7814 * Documentation/driver-api/pci/pci.rst 7815 */ 7816 pci_disable_device(h->pdev); /* pci_init 1 */ 7817 pci_release_regions(h->pdev); /* pci_init 2 */ 7818 } 7819 7820 /* several items must be freed later */ 7821 static int hpsa_pci_init(struct ctlr_info *h) 7822 { 7823 int prod_index, err; 7824 bool legacy_board; 7825 7826 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id, &legacy_board); 7827 if (prod_index < 0) 7828 return prod_index; 7829 h->product_name = products[prod_index].product_name; 7830 h->access = *(products[prod_index].access); 7831 h->legacy_board = legacy_board; 7832 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 7833 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 7834 7835 err = pci_enable_device(h->pdev); 7836 if (err) { 7837 dev_err(&h->pdev->dev, "failed to enable PCI device\n"); 7838 pci_disable_device(h->pdev); 7839 return err; 7840 } 7841 7842 err = pci_request_regions(h->pdev, HPSA); 7843 if (err) { 7844 dev_err(&h->pdev->dev, 7845 "failed to obtain PCI resources\n"); 7846 pci_disable_device(h->pdev); 7847 return err; 7848 } 7849 7850 pci_set_master(h->pdev); 7851 7852 err = hpsa_interrupt_mode(h); 7853 if (err) 7854 goto clean1; 7855 7856 /* setup mapping between CPU and reply queue */ 7857 hpsa_setup_reply_map(h); 7858 7859 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 7860 if (err) 7861 goto clean2; /* intmode+region, pci */ 7862 h->vaddr = remap_pci_mem(h->paddr, 0x250); 7863 if (!h->vaddr) { 7864 dev_err(&h->pdev->dev, "failed to remap PCI mem\n"); 7865 err = -ENOMEM; 7866 goto clean2; /* intmode+region, pci */ 7867 } 7868 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 7869 if (err) 7870 goto clean3; /* vaddr, intmode+region, pci */ 7871 err = hpsa_find_cfgtables(h); 7872 if (err) 7873 goto clean3; /* vaddr, intmode+region, pci */ 7874 hpsa_find_board_params(h); 7875 7876 if (!hpsa_CISS_signature_present(h)) { 7877 err = -ENODEV; 7878 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7879 } 7880 hpsa_set_driver_support_bits(h); 7881 hpsa_p600_dma_prefetch_quirk(h); 7882 err = hpsa_enter_simple_mode(h); 7883 if (err) 7884 goto clean4; /* cfgtables, vaddr, intmode+region, pci */ 7885 return 0; 7886 7887 clean4: /* cfgtables, vaddr, intmode+region, pci */ 7888 hpsa_free_cfgtables(h); 7889 clean3: /* vaddr, intmode+region, pci */ 7890 iounmap(h->vaddr); 7891 h->vaddr = NULL; 7892 clean2: /* intmode+region, pci */ 7893 hpsa_disable_interrupt_mode(h); 7894 clean1: 7895 /* 7896 * call pci_disable_device before pci_release_regions per 7897 * Documentation/driver-api/pci/pci.rst 7898 */ 7899 pci_disable_device(h->pdev); 7900 pci_release_regions(h->pdev); 7901 return err; 7902 } 7903 7904 static void hpsa_hba_inquiry(struct ctlr_info *h) 7905 { 7906 int rc; 7907 7908 #define HBA_INQUIRY_BYTE_COUNT 64 7909 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 7910 if (!h->hba_inquiry_data) 7911 return; 7912 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 7913 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 7914 if (rc != 0) { 7915 kfree(h->hba_inquiry_data); 7916 h->hba_inquiry_data = NULL; 7917 } 7918 } 7919 7920 static int hpsa_init_reset_devices(struct pci_dev *pdev, u32 board_id) 7921 { 7922 int rc, i; 7923 void __iomem *vaddr; 7924 7925 if (!reset_devices) 7926 return 0; 7927 7928 /* kdump kernel is loading, we don't know in which state is 7929 * the pci interface. The dev->enable_cnt is equal zero 7930 * so we call enable+disable, wait a while and switch it on. 7931 */ 7932 rc = pci_enable_device(pdev); 7933 if (rc) { 7934 dev_warn(&pdev->dev, "Failed to enable PCI device\n"); 7935 return -ENODEV; 7936 } 7937 pci_disable_device(pdev); 7938 msleep(260); /* a randomly chosen number */ 7939 rc = pci_enable_device(pdev); 7940 if (rc) { 7941 dev_warn(&pdev->dev, "failed to enable device.\n"); 7942 return -ENODEV; 7943 } 7944 7945 pci_set_master(pdev); 7946 7947 vaddr = pci_ioremap_bar(pdev, 0); 7948 if (vaddr == NULL) { 7949 rc = -ENOMEM; 7950 goto out_disable; 7951 } 7952 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET); 7953 iounmap(vaddr); 7954 7955 /* Reset the controller with a PCI power-cycle or via doorbell */ 7956 rc = hpsa_kdump_hard_reset_controller(pdev, board_id); 7957 7958 /* -ENOTSUPP here means we cannot reset the controller 7959 * but it's already (and still) up and running in 7960 * "performant mode". Or, it might be 640x, which can't reset 7961 * due to concerns about shared bbwc between 6402/6404 pair. 7962 */ 7963 if (rc) 7964 goto out_disable; 7965 7966 /* Now try to get the controller to respond to a no-op */ 7967 dev_info(&pdev->dev, "Waiting for controller to respond to no-op\n"); 7968 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 7969 if (hpsa_noop(pdev) == 0) 7970 break; 7971 else 7972 dev_warn(&pdev->dev, "no-op failed%s\n", 7973 (i < 11 ? "; re-trying" : "")); 7974 } 7975 7976 out_disable: 7977 7978 pci_disable_device(pdev); 7979 return rc; 7980 } 7981 7982 static void hpsa_free_cmd_pool(struct ctlr_info *h) 7983 { 7984 kfree(h->cmd_pool_bits); 7985 h->cmd_pool_bits = NULL; 7986 if (h->cmd_pool) { 7987 dma_free_coherent(&h->pdev->dev, 7988 h->nr_cmds * sizeof(struct CommandList), 7989 h->cmd_pool, 7990 h->cmd_pool_dhandle); 7991 h->cmd_pool = NULL; 7992 h->cmd_pool_dhandle = 0; 7993 } 7994 if (h->errinfo_pool) { 7995 dma_free_coherent(&h->pdev->dev, 7996 h->nr_cmds * sizeof(struct ErrorInfo), 7997 h->errinfo_pool, 7998 h->errinfo_pool_dhandle); 7999 h->errinfo_pool = NULL; 8000 h->errinfo_pool_dhandle = 0; 8001 } 8002 } 8003 8004 static int hpsa_alloc_cmd_pool(struct ctlr_info *h) 8005 { 8006 h->cmd_pool_bits = kcalloc(DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG), 8007 sizeof(unsigned long), 8008 GFP_KERNEL); 8009 h->cmd_pool = dma_alloc_coherent(&h->pdev->dev, 8010 h->nr_cmds * sizeof(*h->cmd_pool), 8011 &h->cmd_pool_dhandle, GFP_KERNEL); 8012 h->errinfo_pool = dma_alloc_coherent(&h->pdev->dev, 8013 h->nr_cmds * sizeof(*h->errinfo_pool), 8014 &h->errinfo_pool_dhandle, GFP_KERNEL); 8015 if ((h->cmd_pool_bits == NULL) 8016 || (h->cmd_pool == NULL) 8017 || (h->errinfo_pool == NULL)) { 8018 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 8019 goto clean_up; 8020 } 8021 hpsa_preinitialize_commands(h); 8022 return 0; 8023 clean_up: 8024 hpsa_free_cmd_pool(h); 8025 return -ENOMEM; 8026 } 8027 8028 /* clear affinity hints and free MSI-X, MSI, or legacy INTx vectors */ 8029 static void hpsa_free_irqs(struct ctlr_info *h) 8030 { 8031 int i; 8032 int irq_vector = 0; 8033 8034 if (hpsa_simple_mode) 8035 irq_vector = h->intr_mode; 8036 8037 if (!h->msix_vectors || h->intr_mode != PERF_MODE_INT) { 8038 /* Single reply queue, only one irq to free */ 8039 free_irq(pci_irq_vector(h->pdev, irq_vector), 8040 &h->q[h->intr_mode]); 8041 h->q[h->intr_mode] = 0; 8042 return; 8043 } 8044 8045 for (i = 0; i < h->msix_vectors; i++) { 8046 free_irq(pci_irq_vector(h->pdev, i), &h->q[i]); 8047 h->q[i] = 0; 8048 } 8049 for (; i < MAX_REPLY_QUEUES; i++) 8050 h->q[i] = 0; 8051 } 8052 8053 /* returns 0 on success; cleans up and returns -Enn on error */ 8054 static int hpsa_request_irqs(struct ctlr_info *h, 8055 irqreturn_t (*msixhandler)(int, void *), 8056 irqreturn_t (*intxhandler)(int, void *)) 8057 { 8058 int rc, i; 8059 int irq_vector = 0; 8060 8061 if (hpsa_simple_mode) 8062 irq_vector = h->intr_mode; 8063 8064 /* 8065 * initialize h->q[x] = x so that interrupt handlers know which 8066 * queue to process. 8067 */ 8068 for (i = 0; i < MAX_REPLY_QUEUES; i++) 8069 h->q[i] = (u8) i; 8070 8071 if (h->intr_mode == PERF_MODE_INT && h->msix_vectors > 0) { 8072 /* If performant mode and MSI-X, use multiple reply queues */ 8073 for (i = 0; i < h->msix_vectors; i++) { 8074 sprintf(h->intrname[i], "%s-msix%d", h->devname, i); 8075 rc = request_irq(pci_irq_vector(h->pdev, i), msixhandler, 8076 0, h->intrname[i], 8077 &h->q[i]); 8078 if (rc) { 8079 int j; 8080 8081 dev_err(&h->pdev->dev, 8082 "failed to get irq %d for %s\n", 8083 pci_irq_vector(h->pdev, i), h->devname); 8084 for (j = 0; j < i; j++) { 8085 free_irq(pci_irq_vector(h->pdev, j), &h->q[j]); 8086 h->q[j] = 0; 8087 } 8088 for (; j < MAX_REPLY_QUEUES; j++) 8089 h->q[j] = 0; 8090 return rc; 8091 } 8092 } 8093 } else { 8094 /* Use single reply pool */ 8095 if (h->msix_vectors > 0 || h->pdev->msi_enabled) { 8096 sprintf(h->intrname[0], "%s-msi%s", h->devname, 8097 h->msix_vectors ? "x" : ""); 8098 rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 8099 msixhandler, 0, 8100 h->intrname[0], 8101 &h->q[h->intr_mode]); 8102 } else { 8103 sprintf(h->intrname[h->intr_mode], 8104 "%s-intx", h->devname); 8105 rc = request_irq(pci_irq_vector(h->pdev, irq_vector), 8106 intxhandler, IRQF_SHARED, 8107 h->intrname[0], 8108 &h->q[h->intr_mode]); 8109 } 8110 } 8111 if (rc) { 8112 dev_err(&h->pdev->dev, "failed to get irq %d for %s\n", 8113 pci_irq_vector(h->pdev, irq_vector), h->devname); 8114 hpsa_free_irqs(h); 8115 return -ENODEV; 8116 } 8117 return 0; 8118 } 8119 8120 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 8121 { 8122 int rc; 8123 hpsa_send_host_reset(h, HPSA_RESET_TYPE_CONTROLLER); 8124 8125 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 8126 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY); 8127 if (rc) { 8128 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 8129 return rc; 8130 } 8131 8132 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 8133 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 8134 if (rc) { 8135 dev_warn(&h->pdev->dev, "Board failed to become ready " 8136 "after soft reset.\n"); 8137 return rc; 8138 } 8139 8140 return 0; 8141 } 8142 8143 static void hpsa_free_reply_queues(struct ctlr_info *h) 8144 { 8145 int i; 8146 8147 for (i = 0; i < h->nreply_queues; i++) { 8148 if (!h->reply_queue[i].head) 8149 continue; 8150 dma_free_coherent(&h->pdev->dev, 8151 h->reply_queue_size, 8152 h->reply_queue[i].head, 8153 h->reply_queue[i].busaddr); 8154 h->reply_queue[i].head = NULL; 8155 h->reply_queue[i].busaddr = 0; 8156 } 8157 h->reply_queue_size = 0; 8158 } 8159 8160 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 8161 { 8162 hpsa_free_performant_mode(h); /* init_one 7 */ 8163 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 8164 hpsa_free_cmd_pool(h); /* init_one 5 */ 8165 hpsa_free_irqs(h); /* init_one 4 */ 8166 scsi_host_put(h->scsi_host); /* init_one 3 */ 8167 h->scsi_host = NULL; /* init_one 3 */ 8168 hpsa_free_pci_init(h); /* init_one 2_5 */ 8169 free_percpu(h->lockup_detected); /* init_one 2 */ 8170 h->lockup_detected = NULL; /* init_one 2 */ 8171 if (h->resubmit_wq) { 8172 destroy_workqueue(h->resubmit_wq); /* init_one 1 */ 8173 h->resubmit_wq = NULL; 8174 } 8175 if (h->rescan_ctlr_wq) { 8176 destroy_workqueue(h->rescan_ctlr_wq); 8177 h->rescan_ctlr_wq = NULL; 8178 } 8179 if (h->monitor_ctlr_wq) { 8180 destroy_workqueue(h->monitor_ctlr_wq); 8181 h->monitor_ctlr_wq = NULL; 8182 } 8183 8184 kfree(h); /* init_one 1 */ 8185 } 8186 8187 /* Called when controller lockup detected. */ 8188 static void fail_all_outstanding_cmds(struct ctlr_info *h) 8189 { 8190 int i, refcount; 8191 struct CommandList *c; 8192 int failcount = 0; 8193 8194 flush_workqueue(h->resubmit_wq); /* ensure all cmds are fully built */ 8195 for (i = 0; i < h->nr_cmds; i++) { 8196 c = h->cmd_pool + i; 8197 refcount = atomic_inc_return(&c->refcount); 8198 if (refcount > 1) { 8199 c->err_info->CommandStatus = CMD_CTLR_LOCKUP; 8200 finish_cmd(c); 8201 atomic_dec(&h->commands_outstanding); 8202 failcount++; 8203 } 8204 cmd_free(h, c); 8205 } 8206 dev_warn(&h->pdev->dev, 8207 "failed %d commands in fail_all\n", failcount); 8208 } 8209 8210 static void set_lockup_detected_for_all_cpus(struct ctlr_info *h, u32 value) 8211 { 8212 int cpu; 8213 8214 for_each_online_cpu(cpu) { 8215 u32 *lockup_detected; 8216 lockup_detected = per_cpu_ptr(h->lockup_detected, cpu); 8217 *lockup_detected = value; 8218 } 8219 wmb(); /* be sure the per-cpu variables are out to memory */ 8220 } 8221 8222 static void controller_lockup_detected(struct ctlr_info *h) 8223 { 8224 unsigned long flags; 8225 u32 lockup_detected; 8226 8227 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8228 spin_lock_irqsave(&h->lock, flags); 8229 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 8230 if (!lockup_detected) { 8231 /* no heartbeat, but controller gave us a zero. */ 8232 dev_warn(&h->pdev->dev, 8233 "lockup detected after %d but scratchpad register is zero\n", 8234 h->heartbeat_sample_interval / HZ); 8235 lockup_detected = 0xffffffff; 8236 } 8237 set_lockup_detected_for_all_cpus(h, lockup_detected); 8238 spin_unlock_irqrestore(&h->lock, flags); 8239 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x after %d\n", 8240 lockup_detected, h->heartbeat_sample_interval / HZ); 8241 if (lockup_detected == 0xffff0000) { 8242 dev_warn(&h->pdev->dev, "Telling controller to do a CHKPT\n"); 8243 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL); 8244 } 8245 pci_disable_device(h->pdev); 8246 fail_all_outstanding_cmds(h); 8247 } 8248 8249 static int detect_controller_lockup(struct ctlr_info *h) 8250 { 8251 u64 now; 8252 u32 heartbeat; 8253 unsigned long flags; 8254 8255 now = get_jiffies_64(); 8256 /* If we've received an interrupt recently, we're ok. */ 8257 if (time_after64(h->last_intr_timestamp + 8258 (h->heartbeat_sample_interval), now)) 8259 return false; 8260 8261 /* 8262 * If we've already checked the heartbeat recently, we're ok. 8263 * This could happen if someone sends us a signal. We 8264 * otherwise don't care about signals in this thread. 8265 */ 8266 if (time_after64(h->last_heartbeat_timestamp + 8267 (h->heartbeat_sample_interval), now)) 8268 return false; 8269 8270 /* If heartbeat has not changed since we last looked, we're not ok. */ 8271 spin_lock_irqsave(&h->lock, flags); 8272 heartbeat = readl(&h->cfgtable->HeartBeat); 8273 spin_unlock_irqrestore(&h->lock, flags); 8274 if (h->last_heartbeat == heartbeat) { 8275 controller_lockup_detected(h); 8276 return true; 8277 } 8278 8279 /* We're ok. */ 8280 h->last_heartbeat = heartbeat; 8281 h->last_heartbeat_timestamp = now; 8282 return false; 8283 } 8284 8285 /* 8286 * Set ioaccel status for all ioaccel volumes. 8287 * 8288 * Called from monitor controller worker (hpsa_event_monitor_worker) 8289 * 8290 * A Volume (or Volumes that comprise an Array set) may be undergoing a 8291 * transformation, so we will be turning off ioaccel for all volumes that 8292 * make up the Array. 8293 */ 8294 static void hpsa_set_ioaccel_status(struct ctlr_info *h) 8295 { 8296 int rc; 8297 int i; 8298 u8 ioaccel_status; 8299 unsigned char *buf; 8300 struct hpsa_scsi_dev_t *device; 8301 8302 if (!h) 8303 return; 8304 8305 buf = kmalloc(64, GFP_KERNEL); 8306 if (!buf) 8307 return; 8308 8309 /* 8310 * Run through current device list used during I/O requests. 8311 */ 8312 for (i = 0; i < h->ndevices; i++) { 8313 int offload_to_be_enabled = 0; 8314 int offload_config = 0; 8315 8316 device = h->dev[i]; 8317 8318 if (!device) 8319 continue; 8320 if (!hpsa_vpd_page_supported(h, device->scsi3addr, 8321 HPSA_VPD_LV_IOACCEL_STATUS)) 8322 continue; 8323 8324 memset(buf, 0, 64); 8325 8326 rc = hpsa_scsi_do_inquiry(h, device->scsi3addr, 8327 VPD_PAGE | HPSA_VPD_LV_IOACCEL_STATUS, 8328 buf, 64); 8329 if (rc != 0) 8330 continue; 8331 8332 ioaccel_status = buf[IOACCEL_STATUS_BYTE]; 8333 8334 /* 8335 * Check if offload is still configured on 8336 */ 8337 offload_config = 8338 !!(ioaccel_status & OFFLOAD_CONFIGURED_BIT); 8339 /* 8340 * If offload is configured on, check to see if ioaccel 8341 * needs to be enabled. 8342 */ 8343 if (offload_config) 8344 offload_to_be_enabled = 8345 !!(ioaccel_status & OFFLOAD_ENABLED_BIT); 8346 8347 /* 8348 * If ioaccel is to be re-enabled, re-enable later during the 8349 * scan operation so the driver can get a fresh raidmap 8350 * before turning ioaccel back on. 8351 */ 8352 if (offload_to_be_enabled) 8353 continue; 8354 8355 /* 8356 * Immediately turn off ioaccel for any volume the 8357 * controller tells us to. Some of the reasons could be: 8358 * transformation - change to the LVs of an Array. 8359 * degraded volume - component failure 8360 */ 8361 hpsa_turn_off_ioaccel_for_device(device); 8362 } 8363 8364 kfree(buf); 8365 } 8366 8367 static void hpsa_ack_ctlr_events(struct ctlr_info *h) 8368 { 8369 char *event_type; 8370 8371 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8372 return; 8373 8374 /* Ask the controller to clear the events we're handling. */ 8375 if ((h->transMethod & (CFGTBL_Trans_io_accel1 8376 | CFGTBL_Trans_io_accel2)) && 8377 (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE || 8378 h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE)) { 8379 8380 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_STATE_CHANGE) 8381 event_type = "state change"; 8382 if (h->events & HPSA_EVENT_NOTIFY_ACCEL_IO_PATH_CONFIG_CHANGE) 8383 event_type = "configuration change"; 8384 /* Stop sending new RAID offload reqs via the IO accelerator */ 8385 scsi_block_requests(h->scsi_host); 8386 hpsa_set_ioaccel_status(h); 8387 hpsa_drain_accel_commands(h); 8388 /* Set 'accelerator path config change' bit */ 8389 dev_warn(&h->pdev->dev, 8390 "Acknowledging event: 0x%08x (HP SSD Smart Path %s)\n", 8391 h->events, event_type); 8392 writel(h->events, &(h->cfgtable->clear_event_notify)); 8393 /* Set the "clear event notify field update" bit 6 */ 8394 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8395 /* Wait until ctlr clears 'clear event notify field', bit 6 */ 8396 hpsa_wait_for_clear_event_notify_ack(h); 8397 scsi_unblock_requests(h->scsi_host); 8398 } else { 8399 /* Acknowledge controller notification events. */ 8400 writel(h->events, &(h->cfgtable->clear_event_notify)); 8401 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL); 8402 hpsa_wait_for_clear_event_notify_ack(h); 8403 } 8404 return; 8405 } 8406 8407 /* Check a register on the controller to see if there are configuration 8408 * changes (added/changed/removed logical drives, etc.) which mean that 8409 * we should rescan the controller for devices. 8410 * Also check flag for driver-initiated rescan. 8411 */ 8412 static int hpsa_ctlr_needs_rescan(struct ctlr_info *h) 8413 { 8414 if (h->drv_req_rescan) { 8415 h->drv_req_rescan = 0; 8416 return 1; 8417 } 8418 8419 if (!(h->fw_support & MISC_FW_EVENT_NOTIFY)) 8420 return 0; 8421 8422 h->events = readl(&(h->cfgtable->event_notify)); 8423 return h->events & RESCAN_REQUIRED_EVENT_BITS; 8424 } 8425 8426 /* 8427 * Check if any of the offline devices have become ready 8428 */ 8429 static int hpsa_offline_devices_ready(struct ctlr_info *h) 8430 { 8431 unsigned long flags; 8432 struct offline_device_entry *d; 8433 struct list_head *this, *tmp; 8434 8435 spin_lock_irqsave(&h->offline_device_lock, flags); 8436 list_for_each_safe(this, tmp, &h->offline_device_list) { 8437 d = list_entry(this, struct offline_device_entry, 8438 offline_list); 8439 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8440 if (!hpsa_volume_offline(h, d->scsi3addr)) { 8441 spin_lock_irqsave(&h->offline_device_lock, flags); 8442 list_del(&d->offline_list); 8443 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8444 return 1; 8445 } 8446 spin_lock_irqsave(&h->offline_device_lock, flags); 8447 } 8448 spin_unlock_irqrestore(&h->offline_device_lock, flags); 8449 return 0; 8450 } 8451 8452 static int hpsa_luns_changed(struct ctlr_info *h) 8453 { 8454 int rc = 1; /* assume there are changes */ 8455 struct ReportLUNdata *logdev = NULL; 8456 8457 /* if we can't find out if lun data has changed, 8458 * assume that it has. 8459 */ 8460 8461 if (!h->lastlogicals) 8462 return rc; 8463 8464 logdev = kzalloc(sizeof(*logdev), GFP_KERNEL); 8465 if (!logdev) 8466 return rc; 8467 8468 if (hpsa_scsi_do_report_luns(h, 1, logdev, sizeof(*logdev), 0)) { 8469 dev_warn(&h->pdev->dev, 8470 "report luns failed, can't track lun changes.\n"); 8471 goto out; 8472 } 8473 if (memcmp(logdev, h->lastlogicals, sizeof(*logdev))) { 8474 dev_info(&h->pdev->dev, 8475 "Lun changes detected.\n"); 8476 memcpy(h->lastlogicals, logdev, sizeof(*logdev)); 8477 goto out; 8478 } else 8479 rc = 0; /* no changes detected. */ 8480 out: 8481 kfree(logdev); 8482 return rc; 8483 } 8484 8485 static void hpsa_perform_rescan(struct ctlr_info *h) 8486 { 8487 struct Scsi_Host *sh = NULL; 8488 unsigned long flags; 8489 8490 /* 8491 * Do the scan after the reset 8492 */ 8493 spin_lock_irqsave(&h->reset_lock, flags); 8494 if (h->reset_in_progress) { 8495 h->drv_req_rescan = 1; 8496 spin_unlock_irqrestore(&h->reset_lock, flags); 8497 return; 8498 } 8499 spin_unlock_irqrestore(&h->reset_lock, flags); 8500 8501 sh = scsi_host_get(h->scsi_host); 8502 if (sh != NULL) { 8503 hpsa_scan_start(sh); 8504 scsi_host_put(sh); 8505 h->drv_req_rescan = 0; 8506 } 8507 } 8508 8509 /* 8510 * watch for controller events 8511 */ 8512 static void hpsa_event_monitor_worker(struct work_struct *work) 8513 { 8514 struct ctlr_info *h = container_of(to_delayed_work(work), 8515 struct ctlr_info, event_monitor_work); 8516 unsigned long flags; 8517 8518 spin_lock_irqsave(&h->lock, flags); 8519 if (h->remove_in_progress) { 8520 spin_unlock_irqrestore(&h->lock, flags); 8521 return; 8522 } 8523 spin_unlock_irqrestore(&h->lock, flags); 8524 8525 if (hpsa_ctlr_needs_rescan(h)) { 8526 hpsa_ack_ctlr_events(h); 8527 hpsa_perform_rescan(h); 8528 } 8529 8530 spin_lock_irqsave(&h->lock, flags); 8531 if (!h->remove_in_progress) 8532 queue_delayed_work(h->monitor_ctlr_wq, &h->event_monitor_work, 8533 HPSA_EVENT_MONITOR_INTERVAL); 8534 spin_unlock_irqrestore(&h->lock, flags); 8535 } 8536 8537 static void hpsa_rescan_ctlr_worker(struct work_struct *work) 8538 { 8539 unsigned long flags; 8540 struct ctlr_info *h = container_of(to_delayed_work(work), 8541 struct ctlr_info, rescan_ctlr_work); 8542 8543 spin_lock_irqsave(&h->lock, flags); 8544 if (h->remove_in_progress) { 8545 spin_unlock_irqrestore(&h->lock, flags); 8546 return; 8547 } 8548 spin_unlock_irqrestore(&h->lock, flags); 8549 8550 if (h->drv_req_rescan || hpsa_offline_devices_ready(h)) { 8551 hpsa_perform_rescan(h); 8552 } else if (h->discovery_polling) { 8553 if (hpsa_luns_changed(h)) { 8554 dev_info(&h->pdev->dev, 8555 "driver discovery polling rescan.\n"); 8556 hpsa_perform_rescan(h); 8557 } 8558 } 8559 spin_lock_irqsave(&h->lock, flags); 8560 if (!h->remove_in_progress) 8561 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8562 h->heartbeat_sample_interval); 8563 spin_unlock_irqrestore(&h->lock, flags); 8564 } 8565 8566 static void hpsa_monitor_ctlr_worker(struct work_struct *work) 8567 { 8568 unsigned long flags; 8569 struct ctlr_info *h = container_of(to_delayed_work(work), 8570 struct ctlr_info, monitor_ctlr_work); 8571 8572 detect_controller_lockup(h); 8573 if (lockup_detected(h)) 8574 return; 8575 8576 spin_lock_irqsave(&h->lock, flags); 8577 if (!h->remove_in_progress) 8578 queue_delayed_work(h->monitor_ctlr_wq, &h->monitor_ctlr_work, 8579 h->heartbeat_sample_interval); 8580 spin_unlock_irqrestore(&h->lock, flags); 8581 } 8582 8583 static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h, 8584 char *name) 8585 { 8586 struct workqueue_struct *wq = NULL; 8587 8588 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr); 8589 if (!wq) 8590 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 8591 8592 return wq; 8593 } 8594 8595 static void hpda_free_ctlr_info(struct ctlr_info *h) 8596 { 8597 kfree(h->reply_map); 8598 kfree(h); 8599 } 8600 8601 static struct ctlr_info *hpda_alloc_ctlr_info(void) 8602 { 8603 struct ctlr_info *h; 8604 8605 h = kzalloc(sizeof(*h), GFP_KERNEL); 8606 if (!h) 8607 return NULL; 8608 8609 h->reply_map = kcalloc(nr_cpu_ids, sizeof(*h->reply_map), GFP_KERNEL); 8610 if (!h->reply_map) { 8611 kfree(h); 8612 return NULL; 8613 } 8614 return h; 8615 } 8616 8617 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 8618 { 8619 int dac, rc; 8620 struct ctlr_info *h; 8621 int try_soft_reset = 0; 8622 unsigned long flags; 8623 u32 board_id; 8624 8625 if (number_of_controllers == 0) 8626 printk(KERN_INFO DRIVER_NAME "\n"); 8627 8628 rc = hpsa_lookup_board_id(pdev, &board_id, NULL); 8629 if (rc < 0) { 8630 dev_warn(&pdev->dev, "Board ID not found\n"); 8631 return rc; 8632 } 8633 8634 rc = hpsa_init_reset_devices(pdev, board_id); 8635 if (rc) { 8636 if (rc != -ENOTSUPP) 8637 return rc; 8638 /* If the reset fails in a particular way (it has no way to do 8639 * a proper hard reset, so returns -ENOTSUPP) we can try to do 8640 * a soft reset once we get the controller configured up to the 8641 * point that it can accept a command. 8642 */ 8643 try_soft_reset = 1; 8644 rc = 0; 8645 } 8646 8647 reinit_after_soft_reset: 8648 8649 /* Command structures must be aligned on a 32-byte boundary because 8650 * the 5 lower bits of the address are used by the hardware. and by 8651 * the driver. See comments in hpsa.h for more info. 8652 */ 8653 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 8654 h = hpda_alloc_ctlr_info(); 8655 if (!h) { 8656 dev_err(&pdev->dev, "Failed to allocate controller head\n"); 8657 return -ENOMEM; 8658 } 8659 8660 h->pdev = pdev; 8661 8662 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 8663 INIT_LIST_HEAD(&h->offline_device_list); 8664 spin_lock_init(&h->lock); 8665 spin_lock_init(&h->offline_device_lock); 8666 spin_lock_init(&h->scan_lock); 8667 spin_lock_init(&h->reset_lock); 8668 atomic_set(&h->passthru_cmds_avail, HPSA_MAX_CONCURRENT_PASSTHRUS); 8669 8670 /* Allocate and clear per-cpu variable lockup_detected */ 8671 h->lockup_detected = alloc_percpu(u32); 8672 if (!h->lockup_detected) { 8673 dev_err(&h->pdev->dev, "Failed to allocate lockup detector\n"); 8674 rc = -ENOMEM; 8675 goto clean1; /* aer/h */ 8676 } 8677 set_lockup_detected_for_all_cpus(h, 0); 8678 8679 rc = hpsa_pci_init(h); 8680 if (rc) 8681 goto clean2; /* lu, aer/h */ 8682 8683 /* relies on h-> settings made by hpsa_pci_init, including 8684 * interrupt_mode h->intr */ 8685 rc = hpsa_scsi_host_alloc(h); 8686 if (rc) 8687 goto clean2_5; /* pci, lu, aer/h */ 8688 8689 sprintf(h->devname, HPSA "%d", h->scsi_host->host_no); 8690 h->ctlr = number_of_controllers; 8691 number_of_controllers++; 8692 8693 /* configure PCI DMA stuff */ 8694 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)); 8695 if (rc == 0) { 8696 dac = 1; 8697 } else { 8698 rc = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 8699 if (rc == 0) { 8700 dac = 0; 8701 } else { 8702 dev_err(&pdev->dev, "no suitable DMA available\n"); 8703 goto clean3; /* shost, pci, lu, aer/h */ 8704 } 8705 } 8706 8707 /* make sure the board interrupts are off */ 8708 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8709 8710 rc = hpsa_request_irqs(h, do_hpsa_intr_msi, do_hpsa_intr_intx); 8711 if (rc) 8712 goto clean3; /* shost, pci, lu, aer/h */ 8713 rc = hpsa_alloc_cmd_pool(h); 8714 if (rc) 8715 goto clean4; /* irq, shost, pci, lu, aer/h */ 8716 rc = hpsa_alloc_sg_chain_blocks(h); 8717 if (rc) 8718 goto clean5; /* cmd, irq, shost, pci, lu, aer/h */ 8719 init_waitqueue_head(&h->scan_wait_queue); 8720 init_waitqueue_head(&h->event_sync_wait_queue); 8721 mutex_init(&h->reset_mutex); 8722 h->scan_finished = 1; /* no scan currently in progress */ 8723 h->scan_waiting = 0; 8724 8725 pci_set_drvdata(pdev, h); 8726 h->ndevices = 0; 8727 8728 spin_lock_init(&h->devlock); 8729 rc = hpsa_put_ctlr_into_performant_mode(h); 8730 if (rc) 8731 goto clean6; /* sg, cmd, irq, shost, pci, lu, aer/h */ 8732 8733 /* create the resubmit workqueue */ 8734 h->rescan_ctlr_wq = hpsa_create_controller_wq(h, "rescan"); 8735 if (!h->rescan_ctlr_wq) { 8736 rc = -ENOMEM; 8737 goto clean7; 8738 } 8739 8740 h->resubmit_wq = hpsa_create_controller_wq(h, "resubmit"); 8741 if (!h->resubmit_wq) { 8742 rc = -ENOMEM; 8743 goto clean7; /* aer/h */ 8744 } 8745 8746 h->monitor_ctlr_wq = hpsa_create_controller_wq(h, "monitor"); 8747 if (!h->monitor_ctlr_wq) { 8748 rc = -ENOMEM; 8749 goto clean7; 8750 } 8751 8752 /* 8753 * At this point, the controller is ready to take commands. 8754 * Now, if reset_devices and the hard reset didn't work, try 8755 * the soft reset and see if that works. 8756 */ 8757 if (try_soft_reset) { 8758 8759 /* This is kind of gross. We may or may not get a completion 8760 * from the soft reset command, and if we do, then the value 8761 * from the fifo may or may not be valid. So, we wait 10 secs 8762 * after the reset throwing away any completions we get during 8763 * that time. Unregister the interrupt handler and register 8764 * fake ones to scoop up any residual completions. 8765 */ 8766 spin_lock_irqsave(&h->lock, flags); 8767 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8768 spin_unlock_irqrestore(&h->lock, flags); 8769 hpsa_free_irqs(h); 8770 rc = hpsa_request_irqs(h, hpsa_msix_discard_completions, 8771 hpsa_intx_discard_completions); 8772 if (rc) { 8773 dev_warn(&h->pdev->dev, 8774 "Failed to request_irq after soft reset.\n"); 8775 /* 8776 * cannot goto clean7 or free_irqs will be called 8777 * again. Instead, do its work 8778 */ 8779 hpsa_free_performant_mode(h); /* clean7 */ 8780 hpsa_free_sg_chain_blocks(h); /* clean6 */ 8781 hpsa_free_cmd_pool(h); /* clean5 */ 8782 /* 8783 * skip hpsa_free_irqs(h) clean4 since that 8784 * was just called before request_irqs failed 8785 */ 8786 goto clean3; 8787 } 8788 8789 rc = hpsa_kdump_soft_reset(h); 8790 if (rc) 8791 /* Neither hard nor soft reset worked, we're hosed. */ 8792 goto clean7; 8793 8794 dev_info(&h->pdev->dev, "Board READY.\n"); 8795 dev_info(&h->pdev->dev, 8796 "Waiting for stale completions to drain.\n"); 8797 h->access.set_intr_mask(h, HPSA_INTR_ON); 8798 msleep(10000); 8799 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8800 8801 rc = controller_reset_failed(h->cfgtable); 8802 if (rc) 8803 dev_info(&h->pdev->dev, 8804 "Soft reset appears to have failed.\n"); 8805 8806 /* since the controller's reset, we have to go back and re-init 8807 * everything. Easiest to just forget what we've done and do it 8808 * all over again. 8809 */ 8810 hpsa_undo_allocations_after_kdump_soft_reset(h); 8811 try_soft_reset = 0; 8812 if (rc) 8813 /* don't goto clean, we already unallocated */ 8814 return -ENODEV; 8815 8816 goto reinit_after_soft_reset; 8817 } 8818 8819 /* Enable Accelerated IO path at driver layer */ 8820 h->acciopath_status = 1; 8821 /* Disable discovery polling.*/ 8822 h->discovery_polling = 0; 8823 8824 8825 /* Turn the interrupts on so we can service requests */ 8826 h->access.set_intr_mask(h, HPSA_INTR_ON); 8827 8828 hpsa_hba_inquiry(h); 8829 8830 h->lastlogicals = kzalloc(sizeof(*(h->lastlogicals)), GFP_KERNEL); 8831 if (!h->lastlogicals) 8832 dev_info(&h->pdev->dev, 8833 "Can't track change to report lun data\n"); 8834 8835 /* hook into SCSI subsystem */ 8836 rc = hpsa_scsi_add_host(h); 8837 if (rc) 8838 goto clean7; /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8839 8840 /* Monitor the controller for firmware lockups */ 8841 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 8842 INIT_DELAYED_WORK(&h->monitor_ctlr_work, hpsa_monitor_ctlr_worker); 8843 schedule_delayed_work(&h->monitor_ctlr_work, 8844 h->heartbeat_sample_interval); 8845 INIT_DELAYED_WORK(&h->rescan_ctlr_work, hpsa_rescan_ctlr_worker); 8846 queue_delayed_work(h->rescan_ctlr_wq, &h->rescan_ctlr_work, 8847 h->heartbeat_sample_interval); 8848 INIT_DELAYED_WORK(&h->event_monitor_work, hpsa_event_monitor_worker); 8849 schedule_delayed_work(&h->event_monitor_work, 8850 HPSA_EVENT_MONITOR_INTERVAL); 8851 return 0; 8852 8853 clean7: /* perf, sg, cmd, irq, shost, pci, lu, aer/h */ 8854 hpsa_free_performant_mode(h); 8855 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8856 clean6: /* sg, cmd, irq, pci, lockup, wq/aer/h */ 8857 hpsa_free_sg_chain_blocks(h); 8858 clean5: /* cmd, irq, shost, pci, lu, aer/h */ 8859 hpsa_free_cmd_pool(h); 8860 clean4: /* irq, shost, pci, lu, aer/h */ 8861 hpsa_free_irqs(h); 8862 clean3: /* shost, pci, lu, aer/h */ 8863 scsi_host_put(h->scsi_host); 8864 h->scsi_host = NULL; 8865 clean2_5: /* pci, lu, aer/h */ 8866 hpsa_free_pci_init(h); 8867 clean2: /* lu, aer/h */ 8868 if (h->lockup_detected) { 8869 free_percpu(h->lockup_detected); 8870 h->lockup_detected = NULL; 8871 } 8872 clean1: /* wq/aer/h */ 8873 if (h->resubmit_wq) { 8874 destroy_workqueue(h->resubmit_wq); 8875 h->resubmit_wq = NULL; 8876 } 8877 if (h->rescan_ctlr_wq) { 8878 destroy_workqueue(h->rescan_ctlr_wq); 8879 h->rescan_ctlr_wq = NULL; 8880 } 8881 if (h->monitor_ctlr_wq) { 8882 destroy_workqueue(h->monitor_ctlr_wq); 8883 h->monitor_ctlr_wq = NULL; 8884 } 8885 kfree(h); 8886 return rc; 8887 } 8888 8889 static void hpsa_flush_cache(struct ctlr_info *h) 8890 { 8891 char *flush_buf; 8892 struct CommandList *c; 8893 int rc; 8894 8895 if (unlikely(lockup_detected(h))) 8896 return; 8897 flush_buf = kzalloc(4, GFP_KERNEL); 8898 if (!flush_buf) 8899 return; 8900 8901 c = cmd_alloc(h); 8902 8903 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 8904 RAID_CTLR_LUNID, TYPE_CMD)) { 8905 goto out; 8906 } 8907 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8908 DEFAULT_TIMEOUT); 8909 if (rc) 8910 goto out; 8911 if (c->err_info->CommandStatus != 0) 8912 out: 8913 dev_warn(&h->pdev->dev, 8914 "error flushing cache on controller\n"); 8915 cmd_free(h, c); 8916 kfree(flush_buf); 8917 } 8918 8919 /* Make controller gather fresh report lun data each time we 8920 * send down a report luns request 8921 */ 8922 static void hpsa_disable_rld_caching(struct ctlr_info *h) 8923 { 8924 u32 *options; 8925 struct CommandList *c; 8926 int rc; 8927 8928 /* Don't bother trying to set diag options if locked up */ 8929 if (unlikely(h->lockup_detected)) 8930 return; 8931 8932 options = kzalloc(sizeof(*options), GFP_KERNEL); 8933 if (!options) 8934 return; 8935 8936 c = cmd_alloc(h); 8937 8938 /* first, get the current diag options settings */ 8939 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8940 RAID_CTLR_LUNID, TYPE_CMD)) 8941 goto errout; 8942 8943 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8944 NO_TIMEOUT); 8945 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8946 goto errout; 8947 8948 /* Now, set the bit for disabling the RLD caching */ 8949 *options |= HPSA_DIAG_OPTS_DISABLE_RLD_CACHING; 8950 8951 if (fill_cmd(c, BMIC_SET_DIAG_OPTIONS, h, options, 4, 0, 8952 RAID_CTLR_LUNID, TYPE_CMD)) 8953 goto errout; 8954 8955 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_TO_DEVICE, 8956 NO_TIMEOUT); 8957 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8958 goto errout; 8959 8960 /* Now verify that it got set: */ 8961 if (fill_cmd(c, BMIC_SENSE_DIAG_OPTIONS, h, options, 4, 0, 8962 RAID_CTLR_LUNID, TYPE_CMD)) 8963 goto errout; 8964 8965 rc = hpsa_scsi_do_simple_cmd_with_retry(h, c, DMA_FROM_DEVICE, 8966 NO_TIMEOUT); 8967 if ((rc != 0) || (c->err_info->CommandStatus != 0)) 8968 goto errout; 8969 8970 if (*options & HPSA_DIAG_OPTS_DISABLE_RLD_CACHING) 8971 goto out; 8972 8973 errout: 8974 dev_err(&h->pdev->dev, 8975 "Error: failed to disable report lun data caching.\n"); 8976 out: 8977 cmd_free(h, c); 8978 kfree(options); 8979 } 8980 8981 static void __hpsa_shutdown(struct pci_dev *pdev) 8982 { 8983 struct ctlr_info *h; 8984 8985 h = pci_get_drvdata(pdev); 8986 /* Turn board interrupts off and send the flush cache command 8987 * sendcmd will turn off interrupt, and send the flush... 8988 * To write all data in the battery backed cache to disks 8989 */ 8990 hpsa_flush_cache(h); 8991 h->access.set_intr_mask(h, HPSA_INTR_OFF); 8992 hpsa_free_irqs(h); /* init_one 4 */ 8993 hpsa_disable_interrupt_mode(h); /* pci_init 2 */ 8994 } 8995 8996 static void hpsa_shutdown(struct pci_dev *pdev) 8997 { 8998 __hpsa_shutdown(pdev); 8999 pci_disable_device(pdev); 9000 } 9001 9002 static void hpsa_free_device_info(struct ctlr_info *h) 9003 { 9004 int i; 9005 9006 for (i = 0; i < h->ndevices; i++) { 9007 kfree(h->dev[i]); 9008 h->dev[i] = NULL; 9009 } 9010 } 9011 9012 static void hpsa_remove_one(struct pci_dev *pdev) 9013 { 9014 struct ctlr_info *h; 9015 unsigned long flags; 9016 9017 if (pci_get_drvdata(pdev) == NULL) { 9018 dev_err(&pdev->dev, "unable to remove device\n"); 9019 return; 9020 } 9021 h = pci_get_drvdata(pdev); 9022 9023 /* Get rid of any controller monitoring work items */ 9024 spin_lock_irqsave(&h->lock, flags); 9025 h->remove_in_progress = 1; 9026 spin_unlock_irqrestore(&h->lock, flags); 9027 cancel_delayed_work_sync(&h->monitor_ctlr_work); 9028 cancel_delayed_work_sync(&h->rescan_ctlr_work); 9029 cancel_delayed_work_sync(&h->event_monitor_work); 9030 destroy_workqueue(h->rescan_ctlr_wq); 9031 destroy_workqueue(h->resubmit_wq); 9032 destroy_workqueue(h->monitor_ctlr_wq); 9033 9034 hpsa_delete_sas_host(h); 9035 9036 /* 9037 * Call before disabling interrupts. 9038 * scsi_remove_host can trigger I/O operations especially 9039 * when multipath is enabled. There can be SYNCHRONIZE CACHE 9040 * operations which cannot complete and will hang the system. 9041 */ 9042 if (h->scsi_host) 9043 scsi_remove_host(h->scsi_host); /* init_one 8 */ 9044 /* includes hpsa_free_irqs - init_one 4 */ 9045 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9046 __hpsa_shutdown(pdev); 9047 9048 hpsa_free_device_info(h); /* scan */ 9049 9050 kfree(h->hba_inquiry_data); /* init_one 10 */ 9051 h->hba_inquiry_data = NULL; /* init_one 10 */ 9052 hpsa_free_ioaccel2_sg_chain_blocks(h); 9053 hpsa_free_performant_mode(h); /* init_one 7 */ 9054 hpsa_free_sg_chain_blocks(h); /* init_one 6 */ 9055 hpsa_free_cmd_pool(h); /* init_one 5 */ 9056 kfree(h->lastlogicals); 9057 9058 /* hpsa_free_irqs already called via hpsa_shutdown init_one 4 */ 9059 9060 scsi_host_put(h->scsi_host); /* init_one 3 */ 9061 h->scsi_host = NULL; /* init_one 3 */ 9062 9063 /* includes hpsa_disable_interrupt_mode - pci_init 2 */ 9064 hpsa_free_pci_init(h); /* init_one 2.5 */ 9065 9066 free_percpu(h->lockup_detected); /* init_one 2 */ 9067 h->lockup_detected = NULL; /* init_one 2 */ 9068 /* (void) pci_disable_pcie_error_reporting(pdev); */ /* init_one 1 */ 9069 9070 hpda_free_ctlr_info(h); /* init_one 1 */ 9071 } 9072 9073 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 9074 __attribute__((unused)) pm_message_t state) 9075 { 9076 return -ENOSYS; 9077 } 9078 9079 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 9080 { 9081 return -ENOSYS; 9082 } 9083 9084 static struct pci_driver hpsa_pci_driver = { 9085 .name = HPSA, 9086 .probe = hpsa_init_one, 9087 .remove = hpsa_remove_one, 9088 .id_table = hpsa_pci_device_id, /* id_table */ 9089 .shutdown = hpsa_shutdown, 9090 .suspend = hpsa_suspend, 9091 .resume = hpsa_resume, 9092 }; 9093 9094 /* Fill in bucket_map[], given nsgs (the max number of 9095 * scatter gather elements supported) and bucket[], 9096 * which is an array of 8 integers. The bucket[] array 9097 * contains 8 different DMA transfer sizes (in 16 9098 * byte increments) which the controller uses to fetch 9099 * commands. This function fills in bucket_map[], which 9100 * maps a given number of scatter gather elements to one of 9101 * the 8 DMA transfer sizes. The point of it is to allow the 9102 * controller to only do as much DMA as needed to fetch the 9103 * command, with the DMA transfer size encoded in the lower 9104 * bits of the command address. 9105 */ 9106 static void calc_bucket_map(int bucket[], int num_buckets, 9107 int nsgs, int min_blocks, u32 *bucket_map) 9108 { 9109 int i, j, b, size; 9110 9111 /* Note, bucket_map must have nsgs+1 entries. */ 9112 for (i = 0; i <= nsgs; i++) { 9113 /* Compute size of a command with i SG entries */ 9114 size = i + min_blocks; 9115 b = num_buckets; /* Assume the biggest bucket */ 9116 /* Find the bucket that is just big enough */ 9117 for (j = 0; j < num_buckets; j++) { 9118 if (bucket[j] >= size) { 9119 b = j; 9120 break; 9121 } 9122 } 9123 /* for a command with i SG entries, use bucket b. */ 9124 bucket_map[i] = b; 9125 } 9126 } 9127 9128 /* 9129 * return -ENODEV on err, 0 on success (or no action) 9130 * allocates numerous items that must be freed later 9131 */ 9132 static int hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support) 9133 { 9134 int i; 9135 unsigned long register_value; 9136 unsigned long transMethod = CFGTBL_Trans_Performant | 9137 (trans_support & CFGTBL_Trans_use_short_tags) | 9138 CFGTBL_Trans_enable_directed_msix | 9139 (trans_support & (CFGTBL_Trans_io_accel1 | 9140 CFGTBL_Trans_io_accel2)); 9141 struct access_method access = SA5_performant_access; 9142 9143 /* This is a bit complicated. There are 8 registers on 9144 * the controller which we write to to tell it 8 different 9145 * sizes of commands which there may be. It's a way of 9146 * reducing the DMA done to fetch each command. Encoded into 9147 * each command's tag are 3 bits which communicate to the controller 9148 * which of the eight sizes that command fits within. The size of 9149 * each command depends on how many scatter gather entries there are. 9150 * Each SG entry requires 16 bytes. The eight registers are programmed 9151 * with the number of 16-byte blocks a command of that size requires. 9152 * The smallest command possible requires 5 such 16 byte blocks. 9153 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 9154 * blocks. Note, this only extends to the SG entries contained 9155 * within the command block, and does not extend to chained blocks 9156 * of SG elements. bft[] contains the eight values we write to 9157 * the registers. They are not evenly distributed, but have more 9158 * sizes for small commands, and fewer sizes for larger commands. 9159 */ 9160 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 9161 #define MIN_IOACCEL2_BFT_ENTRY 5 9162 #define HPSA_IOACCEL2_HEADER_SZ 4 9163 int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12, 9164 13, 14, 15, 16, 17, 18, 19, 9165 HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES}; 9166 BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16); 9167 BUILD_BUG_ON(ARRAY_SIZE(bft) != 8); 9168 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) > 9169 16 * MIN_IOACCEL2_BFT_ENTRY); 9170 BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16); 9171 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 9172 /* 5 = 1 s/g entry or 4k 9173 * 6 = 2 s/g entry or 8k 9174 * 8 = 4 s/g entry or 16k 9175 * 10 = 6 s/g entry or 24k 9176 */ 9177 9178 /* If the controller supports either ioaccel method then 9179 * we can also use the RAID stack submit path that does not 9180 * perform the superfluous readl() after each command submission. 9181 */ 9182 if (trans_support & (CFGTBL_Trans_io_accel1 | CFGTBL_Trans_io_accel2)) 9183 access = SA5_performant_access_no_read; 9184 9185 /* Controller spec: zero out this buffer. */ 9186 for (i = 0; i < h->nreply_queues; i++) 9187 memset(h->reply_queue[i].head, 0, h->reply_queue_size); 9188 9189 bft[7] = SG_ENTRIES_IN_CMD + 4; 9190 calc_bucket_map(bft, ARRAY_SIZE(bft), 9191 SG_ENTRIES_IN_CMD, 4, h->blockFetchTable); 9192 for (i = 0; i < 8; i++) 9193 writel(bft[i], &h->transtable->BlockFetch[i]); 9194 9195 /* size of controller ring buffer */ 9196 writel(h->max_commands, &h->transtable->RepQSize); 9197 writel(h->nreply_queues, &h->transtable->RepQCount); 9198 writel(0, &h->transtable->RepQCtrAddrLow32); 9199 writel(0, &h->transtable->RepQCtrAddrHigh32); 9200 9201 for (i = 0; i < h->nreply_queues; i++) { 9202 writel(0, &h->transtable->RepQAddr[i].upper); 9203 writel(h->reply_queue[i].busaddr, 9204 &h->transtable->RepQAddr[i].lower); 9205 } 9206 9207 writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi); 9208 writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest)); 9209 /* 9210 * enable outbound interrupt coalescing in accelerator mode; 9211 */ 9212 if (trans_support & CFGTBL_Trans_io_accel1) { 9213 access = SA5_ioaccel_mode1_access; 9214 writel(10, &h->cfgtable->HostWrite.CoalIntDelay); 9215 writel(4, &h->cfgtable->HostWrite.CoalIntCount); 9216 } else 9217 if (trans_support & CFGTBL_Trans_io_accel2) 9218 access = SA5_ioaccel_mode2_access; 9219 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9220 if (hpsa_wait_for_mode_change_ack(h)) { 9221 dev_err(&h->pdev->dev, 9222 "performant mode problem - doorbell timeout\n"); 9223 return -ENODEV; 9224 } 9225 register_value = readl(&(h->cfgtable->TransportActive)); 9226 if (!(register_value & CFGTBL_Trans_Performant)) { 9227 dev_err(&h->pdev->dev, 9228 "performant mode problem - transport not active\n"); 9229 return -ENODEV; 9230 } 9231 /* Change the access methods to the performant access methods */ 9232 h->access = access; 9233 h->transMethod = transMethod; 9234 9235 if (!((trans_support & CFGTBL_Trans_io_accel1) || 9236 (trans_support & CFGTBL_Trans_io_accel2))) 9237 return 0; 9238 9239 if (trans_support & CFGTBL_Trans_io_accel1) { 9240 /* Set up I/O accelerator mode */ 9241 for (i = 0; i < h->nreply_queues; i++) { 9242 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX); 9243 h->reply_queue[i].current_entry = 9244 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX); 9245 } 9246 bft[7] = h->ioaccel_maxsg + 8; 9247 calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8, 9248 h->ioaccel1_blockFetchTable); 9249 9250 /* initialize all reply queue entries to unused */ 9251 for (i = 0; i < h->nreply_queues; i++) 9252 memset(h->reply_queue[i].head, 9253 (u8) IOACCEL_MODE1_REPLY_UNUSED, 9254 h->reply_queue_size); 9255 9256 /* set all the constant fields in the accelerator command 9257 * frames once at init time to save CPU cycles later. 9258 */ 9259 for (i = 0; i < h->nr_cmds; i++) { 9260 struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i]; 9261 9262 cp->function = IOACCEL1_FUNCTION_SCSIIO; 9263 cp->err_info = (u32) (h->errinfo_pool_dhandle + 9264 (i * sizeof(struct ErrorInfo))); 9265 cp->err_info_len = sizeof(struct ErrorInfo); 9266 cp->sgl_offset = IOACCEL1_SGLOFFSET; 9267 cp->host_context_flags = 9268 cpu_to_le16(IOACCEL1_HCFLAGS_CISS_FORMAT); 9269 cp->timeout_sec = 0; 9270 cp->ReplyQueue = 0; 9271 cp->tag = 9272 cpu_to_le64((i << DIRECT_LOOKUP_SHIFT)); 9273 cp->host_addr = 9274 cpu_to_le64(h->ioaccel_cmd_pool_dhandle + 9275 (i * sizeof(struct io_accel1_cmd))); 9276 } 9277 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9278 u64 cfg_offset, cfg_base_addr_index; 9279 u32 bft2_offset, cfg_base_addr; 9280 int rc; 9281 9282 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 9283 &cfg_base_addr_index, &cfg_offset); 9284 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64); 9285 bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ; 9286 calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg, 9287 4, h->ioaccel2_blockFetchTable); 9288 bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset); 9289 BUILD_BUG_ON(offsetof(struct CfgTable, 9290 io_accel_request_size_offset) != 0xb8); 9291 h->ioaccel2_bft2_regs = 9292 remap_pci_mem(pci_resource_start(h->pdev, 9293 cfg_base_addr_index) + 9294 cfg_offset + bft2_offset, 9295 ARRAY_SIZE(bft2) * 9296 sizeof(*h->ioaccel2_bft2_regs)); 9297 for (i = 0; i < ARRAY_SIZE(bft2); i++) 9298 writel(bft2[i], &h->ioaccel2_bft2_regs[i]); 9299 } 9300 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 9301 if (hpsa_wait_for_mode_change_ack(h)) { 9302 dev_err(&h->pdev->dev, 9303 "performant mode problem - enabling ioaccel mode\n"); 9304 return -ENODEV; 9305 } 9306 return 0; 9307 } 9308 9309 /* Free ioaccel1 mode command blocks and block fetch table */ 9310 static void hpsa_free_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9311 { 9312 if (h->ioaccel_cmd_pool) { 9313 pci_free_consistent(h->pdev, 9314 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9315 h->ioaccel_cmd_pool, 9316 h->ioaccel_cmd_pool_dhandle); 9317 h->ioaccel_cmd_pool = NULL; 9318 h->ioaccel_cmd_pool_dhandle = 0; 9319 } 9320 kfree(h->ioaccel1_blockFetchTable); 9321 h->ioaccel1_blockFetchTable = NULL; 9322 } 9323 9324 /* Allocate ioaccel1 mode command blocks and block fetch table */ 9325 static int hpsa_alloc_ioaccel1_cmd_and_bft(struct ctlr_info *h) 9326 { 9327 h->ioaccel_maxsg = 9328 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9329 if (h->ioaccel_maxsg > IOACCEL1_MAXSGENTRIES) 9330 h->ioaccel_maxsg = IOACCEL1_MAXSGENTRIES; 9331 9332 /* Command structures must be aligned on a 128-byte boundary 9333 * because the 7 lower bits of the address are used by the 9334 * hardware. 9335 */ 9336 BUILD_BUG_ON(sizeof(struct io_accel1_cmd) % 9337 IOACCEL1_COMMANDLIST_ALIGNMENT); 9338 h->ioaccel_cmd_pool = 9339 dma_alloc_coherent(&h->pdev->dev, 9340 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool), 9341 &h->ioaccel_cmd_pool_dhandle, GFP_KERNEL); 9342 9343 h->ioaccel1_blockFetchTable = 9344 kmalloc(((h->ioaccel_maxsg + 1) * 9345 sizeof(u32)), GFP_KERNEL); 9346 9347 if ((h->ioaccel_cmd_pool == NULL) || 9348 (h->ioaccel1_blockFetchTable == NULL)) 9349 goto clean_up; 9350 9351 memset(h->ioaccel_cmd_pool, 0, 9352 h->nr_cmds * sizeof(*h->ioaccel_cmd_pool)); 9353 return 0; 9354 9355 clean_up: 9356 hpsa_free_ioaccel1_cmd_and_bft(h); 9357 return -ENOMEM; 9358 } 9359 9360 /* Free ioaccel2 mode command blocks and block fetch table */ 9361 static void hpsa_free_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9362 { 9363 hpsa_free_ioaccel2_sg_chain_blocks(h); 9364 9365 if (h->ioaccel2_cmd_pool) { 9366 pci_free_consistent(h->pdev, 9367 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9368 h->ioaccel2_cmd_pool, 9369 h->ioaccel2_cmd_pool_dhandle); 9370 h->ioaccel2_cmd_pool = NULL; 9371 h->ioaccel2_cmd_pool_dhandle = 0; 9372 } 9373 kfree(h->ioaccel2_blockFetchTable); 9374 h->ioaccel2_blockFetchTable = NULL; 9375 } 9376 9377 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9378 static int hpsa_alloc_ioaccel2_cmd_and_bft(struct ctlr_info *h) 9379 { 9380 int rc; 9381 9382 /* Allocate ioaccel2 mode command blocks and block fetch table */ 9383 9384 h->ioaccel_maxsg = 9385 readl(&(h->cfgtable->io_accel_max_embedded_sg_count)); 9386 if (h->ioaccel_maxsg > IOACCEL2_MAXSGENTRIES) 9387 h->ioaccel_maxsg = IOACCEL2_MAXSGENTRIES; 9388 9389 BUILD_BUG_ON(sizeof(struct io_accel2_cmd) % 9390 IOACCEL2_COMMANDLIST_ALIGNMENT); 9391 h->ioaccel2_cmd_pool = 9392 dma_alloc_coherent(&h->pdev->dev, 9393 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool), 9394 &h->ioaccel2_cmd_pool_dhandle, GFP_KERNEL); 9395 9396 h->ioaccel2_blockFetchTable = 9397 kmalloc(((h->ioaccel_maxsg + 1) * 9398 sizeof(u32)), GFP_KERNEL); 9399 9400 if ((h->ioaccel2_cmd_pool == NULL) || 9401 (h->ioaccel2_blockFetchTable == NULL)) { 9402 rc = -ENOMEM; 9403 goto clean_up; 9404 } 9405 9406 rc = hpsa_allocate_ioaccel2_sg_chain_blocks(h); 9407 if (rc) 9408 goto clean_up; 9409 9410 memset(h->ioaccel2_cmd_pool, 0, 9411 h->nr_cmds * sizeof(*h->ioaccel2_cmd_pool)); 9412 return 0; 9413 9414 clean_up: 9415 hpsa_free_ioaccel2_cmd_and_bft(h); 9416 return rc; 9417 } 9418 9419 /* Free items allocated by hpsa_put_ctlr_into_performant_mode */ 9420 static void hpsa_free_performant_mode(struct ctlr_info *h) 9421 { 9422 kfree(h->blockFetchTable); 9423 h->blockFetchTable = NULL; 9424 hpsa_free_reply_queues(h); 9425 hpsa_free_ioaccel1_cmd_and_bft(h); 9426 hpsa_free_ioaccel2_cmd_and_bft(h); 9427 } 9428 9429 /* return -ENODEV on error, 0 on success (or no action) 9430 * allocates numerous items that must be freed later 9431 */ 9432 static int hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 9433 { 9434 u32 trans_support; 9435 unsigned long transMethod = CFGTBL_Trans_Performant | 9436 CFGTBL_Trans_use_short_tags; 9437 int i, rc; 9438 9439 if (hpsa_simple_mode) 9440 return 0; 9441 9442 trans_support = readl(&(h->cfgtable->TransportSupport)); 9443 if (!(trans_support & PERFORMANT_MODE)) 9444 return 0; 9445 9446 /* Check for I/O accelerator mode support */ 9447 if (trans_support & CFGTBL_Trans_io_accel1) { 9448 transMethod |= CFGTBL_Trans_io_accel1 | 9449 CFGTBL_Trans_enable_directed_msix; 9450 rc = hpsa_alloc_ioaccel1_cmd_and_bft(h); 9451 if (rc) 9452 return rc; 9453 } else if (trans_support & CFGTBL_Trans_io_accel2) { 9454 transMethod |= CFGTBL_Trans_io_accel2 | 9455 CFGTBL_Trans_enable_directed_msix; 9456 rc = hpsa_alloc_ioaccel2_cmd_and_bft(h); 9457 if (rc) 9458 return rc; 9459 } 9460 9461 h->nreply_queues = h->msix_vectors > 0 ? h->msix_vectors : 1; 9462 hpsa_get_max_perf_mode_cmds(h); 9463 /* Performant mode ring buffer and supporting data structures */ 9464 h->reply_queue_size = h->max_commands * sizeof(u64); 9465 9466 for (i = 0; i < h->nreply_queues; i++) { 9467 h->reply_queue[i].head = dma_alloc_coherent(&h->pdev->dev, 9468 h->reply_queue_size, 9469 &h->reply_queue[i].busaddr, 9470 GFP_KERNEL); 9471 if (!h->reply_queue[i].head) { 9472 rc = -ENOMEM; 9473 goto clean1; /* rq, ioaccel */ 9474 } 9475 h->reply_queue[i].size = h->max_commands; 9476 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 9477 h->reply_queue[i].current_entry = 0; 9478 } 9479 9480 /* Need a block fetch table for performant mode */ 9481 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 9482 sizeof(u32)), GFP_KERNEL); 9483 if (!h->blockFetchTable) { 9484 rc = -ENOMEM; 9485 goto clean1; /* rq, ioaccel */ 9486 } 9487 9488 rc = hpsa_enter_performant_mode(h, trans_support); 9489 if (rc) 9490 goto clean2; /* bft, rq, ioaccel */ 9491 return 0; 9492 9493 clean2: /* bft, rq, ioaccel */ 9494 kfree(h->blockFetchTable); 9495 h->blockFetchTable = NULL; 9496 clean1: /* rq, ioaccel */ 9497 hpsa_free_reply_queues(h); 9498 hpsa_free_ioaccel1_cmd_and_bft(h); 9499 hpsa_free_ioaccel2_cmd_and_bft(h); 9500 return rc; 9501 } 9502 9503 static int is_accelerated_cmd(struct CommandList *c) 9504 { 9505 return c->cmd_type == CMD_IOACCEL1 || c->cmd_type == CMD_IOACCEL2; 9506 } 9507 9508 static void hpsa_drain_accel_commands(struct ctlr_info *h) 9509 { 9510 struct CommandList *c = NULL; 9511 int i, accel_cmds_out; 9512 int refcount; 9513 9514 do { /* wait for all outstanding ioaccel commands to drain out */ 9515 accel_cmds_out = 0; 9516 for (i = 0; i < h->nr_cmds; i++) { 9517 c = h->cmd_pool + i; 9518 refcount = atomic_inc_return(&c->refcount); 9519 if (refcount > 1) /* Command is allocated */ 9520 accel_cmds_out += is_accelerated_cmd(c); 9521 cmd_free(h, c); 9522 } 9523 if (accel_cmds_out <= 0) 9524 break; 9525 msleep(100); 9526 } while (1); 9527 } 9528 9529 static struct hpsa_sas_phy *hpsa_alloc_sas_phy( 9530 struct hpsa_sas_port *hpsa_sas_port) 9531 { 9532 struct hpsa_sas_phy *hpsa_sas_phy; 9533 struct sas_phy *phy; 9534 9535 hpsa_sas_phy = kzalloc(sizeof(*hpsa_sas_phy), GFP_KERNEL); 9536 if (!hpsa_sas_phy) 9537 return NULL; 9538 9539 phy = sas_phy_alloc(hpsa_sas_port->parent_node->parent_dev, 9540 hpsa_sas_port->next_phy_index); 9541 if (!phy) { 9542 kfree(hpsa_sas_phy); 9543 return NULL; 9544 } 9545 9546 hpsa_sas_port->next_phy_index++; 9547 hpsa_sas_phy->phy = phy; 9548 hpsa_sas_phy->parent_port = hpsa_sas_port; 9549 9550 return hpsa_sas_phy; 9551 } 9552 9553 static void hpsa_free_sas_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9554 { 9555 struct sas_phy *phy = hpsa_sas_phy->phy; 9556 9557 sas_port_delete_phy(hpsa_sas_phy->parent_port->port, phy); 9558 if (hpsa_sas_phy->added_to_port) 9559 list_del(&hpsa_sas_phy->phy_list_entry); 9560 sas_phy_delete(phy); 9561 kfree(hpsa_sas_phy); 9562 } 9563 9564 static int hpsa_sas_port_add_phy(struct hpsa_sas_phy *hpsa_sas_phy) 9565 { 9566 int rc; 9567 struct hpsa_sas_port *hpsa_sas_port; 9568 struct sas_phy *phy; 9569 struct sas_identify *identify; 9570 9571 hpsa_sas_port = hpsa_sas_phy->parent_port; 9572 phy = hpsa_sas_phy->phy; 9573 9574 identify = &phy->identify; 9575 memset(identify, 0, sizeof(*identify)); 9576 identify->sas_address = hpsa_sas_port->sas_address; 9577 identify->device_type = SAS_END_DEVICE; 9578 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9579 identify->target_port_protocols = SAS_PROTOCOL_STP; 9580 phy->minimum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9581 phy->maximum_linkrate_hw = SAS_LINK_RATE_UNKNOWN; 9582 phy->minimum_linkrate = SAS_LINK_RATE_UNKNOWN; 9583 phy->maximum_linkrate = SAS_LINK_RATE_UNKNOWN; 9584 phy->negotiated_linkrate = SAS_LINK_RATE_UNKNOWN; 9585 9586 rc = sas_phy_add(hpsa_sas_phy->phy); 9587 if (rc) 9588 return rc; 9589 9590 sas_port_add_phy(hpsa_sas_port->port, hpsa_sas_phy->phy); 9591 list_add_tail(&hpsa_sas_phy->phy_list_entry, 9592 &hpsa_sas_port->phy_list_head); 9593 hpsa_sas_phy->added_to_port = true; 9594 9595 return 0; 9596 } 9597 9598 static int 9599 hpsa_sas_port_add_rphy(struct hpsa_sas_port *hpsa_sas_port, 9600 struct sas_rphy *rphy) 9601 { 9602 struct sas_identify *identify; 9603 9604 identify = &rphy->identify; 9605 identify->sas_address = hpsa_sas_port->sas_address; 9606 identify->initiator_port_protocols = SAS_PROTOCOL_STP; 9607 identify->target_port_protocols = SAS_PROTOCOL_STP; 9608 9609 return sas_rphy_add(rphy); 9610 } 9611 9612 static struct hpsa_sas_port 9613 *hpsa_alloc_sas_port(struct hpsa_sas_node *hpsa_sas_node, 9614 u64 sas_address) 9615 { 9616 int rc; 9617 struct hpsa_sas_port *hpsa_sas_port; 9618 struct sas_port *port; 9619 9620 hpsa_sas_port = kzalloc(sizeof(*hpsa_sas_port), GFP_KERNEL); 9621 if (!hpsa_sas_port) 9622 return NULL; 9623 9624 INIT_LIST_HEAD(&hpsa_sas_port->phy_list_head); 9625 hpsa_sas_port->parent_node = hpsa_sas_node; 9626 9627 port = sas_port_alloc_num(hpsa_sas_node->parent_dev); 9628 if (!port) 9629 goto free_hpsa_port; 9630 9631 rc = sas_port_add(port); 9632 if (rc) 9633 goto free_sas_port; 9634 9635 hpsa_sas_port->port = port; 9636 hpsa_sas_port->sas_address = sas_address; 9637 list_add_tail(&hpsa_sas_port->port_list_entry, 9638 &hpsa_sas_node->port_list_head); 9639 9640 return hpsa_sas_port; 9641 9642 free_sas_port: 9643 sas_port_free(port); 9644 free_hpsa_port: 9645 kfree(hpsa_sas_port); 9646 9647 return NULL; 9648 } 9649 9650 static void hpsa_free_sas_port(struct hpsa_sas_port *hpsa_sas_port) 9651 { 9652 struct hpsa_sas_phy *hpsa_sas_phy; 9653 struct hpsa_sas_phy *next; 9654 9655 list_for_each_entry_safe(hpsa_sas_phy, next, 9656 &hpsa_sas_port->phy_list_head, phy_list_entry) 9657 hpsa_free_sas_phy(hpsa_sas_phy); 9658 9659 sas_port_delete(hpsa_sas_port->port); 9660 list_del(&hpsa_sas_port->port_list_entry); 9661 kfree(hpsa_sas_port); 9662 } 9663 9664 static struct hpsa_sas_node *hpsa_alloc_sas_node(struct device *parent_dev) 9665 { 9666 struct hpsa_sas_node *hpsa_sas_node; 9667 9668 hpsa_sas_node = kzalloc(sizeof(*hpsa_sas_node), GFP_KERNEL); 9669 if (hpsa_sas_node) { 9670 hpsa_sas_node->parent_dev = parent_dev; 9671 INIT_LIST_HEAD(&hpsa_sas_node->port_list_head); 9672 } 9673 9674 return hpsa_sas_node; 9675 } 9676 9677 static void hpsa_free_sas_node(struct hpsa_sas_node *hpsa_sas_node) 9678 { 9679 struct hpsa_sas_port *hpsa_sas_port; 9680 struct hpsa_sas_port *next; 9681 9682 if (!hpsa_sas_node) 9683 return; 9684 9685 list_for_each_entry_safe(hpsa_sas_port, next, 9686 &hpsa_sas_node->port_list_head, port_list_entry) 9687 hpsa_free_sas_port(hpsa_sas_port); 9688 9689 kfree(hpsa_sas_node); 9690 } 9691 9692 static struct hpsa_scsi_dev_t 9693 *hpsa_find_device_by_sas_rphy(struct ctlr_info *h, 9694 struct sas_rphy *rphy) 9695 { 9696 int i; 9697 struct hpsa_scsi_dev_t *device; 9698 9699 for (i = 0; i < h->ndevices; i++) { 9700 device = h->dev[i]; 9701 if (!device->sas_port) 9702 continue; 9703 if (device->sas_port->rphy == rphy) 9704 return device; 9705 } 9706 9707 return NULL; 9708 } 9709 9710 static int hpsa_add_sas_host(struct ctlr_info *h) 9711 { 9712 int rc; 9713 struct device *parent_dev; 9714 struct hpsa_sas_node *hpsa_sas_node; 9715 struct hpsa_sas_port *hpsa_sas_port; 9716 struct hpsa_sas_phy *hpsa_sas_phy; 9717 9718 parent_dev = &h->scsi_host->shost_dev; 9719 9720 hpsa_sas_node = hpsa_alloc_sas_node(parent_dev); 9721 if (!hpsa_sas_node) 9722 return -ENOMEM; 9723 9724 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, h->sas_address); 9725 if (!hpsa_sas_port) { 9726 rc = -ENODEV; 9727 goto free_sas_node; 9728 } 9729 9730 hpsa_sas_phy = hpsa_alloc_sas_phy(hpsa_sas_port); 9731 if (!hpsa_sas_phy) { 9732 rc = -ENODEV; 9733 goto free_sas_port; 9734 } 9735 9736 rc = hpsa_sas_port_add_phy(hpsa_sas_phy); 9737 if (rc) 9738 goto free_sas_phy; 9739 9740 h->sas_host = hpsa_sas_node; 9741 9742 return 0; 9743 9744 free_sas_phy: 9745 hpsa_free_sas_phy(hpsa_sas_phy); 9746 free_sas_port: 9747 hpsa_free_sas_port(hpsa_sas_port); 9748 free_sas_node: 9749 hpsa_free_sas_node(hpsa_sas_node); 9750 9751 return rc; 9752 } 9753 9754 static void hpsa_delete_sas_host(struct ctlr_info *h) 9755 { 9756 hpsa_free_sas_node(h->sas_host); 9757 } 9758 9759 static int hpsa_add_sas_device(struct hpsa_sas_node *hpsa_sas_node, 9760 struct hpsa_scsi_dev_t *device) 9761 { 9762 int rc; 9763 struct hpsa_sas_port *hpsa_sas_port; 9764 struct sas_rphy *rphy; 9765 9766 hpsa_sas_port = hpsa_alloc_sas_port(hpsa_sas_node, device->sas_address); 9767 if (!hpsa_sas_port) 9768 return -ENOMEM; 9769 9770 rphy = sas_end_device_alloc(hpsa_sas_port->port); 9771 if (!rphy) { 9772 rc = -ENODEV; 9773 goto free_sas_port; 9774 } 9775 9776 hpsa_sas_port->rphy = rphy; 9777 device->sas_port = hpsa_sas_port; 9778 9779 rc = hpsa_sas_port_add_rphy(hpsa_sas_port, rphy); 9780 if (rc) 9781 goto free_sas_port; 9782 9783 return 0; 9784 9785 free_sas_port: 9786 hpsa_free_sas_port(hpsa_sas_port); 9787 device->sas_port = NULL; 9788 9789 return rc; 9790 } 9791 9792 static void hpsa_remove_sas_device(struct hpsa_scsi_dev_t *device) 9793 { 9794 if (device->sas_port) { 9795 hpsa_free_sas_port(device->sas_port); 9796 device->sas_port = NULL; 9797 } 9798 } 9799 9800 static int 9801 hpsa_sas_get_linkerrors(struct sas_phy *phy) 9802 { 9803 return 0; 9804 } 9805 9806 static int 9807 hpsa_sas_get_enclosure_identifier(struct sas_rphy *rphy, u64 *identifier) 9808 { 9809 struct Scsi_Host *shost = phy_to_shost(rphy); 9810 struct ctlr_info *h; 9811 struct hpsa_scsi_dev_t *sd; 9812 9813 if (!shost) 9814 return -ENXIO; 9815 9816 h = shost_to_hba(shost); 9817 9818 if (!h) 9819 return -ENXIO; 9820 9821 sd = hpsa_find_device_by_sas_rphy(h, rphy); 9822 if (!sd) 9823 return -ENXIO; 9824 9825 *identifier = sd->eli; 9826 9827 return 0; 9828 } 9829 9830 static int 9831 hpsa_sas_get_bay_identifier(struct sas_rphy *rphy) 9832 { 9833 return -ENXIO; 9834 } 9835 9836 static int 9837 hpsa_sas_phy_reset(struct sas_phy *phy, int hard_reset) 9838 { 9839 return 0; 9840 } 9841 9842 static int 9843 hpsa_sas_phy_enable(struct sas_phy *phy, int enable) 9844 { 9845 return 0; 9846 } 9847 9848 static int 9849 hpsa_sas_phy_setup(struct sas_phy *phy) 9850 { 9851 return 0; 9852 } 9853 9854 static void 9855 hpsa_sas_phy_release(struct sas_phy *phy) 9856 { 9857 } 9858 9859 static int 9860 hpsa_sas_phy_speed(struct sas_phy *phy, struct sas_phy_linkrates *rates) 9861 { 9862 return -EINVAL; 9863 } 9864 9865 static struct sas_function_template hpsa_sas_transport_functions = { 9866 .get_linkerrors = hpsa_sas_get_linkerrors, 9867 .get_enclosure_identifier = hpsa_sas_get_enclosure_identifier, 9868 .get_bay_identifier = hpsa_sas_get_bay_identifier, 9869 .phy_reset = hpsa_sas_phy_reset, 9870 .phy_enable = hpsa_sas_phy_enable, 9871 .phy_setup = hpsa_sas_phy_setup, 9872 .phy_release = hpsa_sas_phy_release, 9873 .set_phy_speed = hpsa_sas_phy_speed, 9874 }; 9875 9876 /* 9877 * This is it. Register the PCI driver information for the cards we control 9878 * the OS will call our registered routines when it finds one of our cards. 9879 */ 9880 static int __init hpsa_init(void) 9881 { 9882 int rc; 9883 9884 hpsa_sas_transport_template = 9885 sas_attach_transport(&hpsa_sas_transport_functions); 9886 if (!hpsa_sas_transport_template) 9887 return -ENODEV; 9888 9889 rc = pci_register_driver(&hpsa_pci_driver); 9890 9891 if (rc) 9892 sas_release_transport(hpsa_sas_transport_template); 9893 9894 return rc; 9895 } 9896 9897 static void __exit hpsa_cleanup(void) 9898 { 9899 pci_unregister_driver(&hpsa_pci_driver); 9900 sas_release_transport(hpsa_sas_transport_template); 9901 } 9902 9903 static void __attribute__((unused)) verify_offsets(void) 9904 { 9905 #define VERIFY_OFFSET(member, offset) \ 9906 BUILD_BUG_ON(offsetof(struct raid_map_data, member) != offset) 9907 9908 VERIFY_OFFSET(structure_size, 0); 9909 VERIFY_OFFSET(volume_blk_size, 4); 9910 VERIFY_OFFSET(volume_blk_cnt, 8); 9911 VERIFY_OFFSET(phys_blk_shift, 16); 9912 VERIFY_OFFSET(parity_rotation_shift, 17); 9913 VERIFY_OFFSET(strip_size, 18); 9914 VERIFY_OFFSET(disk_starting_blk, 20); 9915 VERIFY_OFFSET(disk_blk_cnt, 28); 9916 VERIFY_OFFSET(data_disks_per_row, 36); 9917 VERIFY_OFFSET(metadata_disks_per_row, 38); 9918 VERIFY_OFFSET(row_cnt, 40); 9919 VERIFY_OFFSET(layout_map_count, 42); 9920 VERIFY_OFFSET(flags, 44); 9921 VERIFY_OFFSET(dekindex, 46); 9922 /* VERIFY_OFFSET(reserved, 48 */ 9923 VERIFY_OFFSET(data, 64); 9924 9925 #undef VERIFY_OFFSET 9926 9927 #define VERIFY_OFFSET(member, offset) \ 9928 BUILD_BUG_ON(offsetof(struct io_accel2_cmd, member) != offset) 9929 9930 VERIFY_OFFSET(IU_type, 0); 9931 VERIFY_OFFSET(direction, 1); 9932 VERIFY_OFFSET(reply_queue, 2); 9933 /* VERIFY_OFFSET(reserved1, 3); */ 9934 VERIFY_OFFSET(scsi_nexus, 4); 9935 VERIFY_OFFSET(Tag, 8); 9936 VERIFY_OFFSET(cdb, 16); 9937 VERIFY_OFFSET(cciss_lun, 32); 9938 VERIFY_OFFSET(data_len, 40); 9939 VERIFY_OFFSET(cmd_priority_task_attr, 44); 9940 VERIFY_OFFSET(sg_count, 45); 9941 /* VERIFY_OFFSET(reserved3 */ 9942 VERIFY_OFFSET(err_ptr, 48); 9943 VERIFY_OFFSET(err_len, 56); 9944 /* VERIFY_OFFSET(reserved4 */ 9945 VERIFY_OFFSET(sg, 64); 9946 9947 #undef VERIFY_OFFSET 9948 9949 #define VERIFY_OFFSET(member, offset) \ 9950 BUILD_BUG_ON(offsetof(struct io_accel1_cmd, member) != offset) 9951 9952 VERIFY_OFFSET(dev_handle, 0x00); 9953 VERIFY_OFFSET(reserved1, 0x02); 9954 VERIFY_OFFSET(function, 0x03); 9955 VERIFY_OFFSET(reserved2, 0x04); 9956 VERIFY_OFFSET(err_info, 0x0C); 9957 VERIFY_OFFSET(reserved3, 0x10); 9958 VERIFY_OFFSET(err_info_len, 0x12); 9959 VERIFY_OFFSET(reserved4, 0x13); 9960 VERIFY_OFFSET(sgl_offset, 0x14); 9961 VERIFY_OFFSET(reserved5, 0x15); 9962 VERIFY_OFFSET(transfer_len, 0x1C); 9963 VERIFY_OFFSET(reserved6, 0x20); 9964 VERIFY_OFFSET(io_flags, 0x24); 9965 VERIFY_OFFSET(reserved7, 0x26); 9966 VERIFY_OFFSET(LUN, 0x34); 9967 VERIFY_OFFSET(control, 0x3C); 9968 VERIFY_OFFSET(CDB, 0x40); 9969 VERIFY_OFFSET(reserved8, 0x50); 9970 VERIFY_OFFSET(host_context_flags, 0x60); 9971 VERIFY_OFFSET(timeout_sec, 0x62); 9972 VERIFY_OFFSET(ReplyQueue, 0x64); 9973 VERIFY_OFFSET(reserved9, 0x65); 9974 VERIFY_OFFSET(tag, 0x68); 9975 VERIFY_OFFSET(host_addr, 0x70); 9976 VERIFY_OFFSET(CISS_LUN, 0x78); 9977 VERIFY_OFFSET(SG, 0x78 + 8); 9978 #undef VERIFY_OFFSET 9979 } 9980 9981 module_init(hpsa_init); 9982 module_exit(hpsa_cleanup); 9983