1 /* 2 * Disk Array driver for HP Smart Array SAS controllers 3 * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; version 2 of the License. 8 * 9 * This program is distributed in the hope that it will be useful, 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or 12 * NON INFRINGEMENT. See the GNU General Public License for more details. 13 * 14 * You should have received a copy of the GNU General Public License 15 * along with this program; if not, write to the Free Software 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 17 * 18 * Questions/Comments/Bugfixes to iss_storagedev@hp.com 19 * 20 */ 21 22 #include <linux/module.h> 23 #include <linux/interrupt.h> 24 #include <linux/types.h> 25 #include <linux/pci.h> 26 #include <linux/pci-aspm.h> 27 #include <linux/kernel.h> 28 #include <linux/slab.h> 29 #include <linux/delay.h> 30 #include <linux/fs.h> 31 #include <linux/timer.h> 32 #include <linux/seq_file.h> 33 #include <linux/init.h> 34 #include <linux/spinlock.h> 35 #include <linux/compat.h> 36 #include <linux/blktrace_api.h> 37 #include <linux/uaccess.h> 38 #include <linux/io.h> 39 #include <linux/dma-mapping.h> 40 #include <linux/completion.h> 41 #include <linux/moduleparam.h> 42 #include <scsi/scsi.h> 43 #include <scsi/scsi_cmnd.h> 44 #include <scsi/scsi_device.h> 45 #include <scsi/scsi_host.h> 46 #include <scsi/scsi_tcq.h> 47 #include <linux/cciss_ioctl.h> 48 #include <linux/string.h> 49 #include <linux/bitmap.h> 50 #include <linux/atomic.h> 51 #include <linux/kthread.h> 52 #include <linux/jiffies.h> 53 #include "hpsa_cmd.h" 54 #include "hpsa.h" 55 56 /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ 57 #define HPSA_DRIVER_VERSION "3.4.0-1" 58 #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" 59 #define HPSA "hpsa" 60 61 /* How long to wait (in milliseconds) for board to go into simple mode */ 62 #define MAX_CONFIG_WAIT 30000 63 #define MAX_IOCTL_CONFIG_WAIT 1000 64 65 /*define how many times we will try a command because of bus resets */ 66 #define MAX_CMD_RETRIES 3 67 68 /* Embedded module documentation macros - see modules.h */ 69 MODULE_AUTHOR("Hewlett-Packard Company"); 70 MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ 71 HPSA_DRIVER_VERSION); 72 MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); 73 MODULE_VERSION(HPSA_DRIVER_VERSION); 74 MODULE_LICENSE("GPL"); 75 76 static int hpsa_allow_any; 77 module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); 78 MODULE_PARM_DESC(hpsa_allow_any, 79 "Allow hpsa driver to access unknown HP Smart Array hardware"); 80 static int hpsa_simple_mode; 81 module_param(hpsa_simple_mode, int, S_IRUGO|S_IWUSR); 82 MODULE_PARM_DESC(hpsa_simple_mode, 83 "Use 'simple mode' rather than 'performant mode'"); 84 85 /* define the PCI info for the cards we can control */ 86 static const struct pci_device_id hpsa_pci_device_id[] = { 87 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, 88 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, 89 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, 90 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, 91 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 92 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 93 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 94 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3233}, 95 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3350}, 96 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3351}, 97 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3352}, 98 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3353}, 99 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x334D}, 100 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3354}, 101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3355}, 102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSF, 0x103C, 0x3356}, 103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1920}, 104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1921}, 105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1922}, 106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1923}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1924}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1925}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1926}, 110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1928}, 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSH, 0x103C, 0x1929}, 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BD}, 113 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BE}, 114 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21BF}, 115 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C0}, 116 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C1}, 117 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C2}, 118 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C3}, 119 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C4}, 120 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C5}, 121 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C7}, 122 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C8}, 123 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSI, 0x103C, 0x21C9}, 124 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 125 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, 126 {0,} 127 }; 128 129 MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); 130 131 /* board_id = Subsystem Device ID & Vendor ID 132 * product = Marketing Name for the board 133 * access = Address of the struct of function pointers 134 */ 135 static struct board_type products[] = { 136 {0x3241103C, "Smart Array P212", &SA5_access}, 137 {0x3243103C, "Smart Array P410", &SA5_access}, 138 {0x3245103C, "Smart Array P410i", &SA5_access}, 139 {0x3247103C, "Smart Array P411", &SA5_access}, 140 {0x3249103C, "Smart Array P812", &SA5_access}, 141 {0x324A103C, "Smart Array P712m", &SA5_access}, 142 {0x324B103C, "Smart Array P711m", &SA5_access}, 143 {0x3350103C, "Smart Array P222", &SA5_access}, 144 {0x3351103C, "Smart Array P420", &SA5_access}, 145 {0x3352103C, "Smart Array P421", &SA5_access}, 146 {0x3353103C, "Smart Array P822", &SA5_access}, 147 {0x334D103C, "Smart Array P822se", &SA5_access}, 148 {0x3354103C, "Smart Array P420i", &SA5_access}, 149 {0x3355103C, "Smart Array P220i", &SA5_access}, 150 {0x3356103C, "Smart Array P721m", &SA5_access}, 151 {0x1921103C, "Smart Array P830i", &SA5_access}, 152 {0x1922103C, "Smart Array P430", &SA5_access}, 153 {0x1923103C, "Smart Array P431", &SA5_access}, 154 {0x1924103C, "Smart Array P830", &SA5_access}, 155 {0x1926103C, "Smart Array P731m", &SA5_access}, 156 {0x1928103C, "Smart Array P230i", &SA5_access}, 157 {0x1929103C, "Smart Array P530", &SA5_access}, 158 {0x21BD103C, "Smart Array", &SA5_access}, 159 {0x21BE103C, "Smart Array", &SA5_access}, 160 {0x21BF103C, "Smart Array", &SA5_access}, 161 {0x21C0103C, "Smart Array", &SA5_access}, 162 {0x21C1103C, "Smart Array", &SA5_access}, 163 {0x21C2103C, "Smart Array", &SA5_access}, 164 {0x21C3103C, "Smart Array", &SA5_access}, 165 {0x21C4103C, "Smart Array", &SA5_access}, 166 {0x21C5103C, "Smart Array", &SA5_access}, 167 {0x21C7103C, "Smart Array", &SA5_access}, 168 {0x21C8103C, "Smart Array", &SA5_access}, 169 {0x21C9103C, "Smart Array", &SA5_access}, 170 {0xFFFF103C, "Unknown Smart Array", &SA5_access}, 171 }; 172 173 static int number_of_controllers; 174 175 static struct list_head hpsa_ctlr_list = LIST_HEAD_INIT(hpsa_ctlr_list); 176 static spinlock_t lockup_detector_lock; 177 static struct task_struct *hpsa_lockup_detector; 178 179 static irqreturn_t do_hpsa_intr_intx(int irq, void *dev_id); 180 static irqreturn_t do_hpsa_intr_msi(int irq, void *dev_id); 181 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); 182 static void start_io(struct ctlr_info *h); 183 184 #ifdef CONFIG_COMPAT 185 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); 186 #endif 187 188 static void cmd_free(struct ctlr_info *h, struct CommandList *c); 189 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); 190 static struct CommandList *cmd_alloc(struct ctlr_info *h); 191 static struct CommandList *cmd_special_alloc(struct ctlr_info *h); 192 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 193 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 194 int cmd_type); 195 196 static int hpsa_scsi_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 197 static void hpsa_scan_start(struct Scsi_Host *); 198 static int hpsa_scan_finished(struct Scsi_Host *sh, 199 unsigned long elapsed_time); 200 static int hpsa_change_queue_depth(struct scsi_device *sdev, 201 int qdepth, int reason); 202 203 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); 204 static int hpsa_eh_abort_handler(struct scsi_cmnd *scsicmd); 205 static int hpsa_slave_alloc(struct scsi_device *sdev); 206 static void hpsa_slave_destroy(struct scsi_device *sdev); 207 208 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); 209 static int check_for_unit_attention(struct ctlr_info *h, 210 struct CommandList *c); 211 static void check_ioctl_unit_attention(struct ctlr_info *h, 212 struct CommandList *c); 213 /* performant mode helper functions */ 214 static void calc_bucket_map(int *bucket, int num_buckets, 215 int nsgs, int *bucket_map); 216 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h); 217 static inline u32 next_command(struct ctlr_info *h, u8 q); 218 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 219 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 220 u64 *cfg_offset); 221 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 222 unsigned long *memory_bar); 223 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id); 224 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 225 int wait_for_ready); 226 static inline void finish_cmd(struct CommandList *c); 227 #define BOARD_NOT_READY 0 228 #define BOARD_READY 1 229 230 static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) 231 { 232 unsigned long *priv = shost_priv(sdev->host); 233 return (struct ctlr_info *) *priv; 234 } 235 236 static inline struct ctlr_info *shost_to_hba(struct Scsi_Host *sh) 237 { 238 unsigned long *priv = shost_priv(sh); 239 return (struct ctlr_info *) *priv; 240 } 241 242 static int check_for_unit_attention(struct ctlr_info *h, 243 struct CommandList *c) 244 { 245 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) 246 return 0; 247 248 switch (c->err_info->SenseInfo[12]) { 249 case STATE_CHANGED: 250 dev_warn(&h->pdev->dev, HPSA "%d: a state change " 251 "detected, command retried\n", h->ctlr); 252 break; 253 case LUN_FAILED: 254 dev_warn(&h->pdev->dev, HPSA "%d: LUN failure " 255 "detected, action required\n", h->ctlr); 256 break; 257 case REPORT_LUNS_CHANGED: 258 dev_warn(&h->pdev->dev, HPSA "%d: report LUN data " 259 "changed, action required\n", h->ctlr); 260 /* 261 * Note: this REPORT_LUNS_CHANGED condition only occurs on the external 262 * target (array) devices. 263 */ 264 break; 265 case POWER_OR_RESET: 266 dev_warn(&h->pdev->dev, HPSA "%d: a power on " 267 "or device reset detected\n", h->ctlr); 268 break; 269 case UNIT_ATTENTION_CLEARED: 270 dev_warn(&h->pdev->dev, HPSA "%d: unit attention " 271 "cleared by another initiator\n", h->ctlr); 272 break; 273 default: 274 dev_warn(&h->pdev->dev, HPSA "%d: unknown " 275 "unit attention detected\n", h->ctlr); 276 break; 277 } 278 return 1; 279 } 280 281 static int check_for_busy(struct ctlr_info *h, struct CommandList *c) 282 { 283 if (c->err_info->CommandStatus != CMD_TARGET_STATUS || 284 (c->err_info->ScsiStatus != SAM_STAT_BUSY && 285 c->err_info->ScsiStatus != SAM_STAT_TASK_SET_FULL)) 286 return 0; 287 dev_warn(&h->pdev->dev, HPSA "device busy"); 288 return 1; 289 } 290 291 static ssize_t host_store_rescan(struct device *dev, 292 struct device_attribute *attr, 293 const char *buf, size_t count) 294 { 295 struct ctlr_info *h; 296 struct Scsi_Host *shost = class_to_shost(dev); 297 h = shost_to_hba(shost); 298 hpsa_scan_start(h->scsi_host); 299 return count; 300 } 301 302 static ssize_t host_show_firmware_revision(struct device *dev, 303 struct device_attribute *attr, char *buf) 304 { 305 struct ctlr_info *h; 306 struct Scsi_Host *shost = class_to_shost(dev); 307 unsigned char *fwrev; 308 309 h = shost_to_hba(shost); 310 if (!h->hba_inquiry_data) 311 return 0; 312 fwrev = &h->hba_inquiry_data[32]; 313 return snprintf(buf, 20, "%c%c%c%c\n", 314 fwrev[0], fwrev[1], fwrev[2], fwrev[3]); 315 } 316 317 static ssize_t host_show_commands_outstanding(struct device *dev, 318 struct device_attribute *attr, char *buf) 319 { 320 struct Scsi_Host *shost = class_to_shost(dev); 321 struct ctlr_info *h = shost_to_hba(shost); 322 323 return snprintf(buf, 20, "%d\n", h->commands_outstanding); 324 } 325 326 static ssize_t host_show_transport_mode(struct device *dev, 327 struct device_attribute *attr, char *buf) 328 { 329 struct ctlr_info *h; 330 struct Scsi_Host *shost = class_to_shost(dev); 331 332 h = shost_to_hba(shost); 333 return snprintf(buf, 20, "%s\n", 334 h->transMethod & CFGTBL_Trans_Performant ? 335 "performant" : "simple"); 336 } 337 338 /* List of controllers which cannot be hard reset on kexec with reset_devices */ 339 static u32 unresettable_controller[] = { 340 0x324a103C, /* Smart Array P712m */ 341 0x324b103C, /* SmartArray P711m */ 342 0x3223103C, /* Smart Array P800 */ 343 0x3234103C, /* Smart Array P400 */ 344 0x3235103C, /* Smart Array P400i */ 345 0x3211103C, /* Smart Array E200i */ 346 0x3212103C, /* Smart Array E200 */ 347 0x3213103C, /* Smart Array E200i */ 348 0x3214103C, /* Smart Array E200i */ 349 0x3215103C, /* Smart Array E200i */ 350 0x3237103C, /* Smart Array E500 */ 351 0x323D103C, /* Smart Array P700m */ 352 0x40800E11, /* Smart Array 5i */ 353 0x409C0E11, /* Smart Array 6400 */ 354 0x409D0E11, /* Smart Array 6400 EM */ 355 0x40700E11, /* Smart Array 5300 */ 356 0x40820E11, /* Smart Array 532 */ 357 0x40830E11, /* Smart Array 5312 */ 358 0x409A0E11, /* Smart Array 641 */ 359 0x409B0E11, /* Smart Array 642 */ 360 0x40910E11, /* Smart Array 6i */ 361 }; 362 363 /* List of controllers which cannot even be soft reset */ 364 static u32 soft_unresettable_controller[] = { 365 0x40800E11, /* Smart Array 5i */ 366 0x40700E11, /* Smart Array 5300 */ 367 0x40820E11, /* Smart Array 532 */ 368 0x40830E11, /* Smart Array 5312 */ 369 0x409A0E11, /* Smart Array 641 */ 370 0x409B0E11, /* Smart Array 642 */ 371 0x40910E11, /* Smart Array 6i */ 372 /* Exclude 640x boards. These are two pci devices in one slot 373 * which share a battery backed cache module. One controls the 374 * cache, the other accesses the cache through the one that controls 375 * it. If we reset the one controlling the cache, the other will 376 * likely not be happy. Just forbid resetting this conjoined mess. 377 * The 640x isn't really supported by hpsa anyway. 378 */ 379 0x409C0E11, /* Smart Array 6400 */ 380 0x409D0E11, /* Smart Array 6400 EM */ 381 }; 382 383 static int ctlr_is_hard_resettable(u32 board_id) 384 { 385 int i; 386 387 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++) 388 if (unresettable_controller[i] == board_id) 389 return 0; 390 return 1; 391 } 392 393 static int ctlr_is_soft_resettable(u32 board_id) 394 { 395 int i; 396 397 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++) 398 if (soft_unresettable_controller[i] == board_id) 399 return 0; 400 return 1; 401 } 402 403 static int ctlr_is_resettable(u32 board_id) 404 { 405 return ctlr_is_hard_resettable(board_id) || 406 ctlr_is_soft_resettable(board_id); 407 } 408 409 static ssize_t host_show_resettable(struct device *dev, 410 struct device_attribute *attr, char *buf) 411 { 412 struct ctlr_info *h; 413 struct Scsi_Host *shost = class_to_shost(dev); 414 415 h = shost_to_hba(shost); 416 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id)); 417 } 418 419 static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) 420 { 421 return (scsi3addr[3] & 0xC0) == 0x40; 422 } 423 424 static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", 425 "1(ADM)", "UNKNOWN" 426 }; 427 #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) 428 429 static ssize_t raid_level_show(struct device *dev, 430 struct device_attribute *attr, char *buf) 431 { 432 ssize_t l = 0; 433 unsigned char rlevel; 434 struct ctlr_info *h; 435 struct scsi_device *sdev; 436 struct hpsa_scsi_dev_t *hdev; 437 unsigned long flags; 438 439 sdev = to_scsi_device(dev); 440 h = sdev_to_hba(sdev); 441 spin_lock_irqsave(&h->lock, flags); 442 hdev = sdev->hostdata; 443 if (!hdev) { 444 spin_unlock_irqrestore(&h->lock, flags); 445 return -ENODEV; 446 } 447 448 /* Is this even a logical drive? */ 449 if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { 450 spin_unlock_irqrestore(&h->lock, flags); 451 l = snprintf(buf, PAGE_SIZE, "N/A\n"); 452 return l; 453 } 454 455 rlevel = hdev->raid_level; 456 spin_unlock_irqrestore(&h->lock, flags); 457 if (rlevel > RAID_UNKNOWN) 458 rlevel = RAID_UNKNOWN; 459 l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); 460 return l; 461 } 462 463 static ssize_t lunid_show(struct device *dev, 464 struct device_attribute *attr, char *buf) 465 { 466 struct ctlr_info *h; 467 struct scsi_device *sdev; 468 struct hpsa_scsi_dev_t *hdev; 469 unsigned long flags; 470 unsigned char lunid[8]; 471 472 sdev = to_scsi_device(dev); 473 h = sdev_to_hba(sdev); 474 spin_lock_irqsave(&h->lock, flags); 475 hdev = sdev->hostdata; 476 if (!hdev) { 477 spin_unlock_irqrestore(&h->lock, flags); 478 return -ENODEV; 479 } 480 memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); 481 spin_unlock_irqrestore(&h->lock, flags); 482 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", 483 lunid[0], lunid[1], lunid[2], lunid[3], 484 lunid[4], lunid[5], lunid[6], lunid[7]); 485 } 486 487 static ssize_t unique_id_show(struct device *dev, 488 struct device_attribute *attr, char *buf) 489 { 490 struct ctlr_info *h; 491 struct scsi_device *sdev; 492 struct hpsa_scsi_dev_t *hdev; 493 unsigned long flags; 494 unsigned char sn[16]; 495 496 sdev = to_scsi_device(dev); 497 h = sdev_to_hba(sdev); 498 spin_lock_irqsave(&h->lock, flags); 499 hdev = sdev->hostdata; 500 if (!hdev) { 501 spin_unlock_irqrestore(&h->lock, flags); 502 return -ENODEV; 503 } 504 memcpy(sn, hdev->device_id, sizeof(sn)); 505 spin_unlock_irqrestore(&h->lock, flags); 506 return snprintf(buf, 16 * 2 + 2, 507 "%02X%02X%02X%02X%02X%02X%02X%02X" 508 "%02X%02X%02X%02X%02X%02X%02X%02X\n", 509 sn[0], sn[1], sn[2], sn[3], 510 sn[4], sn[5], sn[6], sn[7], 511 sn[8], sn[9], sn[10], sn[11], 512 sn[12], sn[13], sn[14], sn[15]); 513 } 514 515 static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); 516 static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); 517 static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); 518 static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); 519 static DEVICE_ATTR(firmware_revision, S_IRUGO, 520 host_show_firmware_revision, NULL); 521 static DEVICE_ATTR(commands_outstanding, S_IRUGO, 522 host_show_commands_outstanding, NULL); 523 static DEVICE_ATTR(transport_mode, S_IRUGO, 524 host_show_transport_mode, NULL); 525 static DEVICE_ATTR(resettable, S_IRUGO, 526 host_show_resettable, NULL); 527 528 static struct device_attribute *hpsa_sdev_attrs[] = { 529 &dev_attr_raid_level, 530 &dev_attr_lunid, 531 &dev_attr_unique_id, 532 NULL, 533 }; 534 535 static struct device_attribute *hpsa_shost_attrs[] = { 536 &dev_attr_rescan, 537 &dev_attr_firmware_revision, 538 &dev_attr_commands_outstanding, 539 &dev_attr_transport_mode, 540 &dev_attr_resettable, 541 NULL, 542 }; 543 544 static struct scsi_host_template hpsa_driver_template = { 545 .module = THIS_MODULE, 546 .name = HPSA, 547 .proc_name = HPSA, 548 .queuecommand = hpsa_scsi_queue_command, 549 .scan_start = hpsa_scan_start, 550 .scan_finished = hpsa_scan_finished, 551 .change_queue_depth = hpsa_change_queue_depth, 552 .this_id = -1, 553 .use_clustering = ENABLE_CLUSTERING, 554 .eh_abort_handler = hpsa_eh_abort_handler, 555 .eh_device_reset_handler = hpsa_eh_device_reset_handler, 556 .ioctl = hpsa_ioctl, 557 .slave_alloc = hpsa_slave_alloc, 558 .slave_destroy = hpsa_slave_destroy, 559 #ifdef CONFIG_COMPAT 560 .compat_ioctl = hpsa_compat_ioctl, 561 #endif 562 .sdev_attrs = hpsa_sdev_attrs, 563 .shost_attrs = hpsa_shost_attrs, 564 .max_sectors = 8192, 565 }; 566 567 568 /* Enqueuing and dequeuing functions for cmdlists. */ 569 static inline void addQ(struct list_head *list, struct CommandList *c) 570 { 571 list_add_tail(&c->list, list); 572 } 573 574 static inline u32 next_command(struct ctlr_info *h, u8 q) 575 { 576 u32 a; 577 struct reply_pool *rq = &h->reply_queue[q]; 578 unsigned long flags; 579 580 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 581 return h->access.command_completed(h, q); 582 583 if ((rq->head[rq->current_entry] & 1) == rq->wraparound) { 584 a = rq->head[rq->current_entry]; 585 rq->current_entry++; 586 spin_lock_irqsave(&h->lock, flags); 587 h->commands_outstanding--; 588 spin_unlock_irqrestore(&h->lock, flags); 589 } else { 590 a = FIFO_EMPTY; 591 } 592 /* Check for wraparound */ 593 if (rq->current_entry == h->max_commands) { 594 rq->current_entry = 0; 595 rq->wraparound ^= 1; 596 } 597 return a; 598 } 599 600 /* set_performant_mode: Modify the tag for cciss performant 601 * set bit 0 for pull model, bits 3-1 for block fetch 602 * register number 603 */ 604 static void set_performant_mode(struct ctlr_info *h, struct CommandList *c) 605 { 606 if (likely(h->transMethod & CFGTBL_Trans_Performant)) { 607 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1); 608 if (likely(h->msix_vector)) 609 c->Header.ReplyQueue = 610 raw_smp_processor_id() % h->nreply_queues; 611 } 612 } 613 614 static int is_firmware_flash_cmd(u8 *cdb) 615 { 616 return cdb[0] == BMIC_WRITE && cdb[6] == BMIC_FLASH_FIRMWARE; 617 } 618 619 /* 620 * During firmware flash, the heartbeat register may not update as frequently 621 * as it should. So we dial down lockup detection during firmware flash. and 622 * dial it back up when firmware flash completes. 623 */ 624 #define HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH (240 * HZ) 625 #define HEARTBEAT_SAMPLE_INTERVAL (30 * HZ) 626 static void dial_down_lockup_detection_during_fw_flash(struct ctlr_info *h, 627 struct CommandList *c) 628 { 629 if (!is_firmware_flash_cmd(c->Request.CDB)) 630 return; 631 atomic_inc(&h->firmware_flash_in_progress); 632 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL_DURING_FLASH; 633 } 634 635 static void dial_up_lockup_detection_on_fw_flash_complete(struct ctlr_info *h, 636 struct CommandList *c) 637 { 638 if (is_firmware_flash_cmd(c->Request.CDB) && 639 atomic_dec_and_test(&h->firmware_flash_in_progress)) 640 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 641 } 642 643 static void enqueue_cmd_and_start_io(struct ctlr_info *h, 644 struct CommandList *c) 645 { 646 unsigned long flags; 647 648 set_performant_mode(h, c); 649 dial_down_lockup_detection_during_fw_flash(h, c); 650 spin_lock_irqsave(&h->lock, flags); 651 addQ(&h->reqQ, c); 652 h->Qdepth++; 653 spin_unlock_irqrestore(&h->lock, flags); 654 start_io(h); 655 } 656 657 static inline void removeQ(struct CommandList *c) 658 { 659 if (WARN_ON(list_empty(&c->list))) 660 return; 661 list_del_init(&c->list); 662 } 663 664 static inline int is_hba_lunid(unsigned char scsi3addr[]) 665 { 666 return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; 667 } 668 669 static inline int is_scsi_rev_5(struct ctlr_info *h) 670 { 671 if (!h->hba_inquiry_data) 672 return 0; 673 if ((h->hba_inquiry_data[2] & 0x07) == 5) 674 return 1; 675 return 0; 676 } 677 678 static int hpsa_find_target_lun(struct ctlr_info *h, 679 unsigned char scsi3addr[], int bus, int *target, int *lun) 680 { 681 /* finds an unused bus, target, lun for a new physical device 682 * assumes h->devlock is held 683 */ 684 int i, found = 0; 685 DECLARE_BITMAP(lun_taken, HPSA_MAX_DEVICES); 686 687 bitmap_zero(lun_taken, HPSA_MAX_DEVICES); 688 689 for (i = 0; i < h->ndevices; i++) { 690 if (h->dev[i]->bus == bus && h->dev[i]->target != -1) 691 __set_bit(h->dev[i]->target, lun_taken); 692 } 693 694 i = find_first_zero_bit(lun_taken, HPSA_MAX_DEVICES); 695 if (i < HPSA_MAX_DEVICES) { 696 /* *bus = 1; */ 697 *target = i; 698 *lun = 0; 699 found = 1; 700 } 701 return !found; 702 } 703 704 /* Add an entry into h->dev[] array. */ 705 static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, 706 struct hpsa_scsi_dev_t *device, 707 struct hpsa_scsi_dev_t *added[], int *nadded) 708 { 709 /* assumes h->devlock is held */ 710 int n = h->ndevices; 711 int i; 712 unsigned char addr1[8], addr2[8]; 713 struct hpsa_scsi_dev_t *sd; 714 715 if (n >= HPSA_MAX_DEVICES) { 716 dev_err(&h->pdev->dev, "too many devices, some will be " 717 "inaccessible.\n"); 718 return -1; 719 } 720 721 /* physical devices do not have lun or target assigned until now. */ 722 if (device->lun != -1) 723 /* Logical device, lun is already assigned. */ 724 goto lun_assigned; 725 726 /* If this device a non-zero lun of a multi-lun device 727 * byte 4 of the 8-byte LUN addr will contain the logical 728 * unit no, zero otherise. 729 */ 730 if (device->scsi3addr[4] == 0) { 731 /* This is not a non-zero lun of a multi-lun device */ 732 if (hpsa_find_target_lun(h, device->scsi3addr, 733 device->bus, &device->target, &device->lun) != 0) 734 return -1; 735 goto lun_assigned; 736 } 737 738 /* This is a non-zero lun of a multi-lun device. 739 * Search through our list and find the device which 740 * has the same 8 byte LUN address, excepting byte 4. 741 * Assign the same bus and target for this new LUN. 742 * Use the logical unit number from the firmware. 743 */ 744 memcpy(addr1, device->scsi3addr, 8); 745 addr1[4] = 0; 746 for (i = 0; i < n; i++) { 747 sd = h->dev[i]; 748 memcpy(addr2, sd->scsi3addr, 8); 749 addr2[4] = 0; 750 /* differ only in byte 4? */ 751 if (memcmp(addr1, addr2, 8) == 0) { 752 device->bus = sd->bus; 753 device->target = sd->target; 754 device->lun = device->scsi3addr[4]; 755 break; 756 } 757 } 758 if (device->lun == -1) { 759 dev_warn(&h->pdev->dev, "physical device with no LUN=0," 760 " suspect firmware bug or unsupported hardware " 761 "configuration.\n"); 762 return -1; 763 } 764 765 lun_assigned: 766 767 h->dev[n] = device; 768 h->ndevices++; 769 added[*nadded] = device; 770 (*nadded)++; 771 772 /* initially, (before registering with scsi layer) we don't 773 * know our hostno and we don't want to print anything first 774 * time anyway (the scsi layer's inquiries will show that info) 775 */ 776 /* if (hostno != -1) */ 777 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", 778 scsi_device_type(device->devtype), hostno, 779 device->bus, device->target, device->lun); 780 return 0; 781 } 782 783 /* Update an entry in h->dev[] array. */ 784 static void hpsa_scsi_update_entry(struct ctlr_info *h, int hostno, 785 int entry, struct hpsa_scsi_dev_t *new_entry) 786 { 787 /* assumes h->devlock is held */ 788 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 789 790 /* Raid level changed. */ 791 h->dev[entry]->raid_level = new_entry->raid_level; 792 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d updated.\n", 793 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 794 new_entry->target, new_entry->lun); 795 } 796 797 /* Replace an entry from h->dev[] array. */ 798 static void hpsa_scsi_replace_entry(struct ctlr_info *h, int hostno, 799 int entry, struct hpsa_scsi_dev_t *new_entry, 800 struct hpsa_scsi_dev_t *added[], int *nadded, 801 struct hpsa_scsi_dev_t *removed[], int *nremoved) 802 { 803 /* assumes h->devlock is held */ 804 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 805 removed[*nremoved] = h->dev[entry]; 806 (*nremoved)++; 807 808 /* 809 * New physical devices won't have target/lun assigned yet 810 * so we need to preserve the values in the slot we are replacing. 811 */ 812 if (new_entry->target == -1) { 813 new_entry->target = h->dev[entry]->target; 814 new_entry->lun = h->dev[entry]->lun; 815 } 816 817 h->dev[entry] = new_entry; 818 added[*nadded] = new_entry; 819 (*nadded)++; 820 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d changed.\n", 821 scsi_device_type(new_entry->devtype), hostno, new_entry->bus, 822 new_entry->target, new_entry->lun); 823 } 824 825 /* Remove an entry from h->dev[] array. */ 826 static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, 827 struct hpsa_scsi_dev_t *removed[], int *nremoved) 828 { 829 /* assumes h->devlock is held */ 830 int i; 831 struct hpsa_scsi_dev_t *sd; 832 833 BUG_ON(entry < 0 || entry >= HPSA_MAX_DEVICES); 834 835 sd = h->dev[entry]; 836 removed[*nremoved] = h->dev[entry]; 837 (*nremoved)++; 838 839 for (i = entry; i < h->ndevices-1; i++) 840 h->dev[i] = h->dev[i+1]; 841 h->ndevices--; 842 dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", 843 scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, 844 sd->lun); 845 } 846 847 #define SCSI3ADDR_EQ(a, b) ( \ 848 (a)[7] == (b)[7] && \ 849 (a)[6] == (b)[6] && \ 850 (a)[5] == (b)[5] && \ 851 (a)[4] == (b)[4] && \ 852 (a)[3] == (b)[3] && \ 853 (a)[2] == (b)[2] && \ 854 (a)[1] == (b)[1] && \ 855 (a)[0] == (b)[0]) 856 857 static void fixup_botched_add(struct ctlr_info *h, 858 struct hpsa_scsi_dev_t *added) 859 { 860 /* called when scsi_add_device fails in order to re-adjust 861 * h->dev[] to match the mid layer's view. 862 */ 863 unsigned long flags; 864 int i, j; 865 866 spin_lock_irqsave(&h->lock, flags); 867 for (i = 0; i < h->ndevices; i++) { 868 if (h->dev[i] == added) { 869 for (j = i; j < h->ndevices-1; j++) 870 h->dev[j] = h->dev[j+1]; 871 h->ndevices--; 872 break; 873 } 874 } 875 spin_unlock_irqrestore(&h->lock, flags); 876 kfree(added); 877 } 878 879 static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, 880 struct hpsa_scsi_dev_t *dev2) 881 { 882 /* we compare everything except lun and target as these 883 * are not yet assigned. Compare parts likely 884 * to differ first 885 */ 886 if (memcmp(dev1->scsi3addr, dev2->scsi3addr, 887 sizeof(dev1->scsi3addr)) != 0) 888 return 0; 889 if (memcmp(dev1->device_id, dev2->device_id, 890 sizeof(dev1->device_id)) != 0) 891 return 0; 892 if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) 893 return 0; 894 if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) 895 return 0; 896 if (dev1->devtype != dev2->devtype) 897 return 0; 898 if (dev1->bus != dev2->bus) 899 return 0; 900 return 1; 901 } 902 903 static inline int device_updated(struct hpsa_scsi_dev_t *dev1, 904 struct hpsa_scsi_dev_t *dev2) 905 { 906 /* Device attributes that can change, but don't mean 907 * that the device is a different device, nor that the OS 908 * needs to be told anything about the change. 909 */ 910 if (dev1->raid_level != dev2->raid_level) 911 return 1; 912 return 0; 913 } 914 915 /* Find needle in haystack. If exact match found, return DEVICE_SAME, 916 * and return needle location in *index. If scsi3addr matches, but not 917 * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle 918 * location in *index. 919 * In the case of a minor device attribute change, such as RAID level, just 920 * return DEVICE_UPDATED, along with the updated device's location in index. 921 * If needle not found, return DEVICE_NOT_FOUND. 922 */ 923 static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, 924 struct hpsa_scsi_dev_t *haystack[], int haystack_size, 925 int *index) 926 { 927 int i; 928 #define DEVICE_NOT_FOUND 0 929 #define DEVICE_CHANGED 1 930 #define DEVICE_SAME 2 931 #define DEVICE_UPDATED 3 932 for (i = 0; i < haystack_size; i++) { 933 if (haystack[i] == NULL) /* previously removed. */ 934 continue; 935 if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { 936 *index = i; 937 if (device_is_the_same(needle, haystack[i])) { 938 if (device_updated(needle, haystack[i])) 939 return DEVICE_UPDATED; 940 return DEVICE_SAME; 941 } else { 942 return DEVICE_CHANGED; 943 } 944 } 945 } 946 *index = -1; 947 return DEVICE_NOT_FOUND; 948 } 949 950 static void adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, 951 struct hpsa_scsi_dev_t *sd[], int nsds) 952 { 953 /* sd contains scsi3 addresses and devtypes, and inquiry 954 * data. This function takes what's in sd to be the current 955 * reality and updates h->dev[] to reflect that reality. 956 */ 957 int i, entry, device_change, changes = 0; 958 struct hpsa_scsi_dev_t *csd; 959 unsigned long flags; 960 struct hpsa_scsi_dev_t **added, **removed; 961 int nadded, nremoved; 962 struct Scsi_Host *sh = NULL; 963 964 added = kzalloc(sizeof(*added) * HPSA_MAX_DEVICES, GFP_KERNEL); 965 removed = kzalloc(sizeof(*removed) * HPSA_MAX_DEVICES, GFP_KERNEL); 966 967 if (!added || !removed) { 968 dev_warn(&h->pdev->dev, "out of memory in " 969 "adjust_hpsa_scsi_table\n"); 970 goto free_and_out; 971 } 972 973 spin_lock_irqsave(&h->devlock, flags); 974 975 /* find any devices in h->dev[] that are not in 976 * sd[] and remove them from h->dev[], and for any 977 * devices which have changed, remove the old device 978 * info and add the new device info. 979 * If minor device attributes change, just update 980 * the existing device structure. 981 */ 982 i = 0; 983 nremoved = 0; 984 nadded = 0; 985 while (i < h->ndevices) { 986 csd = h->dev[i]; 987 device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); 988 if (device_change == DEVICE_NOT_FOUND) { 989 changes++; 990 hpsa_scsi_remove_entry(h, hostno, i, 991 removed, &nremoved); 992 continue; /* remove ^^^, hence i not incremented */ 993 } else if (device_change == DEVICE_CHANGED) { 994 changes++; 995 hpsa_scsi_replace_entry(h, hostno, i, sd[entry], 996 added, &nadded, removed, &nremoved); 997 /* Set it to NULL to prevent it from being freed 998 * at the bottom of hpsa_update_scsi_devices() 999 */ 1000 sd[entry] = NULL; 1001 } else if (device_change == DEVICE_UPDATED) { 1002 hpsa_scsi_update_entry(h, hostno, i, sd[entry]); 1003 } 1004 i++; 1005 } 1006 1007 /* Now, make sure every device listed in sd[] is also 1008 * listed in h->dev[], adding them if they aren't found 1009 */ 1010 1011 for (i = 0; i < nsds; i++) { 1012 if (!sd[i]) /* if already added above. */ 1013 continue; 1014 device_change = hpsa_scsi_find_entry(sd[i], h->dev, 1015 h->ndevices, &entry); 1016 if (device_change == DEVICE_NOT_FOUND) { 1017 changes++; 1018 if (hpsa_scsi_add_entry(h, hostno, sd[i], 1019 added, &nadded) != 0) 1020 break; 1021 sd[i] = NULL; /* prevent from being freed later. */ 1022 } else if (device_change == DEVICE_CHANGED) { 1023 /* should never happen... */ 1024 changes++; 1025 dev_warn(&h->pdev->dev, 1026 "device unexpectedly changed.\n"); 1027 /* but if it does happen, we just ignore that device */ 1028 } 1029 } 1030 spin_unlock_irqrestore(&h->devlock, flags); 1031 1032 /* Don't notify scsi mid layer of any changes the first time through 1033 * (or if there are no changes) scsi_scan_host will do it later the 1034 * first time through. 1035 */ 1036 if (hostno == -1 || !changes) 1037 goto free_and_out; 1038 1039 sh = h->scsi_host; 1040 /* Notify scsi mid layer of any removed devices */ 1041 for (i = 0; i < nremoved; i++) { 1042 struct scsi_device *sdev = 1043 scsi_device_lookup(sh, removed[i]->bus, 1044 removed[i]->target, removed[i]->lun); 1045 if (sdev != NULL) { 1046 scsi_remove_device(sdev); 1047 scsi_device_put(sdev); 1048 } else { 1049 /* We don't expect to get here. 1050 * future cmds to this device will get selection 1051 * timeout as if the device was gone. 1052 */ 1053 dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " 1054 " for removal.", hostno, removed[i]->bus, 1055 removed[i]->target, removed[i]->lun); 1056 } 1057 kfree(removed[i]); 1058 removed[i] = NULL; 1059 } 1060 1061 /* Notify scsi mid layer of any added devices */ 1062 for (i = 0; i < nadded; i++) { 1063 if (scsi_add_device(sh, added[i]->bus, 1064 added[i]->target, added[i]->lun) == 0) 1065 continue; 1066 dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " 1067 "device not added.\n", hostno, added[i]->bus, 1068 added[i]->target, added[i]->lun); 1069 /* now we have to remove it from h->dev, 1070 * since it didn't get added to scsi mid layer 1071 */ 1072 fixup_botched_add(h, added[i]); 1073 } 1074 1075 free_and_out: 1076 kfree(added); 1077 kfree(removed); 1078 } 1079 1080 /* 1081 * Lookup bus/target/lun and return corresponding struct hpsa_scsi_dev_t * 1082 * Assume's h->devlock is held. 1083 */ 1084 static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, 1085 int bus, int target, int lun) 1086 { 1087 int i; 1088 struct hpsa_scsi_dev_t *sd; 1089 1090 for (i = 0; i < h->ndevices; i++) { 1091 sd = h->dev[i]; 1092 if (sd->bus == bus && sd->target == target && sd->lun == lun) 1093 return sd; 1094 } 1095 return NULL; 1096 } 1097 1098 /* link sdev->hostdata to our per-device structure. */ 1099 static int hpsa_slave_alloc(struct scsi_device *sdev) 1100 { 1101 struct hpsa_scsi_dev_t *sd; 1102 unsigned long flags; 1103 struct ctlr_info *h; 1104 1105 h = sdev_to_hba(sdev); 1106 spin_lock_irqsave(&h->devlock, flags); 1107 sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), 1108 sdev_id(sdev), sdev->lun); 1109 if (sd != NULL) 1110 sdev->hostdata = sd; 1111 spin_unlock_irqrestore(&h->devlock, flags); 1112 return 0; 1113 } 1114 1115 static void hpsa_slave_destroy(struct scsi_device *sdev) 1116 { 1117 /* nothing to do. */ 1118 } 1119 1120 static void hpsa_free_sg_chain_blocks(struct ctlr_info *h) 1121 { 1122 int i; 1123 1124 if (!h->cmd_sg_list) 1125 return; 1126 for (i = 0; i < h->nr_cmds; i++) { 1127 kfree(h->cmd_sg_list[i]); 1128 h->cmd_sg_list[i] = NULL; 1129 } 1130 kfree(h->cmd_sg_list); 1131 h->cmd_sg_list = NULL; 1132 } 1133 1134 static int hpsa_allocate_sg_chain_blocks(struct ctlr_info *h) 1135 { 1136 int i; 1137 1138 if (h->chainsize <= 0) 1139 return 0; 1140 1141 h->cmd_sg_list = kzalloc(sizeof(*h->cmd_sg_list) * h->nr_cmds, 1142 GFP_KERNEL); 1143 if (!h->cmd_sg_list) 1144 return -ENOMEM; 1145 for (i = 0; i < h->nr_cmds; i++) { 1146 h->cmd_sg_list[i] = kmalloc(sizeof(*h->cmd_sg_list[i]) * 1147 h->chainsize, GFP_KERNEL); 1148 if (!h->cmd_sg_list[i]) 1149 goto clean; 1150 } 1151 return 0; 1152 1153 clean: 1154 hpsa_free_sg_chain_blocks(h); 1155 return -ENOMEM; 1156 } 1157 1158 static int hpsa_map_sg_chain_block(struct ctlr_info *h, 1159 struct CommandList *c) 1160 { 1161 struct SGDescriptor *chain_sg, *chain_block; 1162 u64 temp64; 1163 1164 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1165 chain_block = h->cmd_sg_list[c->cmdindex]; 1166 chain_sg->Ext = HPSA_SG_CHAIN; 1167 chain_sg->Len = sizeof(*chain_sg) * 1168 (c->Header.SGTotal - h->max_cmd_sg_entries); 1169 temp64 = pci_map_single(h->pdev, chain_block, chain_sg->Len, 1170 PCI_DMA_TODEVICE); 1171 if (dma_mapping_error(&h->pdev->dev, temp64)) { 1172 /* prevent subsequent unmapping */ 1173 chain_sg->Addr.lower = 0; 1174 chain_sg->Addr.upper = 0; 1175 return -1; 1176 } 1177 chain_sg->Addr.lower = (u32) (temp64 & 0x0FFFFFFFFULL); 1178 chain_sg->Addr.upper = (u32) ((temp64 >> 32) & 0x0FFFFFFFFULL); 1179 return 0; 1180 } 1181 1182 static void hpsa_unmap_sg_chain_block(struct ctlr_info *h, 1183 struct CommandList *c) 1184 { 1185 struct SGDescriptor *chain_sg; 1186 union u64bit temp64; 1187 1188 if (c->Header.SGTotal <= h->max_cmd_sg_entries) 1189 return; 1190 1191 chain_sg = &c->SG[h->max_cmd_sg_entries - 1]; 1192 temp64.val32.lower = chain_sg->Addr.lower; 1193 temp64.val32.upper = chain_sg->Addr.upper; 1194 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE); 1195 } 1196 1197 static void complete_scsi_command(struct CommandList *cp) 1198 { 1199 struct scsi_cmnd *cmd; 1200 struct ctlr_info *h; 1201 struct ErrorInfo *ei; 1202 1203 unsigned char sense_key; 1204 unsigned char asc; /* additional sense code */ 1205 unsigned char ascq; /* additional sense code qualifier */ 1206 unsigned long sense_data_size; 1207 1208 ei = cp->err_info; 1209 cmd = (struct scsi_cmnd *) cp->scsi_cmd; 1210 h = cp->h; 1211 1212 scsi_dma_unmap(cmd); /* undo the DMA mappings */ 1213 if (cp->Header.SGTotal > h->max_cmd_sg_entries) 1214 hpsa_unmap_sg_chain_block(h, cp); 1215 1216 cmd->result = (DID_OK << 16); /* host byte */ 1217 cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ 1218 cmd->result |= ei->ScsiStatus; 1219 1220 /* copy the sense data whether we need to or not. */ 1221 if (SCSI_SENSE_BUFFERSIZE < sizeof(ei->SenseInfo)) 1222 sense_data_size = SCSI_SENSE_BUFFERSIZE; 1223 else 1224 sense_data_size = sizeof(ei->SenseInfo); 1225 if (ei->SenseLen < sense_data_size) 1226 sense_data_size = ei->SenseLen; 1227 1228 memcpy(cmd->sense_buffer, ei->SenseInfo, sense_data_size); 1229 scsi_set_resid(cmd, ei->ResidualCnt); 1230 1231 if (ei->CommandStatus == 0) { 1232 cmd_free(h, cp); 1233 cmd->scsi_done(cmd); 1234 return; 1235 } 1236 1237 /* an error has occurred */ 1238 switch (ei->CommandStatus) { 1239 1240 case CMD_TARGET_STATUS: 1241 if (ei->ScsiStatus) { 1242 /* Get sense key */ 1243 sense_key = 0xf & ei->SenseInfo[2]; 1244 /* Get additional sense code */ 1245 asc = ei->SenseInfo[12]; 1246 /* Get addition sense code qualifier */ 1247 ascq = ei->SenseInfo[13]; 1248 } 1249 1250 if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { 1251 if (check_for_unit_attention(h, cp)) { 1252 cmd->result = DID_SOFT_ERROR << 16; 1253 break; 1254 } 1255 if (sense_key == ILLEGAL_REQUEST) { 1256 /* 1257 * SCSI REPORT_LUNS is commonly unsupported on 1258 * Smart Array. Suppress noisy complaint. 1259 */ 1260 if (cp->Request.CDB[0] == REPORT_LUNS) 1261 break; 1262 1263 /* If ASC/ASCQ indicate Logical Unit 1264 * Not Supported condition, 1265 */ 1266 if ((asc == 0x25) && (ascq == 0x0)) { 1267 dev_warn(&h->pdev->dev, "cp %p " 1268 "has check condition\n", cp); 1269 break; 1270 } 1271 } 1272 1273 if (sense_key == NOT_READY) { 1274 /* If Sense is Not Ready, Logical Unit 1275 * Not ready, Manual Intervention 1276 * required 1277 */ 1278 if ((asc == 0x04) && (ascq == 0x03)) { 1279 dev_warn(&h->pdev->dev, "cp %p " 1280 "has check condition: unit " 1281 "not ready, manual " 1282 "intervention required\n", cp); 1283 break; 1284 } 1285 } 1286 if (sense_key == ABORTED_COMMAND) { 1287 /* Aborted command is retryable */ 1288 dev_warn(&h->pdev->dev, "cp %p " 1289 "has check condition: aborted command: " 1290 "ASC: 0x%x, ASCQ: 0x%x\n", 1291 cp, asc, ascq); 1292 cmd->result = DID_SOFT_ERROR << 16; 1293 break; 1294 } 1295 /* Must be some other type of check condition */ 1296 dev_dbg(&h->pdev->dev, "cp %p has check condition: " 1297 "unknown type: " 1298 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1299 "Returning result: 0x%x, " 1300 "cmd=[%02x %02x %02x %02x %02x " 1301 "%02x %02x %02x %02x %02x %02x " 1302 "%02x %02x %02x %02x %02x]\n", 1303 cp, sense_key, asc, ascq, 1304 cmd->result, 1305 cmd->cmnd[0], cmd->cmnd[1], 1306 cmd->cmnd[2], cmd->cmnd[3], 1307 cmd->cmnd[4], cmd->cmnd[5], 1308 cmd->cmnd[6], cmd->cmnd[7], 1309 cmd->cmnd[8], cmd->cmnd[9], 1310 cmd->cmnd[10], cmd->cmnd[11], 1311 cmd->cmnd[12], cmd->cmnd[13], 1312 cmd->cmnd[14], cmd->cmnd[15]); 1313 break; 1314 } 1315 1316 1317 /* Problem was not a check condition 1318 * Pass it up to the upper layers... 1319 */ 1320 if (ei->ScsiStatus) { 1321 dev_warn(&h->pdev->dev, "cp %p has status 0x%x " 1322 "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " 1323 "Returning result: 0x%x\n", 1324 cp, ei->ScsiStatus, 1325 sense_key, asc, ascq, 1326 cmd->result); 1327 } else { /* scsi status is zero??? How??? */ 1328 dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " 1329 "Returning no connection.\n", cp), 1330 1331 /* Ordinarily, this case should never happen, 1332 * but there is a bug in some released firmware 1333 * revisions that allows it to happen if, for 1334 * example, a 4100 backplane loses power and 1335 * the tape drive is in it. We assume that 1336 * it's a fatal error of some kind because we 1337 * can't show that it wasn't. We will make it 1338 * look like selection timeout since that is 1339 * the most common reason for this to occur, 1340 * and it's severe enough. 1341 */ 1342 1343 cmd->result = DID_NO_CONNECT << 16; 1344 } 1345 break; 1346 1347 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1348 break; 1349 case CMD_DATA_OVERRUN: 1350 dev_warn(&h->pdev->dev, "cp %p has" 1351 " completed with data overrun " 1352 "reported\n", cp); 1353 break; 1354 case CMD_INVALID: { 1355 /* print_bytes(cp, sizeof(*cp), 1, 0); 1356 print_cmd(cp); */ 1357 /* We get CMD_INVALID if you address a non-existent device 1358 * instead of a selection timeout (no response). You will 1359 * see this if you yank out a drive, then try to access it. 1360 * This is kind of a shame because it means that any other 1361 * CMD_INVALID (e.g. driver bug) will get interpreted as a 1362 * missing target. */ 1363 cmd->result = DID_NO_CONNECT << 16; 1364 } 1365 break; 1366 case CMD_PROTOCOL_ERR: 1367 cmd->result = DID_ERROR << 16; 1368 dev_warn(&h->pdev->dev, "cp %p has " 1369 "protocol error\n", cp); 1370 break; 1371 case CMD_HARDWARE_ERR: 1372 cmd->result = DID_ERROR << 16; 1373 dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); 1374 break; 1375 case CMD_CONNECTION_LOST: 1376 cmd->result = DID_ERROR << 16; 1377 dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); 1378 break; 1379 case CMD_ABORTED: 1380 cmd->result = DID_ABORT << 16; 1381 dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", 1382 cp, ei->ScsiStatus); 1383 break; 1384 case CMD_ABORT_FAILED: 1385 cmd->result = DID_ERROR << 16; 1386 dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); 1387 break; 1388 case CMD_UNSOLICITED_ABORT: 1389 cmd->result = DID_SOFT_ERROR << 16; /* retry the command */ 1390 dev_warn(&h->pdev->dev, "cp %p aborted due to an unsolicited " 1391 "abort\n", cp); 1392 break; 1393 case CMD_TIMEOUT: 1394 cmd->result = DID_TIME_OUT << 16; 1395 dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); 1396 break; 1397 case CMD_UNABORTABLE: 1398 cmd->result = DID_ERROR << 16; 1399 dev_warn(&h->pdev->dev, "Command unabortable\n"); 1400 break; 1401 default: 1402 cmd->result = DID_ERROR << 16; 1403 dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", 1404 cp, ei->CommandStatus); 1405 } 1406 cmd_free(h, cp); 1407 cmd->scsi_done(cmd); 1408 } 1409 1410 static void hpsa_pci_unmap(struct pci_dev *pdev, 1411 struct CommandList *c, int sg_used, int data_direction) 1412 { 1413 int i; 1414 union u64bit addr64; 1415 1416 for (i = 0; i < sg_used; i++) { 1417 addr64.val32.lower = c->SG[i].Addr.lower; 1418 addr64.val32.upper = c->SG[i].Addr.upper; 1419 pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, 1420 data_direction); 1421 } 1422 } 1423 1424 static int hpsa_map_one(struct pci_dev *pdev, 1425 struct CommandList *cp, 1426 unsigned char *buf, 1427 size_t buflen, 1428 int data_direction) 1429 { 1430 u64 addr64; 1431 1432 if (buflen == 0 || data_direction == PCI_DMA_NONE) { 1433 cp->Header.SGList = 0; 1434 cp->Header.SGTotal = 0; 1435 return 0; 1436 } 1437 1438 addr64 = (u64) pci_map_single(pdev, buf, buflen, data_direction); 1439 if (dma_mapping_error(&pdev->dev, addr64)) { 1440 /* Prevent subsequent unmap of something never mapped */ 1441 cp->Header.SGList = 0; 1442 cp->Header.SGTotal = 0; 1443 return -1; 1444 } 1445 cp->SG[0].Addr.lower = 1446 (u32) (addr64 & (u64) 0x00000000FFFFFFFF); 1447 cp->SG[0].Addr.upper = 1448 (u32) ((addr64 >> 32) & (u64) 0x00000000FFFFFFFF); 1449 cp->SG[0].Len = buflen; 1450 cp->Header.SGList = (u8) 1; /* no. SGs contig in this cmd */ 1451 cp->Header.SGTotal = (u16) 1; /* total sgs in this cmd list */ 1452 return 0; 1453 } 1454 1455 static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, 1456 struct CommandList *c) 1457 { 1458 DECLARE_COMPLETION_ONSTACK(wait); 1459 1460 c->waiting = &wait; 1461 enqueue_cmd_and_start_io(h, c); 1462 wait_for_completion(&wait); 1463 } 1464 1465 static void hpsa_scsi_do_simple_cmd_core_if_no_lockup(struct ctlr_info *h, 1466 struct CommandList *c) 1467 { 1468 unsigned long flags; 1469 1470 /* If controller lockup detected, fake a hardware error. */ 1471 spin_lock_irqsave(&h->lock, flags); 1472 if (unlikely(h->lockup_detected)) { 1473 spin_unlock_irqrestore(&h->lock, flags); 1474 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 1475 } else { 1476 spin_unlock_irqrestore(&h->lock, flags); 1477 hpsa_scsi_do_simple_cmd_core(h, c); 1478 } 1479 } 1480 1481 #define MAX_DRIVER_CMD_RETRIES 25 1482 static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, 1483 struct CommandList *c, int data_direction) 1484 { 1485 int backoff_time = 10, retry_count = 0; 1486 1487 do { 1488 memset(c->err_info, 0, sizeof(*c->err_info)); 1489 hpsa_scsi_do_simple_cmd_core(h, c); 1490 retry_count++; 1491 if (retry_count > 3) { 1492 msleep(backoff_time); 1493 if (backoff_time < 1000) 1494 backoff_time *= 2; 1495 } 1496 } while ((check_for_unit_attention(h, c) || 1497 check_for_busy(h, c)) && 1498 retry_count <= MAX_DRIVER_CMD_RETRIES); 1499 hpsa_pci_unmap(h->pdev, c, 1, data_direction); 1500 } 1501 1502 static void hpsa_scsi_interpret_error(struct CommandList *cp) 1503 { 1504 struct ErrorInfo *ei; 1505 struct device *d = &cp->h->pdev->dev; 1506 1507 ei = cp->err_info; 1508 switch (ei->CommandStatus) { 1509 case CMD_TARGET_STATUS: 1510 dev_warn(d, "cmd %p has completed with errors\n", cp); 1511 dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, 1512 ei->ScsiStatus); 1513 if (ei->ScsiStatus == 0) 1514 dev_warn(d, "SCSI status is abnormally zero. " 1515 "(probably indicates selection timeout " 1516 "reported incorrectly due to a known " 1517 "firmware bug, circa July, 2001.)\n"); 1518 break; 1519 case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ 1520 dev_info(d, "UNDERRUN\n"); 1521 break; 1522 case CMD_DATA_OVERRUN: 1523 dev_warn(d, "cp %p has completed with data overrun\n", cp); 1524 break; 1525 case CMD_INVALID: { 1526 /* controller unfortunately reports SCSI passthru's 1527 * to non-existent targets as invalid commands. 1528 */ 1529 dev_warn(d, "cp %p is reported invalid (probably means " 1530 "target device no longer present)\n", cp); 1531 /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); 1532 print_cmd(cp); */ 1533 } 1534 break; 1535 case CMD_PROTOCOL_ERR: 1536 dev_warn(d, "cp %p has protocol error \n", cp); 1537 break; 1538 case CMD_HARDWARE_ERR: 1539 /* cmd->result = DID_ERROR << 16; */ 1540 dev_warn(d, "cp %p had hardware error\n", cp); 1541 break; 1542 case CMD_CONNECTION_LOST: 1543 dev_warn(d, "cp %p had connection lost\n", cp); 1544 break; 1545 case CMD_ABORTED: 1546 dev_warn(d, "cp %p was aborted\n", cp); 1547 break; 1548 case CMD_ABORT_FAILED: 1549 dev_warn(d, "cp %p reports abort failed\n", cp); 1550 break; 1551 case CMD_UNSOLICITED_ABORT: 1552 dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); 1553 break; 1554 case CMD_TIMEOUT: 1555 dev_warn(d, "cp %p timed out\n", cp); 1556 break; 1557 case CMD_UNABORTABLE: 1558 dev_warn(d, "Command unabortable\n"); 1559 break; 1560 default: 1561 dev_warn(d, "cp %p returned unknown status %x\n", cp, 1562 ei->CommandStatus); 1563 } 1564 } 1565 1566 static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, 1567 unsigned char page, unsigned char *buf, 1568 unsigned char bufsize) 1569 { 1570 int rc = IO_OK; 1571 struct CommandList *c; 1572 struct ErrorInfo *ei; 1573 1574 c = cmd_special_alloc(h); 1575 1576 if (c == NULL) { /* trouble... */ 1577 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1578 return -ENOMEM; 1579 } 1580 1581 if (fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, 1582 page, scsi3addr, TYPE_CMD)) { 1583 rc = -1; 1584 goto out; 1585 } 1586 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1587 ei = c->err_info; 1588 if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { 1589 hpsa_scsi_interpret_error(c); 1590 rc = -1; 1591 } 1592 out: 1593 cmd_special_free(h, c); 1594 return rc; 1595 } 1596 1597 static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) 1598 { 1599 int rc = IO_OK; 1600 struct CommandList *c; 1601 struct ErrorInfo *ei; 1602 1603 c = cmd_special_alloc(h); 1604 1605 if (c == NULL) { /* trouble... */ 1606 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1607 return -ENOMEM; 1608 } 1609 1610 /* fill_cmd can't fail here, no data buffer to map. */ 1611 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, 1612 NULL, 0, 0, scsi3addr, TYPE_MSG); 1613 hpsa_scsi_do_simple_cmd_core(h, c); 1614 /* no unmap needed here because no data xfer. */ 1615 1616 ei = c->err_info; 1617 if (ei->CommandStatus != 0) { 1618 hpsa_scsi_interpret_error(c); 1619 rc = -1; 1620 } 1621 cmd_special_free(h, c); 1622 return rc; 1623 } 1624 1625 static void hpsa_get_raid_level(struct ctlr_info *h, 1626 unsigned char *scsi3addr, unsigned char *raid_level) 1627 { 1628 int rc; 1629 unsigned char *buf; 1630 1631 *raid_level = RAID_UNKNOWN; 1632 buf = kzalloc(64, GFP_KERNEL); 1633 if (!buf) 1634 return; 1635 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); 1636 if (rc == 0) 1637 *raid_level = buf[8]; 1638 if (*raid_level > RAID_UNKNOWN) 1639 *raid_level = RAID_UNKNOWN; 1640 kfree(buf); 1641 return; 1642 } 1643 1644 /* Get the device id from inquiry page 0x83 */ 1645 static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, 1646 unsigned char *device_id, int buflen) 1647 { 1648 int rc; 1649 unsigned char *buf; 1650 1651 if (buflen > 16) 1652 buflen = 16; 1653 buf = kzalloc(64, GFP_KERNEL); 1654 if (!buf) 1655 return -1; 1656 rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); 1657 if (rc == 0) 1658 memcpy(device_id, &buf[8], buflen); 1659 kfree(buf); 1660 return rc != 0; 1661 } 1662 1663 static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, 1664 struct ReportLUNdata *buf, int bufsize, 1665 int extended_response) 1666 { 1667 int rc = IO_OK; 1668 struct CommandList *c; 1669 unsigned char scsi3addr[8]; 1670 struct ErrorInfo *ei; 1671 1672 c = cmd_special_alloc(h); 1673 if (c == NULL) { /* trouble... */ 1674 dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 1675 return -1; 1676 } 1677 /* address the controller */ 1678 memset(scsi3addr, 0, sizeof(scsi3addr)); 1679 if (fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, 1680 buf, bufsize, 0, scsi3addr, TYPE_CMD)) { 1681 rc = -1; 1682 goto out; 1683 } 1684 if (extended_response) 1685 c->Request.CDB[1] = extended_response; 1686 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); 1687 ei = c->err_info; 1688 if (ei->CommandStatus != 0 && 1689 ei->CommandStatus != CMD_DATA_UNDERRUN) { 1690 hpsa_scsi_interpret_error(c); 1691 rc = -1; 1692 } 1693 out: 1694 cmd_special_free(h, c); 1695 return rc; 1696 } 1697 1698 static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, 1699 struct ReportLUNdata *buf, 1700 int bufsize, int extended_response) 1701 { 1702 return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); 1703 } 1704 1705 static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, 1706 struct ReportLUNdata *buf, int bufsize) 1707 { 1708 return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); 1709 } 1710 1711 static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, 1712 int bus, int target, int lun) 1713 { 1714 device->bus = bus; 1715 device->target = target; 1716 device->lun = lun; 1717 } 1718 1719 static int hpsa_update_device_info(struct ctlr_info *h, 1720 unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device, 1721 unsigned char *is_OBDR_device) 1722 { 1723 1724 #define OBDR_SIG_OFFSET 43 1725 #define OBDR_TAPE_SIG "$DR-10" 1726 #define OBDR_SIG_LEN (sizeof(OBDR_TAPE_SIG) - 1) 1727 #define OBDR_TAPE_INQ_SIZE (OBDR_SIG_OFFSET + OBDR_SIG_LEN) 1728 1729 unsigned char *inq_buff; 1730 unsigned char *obdr_sig; 1731 1732 inq_buff = kzalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); 1733 if (!inq_buff) 1734 goto bail_out; 1735 1736 /* Do an inquiry to the device to see what it is. */ 1737 if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, 1738 (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { 1739 /* Inquiry failed (msg printed already) */ 1740 dev_err(&h->pdev->dev, 1741 "hpsa_update_device_info: inquiry failed\n"); 1742 goto bail_out; 1743 } 1744 1745 this_device->devtype = (inq_buff[0] & 0x1f); 1746 memcpy(this_device->scsi3addr, scsi3addr, 8); 1747 memcpy(this_device->vendor, &inq_buff[8], 1748 sizeof(this_device->vendor)); 1749 memcpy(this_device->model, &inq_buff[16], 1750 sizeof(this_device->model)); 1751 memset(this_device->device_id, 0, 1752 sizeof(this_device->device_id)); 1753 hpsa_get_device_id(h, scsi3addr, this_device->device_id, 1754 sizeof(this_device->device_id)); 1755 1756 if (this_device->devtype == TYPE_DISK && 1757 is_logical_dev_addr_mode(scsi3addr)) 1758 hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); 1759 else 1760 this_device->raid_level = RAID_UNKNOWN; 1761 1762 if (is_OBDR_device) { 1763 /* See if this is a One-Button-Disaster-Recovery device 1764 * by looking for "$DR-10" at offset 43 in inquiry data. 1765 */ 1766 obdr_sig = &inq_buff[OBDR_SIG_OFFSET]; 1767 *is_OBDR_device = (this_device->devtype == TYPE_ROM && 1768 strncmp(obdr_sig, OBDR_TAPE_SIG, 1769 OBDR_SIG_LEN) == 0); 1770 } 1771 1772 kfree(inq_buff); 1773 return 0; 1774 1775 bail_out: 1776 kfree(inq_buff); 1777 return 1; 1778 } 1779 1780 static unsigned char *ext_target_model[] = { 1781 "MSA2012", 1782 "MSA2024", 1783 "MSA2312", 1784 "MSA2324", 1785 "P2000 G3 SAS", 1786 NULL, 1787 }; 1788 1789 static int is_ext_target(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) 1790 { 1791 int i; 1792 1793 for (i = 0; ext_target_model[i]; i++) 1794 if (strncmp(device->model, ext_target_model[i], 1795 strlen(ext_target_model[i])) == 0) 1796 return 1; 1797 return 0; 1798 } 1799 1800 /* Helper function to assign bus, target, lun mapping of devices. 1801 * Puts non-external target logical volumes on bus 0, external target logical 1802 * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. 1803 * Logical drive target and lun are assigned at this time, but 1804 * physical device lun and target assignment are deferred (assigned 1805 * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) 1806 */ 1807 static void figure_bus_target_lun(struct ctlr_info *h, 1808 u8 *lunaddrbytes, struct hpsa_scsi_dev_t *device) 1809 { 1810 u32 lunid = le32_to_cpu(*((__le32 *) lunaddrbytes)); 1811 1812 if (!is_logical_dev_addr_mode(lunaddrbytes)) { 1813 /* physical device, target and lun filled in later */ 1814 if (is_hba_lunid(lunaddrbytes)) 1815 hpsa_set_bus_target_lun(device, 3, 0, lunid & 0x3fff); 1816 else 1817 /* defer target, lun assignment for physical devices */ 1818 hpsa_set_bus_target_lun(device, 2, -1, -1); 1819 return; 1820 } 1821 /* It's a logical device */ 1822 if (is_ext_target(h, device)) { 1823 /* external target way, put logicals on bus 1 1824 * and match target/lun numbers box 1825 * reports, other smart array, bus 0, target 0, match lunid 1826 */ 1827 hpsa_set_bus_target_lun(device, 1828 1, (lunid >> 16) & 0x3fff, lunid & 0x00ff); 1829 return; 1830 } 1831 hpsa_set_bus_target_lun(device, 0, 0, lunid & 0x3fff); 1832 } 1833 1834 /* 1835 * If there is no lun 0 on a target, linux won't find any devices. 1836 * For the external targets (arrays), we have to manually detect the enclosure 1837 * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report 1838 * it for some reason. *tmpdevice is the target we're adding, 1839 * this_device is a pointer into the current element of currentsd[] 1840 * that we're building up in update_scsi_devices(), below. 1841 * lunzerobits is a bitmap that tracks which targets already have a 1842 * lun 0 assigned. 1843 * Returns 1 if an enclosure was added, 0 if not. 1844 */ 1845 static int add_ext_target_dev(struct ctlr_info *h, 1846 struct hpsa_scsi_dev_t *tmpdevice, 1847 struct hpsa_scsi_dev_t *this_device, u8 *lunaddrbytes, 1848 unsigned long lunzerobits[], int *n_ext_target_devs) 1849 { 1850 unsigned char scsi3addr[8]; 1851 1852 if (test_bit(tmpdevice->target, lunzerobits)) 1853 return 0; /* There is already a lun 0 on this target. */ 1854 1855 if (!is_logical_dev_addr_mode(lunaddrbytes)) 1856 return 0; /* It's the logical targets that may lack lun 0. */ 1857 1858 if (!is_ext_target(h, tmpdevice)) 1859 return 0; /* Only external target devices have this problem. */ 1860 1861 if (tmpdevice->lun == 0) /* if lun is 0, then we have a lun 0. */ 1862 return 0; 1863 1864 memset(scsi3addr, 0, 8); 1865 scsi3addr[3] = tmpdevice->target; 1866 if (is_hba_lunid(scsi3addr)) 1867 return 0; /* Don't add the RAID controller here. */ 1868 1869 if (is_scsi_rev_5(h)) 1870 return 0; /* p1210m doesn't need to do this. */ 1871 1872 if (*n_ext_target_devs >= MAX_EXT_TARGETS) { 1873 dev_warn(&h->pdev->dev, "Maximum number of external " 1874 "target devices exceeded. Check your hardware " 1875 "configuration."); 1876 return 0; 1877 } 1878 1879 if (hpsa_update_device_info(h, scsi3addr, this_device, NULL)) 1880 return 0; 1881 (*n_ext_target_devs)++; 1882 hpsa_set_bus_target_lun(this_device, 1883 tmpdevice->bus, tmpdevice->target, 0); 1884 set_bit(tmpdevice->target, lunzerobits); 1885 return 1; 1886 } 1887 1888 /* 1889 * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, 1890 * logdev. The number of luns in physdev and logdev are returned in 1891 * *nphysicals and *nlogicals, respectively. 1892 * Returns 0 on success, -1 otherwise. 1893 */ 1894 static int hpsa_gather_lun_info(struct ctlr_info *h, 1895 int reportlunsize, 1896 struct ReportLUNdata *physdev, u32 *nphysicals, 1897 struct ReportLUNdata *logdev, u32 *nlogicals) 1898 { 1899 if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { 1900 dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); 1901 return -1; 1902 } 1903 *nphysicals = be32_to_cpu(*((__be32 *)physdev->LUNListLength)) / 8; 1904 if (*nphysicals > HPSA_MAX_PHYS_LUN) { 1905 dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." 1906 " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1907 *nphysicals - HPSA_MAX_PHYS_LUN); 1908 *nphysicals = HPSA_MAX_PHYS_LUN; 1909 } 1910 if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { 1911 dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); 1912 return -1; 1913 } 1914 *nlogicals = be32_to_cpu(*((__be32 *) logdev->LUNListLength)) / 8; 1915 /* Reject Logicals in excess of our max capability. */ 1916 if (*nlogicals > HPSA_MAX_LUN) { 1917 dev_warn(&h->pdev->dev, 1918 "maximum logical LUNs (%d) exceeded. " 1919 "%d LUNs ignored.\n", HPSA_MAX_LUN, 1920 *nlogicals - HPSA_MAX_LUN); 1921 *nlogicals = HPSA_MAX_LUN; 1922 } 1923 if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { 1924 dev_warn(&h->pdev->dev, 1925 "maximum logical + physical LUNs (%d) exceeded. " 1926 "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, 1927 *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); 1928 *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; 1929 } 1930 return 0; 1931 } 1932 1933 u8 *figure_lunaddrbytes(struct ctlr_info *h, int raid_ctlr_position, int i, 1934 int nphysicals, int nlogicals, struct ReportLUNdata *physdev_list, 1935 struct ReportLUNdata *logdev_list) 1936 { 1937 /* Helper function, figure out where the LUN ID info is coming from 1938 * given index i, lists of physical and logical devices, where in 1939 * the list the raid controller is supposed to appear (first or last) 1940 */ 1941 1942 int logicals_start = nphysicals + (raid_ctlr_position == 0); 1943 int last_device = nphysicals + nlogicals + (raid_ctlr_position == 0); 1944 1945 if (i == raid_ctlr_position) 1946 return RAID_CTLR_LUNID; 1947 1948 if (i < logicals_start) 1949 return &physdev_list->LUN[i - (raid_ctlr_position == 0)][0]; 1950 1951 if (i < last_device) 1952 return &logdev_list->LUN[i - nphysicals - 1953 (raid_ctlr_position == 0)][0]; 1954 BUG(); 1955 return NULL; 1956 } 1957 1958 static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) 1959 { 1960 /* the idea here is we could get notified 1961 * that some devices have changed, so we do a report 1962 * physical luns and report logical luns cmd, and adjust 1963 * our list of devices accordingly. 1964 * 1965 * The scsi3addr's of devices won't change so long as the 1966 * adapter is not reset. That means we can rescan and 1967 * tell which devices we already know about, vs. new 1968 * devices, vs. disappearing devices. 1969 */ 1970 struct ReportLUNdata *physdev_list = NULL; 1971 struct ReportLUNdata *logdev_list = NULL; 1972 u32 nphysicals = 0; 1973 u32 nlogicals = 0; 1974 u32 ndev_allocated = 0; 1975 struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; 1976 int ncurrent = 0; 1977 int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; 1978 int i, n_ext_target_devs, ndevs_to_allocate; 1979 int raid_ctlr_position; 1980 DECLARE_BITMAP(lunzerobits, MAX_EXT_TARGETS); 1981 1982 currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_DEVICES, GFP_KERNEL); 1983 physdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1984 logdev_list = kzalloc(reportlunsize, GFP_KERNEL); 1985 tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); 1986 1987 if (!currentsd || !physdev_list || !logdev_list || !tmpdevice) { 1988 dev_err(&h->pdev->dev, "out of memory\n"); 1989 goto out; 1990 } 1991 memset(lunzerobits, 0, sizeof(lunzerobits)); 1992 1993 if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, 1994 logdev_list, &nlogicals)) 1995 goto out; 1996 1997 /* We might see up to the maximum number of logical and physical disks 1998 * plus external target devices, and a device for the local RAID 1999 * controller. 2000 */ 2001 ndevs_to_allocate = nphysicals + nlogicals + MAX_EXT_TARGETS + 1; 2002 2003 /* Allocate the per device structures */ 2004 for (i = 0; i < ndevs_to_allocate; i++) { 2005 if (i >= HPSA_MAX_DEVICES) { 2006 dev_warn(&h->pdev->dev, "maximum devices (%d) exceeded." 2007 " %d devices ignored.\n", HPSA_MAX_DEVICES, 2008 ndevs_to_allocate - HPSA_MAX_DEVICES); 2009 break; 2010 } 2011 2012 currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); 2013 if (!currentsd[i]) { 2014 dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", 2015 __FILE__, __LINE__); 2016 goto out; 2017 } 2018 ndev_allocated++; 2019 } 2020 2021 if (unlikely(is_scsi_rev_5(h))) 2022 raid_ctlr_position = 0; 2023 else 2024 raid_ctlr_position = nphysicals + nlogicals; 2025 2026 /* adjust our table of devices */ 2027 n_ext_target_devs = 0; 2028 for (i = 0; i < nphysicals + nlogicals + 1; i++) { 2029 u8 *lunaddrbytes, is_OBDR = 0; 2030 2031 /* Figure out where the LUN ID info is coming from */ 2032 lunaddrbytes = figure_lunaddrbytes(h, raid_ctlr_position, 2033 i, nphysicals, nlogicals, physdev_list, logdev_list); 2034 /* skip masked physical devices. */ 2035 if (lunaddrbytes[3] & 0xC0 && 2036 i < nphysicals + (raid_ctlr_position == 0)) 2037 continue; 2038 2039 /* Get device type, vendor, model, device id */ 2040 if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice, 2041 &is_OBDR)) 2042 continue; /* skip it if we can't talk to it. */ 2043 figure_bus_target_lun(h, lunaddrbytes, tmpdevice); 2044 this_device = currentsd[ncurrent]; 2045 2046 /* 2047 * For external target devices, we have to insert a LUN 0 which 2048 * doesn't show up in CCISS_REPORT_PHYSICAL data, but there 2049 * is nonetheless an enclosure device there. We have to 2050 * present that otherwise linux won't find anything if 2051 * there is no lun 0. 2052 */ 2053 if (add_ext_target_dev(h, tmpdevice, this_device, 2054 lunaddrbytes, lunzerobits, 2055 &n_ext_target_devs)) { 2056 ncurrent++; 2057 this_device = currentsd[ncurrent]; 2058 } 2059 2060 *this_device = *tmpdevice; 2061 2062 switch (this_device->devtype) { 2063 case TYPE_ROM: 2064 /* We don't *really* support actual CD-ROM devices, 2065 * just "One Button Disaster Recovery" tape drive 2066 * which temporarily pretends to be a CD-ROM drive. 2067 * So we check that the device is really an OBDR tape 2068 * device by checking for "$DR-10" in bytes 43-48 of 2069 * the inquiry data. 2070 */ 2071 if (is_OBDR) 2072 ncurrent++; 2073 break; 2074 case TYPE_DISK: 2075 if (i < nphysicals) 2076 break; 2077 ncurrent++; 2078 break; 2079 case TYPE_TAPE: 2080 case TYPE_MEDIUM_CHANGER: 2081 ncurrent++; 2082 break; 2083 case TYPE_RAID: 2084 /* Only present the Smartarray HBA as a RAID controller. 2085 * If it's a RAID controller other than the HBA itself 2086 * (an external RAID controller, MSA500 or similar) 2087 * don't present it. 2088 */ 2089 if (!is_hba_lunid(lunaddrbytes)) 2090 break; 2091 ncurrent++; 2092 break; 2093 default: 2094 break; 2095 } 2096 if (ncurrent >= HPSA_MAX_DEVICES) 2097 break; 2098 } 2099 adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); 2100 out: 2101 kfree(tmpdevice); 2102 for (i = 0; i < ndev_allocated; i++) 2103 kfree(currentsd[i]); 2104 kfree(currentsd); 2105 kfree(physdev_list); 2106 kfree(logdev_list); 2107 } 2108 2109 /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci 2110 * dma mapping and fills in the scatter gather entries of the 2111 * hpsa command, cp. 2112 */ 2113 static int hpsa_scatter_gather(struct ctlr_info *h, 2114 struct CommandList *cp, 2115 struct scsi_cmnd *cmd) 2116 { 2117 unsigned int len; 2118 struct scatterlist *sg; 2119 u64 addr64; 2120 int use_sg, i, sg_index, chained; 2121 struct SGDescriptor *curr_sg; 2122 2123 BUG_ON(scsi_sg_count(cmd) > h->maxsgentries); 2124 2125 use_sg = scsi_dma_map(cmd); 2126 if (use_sg < 0) 2127 return use_sg; 2128 2129 if (!use_sg) 2130 goto sglist_finished; 2131 2132 curr_sg = cp->SG; 2133 chained = 0; 2134 sg_index = 0; 2135 scsi_for_each_sg(cmd, sg, use_sg, i) { 2136 if (i == h->max_cmd_sg_entries - 1 && 2137 use_sg > h->max_cmd_sg_entries) { 2138 chained = 1; 2139 curr_sg = h->cmd_sg_list[cp->cmdindex]; 2140 sg_index = 0; 2141 } 2142 addr64 = (u64) sg_dma_address(sg); 2143 len = sg_dma_len(sg); 2144 curr_sg->Addr.lower = (u32) (addr64 & 0x0FFFFFFFFULL); 2145 curr_sg->Addr.upper = (u32) ((addr64 >> 32) & 0x0FFFFFFFFULL); 2146 curr_sg->Len = len; 2147 curr_sg->Ext = 0; /* we are not chaining */ 2148 curr_sg++; 2149 } 2150 2151 if (use_sg + chained > h->maxSG) 2152 h->maxSG = use_sg + chained; 2153 2154 if (chained) { 2155 cp->Header.SGList = h->max_cmd_sg_entries; 2156 cp->Header.SGTotal = (u16) (use_sg + 1); 2157 if (hpsa_map_sg_chain_block(h, cp)) { 2158 scsi_dma_unmap(cmd); 2159 return -1; 2160 } 2161 return 0; 2162 } 2163 2164 sglist_finished: 2165 2166 cp->Header.SGList = (u8) use_sg; /* no. SGs contig in this cmd */ 2167 cp->Header.SGTotal = (u16) use_sg; /* total sgs in this cmd list */ 2168 return 0; 2169 } 2170 2171 2172 static int hpsa_scsi_queue_command_lck(struct scsi_cmnd *cmd, 2173 void (*done)(struct scsi_cmnd *)) 2174 { 2175 struct ctlr_info *h; 2176 struct hpsa_scsi_dev_t *dev; 2177 unsigned char scsi3addr[8]; 2178 struct CommandList *c; 2179 unsigned long flags; 2180 2181 /* Get the ptr to our adapter structure out of cmd->host. */ 2182 h = sdev_to_hba(cmd->device); 2183 dev = cmd->device->hostdata; 2184 if (!dev) { 2185 cmd->result = DID_NO_CONNECT << 16; 2186 done(cmd); 2187 return 0; 2188 } 2189 memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); 2190 2191 spin_lock_irqsave(&h->lock, flags); 2192 if (unlikely(h->lockup_detected)) { 2193 spin_unlock_irqrestore(&h->lock, flags); 2194 cmd->result = DID_ERROR << 16; 2195 done(cmd); 2196 return 0; 2197 } 2198 spin_unlock_irqrestore(&h->lock, flags); 2199 c = cmd_alloc(h); 2200 if (c == NULL) { /* trouble... */ 2201 dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); 2202 return SCSI_MLQUEUE_HOST_BUSY; 2203 } 2204 2205 /* Fill in the command list header */ 2206 2207 cmd->scsi_done = done; /* save this for use by completion code */ 2208 2209 /* save c in case we have to abort it */ 2210 cmd->host_scribble = (unsigned char *) c; 2211 2212 c->cmd_type = CMD_SCSI; 2213 c->scsi_cmd = cmd; 2214 c->Header.ReplyQueue = 0; /* unused in simple mode */ 2215 memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); 2216 c->Header.Tag.lower = (c->cmdindex << DIRECT_LOOKUP_SHIFT); 2217 c->Header.Tag.lower |= DIRECT_LOOKUP_BIT; 2218 2219 /* Fill in the request block... */ 2220 2221 c->Request.Timeout = 0; 2222 memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); 2223 BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); 2224 c->Request.CDBLen = cmd->cmd_len; 2225 memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); 2226 c->Request.Type.Type = TYPE_CMD; 2227 c->Request.Type.Attribute = ATTR_SIMPLE; 2228 switch (cmd->sc_data_direction) { 2229 case DMA_TO_DEVICE: 2230 c->Request.Type.Direction = XFER_WRITE; 2231 break; 2232 case DMA_FROM_DEVICE: 2233 c->Request.Type.Direction = XFER_READ; 2234 break; 2235 case DMA_NONE: 2236 c->Request.Type.Direction = XFER_NONE; 2237 break; 2238 case DMA_BIDIRECTIONAL: 2239 /* This can happen if a buggy application does a scsi passthru 2240 * and sets both inlen and outlen to non-zero. ( see 2241 * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) 2242 */ 2243 2244 c->Request.Type.Direction = XFER_RSVD; 2245 /* This is technically wrong, and hpsa controllers should 2246 * reject it with CMD_INVALID, which is the most correct 2247 * response, but non-fibre backends appear to let it 2248 * slide by, and give the same results as if this field 2249 * were set correctly. Either way is acceptable for 2250 * our purposes here. 2251 */ 2252 2253 break; 2254 2255 default: 2256 dev_err(&h->pdev->dev, "unknown data direction: %d\n", 2257 cmd->sc_data_direction); 2258 BUG(); 2259 break; 2260 } 2261 2262 if (hpsa_scatter_gather(h, c, cmd) < 0) { /* Fill SG list */ 2263 cmd_free(h, c); 2264 return SCSI_MLQUEUE_HOST_BUSY; 2265 } 2266 enqueue_cmd_and_start_io(h, c); 2267 /* the cmd'll come back via intr handler in complete_scsi_command() */ 2268 return 0; 2269 } 2270 2271 static DEF_SCSI_QCMD(hpsa_scsi_queue_command) 2272 2273 static void hpsa_scan_start(struct Scsi_Host *sh) 2274 { 2275 struct ctlr_info *h = shost_to_hba(sh); 2276 unsigned long flags; 2277 2278 /* wait until any scan already in progress is finished. */ 2279 while (1) { 2280 spin_lock_irqsave(&h->scan_lock, flags); 2281 if (h->scan_finished) 2282 break; 2283 spin_unlock_irqrestore(&h->scan_lock, flags); 2284 wait_event(h->scan_wait_queue, h->scan_finished); 2285 /* Note: We don't need to worry about a race between this 2286 * thread and driver unload because the midlayer will 2287 * have incremented the reference count, so unload won't 2288 * happen if we're in here. 2289 */ 2290 } 2291 h->scan_finished = 0; /* mark scan as in progress */ 2292 spin_unlock_irqrestore(&h->scan_lock, flags); 2293 2294 hpsa_update_scsi_devices(h, h->scsi_host->host_no); 2295 2296 spin_lock_irqsave(&h->scan_lock, flags); 2297 h->scan_finished = 1; /* mark scan as finished. */ 2298 wake_up_all(&h->scan_wait_queue); 2299 spin_unlock_irqrestore(&h->scan_lock, flags); 2300 } 2301 2302 static int hpsa_scan_finished(struct Scsi_Host *sh, 2303 unsigned long elapsed_time) 2304 { 2305 struct ctlr_info *h = shost_to_hba(sh); 2306 unsigned long flags; 2307 int finished; 2308 2309 spin_lock_irqsave(&h->scan_lock, flags); 2310 finished = h->scan_finished; 2311 spin_unlock_irqrestore(&h->scan_lock, flags); 2312 return finished; 2313 } 2314 2315 static int hpsa_change_queue_depth(struct scsi_device *sdev, 2316 int qdepth, int reason) 2317 { 2318 struct ctlr_info *h = sdev_to_hba(sdev); 2319 2320 if (reason != SCSI_QDEPTH_DEFAULT) 2321 return -ENOTSUPP; 2322 2323 if (qdepth < 1) 2324 qdepth = 1; 2325 else 2326 if (qdepth > h->nr_cmds) 2327 qdepth = h->nr_cmds; 2328 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); 2329 return sdev->queue_depth; 2330 } 2331 2332 static void hpsa_unregister_scsi(struct ctlr_info *h) 2333 { 2334 /* we are being forcibly unloaded, and may not refuse. */ 2335 scsi_remove_host(h->scsi_host); 2336 scsi_host_put(h->scsi_host); 2337 h->scsi_host = NULL; 2338 } 2339 2340 static int hpsa_register_scsi(struct ctlr_info *h) 2341 { 2342 struct Scsi_Host *sh; 2343 int error; 2344 2345 sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); 2346 if (sh == NULL) 2347 goto fail; 2348 2349 sh->io_port = 0; 2350 sh->n_io_port = 0; 2351 sh->this_id = -1; 2352 sh->max_channel = 3; 2353 sh->max_cmd_len = MAX_COMMAND_SIZE; 2354 sh->max_lun = HPSA_MAX_LUN; 2355 sh->max_id = HPSA_MAX_LUN; 2356 sh->can_queue = h->nr_cmds; 2357 sh->cmd_per_lun = h->nr_cmds; 2358 sh->sg_tablesize = h->maxsgentries; 2359 h->scsi_host = sh; 2360 sh->hostdata[0] = (unsigned long) h; 2361 sh->irq = h->intr[h->intr_mode]; 2362 sh->unique_id = sh->irq; 2363 error = scsi_add_host(sh, &h->pdev->dev); 2364 if (error) 2365 goto fail_host_put; 2366 scsi_scan_host(sh); 2367 return 0; 2368 2369 fail_host_put: 2370 dev_err(&h->pdev->dev, "%s: scsi_add_host" 2371 " failed for controller %d\n", __func__, h->ctlr); 2372 scsi_host_put(sh); 2373 return error; 2374 fail: 2375 dev_err(&h->pdev->dev, "%s: scsi_host_alloc" 2376 " failed for controller %d\n", __func__, h->ctlr); 2377 return -ENOMEM; 2378 } 2379 2380 static int wait_for_device_to_become_ready(struct ctlr_info *h, 2381 unsigned char lunaddr[]) 2382 { 2383 int rc = 0; 2384 int count = 0; 2385 int waittime = 1; /* seconds */ 2386 struct CommandList *c; 2387 2388 c = cmd_special_alloc(h); 2389 if (!c) { 2390 dev_warn(&h->pdev->dev, "out of memory in " 2391 "wait_for_device_to_become_ready.\n"); 2392 return IO_ERROR; 2393 } 2394 2395 /* Send test unit ready until device ready, or give up. */ 2396 while (count < HPSA_TUR_RETRY_LIMIT) { 2397 2398 /* Wait for a bit. do this first, because if we send 2399 * the TUR right away, the reset will just abort it. 2400 */ 2401 msleep(1000 * waittime); 2402 count++; 2403 2404 /* Increase wait time with each try, up to a point. */ 2405 if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) 2406 waittime = waittime * 2; 2407 2408 /* Send the Test Unit Ready, fill_cmd can't fail, no mapping */ 2409 (void) fill_cmd(c, TEST_UNIT_READY, h, 2410 NULL, 0, 0, lunaddr, TYPE_CMD); 2411 hpsa_scsi_do_simple_cmd_core(h, c); 2412 /* no unmap needed here because no data xfer. */ 2413 2414 if (c->err_info->CommandStatus == CMD_SUCCESS) 2415 break; 2416 2417 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 2418 c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && 2419 (c->err_info->SenseInfo[2] == NO_SENSE || 2420 c->err_info->SenseInfo[2] == UNIT_ATTENTION)) 2421 break; 2422 2423 dev_warn(&h->pdev->dev, "waiting %d secs " 2424 "for device to become ready.\n", waittime); 2425 rc = 1; /* device not ready. */ 2426 } 2427 2428 if (rc) 2429 dev_warn(&h->pdev->dev, "giving up on device.\n"); 2430 else 2431 dev_warn(&h->pdev->dev, "device is ready.\n"); 2432 2433 cmd_special_free(h, c); 2434 return rc; 2435 } 2436 2437 /* Need at least one of these error handlers to keep ../scsi/hosts.c from 2438 * complaining. Doing a host- or bus-reset can't do anything good here. 2439 */ 2440 static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) 2441 { 2442 int rc; 2443 struct ctlr_info *h; 2444 struct hpsa_scsi_dev_t *dev; 2445 2446 /* find the controller to which the command to be aborted was sent */ 2447 h = sdev_to_hba(scsicmd->device); 2448 if (h == NULL) /* paranoia */ 2449 return FAILED; 2450 dev = scsicmd->device->hostdata; 2451 if (!dev) { 2452 dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " 2453 "device lookup failed.\n"); 2454 return FAILED; 2455 } 2456 dev_warn(&h->pdev->dev, "resetting device %d:%d:%d:%d\n", 2457 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2458 /* send a reset to the SCSI LUN which the command was sent to */ 2459 rc = hpsa_send_reset(h, dev->scsi3addr); 2460 if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) 2461 return SUCCESS; 2462 2463 dev_warn(&h->pdev->dev, "resetting device failed.\n"); 2464 return FAILED; 2465 } 2466 2467 static void swizzle_abort_tag(u8 *tag) 2468 { 2469 u8 original_tag[8]; 2470 2471 memcpy(original_tag, tag, 8); 2472 tag[0] = original_tag[3]; 2473 tag[1] = original_tag[2]; 2474 tag[2] = original_tag[1]; 2475 tag[3] = original_tag[0]; 2476 tag[4] = original_tag[7]; 2477 tag[5] = original_tag[6]; 2478 tag[6] = original_tag[5]; 2479 tag[7] = original_tag[4]; 2480 } 2481 2482 static int hpsa_send_abort(struct ctlr_info *h, unsigned char *scsi3addr, 2483 struct CommandList *abort, int swizzle) 2484 { 2485 int rc = IO_OK; 2486 struct CommandList *c; 2487 struct ErrorInfo *ei; 2488 2489 c = cmd_special_alloc(h); 2490 if (c == NULL) { /* trouble... */ 2491 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 2492 return -ENOMEM; 2493 } 2494 2495 /* fill_cmd can't fail here, no buffer to map */ 2496 (void) fill_cmd(c, HPSA_ABORT_MSG, h, abort, 2497 0, 0, scsi3addr, TYPE_MSG); 2498 if (swizzle) 2499 swizzle_abort_tag(&c->Request.CDB[4]); 2500 hpsa_scsi_do_simple_cmd_core(h, c); 2501 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: do_simple_cmd_core completed.\n", 2502 __func__, abort->Header.Tag.upper, abort->Header.Tag.lower); 2503 /* no unmap needed here because no data xfer. */ 2504 2505 ei = c->err_info; 2506 switch (ei->CommandStatus) { 2507 case CMD_SUCCESS: 2508 break; 2509 case CMD_UNABORTABLE: /* Very common, don't make noise. */ 2510 rc = -1; 2511 break; 2512 default: 2513 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: interpreting error.\n", 2514 __func__, abort->Header.Tag.upper, 2515 abort->Header.Tag.lower); 2516 hpsa_scsi_interpret_error(c); 2517 rc = -1; 2518 break; 2519 } 2520 cmd_special_free(h, c); 2521 dev_dbg(&h->pdev->dev, "%s: Tag:0x%08x:%08x: Finished.\n", __func__, 2522 abort->Header.Tag.upper, abort->Header.Tag.lower); 2523 return rc; 2524 } 2525 2526 /* 2527 * hpsa_find_cmd_in_queue 2528 * 2529 * Used to determine whether a command (find) is still present 2530 * in queue_head. Optionally excludes the last element of queue_head. 2531 * 2532 * This is used to avoid unnecessary aborts. Commands in h->reqQ have 2533 * not yet been submitted, and so can be aborted by the driver without 2534 * sending an abort to the hardware. 2535 * 2536 * Returns pointer to command if found in queue, NULL otherwise. 2537 */ 2538 static struct CommandList *hpsa_find_cmd_in_queue(struct ctlr_info *h, 2539 struct scsi_cmnd *find, struct list_head *queue_head) 2540 { 2541 unsigned long flags; 2542 struct CommandList *c = NULL; /* ptr into cmpQ */ 2543 2544 if (!find) 2545 return 0; 2546 spin_lock_irqsave(&h->lock, flags); 2547 list_for_each_entry(c, queue_head, list) { 2548 if (c->scsi_cmd == NULL) /* e.g.: passthru ioctl */ 2549 continue; 2550 if (c->scsi_cmd == find) { 2551 spin_unlock_irqrestore(&h->lock, flags); 2552 return c; 2553 } 2554 } 2555 spin_unlock_irqrestore(&h->lock, flags); 2556 return NULL; 2557 } 2558 2559 static struct CommandList *hpsa_find_cmd_in_queue_by_tag(struct ctlr_info *h, 2560 u8 *tag, struct list_head *queue_head) 2561 { 2562 unsigned long flags; 2563 struct CommandList *c; 2564 2565 spin_lock_irqsave(&h->lock, flags); 2566 list_for_each_entry(c, queue_head, list) { 2567 if (memcmp(&c->Header.Tag, tag, 8) != 0) 2568 continue; 2569 spin_unlock_irqrestore(&h->lock, flags); 2570 return c; 2571 } 2572 spin_unlock_irqrestore(&h->lock, flags); 2573 return NULL; 2574 } 2575 2576 /* Some Smart Arrays need the abort tag swizzled, and some don't. It's hard to 2577 * tell which kind we're dealing with, so we send the abort both ways. There 2578 * shouldn't be any collisions between swizzled and unswizzled tags due to the 2579 * way we construct our tags but we check anyway in case the assumptions which 2580 * make this true someday become false. 2581 */ 2582 static int hpsa_send_abort_both_ways(struct ctlr_info *h, 2583 unsigned char *scsi3addr, struct CommandList *abort) 2584 { 2585 u8 swizzled_tag[8]; 2586 struct CommandList *c; 2587 int rc = 0, rc2 = 0; 2588 2589 /* we do not expect to find the swizzled tag in our queue, but 2590 * check anyway just to be sure the assumptions which make this 2591 * the case haven't become wrong. 2592 */ 2593 memcpy(swizzled_tag, &abort->Request.CDB[4], 8); 2594 swizzle_abort_tag(swizzled_tag); 2595 c = hpsa_find_cmd_in_queue_by_tag(h, swizzled_tag, &h->cmpQ); 2596 if (c != NULL) { 2597 dev_warn(&h->pdev->dev, "Unexpectedly found byte-swapped tag in completion queue.\n"); 2598 return hpsa_send_abort(h, scsi3addr, abort, 0); 2599 } 2600 rc = hpsa_send_abort(h, scsi3addr, abort, 0); 2601 2602 /* if the command is still in our queue, we can't conclude that it was 2603 * aborted (it might have just completed normally) but in any case 2604 * we don't need to try to abort it another way. 2605 */ 2606 c = hpsa_find_cmd_in_queue(h, abort->scsi_cmd, &h->cmpQ); 2607 if (c) 2608 rc2 = hpsa_send_abort(h, scsi3addr, abort, 1); 2609 return rc && rc2; 2610 } 2611 2612 /* Send an abort for the specified command. 2613 * If the device and controller support it, 2614 * send a task abort request. 2615 */ 2616 static int hpsa_eh_abort_handler(struct scsi_cmnd *sc) 2617 { 2618 2619 int i, rc; 2620 struct ctlr_info *h; 2621 struct hpsa_scsi_dev_t *dev; 2622 struct CommandList *abort; /* pointer to command to be aborted */ 2623 struct CommandList *found; 2624 struct scsi_cmnd *as; /* ptr to scsi cmd inside aborted command. */ 2625 char msg[256]; /* For debug messaging. */ 2626 int ml = 0; 2627 2628 /* Find the controller of the command to be aborted */ 2629 h = sdev_to_hba(sc->device); 2630 if (WARN(h == NULL, 2631 "ABORT REQUEST FAILED, Controller lookup failed.\n")) 2632 return FAILED; 2633 2634 /* Check that controller supports some kind of task abort */ 2635 if (!(HPSATMF_PHYS_TASK_ABORT & h->TMFSupportFlags) && 2636 !(HPSATMF_LOG_TASK_ABORT & h->TMFSupportFlags)) 2637 return FAILED; 2638 2639 memset(msg, 0, sizeof(msg)); 2640 ml += sprintf(msg+ml, "ABORT REQUEST on C%d:B%d:T%d:L%d ", 2641 h->scsi_host->host_no, sc->device->channel, 2642 sc->device->id, sc->device->lun); 2643 2644 /* Find the device of the command to be aborted */ 2645 dev = sc->device->hostdata; 2646 if (!dev) { 2647 dev_err(&h->pdev->dev, "%s FAILED, Device lookup failed.\n", 2648 msg); 2649 return FAILED; 2650 } 2651 2652 /* Get SCSI command to be aborted */ 2653 abort = (struct CommandList *) sc->host_scribble; 2654 if (abort == NULL) { 2655 dev_err(&h->pdev->dev, "%s FAILED, Command to abort is NULL.\n", 2656 msg); 2657 return FAILED; 2658 } 2659 2660 ml += sprintf(msg+ml, "Tag:0x%08x:%08x ", 2661 abort->Header.Tag.upper, abort->Header.Tag.lower); 2662 as = (struct scsi_cmnd *) abort->scsi_cmd; 2663 if (as != NULL) 2664 ml += sprintf(msg+ml, "Command:0x%x SN:0x%lx ", 2665 as->cmnd[0], as->serial_number); 2666 dev_dbg(&h->pdev->dev, "%s\n", msg); 2667 dev_warn(&h->pdev->dev, "Abort request on C%d:B%d:T%d:L%d\n", 2668 h->scsi_host->host_no, dev->bus, dev->target, dev->lun); 2669 2670 /* Search reqQ to See if command is queued but not submitted, 2671 * if so, complete the command with aborted status and remove 2672 * it from the reqQ. 2673 */ 2674 found = hpsa_find_cmd_in_queue(h, sc, &h->reqQ); 2675 if (found) { 2676 found->err_info->CommandStatus = CMD_ABORTED; 2677 finish_cmd(found); 2678 dev_info(&h->pdev->dev, "%s Request SUCCEEDED (driver queue).\n", 2679 msg); 2680 return SUCCESS; 2681 } 2682 2683 /* not in reqQ, if also not in cmpQ, must have already completed */ 2684 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2685 if (!found) { 2686 dev_dbg(&h->pdev->dev, "%s Request SUCCEEDED (not known to driver).\n", 2687 msg); 2688 return SUCCESS; 2689 } 2690 2691 /* 2692 * Command is in flight, or possibly already completed 2693 * by the firmware (but not to the scsi mid layer) but we can't 2694 * distinguish which. Send the abort down. 2695 */ 2696 rc = hpsa_send_abort_both_ways(h, dev->scsi3addr, abort); 2697 if (rc != 0) { 2698 dev_dbg(&h->pdev->dev, "%s Request FAILED.\n", msg); 2699 dev_warn(&h->pdev->dev, "FAILED abort on device C%d:B%d:T%d:L%d\n", 2700 h->scsi_host->host_no, 2701 dev->bus, dev->target, dev->lun); 2702 return FAILED; 2703 } 2704 dev_info(&h->pdev->dev, "%s REQUEST SUCCEEDED.\n", msg); 2705 2706 /* If the abort(s) above completed and actually aborted the 2707 * command, then the command to be aborted should already be 2708 * completed. If not, wait around a bit more to see if they 2709 * manage to complete normally. 2710 */ 2711 #define ABORT_COMPLETE_WAIT_SECS 30 2712 for (i = 0; i < ABORT_COMPLETE_WAIT_SECS * 10; i++) { 2713 found = hpsa_find_cmd_in_queue(h, sc, &h->cmpQ); 2714 if (!found) 2715 return SUCCESS; 2716 msleep(100); 2717 } 2718 dev_warn(&h->pdev->dev, "%s FAILED. Aborted command has not completed after %d seconds.\n", 2719 msg, ABORT_COMPLETE_WAIT_SECS); 2720 return FAILED; 2721 } 2722 2723 2724 /* 2725 * For operations that cannot sleep, a command block is allocated at init, 2726 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track 2727 * which ones are free or in use. Lock must be held when calling this. 2728 * cmd_free() is the complement. 2729 */ 2730 static struct CommandList *cmd_alloc(struct ctlr_info *h) 2731 { 2732 struct CommandList *c; 2733 int i; 2734 union u64bit temp64; 2735 dma_addr_t cmd_dma_handle, err_dma_handle; 2736 unsigned long flags; 2737 2738 spin_lock_irqsave(&h->lock, flags); 2739 do { 2740 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); 2741 if (i == h->nr_cmds) { 2742 spin_unlock_irqrestore(&h->lock, flags); 2743 return NULL; 2744 } 2745 } while (test_and_set_bit 2746 (i & (BITS_PER_LONG - 1), 2747 h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); 2748 spin_unlock_irqrestore(&h->lock, flags); 2749 2750 c = h->cmd_pool + i; 2751 memset(c, 0, sizeof(*c)); 2752 cmd_dma_handle = h->cmd_pool_dhandle 2753 + i * sizeof(*c); 2754 c->err_info = h->errinfo_pool + i; 2755 memset(c->err_info, 0, sizeof(*c->err_info)); 2756 err_dma_handle = h->errinfo_pool_dhandle 2757 + i * sizeof(*c->err_info); 2758 2759 c->cmdindex = i; 2760 2761 INIT_LIST_HEAD(&c->list); 2762 c->busaddr = (u32) cmd_dma_handle; 2763 temp64.val = (u64) err_dma_handle; 2764 c->ErrDesc.Addr.lower = temp64.val32.lower; 2765 c->ErrDesc.Addr.upper = temp64.val32.upper; 2766 c->ErrDesc.Len = sizeof(*c->err_info); 2767 2768 c->h = h; 2769 return c; 2770 } 2771 2772 /* For operations that can wait for kmalloc to possibly sleep, 2773 * this routine can be called. Lock need not be held to call 2774 * cmd_special_alloc. cmd_special_free() is the complement. 2775 */ 2776 static struct CommandList *cmd_special_alloc(struct ctlr_info *h) 2777 { 2778 struct CommandList *c; 2779 union u64bit temp64; 2780 dma_addr_t cmd_dma_handle, err_dma_handle; 2781 2782 c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); 2783 if (c == NULL) 2784 return NULL; 2785 memset(c, 0, sizeof(*c)); 2786 2787 c->cmdindex = -1; 2788 2789 c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), 2790 &err_dma_handle); 2791 2792 if (c->err_info == NULL) { 2793 pci_free_consistent(h->pdev, 2794 sizeof(*c), c, cmd_dma_handle); 2795 return NULL; 2796 } 2797 memset(c->err_info, 0, sizeof(*c->err_info)); 2798 2799 INIT_LIST_HEAD(&c->list); 2800 c->busaddr = (u32) cmd_dma_handle; 2801 temp64.val = (u64) err_dma_handle; 2802 c->ErrDesc.Addr.lower = temp64.val32.lower; 2803 c->ErrDesc.Addr.upper = temp64.val32.upper; 2804 c->ErrDesc.Len = sizeof(*c->err_info); 2805 2806 c->h = h; 2807 return c; 2808 } 2809 2810 static void cmd_free(struct ctlr_info *h, struct CommandList *c) 2811 { 2812 int i; 2813 unsigned long flags; 2814 2815 i = c - h->cmd_pool; 2816 spin_lock_irqsave(&h->lock, flags); 2817 clear_bit(i & (BITS_PER_LONG - 1), 2818 h->cmd_pool_bits + (i / BITS_PER_LONG)); 2819 spin_unlock_irqrestore(&h->lock, flags); 2820 } 2821 2822 static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) 2823 { 2824 union u64bit temp64; 2825 2826 temp64.val32.lower = c->ErrDesc.Addr.lower; 2827 temp64.val32.upper = c->ErrDesc.Addr.upper; 2828 pci_free_consistent(h->pdev, sizeof(*c->err_info), 2829 c->err_info, (dma_addr_t) temp64.val); 2830 pci_free_consistent(h->pdev, sizeof(*c), 2831 c, (dma_addr_t) (c->busaddr & DIRECT_LOOKUP_MASK)); 2832 } 2833 2834 #ifdef CONFIG_COMPAT 2835 2836 static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) 2837 { 2838 IOCTL32_Command_struct __user *arg32 = 2839 (IOCTL32_Command_struct __user *) arg; 2840 IOCTL_Command_struct arg64; 2841 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); 2842 int err; 2843 u32 cp; 2844 2845 memset(&arg64, 0, sizeof(arg64)); 2846 err = 0; 2847 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2848 sizeof(arg64.LUN_info)); 2849 err |= copy_from_user(&arg64.Request, &arg32->Request, 2850 sizeof(arg64.Request)); 2851 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2852 sizeof(arg64.error_info)); 2853 err |= get_user(arg64.buf_size, &arg32->buf_size); 2854 err |= get_user(cp, &arg32->buf); 2855 arg64.buf = compat_ptr(cp); 2856 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2857 2858 if (err) 2859 return -EFAULT; 2860 2861 err = hpsa_ioctl(dev, CCISS_PASSTHRU, (void *)p); 2862 if (err) 2863 return err; 2864 err |= copy_in_user(&arg32->error_info, &p->error_info, 2865 sizeof(arg32->error_info)); 2866 if (err) 2867 return -EFAULT; 2868 return err; 2869 } 2870 2871 static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, 2872 int cmd, void *arg) 2873 { 2874 BIG_IOCTL32_Command_struct __user *arg32 = 2875 (BIG_IOCTL32_Command_struct __user *) arg; 2876 BIG_IOCTL_Command_struct arg64; 2877 BIG_IOCTL_Command_struct __user *p = 2878 compat_alloc_user_space(sizeof(arg64)); 2879 int err; 2880 u32 cp; 2881 2882 memset(&arg64, 0, sizeof(arg64)); 2883 err = 0; 2884 err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, 2885 sizeof(arg64.LUN_info)); 2886 err |= copy_from_user(&arg64.Request, &arg32->Request, 2887 sizeof(arg64.Request)); 2888 err |= copy_from_user(&arg64.error_info, &arg32->error_info, 2889 sizeof(arg64.error_info)); 2890 err |= get_user(arg64.buf_size, &arg32->buf_size); 2891 err |= get_user(arg64.malloc_size, &arg32->malloc_size); 2892 err |= get_user(cp, &arg32->buf); 2893 arg64.buf = compat_ptr(cp); 2894 err |= copy_to_user(p, &arg64, sizeof(arg64)); 2895 2896 if (err) 2897 return -EFAULT; 2898 2899 err = hpsa_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); 2900 if (err) 2901 return err; 2902 err |= copy_in_user(&arg32->error_info, &p->error_info, 2903 sizeof(arg32->error_info)); 2904 if (err) 2905 return -EFAULT; 2906 return err; 2907 } 2908 2909 static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) 2910 { 2911 switch (cmd) { 2912 case CCISS_GETPCIINFO: 2913 case CCISS_GETINTINFO: 2914 case CCISS_SETINTINFO: 2915 case CCISS_GETNODENAME: 2916 case CCISS_SETNODENAME: 2917 case CCISS_GETHEARTBEAT: 2918 case CCISS_GETBUSTYPES: 2919 case CCISS_GETFIRMVER: 2920 case CCISS_GETDRIVVER: 2921 case CCISS_REVALIDVOLS: 2922 case CCISS_DEREGDISK: 2923 case CCISS_REGNEWDISK: 2924 case CCISS_REGNEWD: 2925 case CCISS_RESCANDISK: 2926 case CCISS_GETLUNINFO: 2927 return hpsa_ioctl(dev, cmd, arg); 2928 2929 case CCISS_PASSTHRU32: 2930 return hpsa_ioctl32_passthru(dev, cmd, arg); 2931 case CCISS_BIG_PASSTHRU32: 2932 return hpsa_ioctl32_big_passthru(dev, cmd, arg); 2933 2934 default: 2935 return -ENOIOCTLCMD; 2936 } 2937 } 2938 #endif 2939 2940 static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) 2941 { 2942 struct hpsa_pci_info pciinfo; 2943 2944 if (!argp) 2945 return -EINVAL; 2946 pciinfo.domain = pci_domain_nr(h->pdev->bus); 2947 pciinfo.bus = h->pdev->bus->number; 2948 pciinfo.dev_fn = h->pdev->devfn; 2949 pciinfo.board_id = h->board_id; 2950 if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) 2951 return -EFAULT; 2952 return 0; 2953 } 2954 2955 static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) 2956 { 2957 DriverVer_type DriverVer; 2958 unsigned char vmaj, vmin, vsubmin; 2959 int rc; 2960 2961 rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", 2962 &vmaj, &vmin, &vsubmin); 2963 if (rc != 3) { 2964 dev_info(&h->pdev->dev, "driver version string '%s' " 2965 "unrecognized.", HPSA_DRIVER_VERSION); 2966 vmaj = 0; 2967 vmin = 0; 2968 vsubmin = 0; 2969 } 2970 DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; 2971 if (!argp) 2972 return -EINVAL; 2973 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) 2974 return -EFAULT; 2975 return 0; 2976 } 2977 2978 static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) 2979 { 2980 IOCTL_Command_struct iocommand; 2981 struct CommandList *c; 2982 char *buff = NULL; 2983 union u64bit temp64; 2984 int rc = 0; 2985 2986 if (!argp) 2987 return -EINVAL; 2988 if (!capable(CAP_SYS_RAWIO)) 2989 return -EPERM; 2990 if (copy_from_user(&iocommand, argp, sizeof(iocommand))) 2991 return -EFAULT; 2992 if ((iocommand.buf_size < 1) && 2993 (iocommand.Request.Type.Direction != XFER_NONE)) { 2994 return -EINVAL; 2995 } 2996 if (iocommand.buf_size > 0) { 2997 buff = kmalloc(iocommand.buf_size, GFP_KERNEL); 2998 if (buff == NULL) 2999 return -EFAULT; 3000 if (iocommand.Request.Type.Direction == XFER_WRITE) { 3001 /* Copy the data into the buffer we created */ 3002 if (copy_from_user(buff, iocommand.buf, 3003 iocommand.buf_size)) { 3004 rc = -EFAULT; 3005 goto out_kfree; 3006 } 3007 } else { 3008 memset(buff, 0, iocommand.buf_size); 3009 } 3010 } 3011 c = cmd_special_alloc(h); 3012 if (c == NULL) { 3013 rc = -ENOMEM; 3014 goto out_kfree; 3015 } 3016 /* Fill in the command type */ 3017 c->cmd_type = CMD_IOCTL_PEND; 3018 /* Fill in Command Header */ 3019 c->Header.ReplyQueue = 0; /* unused in simple mode */ 3020 if (iocommand.buf_size > 0) { /* buffer to fill */ 3021 c->Header.SGList = 1; 3022 c->Header.SGTotal = 1; 3023 } else { /* no buffers to fill */ 3024 c->Header.SGList = 0; 3025 c->Header.SGTotal = 0; 3026 } 3027 memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); 3028 /* use the kernel address the cmd block for tag */ 3029 c->Header.Tag.lower = c->busaddr; 3030 3031 /* Fill in Request block */ 3032 memcpy(&c->Request, &iocommand.Request, 3033 sizeof(c->Request)); 3034 3035 /* Fill in the scatter gather information */ 3036 if (iocommand.buf_size > 0) { 3037 temp64.val = pci_map_single(h->pdev, buff, 3038 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); 3039 if (dma_mapping_error(&h->pdev->dev, temp64.val)) { 3040 c->SG[0].Addr.lower = 0; 3041 c->SG[0].Addr.upper = 0; 3042 c->SG[0].Len = 0; 3043 rc = -ENOMEM; 3044 goto out; 3045 } 3046 c->SG[0].Addr.lower = temp64.val32.lower; 3047 c->SG[0].Addr.upper = temp64.val32.upper; 3048 c->SG[0].Len = iocommand.buf_size; 3049 c->SG[0].Ext = 0; /* we are not chaining*/ 3050 } 3051 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 3052 if (iocommand.buf_size > 0) 3053 hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); 3054 check_ioctl_unit_attention(h, c); 3055 3056 /* Copy the error information out */ 3057 memcpy(&iocommand.error_info, c->err_info, 3058 sizeof(iocommand.error_info)); 3059 if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { 3060 rc = -EFAULT; 3061 goto out; 3062 } 3063 if (iocommand.Request.Type.Direction == XFER_READ && 3064 iocommand.buf_size > 0) { 3065 /* Copy the data out of the buffer we created */ 3066 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { 3067 rc = -EFAULT; 3068 goto out; 3069 } 3070 } 3071 out: 3072 cmd_special_free(h, c); 3073 out_kfree: 3074 kfree(buff); 3075 return rc; 3076 } 3077 3078 static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) 3079 { 3080 BIG_IOCTL_Command_struct *ioc; 3081 struct CommandList *c; 3082 unsigned char **buff = NULL; 3083 int *buff_size = NULL; 3084 union u64bit temp64; 3085 BYTE sg_used = 0; 3086 int status = 0; 3087 int i; 3088 u32 left; 3089 u32 sz; 3090 BYTE __user *data_ptr; 3091 3092 if (!argp) 3093 return -EINVAL; 3094 if (!capable(CAP_SYS_RAWIO)) 3095 return -EPERM; 3096 ioc = (BIG_IOCTL_Command_struct *) 3097 kmalloc(sizeof(*ioc), GFP_KERNEL); 3098 if (!ioc) { 3099 status = -ENOMEM; 3100 goto cleanup1; 3101 } 3102 if (copy_from_user(ioc, argp, sizeof(*ioc))) { 3103 status = -EFAULT; 3104 goto cleanup1; 3105 } 3106 if ((ioc->buf_size < 1) && 3107 (ioc->Request.Type.Direction != XFER_NONE)) { 3108 status = -EINVAL; 3109 goto cleanup1; 3110 } 3111 /* Check kmalloc limits using all SGs */ 3112 if (ioc->malloc_size > MAX_KMALLOC_SIZE) { 3113 status = -EINVAL; 3114 goto cleanup1; 3115 } 3116 if (ioc->buf_size > ioc->malloc_size * SG_ENTRIES_IN_CMD) { 3117 status = -EINVAL; 3118 goto cleanup1; 3119 } 3120 buff = kzalloc(SG_ENTRIES_IN_CMD * sizeof(char *), GFP_KERNEL); 3121 if (!buff) { 3122 status = -ENOMEM; 3123 goto cleanup1; 3124 } 3125 buff_size = kmalloc(SG_ENTRIES_IN_CMD * sizeof(int), GFP_KERNEL); 3126 if (!buff_size) { 3127 status = -ENOMEM; 3128 goto cleanup1; 3129 } 3130 left = ioc->buf_size; 3131 data_ptr = ioc->buf; 3132 while (left) { 3133 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; 3134 buff_size[sg_used] = sz; 3135 buff[sg_used] = kmalloc(sz, GFP_KERNEL); 3136 if (buff[sg_used] == NULL) { 3137 status = -ENOMEM; 3138 goto cleanup1; 3139 } 3140 if (ioc->Request.Type.Direction == XFER_WRITE) { 3141 if (copy_from_user(buff[sg_used], data_ptr, sz)) { 3142 status = -ENOMEM; 3143 goto cleanup1; 3144 } 3145 } else 3146 memset(buff[sg_used], 0, sz); 3147 left -= sz; 3148 data_ptr += sz; 3149 sg_used++; 3150 } 3151 c = cmd_special_alloc(h); 3152 if (c == NULL) { 3153 status = -ENOMEM; 3154 goto cleanup1; 3155 } 3156 c->cmd_type = CMD_IOCTL_PEND; 3157 c->Header.ReplyQueue = 0; 3158 c->Header.SGList = c->Header.SGTotal = sg_used; 3159 memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); 3160 c->Header.Tag.lower = c->busaddr; 3161 memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); 3162 if (ioc->buf_size > 0) { 3163 int i; 3164 for (i = 0; i < sg_used; i++) { 3165 temp64.val = pci_map_single(h->pdev, buff[i], 3166 buff_size[i], PCI_DMA_BIDIRECTIONAL); 3167 if (dma_mapping_error(&h->pdev->dev, temp64.val)) { 3168 c->SG[i].Addr.lower = 0; 3169 c->SG[i].Addr.upper = 0; 3170 c->SG[i].Len = 0; 3171 hpsa_pci_unmap(h->pdev, c, i, 3172 PCI_DMA_BIDIRECTIONAL); 3173 status = -ENOMEM; 3174 goto cleanup1; 3175 } 3176 c->SG[i].Addr.lower = temp64.val32.lower; 3177 c->SG[i].Addr.upper = temp64.val32.upper; 3178 c->SG[i].Len = buff_size[i]; 3179 /* we are not chaining */ 3180 c->SG[i].Ext = 0; 3181 } 3182 } 3183 hpsa_scsi_do_simple_cmd_core_if_no_lockup(h, c); 3184 if (sg_used) 3185 hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); 3186 check_ioctl_unit_attention(h, c); 3187 /* Copy the error information out */ 3188 memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); 3189 if (copy_to_user(argp, ioc, sizeof(*ioc))) { 3190 cmd_special_free(h, c); 3191 status = -EFAULT; 3192 goto cleanup1; 3193 } 3194 if (ioc->Request.Type.Direction == XFER_READ && ioc->buf_size > 0) { 3195 /* Copy the data out of the buffer we created */ 3196 BYTE __user *ptr = ioc->buf; 3197 for (i = 0; i < sg_used; i++) { 3198 if (copy_to_user(ptr, buff[i], buff_size[i])) { 3199 cmd_special_free(h, c); 3200 status = -EFAULT; 3201 goto cleanup1; 3202 } 3203 ptr += buff_size[i]; 3204 } 3205 } 3206 cmd_special_free(h, c); 3207 status = 0; 3208 cleanup1: 3209 if (buff) { 3210 for (i = 0; i < sg_used; i++) 3211 kfree(buff[i]); 3212 kfree(buff); 3213 } 3214 kfree(buff_size); 3215 kfree(ioc); 3216 return status; 3217 } 3218 3219 static void check_ioctl_unit_attention(struct ctlr_info *h, 3220 struct CommandList *c) 3221 { 3222 if (c->err_info->CommandStatus == CMD_TARGET_STATUS && 3223 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) 3224 (void) check_for_unit_attention(h, c); 3225 } 3226 /* 3227 * ioctl 3228 */ 3229 static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) 3230 { 3231 struct ctlr_info *h; 3232 void __user *argp = (void __user *)arg; 3233 3234 h = sdev_to_hba(dev); 3235 3236 switch (cmd) { 3237 case CCISS_DEREGDISK: 3238 case CCISS_REGNEWDISK: 3239 case CCISS_REGNEWD: 3240 hpsa_scan_start(h->scsi_host); 3241 return 0; 3242 case CCISS_GETPCIINFO: 3243 return hpsa_getpciinfo_ioctl(h, argp); 3244 case CCISS_GETDRIVVER: 3245 return hpsa_getdrivver_ioctl(h, argp); 3246 case CCISS_PASSTHRU: 3247 return hpsa_passthru_ioctl(h, argp); 3248 case CCISS_BIG_PASSTHRU: 3249 return hpsa_big_passthru_ioctl(h, argp); 3250 default: 3251 return -ENOTTY; 3252 } 3253 } 3254 3255 static int hpsa_send_host_reset(struct ctlr_info *h, unsigned char *scsi3addr, 3256 u8 reset_type) 3257 { 3258 struct CommandList *c; 3259 3260 c = cmd_alloc(h); 3261 if (!c) 3262 return -ENOMEM; 3263 /* fill_cmd can't fail here, no data buffer to map */ 3264 (void) fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, 3265 RAID_CTLR_LUNID, TYPE_MSG); 3266 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */ 3267 c->waiting = NULL; 3268 enqueue_cmd_and_start_io(h, c); 3269 /* Don't wait for completion, the reset won't complete. Don't free 3270 * the command either. This is the last command we will send before 3271 * re-initializing everything, so it doesn't matter and won't leak. 3272 */ 3273 return 0; 3274 } 3275 3276 static int fill_cmd(struct CommandList *c, u8 cmd, struct ctlr_info *h, 3277 void *buff, size_t size, u8 page_code, unsigned char *scsi3addr, 3278 int cmd_type) 3279 { 3280 int pci_dir = XFER_NONE; 3281 struct CommandList *a; /* for commands to be aborted */ 3282 3283 c->cmd_type = CMD_IOCTL_PEND; 3284 c->Header.ReplyQueue = 0; 3285 if (buff != NULL && size > 0) { 3286 c->Header.SGList = 1; 3287 c->Header.SGTotal = 1; 3288 } else { 3289 c->Header.SGList = 0; 3290 c->Header.SGTotal = 0; 3291 } 3292 c->Header.Tag.lower = c->busaddr; 3293 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); 3294 3295 c->Request.Type.Type = cmd_type; 3296 if (cmd_type == TYPE_CMD) { 3297 switch (cmd) { 3298 case HPSA_INQUIRY: 3299 /* are we trying to read a vital product page */ 3300 if (page_code != 0) { 3301 c->Request.CDB[1] = 0x01; 3302 c->Request.CDB[2] = page_code; 3303 } 3304 c->Request.CDBLen = 6; 3305 c->Request.Type.Attribute = ATTR_SIMPLE; 3306 c->Request.Type.Direction = XFER_READ; 3307 c->Request.Timeout = 0; 3308 c->Request.CDB[0] = HPSA_INQUIRY; 3309 c->Request.CDB[4] = size & 0xFF; 3310 break; 3311 case HPSA_REPORT_LOG: 3312 case HPSA_REPORT_PHYS: 3313 /* Talking to controller so It's a physical command 3314 mode = 00 target = 0. Nothing to write. 3315 */ 3316 c->Request.CDBLen = 12; 3317 c->Request.Type.Attribute = ATTR_SIMPLE; 3318 c->Request.Type.Direction = XFER_READ; 3319 c->Request.Timeout = 0; 3320 c->Request.CDB[0] = cmd; 3321 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ 3322 c->Request.CDB[7] = (size >> 16) & 0xFF; 3323 c->Request.CDB[8] = (size >> 8) & 0xFF; 3324 c->Request.CDB[9] = size & 0xFF; 3325 break; 3326 case HPSA_CACHE_FLUSH: 3327 c->Request.CDBLen = 12; 3328 c->Request.Type.Attribute = ATTR_SIMPLE; 3329 c->Request.Type.Direction = XFER_WRITE; 3330 c->Request.Timeout = 0; 3331 c->Request.CDB[0] = BMIC_WRITE; 3332 c->Request.CDB[6] = BMIC_CACHE_FLUSH; 3333 c->Request.CDB[7] = (size >> 8) & 0xFF; 3334 c->Request.CDB[8] = size & 0xFF; 3335 break; 3336 case TEST_UNIT_READY: 3337 c->Request.CDBLen = 6; 3338 c->Request.Type.Attribute = ATTR_SIMPLE; 3339 c->Request.Type.Direction = XFER_NONE; 3340 c->Request.Timeout = 0; 3341 break; 3342 default: 3343 dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); 3344 BUG(); 3345 return -1; 3346 } 3347 } else if (cmd_type == TYPE_MSG) { 3348 switch (cmd) { 3349 3350 case HPSA_DEVICE_RESET_MSG: 3351 c->Request.CDBLen = 16; 3352 c->Request.Type.Type = 1; /* It is a MSG not a CMD */ 3353 c->Request.Type.Attribute = ATTR_SIMPLE; 3354 c->Request.Type.Direction = XFER_NONE; 3355 c->Request.Timeout = 0; /* Don't time out */ 3356 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB)); 3357 c->Request.CDB[0] = cmd; 3358 c->Request.CDB[1] = HPSA_RESET_TYPE_LUN; 3359 /* If bytes 4-7 are zero, it means reset the */ 3360 /* LunID device */ 3361 c->Request.CDB[4] = 0x00; 3362 c->Request.CDB[5] = 0x00; 3363 c->Request.CDB[6] = 0x00; 3364 c->Request.CDB[7] = 0x00; 3365 break; 3366 case HPSA_ABORT_MSG: 3367 a = buff; /* point to command to be aborted */ 3368 dev_dbg(&h->pdev->dev, "Abort Tag:0x%08x:%08x using request Tag:0x%08x:%08x\n", 3369 a->Header.Tag.upper, a->Header.Tag.lower, 3370 c->Header.Tag.upper, c->Header.Tag.lower); 3371 c->Request.CDBLen = 16; 3372 c->Request.Type.Type = TYPE_MSG; 3373 c->Request.Type.Attribute = ATTR_SIMPLE; 3374 c->Request.Type.Direction = XFER_WRITE; 3375 c->Request.Timeout = 0; /* Don't time out */ 3376 c->Request.CDB[0] = HPSA_TASK_MANAGEMENT; 3377 c->Request.CDB[1] = HPSA_TMF_ABORT_TASK; 3378 c->Request.CDB[2] = 0x00; /* reserved */ 3379 c->Request.CDB[3] = 0x00; /* reserved */ 3380 /* Tag to abort goes in CDB[4]-CDB[11] */ 3381 c->Request.CDB[4] = a->Header.Tag.lower & 0xFF; 3382 c->Request.CDB[5] = (a->Header.Tag.lower >> 8) & 0xFF; 3383 c->Request.CDB[6] = (a->Header.Tag.lower >> 16) & 0xFF; 3384 c->Request.CDB[7] = (a->Header.Tag.lower >> 24) & 0xFF; 3385 c->Request.CDB[8] = a->Header.Tag.upper & 0xFF; 3386 c->Request.CDB[9] = (a->Header.Tag.upper >> 8) & 0xFF; 3387 c->Request.CDB[10] = (a->Header.Tag.upper >> 16) & 0xFF; 3388 c->Request.CDB[11] = (a->Header.Tag.upper >> 24) & 0xFF; 3389 c->Request.CDB[12] = 0x00; /* reserved */ 3390 c->Request.CDB[13] = 0x00; /* reserved */ 3391 c->Request.CDB[14] = 0x00; /* reserved */ 3392 c->Request.CDB[15] = 0x00; /* reserved */ 3393 break; 3394 default: 3395 dev_warn(&h->pdev->dev, "unknown message type %d\n", 3396 cmd); 3397 BUG(); 3398 } 3399 } else { 3400 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); 3401 BUG(); 3402 } 3403 3404 switch (c->Request.Type.Direction) { 3405 case XFER_READ: 3406 pci_dir = PCI_DMA_FROMDEVICE; 3407 break; 3408 case XFER_WRITE: 3409 pci_dir = PCI_DMA_TODEVICE; 3410 break; 3411 case XFER_NONE: 3412 pci_dir = PCI_DMA_NONE; 3413 break; 3414 default: 3415 pci_dir = PCI_DMA_BIDIRECTIONAL; 3416 } 3417 if (hpsa_map_one(h->pdev, c, buff, size, pci_dir)) 3418 return -1; 3419 return 0; 3420 } 3421 3422 /* 3423 * Map (physical) PCI mem into (virtual) kernel space 3424 */ 3425 static void __iomem *remap_pci_mem(ulong base, ulong size) 3426 { 3427 ulong page_base = ((ulong) base) & PAGE_MASK; 3428 ulong page_offs = ((ulong) base) - page_base; 3429 void __iomem *page_remapped = ioremap_nocache(page_base, 3430 page_offs + size); 3431 3432 return page_remapped ? (page_remapped + page_offs) : NULL; 3433 } 3434 3435 /* Takes cmds off the submission queue and sends them to the hardware, 3436 * then puts them on the queue of cmds waiting for completion. 3437 */ 3438 static void start_io(struct ctlr_info *h) 3439 { 3440 struct CommandList *c; 3441 unsigned long flags; 3442 3443 spin_lock_irqsave(&h->lock, flags); 3444 while (!list_empty(&h->reqQ)) { 3445 c = list_entry(h->reqQ.next, struct CommandList, list); 3446 /* can't do anything if fifo is full */ 3447 if ((h->access.fifo_full(h))) { 3448 dev_warn(&h->pdev->dev, "fifo full\n"); 3449 break; 3450 } 3451 3452 /* Get the first entry from the Request Q */ 3453 removeQ(c); 3454 h->Qdepth--; 3455 3456 /* Put job onto the completed Q */ 3457 addQ(&h->cmpQ, c); 3458 3459 /* Must increment commands_outstanding before unlocking 3460 * and submitting to avoid race checking for fifo full 3461 * condition. 3462 */ 3463 h->commands_outstanding++; 3464 if (h->commands_outstanding > h->max_outstanding) 3465 h->max_outstanding = h->commands_outstanding; 3466 3467 /* Tell the controller execute command */ 3468 spin_unlock_irqrestore(&h->lock, flags); 3469 h->access.submit_command(h, c); 3470 spin_lock_irqsave(&h->lock, flags); 3471 } 3472 spin_unlock_irqrestore(&h->lock, flags); 3473 } 3474 3475 static inline unsigned long get_next_completion(struct ctlr_info *h, u8 q) 3476 { 3477 return h->access.command_completed(h, q); 3478 } 3479 3480 static inline bool interrupt_pending(struct ctlr_info *h) 3481 { 3482 return h->access.intr_pending(h); 3483 } 3484 3485 static inline long interrupt_not_for_us(struct ctlr_info *h) 3486 { 3487 return (h->access.intr_pending(h) == 0) || 3488 (h->interrupts_enabled == 0); 3489 } 3490 3491 static inline int bad_tag(struct ctlr_info *h, u32 tag_index, 3492 u32 raw_tag) 3493 { 3494 if (unlikely(tag_index >= h->nr_cmds)) { 3495 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); 3496 return 1; 3497 } 3498 return 0; 3499 } 3500 3501 static inline void finish_cmd(struct CommandList *c) 3502 { 3503 unsigned long flags; 3504 3505 spin_lock_irqsave(&c->h->lock, flags); 3506 removeQ(c); 3507 spin_unlock_irqrestore(&c->h->lock, flags); 3508 dial_up_lockup_detection_on_fw_flash_complete(c->h, c); 3509 if (likely(c->cmd_type == CMD_SCSI)) 3510 complete_scsi_command(c); 3511 else if (c->cmd_type == CMD_IOCTL_PEND) 3512 complete(c->waiting); 3513 } 3514 3515 static inline u32 hpsa_tag_contains_index(u32 tag) 3516 { 3517 return tag & DIRECT_LOOKUP_BIT; 3518 } 3519 3520 static inline u32 hpsa_tag_to_index(u32 tag) 3521 { 3522 return tag >> DIRECT_LOOKUP_SHIFT; 3523 } 3524 3525 3526 static inline u32 hpsa_tag_discard_error_bits(struct ctlr_info *h, u32 tag) 3527 { 3528 #define HPSA_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1) 3529 #define HPSA_SIMPLE_ERROR_BITS 0x03 3530 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant))) 3531 return tag & ~HPSA_SIMPLE_ERROR_BITS; 3532 return tag & ~HPSA_PERF_ERROR_BITS; 3533 } 3534 3535 /* process completion of an indexed ("direct lookup") command */ 3536 static inline void process_indexed_cmd(struct ctlr_info *h, 3537 u32 raw_tag) 3538 { 3539 u32 tag_index; 3540 struct CommandList *c; 3541 3542 tag_index = hpsa_tag_to_index(raw_tag); 3543 if (!bad_tag(h, tag_index, raw_tag)) { 3544 c = h->cmd_pool + tag_index; 3545 finish_cmd(c); 3546 } 3547 } 3548 3549 /* process completion of a non-indexed command */ 3550 static inline void process_nonindexed_cmd(struct ctlr_info *h, 3551 u32 raw_tag) 3552 { 3553 u32 tag; 3554 struct CommandList *c = NULL; 3555 unsigned long flags; 3556 3557 tag = hpsa_tag_discard_error_bits(h, raw_tag); 3558 spin_lock_irqsave(&h->lock, flags); 3559 list_for_each_entry(c, &h->cmpQ, list) { 3560 if ((c->busaddr & 0xFFFFFFE0) == (tag & 0xFFFFFFE0)) { 3561 spin_unlock_irqrestore(&h->lock, flags); 3562 finish_cmd(c); 3563 return; 3564 } 3565 } 3566 spin_unlock_irqrestore(&h->lock, flags); 3567 bad_tag(h, h->nr_cmds + 1, raw_tag); 3568 } 3569 3570 /* Some controllers, like p400, will give us one interrupt 3571 * after a soft reset, even if we turned interrupts off. 3572 * Only need to check for this in the hpsa_xxx_discard_completions 3573 * functions. 3574 */ 3575 static int ignore_bogus_interrupt(struct ctlr_info *h) 3576 { 3577 if (likely(!reset_devices)) 3578 return 0; 3579 3580 if (likely(h->interrupts_enabled)) 3581 return 0; 3582 3583 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled " 3584 "(known firmware bug.) Ignoring.\n"); 3585 3586 return 1; 3587 } 3588 3589 /* 3590 * Convert &h->q[x] (passed to interrupt handlers) back to h. 3591 * Relies on (h-q[x] == x) being true for x such that 3592 * 0 <= x < MAX_REPLY_QUEUES. 3593 */ 3594 static struct ctlr_info *queue_to_hba(u8 *queue) 3595 { 3596 return container_of((queue - *queue), struct ctlr_info, q[0]); 3597 } 3598 3599 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue) 3600 { 3601 struct ctlr_info *h = queue_to_hba(queue); 3602 u8 q = *(u8 *) queue; 3603 u32 raw_tag; 3604 3605 if (ignore_bogus_interrupt(h)) 3606 return IRQ_NONE; 3607 3608 if (interrupt_not_for_us(h)) 3609 return IRQ_NONE; 3610 h->last_intr_timestamp = get_jiffies_64(); 3611 while (interrupt_pending(h)) { 3612 raw_tag = get_next_completion(h, q); 3613 while (raw_tag != FIFO_EMPTY) 3614 raw_tag = next_command(h, q); 3615 } 3616 return IRQ_HANDLED; 3617 } 3618 3619 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue) 3620 { 3621 struct ctlr_info *h = queue_to_hba(queue); 3622 u32 raw_tag; 3623 u8 q = *(u8 *) queue; 3624 3625 if (ignore_bogus_interrupt(h)) 3626 return IRQ_NONE; 3627 3628 h->last_intr_timestamp = get_jiffies_64(); 3629 raw_tag = get_next_completion(h, q); 3630 while (raw_tag != FIFO_EMPTY) 3631 raw_tag = next_command(h, q); 3632 return IRQ_HANDLED; 3633 } 3634 3635 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue) 3636 { 3637 struct ctlr_info *h = queue_to_hba((u8 *) queue); 3638 u32 raw_tag; 3639 u8 q = *(u8 *) queue; 3640 3641 if (interrupt_not_for_us(h)) 3642 return IRQ_NONE; 3643 h->last_intr_timestamp = get_jiffies_64(); 3644 while (interrupt_pending(h)) { 3645 raw_tag = get_next_completion(h, q); 3646 while (raw_tag != FIFO_EMPTY) { 3647 if (likely(hpsa_tag_contains_index(raw_tag))) 3648 process_indexed_cmd(h, raw_tag); 3649 else 3650 process_nonindexed_cmd(h, raw_tag); 3651 raw_tag = next_command(h, q); 3652 } 3653 } 3654 return IRQ_HANDLED; 3655 } 3656 3657 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue) 3658 { 3659 struct ctlr_info *h = queue_to_hba(queue); 3660 u32 raw_tag; 3661 u8 q = *(u8 *) queue; 3662 3663 h->last_intr_timestamp = get_jiffies_64(); 3664 raw_tag = get_next_completion(h, q); 3665 while (raw_tag != FIFO_EMPTY) { 3666 if (likely(hpsa_tag_contains_index(raw_tag))) 3667 process_indexed_cmd(h, raw_tag); 3668 else 3669 process_nonindexed_cmd(h, raw_tag); 3670 raw_tag = next_command(h, q); 3671 } 3672 return IRQ_HANDLED; 3673 } 3674 3675 /* Send a message CDB to the firmware. Careful, this only works 3676 * in simple mode, not performant mode due to the tag lookup. 3677 * We only ever use this immediately after a controller reset. 3678 */ 3679 static int hpsa_message(struct pci_dev *pdev, unsigned char opcode, 3680 unsigned char type) 3681 { 3682 struct Command { 3683 struct CommandListHeader CommandHeader; 3684 struct RequestBlock Request; 3685 struct ErrDescriptor ErrorDescriptor; 3686 }; 3687 struct Command *cmd; 3688 static const size_t cmd_sz = sizeof(*cmd) + 3689 sizeof(cmd->ErrorDescriptor); 3690 dma_addr_t paddr64; 3691 uint32_t paddr32, tag; 3692 void __iomem *vaddr; 3693 int i, err; 3694 3695 vaddr = pci_ioremap_bar(pdev, 0); 3696 if (vaddr == NULL) 3697 return -ENOMEM; 3698 3699 /* The Inbound Post Queue only accepts 32-bit physical addresses for the 3700 * CCISS commands, so they must be allocated from the lower 4GiB of 3701 * memory. 3702 */ 3703 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); 3704 if (err) { 3705 iounmap(vaddr); 3706 return -ENOMEM; 3707 } 3708 3709 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); 3710 if (cmd == NULL) { 3711 iounmap(vaddr); 3712 return -ENOMEM; 3713 } 3714 3715 /* This must fit, because of the 32-bit consistent DMA mask. Also, 3716 * although there's no guarantee, we assume that the address is at 3717 * least 4-byte aligned (most likely, it's page-aligned). 3718 */ 3719 paddr32 = paddr64; 3720 3721 cmd->CommandHeader.ReplyQueue = 0; 3722 cmd->CommandHeader.SGList = 0; 3723 cmd->CommandHeader.SGTotal = 0; 3724 cmd->CommandHeader.Tag.lower = paddr32; 3725 cmd->CommandHeader.Tag.upper = 0; 3726 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); 3727 3728 cmd->Request.CDBLen = 16; 3729 cmd->Request.Type.Type = TYPE_MSG; 3730 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; 3731 cmd->Request.Type.Direction = XFER_NONE; 3732 cmd->Request.Timeout = 0; /* Don't time out */ 3733 cmd->Request.CDB[0] = opcode; 3734 cmd->Request.CDB[1] = type; 3735 memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ 3736 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); 3737 cmd->ErrorDescriptor.Addr.upper = 0; 3738 cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); 3739 3740 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); 3741 3742 for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { 3743 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); 3744 if ((tag & ~HPSA_SIMPLE_ERROR_BITS) == paddr32) 3745 break; 3746 msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); 3747 } 3748 3749 iounmap(vaddr); 3750 3751 /* we leak the DMA buffer here ... no choice since the controller could 3752 * still complete the command. 3753 */ 3754 if (i == HPSA_MSG_SEND_RETRY_LIMIT) { 3755 dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", 3756 opcode, type); 3757 return -ETIMEDOUT; 3758 } 3759 3760 pci_free_consistent(pdev, cmd_sz, cmd, paddr64); 3761 3762 if (tag & HPSA_ERROR_BIT) { 3763 dev_err(&pdev->dev, "controller message %02x:%02x failed\n", 3764 opcode, type); 3765 return -EIO; 3766 } 3767 3768 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", 3769 opcode, type); 3770 return 0; 3771 } 3772 3773 #define hpsa_noop(p) hpsa_message(p, 3, 0) 3774 3775 static int hpsa_controller_hard_reset(struct pci_dev *pdev, 3776 void * __iomem vaddr, u32 use_doorbell) 3777 { 3778 u16 pmcsr; 3779 int pos; 3780 3781 if (use_doorbell) { 3782 /* For everything after the P600, the PCI power state method 3783 * of resetting the controller doesn't work, so we have this 3784 * other way using the doorbell register. 3785 */ 3786 dev_info(&pdev->dev, "using doorbell to reset controller\n"); 3787 writel(use_doorbell, vaddr + SA5_DOORBELL); 3788 } else { /* Try to do it the PCI power state way */ 3789 3790 /* Quoting from the Open CISS Specification: "The Power 3791 * Management Control/Status Register (CSR) controls the power 3792 * state of the device. The normal operating state is D0, 3793 * CSR=00h. The software off state is D3, CSR=03h. To reset 3794 * the controller, place the interface device in D3 then to D0, 3795 * this causes a secondary PCI reset which will reset the 3796 * controller." */ 3797 3798 pos = pci_find_capability(pdev, PCI_CAP_ID_PM); 3799 if (pos == 0) { 3800 dev_err(&pdev->dev, 3801 "hpsa_reset_controller: " 3802 "PCI PM not supported\n"); 3803 return -ENODEV; 3804 } 3805 dev_info(&pdev->dev, "using PCI PM to reset controller\n"); 3806 /* enter the D3hot power management state */ 3807 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); 3808 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3809 pmcsr |= PCI_D3hot; 3810 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3811 3812 msleep(500); 3813 3814 /* enter the D0 power management state */ 3815 pmcsr &= ~PCI_PM_CTRL_STATE_MASK; 3816 pmcsr |= PCI_D0; 3817 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); 3818 3819 /* 3820 * The P600 requires a small delay when changing states. 3821 * Otherwise we may think the board did not reset and we bail. 3822 * This for kdump only and is particular to the P600. 3823 */ 3824 msleep(500); 3825 } 3826 return 0; 3827 } 3828 3829 static void init_driver_version(char *driver_version, int len) 3830 { 3831 memset(driver_version, 0, len); 3832 strncpy(driver_version, HPSA " " HPSA_DRIVER_VERSION, len - 1); 3833 } 3834 3835 static int write_driver_ver_to_cfgtable(struct CfgTable __iomem *cfgtable) 3836 { 3837 char *driver_version; 3838 int i, size = sizeof(cfgtable->driver_version); 3839 3840 driver_version = kmalloc(size, GFP_KERNEL); 3841 if (!driver_version) 3842 return -ENOMEM; 3843 3844 init_driver_version(driver_version, size); 3845 for (i = 0; i < size; i++) 3846 writeb(driver_version[i], &cfgtable->driver_version[i]); 3847 kfree(driver_version); 3848 return 0; 3849 } 3850 3851 static void read_driver_ver_from_cfgtable(struct CfgTable __iomem *cfgtable, 3852 unsigned char *driver_ver) 3853 { 3854 int i; 3855 3856 for (i = 0; i < sizeof(cfgtable->driver_version); i++) 3857 driver_ver[i] = readb(&cfgtable->driver_version[i]); 3858 } 3859 3860 static int controller_reset_failed(struct CfgTable __iomem *cfgtable) 3861 { 3862 3863 char *driver_ver, *old_driver_ver; 3864 int rc, size = sizeof(cfgtable->driver_version); 3865 3866 old_driver_ver = kmalloc(2 * size, GFP_KERNEL); 3867 if (!old_driver_ver) 3868 return -ENOMEM; 3869 driver_ver = old_driver_ver + size; 3870 3871 /* After a reset, the 32 bytes of "driver version" in the cfgtable 3872 * should have been changed, otherwise we know the reset failed. 3873 */ 3874 init_driver_version(old_driver_ver, size); 3875 read_driver_ver_from_cfgtable(cfgtable, driver_ver); 3876 rc = !memcmp(driver_ver, old_driver_ver, size); 3877 kfree(old_driver_ver); 3878 return rc; 3879 } 3880 /* This does a hard reset of the controller using PCI power management 3881 * states or the using the doorbell register. 3882 */ 3883 static int hpsa_kdump_hard_reset_controller(struct pci_dev *pdev) 3884 { 3885 u64 cfg_offset; 3886 u32 cfg_base_addr; 3887 u64 cfg_base_addr_index; 3888 void __iomem *vaddr; 3889 unsigned long paddr; 3890 u32 misc_fw_support; 3891 int rc; 3892 struct CfgTable __iomem *cfgtable; 3893 u32 use_doorbell; 3894 u32 board_id; 3895 u16 command_register; 3896 3897 /* For controllers as old as the P600, this is very nearly 3898 * the same thing as 3899 * 3900 * pci_save_state(pci_dev); 3901 * pci_set_power_state(pci_dev, PCI_D3hot); 3902 * pci_set_power_state(pci_dev, PCI_D0); 3903 * pci_restore_state(pci_dev); 3904 * 3905 * For controllers newer than the P600, the pci power state 3906 * method of resetting doesn't work so we have another way 3907 * using the doorbell register. 3908 */ 3909 3910 rc = hpsa_lookup_board_id(pdev, &board_id); 3911 if (rc < 0 || !ctlr_is_resettable(board_id)) { 3912 dev_warn(&pdev->dev, "Not resetting device.\n"); 3913 return -ENODEV; 3914 } 3915 3916 /* if controller is soft- but not hard resettable... */ 3917 if (!ctlr_is_hard_resettable(board_id)) 3918 return -ENOTSUPP; /* try soft reset later. */ 3919 3920 /* Save the PCI command register */ 3921 pci_read_config_word(pdev, 4, &command_register); 3922 /* Turn the board off. This is so that later pci_restore_state() 3923 * won't turn the board on before the rest of config space is ready. 3924 */ 3925 pci_disable_device(pdev); 3926 pci_save_state(pdev); 3927 3928 /* find the first memory BAR, so we can find the cfg table */ 3929 rc = hpsa_pci_find_memory_BAR(pdev, &paddr); 3930 if (rc) 3931 return rc; 3932 vaddr = remap_pci_mem(paddr, 0x250); 3933 if (!vaddr) 3934 return -ENOMEM; 3935 3936 /* find cfgtable in order to check if reset via doorbell is supported */ 3937 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr, 3938 &cfg_base_addr_index, &cfg_offset); 3939 if (rc) 3940 goto unmap_vaddr; 3941 cfgtable = remap_pci_mem(pci_resource_start(pdev, 3942 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable)); 3943 if (!cfgtable) { 3944 rc = -ENOMEM; 3945 goto unmap_vaddr; 3946 } 3947 rc = write_driver_ver_to_cfgtable(cfgtable); 3948 if (rc) 3949 goto unmap_vaddr; 3950 3951 /* If reset via doorbell register is supported, use that. 3952 * There are two such methods. Favor the newest method. 3953 */ 3954 misc_fw_support = readl(&cfgtable->misc_fw_support); 3955 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2; 3956 if (use_doorbell) { 3957 use_doorbell = DOORBELL_CTLR_RESET2; 3958 } else { 3959 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET; 3960 if (use_doorbell) { 3961 dev_warn(&pdev->dev, "Soft reset not supported. " 3962 "Firmware update is required.\n"); 3963 rc = -ENOTSUPP; /* try soft reset */ 3964 goto unmap_cfgtable; 3965 } 3966 } 3967 3968 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell); 3969 if (rc) 3970 goto unmap_cfgtable; 3971 3972 pci_restore_state(pdev); 3973 rc = pci_enable_device(pdev); 3974 if (rc) { 3975 dev_warn(&pdev->dev, "failed to enable device.\n"); 3976 goto unmap_cfgtable; 3977 } 3978 pci_write_config_word(pdev, 4, command_register); 3979 3980 /* Some devices (notably the HP Smart Array 5i Controller) 3981 need a little pause here */ 3982 msleep(HPSA_POST_RESET_PAUSE_MSECS); 3983 3984 /* Wait for board to become not ready, then ready. */ 3985 dev_info(&pdev->dev, "Waiting for board to reset.\n"); 3986 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY); 3987 if (rc) { 3988 dev_warn(&pdev->dev, 3989 "failed waiting for board to reset." 3990 " Will try soft reset.\n"); 3991 rc = -ENOTSUPP; /* Not expected, but try soft reset later */ 3992 goto unmap_cfgtable; 3993 } 3994 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY); 3995 if (rc) { 3996 dev_warn(&pdev->dev, 3997 "failed waiting for board to become ready " 3998 "after hard reset\n"); 3999 goto unmap_cfgtable; 4000 } 4001 4002 rc = controller_reset_failed(vaddr); 4003 if (rc < 0) 4004 goto unmap_cfgtable; 4005 if (rc) { 4006 dev_warn(&pdev->dev, "Unable to successfully reset " 4007 "controller. Will try soft reset.\n"); 4008 rc = -ENOTSUPP; 4009 } else { 4010 dev_info(&pdev->dev, "board ready after hard reset.\n"); 4011 } 4012 4013 unmap_cfgtable: 4014 iounmap(cfgtable); 4015 4016 unmap_vaddr: 4017 iounmap(vaddr); 4018 return rc; 4019 } 4020 4021 /* 4022 * We cannot read the structure directly, for portability we must use 4023 * the io functions. 4024 * This is for debug only. 4025 */ 4026 static void print_cfg_table(struct device *dev, struct CfgTable *tb) 4027 { 4028 #ifdef HPSA_DEBUG 4029 int i; 4030 char temp_name[17]; 4031 4032 dev_info(dev, "Controller Configuration information\n"); 4033 dev_info(dev, "------------------------------------\n"); 4034 for (i = 0; i < 4; i++) 4035 temp_name[i] = readb(&(tb->Signature[i])); 4036 temp_name[4] = '\0'; 4037 dev_info(dev, " Signature = %s\n", temp_name); 4038 dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); 4039 dev_info(dev, " Transport methods supported = 0x%x\n", 4040 readl(&(tb->TransportSupport))); 4041 dev_info(dev, " Transport methods active = 0x%x\n", 4042 readl(&(tb->TransportActive))); 4043 dev_info(dev, " Requested transport Method = 0x%x\n", 4044 readl(&(tb->HostWrite.TransportRequest))); 4045 dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", 4046 readl(&(tb->HostWrite.CoalIntDelay))); 4047 dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", 4048 readl(&(tb->HostWrite.CoalIntCount))); 4049 dev_info(dev, " Max outstanding commands = 0x%d\n", 4050 readl(&(tb->CmdsOutMax))); 4051 dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); 4052 for (i = 0; i < 16; i++) 4053 temp_name[i] = readb(&(tb->ServerName[i])); 4054 temp_name[16] = '\0'; 4055 dev_info(dev, " Server Name = %s\n", temp_name); 4056 dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", 4057 readl(&(tb->HeartBeat))); 4058 #endif /* HPSA_DEBUG */ 4059 } 4060 4061 static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) 4062 { 4063 int i, offset, mem_type, bar_type; 4064 4065 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ 4066 return 0; 4067 offset = 0; 4068 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { 4069 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; 4070 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) 4071 offset += 4; 4072 else { 4073 mem_type = pci_resource_flags(pdev, i) & 4074 PCI_BASE_ADDRESS_MEM_TYPE_MASK; 4075 switch (mem_type) { 4076 case PCI_BASE_ADDRESS_MEM_TYPE_32: 4077 case PCI_BASE_ADDRESS_MEM_TYPE_1M: 4078 offset += 4; /* 32 bit */ 4079 break; 4080 case PCI_BASE_ADDRESS_MEM_TYPE_64: 4081 offset += 8; 4082 break; 4083 default: /* reserved in PCI 2.2 */ 4084 dev_warn(&pdev->dev, 4085 "base address is invalid\n"); 4086 return -1; 4087 break; 4088 } 4089 } 4090 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) 4091 return i + 1; 4092 } 4093 return -1; 4094 } 4095 4096 /* If MSI/MSI-X is supported by the kernel we will try to enable it on 4097 * controllers that are capable. If not, we use IO-APIC mode. 4098 */ 4099 4100 static void hpsa_interrupt_mode(struct ctlr_info *h) 4101 { 4102 #ifdef CONFIG_PCI_MSI 4103 int err, i; 4104 struct msix_entry hpsa_msix_entries[MAX_REPLY_QUEUES]; 4105 4106 for (i = 0; i < MAX_REPLY_QUEUES; i++) { 4107 hpsa_msix_entries[i].vector = 0; 4108 hpsa_msix_entries[i].entry = i; 4109 } 4110 4111 /* Some boards advertise MSI but don't really support it */ 4112 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) || 4113 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11)) 4114 goto default_int_mode; 4115 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) { 4116 dev_info(&h->pdev->dev, "MSIX\n"); 4117 err = pci_enable_msix(h->pdev, hpsa_msix_entries, 4118 MAX_REPLY_QUEUES); 4119 if (!err) { 4120 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4121 h->intr[i] = hpsa_msix_entries[i].vector; 4122 h->msix_vector = 1; 4123 return; 4124 } 4125 if (err > 0) { 4126 dev_warn(&h->pdev->dev, "only %d MSI-X vectors " 4127 "available\n", err); 4128 goto default_int_mode; 4129 } else { 4130 dev_warn(&h->pdev->dev, "MSI-X init failed %d\n", 4131 err); 4132 goto default_int_mode; 4133 } 4134 } 4135 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) { 4136 dev_info(&h->pdev->dev, "MSI\n"); 4137 if (!pci_enable_msi(h->pdev)) 4138 h->msi_vector = 1; 4139 else 4140 dev_warn(&h->pdev->dev, "MSI init failed\n"); 4141 } 4142 default_int_mode: 4143 #endif /* CONFIG_PCI_MSI */ 4144 /* if we get here we're going to use the default interrupt mode */ 4145 h->intr[h->intr_mode] = h->pdev->irq; 4146 } 4147 4148 static int hpsa_lookup_board_id(struct pci_dev *pdev, u32 *board_id) 4149 { 4150 int i; 4151 u32 subsystem_vendor_id, subsystem_device_id; 4152 4153 subsystem_vendor_id = pdev->subsystem_vendor; 4154 subsystem_device_id = pdev->subsystem_device; 4155 *board_id = ((subsystem_device_id << 16) & 0xffff0000) | 4156 subsystem_vendor_id; 4157 4158 for (i = 0; i < ARRAY_SIZE(products); i++) 4159 if (*board_id == products[i].board_id) 4160 return i; 4161 4162 if ((subsystem_vendor_id != PCI_VENDOR_ID_HP && 4163 subsystem_vendor_id != PCI_VENDOR_ID_COMPAQ) || 4164 !hpsa_allow_any) { 4165 dev_warn(&pdev->dev, "unrecognized board ID: " 4166 "0x%08x, ignoring.\n", *board_id); 4167 return -ENODEV; 4168 } 4169 return ARRAY_SIZE(products) - 1; /* generic unknown smart array */ 4170 } 4171 4172 static int hpsa_pci_find_memory_BAR(struct pci_dev *pdev, 4173 unsigned long *memory_bar) 4174 { 4175 int i; 4176 4177 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) 4178 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) { 4179 /* addressing mode bits already removed */ 4180 *memory_bar = pci_resource_start(pdev, i); 4181 dev_dbg(&pdev->dev, "memory BAR = %lx\n", 4182 *memory_bar); 4183 return 0; 4184 } 4185 dev_warn(&pdev->dev, "no memory BAR found\n"); 4186 return -ENODEV; 4187 } 4188 4189 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr, 4190 int wait_for_ready) 4191 { 4192 int i, iterations; 4193 u32 scratchpad; 4194 if (wait_for_ready) 4195 iterations = HPSA_BOARD_READY_ITERATIONS; 4196 else 4197 iterations = HPSA_BOARD_NOT_READY_ITERATIONS; 4198 4199 for (i = 0; i < iterations; i++) { 4200 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET); 4201 if (wait_for_ready) { 4202 if (scratchpad == HPSA_FIRMWARE_READY) 4203 return 0; 4204 } else { 4205 if (scratchpad != HPSA_FIRMWARE_READY) 4206 return 0; 4207 } 4208 msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); 4209 } 4210 dev_warn(&pdev->dev, "board not ready, timed out.\n"); 4211 return -ENODEV; 4212 } 4213 4214 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr, 4215 u32 *cfg_base_addr, u64 *cfg_base_addr_index, 4216 u64 *cfg_offset) 4217 { 4218 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET); 4219 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET); 4220 *cfg_base_addr &= (u32) 0x0000ffff; 4221 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr); 4222 if (*cfg_base_addr_index == -1) { 4223 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); 4224 return -ENODEV; 4225 } 4226 return 0; 4227 } 4228 4229 static int hpsa_find_cfgtables(struct ctlr_info *h) 4230 { 4231 u64 cfg_offset; 4232 u32 cfg_base_addr; 4233 u64 cfg_base_addr_index; 4234 u32 trans_offset; 4235 int rc; 4236 4237 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr, 4238 &cfg_base_addr_index, &cfg_offset); 4239 if (rc) 4240 return rc; 4241 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev, 4242 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable)); 4243 if (!h->cfgtable) 4244 return -ENOMEM; 4245 rc = write_driver_ver_to_cfgtable(h->cfgtable); 4246 if (rc) 4247 return rc; 4248 /* Find performant mode table. */ 4249 trans_offset = readl(&h->cfgtable->TransMethodOffset); 4250 h->transtable = remap_pci_mem(pci_resource_start(h->pdev, 4251 cfg_base_addr_index)+cfg_offset+trans_offset, 4252 sizeof(*h->transtable)); 4253 if (!h->transtable) 4254 return -ENOMEM; 4255 return 0; 4256 } 4257 4258 static void hpsa_get_max_perf_mode_cmds(struct ctlr_info *h) 4259 { 4260 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands)); 4261 4262 /* Limit commands in memory limited kdump scenario. */ 4263 if (reset_devices && h->max_commands > 32) 4264 h->max_commands = 32; 4265 4266 if (h->max_commands < 16) { 4267 dev_warn(&h->pdev->dev, "Controller reports " 4268 "max supported commands of %d, an obvious lie. " 4269 "Using 16. Ensure that firmware is up to date.\n", 4270 h->max_commands); 4271 h->max_commands = 16; 4272 } 4273 } 4274 4275 /* Interrogate the hardware for some limits: 4276 * max commands, max SG elements without chaining, and with chaining, 4277 * SG chain block size, etc. 4278 */ 4279 static void hpsa_find_board_params(struct ctlr_info *h) 4280 { 4281 hpsa_get_max_perf_mode_cmds(h); 4282 h->nr_cmds = h->max_commands - 4; /* Allow room for some ioctls */ 4283 h->maxsgentries = readl(&(h->cfgtable->MaxScatterGatherElements)); 4284 /* 4285 * Limit in-command s/g elements to 32 save dma'able memory. 4286 * Howvever spec says if 0, use 31 4287 */ 4288 h->max_cmd_sg_entries = 31; 4289 if (h->maxsgentries > 512) { 4290 h->max_cmd_sg_entries = 32; 4291 h->chainsize = h->maxsgentries - h->max_cmd_sg_entries + 1; 4292 h->maxsgentries--; /* save one for chain pointer */ 4293 } else { 4294 h->maxsgentries = 31; /* default to traditional values */ 4295 h->chainsize = 0; 4296 } 4297 4298 /* Find out what task management functions are supported and cache */ 4299 h->TMFSupportFlags = readl(&(h->cfgtable->TMFSupportFlags)); 4300 } 4301 4302 static inline bool hpsa_CISS_signature_present(struct ctlr_info *h) 4303 { 4304 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) { 4305 dev_warn(&h->pdev->dev, "not a valid CISS config table\n"); 4306 return false; 4307 } 4308 return true; 4309 } 4310 4311 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 4312 static inline void hpsa_enable_scsi_prefetch(struct ctlr_info *h) 4313 { 4314 #ifdef CONFIG_X86 4315 u32 prefetch; 4316 4317 prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); 4318 prefetch |= 0x100; 4319 writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); 4320 #endif 4321 } 4322 4323 /* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result 4324 * in a prefetch beyond physical memory. 4325 */ 4326 static inline void hpsa_p600_dma_prefetch_quirk(struct ctlr_info *h) 4327 { 4328 u32 dma_prefetch; 4329 4330 if (h->board_id != 0x3225103C) 4331 return; 4332 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); 4333 dma_prefetch |= 0x8000; 4334 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); 4335 } 4336 4337 static void hpsa_wait_for_mode_change_ack(struct ctlr_info *h) 4338 { 4339 int i; 4340 u32 doorbell_value; 4341 unsigned long flags; 4342 4343 /* under certain very rare conditions, this can take awhile. 4344 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right 4345 * as we enter this code.) 4346 */ 4347 for (i = 0; i < MAX_CONFIG_WAIT; i++) { 4348 spin_lock_irqsave(&h->lock, flags); 4349 doorbell_value = readl(h->vaddr + SA5_DOORBELL); 4350 spin_unlock_irqrestore(&h->lock, flags); 4351 if (!(doorbell_value & CFGTBL_ChangeReq)) 4352 break; 4353 /* delay and try again */ 4354 usleep_range(10000, 20000); 4355 } 4356 } 4357 4358 static int hpsa_enter_simple_mode(struct ctlr_info *h) 4359 { 4360 u32 trans_support; 4361 4362 trans_support = readl(&(h->cfgtable->TransportSupport)); 4363 if (!(trans_support & SIMPLE_MODE)) 4364 return -ENOTSUPP; 4365 4366 h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); 4367 /* Update the field, and then ring the doorbell */ 4368 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); 4369 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 4370 hpsa_wait_for_mode_change_ack(h); 4371 print_cfg_table(&h->pdev->dev, h->cfgtable); 4372 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { 4373 dev_warn(&h->pdev->dev, 4374 "unable to get board into simple mode\n"); 4375 return -ENODEV; 4376 } 4377 h->transMethod = CFGTBL_Trans_Simple; 4378 return 0; 4379 } 4380 4381 static int hpsa_pci_init(struct ctlr_info *h) 4382 { 4383 int prod_index, err; 4384 4385 prod_index = hpsa_lookup_board_id(h->pdev, &h->board_id); 4386 if (prod_index < 0) 4387 return -ENODEV; 4388 h->product_name = products[prod_index].product_name; 4389 h->access = *(products[prod_index].access); 4390 4391 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S | 4392 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM); 4393 4394 err = pci_enable_device(h->pdev); 4395 if (err) { 4396 dev_warn(&h->pdev->dev, "unable to enable PCI device\n"); 4397 return err; 4398 } 4399 4400 /* Enable bus mastering (pci_disable_device may disable this) */ 4401 pci_set_master(h->pdev); 4402 4403 err = pci_request_regions(h->pdev, HPSA); 4404 if (err) { 4405 dev_err(&h->pdev->dev, 4406 "cannot obtain PCI resources, aborting\n"); 4407 return err; 4408 } 4409 hpsa_interrupt_mode(h); 4410 err = hpsa_pci_find_memory_BAR(h->pdev, &h->paddr); 4411 if (err) 4412 goto err_out_free_res; 4413 h->vaddr = remap_pci_mem(h->paddr, 0x250); 4414 if (!h->vaddr) { 4415 err = -ENOMEM; 4416 goto err_out_free_res; 4417 } 4418 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY); 4419 if (err) 4420 goto err_out_free_res; 4421 err = hpsa_find_cfgtables(h); 4422 if (err) 4423 goto err_out_free_res; 4424 hpsa_find_board_params(h); 4425 4426 if (!hpsa_CISS_signature_present(h)) { 4427 err = -ENODEV; 4428 goto err_out_free_res; 4429 } 4430 hpsa_enable_scsi_prefetch(h); 4431 hpsa_p600_dma_prefetch_quirk(h); 4432 err = hpsa_enter_simple_mode(h); 4433 if (err) 4434 goto err_out_free_res; 4435 return 0; 4436 4437 err_out_free_res: 4438 if (h->transtable) 4439 iounmap(h->transtable); 4440 if (h->cfgtable) 4441 iounmap(h->cfgtable); 4442 if (h->vaddr) 4443 iounmap(h->vaddr); 4444 pci_disable_device(h->pdev); 4445 pci_release_regions(h->pdev); 4446 return err; 4447 } 4448 4449 static void hpsa_hba_inquiry(struct ctlr_info *h) 4450 { 4451 int rc; 4452 4453 #define HBA_INQUIRY_BYTE_COUNT 64 4454 h->hba_inquiry_data = kmalloc(HBA_INQUIRY_BYTE_COUNT, GFP_KERNEL); 4455 if (!h->hba_inquiry_data) 4456 return; 4457 rc = hpsa_scsi_do_inquiry(h, RAID_CTLR_LUNID, 0, 4458 h->hba_inquiry_data, HBA_INQUIRY_BYTE_COUNT); 4459 if (rc != 0) { 4460 kfree(h->hba_inquiry_data); 4461 h->hba_inquiry_data = NULL; 4462 } 4463 } 4464 4465 static int hpsa_init_reset_devices(struct pci_dev *pdev) 4466 { 4467 int rc, i; 4468 4469 if (!reset_devices) 4470 return 0; 4471 4472 /* Reset the controller with a PCI power-cycle or via doorbell */ 4473 rc = hpsa_kdump_hard_reset_controller(pdev); 4474 4475 /* -ENOTSUPP here means we cannot reset the controller 4476 * but it's already (and still) up and running in 4477 * "performant mode". Or, it might be 640x, which can't reset 4478 * due to concerns about shared bbwc between 6402/6404 pair. 4479 */ 4480 if (rc == -ENOTSUPP) 4481 return rc; /* just try to do the kdump anyhow. */ 4482 if (rc) 4483 return -ENODEV; 4484 4485 /* Now try to get the controller to respond to a no-op */ 4486 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n"); 4487 for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { 4488 if (hpsa_noop(pdev) == 0) 4489 break; 4490 else 4491 dev_warn(&pdev->dev, "no-op failed%s\n", 4492 (i < 11 ? "; re-trying" : "")); 4493 } 4494 return 0; 4495 } 4496 4497 static int hpsa_allocate_cmd_pool(struct ctlr_info *h) 4498 { 4499 h->cmd_pool_bits = kzalloc( 4500 DIV_ROUND_UP(h->nr_cmds, BITS_PER_LONG) * 4501 sizeof(unsigned long), GFP_KERNEL); 4502 h->cmd_pool = pci_alloc_consistent(h->pdev, 4503 h->nr_cmds * sizeof(*h->cmd_pool), 4504 &(h->cmd_pool_dhandle)); 4505 h->errinfo_pool = pci_alloc_consistent(h->pdev, 4506 h->nr_cmds * sizeof(*h->errinfo_pool), 4507 &(h->errinfo_pool_dhandle)); 4508 if ((h->cmd_pool_bits == NULL) 4509 || (h->cmd_pool == NULL) 4510 || (h->errinfo_pool == NULL)) { 4511 dev_err(&h->pdev->dev, "out of memory in %s", __func__); 4512 return -ENOMEM; 4513 } 4514 return 0; 4515 } 4516 4517 static void hpsa_free_cmd_pool(struct ctlr_info *h) 4518 { 4519 kfree(h->cmd_pool_bits); 4520 if (h->cmd_pool) 4521 pci_free_consistent(h->pdev, 4522 h->nr_cmds * sizeof(struct CommandList), 4523 h->cmd_pool, h->cmd_pool_dhandle); 4524 if (h->errinfo_pool) 4525 pci_free_consistent(h->pdev, 4526 h->nr_cmds * sizeof(struct ErrorInfo), 4527 h->errinfo_pool, 4528 h->errinfo_pool_dhandle); 4529 } 4530 4531 static int hpsa_request_irq(struct ctlr_info *h, 4532 irqreturn_t (*msixhandler)(int, void *), 4533 irqreturn_t (*intxhandler)(int, void *)) 4534 { 4535 int rc, i; 4536 4537 /* 4538 * initialize h->q[x] = x so that interrupt handlers know which 4539 * queue to process. 4540 */ 4541 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4542 h->q[i] = (u8) i; 4543 4544 if (h->intr_mode == PERF_MODE_INT && h->msix_vector) { 4545 /* If performant mode and MSI-X, use multiple reply queues */ 4546 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4547 rc = request_irq(h->intr[i], msixhandler, 4548 0, h->devname, 4549 &h->q[i]); 4550 } else { 4551 /* Use single reply pool */ 4552 if (h->msix_vector || h->msi_vector) { 4553 rc = request_irq(h->intr[h->intr_mode], 4554 msixhandler, 0, h->devname, 4555 &h->q[h->intr_mode]); 4556 } else { 4557 rc = request_irq(h->intr[h->intr_mode], 4558 intxhandler, IRQF_SHARED, h->devname, 4559 &h->q[h->intr_mode]); 4560 } 4561 } 4562 if (rc) { 4563 dev_err(&h->pdev->dev, "unable to get irq %d for %s\n", 4564 h->intr[h->intr_mode], h->devname); 4565 return -ENODEV; 4566 } 4567 return 0; 4568 } 4569 4570 static int hpsa_kdump_soft_reset(struct ctlr_info *h) 4571 { 4572 if (hpsa_send_host_reset(h, RAID_CTLR_LUNID, 4573 HPSA_RESET_TYPE_CONTROLLER)) { 4574 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n"); 4575 return -EIO; 4576 } 4577 4578 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n"); 4579 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) { 4580 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n"); 4581 return -1; 4582 } 4583 4584 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n"); 4585 if (hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) { 4586 dev_warn(&h->pdev->dev, "Board failed to become ready " 4587 "after soft reset.\n"); 4588 return -1; 4589 } 4590 4591 return 0; 4592 } 4593 4594 static void free_irqs(struct ctlr_info *h) 4595 { 4596 int i; 4597 4598 if (!h->msix_vector || h->intr_mode != PERF_MODE_INT) { 4599 /* Single reply queue, only one irq to free */ 4600 i = h->intr_mode; 4601 free_irq(h->intr[i], &h->q[i]); 4602 return; 4603 } 4604 4605 for (i = 0; i < MAX_REPLY_QUEUES; i++) 4606 free_irq(h->intr[i], &h->q[i]); 4607 } 4608 4609 static void hpsa_free_irqs_and_disable_msix(struct ctlr_info *h) 4610 { 4611 free_irqs(h); 4612 #ifdef CONFIG_PCI_MSI 4613 if (h->msix_vector) { 4614 if (h->pdev->msix_enabled) 4615 pci_disable_msix(h->pdev); 4616 } else if (h->msi_vector) { 4617 if (h->pdev->msi_enabled) 4618 pci_disable_msi(h->pdev); 4619 } 4620 #endif /* CONFIG_PCI_MSI */ 4621 } 4622 4623 static void hpsa_undo_allocations_after_kdump_soft_reset(struct ctlr_info *h) 4624 { 4625 hpsa_free_irqs_and_disable_msix(h); 4626 hpsa_free_sg_chain_blocks(h); 4627 hpsa_free_cmd_pool(h); 4628 kfree(h->blockFetchTable); 4629 pci_free_consistent(h->pdev, h->reply_pool_size, 4630 h->reply_pool, h->reply_pool_dhandle); 4631 if (h->vaddr) 4632 iounmap(h->vaddr); 4633 if (h->transtable) 4634 iounmap(h->transtable); 4635 if (h->cfgtable) 4636 iounmap(h->cfgtable); 4637 pci_release_regions(h->pdev); 4638 kfree(h); 4639 } 4640 4641 static void remove_ctlr_from_lockup_detector_list(struct ctlr_info *h) 4642 { 4643 assert_spin_locked(&lockup_detector_lock); 4644 if (!hpsa_lockup_detector) 4645 return; 4646 if (h->lockup_detected) 4647 return; /* already stopped the lockup detector */ 4648 list_del(&h->lockup_list); 4649 } 4650 4651 /* Called when controller lockup detected. */ 4652 static void fail_all_cmds_on_list(struct ctlr_info *h, struct list_head *list) 4653 { 4654 struct CommandList *c = NULL; 4655 4656 assert_spin_locked(&h->lock); 4657 /* Mark all outstanding commands as failed and complete them. */ 4658 while (!list_empty(list)) { 4659 c = list_entry(list->next, struct CommandList, list); 4660 c->err_info->CommandStatus = CMD_HARDWARE_ERR; 4661 finish_cmd(c); 4662 } 4663 } 4664 4665 static void controller_lockup_detected(struct ctlr_info *h) 4666 { 4667 unsigned long flags; 4668 4669 assert_spin_locked(&lockup_detector_lock); 4670 remove_ctlr_from_lockup_detector_list(h); 4671 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4672 spin_lock_irqsave(&h->lock, flags); 4673 h->lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); 4674 spin_unlock_irqrestore(&h->lock, flags); 4675 dev_warn(&h->pdev->dev, "Controller lockup detected: 0x%08x\n", 4676 h->lockup_detected); 4677 pci_disable_device(h->pdev); 4678 spin_lock_irqsave(&h->lock, flags); 4679 fail_all_cmds_on_list(h, &h->cmpQ); 4680 fail_all_cmds_on_list(h, &h->reqQ); 4681 spin_unlock_irqrestore(&h->lock, flags); 4682 } 4683 4684 static void detect_controller_lockup(struct ctlr_info *h) 4685 { 4686 u64 now; 4687 u32 heartbeat; 4688 unsigned long flags; 4689 4690 assert_spin_locked(&lockup_detector_lock); 4691 now = get_jiffies_64(); 4692 /* If we've received an interrupt recently, we're ok. */ 4693 if (time_after64(h->last_intr_timestamp + 4694 (h->heartbeat_sample_interval), now)) 4695 return; 4696 4697 /* 4698 * If we've already checked the heartbeat recently, we're ok. 4699 * This could happen if someone sends us a signal. We 4700 * otherwise don't care about signals in this thread. 4701 */ 4702 if (time_after64(h->last_heartbeat_timestamp + 4703 (h->heartbeat_sample_interval), now)) 4704 return; 4705 4706 /* If heartbeat has not changed since we last looked, we're not ok. */ 4707 spin_lock_irqsave(&h->lock, flags); 4708 heartbeat = readl(&h->cfgtable->HeartBeat); 4709 spin_unlock_irqrestore(&h->lock, flags); 4710 if (h->last_heartbeat == heartbeat) { 4711 controller_lockup_detected(h); 4712 return; 4713 } 4714 4715 /* We're ok. */ 4716 h->last_heartbeat = heartbeat; 4717 h->last_heartbeat_timestamp = now; 4718 } 4719 4720 static int detect_controller_lockup_thread(void *notused) 4721 { 4722 struct ctlr_info *h; 4723 unsigned long flags; 4724 4725 while (1) { 4726 struct list_head *this, *tmp; 4727 4728 schedule_timeout_interruptible(HEARTBEAT_SAMPLE_INTERVAL); 4729 if (kthread_should_stop()) 4730 break; 4731 spin_lock_irqsave(&lockup_detector_lock, flags); 4732 list_for_each_safe(this, tmp, &hpsa_ctlr_list) { 4733 h = list_entry(this, struct ctlr_info, lockup_list); 4734 detect_controller_lockup(h); 4735 } 4736 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4737 } 4738 return 0; 4739 } 4740 4741 static void add_ctlr_to_lockup_detector_list(struct ctlr_info *h) 4742 { 4743 unsigned long flags; 4744 4745 h->heartbeat_sample_interval = HEARTBEAT_SAMPLE_INTERVAL; 4746 spin_lock_irqsave(&lockup_detector_lock, flags); 4747 list_add_tail(&h->lockup_list, &hpsa_ctlr_list); 4748 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4749 } 4750 4751 static void start_controller_lockup_detector(struct ctlr_info *h) 4752 { 4753 /* Start the lockup detector thread if not already started */ 4754 if (!hpsa_lockup_detector) { 4755 spin_lock_init(&lockup_detector_lock); 4756 hpsa_lockup_detector = 4757 kthread_run(detect_controller_lockup_thread, 4758 NULL, HPSA); 4759 } 4760 if (!hpsa_lockup_detector) { 4761 dev_warn(&h->pdev->dev, 4762 "Could not start lockup detector thread\n"); 4763 return; 4764 } 4765 add_ctlr_to_lockup_detector_list(h); 4766 } 4767 4768 static void stop_controller_lockup_detector(struct ctlr_info *h) 4769 { 4770 unsigned long flags; 4771 4772 spin_lock_irqsave(&lockup_detector_lock, flags); 4773 remove_ctlr_from_lockup_detector_list(h); 4774 /* If the list of ctlr's to monitor is empty, stop the thread */ 4775 if (list_empty(&hpsa_ctlr_list)) { 4776 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4777 kthread_stop(hpsa_lockup_detector); 4778 spin_lock_irqsave(&lockup_detector_lock, flags); 4779 hpsa_lockup_detector = NULL; 4780 } 4781 spin_unlock_irqrestore(&lockup_detector_lock, flags); 4782 } 4783 4784 static int hpsa_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) 4785 { 4786 int dac, rc; 4787 struct ctlr_info *h; 4788 int try_soft_reset = 0; 4789 unsigned long flags; 4790 4791 if (number_of_controllers == 0) 4792 printk(KERN_INFO DRIVER_NAME "\n"); 4793 4794 rc = hpsa_init_reset_devices(pdev); 4795 if (rc) { 4796 if (rc != -ENOTSUPP) 4797 return rc; 4798 /* If the reset fails in a particular way (it has no way to do 4799 * a proper hard reset, so returns -ENOTSUPP) we can try to do 4800 * a soft reset once we get the controller configured up to the 4801 * point that it can accept a command. 4802 */ 4803 try_soft_reset = 1; 4804 rc = 0; 4805 } 4806 4807 reinit_after_soft_reset: 4808 4809 /* Command structures must be aligned on a 32-byte boundary because 4810 * the 5 lower bits of the address are used by the hardware. and by 4811 * the driver. See comments in hpsa.h for more info. 4812 */ 4813 #define COMMANDLIST_ALIGNMENT 32 4814 BUILD_BUG_ON(sizeof(struct CommandList) % COMMANDLIST_ALIGNMENT); 4815 h = kzalloc(sizeof(*h), GFP_KERNEL); 4816 if (!h) 4817 return -ENOMEM; 4818 4819 h->pdev = pdev; 4820 h->intr_mode = hpsa_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT; 4821 INIT_LIST_HEAD(&h->cmpQ); 4822 INIT_LIST_HEAD(&h->reqQ); 4823 spin_lock_init(&h->lock); 4824 spin_lock_init(&h->scan_lock); 4825 rc = hpsa_pci_init(h); 4826 if (rc != 0) 4827 goto clean1; 4828 4829 sprintf(h->devname, HPSA "%d", number_of_controllers); 4830 h->ctlr = number_of_controllers; 4831 number_of_controllers++; 4832 4833 /* configure PCI DMA stuff */ 4834 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 4835 if (rc == 0) { 4836 dac = 1; 4837 } else { 4838 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 4839 if (rc == 0) { 4840 dac = 0; 4841 } else { 4842 dev_err(&pdev->dev, "no suitable DMA available\n"); 4843 goto clean1; 4844 } 4845 } 4846 4847 /* make sure the board interrupts are off */ 4848 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4849 4850 if (hpsa_request_irq(h, do_hpsa_intr_msi, do_hpsa_intr_intx)) 4851 goto clean2; 4852 dev_info(&pdev->dev, "%s: <0x%x> at IRQ %d%s using DAC\n", 4853 h->devname, pdev->device, 4854 h->intr[h->intr_mode], dac ? "" : " not"); 4855 if (hpsa_allocate_cmd_pool(h)) 4856 goto clean4; 4857 if (hpsa_allocate_sg_chain_blocks(h)) 4858 goto clean4; 4859 init_waitqueue_head(&h->scan_wait_queue); 4860 h->scan_finished = 1; /* no scan currently in progress */ 4861 4862 pci_set_drvdata(pdev, h); 4863 h->ndevices = 0; 4864 h->scsi_host = NULL; 4865 spin_lock_init(&h->devlock); 4866 hpsa_put_ctlr_into_performant_mode(h); 4867 4868 /* At this point, the controller is ready to take commands. 4869 * Now, if reset_devices and the hard reset didn't work, try 4870 * the soft reset and see if that works. 4871 */ 4872 if (try_soft_reset) { 4873 4874 /* This is kind of gross. We may or may not get a completion 4875 * from the soft reset command, and if we do, then the value 4876 * from the fifo may or may not be valid. So, we wait 10 secs 4877 * after the reset throwing away any completions we get during 4878 * that time. Unregister the interrupt handler and register 4879 * fake ones to scoop up any residual completions. 4880 */ 4881 spin_lock_irqsave(&h->lock, flags); 4882 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4883 spin_unlock_irqrestore(&h->lock, flags); 4884 free_irqs(h); 4885 rc = hpsa_request_irq(h, hpsa_msix_discard_completions, 4886 hpsa_intx_discard_completions); 4887 if (rc) { 4888 dev_warn(&h->pdev->dev, "Failed to request_irq after " 4889 "soft reset.\n"); 4890 goto clean4; 4891 } 4892 4893 rc = hpsa_kdump_soft_reset(h); 4894 if (rc) 4895 /* Neither hard nor soft reset worked, we're hosed. */ 4896 goto clean4; 4897 4898 dev_info(&h->pdev->dev, "Board READY.\n"); 4899 dev_info(&h->pdev->dev, 4900 "Waiting for stale completions to drain.\n"); 4901 h->access.set_intr_mask(h, HPSA_INTR_ON); 4902 msleep(10000); 4903 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4904 4905 rc = controller_reset_failed(h->cfgtable); 4906 if (rc) 4907 dev_info(&h->pdev->dev, 4908 "Soft reset appears to have failed.\n"); 4909 4910 /* since the controller's reset, we have to go back and re-init 4911 * everything. Easiest to just forget what we've done and do it 4912 * all over again. 4913 */ 4914 hpsa_undo_allocations_after_kdump_soft_reset(h); 4915 try_soft_reset = 0; 4916 if (rc) 4917 /* don't go to clean4, we already unallocated */ 4918 return -ENODEV; 4919 4920 goto reinit_after_soft_reset; 4921 } 4922 4923 /* Turn the interrupts on so we can service requests */ 4924 h->access.set_intr_mask(h, HPSA_INTR_ON); 4925 4926 hpsa_hba_inquiry(h); 4927 hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ 4928 start_controller_lockup_detector(h); 4929 return 1; 4930 4931 clean4: 4932 hpsa_free_sg_chain_blocks(h); 4933 hpsa_free_cmd_pool(h); 4934 free_irqs(h); 4935 clean2: 4936 clean1: 4937 kfree(h); 4938 return rc; 4939 } 4940 4941 static void hpsa_flush_cache(struct ctlr_info *h) 4942 { 4943 char *flush_buf; 4944 struct CommandList *c; 4945 4946 flush_buf = kzalloc(4, GFP_KERNEL); 4947 if (!flush_buf) 4948 return; 4949 4950 c = cmd_special_alloc(h); 4951 if (!c) { 4952 dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); 4953 goto out_of_memory; 4954 } 4955 if (fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, 4956 RAID_CTLR_LUNID, TYPE_CMD)) { 4957 goto out; 4958 } 4959 hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); 4960 if (c->err_info->CommandStatus != 0) 4961 out: 4962 dev_warn(&h->pdev->dev, 4963 "error flushing cache on controller\n"); 4964 cmd_special_free(h, c); 4965 out_of_memory: 4966 kfree(flush_buf); 4967 } 4968 4969 static void hpsa_shutdown(struct pci_dev *pdev) 4970 { 4971 struct ctlr_info *h; 4972 4973 h = pci_get_drvdata(pdev); 4974 /* Turn board interrupts off and send the flush cache command 4975 * sendcmd will turn off interrupt, and send the flush... 4976 * To write all data in the battery backed cache to disks 4977 */ 4978 hpsa_flush_cache(h); 4979 h->access.set_intr_mask(h, HPSA_INTR_OFF); 4980 hpsa_free_irqs_and_disable_msix(h); 4981 } 4982 4983 static void hpsa_free_device_info(struct ctlr_info *h) 4984 { 4985 int i; 4986 4987 for (i = 0; i < h->ndevices; i++) 4988 kfree(h->dev[i]); 4989 } 4990 4991 static void hpsa_remove_one(struct pci_dev *pdev) 4992 { 4993 struct ctlr_info *h; 4994 4995 if (pci_get_drvdata(pdev) == NULL) { 4996 dev_err(&pdev->dev, "unable to remove device\n"); 4997 return; 4998 } 4999 h = pci_get_drvdata(pdev); 5000 stop_controller_lockup_detector(h); 5001 hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ 5002 hpsa_shutdown(pdev); 5003 iounmap(h->vaddr); 5004 iounmap(h->transtable); 5005 iounmap(h->cfgtable); 5006 hpsa_free_device_info(h); 5007 hpsa_free_sg_chain_blocks(h); 5008 pci_free_consistent(h->pdev, 5009 h->nr_cmds * sizeof(struct CommandList), 5010 h->cmd_pool, h->cmd_pool_dhandle); 5011 pci_free_consistent(h->pdev, 5012 h->nr_cmds * sizeof(struct ErrorInfo), 5013 h->errinfo_pool, h->errinfo_pool_dhandle); 5014 pci_free_consistent(h->pdev, h->reply_pool_size, 5015 h->reply_pool, h->reply_pool_dhandle); 5016 kfree(h->cmd_pool_bits); 5017 kfree(h->blockFetchTable); 5018 kfree(h->hba_inquiry_data); 5019 pci_disable_device(pdev); 5020 pci_release_regions(pdev); 5021 pci_set_drvdata(pdev, NULL); 5022 kfree(h); 5023 } 5024 5025 static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, 5026 __attribute__((unused)) pm_message_t state) 5027 { 5028 return -ENOSYS; 5029 } 5030 5031 static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) 5032 { 5033 return -ENOSYS; 5034 } 5035 5036 static struct pci_driver hpsa_pci_driver = { 5037 .name = HPSA, 5038 .probe = hpsa_init_one, 5039 .remove = hpsa_remove_one, 5040 .id_table = hpsa_pci_device_id, /* id_table */ 5041 .shutdown = hpsa_shutdown, 5042 .suspend = hpsa_suspend, 5043 .resume = hpsa_resume, 5044 }; 5045 5046 /* Fill in bucket_map[], given nsgs (the max number of 5047 * scatter gather elements supported) and bucket[], 5048 * which is an array of 8 integers. The bucket[] array 5049 * contains 8 different DMA transfer sizes (in 16 5050 * byte increments) which the controller uses to fetch 5051 * commands. This function fills in bucket_map[], which 5052 * maps a given number of scatter gather elements to one of 5053 * the 8 DMA transfer sizes. The point of it is to allow the 5054 * controller to only do as much DMA as needed to fetch the 5055 * command, with the DMA transfer size encoded in the lower 5056 * bits of the command address. 5057 */ 5058 static void calc_bucket_map(int bucket[], int num_buckets, 5059 int nsgs, int *bucket_map) 5060 { 5061 int i, j, b, size; 5062 5063 /* even a command with 0 SGs requires 4 blocks */ 5064 #define MINIMUM_TRANSFER_BLOCKS 4 5065 #define NUM_BUCKETS 8 5066 /* Note, bucket_map must have nsgs+1 entries. */ 5067 for (i = 0; i <= nsgs; i++) { 5068 /* Compute size of a command with i SG entries */ 5069 size = i + MINIMUM_TRANSFER_BLOCKS; 5070 b = num_buckets; /* Assume the biggest bucket */ 5071 /* Find the bucket that is just big enough */ 5072 for (j = 0; j < 8; j++) { 5073 if (bucket[j] >= size) { 5074 b = j; 5075 break; 5076 } 5077 } 5078 /* for a command with i SG entries, use bucket b. */ 5079 bucket_map[i] = b; 5080 } 5081 } 5082 5083 static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 use_short_tags) 5084 { 5085 int i; 5086 unsigned long register_value; 5087 5088 /* This is a bit complicated. There are 8 registers on 5089 * the controller which we write to to tell it 8 different 5090 * sizes of commands which there may be. It's a way of 5091 * reducing the DMA done to fetch each command. Encoded into 5092 * each command's tag are 3 bits which communicate to the controller 5093 * which of the eight sizes that command fits within. The size of 5094 * each command depends on how many scatter gather entries there are. 5095 * Each SG entry requires 16 bytes. The eight registers are programmed 5096 * with the number of 16-byte blocks a command of that size requires. 5097 * The smallest command possible requires 5 such 16 byte blocks. 5098 * the largest command possible requires SG_ENTRIES_IN_CMD + 4 16-byte 5099 * blocks. Note, this only extends to the SG entries contained 5100 * within the command block, and does not extend to chained blocks 5101 * of SG elements. bft[] contains the eight values we write to 5102 * the registers. They are not evenly distributed, but have more 5103 * sizes for small commands, and fewer sizes for larger commands. 5104 */ 5105 int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4}; 5106 BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4); 5107 /* 5 = 1 s/g entry or 4k 5108 * 6 = 2 s/g entry or 8k 5109 * 8 = 4 s/g entry or 16k 5110 * 10 = 6 s/g entry or 24k 5111 */ 5112 5113 /* Controller spec: zero out this buffer. */ 5114 memset(h->reply_pool, 0, h->reply_pool_size); 5115 5116 bft[7] = SG_ENTRIES_IN_CMD + 4; 5117 calc_bucket_map(bft, ARRAY_SIZE(bft), 5118 SG_ENTRIES_IN_CMD, h->blockFetchTable); 5119 for (i = 0; i < 8; i++) 5120 writel(bft[i], &h->transtable->BlockFetch[i]); 5121 5122 /* size of controller ring buffer */ 5123 writel(h->max_commands, &h->transtable->RepQSize); 5124 writel(h->nreply_queues, &h->transtable->RepQCount); 5125 writel(0, &h->transtable->RepQCtrAddrLow32); 5126 writel(0, &h->transtable->RepQCtrAddrHigh32); 5127 5128 for (i = 0; i < h->nreply_queues; i++) { 5129 writel(0, &h->transtable->RepQAddr[i].upper); 5130 writel(h->reply_pool_dhandle + 5131 (h->max_commands * sizeof(u64) * i), 5132 &h->transtable->RepQAddr[i].lower); 5133 } 5134 5135 writel(CFGTBL_Trans_Performant | use_short_tags | 5136 CFGTBL_Trans_enable_directed_msix, 5137 &(h->cfgtable->HostWrite.TransportRequest)); 5138 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); 5139 hpsa_wait_for_mode_change_ack(h); 5140 register_value = readl(&(h->cfgtable->TransportActive)); 5141 if (!(register_value & CFGTBL_Trans_Performant)) { 5142 dev_warn(&h->pdev->dev, "unable to get board into" 5143 " performant mode\n"); 5144 return; 5145 } 5146 /* Change the access methods to the performant access methods */ 5147 h->access = SA5_performant_access; 5148 h->transMethod = CFGTBL_Trans_Performant; 5149 } 5150 5151 static void hpsa_put_ctlr_into_performant_mode(struct ctlr_info *h) 5152 { 5153 u32 trans_support; 5154 int i; 5155 5156 if (hpsa_simple_mode) 5157 return; 5158 5159 trans_support = readl(&(h->cfgtable->TransportSupport)); 5160 if (!(trans_support & PERFORMANT_MODE)) 5161 return; 5162 5163 h->nreply_queues = h->msix_vector ? MAX_REPLY_QUEUES : 1; 5164 hpsa_get_max_perf_mode_cmds(h); 5165 /* Performant mode ring buffer and supporting data structures */ 5166 h->reply_pool_size = h->max_commands * sizeof(u64) * h->nreply_queues; 5167 h->reply_pool = pci_alloc_consistent(h->pdev, h->reply_pool_size, 5168 &(h->reply_pool_dhandle)); 5169 5170 for (i = 0; i < h->nreply_queues; i++) { 5171 h->reply_queue[i].head = &h->reply_pool[h->max_commands * i]; 5172 h->reply_queue[i].size = h->max_commands; 5173 h->reply_queue[i].wraparound = 1; /* spec: init to 1 */ 5174 h->reply_queue[i].current_entry = 0; 5175 } 5176 5177 /* Need a block fetch table for performant mode */ 5178 h->blockFetchTable = kmalloc(((SG_ENTRIES_IN_CMD + 1) * 5179 sizeof(u32)), GFP_KERNEL); 5180 5181 if ((h->reply_pool == NULL) 5182 || (h->blockFetchTable == NULL)) 5183 goto clean_up; 5184 5185 hpsa_enter_performant_mode(h, 5186 trans_support & CFGTBL_Trans_use_short_tags); 5187 5188 return; 5189 5190 clean_up: 5191 if (h->reply_pool) 5192 pci_free_consistent(h->pdev, h->reply_pool_size, 5193 h->reply_pool, h->reply_pool_dhandle); 5194 kfree(h->blockFetchTable); 5195 } 5196 5197 /* 5198 * This is it. Register the PCI driver information for the cards we control 5199 * the OS will call our registered routines when it finds one of our cards. 5200 */ 5201 static int __init hpsa_init(void) 5202 { 5203 return pci_register_driver(&hpsa_pci_driver); 5204 } 5205 5206 static void __exit hpsa_cleanup(void) 5207 { 5208 pci_unregister_driver(&hpsa_pci_driver); 5209 } 5210 5211 module_init(hpsa_init); 5212 module_exit(hpsa_cleanup); 5213