1 /* 2 * Copyright (c) 2015 Linaro Ltd. 3 * Copyright (c) 2015 Hisilicon Limited. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 */ 11 12 #ifndef _HISI_SAS_H_ 13 #define _HISI_SAS_H_ 14 15 #include <linux/acpi.h> 16 #include <linux/clk.h> 17 #include <linux/dmapool.h> 18 #include <linux/mfd/syscon.h> 19 #include <linux/module.h> 20 #include <linux/of_address.h> 21 #include <linux/platform_device.h> 22 #include <linux/property.h> 23 #include <linux/regmap.h> 24 #include <scsi/sas_ata.h> 25 #include <scsi/libsas.h> 26 27 #define DRV_VERSION "v1.6" 28 29 #define HISI_SAS_MAX_PHYS 9 30 #define HISI_SAS_MAX_QUEUES 32 31 #define HISI_SAS_QUEUE_SLOTS 512 32 #define HISI_SAS_MAX_ITCT_ENTRIES 2048 33 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 34 #define HISI_SAS_RESET_BIT 0 35 36 #define HISI_SAS_STATUS_BUF_SZ \ 37 (sizeof(struct hisi_sas_err_record) + 1024) 38 #define HISI_SAS_COMMAND_TABLE_SZ \ 39 (((sizeof(union hisi_sas_command_table)+3)/4)*4) 40 41 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 42 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 43 #define HISI_SAS_MAX_STP_RESP_SZ 28 44 45 #define DEV_IS_EXPANDER(type) \ 46 ((type == SAS_EDGE_EXPANDER_DEVICE) || \ 47 (type == SAS_FANOUT_EXPANDER_DEVICE)) 48 49 struct hisi_hba; 50 51 enum { 52 PORT_TYPE_SAS = (1U << 1), 53 PORT_TYPE_SATA = (1U << 0), 54 }; 55 56 enum dev_status { 57 HISI_SAS_DEV_NORMAL, 58 HISI_SAS_DEV_EH, 59 }; 60 61 enum { 62 HISI_SAS_INT_ABT_CMD = 0, 63 HISI_SAS_INT_ABT_DEV = 1, 64 }; 65 66 enum hisi_sas_dev_type { 67 HISI_SAS_DEV_TYPE_STP = 0, 68 HISI_SAS_DEV_TYPE_SSP, 69 HISI_SAS_DEV_TYPE_SATA, 70 }; 71 72 struct hisi_sas_phy { 73 struct hisi_hba *hisi_hba; 74 struct hisi_sas_port *port; 75 struct asd_sas_phy sas_phy; 76 struct sas_identify identify; 77 struct timer_list timer; 78 struct work_struct phyup_ws; 79 u64 port_id; /* from hw */ 80 u64 dev_sas_addr; 81 u64 phy_type; 82 u64 frame_rcvd_size; 83 u8 frame_rcvd[32]; 84 u8 phy_attached; 85 u8 reserved[3]; 86 enum sas_linkrate minimum_linkrate; 87 enum sas_linkrate maximum_linkrate; 88 }; 89 90 struct hisi_sas_port { 91 struct asd_sas_port sas_port; 92 u8 port_attached; 93 u8 id; /* from hw */ 94 }; 95 96 struct hisi_sas_cq { 97 struct hisi_hba *hisi_hba; 98 struct tasklet_struct tasklet; 99 int rd_point; 100 int id; 101 }; 102 103 struct hisi_sas_dq { 104 struct hisi_hba *hisi_hba; 105 int wr_point; 106 int id; 107 }; 108 109 struct hisi_sas_device { 110 enum sas_device_type dev_type; 111 struct hisi_hba *hisi_hba; 112 struct domain_device *sas_device; 113 u64 attached_phy; 114 u64 device_id; 115 atomic64_t running_req; 116 struct list_head list; 117 u8 dev_status; 118 int sata_idx; 119 }; 120 121 struct hisi_sas_slot { 122 struct list_head entry; 123 struct sas_task *task; 124 struct hisi_sas_port *port; 125 u64 n_elem; 126 int dlvry_queue; 127 int dlvry_queue_slot; 128 int cmplt_queue; 129 int cmplt_queue_slot; 130 int idx; 131 int abort; 132 void *cmd_hdr; 133 dma_addr_t cmd_hdr_dma; 134 void *status_buffer; 135 dma_addr_t status_buffer_dma; 136 void *command_table; 137 dma_addr_t command_table_dma; 138 struct hisi_sas_sge_page *sge_page; 139 dma_addr_t sge_page_dma; 140 struct work_struct abort_slot; 141 struct timer_list internal_abort_timer; 142 }; 143 144 struct hisi_sas_tmf_task { 145 u8 tmf; 146 u16 tag_of_task_to_be_managed; 147 }; 148 149 struct hisi_sas_hw { 150 int (*hw_init)(struct hisi_hba *hisi_hba); 151 void (*setup_itct)(struct hisi_hba *hisi_hba, 152 struct hisi_sas_device *device); 153 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx, 154 struct domain_device *device); 155 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 156 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); 157 int (*get_free_slot)(struct hisi_hba *hisi_hba, u32 dev_id, 158 int *q, int *s); 159 void (*start_delivery)(struct hisi_hba *hisi_hba); 160 int (*prep_ssp)(struct hisi_hba *hisi_hba, 161 struct hisi_sas_slot *slot, int is_tmf, 162 struct hisi_sas_tmf_task *tmf); 163 int (*prep_smp)(struct hisi_hba *hisi_hba, 164 struct hisi_sas_slot *slot); 165 int (*prep_stp)(struct hisi_hba *hisi_hba, 166 struct hisi_sas_slot *slot); 167 int (*prep_abort)(struct hisi_hba *hisi_hba, 168 struct hisi_sas_slot *slot, 169 int device_id, int abort_flag, int tag_to_abort); 170 int (*slot_complete)(struct hisi_hba *hisi_hba, 171 struct hisi_sas_slot *slot); 172 void (*phys_init)(struct hisi_hba *hisi_hba); 173 void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no); 174 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 175 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 176 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 177 struct sas_phy_linkrates *linkrates); 178 enum sas_linkrate (*phy_get_max_linkrate)(void); 179 void (*free_device)(struct hisi_hba *hisi_hba, 180 struct hisi_sas_device *dev); 181 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 182 int (*soft_reset)(struct hisi_hba *hisi_hba); 183 int max_command_entries; 184 int complete_hdr_size; 185 }; 186 187 struct hisi_hba { 188 /* This must be the first element, used by SHOST_TO_SAS_HA */ 189 struct sas_ha_struct *p; 190 191 struct platform_device *pdev; 192 void __iomem *regs; 193 struct regmap *ctrl; 194 u32 ctrl_reset_reg; 195 u32 ctrl_reset_sts_reg; 196 u32 ctrl_clock_ena_reg; 197 u32 refclk_frequency_mhz; 198 u8 sas_addr[SAS_ADDR_SIZE]; 199 200 int n_phy; 201 spinlock_t lock; 202 203 struct timer_list timer; 204 struct workqueue_struct *wq; 205 206 int slot_index_count; 207 unsigned long *slot_index_tags; 208 unsigned long reject_stp_links_msk; 209 210 /* SCSI/SAS glue */ 211 struct sas_ha_struct sha; 212 struct Scsi_Host *shost; 213 214 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 215 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 216 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 217 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 218 219 int queue_count; 220 struct hisi_sas_slot *slot_prep; 221 222 struct dma_pool *sge_page_pool; 223 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 224 struct dma_pool *command_table_pool; 225 struct dma_pool *status_buffer_pool; 226 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 227 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 228 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 229 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 230 struct hisi_sas_initial_fis *initial_fis; 231 dma_addr_t initial_fis_dma; 232 struct hisi_sas_itct *itct; 233 dma_addr_t itct_dma; 234 struct hisi_sas_iost *iost; 235 dma_addr_t iost_dma; 236 struct hisi_sas_breakpoint *breakpoint; 237 dma_addr_t breakpoint_dma; 238 struct hisi_sas_breakpoint *sata_breakpoint; 239 dma_addr_t sata_breakpoint_dma; 240 struct hisi_sas_slot *slot_info; 241 unsigned long flags; 242 const struct hisi_sas_hw *hw; /* Low level hw interface */ 243 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 244 struct work_struct rst_work; 245 }; 246 247 /* Generic HW DMA host memory structures */ 248 /* Delivery queue header */ 249 struct hisi_sas_cmd_hdr { 250 /* dw0 */ 251 __le32 dw0; 252 253 /* dw1 */ 254 __le32 dw1; 255 256 /* dw2 */ 257 __le32 dw2; 258 259 /* dw3 */ 260 __le32 transfer_tags; 261 262 /* dw4 */ 263 __le32 data_transfer_len; 264 265 /* dw5 */ 266 __le32 first_burst_num; 267 268 /* dw6 */ 269 __le32 sg_len; 270 271 /* dw7 */ 272 __le32 dw7; 273 274 /* dw8-9 */ 275 __le64 cmd_table_addr; 276 277 /* dw10-11 */ 278 __le64 sts_buffer_addr; 279 280 /* dw12-13 */ 281 __le64 prd_table_addr; 282 283 /* dw14-15 */ 284 __le64 dif_prd_table_addr; 285 }; 286 287 struct hisi_sas_itct { 288 __le64 qw0; 289 __le64 sas_addr; 290 __le64 qw2; 291 __le64 qw3; 292 __le64 qw4_15[12]; 293 }; 294 295 struct hisi_sas_iost { 296 __le64 qw0; 297 __le64 qw1; 298 __le64 qw2; 299 __le64 qw3; 300 }; 301 302 struct hisi_sas_err_record { 303 u32 data[4]; 304 }; 305 306 struct hisi_sas_initial_fis { 307 struct hisi_sas_err_record err_record; 308 struct dev_to_host_fis fis; 309 u32 rsvd[3]; 310 }; 311 312 struct hisi_sas_breakpoint { 313 u8 data[128]; /*io128 byte*/ 314 }; 315 316 struct hisi_sas_sge { 317 __le64 addr; 318 __le32 page_ctrl_0; 319 __le32 page_ctrl_1; 320 __le32 data_len; 321 __le32 data_off; 322 }; 323 324 struct hisi_sas_command_table_smp { 325 u8 bytes[44]; 326 }; 327 328 struct hisi_sas_command_table_stp { 329 struct host_to_dev_fis command_fis; 330 u8 dummy[12]; 331 u8 atapi_cdb[ATAPI_CDB_LEN]; 332 }; 333 334 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE 335 struct hisi_sas_sge_page { 336 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 337 }; 338 339 struct hisi_sas_command_table_ssp { 340 struct ssp_frame_hdr hdr; 341 union { 342 struct { 343 struct ssp_command_iu task; 344 u32 prot[6]; 345 }; 346 struct ssp_tmf_iu ssp_task; 347 struct xfer_rdy_iu xfer_rdy; 348 struct ssp_response_iu ssp_res; 349 } u; 350 }; 351 352 union hisi_sas_command_table { 353 struct hisi_sas_command_table_ssp ssp; 354 struct hisi_sas_command_table_smp smp; 355 struct hisi_sas_command_table_stp stp; 356 }; 357 358 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 359 extern int hisi_sas_probe(struct platform_device *pdev, 360 const struct hisi_sas_hw *ops); 361 extern int hisi_sas_remove(struct platform_device *pdev); 362 363 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 364 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 365 struct sas_task *task, 366 struct hisi_sas_slot *slot); 367 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 368 extern void hisi_sas_rescan_topology(struct hisi_hba *hisi_hba, u32 old_state, 369 u32 state); 370 #endif 371