1 /* 2 * Copyright (c) 2015 Linaro Ltd. 3 * Copyright (c) 2015 Hisilicon Limited. 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 * 10 */ 11 12 #ifndef _HISI_SAS_H_ 13 #define _HISI_SAS_H_ 14 15 #include <linux/acpi.h> 16 #include <linux/clk.h> 17 #include <linux/dmapool.h> 18 #include <linux/mfd/syscon.h> 19 #include <linux/module.h> 20 #include <linux/of_address.h> 21 #include <linux/platform_device.h> 22 #include <linux/property.h> 23 #include <linux/regmap.h> 24 #include <scsi/sas_ata.h> 25 #include <scsi/libsas.h> 26 27 #define DRV_VERSION "v1.6" 28 29 #define HISI_SAS_MAX_PHYS 9 30 #define HISI_SAS_MAX_QUEUES 32 31 #define HISI_SAS_QUEUE_SLOTS 512 32 #define HISI_SAS_MAX_ITCT_ENTRIES 2048 33 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 34 35 #define HISI_SAS_STATUS_BUF_SZ \ 36 (sizeof(struct hisi_sas_err_record) + 1024) 37 #define HISI_SAS_COMMAND_TABLE_SZ \ 38 (((sizeof(union hisi_sas_command_table)+3)/4)*4) 39 40 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 41 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 42 #define HISI_SAS_MAX_STP_RESP_SZ 28 43 44 #define DEV_IS_EXPANDER(type) \ 45 ((type == SAS_EDGE_EXPANDER_DEVICE) || \ 46 (type == SAS_FANOUT_EXPANDER_DEVICE)) 47 48 struct hisi_hba; 49 50 enum { 51 PORT_TYPE_SAS = (1U << 1), 52 PORT_TYPE_SATA = (1U << 0), 53 }; 54 55 enum dev_status { 56 HISI_SAS_DEV_NORMAL, 57 HISI_SAS_DEV_EH, 58 }; 59 60 enum { 61 HISI_SAS_INT_ABT_CMD = 0, 62 HISI_SAS_INT_ABT_DEV = 1, 63 }; 64 65 enum hisi_sas_dev_type { 66 HISI_SAS_DEV_TYPE_STP = 0, 67 HISI_SAS_DEV_TYPE_SSP, 68 HISI_SAS_DEV_TYPE_SATA, 69 }; 70 71 struct hisi_sas_phy { 72 struct hisi_hba *hisi_hba; 73 struct hisi_sas_port *port; 74 struct asd_sas_phy sas_phy; 75 struct sas_identify identify; 76 struct timer_list timer; 77 struct work_struct phyup_ws; 78 u64 port_id; /* from hw */ 79 u64 dev_sas_addr; 80 u64 phy_type; 81 u64 frame_rcvd_size; 82 u8 frame_rcvd[32]; 83 u8 phy_attached; 84 u8 reserved[3]; 85 enum sas_linkrate minimum_linkrate; 86 enum sas_linkrate maximum_linkrate; 87 }; 88 89 struct hisi_sas_port { 90 struct asd_sas_port sas_port; 91 u8 port_attached; 92 u8 id; /* from hw */ 93 struct list_head list; 94 }; 95 96 struct hisi_sas_cq { 97 struct hisi_hba *hisi_hba; 98 struct tasklet_struct tasklet; 99 int rd_point; 100 int id; 101 }; 102 103 struct hisi_sas_dq { 104 struct hisi_hba *hisi_hba; 105 int wr_point; 106 int id; 107 }; 108 109 struct hisi_sas_device { 110 enum sas_device_type dev_type; 111 struct hisi_hba *hisi_hba; 112 struct domain_device *sas_device; 113 u64 attached_phy; 114 u64 device_id; 115 atomic64_t running_req; 116 u8 dev_status; 117 }; 118 119 struct hisi_sas_slot { 120 struct list_head entry; 121 struct sas_task *task; 122 struct hisi_sas_port *port; 123 u64 n_elem; 124 int dlvry_queue; 125 int dlvry_queue_slot; 126 int cmplt_queue; 127 int cmplt_queue_slot; 128 int idx; 129 int abort; 130 void *cmd_hdr; 131 dma_addr_t cmd_hdr_dma; 132 void *status_buffer; 133 dma_addr_t status_buffer_dma; 134 void *command_table; 135 dma_addr_t command_table_dma; 136 struct hisi_sas_sge_page *sge_page; 137 dma_addr_t sge_page_dma; 138 struct work_struct abort_slot; 139 }; 140 141 struct hisi_sas_tmf_task { 142 u8 tmf; 143 u16 tag_of_task_to_be_managed; 144 }; 145 146 struct hisi_sas_hw { 147 int (*hw_init)(struct hisi_hba *hisi_hba); 148 void (*setup_itct)(struct hisi_hba *hisi_hba, 149 struct hisi_sas_device *device); 150 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, int *slot_idx, 151 struct domain_device *device); 152 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 153 void (*sl_notify)(struct hisi_hba *hisi_hba, int phy_no); 154 int (*get_free_slot)(struct hisi_hba *hisi_hba, u32 dev_id, 155 int *q, int *s); 156 void (*start_delivery)(struct hisi_hba *hisi_hba); 157 int (*prep_ssp)(struct hisi_hba *hisi_hba, 158 struct hisi_sas_slot *slot, int is_tmf, 159 struct hisi_sas_tmf_task *tmf); 160 int (*prep_smp)(struct hisi_hba *hisi_hba, 161 struct hisi_sas_slot *slot); 162 int (*prep_stp)(struct hisi_hba *hisi_hba, 163 struct hisi_sas_slot *slot); 164 int (*prep_abort)(struct hisi_hba *hisi_hba, 165 struct hisi_sas_slot *slot, 166 int device_id, int abort_flag, int tag_to_abort); 167 int (*slot_complete)(struct hisi_hba *hisi_hba, 168 struct hisi_sas_slot *slot, int abort); 169 void (*phy_enable)(struct hisi_hba *hisi_hba, int phy_no); 170 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 171 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 172 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 173 struct sas_phy_linkrates *linkrates); 174 enum sas_linkrate (*phy_get_max_linkrate)(void); 175 void (*free_device)(struct hisi_hba *hisi_hba, 176 struct hisi_sas_device *dev); 177 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 178 int max_command_entries; 179 int complete_hdr_size; 180 }; 181 182 struct hisi_hba { 183 /* This must be the first element, used by SHOST_TO_SAS_HA */ 184 struct sas_ha_struct *p; 185 186 struct platform_device *pdev; 187 void __iomem *regs; 188 struct regmap *ctrl; 189 u32 ctrl_reset_reg; 190 u32 ctrl_reset_sts_reg; 191 u32 ctrl_clock_ena_reg; 192 u32 refclk_frequency_mhz; 193 u8 sas_addr[SAS_ADDR_SIZE]; 194 195 int n_phy; 196 int scan_finished; 197 spinlock_t lock; 198 199 struct timer_list timer; 200 struct workqueue_struct *wq; 201 202 int slot_index_count; 203 unsigned long *slot_index_tags; 204 205 /* SCSI/SAS glue */ 206 struct sas_ha_struct sha; 207 struct Scsi_Host *shost; 208 209 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 210 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 211 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 212 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 213 214 int queue_count; 215 struct hisi_sas_slot *slot_prep; 216 217 struct dma_pool *sge_page_pool; 218 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 219 struct dma_pool *command_table_pool; 220 struct dma_pool *status_buffer_pool; 221 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 222 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 223 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 224 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 225 struct hisi_sas_initial_fis *initial_fis; 226 dma_addr_t initial_fis_dma; 227 struct hisi_sas_itct *itct; 228 dma_addr_t itct_dma; 229 struct hisi_sas_iost *iost; 230 dma_addr_t iost_dma; 231 struct hisi_sas_breakpoint *breakpoint; 232 dma_addr_t breakpoint_dma; 233 struct hisi_sas_breakpoint *sata_breakpoint; 234 dma_addr_t sata_breakpoint_dma; 235 struct hisi_sas_slot *slot_info; 236 const struct hisi_sas_hw *hw; /* Low level hw interface */ 237 }; 238 239 /* Generic HW DMA host memory structures */ 240 /* Delivery queue header */ 241 struct hisi_sas_cmd_hdr { 242 /* dw0 */ 243 __le32 dw0; 244 245 /* dw1 */ 246 __le32 dw1; 247 248 /* dw2 */ 249 __le32 dw2; 250 251 /* dw3 */ 252 __le32 transfer_tags; 253 254 /* dw4 */ 255 __le32 data_transfer_len; 256 257 /* dw5 */ 258 __le32 first_burst_num; 259 260 /* dw6 */ 261 __le32 sg_len; 262 263 /* dw7 */ 264 __le32 dw7; 265 266 /* dw8-9 */ 267 __le64 cmd_table_addr; 268 269 /* dw10-11 */ 270 __le64 sts_buffer_addr; 271 272 /* dw12-13 */ 273 __le64 prd_table_addr; 274 275 /* dw14-15 */ 276 __le64 dif_prd_table_addr; 277 }; 278 279 struct hisi_sas_itct { 280 __le64 qw0; 281 __le64 sas_addr; 282 __le64 qw2; 283 __le64 qw3; 284 __le64 qw4_15[12]; 285 }; 286 287 struct hisi_sas_iost { 288 __le64 qw0; 289 __le64 qw1; 290 __le64 qw2; 291 __le64 qw3; 292 }; 293 294 struct hisi_sas_err_record { 295 u32 data[4]; 296 }; 297 298 struct hisi_sas_initial_fis { 299 struct hisi_sas_err_record err_record; 300 struct dev_to_host_fis fis; 301 u32 rsvd[3]; 302 }; 303 304 struct hisi_sas_breakpoint { 305 u8 data[128]; /*io128 byte*/ 306 }; 307 308 struct hisi_sas_sge { 309 __le64 addr; 310 __le32 page_ctrl_0; 311 __le32 page_ctrl_1; 312 __le32 data_len; 313 __le32 data_off; 314 }; 315 316 struct hisi_sas_command_table_smp { 317 u8 bytes[44]; 318 }; 319 320 struct hisi_sas_command_table_stp { 321 struct host_to_dev_fis command_fis; 322 u8 dummy[12]; 323 u8 atapi_cdb[ATAPI_CDB_LEN]; 324 }; 325 326 #define HISI_SAS_SGE_PAGE_CNT SG_CHUNK_SIZE 327 struct hisi_sas_sge_page { 328 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 329 }; 330 331 struct hisi_sas_command_table_ssp { 332 struct ssp_frame_hdr hdr; 333 union { 334 struct { 335 struct ssp_command_iu task; 336 u32 prot[6]; 337 }; 338 struct ssp_tmf_iu ssp_task; 339 struct xfer_rdy_iu xfer_rdy; 340 struct ssp_response_iu ssp_res; 341 } u; 342 }; 343 344 union hisi_sas_command_table { 345 struct hisi_sas_command_table_ssp ssp; 346 struct hisi_sas_command_table_smp smp; 347 struct hisi_sas_command_table_stp stp; 348 }; 349 extern int hisi_sas_probe(struct platform_device *pdev, 350 const struct hisi_sas_hw *ops); 351 extern int hisi_sas_remove(struct platform_device *pdev); 352 353 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 354 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 355 struct sas_task *task, 356 struct hisi_sas_slot *slot); 357 #endif 358