1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7 #ifndef _HISI_SAS_H_ 8 #define _HISI_SAS_H_ 9 10 #include <linux/acpi.h> 11 #include <linux/blk-mq.h> 12 #include <linux/blk-mq-pci.h> 13 #include <linux/clk.h> 14 #include <linux/debugfs.h> 15 #include <linux/dmapool.h> 16 #include <linux/iopoll.h> 17 #include <linux/lcm.h> 18 #include <linux/libata.h> 19 #include <linux/mfd/syscon.h> 20 #include <linux/module.h> 21 #include <linux/of_address.h> 22 #include <linux/pci.h> 23 #include <linux/platform_device.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/property.h> 26 #include <linux/regmap.h> 27 #include <linux/timer.h> 28 #include <scsi/sas_ata.h> 29 #include <scsi/libsas.h> 30 31 #define HISI_SAS_MAX_PHYS 9 32 #define HISI_SAS_MAX_QUEUES 32 33 #define HISI_SAS_QUEUE_SLOTS 4096 34 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 35 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 36 #define HISI_SAS_RESET_BIT 0 37 #define HISI_SAS_REJECT_CMD_BIT 1 38 #define HISI_SAS_PM_BIT 2 39 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 40 #define HISI_SAS_RESERVED_IPTT 96 41 #define HISI_SAS_UNRESERVED_IPTT \ 42 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 43 44 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 45 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 46 47 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 48 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 49 50 #define hisi_sas_status_buf_addr(buf) \ 51 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 52 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 53 #define hisi_sas_status_buf_addr_dma(slot) \ 54 hisi_sas_status_buf_addr((slot)->buf_dma) 55 56 #define hisi_sas_cmd_hdr_addr(buf) \ 57 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 58 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 59 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 60 61 #define hisi_sas_sge_addr(buf) \ 62 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 63 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 64 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 65 66 #define hisi_sas_sge_dif_addr(buf) \ 67 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 68 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 69 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 70 71 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 72 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 73 #define HISI_SAS_MAX_STP_RESP_SZ 28 74 75 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 76 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 77 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 78 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 79 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 80 81 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 82 SHOST_DIF_TYPE2_PROTECTION | \ 83 SHOST_DIF_TYPE3_PROTECTION) 84 85 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 86 SHOST_DIX_TYPE2_PROTECTION | \ 87 SHOST_DIX_TYPE3_PROTECTION) 88 89 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 90 91 #define HISI_SAS_WAIT_PHYUP_TIMEOUT 20 92 #define CLEAR_ITCT_TIMEOUT 20 93 94 struct hisi_hba; 95 96 enum { 97 PORT_TYPE_SAS = (1U << 1), 98 PORT_TYPE_SATA = (1U << 0), 99 }; 100 101 enum dev_status { 102 HISI_SAS_DEV_INIT, 103 HISI_SAS_DEV_NORMAL, 104 }; 105 106 enum { 107 HISI_SAS_INT_ABT_CMD = 0, 108 HISI_SAS_INT_ABT_DEV = 1, 109 }; 110 111 enum hisi_sas_dev_type { 112 HISI_SAS_DEV_TYPE_STP = 0, 113 HISI_SAS_DEV_TYPE_SSP, 114 HISI_SAS_DEV_TYPE_SATA, 115 }; 116 117 struct hisi_sas_hw_error { 118 u32 irq_msk; 119 u32 msk; 120 int shift; 121 const char *msg; 122 int reg; 123 const struct hisi_sas_hw_error *sub; 124 }; 125 126 struct hisi_sas_rst { 127 struct hisi_hba *hisi_hba; 128 struct completion *completion; 129 struct work_struct work; 130 bool done; 131 }; 132 133 #define HISI_SAS_RST_WORK_INIT(r, c) \ 134 { .hisi_hba = hisi_hba, \ 135 .completion = &c, \ 136 .work = __WORK_INITIALIZER(r.work, \ 137 hisi_sas_sync_rst_work_handler), \ 138 .done = false, \ 139 } 140 141 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 142 DECLARE_COMPLETION_ONSTACK(c); \ 143 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 144 145 enum hisi_sas_bit_err_type { 146 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 147 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 148 }; 149 150 enum hisi_sas_phy_event { 151 HISI_PHYE_PHY_UP = 0U, 152 HISI_PHYE_LINK_RESET, 153 HISI_PHYES_NUM, 154 }; 155 156 struct hisi_sas_phy { 157 struct work_struct works[HISI_PHYES_NUM]; 158 struct hisi_hba *hisi_hba; 159 struct hisi_sas_port *port; 160 struct asd_sas_phy sas_phy; 161 struct sas_identify identify; 162 struct completion *reset_completion; 163 struct timer_list timer; 164 spinlock_t lock; 165 u64 port_id; /* from hw */ 166 u64 frame_rcvd_size; 167 u8 frame_rcvd[32]; 168 u8 phy_attached; 169 u8 in_reset; 170 u8 reserved[2]; 171 u32 phy_type; 172 u32 code_violation_err_count; 173 enum sas_linkrate minimum_linkrate; 174 enum sas_linkrate maximum_linkrate; 175 int enable; 176 atomic_t down_cnt; 177 }; 178 179 struct hisi_sas_port { 180 struct asd_sas_port sas_port; 181 u8 port_attached; 182 u8 id; /* from hw */ 183 }; 184 185 struct hisi_sas_cq { 186 struct hisi_hba *hisi_hba; 187 const struct cpumask *irq_mask; 188 int rd_point; 189 int id; 190 int irq_no; 191 }; 192 193 struct hisi_sas_dq { 194 struct hisi_hba *hisi_hba; 195 struct list_head list; 196 spinlock_t lock; 197 int wr_point; 198 int id; 199 }; 200 201 struct hisi_sas_device { 202 struct hisi_hba *hisi_hba; 203 struct domain_device *sas_device; 204 struct completion *completion; 205 struct hisi_sas_dq *dq; 206 struct list_head list; 207 enum sas_device_type dev_type; 208 enum dev_status dev_status; 209 int device_id; 210 int sata_idx; 211 spinlock_t lock; /* For protecting slots */ 212 }; 213 214 struct hisi_sas_tmf_task { 215 int force_phy; 216 int phy_id; 217 u8 tmf; 218 u16 tag_of_task_to_be_managed; 219 }; 220 221 struct hisi_sas_slot { 222 struct list_head entry; 223 struct list_head delivery; 224 struct sas_task *task; 225 struct hisi_sas_port *port; 226 u64 n_elem; 227 u64 n_elem_dif; 228 int dlvry_queue; 229 int dlvry_queue_slot; 230 int cmplt_queue; 231 int cmplt_queue_slot; 232 int abort; 233 int ready; 234 int device_id; 235 void *cmd_hdr; 236 dma_addr_t cmd_hdr_dma; 237 struct timer_list internal_abort_timer; 238 bool is_internal; 239 struct hisi_sas_tmf_task *tmf; 240 /* Do not reorder/change members after here */ 241 void *buf; 242 dma_addr_t buf_dma; 243 u16 idx; 244 }; 245 246 struct hisi_sas_iost_itct_cache { 247 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 248 }; 249 250 enum hisi_sas_debugfs_reg_array_member { 251 DEBUGFS_GLOBAL = 0, 252 DEBUGFS_AXI, 253 DEBUGFS_RAS, 254 DEBUGFS_REGS_NUM 255 }; 256 257 enum hisi_sas_debugfs_cache_type { 258 HISI_SAS_ITCT_CACHE, 259 HISI_SAS_IOST_CACHE, 260 }; 261 262 enum hisi_sas_debugfs_bist_ffe_cfg { 263 FFE_SAS_1_5_GBPS, 264 FFE_SAS_3_0_GBPS, 265 FFE_SAS_6_0_GBPS, 266 FFE_SAS_12_0_GBPS, 267 FFE_RESV, 268 FFE_SATA_1_5_GBPS, 269 FFE_SATA_3_0_GBPS, 270 FFE_SATA_6_0_GBPS, 271 FFE_CFG_MAX 272 }; 273 274 enum hisi_sas_debugfs_bist_fixed_code { 275 FIXED_CODE, 276 FIXED_CODE_1, 277 FIXED_CODE_MAX 278 }; 279 280 enum { 281 HISI_SAS_BIST_CODE_MODE_PRBS7, 282 HISI_SAS_BIST_CODE_MODE_PRBS23, 283 HISI_SAS_BIST_CODE_MODE_PRBS31, 284 HISI_SAS_BIST_CODE_MODE_JTPAT, 285 HISI_SAS_BIST_CODE_MODE_CJTPAT, 286 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 287 HISI_SAS_BIST_CODE_MODE_TRAIN, 288 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 289 HISI_SAS_BIST_CODE_MODE_HFTP, 290 HISI_SAS_BIST_CODE_MODE_MFTP, 291 HISI_SAS_BIST_CODE_MODE_LFTP, 292 HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 293 }; 294 295 struct hisi_sas_hw { 296 int (*hw_init)(struct hisi_hba *hisi_hba); 297 void (*setup_itct)(struct hisi_hba *hisi_hba, 298 struct hisi_sas_device *device); 299 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 300 struct domain_device *device); 301 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 302 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 303 void (*start_delivery)(struct hisi_sas_dq *dq); 304 void (*prep_ssp)(struct hisi_hba *hisi_hba, 305 struct hisi_sas_slot *slot); 306 void (*prep_smp)(struct hisi_hba *hisi_hba, 307 struct hisi_sas_slot *slot); 308 void (*prep_stp)(struct hisi_hba *hisi_hba, 309 struct hisi_sas_slot *slot); 310 void (*prep_abort)(struct hisi_hba *hisi_hba, 311 struct hisi_sas_slot *slot, 312 int device_id, int abort_flag, int tag_to_abort); 313 void (*phys_init)(struct hisi_hba *hisi_hba); 314 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 315 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 316 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 317 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 318 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 319 struct sas_phy_linkrates *linkrates); 320 enum sas_linkrate (*phy_get_max_linkrate)(void); 321 int (*clear_itct)(struct hisi_hba *hisi_hba, 322 struct hisi_sas_device *dev); 323 void (*free_device)(struct hisi_sas_device *sas_dev); 324 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 325 void (*dereg_device)(struct hisi_hba *hisi_hba, 326 struct domain_device *device); 327 int (*soft_reset)(struct hisi_hba *hisi_hba); 328 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 329 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 330 u8 reg_index, u8 reg_count, u8 *write_data); 331 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 332 int delay_ms, int timeout_ms); 333 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 334 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 335 int complete_hdr_size; 336 struct scsi_host_template *sht; 337 }; 338 339 #define HISI_SAS_MAX_DEBUGFS_DUMP (50) 340 341 struct hisi_sas_debugfs_cq { 342 struct hisi_sas_cq *cq; 343 void *complete_hdr; 344 }; 345 346 struct hisi_sas_debugfs_dq { 347 struct hisi_sas_dq *dq; 348 struct hisi_sas_cmd_hdr *hdr; 349 }; 350 351 struct hisi_sas_debugfs_regs { 352 struct hisi_hba *hisi_hba; 353 u32 *data; 354 }; 355 356 struct hisi_sas_debugfs_port { 357 struct hisi_sas_phy *phy; 358 u32 *data; 359 }; 360 361 struct hisi_sas_debugfs_iost { 362 struct hisi_sas_iost *iost; 363 }; 364 365 struct hisi_sas_debugfs_itct { 366 struct hisi_sas_itct *itct; 367 }; 368 369 struct hisi_sas_debugfs_iost_cache { 370 struct hisi_sas_iost_itct_cache *cache; 371 }; 372 373 struct hisi_sas_debugfs_itct_cache { 374 struct hisi_sas_iost_itct_cache *cache; 375 }; 376 377 struct hisi_hba { 378 /* This must be the first element, used by SHOST_TO_SAS_HA */ 379 struct sas_ha_struct *p; 380 381 struct platform_device *platform_dev; 382 struct pci_dev *pci_dev; 383 struct device *dev; 384 385 int prot_mask; 386 387 void __iomem *regs; 388 void __iomem *sgpio_regs; 389 struct regmap *ctrl; 390 u32 ctrl_reset_reg; 391 u32 ctrl_reset_sts_reg; 392 u32 ctrl_clock_ena_reg; 393 u32 refclk_frequency_mhz; 394 u8 sas_addr[SAS_ADDR_SIZE]; 395 396 int n_phy; 397 spinlock_t lock; 398 struct semaphore sem; 399 400 struct timer_list timer; 401 struct workqueue_struct *wq; 402 403 int slot_index_count; 404 int last_slot_index; 405 int last_dev_id; 406 unsigned long *slot_index_tags; 407 unsigned long reject_stp_links_msk; 408 409 /* SCSI/SAS glue */ 410 struct sas_ha_struct sha; 411 struct Scsi_Host *shost; 412 413 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 414 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 415 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 416 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 417 418 int queue_count; 419 420 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 421 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 422 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 423 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 424 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 425 struct hisi_sas_initial_fis *initial_fis; 426 dma_addr_t initial_fis_dma; 427 struct hisi_sas_itct *itct; 428 dma_addr_t itct_dma; 429 struct hisi_sas_iost *iost; 430 dma_addr_t iost_dma; 431 struct hisi_sas_breakpoint *breakpoint; 432 dma_addr_t breakpoint_dma; 433 struct hisi_sas_breakpoint *sata_breakpoint; 434 dma_addr_t sata_breakpoint_dma; 435 struct hisi_sas_slot *slot_info; 436 unsigned long flags; 437 const struct hisi_sas_hw *hw; /* Low level hw interface */ 438 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 439 struct work_struct rst_work; 440 struct work_struct debugfs_work; 441 u32 phy_state; 442 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 443 u32 intr_coal_count; /* Interrupt count to coalesce */ 444 445 int cq_nvecs; 446 447 /* bist */ 448 enum sas_linkrate debugfs_bist_linkrate; 449 int debugfs_bist_code_mode; 450 int debugfs_bist_phy_no; 451 int debugfs_bist_mode; 452 u32 debugfs_bist_cnt; 453 int debugfs_bist_enable; 454 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; 455 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; 456 457 /* debugfs memories */ 458 /* Put Global AXI and RAS Register into register array */ 459 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; 460 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; 461 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 462 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 463 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; 464 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; 465 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 466 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 467 468 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; 469 int debugfs_dump_index; 470 struct dentry *debugfs_dir; 471 struct dentry *debugfs_dump_dentry; 472 struct dentry *debugfs_bist_dentry; 473 }; 474 475 /* Generic HW DMA host memory structures */ 476 /* Delivery queue header */ 477 struct hisi_sas_cmd_hdr { 478 /* dw0 */ 479 __le32 dw0; 480 481 /* dw1 */ 482 __le32 dw1; 483 484 /* dw2 */ 485 __le32 dw2; 486 487 /* dw3 */ 488 __le32 transfer_tags; 489 490 /* dw4 */ 491 __le32 data_transfer_len; 492 493 /* dw5 */ 494 __le32 first_burst_num; 495 496 /* dw6 */ 497 __le32 sg_len; 498 499 /* dw7 */ 500 __le32 dw7; 501 502 /* dw8-9 */ 503 __le64 cmd_table_addr; 504 505 /* dw10-11 */ 506 __le64 sts_buffer_addr; 507 508 /* dw12-13 */ 509 __le64 prd_table_addr; 510 511 /* dw14-15 */ 512 __le64 dif_prd_table_addr; 513 }; 514 515 struct hisi_sas_itct { 516 __le64 qw0; 517 __le64 sas_addr; 518 __le64 qw2; 519 __le64 qw3; 520 __le64 qw4_15[12]; 521 }; 522 523 struct hisi_sas_iost { 524 __le64 qw0; 525 __le64 qw1; 526 __le64 qw2; 527 __le64 qw3; 528 }; 529 530 struct hisi_sas_err_record { 531 u32 data[4]; 532 }; 533 534 struct hisi_sas_initial_fis { 535 struct hisi_sas_err_record err_record; 536 struct dev_to_host_fis fis; 537 u32 rsvd[3]; 538 }; 539 540 struct hisi_sas_breakpoint { 541 u8 data[128]; 542 }; 543 544 struct hisi_sas_sata_breakpoint { 545 struct hisi_sas_breakpoint tag[32]; 546 }; 547 548 struct hisi_sas_sge { 549 __le64 addr; 550 __le32 page_ctrl_0; 551 __le32 page_ctrl_1; 552 __le32 data_len; 553 __le32 data_off; 554 }; 555 556 struct hisi_sas_command_table_smp { 557 u8 bytes[44]; 558 }; 559 560 struct hisi_sas_command_table_stp { 561 struct host_to_dev_fis command_fis; 562 u8 dummy[12]; 563 u8 atapi_cdb[ATAPI_CDB_LEN]; 564 }; 565 566 #define HISI_SAS_SGE_PAGE_CNT (124) 567 struct hisi_sas_sge_page { 568 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 569 } __aligned(16); 570 571 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 572 struct hisi_sas_sge_dif_page { 573 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 574 } __aligned(16); 575 576 struct hisi_sas_command_table_ssp { 577 struct ssp_frame_hdr hdr; 578 union { 579 struct { 580 struct ssp_command_iu task; 581 u32 prot[7]; 582 }; 583 struct ssp_tmf_iu ssp_task; 584 struct xfer_rdy_iu xfer_rdy; 585 struct ssp_response_iu ssp_res; 586 } u; 587 }; 588 589 union hisi_sas_command_table { 590 struct hisi_sas_command_table_ssp ssp; 591 struct hisi_sas_command_table_smp smp; 592 struct hisi_sas_command_table_stp stp; 593 } __aligned(16); 594 595 struct hisi_sas_status_buffer { 596 struct hisi_sas_err_record err; 597 u8 iu[1024]; 598 } __aligned(16); 599 600 struct hisi_sas_slot_buf_table { 601 struct hisi_sas_status_buffer status_buffer; 602 union hisi_sas_command_table command_header; 603 struct hisi_sas_sge_page sge_page; 604 }; 605 606 struct hisi_sas_slot_dif_buf_table { 607 struct hisi_sas_slot_buf_table slot_buf; 608 struct hisi_sas_sge_dif_page sge_dif_page; 609 }; 610 611 extern struct scsi_transport_template *hisi_sas_stt; 612 613 extern bool hisi_sas_debugfs_enable; 614 extern u32 hisi_sas_debugfs_dump_count; 615 extern struct dentry *hisi_sas_debugfs_dir; 616 617 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 618 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 619 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 620 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 621 int direction); 622 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 623 extern void hisi_sas_sata_done(struct sas_task *task, 624 struct hisi_sas_slot *slot); 625 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 626 extern int hisi_sas_probe(struct platform_device *pdev, 627 const struct hisi_sas_hw *ops); 628 extern int hisi_sas_remove(struct platform_device *pdev); 629 630 extern int hisi_sas_slave_configure(struct scsi_device *sdev); 631 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 632 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 633 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 634 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 635 int enable); 636 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 637 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 638 struct sas_task *task, 639 struct hisi_sas_slot *slot); 640 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 641 extern void hisi_sas_rst_work_handler(struct work_struct *work); 642 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 643 extern void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba); 644 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 645 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 646 enum hisi_sas_phy_event event); 647 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 648 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 649 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 650 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 651 #endif 652