1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7 #ifndef _HISI_SAS_H_ 8 #define _HISI_SAS_H_ 9 10 #include <linux/acpi.h> 11 #include <linux/blk-mq.h> 12 #include <linux/blk-mq-pci.h> 13 #include <linux/clk.h> 14 #include <linux/debugfs.h> 15 #include <linux/dmapool.h> 16 #include <linux/iopoll.h> 17 #include <linux/irq.h> 18 #include <linux/lcm.h> 19 #include <linux/libata.h> 20 #include <linux/mfd/syscon.h> 21 #include <linux/module.h> 22 #include <linux/of_address.h> 23 #include <linux/pci.h> 24 #include <linux/platform_device.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/property.h> 27 #include <linux/regmap.h> 28 #include <linux/timer.h> 29 #include <scsi/sas_ata.h> 30 #include <scsi/libsas.h> 31 32 #define HISI_SAS_MAX_PHYS 9 33 #define HISI_SAS_MAX_QUEUES 32 34 #define HISI_SAS_QUEUE_SLOTS 4096 35 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 36 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 37 #define HISI_SAS_RESET_BIT 0 38 #define HISI_SAS_REJECT_CMD_BIT 1 39 #define HISI_SAS_PM_BIT 2 40 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 41 #define HISI_SAS_RESERVED_IPTT 96 42 #define HISI_SAS_UNRESERVED_IPTT \ 43 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 44 45 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 46 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 47 #define HISI_SAS_FIFO_DATA_DW_SIZE 32 48 49 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 50 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 51 52 #define hisi_sas_status_buf_addr(buf) \ 53 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 54 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 55 #define hisi_sas_status_buf_addr_dma(slot) \ 56 hisi_sas_status_buf_addr((slot)->buf_dma) 57 58 #define hisi_sas_cmd_hdr_addr(buf) \ 59 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 60 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 61 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 62 63 #define hisi_sas_sge_addr(buf) \ 64 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 65 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 66 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 67 68 #define hisi_sas_sge_dif_addr(buf) \ 69 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 70 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 71 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 72 73 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 74 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 75 #define HISI_SAS_MAX_STP_RESP_SZ 28 76 77 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 78 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 79 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 80 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 81 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 82 83 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 84 SHOST_DIF_TYPE2_PROTECTION | \ 85 SHOST_DIF_TYPE3_PROTECTION) 86 87 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 88 SHOST_DIX_TYPE2_PROTECTION | \ 89 SHOST_DIX_TYPE3_PROTECTION) 90 91 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 92 93 #define HISI_SAS_WAIT_PHYUP_TIMEOUT 20 94 #define CLEAR_ITCT_TIMEOUT 20 95 96 struct hisi_hba; 97 98 enum { 99 PORT_TYPE_SAS = (1U << 1), 100 PORT_TYPE_SATA = (1U << 0), 101 }; 102 103 enum dev_status { 104 HISI_SAS_DEV_INIT, 105 HISI_SAS_DEV_NORMAL, 106 }; 107 108 enum { 109 HISI_SAS_INT_ABT_CMD = 0, 110 HISI_SAS_INT_ABT_DEV = 1, 111 }; 112 113 enum hisi_sas_dev_type { 114 HISI_SAS_DEV_TYPE_STP = 0, 115 HISI_SAS_DEV_TYPE_SSP, 116 HISI_SAS_DEV_TYPE_SATA, 117 }; 118 119 struct hisi_sas_hw_error { 120 u32 irq_msk; 121 u32 msk; 122 int shift; 123 const char *msg; 124 int reg; 125 const struct hisi_sas_hw_error *sub; 126 }; 127 128 struct hisi_sas_rst { 129 struct hisi_hba *hisi_hba; 130 struct completion *completion; 131 struct work_struct work; 132 bool done; 133 }; 134 135 #define HISI_SAS_RST_WORK_INIT(r, c) \ 136 { .hisi_hba = hisi_hba, \ 137 .completion = &c, \ 138 .work = __WORK_INITIALIZER(r.work, \ 139 hisi_sas_sync_rst_work_handler), \ 140 .done = false, \ 141 } 142 143 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 144 DECLARE_COMPLETION_ONSTACK(c); \ 145 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 146 147 enum hisi_sas_bit_err_type { 148 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 149 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 150 }; 151 152 enum hisi_sas_phy_event { 153 HISI_PHYE_PHY_UP = 0U, 154 HISI_PHYE_LINK_RESET, 155 HISI_PHYES_NUM, 156 }; 157 158 struct hisi_sas_debugfs_fifo { 159 u32 signal_sel; 160 u32 dump_msk; 161 u32 dump_mode; 162 u32 trigger; 163 u32 trigger_msk; 164 u32 trigger_mode; 165 u32 rd_data[HISI_SAS_FIFO_DATA_DW_SIZE]; 166 }; 167 168 struct hisi_sas_phy { 169 struct work_struct works[HISI_PHYES_NUM]; 170 struct hisi_hba *hisi_hba; 171 struct hisi_sas_port *port; 172 struct asd_sas_phy sas_phy; 173 struct sas_identify identify; 174 struct completion *reset_completion; 175 struct timer_list timer; 176 spinlock_t lock; 177 u64 port_id; /* from hw */ 178 u64 frame_rcvd_size; 179 u8 frame_rcvd[32]; 180 u8 phy_attached; 181 u8 in_reset; 182 u8 reserved[2]; 183 u32 phy_type; 184 u32 code_violation_err_count; 185 enum sas_linkrate minimum_linkrate; 186 enum sas_linkrate maximum_linkrate; 187 int enable; 188 atomic_t down_cnt; 189 190 /* Trace FIFO */ 191 struct hisi_sas_debugfs_fifo fifo; 192 }; 193 194 struct hisi_sas_port { 195 struct asd_sas_port sas_port; 196 u8 port_attached; 197 u8 id; /* from hw */ 198 }; 199 200 struct hisi_sas_cq { 201 struct hisi_hba *hisi_hba; 202 const struct cpumask *irq_mask; 203 int rd_point; 204 int id; 205 int irq_no; 206 }; 207 208 struct hisi_sas_dq { 209 struct hisi_hba *hisi_hba; 210 struct list_head list; 211 spinlock_t lock; 212 int wr_point; 213 int id; 214 }; 215 216 struct hisi_sas_device { 217 struct hisi_hba *hisi_hba; 218 struct domain_device *sas_device; 219 struct completion *completion; 220 struct hisi_sas_dq *dq; 221 struct list_head list; 222 enum sas_device_type dev_type; 223 enum dev_status dev_status; 224 int device_id; 225 int sata_idx; 226 spinlock_t lock; /* For protecting slots */ 227 }; 228 229 struct hisi_sas_tmf_task { 230 int force_phy; 231 int phy_id; 232 u8 tmf; 233 u16 tag_of_task_to_be_managed; 234 }; 235 236 struct hisi_sas_slot { 237 struct list_head entry; 238 struct list_head delivery; 239 struct sas_task *task; 240 struct hisi_sas_port *port; 241 u64 n_elem; 242 u64 n_elem_dif; 243 int dlvry_queue; 244 int dlvry_queue_slot; 245 int cmplt_queue; 246 int cmplt_queue_slot; 247 int abort; 248 int ready; 249 int device_id; 250 void *cmd_hdr; 251 dma_addr_t cmd_hdr_dma; 252 struct timer_list internal_abort_timer; 253 bool is_internal; 254 struct hisi_sas_tmf_task *tmf; 255 /* Do not reorder/change members after here */ 256 void *buf; 257 dma_addr_t buf_dma; 258 u16 idx; 259 }; 260 261 struct hisi_sas_iost_itct_cache { 262 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 263 }; 264 265 enum hisi_sas_debugfs_reg_array_member { 266 DEBUGFS_GLOBAL = 0, 267 DEBUGFS_AXI, 268 DEBUGFS_RAS, 269 DEBUGFS_REGS_NUM 270 }; 271 272 enum hisi_sas_debugfs_cache_type { 273 HISI_SAS_ITCT_CACHE, 274 HISI_SAS_IOST_CACHE, 275 }; 276 277 enum hisi_sas_debugfs_bist_ffe_cfg { 278 FFE_SAS_1_5_GBPS, 279 FFE_SAS_3_0_GBPS, 280 FFE_SAS_6_0_GBPS, 281 FFE_SAS_12_0_GBPS, 282 FFE_RESV, 283 FFE_SATA_1_5_GBPS, 284 FFE_SATA_3_0_GBPS, 285 FFE_SATA_6_0_GBPS, 286 FFE_CFG_MAX 287 }; 288 289 enum hisi_sas_debugfs_bist_fixed_code { 290 FIXED_CODE, 291 FIXED_CODE_1, 292 FIXED_CODE_MAX 293 }; 294 295 enum { 296 HISI_SAS_BIST_CODE_MODE_PRBS7, 297 HISI_SAS_BIST_CODE_MODE_PRBS23, 298 HISI_SAS_BIST_CODE_MODE_PRBS31, 299 HISI_SAS_BIST_CODE_MODE_JTPAT, 300 HISI_SAS_BIST_CODE_MODE_CJTPAT, 301 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 302 HISI_SAS_BIST_CODE_MODE_TRAIN, 303 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 304 HISI_SAS_BIST_CODE_MODE_HFTP, 305 HISI_SAS_BIST_CODE_MODE_MFTP, 306 HISI_SAS_BIST_CODE_MODE_LFTP, 307 HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 308 }; 309 310 struct hisi_sas_hw { 311 int (*hw_init)(struct hisi_hba *hisi_hba); 312 int (*interrupt_preinit)(struct hisi_hba *hisi_hba); 313 void (*setup_itct)(struct hisi_hba *hisi_hba, 314 struct hisi_sas_device *device); 315 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 316 struct domain_device *device); 317 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 318 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 319 void (*start_delivery)(struct hisi_sas_dq *dq); 320 void (*prep_ssp)(struct hisi_hba *hisi_hba, 321 struct hisi_sas_slot *slot); 322 void (*prep_smp)(struct hisi_hba *hisi_hba, 323 struct hisi_sas_slot *slot); 324 void (*prep_stp)(struct hisi_hba *hisi_hba, 325 struct hisi_sas_slot *slot); 326 void (*prep_abort)(struct hisi_hba *hisi_hba, 327 struct hisi_sas_slot *slot, 328 int device_id, int abort_flag, int tag_to_abort); 329 void (*phys_init)(struct hisi_hba *hisi_hba); 330 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 331 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 332 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 333 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 334 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 335 struct sas_phy_linkrates *linkrates); 336 enum sas_linkrate (*phy_get_max_linkrate)(void); 337 int (*clear_itct)(struct hisi_hba *hisi_hba, 338 struct hisi_sas_device *dev); 339 void (*free_device)(struct hisi_sas_device *sas_dev); 340 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 341 void (*dereg_device)(struct hisi_hba *hisi_hba, 342 struct domain_device *device); 343 int (*soft_reset)(struct hisi_hba *hisi_hba); 344 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 345 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 346 u8 reg_index, u8 reg_count, u8 *write_data); 347 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 348 int delay_ms, int timeout_ms); 349 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 350 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 351 int complete_hdr_size; 352 struct scsi_host_template *sht; 353 }; 354 355 #define HISI_SAS_MAX_DEBUGFS_DUMP (50) 356 357 struct hisi_sas_debugfs_cq { 358 struct hisi_sas_cq *cq; 359 void *complete_hdr; 360 }; 361 362 struct hisi_sas_debugfs_dq { 363 struct hisi_sas_dq *dq; 364 struct hisi_sas_cmd_hdr *hdr; 365 }; 366 367 struct hisi_sas_debugfs_regs { 368 struct hisi_hba *hisi_hba; 369 u32 *data; 370 }; 371 372 struct hisi_sas_debugfs_port { 373 struct hisi_sas_phy *phy; 374 u32 *data; 375 }; 376 377 struct hisi_sas_debugfs_iost { 378 struct hisi_sas_iost *iost; 379 }; 380 381 struct hisi_sas_debugfs_itct { 382 struct hisi_sas_itct *itct; 383 }; 384 385 struct hisi_sas_debugfs_iost_cache { 386 struct hisi_sas_iost_itct_cache *cache; 387 }; 388 389 struct hisi_sas_debugfs_itct_cache { 390 struct hisi_sas_iost_itct_cache *cache; 391 }; 392 393 struct hisi_hba { 394 /* This must be the first element, used by SHOST_TO_SAS_HA */ 395 struct sas_ha_struct *p; 396 397 struct platform_device *platform_dev; 398 struct pci_dev *pci_dev; 399 struct device *dev; 400 401 int prot_mask; 402 403 void __iomem *regs; 404 void __iomem *sgpio_regs; 405 struct regmap *ctrl; 406 u32 ctrl_reset_reg; 407 u32 ctrl_reset_sts_reg; 408 u32 ctrl_clock_ena_reg; 409 u32 refclk_frequency_mhz; 410 u8 sas_addr[SAS_ADDR_SIZE]; 411 412 int *irq_map; /* v2 hw */ 413 414 int n_phy; 415 spinlock_t lock; 416 struct semaphore sem; 417 418 struct timer_list timer; 419 struct workqueue_struct *wq; 420 421 int slot_index_count; 422 int last_slot_index; 423 int last_dev_id; 424 unsigned long *slot_index_tags; 425 unsigned long reject_stp_links_msk; 426 427 /* SCSI/SAS glue */ 428 struct sas_ha_struct sha; 429 struct Scsi_Host *shost; 430 431 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 432 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 433 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 434 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 435 436 int queue_count; 437 438 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 439 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 440 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 441 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 442 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 443 struct hisi_sas_initial_fis *initial_fis; 444 dma_addr_t initial_fis_dma; 445 struct hisi_sas_itct *itct; 446 dma_addr_t itct_dma; 447 struct hisi_sas_iost *iost; 448 dma_addr_t iost_dma; 449 struct hisi_sas_breakpoint *breakpoint; 450 dma_addr_t breakpoint_dma; 451 struct hisi_sas_breakpoint *sata_breakpoint; 452 dma_addr_t sata_breakpoint_dma; 453 struct hisi_sas_slot *slot_info; 454 unsigned long flags; 455 const struct hisi_sas_hw *hw; /* Low level hw interface */ 456 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 457 struct work_struct rst_work; 458 struct work_struct debugfs_work; 459 u32 phy_state; 460 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 461 u32 intr_coal_count; /* Interrupt count to coalesce */ 462 463 int cq_nvecs; 464 465 /* bist */ 466 enum sas_linkrate debugfs_bist_linkrate; 467 int debugfs_bist_code_mode; 468 int debugfs_bist_phy_no; 469 int debugfs_bist_mode; 470 u32 debugfs_bist_cnt; 471 int debugfs_bist_enable; 472 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; 473 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; 474 475 /* debugfs memories */ 476 /* Put Global AXI and RAS Register into register array */ 477 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; 478 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; 479 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 480 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 481 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; 482 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; 483 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 484 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 485 486 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; 487 int debugfs_dump_index; 488 struct dentry *debugfs_dir; 489 struct dentry *debugfs_dump_dentry; 490 struct dentry *debugfs_bist_dentry; 491 struct dentry *debugfs_fifo_dentry; 492 }; 493 494 /* Generic HW DMA host memory structures */ 495 /* Delivery queue header */ 496 struct hisi_sas_cmd_hdr { 497 /* dw0 */ 498 __le32 dw0; 499 500 /* dw1 */ 501 __le32 dw1; 502 503 /* dw2 */ 504 __le32 dw2; 505 506 /* dw3 */ 507 __le32 transfer_tags; 508 509 /* dw4 */ 510 __le32 data_transfer_len; 511 512 /* dw5 */ 513 __le32 first_burst_num; 514 515 /* dw6 */ 516 __le32 sg_len; 517 518 /* dw7 */ 519 __le32 dw7; 520 521 /* dw8-9 */ 522 __le64 cmd_table_addr; 523 524 /* dw10-11 */ 525 __le64 sts_buffer_addr; 526 527 /* dw12-13 */ 528 __le64 prd_table_addr; 529 530 /* dw14-15 */ 531 __le64 dif_prd_table_addr; 532 }; 533 534 struct hisi_sas_itct { 535 __le64 qw0; 536 __le64 sas_addr; 537 __le64 qw2; 538 __le64 qw3; 539 __le64 qw4_15[12]; 540 }; 541 542 struct hisi_sas_iost { 543 __le64 qw0; 544 __le64 qw1; 545 __le64 qw2; 546 __le64 qw3; 547 }; 548 549 struct hisi_sas_err_record { 550 u32 data[4]; 551 }; 552 553 struct hisi_sas_initial_fis { 554 struct hisi_sas_err_record err_record; 555 struct dev_to_host_fis fis; 556 u32 rsvd[3]; 557 }; 558 559 struct hisi_sas_breakpoint { 560 u8 data[128]; 561 }; 562 563 struct hisi_sas_sata_breakpoint { 564 struct hisi_sas_breakpoint tag[32]; 565 }; 566 567 struct hisi_sas_sge { 568 __le64 addr; 569 __le32 page_ctrl_0; 570 __le32 page_ctrl_1; 571 __le32 data_len; 572 __le32 data_off; 573 }; 574 575 struct hisi_sas_command_table_smp { 576 u8 bytes[44]; 577 }; 578 579 struct hisi_sas_command_table_stp { 580 struct host_to_dev_fis command_fis; 581 u8 dummy[12]; 582 u8 atapi_cdb[ATAPI_CDB_LEN]; 583 }; 584 585 #define HISI_SAS_SGE_PAGE_CNT (124) 586 struct hisi_sas_sge_page { 587 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 588 } __aligned(16); 589 590 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 591 struct hisi_sas_sge_dif_page { 592 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 593 } __aligned(16); 594 595 struct hisi_sas_command_table_ssp { 596 struct ssp_frame_hdr hdr; 597 union { 598 struct { 599 struct ssp_command_iu task; 600 u32 prot[7]; 601 }; 602 struct ssp_tmf_iu ssp_task; 603 struct xfer_rdy_iu xfer_rdy; 604 struct ssp_response_iu ssp_res; 605 } u; 606 }; 607 608 union hisi_sas_command_table { 609 struct hisi_sas_command_table_ssp ssp; 610 struct hisi_sas_command_table_smp smp; 611 struct hisi_sas_command_table_stp stp; 612 } __aligned(16); 613 614 struct hisi_sas_status_buffer { 615 struct hisi_sas_err_record err; 616 u8 iu[1024]; 617 } __aligned(16); 618 619 struct hisi_sas_slot_buf_table { 620 struct hisi_sas_status_buffer status_buffer; 621 union hisi_sas_command_table command_header; 622 struct hisi_sas_sge_page sge_page; 623 }; 624 625 struct hisi_sas_slot_dif_buf_table { 626 struct hisi_sas_slot_buf_table slot_buf; 627 struct hisi_sas_sge_dif_page sge_dif_page; 628 }; 629 630 extern struct scsi_transport_template *hisi_sas_stt; 631 632 extern bool hisi_sas_debugfs_enable; 633 extern u32 hisi_sas_debugfs_dump_count; 634 extern struct dentry *hisi_sas_debugfs_dir; 635 636 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 637 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 638 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 639 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 640 int direction); 641 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 642 extern void hisi_sas_sata_done(struct sas_task *task, 643 struct hisi_sas_slot *slot); 644 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 645 extern int hisi_sas_probe(struct platform_device *pdev, 646 const struct hisi_sas_hw *ops); 647 extern int hisi_sas_remove(struct platform_device *pdev); 648 649 extern int hisi_sas_slave_configure(struct scsi_device *sdev); 650 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 651 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 652 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 653 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 654 int enable); 655 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy, 656 gfp_t gfp_flags); 657 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 658 struct sas_task *task, 659 struct hisi_sas_slot *slot); 660 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 661 extern void hisi_sas_rst_work_handler(struct work_struct *work); 662 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 663 extern void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba); 664 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 665 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 666 enum hisi_sas_phy_event event); 667 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 668 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 669 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 670 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 671 #endif 672