1 /* SPDX-License-Identifier: GPL-2.0-or-later */ 2 /* 3 * Copyright (c) 2015 Linaro Ltd. 4 * Copyright (c) 2015 Hisilicon Limited. 5 */ 6 7 #ifndef _HISI_SAS_H_ 8 #define _HISI_SAS_H_ 9 10 #include <linux/acpi.h> 11 #include <linux/blk-mq.h> 12 #include <linux/blk-mq-pci.h> 13 #include <linux/clk.h> 14 #include <linux/debugfs.h> 15 #include <linux/dmapool.h> 16 #include <linux/iopoll.h> 17 #include <linux/irq.h> 18 #include <linux/lcm.h> 19 #include <linux/libata.h> 20 #include <linux/mfd/syscon.h> 21 #include <linux/module.h> 22 #include <linux/of_address.h> 23 #include <linux/pci.h> 24 #include <linux/platform_device.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/property.h> 27 #include <linux/regmap.h> 28 #include <linux/timer.h> 29 #include <scsi/sas_ata.h> 30 #include <scsi/libsas.h> 31 32 #define HISI_SAS_MAX_PHYS 9 33 #define HISI_SAS_MAX_QUEUES 32 34 #define HISI_SAS_QUEUE_SLOTS 4096 35 #define HISI_SAS_MAX_ITCT_ENTRIES 1024 36 #define HISI_SAS_MAX_DEVICES HISI_SAS_MAX_ITCT_ENTRIES 37 #define HISI_SAS_RESET_BIT 0 38 #define HISI_SAS_REJECT_CMD_BIT 1 39 #define HISI_SAS_PM_BIT 2 40 #define HISI_SAS_MAX_COMMANDS (HISI_SAS_QUEUE_SLOTS) 41 #define HISI_SAS_RESERVED_IPTT 96 42 #define HISI_SAS_UNRESERVED_IPTT \ 43 (HISI_SAS_MAX_COMMANDS - HISI_SAS_RESERVED_IPTT) 44 45 #define HISI_SAS_IOST_ITCT_CACHE_NUM 64 46 #define HISI_SAS_IOST_ITCT_CACHE_DW_SZ 10 47 48 #define HISI_SAS_STATUS_BUF_SZ (sizeof(struct hisi_sas_status_buffer)) 49 #define HISI_SAS_COMMAND_TABLE_SZ (sizeof(union hisi_sas_command_table)) 50 51 #define hisi_sas_status_buf_addr(buf) \ 52 ((buf) + offsetof(struct hisi_sas_slot_buf_table, status_buffer)) 53 #define hisi_sas_status_buf_addr_mem(slot) hisi_sas_status_buf_addr((slot)->buf) 54 #define hisi_sas_status_buf_addr_dma(slot) \ 55 hisi_sas_status_buf_addr((slot)->buf_dma) 56 57 #define hisi_sas_cmd_hdr_addr(buf) \ 58 ((buf) + offsetof(struct hisi_sas_slot_buf_table, command_header)) 59 #define hisi_sas_cmd_hdr_addr_mem(slot) hisi_sas_cmd_hdr_addr((slot)->buf) 60 #define hisi_sas_cmd_hdr_addr_dma(slot) hisi_sas_cmd_hdr_addr((slot)->buf_dma) 61 62 #define hisi_sas_sge_addr(buf) \ 63 ((buf) + offsetof(struct hisi_sas_slot_buf_table, sge_page)) 64 #define hisi_sas_sge_addr_mem(slot) hisi_sas_sge_addr((slot)->buf) 65 #define hisi_sas_sge_addr_dma(slot) hisi_sas_sge_addr((slot)->buf_dma) 66 67 #define hisi_sas_sge_dif_addr(buf) \ 68 ((buf) + offsetof(struct hisi_sas_slot_dif_buf_table, sge_dif_page)) 69 #define hisi_sas_sge_dif_addr_mem(slot) hisi_sas_sge_dif_addr((slot)->buf) 70 #define hisi_sas_sge_dif_addr_dma(slot) hisi_sas_sge_dif_addr((slot)->buf_dma) 71 72 #define HISI_SAS_MAX_SSP_RESP_SZ (sizeof(struct ssp_frame_hdr) + 1024) 73 #define HISI_SAS_MAX_SMP_RESP_SZ 1028 74 #define HISI_SAS_MAX_STP_RESP_SZ 28 75 76 #define HISI_SAS_SATA_PROTOCOL_NONDATA 0x1 77 #define HISI_SAS_SATA_PROTOCOL_PIO 0x2 78 #define HISI_SAS_SATA_PROTOCOL_DMA 0x4 79 #define HISI_SAS_SATA_PROTOCOL_FPDMA 0x8 80 #define HISI_SAS_SATA_PROTOCOL_ATAPI 0x10 81 82 #define HISI_SAS_DIF_PROT_MASK (SHOST_DIF_TYPE1_PROTECTION | \ 83 SHOST_DIF_TYPE2_PROTECTION | \ 84 SHOST_DIF_TYPE3_PROTECTION) 85 86 #define HISI_SAS_DIX_PROT_MASK (SHOST_DIX_TYPE1_PROTECTION | \ 87 SHOST_DIX_TYPE2_PROTECTION | \ 88 SHOST_DIX_TYPE3_PROTECTION) 89 90 #define HISI_SAS_PROT_MASK (HISI_SAS_DIF_PROT_MASK | HISI_SAS_DIX_PROT_MASK) 91 92 #define HISI_SAS_WAIT_PHYUP_TIMEOUT 20 93 #define CLEAR_ITCT_TIMEOUT 20 94 95 struct hisi_hba; 96 97 enum { 98 PORT_TYPE_SAS = (1U << 1), 99 PORT_TYPE_SATA = (1U << 0), 100 }; 101 102 enum dev_status { 103 HISI_SAS_DEV_INIT, 104 HISI_SAS_DEV_NORMAL, 105 }; 106 107 enum { 108 HISI_SAS_INT_ABT_CMD = 0, 109 HISI_SAS_INT_ABT_DEV = 1, 110 }; 111 112 enum hisi_sas_dev_type { 113 HISI_SAS_DEV_TYPE_STP = 0, 114 HISI_SAS_DEV_TYPE_SSP, 115 HISI_SAS_DEV_TYPE_SATA, 116 }; 117 118 struct hisi_sas_hw_error { 119 u32 irq_msk; 120 u32 msk; 121 int shift; 122 const char *msg; 123 int reg; 124 const struct hisi_sas_hw_error *sub; 125 }; 126 127 struct hisi_sas_rst { 128 struct hisi_hba *hisi_hba; 129 struct completion *completion; 130 struct work_struct work; 131 bool done; 132 }; 133 134 #define HISI_SAS_RST_WORK_INIT(r, c) \ 135 { .hisi_hba = hisi_hba, \ 136 .completion = &c, \ 137 .work = __WORK_INITIALIZER(r.work, \ 138 hisi_sas_sync_rst_work_handler), \ 139 .done = false, \ 140 } 141 142 #define HISI_SAS_DECLARE_RST_WORK_ON_STACK(r) \ 143 DECLARE_COMPLETION_ONSTACK(c); \ 144 struct hisi_sas_rst r = HISI_SAS_RST_WORK_INIT(r, c) 145 146 enum hisi_sas_bit_err_type { 147 HISI_SAS_ERR_SINGLE_BIT_ECC = 0x0, 148 HISI_SAS_ERR_MULTI_BIT_ECC = 0x1, 149 }; 150 151 enum hisi_sas_phy_event { 152 HISI_PHYE_PHY_UP = 0U, 153 HISI_PHYE_LINK_RESET, 154 HISI_PHYES_NUM, 155 }; 156 157 struct hisi_sas_phy { 158 struct work_struct works[HISI_PHYES_NUM]; 159 struct hisi_hba *hisi_hba; 160 struct hisi_sas_port *port; 161 struct asd_sas_phy sas_phy; 162 struct sas_identify identify; 163 struct completion *reset_completion; 164 struct timer_list timer; 165 spinlock_t lock; 166 u64 port_id; /* from hw */ 167 u64 frame_rcvd_size; 168 u8 frame_rcvd[32]; 169 u8 phy_attached; 170 u8 in_reset; 171 u8 reserved[2]; 172 u32 phy_type; 173 u32 code_violation_err_count; 174 enum sas_linkrate minimum_linkrate; 175 enum sas_linkrate maximum_linkrate; 176 int enable; 177 atomic_t down_cnt; 178 }; 179 180 struct hisi_sas_port { 181 struct asd_sas_port sas_port; 182 u8 port_attached; 183 u8 id; /* from hw */ 184 }; 185 186 struct hisi_sas_cq { 187 struct hisi_hba *hisi_hba; 188 const struct cpumask *irq_mask; 189 int rd_point; 190 int id; 191 int irq_no; 192 }; 193 194 struct hisi_sas_dq { 195 struct hisi_hba *hisi_hba; 196 struct list_head list; 197 spinlock_t lock; 198 int wr_point; 199 int id; 200 }; 201 202 struct hisi_sas_device { 203 struct hisi_hba *hisi_hba; 204 struct domain_device *sas_device; 205 struct completion *completion; 206 struct hisi_sas_dq *dq; 207 struct list_head list; 208 enum sas_device_type dev_type; 209 enum dev_status dev_status; 210 int device_id; 211 int sata_idx; 212 spinlock_t lock; /* For protecting slots */ 213 }; 214 215 struct hisi_sas_tmf_task { 216 int force_phy; 217 int phy_id; 218 u8 tmf; 219 u16 tag_of_task_to_be_managed; 220 }; 221 222 struct hisi_sas_slot { 223 struct list_head entry; 224 struct list_head delivery; 225 struct sas_task *task; 226 struct hisi_sas_port *port; 227 u64 n_elem; 228 u64 n_elem_dif; 229 int dlvry_queue; 230 int dlvry_queue_slot; 231 int cmplt_queue; 232 int cmplt_queue_slot; 233 int abort; 234 int ready; 235 int device_id; 236 void *cmd_hdr; 237 dma_addr_t cmd_hdr_dma; 238 struct timer_list internal_abort_timer; 239 bool is_internal; 240 struct hisi_sas_tmf_task *tmf; 241 /* Do not reorder/change members after here */ 242 void *buf; 243 dma_addr_t buf_dma; 244 u16 idx; 245 }; 246 247 struct hisi_sas_iost_itct_cache { 248 u32 data[HISI_SAS_IOST_ITCT_CACHE_DW_SZ]; 249 }; 250 251 enum hisi_sas_debugfs_reg_array_member { 252 DEBUGFS_GLOBAL = 0, 253 DEBUGFS_AXI, 254 DEBUGFS_RAS, 255 DEBUGFS_REGS_NUM 256 }; 257 258 enum hisi_sas_debugfs_cache_type { 259 HISI_SAS_ITCT_CACHE, 260 HISI_SAS_IOST_CACHE, 261 }; 262 263 enum hisi_sas_debugfs_bist_ffe_cfg { 264 FFE_SAS_1_5_GBPS, 265 FFE_SAS_3_0_GBPS, 266 FFE_SAS_6_0_GBPS, 267 FFE_SAS_12_0_GBPS, 268 FFE_RESV, 269 FFE_SATA_1_5_GBPS, 270 FFE_SATA_3_0_GBPS, 271 FFE_SATA_6_0_GBPS, 272 FFE_CFG_MAX 273 }; 274 275 enum hisi_sas_debugfs_bist_fixed_code { 276 FIXED_CODE, 277 FIXED_CODE_1, 278 FIXED_CODE_MAX 279 }; 280 281 enum { 282 HISI_SAS_BIST_CODE_MODE_PRBS7, 283 HISI_SAS_BIST_CODE_MODE_PRBS23, 284 HISI_SAS_BIST_CODE_MODE_PRBS31, 285 HISI_SAS_BIST_CODE_MODE_JTPAT, 286 HISI_SAS_BIST_CODE_MODE_CJTPAT, 287 HISI_SAS_BIST_CODE_MODE_SCRAMBED_0, 288 HISI_SAS_BIST_CODE_MODE_TRAIN, 289 HISI_SAS_BIST_CODE_MODE_TRAIN_DONE, 290 HISI_SAS_BIST_CODE_MODE_HFTP, 291 HISI_SAS_BIST_CODE_MODE_MFTP, 292 HISI_SAS_BIST_CODE_MODE_LFTP, 293 HISI_SAS_BIST_CODE_MODE_FIXED_DATA, 294 }; 295 296 struct hisi_sas_hw { 297 int (*hw_init)(struct hisi_hba *hisi_hba); 298 int (*interrupt_preinit)(struct hisi_hba *hisi_hba); 299 void (*setup_itct)(struct hisi_hba *hisi_hba, 300 struct hisi_sas_device *device); 301 int (*slot_index_alloc)(struct hisi_hba *hisi_hba, 302 struct domain_device *device); 303 struct hisi_sas_device *(*alloc_dev)(struct domain_device *device); 304 void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no); 305 void (*start_delivery)(struct hisi_sas_dq *dq); 306 void (*prep_ssp)(struct hisi_hba *hisi_hba, 307 struct hisi_sas_slot *slot); 308 void (*prep_smp)(struct hisi_hba *hisi_hba, 309 struct hisi_sas_slot *slot); 310 void (*prep_stp)(struct hisi_hba *hisi_hba, 311 struct hisi_sas_slot *slot); 312 void (*prep_abort)(struct hisi_hba *hisi_hba, 313 struct hisi_sas_slot *slot, 314 int device_id, int abort_flag, int tag_to_abort); 315 void (*phys_init)(struct hisi_hba *hisi_hba); 316 void (*phy_start)(struct hisi_hba *hisi_hba, int phy_no); 317 void (*phy_disable)(struct hisi_hba *hisi_hba, int phy_no); 318 void (*phy_hard_reset)(struct hisi_hba *hisi_hba, int phy_no); 319 void (*get_events)(struct hisi_hba *hisi_hba, int phy_no); 320 void (*phy_set_linkrate)(struct hisi_hba *hisi_hba, int phy_no, 321 struct sas_phy_linkrates *linkrates); 322 enum sas_linkrate (*phy_get_max_linkrate)(void); 323 int (*clear_itct)(struct hisi_hba *hisi_hba, 324 struct hisi_sas_device *dev); 325 void (*free_device)(struct hisi_sas_device *sas_dev); 326 int (*get_wideport_bitmap)(struct hisi_hba *hisi_hba, int port_id); 327 void (*dereg_device)(struct hisi_hba *hisi_hba, 328 struct domain_device *device); 329 int (*soft_reset)(struct hisi_hba *hisi_hba); 330 u32 (*get_phys_state)(struct hisi_hba *hisi_hba); 331 int (*write_gpio)(struct hisi_hba *hisi_hba, u8 reg_type, 332 u8 reg_index, u8 reg_count, u8 *write_data); 333 void (*wait_cmds_complete_timeout)(struct hisi_hba *hisi_hba, 334 int delay_ms, int timeout_ms); 335 void (*snapshot_prepare)(struct hisi_hba *hisi_hba); 336 void (*snapshot_restore)(struct hisi_hba *hisi_hba); 337 int complete_hdr_size; 338 struct scsi_host_template *sht; 339 }; 340 341 #define HISI_SAS_MAX_DEBUGFS_DUMP (50) 342 343 struct hisi_sas_debugfs_cq { 344 struct hisi_sas_cq *cq; 345 void *complete_hdr; 346 }; 347 348 struct hisi_sas_debugfs_dq { 349 struct hisi_sas_dq *dq; 350 struct hisi_sas_cmd_hdr *hdr; 351 }; 352 353 struct hisi_sas_debugfs_regs { 354 struct hisi_hba *hisi_hba; 355 u32 *data; 356 }; 357 358 struct hisi_sas_debugfs_port { 359 struct hisi_sas_phy *phy; 360 u32 *data; 361 }; 362 363 struct hisi_sas_debugfs_iost { 364 struct hisi_sas_iost *iost; 365 }; 366 367 struct hisi_sas_debugfs_itct { 368 struct hisi_sas_itct *itct; 369 }; 370 371 struct hisi_sas_debugfs_iost_cache { 372 struct hisi_sas_iost_itct_cache *cache; 373 }; 374 375 struct hisi_sas_debugfs_itct_cache { 376 struct hisi_sas_iost_itct_cache *cache; 377 }; 378 379 struct hisi_hba { 380 /* This must be the first element, used by SHOST_TO_SAS_HA */ 381 struct sas_ha_struct *p; 382 383 struct platform_device *platform_dev; 384 struct pci_dev *pci_dev; 385 struct device *dev; 386 387 int prot_mask; 388 389 void __iomem *regs; 390 void __iomem *sgpio_regs; 391 struct regmap *ctrl; 392 u32 ctrl_reset_reg; 393 u32 ctrl_reset_sts_reg; 394 u32 ctrl_clock_ena_reg; 395 u32 refclk_frequency_mhz; 396 u8 sas_addr[SAS_ADDR_SIZE]; 397 398 int *irq_map; /* v2 hw */ 399 400 int n_phy; 401 spinlock_t lock; 402 struct semaphore sem; 403 404 struct timer_list timer; 405 struct workqueue_struct *wq; 406 407 int slot_index_count; 408 int last_slot_index; 409 int last_dev_id; 410 unsigned long *slot_index_tags; 411 unsigned long reject_stp_links_msk; 412 413 /* SCSI/SAS glue */ 414 struct sas_ha_struct sha; 415 struct Scsi_Host *shost; 416 417 struct hisi_sas_cq cq[HISI_SAS_MAX_QUEUES]; 418 struct hisi_sas_dq dq[HISI_SAS_MAX_QUEUES]; 419 struct hisi_sas_phy phy[HISI_SAS_MAX_PHYS]; 420 struct hisi_sas_port port[HISI_SAS_MAX_PHYS]; 421 422 int queue_count; 423 424 struct hisi_sas_device devices[HISI_SAS_MAX_DEVICES]; 425 struct hisi_sas_cmd_hdr *cmd_hdr[HISI_SAS_MAX_QUEUES]; 426 dma_addr_t cmd_hdr_dma[HISI_SAS_MAX_QUEUES]; 427 void *complete_hdr[HISI_SAS_MAX_QUEUES]; 428 dma_addr_t complete_hdr_dma[HISI_SAS_MAX_QUEUES]; 429 struct hisi_sas_initial_fis *initial_fis; 430 dma_addr_t initial_fis_dma; 431 struct hisi_sas_itct *itct; 432 dma_addr_t itct_dma; 433 struct hisi_sas_iost *iost; 434 dma_addr_t iost_dma; 435 struct hisi_sas_breakpoint *breakpoint; 436 dma_addr_t breakpoint_dma; 437 struct hisi_sas_breakpoint *sata_breakpoint; 438 dma_addr_t sata_breakpoint_dma; 439 struct hisi_sas_slot *slot_info; 440 unsigned long flags; 441 const struct hisi_sas_hw *hw; /* Low level hw interface */ 442 unsigned long sata_dev_bitmap[BITS_TO_LONGS(HISI_SAS_MAX_DEVICES)]; 443 struct work_struct rst_work; 444 struct work_struct debugfs_work; 445 u32 phy_state; 446 u32 intr_coal_ticks; /* Time of interrupt coalesce in us */ 447 u32 intr_coal_count; /* Interrupt count to coalesce */ 448 449 int cq_nvecs; 450 451 /* bist */ 452 enum sas_linkrate debugfs_bist_linkrate; 453 int debugfs_bist_code_mode; 454 int debugfs_bist_phy_no; 455 int debugfs_bist_mode; 456 u32 debugfs_bist_cnt; 457 int debugfs_bist_enable; 458 u32 debugfs_bist_ffe[HISI_SAS_MAX_PHYS][FFE_CFG_MAX]; 459 u32 debugfs_bist_fixed_code[FIXED_CODE_MAX]; 460 461 /* debugfs memories */ 462 /* Put Global AXI and RAS Register into register array */ 463 struct hisi_sas_debugfs_regs debugfs_regs[HISI_SAS_MAX_DEBUGFS_DUMP][DEBUGFS_REGS_NUM]; 464 struct hisi_sas_debugfs_port debugfs_port_reg[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_PHYS]; 465 struct hisi_sas_debugfs_cq debugfs_cq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 466 struct hisi_sas_debugfs_dq debugfs_dq[HISI_SAS_MAX_DEBUGFS_DUMP][HISI_SAS_MAX_QUEUES]; 467 struct hisi_sas_debugfs_iost debugfs_iost[HISI_SAS_MAX_DEBUGFS_DUMP]; 468 struct hisi_sas_debugfs_itct debugfs_itct[HISI_SAS_MAX_DEBUGFS_DUMP]; 469 struct hisi_sas_debugfs_iost_cache debugfs_iost_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 470 struct hisi_sas_debugfs_itct_cache debugfs_itct_cache[HISI_SAS_MAX_DEBUGFS_DUMP]; 471 472 u64 debugfs_timestamp[HISI_SAS_MAX_DEBUGFS_DUMP]; 473 int debugfs_dump_index; 474 struct dentry *debugfs_dir; 475 struct dentry *debugfs_dump_dentry; 476 struct dentry *debugfs_bist_dentry; 477 }; 478 479 /* Generic HW DMA host memory structures */ 480 /* Delivery queue header */ 481 struct hisi_sas_cmd_hdr { 482 /* dw0 */ 483 __le32 dw0; 484 485 /* dw1 */ 486 __le32 dw1; 487 488 /* dw2 */ 489 __le32 dw2; 490 491 /* dw3 */ 492 __le32 transfer_tags; 493 494 /* dw4 */ 495 __le32 data_transfer_len; 496 497 /* dw5 */ 498 __le32 first_burst_num; 499 500 /* dw6 */ 501 __le32 sg_len; 502 503 /* dw7 */ 504 __le32 dw7; 505 506 /* dw8-9 */ 507 __le64 cmd_table_addr; 508 509 /* dw10-11 */ 510 __le64 sts_buffer_addr; 511 512 /* dw12-13 */ 513 __le64 prd_table_addr; 514 515 /* dw14-15 */ 516 __le64 dif_prd_table_addr; 517 }; 518 519 struct hisi_sas_itct { 520 __le64 qw0; 521 __le64 sas_addr; 522 __le64 qw2; 523 __le64 qw3; 524 __le64 qw4_15[12]; 525 }; 526 527 struct hisi_sas_iost { 528 __le64 qw0; 529 __le64 qw1; 530 __le64 qw2; 531 __le64 qw3; 532 }; 533 534 struct hisi_sas_err_record { 535 u32 data[4]; 536 }; 537 538 struct hisi_sas_initial_fis { 539 struct hisi_sas_err_record err_record; 540 struct dev_to_host_fis fis; 541 u32 rsvd[3]; 542 }; 543 544 struct hisi_sas_breakpoint { 545 u8 data[128]; 546 }; 547 548 struct hisi_sas_sata_breakpoint { 549 struct hisi_sas_breakpoint tag[32]; 550 }; 551 552 struct hisi_sas_sge { 553 __le64 addr; 554 __le32 page_ctrl_0; 555 __le32 page_ctrl_1; 556 __le32 data_len; 557 __le32 data_off; 558 }; 559 560 struct hisi_sas_command_table_smp { 561 u8 bytes[44]; 562 }; 563 564 struct hisi_sas_command_table_stp { 565 struct host_to_dev_fis command_fis; 566 u8 dummy[12]; 567 u8 atapi_cdb[ATAPI_CDB_LEN]; 568 }; 569 570 #define HISI_SAS_SGE_PAGE_CNT (124) 571 struct hisi_sas_sge_page { 572 struct hisi_sas_sge sge[HISI_SAS_SGE_PAGE_CNT]; 573 } __aligned(16); 574 575 #define HISI_SAS_SGE_DIF_PAGE_CNT HISI_SAS_SGE_PAGE_CNT 576 struct hisi_sas_sge_dif_page { 577 struct hisi_sas_sge sge[HISI_SAS_SGE_DIF_PAGE_CNT]; 578 } __aligned(16); 579 580 struct hisi_sas_command_table_ssp { 581 struct ssp_frame_hdr hdr; 582 union { 583 struct { 584 struct ssp_command_iu task; 585 u32 prot[7]; 586 }; 587 struct ssp_tmf_iu ssp_task; 588 struct xfer_rdy_iu xfer_rdy; 589 struct ssp_response_iu ssp_res; 590 } u; 591 }; 592 593 union hisi_sas_command_table { 594 struct hisi_sas_command_table_ssp ssp; 595 struct hisi_sas_command_table_smp smp; 596 struct hisi_sas_command_table_stp stp; 597 } __aligned(16); 598 599 struct hisi_sas_status_buffer { 600 struct hisi_sas_err_record err; 601 u8 iu[1024]; 602 } __aligned(16); 603 604 struct hisi_sas_slot_buf_table { 605 struct hisi_sas_status_buffer status_buffer; 606 union hisi_sas_command_table command_header; 607 struct hisi_sas_sge_page sge_page; 608 }; 609 610 struct hisi_sas_slot_dif_buf_table { 611 struct hisi_sas_slot_buf_table slot_buf; 612 struct hisi_sas_sge_dif_page sge_dif_page; 613 }; 614 615 extern struct scsi_transport_template *hisi_sas_stt; 616 617 extern bool hisi_sas_debugfs_enable; 618 extern u32 hisi_sas_debugfs_dump_count; 619 extern struct dentry *hisi_sas_debugfs_dir; 620 621 extern void hisi_sas_stop_phys(struct hisi_hba *hisi_hba); 622 extern int hisi_sas_alloc(struct hisi_hba *hisi_hba); 623 extern void hisi_sas_free(struct hisi_hba *hisi_hba); 624 extern u8 hisi_sas_get_ata_protocol(struct host_to_dev_fis *fis, 625 int direction); 626 extern struct hisi_sas_port *to_hisi_sas_port(struct asd_sas_port *sas_port); 627 extern void hisi_sas_sata_done(struct sas_task *task, 628 struct hisi_sas_slot *slot); 629 extern int hisi_sas_get_fw_info(struct hisi_hba *hisi_hba); 630 extern int hisi_sas_probe(struct platform_device *pdev, 631 const struct hisi_sas_hw *ops); 632 extern int hisi_sas_remove(struct platform_device *pdev); 633 634 extern int hisi_sas_slave_configure(struct scsi_device *sdev); 635 extern int hisi_sas_scan_finished(struct Scsi_Host *shost, unsigned long time); 636 extern void hisi_sas_scan_start(struct Scsi_Host *shost); 637 extern int hisi_sas_host_reset(struct Scsi_Host *shost, int reset_type); 638 extern void hisi_sas_phy_enable(struct hisi_hba *hisi_hba, int phy_no, 639 int enable); 640 extern void hisi_sas_phy_down(struct hisi_hba *hisi_hba, int phy_no, int rdy); 641 extern void hisi_sas_slot_task_free(struct hisi_hba *hisi_hba, 642 struct sas_task *task, 643 struct hisi_sas_slot *slot); 644 extern void hisi_sas_init_mem(struct hisi_hba *hisi_hba); 645 extern void hisi_sas_rst_work_handler(struct work_struct *work); 646 extern void hisi_sas_sync_rst_work_handler(struct work_struct *work); 647 extern void hisi_sas_sync_irqs(struct hisi_hba *hisi_hba); 648 extern void hisi_sas_phy_oob_ready(struct hisi_hba *hisi_hba, int phy_no); 649 extern bool hisi_sas_notify_phy_event(struct hisi_sas_phy *phy, 650 enum hisi_sas_phy_event event); 651 extern void hisi_sas_release_tasks(struct hisi_hba *hisi_hba); 652 extern u8 hisi_sas_get_prog_phy_linkrate_mask(enum sas_linkrate max); 653 extern void hisi_sas_controller_reset_prepare(struct hisi_hba *hisi_hba); 654 extern void hisi_sas_controller_reset_done(struct hisi_hba *hisi_hba); 655 #endif 656