1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2008 Cisco Systems, Inc. All rights reserved. 4 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 5 */ 6 #ifndef _VNIC_INTR_H_ 7 #define _VNIC_INTR_H_ 8 9 #include <linux/pci.h> 10 #include "vnic_dev.h" 11 12 /* 13 * These defines avoid symbol clash between fnic and enic (Cisco 10G Eth 14 * Driver) when both are built with CONFIG options =y 15 */ 16 #define vnic_intr_unmask fnic_intr_unmask 17 #define vnic_intr_mask fnic_intr_mask 18 #define vnic_intr_return_credits fnic_intr_return_credits 19 #define vnic_intr_credits fnic_intr_credits 20 #define vnic_intr_return_all_credits fnic_intr_return_all_credits 21 #define vnic_intr_legacy_pba fnic_intr_legacy_pba 22 #define vnic_intr_free fnic_intr_free 23 #define vnic_intr_alloc fnic_intr_alloc 24 #define vnic_intr_init fnic_intr_init 25 #define vnic_intr_clean fnic_intr_clean 26 27 #define VNIC_INTR_TIMER_MAX 0xffff 28 29 #define VNIC_INTR_TIMER_TYPE_ABS 0 30 #define VNIC_INTR_TIMER_TYPE_QUIET 1 31 32 /* Interrupt control */ 33 struct vnic_intr_ctrl { 34 u32 coalescing_timer; /* 0x00 */ 35 u32 pad0; 36 u32 coalescing_value; /* 0x08 */ 37 u32 pad1; 38 u32 coalescing_type; /* 0x10 */ 39 u32 pad2; 40 u32 mask_on_assertion; /* 0x18 */ 41 u32 pad3; 42 u32 mask; /* 0x20 */ 43 u32 pad4; 44 u32 int_credits; /* 0x28 */ 45 u32 pad5; 46 u32 int_credit_return; /* 0x30 */ 47 u32 pad6; 48 }; 49 50 struct vnic_intr { 51 unsigned int index; 52 struct vnic_dev *vdev; 53 struct vnic_intr_ctrl __iomem *ctrl; /* memory-mapped */ 54 }; 55 56 static inline void vnic_intr_unmask(struct vnic_intr *intr) 57 { 58 iowrite32(0, &intr->ctrl->mask); 59 } 60 61 static inline void vnic_intr_mask(struct vnic_intr *intr) 62 { 63 iowrite32(1, &intr->ctrl->mask); 64 } 65 66 static inline void vnic_intr_return_credits(struct vnic_intr *intr, 67 unsigned int credits, int unmask, int reset_timer) 68 { 69 #define VNIC_INTR_UNMASK_SHIFT 16 70 #define VNIC_INTR_RESET_TIMER_SHIFT 17 71 72 u32 int_credit_return = (credits & 0xffff) | 73 (unmask ? (1 << VNIC_INTR_UNMASK_SHIFT) : 0) | 74 (reset_timer ? (1 << VNIC_INTR_RESET_TIMER_SHIFT) : 0); 75 76 iowrite32(int_credit_return, &intr->ctrl->int_credit_return); 77 } 78 79 static inline unsigned int vnic_intr_credits(struct vnic_intr *intr) 80 { 81 return ioread32(&intr->ctrl->int_credits); 82 } 83 84 static inline void vnic_intr_return_all_credits(struct vnic_intr *intr) 85 { 86 unsigned int credits = vnic_intr_credits(intr); 87 int unmask = 1; 88 int reset_timer = 1; 89 90 vnic_intr_return_credits(intr, credits, unmask, reset_timer); 91 } 92 93 static inline u32 vnic_intr_legacy_pba(u32 __iomem *legacy_pba) 94 { 95 /* read PBA without clearing */ 96 return ioread32(legacy_pba); 97 } 98 99 void vnic_intr_free(struct vnic_intr *intr); 100 int vnic_intr_alloc(struct vnic_dev *vdev, struct vnic_intr *intr, 101 unsigned int index); 102 void vnic_intr_init(struct vnic_intr *intr, unsigned int coalescing_timer, 103 unsigned int coalescing_type, unsigned int mask_on_assertion); 104 void vnic_intr_clean(struct vnic_intr *intr); 105 106 #endif /* _VNIC_INTR_H_ */ 107