1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright 2008 Cisco Systems, Inc. All rights reserved. 4 * Copyright 2007 Nuova Systems, Inc. All rights reserved. 5 */ 6 #ifndef _FNIC_IO_H_ 7 #define _FNIC_IO_H_ 8 9 #include <scsi/fc/fc_fcp.h> 10 11 #define FNIC_DFLT_SG_DESC_CNT 32 12 #define FNIC_MAX_SG_DESC_CNT 256 /* Maximum descriptors per sgl */ 13 #define FNIC_SG_DESC_ALIGN 16 /* Descriptor address alignment */ 14 15 struct host_sg_desc { 16 __le64 addr; 17 __le32 len; 18 u32 _resvd; 19 }; 20 21 struct fnic_dflt_sgl_list { 22 struct host_sg_desc sg_desc[FNIC_DFLT_SG_DESC_CNT]; 23 }; 24 25 struct fnic_sgl_list { 26 struct host_sg_desc sg_desc[FNIC_MAX_SG_DESC_CNT]; 27 }; 28 29 enum fnic_sgl_list_type { 30 FNIC_SGL_CACHE_DFLT = 0, /* cache with default size sgl */ 31 FNIC_SGL_CACHE_MAX, /* cache with max size sgl */ 32 FNIC_SGL_NUM_CACHES /* number of sgl caches */ 33 }; 34 35 enum fnic_ioreq_state { 36 FNIC_IOREQ_NOT_INITED = 0, 37 FNIC_IOREQ_CMD_PENDING, 38 FNIC_IOREQ_ABTS_PENDING, 39 FNIC_IOREQ_ABTS_COMPLETE, 40 FNIC_IOREQ_CMD_COMPLETE, 41 }; 42 43 struct fnic_io_req { 44 struct host_sg_desc *sgl_list; /* sgl list */ 45 void *sgl_list_alloc; /* sgl list address used for free */ 46 dma_addr_t sense_buf_pa; /* dma address for sense buffer*/ 47 dma_addr_t sgl_list_pa; /* dma address for sgl list */ 48 u16 sgl_cnt; 49 u8 sgl_type; /* device DMA descriptor list type */ 50 u8 io_completed:1; /* set to 1 when fw completes IO */ 51 u32 port_id; /* remote port DID */ 52 unsigned long start_time; /* in jiffies */ 53 struct completion *abts_done; /* completion for abts */ 54 struct completion *dr_done; /* completion for device reset */ 55 unsigned int tag; 56 struct scsi_cmnd *sc; /* midlayer's cmd pointer */ 57 }; 58 59 enum fnic_port_speeds { 60 DCEM_PORTSPEED_NONE = 0, 61 DCEM_PORTSPEED_1G = 1000, 62 DCEM_PORTSPEED_10G = 10000, 63 DCEM_PORTSPEED_20G = 20000, 64 DCEM_PORTSPEED_25G = 25000, 65 DCEM_PORTSPEED_40G = 40000, 66 DCEM_PORTSPEED_4x10G = 41000, 67 DCEM_PORTSPEED_100G = 100000, 68 }; 69 #endif /* _FNIC_IO_H_ */ 70