1 /* 2 * linux/drivers/scsi/esas2r/esas2r_init.c 3 * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers 4 * 5 * Copyright (c) 2001-2013 ATTO Technology, Inc. 6 * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 2 11 * of the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * NO WARRANTY 19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 23 * solely responsible for determining the appropriateness of using and 24 * distributing the Program and assumes all risks associated with its 25 * exercise of rights under this Agreement, including but not limited to 26 * the risks and costs of program errors, damage to or loss of data, 27 * programs or equipment, and unavailability or interruption of operations. 28 * 29 * DISCLAIMER OF LIABILITY 30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 37 * 38 * You should have received a copy of the GNU General Public License 39 * along with this program; if not, write to the Free Software 40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 41 * USA. 42 */ 43 44 #include "esas2r.h" 45 46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a, 47 struct esas2r_mem_desc *mem_desc, 48 u32 align) 49 { 50 mem_desc->esas2r_param = mem_desc->size + align; 51 mem_desc->virt_addr = NULL; 52 mem_desc->phys_addr = 0; 53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, 54 (size_t)mem_desc-> 55 esas2r_param, 56 (dma_addr_t *)&mem_desc-> 57 phys_addr, 58 GFP_KERNEL); 59 60 if (mem_desc->esas2r_data == NULL) { 61 esas2r_log(ESAS2R_LOG_CRIT, 62 "failed to allocate %lu bytes of consistent memory!", 63 (long 64 unsigned 65 int)mem_desc->esas2r_param); 66 return false; 67 } 68 69 mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align); 70 mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align); 71 memset(mem_desc->virt_addr, 0, mem_desc->size); 72 return true; 73 } 74 75 static void esas2r_initmem_free(struct esas2r_adapter *a, 76 struct esas2r_mem_desc *mem_desc) 77 { 78 if (mem_desc->virt_addr == NULL) 79 return; 80 81 /* 82 * Careful! phys_addr and virt_addr may have been adjusted from the 83 * original allocation in order to return the desired alignment. That 84 * means we have to use the original address (in esas2r_data) and size 85 * (esas2r_param) and calculate the original physical address based on 86 * the difference between the requested and actual allocation size. 87 */ 88 if (mem_desc->phys_addr) { 89 int unalign = ((u8 *)mem_desc->virt_addr) - 90 ((u8 *)mem_desc->esas2r_data); 91 92 dma_free_coherent(&a->pcid->dev, 93 (size_t)mem_desc->esas2r_param, 94 mem_desc->esas2r_data, 95 (dma_addr_t)(mem_desc->phys_addr - unalign)); 96 } else { 97 kfree(mem_desc->esas2r_data); 98 } 99 100 mem_desc->virt_addr = NULL; 101 } 102 103 static bool alloc_vda_req(struct esas2r_adapter *a, 104 struct esas2r_request *rq) 105 { 106 struct esas2r_mem_desc *memdesc = kzalloc( 107 sizeof(struct esas2r_mem_desc), GFP_KERNEL); 108 109 if (memdesc == NULL) { 110 esas2r_hdebug("could not alloc mem for vda request memdesc\n"); 111 return false; 112 } 113 114 memdesc->size = sizeof(union atto_vda_req) + 115 ESAS2R_DATA_BUF_LEN; 116 117 if (!esas2r_initmem_alloc(a, memdesc, 256)) { 118 esas2r_hdebug("could not alloc mem for vda request\n"); 119 kfree(memdesc); 120 return false; 121 } 122 123 a->num_vrqs++; 124 list_add(&memdesc->next_desc, &a->vrq_mds_head); 125 126 rq->vrq_md = memdesc; 127 rq->vrq = (union atto_vda_req *)memdesc->virt_addr; 128 rq->vrq->scsi.handle = a->num_vrqs; 129 130 return true; 131 } 132 133 static void esas2r_unmap_regions(struct esas2r_adapter *a) 134 { 135 if (a->regs) 136 iounmap((void __iomem *)a->regs); 137 138 a->regs = NULL; 139 140 pci_release_region(a->pcid, 2); 141 142 if (a->data_window) 143 iounmap((void __iomem *)a->data_window); 144 145 a->data_window = NULL; 146 147 pci_release_region(a->pcid, 0); 148 } 149 150 static int esas2r_map_regions(struct esas2r_adapter *a) 151 { 152 int error; 153 154 a->regs = NULL; 155 a->data_window = NULL; 156 157 error = pci_request_region(a->pcid, 2, a->name); 158 if (error != 0) { 159 esas2r_log(ESAS2R_LOG_CRIT, 160 "pci_request_region(2) failed, error %d", 161 error); 162 163 return error; 164 } 165 166 a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2), 167 pci_resource_len(a->pcid, 2)); 168 if (a->regs == NULL) { 169 esas2r_log(ESAS2R_LOG_CRIT, 170 "ioremap failed for regs mem region\n"); 171 pci_release_region(a->pcid, 2); 172 return -EFAULT; 173 } 174 175 error = pci_request_region(a->pcid, 0, a->name); 176 if (error != 0) { 177 esas2r_log(ESAS2R_LOG_CRIT, 178 "pci_request_region(2) failed, error %d", 179 error); 180 esas2r_unmap_regions(a); 181 return error; 182 } 183 184 a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid, 185 0), 186 pci_resource_len(a->pcid, 0)); 187 if (a->data_window == NULL) { 188 esas2r_log(ESAS2R_LOG_CRIT, 189 "ioremap failed for data_window mem region\n"); 190 esas2r_unmap_regions(a); 191 return -EFAULT; 192 } 193 194 return 0; 195 } 196 197 static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode) 198 { 199 int i; 200 201 /* Set up interrupt mode based on the requested value */ 202 switch (intr_mode) { 203 case INTR_MODE_LEGACY: 204 use_legacy_interrupts: 205 a->intr_mode = INTR_MODE_LEGACY; 206 break; 207 208 case INTR_MODE_MSI: 209 i = pci_enable_msi(a->pcid); 210 if (i != 0) { 211 esas2r_log(ESAS2R_LOG_WARN, 212 "failed to enable MSI for adapter %d, " 213 "falling back to legacy interrupts " 214 "(err=%d)", a->index, 215 i); 216 goto use_legacy_interrupts; 217 } 218 a->intr_mode = INTR_MODE_MSI; 219 set_bit(AF2_MSI_ENABLED, &a->flags2); 220 break; 221 222 223 default: 224 esas2r_log(ESAS2R_LOG_WARN, 225 "unknown interrupt_mode %d requested, " 226 "falling back to legacy interrupt", 227 interrupt_mode); 228 goto use_legacy_interrupts; 229 } 230 } 231 232 static void esas2r_claim_interrupts(struct esas2r_adapter *a) 233 { 234 unsigned long flags = 0; 235 236 if (a->intr_mode == INTR_MODE_LEGACY) 237 flags |= IRQF_SHARED; 238 239 esas2r_log(ESAS2R_LOG_INFO, 240 "esas2r_claim_interrupts irq=%d (%p, %s, %lx)", 241 a->pcid->irq, a, a->name, flags); 242 243 if (request_irq(a->pcid->irq, 244 (a->intr_mode == 245 INTR_MODE_LEGACY) ? esas2r_interrupt : 246 esas2r_msi_interrupt, 247 flags, 248 a->name, 249 a)) { 250 esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X", 251 a->pcid->irq); 252 return; 253 } 254 255 set_bit(AF2_IRQ_CLAIMED, &a->flags2); 256 esas2r_log(ESAS2R_LOG_INFO, 257 "claimed IRQ %d flags: 0x%lx", 258 a->pcid->irq, flags); 259 } 260 261 int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid, 262 int index) 263 { 264 struct esas2r_adapter *a; 265 u64 bus_addr = 0; 266 int i; 267 void *next_uncached; 268 struct esas2r_request *first_request, *last_request; 269 270 if (index >= MAX_ADAPTERS) { 271 esas2r_log(ESAS2R_LOG_CRIT, 272 "tried to init invalid adapter index %u!", 273 index); 274 return 0; 275 } 276 277 if (esas2r_adapters[index]) { 278 esas2r_log(ESAS2R_LOG_CRIT, 279 "tried to init existing adapter index %u!", 280 index); 281 return 0; 282 } 283 284 a = (struct esas2r_adapter *)host->hostdata; 285 memset(a, 0, sizeof(struct esas2r_adapter)); 286 a->pcid = pcid; 287 a->host = host; 288 289 if (sizeof(dma_addr_t) > 4) { 290 const uint64_t required_mask = dma_get_required_mask 291 (&pcid->dev); 292 if (required_mask > DMA_BIT_MASK(32) 293 && !pci_set_dma_mask(pcid, DMA_BIT_MASK(64)) 294 && !pci_set_consistent_dma_mask(pcid, 295 DMA_BIT_MASK(64))) { 296 esas2r_log_dev(ESAS2R_LOG_INFO, 297 &(a->pcid->dev), 298 "64-bit PCI addressing enabled\n"); 299 } else if (!pci_set_dma_mask(pcid, DMA_BIT_MASK(32)) 300 && !pci_set_consistent_dma_mask(pcid, 301 DMA_BIT_MASK(32))) { 302 esas2r_log_dev(ESAS2R_LOG_INFO, 303 &(a->pcid->dev), 304 "32-bit PCI addressing enabled\n"); 305 } else { 306 esas2r_log(ESAS2R_LOG_CRIT, 307 "failed to set DMA mask"); 308 esas2r_kill_adapter(index); 309 return 0; 310 } 311 } else { 312 if (!pci_set_dma_mask(pcid, DMA_BIT_MASK(32)) 313 && !pci_set_consistent_dma_mask(pcid, 314 DMA_BIT_MASK(32))) { 315 esas2r_log_dev(ESAS2R_LOG_INFO, 316 &(a->pcid->dev), 317 "32-bit PCI addressing enabled\n"); 318 } else { 319 esas2r_log(ESAS2R_LOG_CRIT, 320 "failed to set DMA mask"); 321 esas2r_kill_adapter(index); 322 return 0; 323 } 324 } 325 esas2r_adapters[index] = a; 326 sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index); 327 esas2r_debug("new adapter %p, name %s", a, a->name); 328 spin_lock_init(&a->request_lock); 329 spin_lock_init(&a->fw_event_lock); 330 mutex_init(&a->fm_api_mutex); 331 mutex_init(&a->fs_api_mutex); 332 sema_init(&a->nvram_semaphore, 1); 333 334 esas2r_fw_event_off(a); 335 snprintf(a->fw_event_q_name, ESAS2R_KOBJ_NAME_LEN, "esas2r/%d", 336 a->index); 337 a->fw_event_q = create_singlethread_workqueue(a->fw_event_q_name); 338 339 init_waitqueue_head(&a->buffered_ioctl_waiter); 340 init_waitqueue_head(&a->nvram_waiter); 341 init_waitqueue_head(&a->fm_api_waiter); 342 init_waitqueue_head(&a->fs_api_waiter); 343 init_waitqueue_head(&a->vda_waiter); 344 345 INIT_LIST_HEAD(&a->general_req.req_list); 346 INIT_LIST_HEAD(&a->active_list); 347 INIT_LIST_HEAD(&a->defer_list); 348 INIT_LIST_HEAD(&a->free_sg_list_head); 349 INIT_LIST_HEAD(&a->avail_request); 350 INIT_LIST_HEAD(&a->vrq_mds_head); 351 INIT_LIST_HEAD(&a->fw_event_list); 352 353 first_request = (struct esas2r_request *)((u8 *)(a + 1)); 354 355 for (last_request = first_request, i = 1; i < num_requests; 356 last_request++, i++) { 357 INIT_LIST_HEAD(&last_request->req_list); 358 list_add_tail(&last_request->comp_list, &a->avail_request); 359 if (!alloc_vda_req(a, last_request)) { 360 esas2r_log(ESAS2R_LOG_CRIT, 361 "failed to allocate a VDA request!"); 362 esas2r_kill_adapter(index); 363 return 0; 364 } 365 } 366 367 esas2r_debug("requests: %p to %p (%d, %d)", first_request, 368 last_request, 369 sizeof(*first_request), 370 num_requests); 371 372 if (esas2r_map_regions(a) != 0) { 373 esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!"); 374 esas2r_kill_adapter(index); 375 return 0; 376 } 377 378 a->index = index; 379 380 /* interrupts will be disabled until we are done with init */ 381 atomic_inc(&a->dis_ints_cnt); 382 atomic_inc(&a->disable_cnt); 383 set_bit(AF_CHPRST_PENDING, &a->flags); 384 set_bit(AF_DISC_PENDING, &a->flags); 385 set_bit(AF_FIRST_INIT, &a->flags); 386 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 387 388 a->init_msg = ESAS2R_INIT_MSG_START; 389 a->max_vdareq_size = 128; 390 a->build_sgl = esas2r_build_sg_list_sge; 391 392 esas2r_setup_interrupts(a, interrupt_mode); 393 394 a->uncached_size = esas2r_get_uncached_size(a); 395 a->uncached = dma_alloc_coherent(&pcid->dev, 396 (size_t)a->uncached_size, 397 (dma_addr_t *)&bus_addr, 398 GFP_KERNEL); 399 if (a->uncached == NULL) { 400 esas2r_log(ESAS2R_LOG_CRIT, 401 "failed to allocate %d bytes of consistent memory!", 402 a->uncached_size); 403 esas2r_kill_adapter(index); 404 return 0; 405 } 406 407 a->uncached_phys = bus_addr; 408 409 esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)", 410 a->uncached_size, 411 a->uncached, 412 upper_32_bits(bus_addr), 413 lower_32_bits(bus_addr)); 414 memset(a->uncached, 0, a->uncached_size); 415 next_uncached = a->uncached; 416 417 if (!esas2r_init_adapter_struct(a, 418 &next_uncached)) { 419 esas2r_log(ESAS2R_LOG_CRIT, 420 "failed to initialize adapter structure (2)!"); 421 esas2r_kill_adapter(index); 422 return 0; 423 } 424 425 tasklet_init(&a->tasklet, 426 esas2r_adapter_tasklet, 427 (unsigned long)a); 428 429 /* 430 * Disable chip interrupts to prevent spurious interrupts 431 * until we claim the IRQ. 432 */ 433 esas2r_disable_chip_interrupts(a); 434 esas2r_check_adapter(a); 435 436 if (!esas2r_init_adapter_hw(a, true)) 437 esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!"); 438 else 439 esas2r_debug("esas2r_init_adapter ok"); 440 441 esas2r_claim_interrupts(a); 442 443 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) 444 esas2r_enable_chip_interrupts(a); 445 446 set_bit(AF2_INIT_DONE, &a->flags2); 447 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) 448 esas2r_kickoff_timer(a); 449 esas2r_debug("esas2r_init_adapter done for %p (%d)", 450 a, a->disable_cnt); 451 452 return 1; 453 } 454 455 static void esas2r_adapter_power_down(struct esas2r_adapter *a, 456 int power_management) 457 { 458 struct esas2r_mem_desc *memdesc, *next; 459 460 if ((test_bit(AF2_INIT_DONE, &a->flags2)) 461 && (!test_bit(AF_DEGRADED_MODE, &a->flags))) { 462 if (!power_management) { 463 del_timer_sync(&a->timer); 464 tasklet_kill(&a->tasklet); 465 } 466 esas2r_power_down(a); 467 468 /* 469 * There are versions of firmware that do not handle the sync 470 * cache command correctly. Stall here to ensure that the 471 * cache is lazily flushed. 472 */ 473 mdelay(500); 474 esas2r_debug("chip halted"); 475 } 476 477 /* Remove sysfs binary files */ 478 if (a->sysfs_fw_created) { 479 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw); 480 a->sysfs_fw_created = 0; 481 } 482 483 if (a->sysfs_fs_created) { 484 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs); 485 a->sysfs_fs_created = 0; 486 } 487 488 if (a->sysfs_vda_created) { 489 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda); 490 a->sysfs_vda_created = 0; 491 } 492 493 if (a->sysfs_hw_created) { 494 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw); 495 a->sysfs_hw_created = 0; 496 } 497 498 if (a->sysfs_live_nvram_created) { 499 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 500 &bin_attr_live_nvram); 501 a->sysfs_live_nvram_created = 0; 502 } 503 504 if (a->sysfs_default_nvram_created) { 505 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 506 &bin_attr_default_nvram); 507 a->sysfs_default_nvram_created = 0; 508 } 509 510 /* Clean up interrupts */ 511 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 512 esas2r_log_dev(ESAS2R_LOG_INFO, 513 &(a->pcid->dev), 514 "free_irq(%d) called", a->pcid->irq); 515 516 free_irq(a->pcid->irq, a); 517 esas2r_debug("IRQ released"); 518 clear_bit(AF2_IRQ_CLAIMED, &a->flags2); 519 } 520 521 if (test_bit(AF2_MSI_ENABLED, &a->flags2)) { 522 pci_disable_msi(a->pcid); 523 clear_bit(AF2_MSI_ENABLED, &a->flags2); 524 esas2r_debug("MSI disabled"); 525 } 526 527 if (a->inbound_list_md.virt_addr) 528 esas2r_initmem_free(a, &a->inbound_list_md); 529 530 if (a->outbound_list_md.virt_addr) 531 esas2r_initmem_free(a, &a->outbound_list_md); 532 533 list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head, 534 next_desc) { 535 esas2r_initmem_free(a, memdesc); 536 } 537 538 /* Following frees everything allocated via alloc_vda_req */ 539 list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) { 540 esas2r_initmem_free(a, memdesc); 541 list_del(&memdesc->next_desc); 542 kfree(memdesc); 543 } 544 545 kfree(a->first_ae_req); 546 a->first_ae_req = NULL; 547 548 kfree(a->sg_list_mds); 549 a->sg_list_mds = NULL; 550 551 kfree(a->req_table); 552 a->req_table = NULL; 553 554 if (a->regs) { 555 esas2r_unmap_regions(a); 556 a->regs = NULL; 557 a->data_window = NULL; 558 esas2r_debug("regions unmapped"); 559 } 560 } 561 562 /* Release/free allocated resources for specified adapters. */ 563 void esas2r_kill_adapter(int i) 564 { 565 struct esas2r_adapter *a = esas2r_adapters[i]; 566 567 if (a) { 568 unsigned long flags; 569 struct workqueue_struct *wq; 570 esas2r_debug("killing adapter %p [%d] ", a, i); 571 esas2r_fw_event_off(a); 572 esas2r_adapter_power_down(a, 0); 573 if (esas2r_buffered_ioctl && 574 (a->pcid == esas2r_buffered_ioctl_pcid)) { 575 dma_free_coherent(&a->pcid->dev, 576 (size_t)esas2r_buffered_ioctl_size, 577 esas2r_buffered_ioctl, 578 esas2r_buffered_ioctl_addr); 579 esas2r_buffered_ioctl = NULL; 580 } 581 582 if (a->vda_buffer) { 583 dma_free_coherent(&a->pcid->dev, 584 (size_t)VDA_MAX_BUFFER_SIZE, 585 a->vda_buffer, 586 (dma_addr_t)a->ppvda_buffer); 587 a->vda_buffer = NULL; 588 } 589 if (a->fs_api_buffer) { 590 dma_free_coherent(&a->pcid->dev, 591 (size_t)a->fs_api_buffer_size, 592 a->fs_api_buffer, 593 (dma_addr_t)a->ppfs_api_buffer); 594 a->fs_api_buffer = NULL; 595 } 596 597 kfree(a->local_atto_ioctl); 598 a->local_atto_ioctl = NULL; 599 600 spin_lock_irqsave(&a->fw_event_lock, flags); 601 wq = a->fw_event_q; 602 a->fw_event_q = NULL; 603 spin_unlock_irqrestore(&a->fw_event_lock, flags); 604 if (wq) 605 destroy_workqueue(wq); 606 607 if (a->uncached) { 608 dma_free_coherent(&a->pcid->dev, 609 (size_t)a->uncached_size, 610 a->uncached, 611 (dma_addr_t)a->uncached_phys); 612 a->uncached = NULL; 613 esas2r_debug("uncached area freed"); 614 } 615 616 esas2r_log_dev(ESAS2R_LOG_INFO, 617 &(a->pcid->dev), 618 "pci_disable_device() called. msix_enabled: %d " 619 "msi_enabled: %d irq: %d pin: %d", 620 a->pcid->msix_enabled, 621 a->pcid->msi_enabled, 622 a->pcid->irq, 623 a->pcid->pin); 624 625 esas2r_log_dev(ESAS2R_LOG_INFO, 626 &(a->pcid->dev), 627 "before pci_disable_device() enable_cnt: %d", 628 a->pcid->enable_cnt.counter); 629 630 pci_disable_device(a->pcid); 631 esas2r_log_dev(ESAS2R_LOG_INFO, 632 &(a->pcid->dev), 633 "after pci_disable_device() enable_cnt: %d", 634 a->pcid->enable_cnt.counter); 635 636 esas2r_log_dev(ESAS2R_LOG_INFO, 637 &(a->pcid->dev), 638 "pci_set_drv_data(%p, NULL) called", 639 a->pcid); 640 641 pci_set_drvdata(a->pcid, NULL); 642 esas2r_adapters[i] = NULL; 643 644 if (test_bit(AF2_INIT_DONE, &a->flags2)) { 645 clear_bit(AF2_INIT_DONE, &a->flags2); 646 647 set_bit(AF_DEGRADED_MODE, &a->flags); 648 649 esas2r_log_dev(ESAS2R_LOG_INFO, 650 &(a->host->shost_gendev), 651 "scsi_remove_host() called"); 652 653 scsi_remove_host(a->host); 654 655 esas2r_log_dev(ESAS2R_LOG_INFO, 656 &(a->host->shost_gendev), 657 "scsi_host_put() called"); 658 659 scsi_host_put(a->host); 660 } 661 } 662 } 663 664 int esas2r_suspend(struct pci_dev *pdev, pm_message_t state) 665 { 666 struct Scsi_Host *host = pci_get_drvdata(pdev); 667 u32 device_state; 668 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 669 670 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "suspending adapter()"); 671 if (!a) 672 return -ENODEV; 673 674 esas2r_adapter_power_down(a, 1); 675 device_state = pci_choose_state(pdev, state); 676 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 677 "pci_save_state() called"); 678 pci_save_state(pdev); 679 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 680 "pci_disable_device() called"); 681 pci_disable_device(pdev); 682 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 683 "pci_set_power_state() called"); 684 pci_set_power_state(pdev, device_state); 685 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "esas2r_suspend(): 0"); 686 return 0; 687 } 688 689 int esas2r_resume(struct pci_dev *pdev) 690 { 691 struct Scsi_Host *host = pci_get_drvdata(pdev); 692 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 693 int rez; 694 695 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "resuming adapter()"); 696 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 697 "pci_set_power_state(PCI_D0) " 698 "called"); 699 pci_set_power_state(pdev, PCI_D0); 700 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 701 "pci_enable_wake(PCI_D0, 0) " 702 "called"); 703 pci_enable_wake(pdev, PCI_D0, 0); 704 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 705 "pci_restore_state() called"); 706 pci_restore_state(pdev); 707 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 708 "pci_enable_device() called"); 709 rez = pci_enable_device(pdev); 710 pci_set_master(pdev); 711 712 if (!a) { 713 rez = -ENODEV; 714 goto error_exit; 715 } 716 717 if (esas2r_map_regions(a) != 0) { 718 esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!"); 719 rez = -ENOMEM; 720 goto error_exit; 721 } 722 723 /* Set up interupt mode */ 724 esas2r_setup_interrupts(a, a->intr_mode); 725 726 /* 727 * Disable chip interrupts to prevent spurious interrupts until we 728 * claim the IRQ. 729 */ 730 esas2r_disable_chip_interrupts(a); 731 if (!esas2r_power_up(a, true)) { 732 esas2r_debug("yikes, esas2r_power_up failed"); 733 rez = -ENOMEM; 734 goto error_exit; 735 } 736 737 esas2r_claim_interrupts(a); 738 739 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 740 /* 741 * Now that system interrupt(s) are claimed, we can enable 742 * chip interrupts. 743 */ 744 esas2r_enable_chip_interrupts(a); 745 esas2r_kickoff_timer(a); 746 } else { 747 esas2r_debug("yikes, unable to claim IRQ"); 748 esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!"); 749 rez = -ENOMEM; 750 goto error_exit; 751 } 752 753 error_exit: 754 esas2r_log_dev(ESAS2R_LOG_CRIT, &(pdev->dev), "esas2r_resume(): %d", 755 rez); 756 return rez; 757 } 758 759 bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str) 760 { 761 set_bit(AF_DEGRADED_MODE, &a->flags); 762 esas2r_log(ESAS2R_LOG_CRIT, 763 "setting adapter to degraded mode: %s\n", error_str); 764 return false; 765 } 766 767 u32 esas2r_get_uncached_size(struct esas2r_adapter *a) 768 { 769 return sizeof(struct esas2r_sas_nvram) 770 + ALIGN(ESAS2R_DISC_BUF_LEN, 8) 771 + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */ 772 + 8 773 + (num_sg_lists * (u16)sgl_page_size) 774 + ALIGN((num_requests + num_ae_requests + 1 + 775 ESAS2R_LIST_EXTRA) * 776 sizeof(struct esas2r_inbound_list_source_entry), 777 8) 778 + ALIGN((num_requests + num_ae_requests + 1 + 779 ESAS2R_LIST_EXTRA) * 780 sizeof(struct atto_vda_ob_rsp), 8) 781 + 256; /* VDA request and buffer align */ 782 } 783 784 static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a) 785 { 786 int pcie_cap_reg; 787 788 pcie_cap_reg = pci_find_capability(a->pcid, PCI_CAP_ID_EXP); 789 if (pcie_cap_reg) { 790 u16 devcontrol; 791 792 pci_read_config_word(a->pcid, pcie_cap_reg + PCI_EXP_DEVCTL, 793 &devcontrol); 794 795 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 796 PCI_EXP_DEVCTL_READRQ_512B) { 797 esas2r_log(ESAS2R_LOG_INFO, 798 "max read request size > 512B"); 799 800 devcontrol &= ~PCI_EXP_DEVCTL_READRQ; 801 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B; 802 pci_write_config_word(a->pcid, 803 pcie_cap_reg + PCI_EXP_DEVCTL, 804 devcontrol); 805 } 806 } 807 } 808 809 /* 810 * Determine the organization of the uncached data area and 811 * finish initializing the adapter structure 812 */ 813 bool esas2r_init_adapter_struct(struct esas2r_adapter *a, 814 void **uncached_area) 815 { 816 u32 i; 817 u8 *high; 818 struct esas2r_inbound_list_source_entry *element; 819 struct esas2r_request *rq; 820 struct esas2r_mem_desc *sgl; 821 822 spin_lock_init(&a->sg_list_lock); 823 spin_lock_init(&a->mem_lock); 824 spin_lock_init(&a->queue_lock); 825 826 a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS]; 827 828 if (!alloc_vda_req(a, &a->general_req)) { 829 esas2r_hdebug( 830 "failed to allocate a VDA request for the general req!"); 831 return false; 832 } 833 834 /* allocate requests for asynchronous events */ 835 a->first_ae_req = 836 kcalloc(num_ae_requests, sizeof(struct esas2r_request), 837 GFP_KERNEL); 838 839 if (a->first_ae_req == NULL) { 840 esas2r_log(ESAS2R_LOG_CRIT, 841 "failed to allocate memory for asynchronous events"); 842 return false; 843 } 844 845 /* allocate the S/G list memory descriptors */ 846 a->sg_list_mds = kcalloc(num_sg_lists, sizeof(struct esas2r_mem_desc), 847 GFP_KERNEL); 848 849 if (a->sg_list_mds == NULL) { 850 esas2r_log(ESAS2R_LOG_CRIT, 851 "failed to allocate memory for s/g list descriptors"); 852 return false; 853 } 854 855 /* allocate the request table */ 856 a->req_table = 857 kcalloc(num_requests + num_ae_requests + 1, 858 sizeof(struct esas2r_request *), 859 GFP_KERNEL); 860 861 if (a->req_table == NULL) { 862 esas2r_log(ESAS2R_LOG_CRIT, 863 "failed to allocate memory for the request table"); 864 return false; 865 } 866 867 /* initialize PCI configuration space */ 868 esas2r_init_pci_cfg_space(a); 869 870 /* 871 * the thunder_stream boards all have a serial flash part that has a 872 * different base address on the AHB bus. 873 */ 874 if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID) 875 && (a->pcid->subsystem_device & ATTO_SSDID_TBT)) 876 a->flags2 |= AF2_THUNDERBOLT; 877 878 if (test_bit(AF2_THUNDERBOLT, &a->flags2)) 879 a->flags2 |= AF2_SERIAL_FLASH; 880 881 if (a->pcid->subsystem_device == ATTO_TLSH_1068) 882 a->flags2 |= AF2_THUNDERLINK; 883 884 /* Uncached Area */ 885 high = (u8 *)*uncached_area; 886 887 /* initialize the scatter/gather table pages */ 888 889 for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) { 890 sgl->size = sgl_page_size; 891 892 list_add_tail(&sgl->next_desc, &a->free_sg_list_head); 893 894 if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) { 895 /* Allow the driver to load if the minimum count met. */ 896 if (i < NUM_SGL_MIN) 897 return false; 898 break; 899 } 900 } 901 902 /* compute the size of the lists */ 903 a->list_size = num_requests + ESAS2R_LIST_EXTRA; 904 905 /* allocate the inbound list */ 906 a->inbound_list_md.size = a->list_size * 907 sizeof(struct 908 esas2r_inbound_list_source_entry); 909 910 if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) { 911 esas2r_hdebug("failed to allocate IB list"); 912 return false; 913 } 914 915 /* allocate the outbound list */ 916 a->outbound_list_md.size = a->list_size * 917 sizeof(struct atto_vda_ob_rsp); 918 919 if (!esas2r_initmem_alloc(a, &a->outbound_list_md, 920 ESAS2R_LIST_ALIGN)) { 921 esas2r_hdebug("failed to allocate IB list"); 922 return false; 923 } 924 925 /* allocate the NVRAM structure */ 926 a->nvram = (struct esas2r_sas_nvram *)high; 927 high += sizeof(struct esas2r_sas_nvram); 928 929 /* allocate the discovery buffer */ 930 a->disc_buffer = high; 931 high += ESAS2R_DISC_BUF_LEN; 932 high = PTR_ALIGN(high, 8); 933 934 /* allocate the outbound list copy pointer */ 935 a->outbound_copy = (u32 volatile *)high; 936 high += sizeof(u32); 937 938 if (!test_bit(AF_NVR_VALID, &a->flags)) 939 esas2r_nvram_set_defaults(a); 940 941 /* update the caller's uncached memory area pointer */ 942 *uncached_area = (void *)high; 943 944 /* initialize the allocated memory */ 945 if (test_bit(AF_FIRST_INIT, &a->flags)) { 946 esas2r_targ_db_initialize(a); 947 948 /* prime parts of the inbound list */ 949 element = 950 (struct esas2r_inbound_list_source_entry *)a-> 951 inbound_list_md. 952 virt_addr; 953 954 for (i = 0; i < a->list_size; i++) { 955 element->address = 0; 956 element->reserved = 0; 957 element->length = cpu_to_le32(HWILSE_INTERFACE_F0 958 | (sizeof(union 959 atto_vda_req) 960 / 961 sizeof(u32))); 962 element++; 963 } 964 965 /* init the AE requests */ 966 for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++, 967 i++) { 968 INIT_LIST_HEAD(&rq->req_list); 969 if (!alloc_vda_req(a, rq)) { 970 esas2r_hdebug( 971 "failed to allocate a VDA request!"); 972 return false; 973 } 974 975 esas2r_rq_init_request(rq, a); 976 977 /* override the completion function */ 978 rq->comp_cb = esas2r_ae_complete; 979 } 980 } 981 982 return true; 983 } 984 985 /* This code will verify that the chip is operational. */ 986 bool esas2r_check_adapter(struct esas2r_adapter *a) 987 { 988 u32 starttime; 989 u32 doorbell; 990 u64 ppaddr; 991 u32 dw; 992 993 /* 994 * if the chip reset detected flag is set, we can bypass a bunch of 995 * stuff. 996 */ 997 if (test_bit(AF_CHPRST_DETECTED, &a->flags)) 998 goto skip_chip_reset; 999 1000 /* 1001 * BEFORE WE DO ANYTHING, disable the chip interrupts! the boot driver 1002 * may have left them enabled or we may be recovering from a fault. 1003 */ 1004 esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK); 1005 esas2r_flush_register_dword(a, MU_INT_MASK_OUT); 1006 1007 /* 1008 * wait for the firmware to become ready by forcing an interrupt and 1009 * waiting for a response. 1010 */ 1011 starttime = jiffies_to_msecs(jiffies); 1012 1013 while (true) { 1014 esas2r_force_interrupt(a); 1015 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1016 if (doorbell == 0xFFFFFFFF) { 1017 /* 1018 * Give the firmware up to two seconds to enable 1019 * register access after a reset. 1020 */ 1021 if ((jiffies_to_msecs(jiffies) - starttime) > 2000) 1022 return esas2r_set_degraded_mode(a, 1023 "unable to access registers"); 1024 } else if (doorbell & DRBL_FORCE_INT) { 1025 u32 ver = (doorbell & DRBL_FW_VER_MSK); 1026 1027 /* 1028 * This driver supports version 0 and version 1 of 1029 * the API 1030 */ 1031 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1032 doorbell); 1033 1034 if (ver == DRBL_FW_VER_0) { 1035 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 1036 1037 a->max_vdareq_size = 128; 1038 a->build_sgl = esas2r_build_sg_list_sge; 1039 } else if (ver == DRBL_FW_VER_1) { 1040 clear_bit(AF_LEGACY_SGE_MODE, &a->flags); 1041 1042 a->max_vdareq_size = 1024; 1043 a->build_sgl = esas2r_build_sg_list_prd; 1044 } else { 1045 return esas2r_set_degraded_mode(a, 1046 "unknown firmware version"); 1047 } 1048 break; 1049 } 1050 1051 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1052 1053 if ((jiffies_to_msecs(jiffies) - starttime) > 180000) { 1054 esas2r_hdebug("FW ready TMO"); 1055 esas2r_bugon(); 1056 1057 return esas2r_set_degraded_mode(a, 1058 "firmware start has timed out"); 1059 } 1060 } 1061 1062 /* purge any asynchronous events since we will repost them later */ 1063 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN); 1064 starttime = jiffies_to_msecs(jiffies); 1065 1066 while (true) { 1067 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1068 if (doorbell & DRBL_MSG_IFC_DOWN) { 1069 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1070 doorbell); 1071 break; 1072 } 1073 1074 schedule_timeout_interruptible(msecs_to_jiffies(50)); 1075 1076 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1077 esas2r_hdebug("timeout waiting for interface down"); 1078 break; 1079 } 1080 } 1081 skip_chip_reset: 1082 /* 1083 * first things first, before we go changing any of these registers 1084 * disable the communication lists. 1085 */ 1086 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1087 dw &= ~MU_ILC_ENABLE; 1088 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1089 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1090 dw &= ~MU_OLC_ENABLE; 1091 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1092 1093 /* configure the communication list addresses */ 1094 ppaddr = a->inbound_list_md.phys_addr; 1095 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO, 1096 lower_32_bits(ppaddr)); 1097 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI, 1098 upper_32_bits(ppaddr)); 1099 ppaddr = a->outbound_list_md.phys_addr; 1100 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO, 1101 lower_32_bits(ppaddr)); 1102 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI, 1103 upper_32_bits(ppaddr)); 1104 ppaddr = a->uncached_phys + 1105 ((u8 *)a->outbound_copy - a->uncached); 1106 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO, 1107 lower_32_bits(ppaddr)); 1108 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI, 1109 upper_32_bits(ppaddr)); 1110 1111 /* reset the read and write pointers */ 1112 *a->outbound_copy = 1113 a->last_write = 1114 a->last_read = a->list_size - 1; 1115 set_bit(AF_COMM_LIST_TOGGLE, &a->flags); 1116 esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE | 1117 a->last_write); 1118 esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE | 1119 a->last_write); 1120 esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE | 1121 a->last_write); 1122 esas2r_write_register_dword(a, MU_OUT_LIST_WRITE, 1123 MU_OLW_TOGGLE | a->last_write); 1124 1125 /* configure the interface select fields */ 1126 dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG); 1127 dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST); 1128 esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG, 1129 (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR)); 1130 dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG); 1131 dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE); 1132 esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG, 1133 (dw | MU_OLIC_LIST_F0 | 1134 MU_OLIC_SOURCE_DDR)); 1135 1136 /* finish configuring the communication lists */ 1137 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1138 dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK); 1139 dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC 1140 | (a->list_size << MU_ILC_NUMBER_SHIFT); 1141 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1142 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1143 dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK); 1144 dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT); 1145 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1146 1147 /* 1148 * notify the firmware that we're done setting up the communication 1149 * list registers. wait here until the firmware is done configuring 1150 * its lists. it will signal that it is done by enabling the lists. 1151 */ 1152 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT); 1153 starttime = jiffies_to_msecs(jiffies); 1154 1155 while (true) { 1156 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1157 if (doorbell & DRBL_MSG_IFC_INIT) { 1158 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1159 doorbell); 1160 break; 1161 } 1162 1163 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1164 1165 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1166 esas2r_hdebug( 1167 "timeout waiting for communication list init"); 1168 esas2r_bugon(); 1169 return esas2r_set_degraded_mode(a, 1170 "timeout waiting for communication list init"); 1171 } 1172 } 1173 1174 /* 1175 * flag whether the firmware supports the power down doorbell. we 1176 * determine this by reading the inbound doorbell enable mask. 1177 */ 1178 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB); 1179 if (doorbell & DRBL_POWER_DOWN) 1180 set_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1181 else 1182 clear_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1183 1184 /* 1185 * enable assertion of outbound queue and doorbell interrupts in the 1186 * main interrupt cause register. 1187 */ 1188 esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK); 1189 esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK); 1190 return true; 1191 } 1192 1193 /* Process the initialization message just completed and format the next one. */ 1194 static bool esas2r_format_init_msg(struct esas2r_adapter *a, 1195 struct esas2r_request *rq) 1196 { 1197 u32 msg = a->init_msg; 1198 struct atto_vda_cfg_init *ci; 1199 1200 a->init_msg = 0; 1201 1202 switch (msg) { 1203 case ESAS2R_INIT_MSG_START: 1204 case ESAS2R_INIT_MSG_REINIT: 1205 { 1206 esas2r_hdebug("CFG init"); 1207 esas2r_build_cfg_req(a, 1208 rq, 1209 VDA_CFG_INIT, 1210 0, 1211 NULL); 1212 ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init; 1213 ci->sgl_page_size = cpu_to_le32(sgl_page_size); 1214 /* firmware interface overflows in y2106 */ 1215 ci->epoch_time = cpu_to_le32(ktime_get_real_seconds()); 1216 rq->flags |= RF_FAILURE_OK; 1217 a->init_msg = ESAS2R_INIT_MSG_INIT; 1218 break; 1219 } 1220 1221 case ESAS2R_INIT_MSG_INIT: 1222 if (rq->req_stat == RS_SUCCESS) { 1223 u32 major; 1224 u32 minor; 1225 u16 fw_release; 1226 1227 a->fw_version = le16_to_cpu( 1228 rq->func_rsp.cfg_rsp.vda_version); 1229 a->fw_build = rq->func_rsp.cfg_rsp.fw_build; 1230 fw_release = le16_to_cpu( 1231 rq->func_rsp.cfg_rsp.fw_release); 1232 major = LOBYTE(fw_release); 1233 minor = HIBYTE(fw_release); 1234 a->fw_version += (major << 16) + (minor << 24); 1235 } else { 1236 esas2r_hdebug("FAILED"); 1237 } 1238 1239 /* 1240 * the 2.71 and earlier releases of R6xx firmware did not error 1241 * unsupported config requests correctly. 1242 */ 1243 1244 if ((test_bit(AF2_THUNDERBOLT, &a->flags2)) 1245 || (be32_to_cpu(a->fw_version) > 0x00524702)) { 1246 esas2r_hdebug("CFG get init"); 1247 esas2r_build_cfg_req(a, 1248 rq, 1249 VDA_CFG_GET_INIT2, 1250 sizeof(struct atto_vda_cfg_init), 1251 NULL); 1252 1253 rq->vrq->cfg.sg_list_offset = offsetof( 1254 struct atto_vda_cfg_req, 1255 data.sge); 1256 rq->vrq->cfg.data.prde.ctl_len = 1257 cpu_to_le32(sizeof(struct atto_vda_cfg_init)); 1258 rq->vrq->cfg.data.prde.address = cpu_to_le64( 1259 rq->vrq_md->phys_addr + 1260 sizeof(union atto_vda_req)); 1261 rq->flags |= RF_FAILURE_OK; 1262 a->init_msg = ESAS2R_INIT_MSG_GET_INIT; 1263 break; 1264 } 1265 1266 case ESAS2R_INIT_MSG_GET_INIT: 1267 if (msg == ESAS2R_INIT_MSG_GET_INIT) { 1268 ci = (struct atto_vda_cfg_init *)rq->data_buf; 1269 if (rq->req_stat == RS_SUCCESS) { 1270 a->num_targets_backend = 1271 le32_to_cpu(ci->num_targets_backend); 1272 a->ioctl_tunnel = 1273 le32_to_cpu(ci->ioctl_tunnel); 1274 } else { 1275 esas2r_hdebug("FAILED"); 1276 } 1277 } 1278 /* fall through */ 1279 1280 default: 1281 rq->req_stat = RS_SUCCESS; 1282 return false; 1283 } 1284 return true; 1285 } 1286 1287 /* 1288 * Perform initialization messages via the request queue. Messages are 1289 * performed with interrupts disabled. 1290 */ 1291 bool esas2r_init_msgs(struct esas2r_adapter *a) 1292 { 1293 bool success = true; 1294 struct esas2r_request *rq = &a->general_req; 1295 1296 esas2r_rq_init_request(rq, a); 1297 rq->comp_cb = esas2r_dummy_complete; 1298 1299 if (a->init_msg == 0) 1300 a->init_msg = ESAS2R_INIT_MSG_REINIT; 1301 1302 while (a->init_msg) { 1303 if (esas2r_format_init_msg(a, rq)) { 1304 unsigned long flags; 1305 while (true) { 1306 spin_lock_irqsave(&a->queue_lock, flags); 1307 esas2r_start_vda_request(a, rq); 1308 spin_unlock_irqrestore(&a->queue_lock, flags); 1309 esas2r_wait_request(a, rq); 1310 if (rq->req_stat != RS_PENDING) 1311 break; 1312 } 1313 } 1314 1315 if (rq->req_stat == RS_SUCCESS 1316 || ((rq->flags & RF_FAILURE_OK) 1317 && rq->req_stat != RS_TIMEOUT)) 1318 continue; 1319 1320 esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)", 1321 a->init_msg, rq->req_stat, rq->flags); 1322 a->init_msg = ESAS2R_INIT_MSG_START; 1323 success = false; 1324 break; 1325 } 1326 1327 esas2r_rq_destroy_request(rq, a); 1328 return success; 1329 } 1330 1331 /* Initialize the adapter chip */ 1332 bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll) 1333 { 1334 bool rslt = false; 1335 struct esas2r_request *rq; 1336 u32 i; 1337 1338 if (test_bit(AF_DEGRADED_MODE, &a->flags)) 1339 goto exit; 1340 1341 if (!test_bit(AF_NVR_VALID, &a->flags)) { 1342 if (!esas2r_nvram_read_direct(a)) 1343 esas2r_log(ESAS2R_LOG_WARN, 1344 "invalid/missing NVRAM parameters"); 1345 } 1346 1347 if (!esas2r_init_msgs(a)) { 1348 esas2r_set_degraded_mode(a, "init messages failed"); 1349 goto exit; 1350 } 1351 1352 /* The firmware is ready. */ 1353 clear_bit(AF_DEGRADED_MODE, &a->flags); 1354 clear_bit(AF_CHPRST_PENDING, &a->flags); 1355 1356 /* Post all the async event requests */ 1357 for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++) 1358 esas2r_start_ae_request(a, rq); 1359 1360 if (!a->flash_rev[0]) 1361 esas2r_read_flash_rev(a); 1362 1363 if (!a->image_type[0]) 1364 esas2r_read_image_type(a); 1365 1366 if (a->fw_version == 0) 1367 a->fw_rev[0] = 0; 1368 else 1369 sprintf(a->fw_rev, "%1d.%02d", 1370 (int)LOBYTE(HIWORD(a->fw_version)), 1371 (int)HIBYTE(HIWORD(a->fw_version))); 1372 1373 esas2r_hdebug("firmware revision: %s", a->fw_rev); 1374 1375 if (test_bit(AF_CHPRST_DETECTED, &a->flags) 1376 && (test_bit(AF_FIRST_INIT, &a->flags))) { 1377 esas2r_enable_chip_interrupts(a); 1378 return true; 1379 } 1380 1381 /* initialize discovery */ 1382 esas2r_disc_initialize(a); 1383 1384 /* 1385 * wait for the device wait time to expire here if requested. this is 1386 * usually requested during initial driver load and possibly when 1387 * resuming from a low power state. deferred device waiting will use 1388 * interrupts. chip reset recovery always defers device waiting to 1389 * avoid being in a TASKLET too long. 1390 */ 1391 if (init_poll) { 1392 u32 currtime = a->disc_start_time; 1393 u32 nexttick = 100; 1394 u32 deltatime; 1395 1396 /* 1397 * Block Tasklets from getting scheduled and indicate this is 1398 * polled discovery. 1399 */ 1400 set_bit(AF_TASKLET_SCHEDULED, &a->flags); 1401 set_bit(AF_DISC_POLLED, &a->flags); 1402 1403 /* 1404 * Temporarily bring the disable count to zero to enable 1405 * deferred processing. Note that the count is already zero 1406 * after the first initialization. 1407 */ 1408 if (test_bit(AF_FIRST_INIT, &a->flags)) 1409 atomic_dec(&a->disable_cnt); 1410 1411 while (test_bit(AF_DISC_PENDING, &a->flags)) { 1412 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1413 1414 /* 1415 * Determine the need for a timer tick based on the 1416 * delta time between this and the last iteration of 1417 * this loop. We don't use the absolute time because 1418 * then we would have to worry about when nexttick 1419 * wraps and currtime hasn't yet. 1420 */ 1421 deltatime = jiffies_to_msecs(jiffies) - currtime; 1422 currtime += deltatime; 1423 1424 /* 1425 * Process any waiting discovery as long as the chip is 1426 * up. If a chip reset happens during initial polling, 1427 * we have to make sure the timer tick processes the 1428 * doorbell indicating the firmware is ready. 1429 */ 1430 if (!test_bit(AF_CHPRST_PENDING, &a->flags)) 1431 esas2r_disc_check_for_work(a); 1432 1433 /* Simulate a timer tick. */ 1434 if (nexttick <= deltatime) { 1435 1436 /* Time for a timer tick */ 1437 nexttick += 100; 1438 esas2r_timer_tick(a); 1439 } 1440 1441 if (nexttick > deltatime) 1442 nexttick -= deltatime; 1443 1444 /* Do any deferred processing */ 1445 if (esas2r_is_tasklet_pending(a)) 1446 esas2r_do_tasklet_tasks(a); 1447 1448 } 1449 1450 if (test_bit(AF_FIRST_INIT, &a->flags)) 1451 atomic_inc(&a->disable_cnt); 1452 1453 clear_bit(AF_DISC_POLLED, &a->flags); 1454 clear_bit(AF_TASKLET_SCHEDULED, &a->flags); 1455 } 1456 1457 1458 esas2r_targ_db_report_changes(a); 1459 1460 /* 1461 * For cases where (a) the initialization messages processing may 1462 * handle an interrupt for a port event and a discovery is waiting, but 1463 * we are not waiting for devices, or (b) the device wait time has been 1464 * exhausted but there is still discovery pending, start any leftover 1465 * discovery in interrupt driven mode. 1466 */ 1467 esas2r_disc_start_waiting(a); 1468 1469 /* Enable chip interrupts */ 1470 a->int_mask = ESAS2R_INT_STS_MASK; 1471 esas2r_enable_chip_interrupts(a); 1472 esas2r_enable_heartbeat(a); 1473 rslt = true; 1474 1475 exit: 1476 /* 1477 * Regardless of whether initialization was successful, certain things 1478 * need to get done before we exit. 1479 */ 1480 1481 if (test_bit(AF_CHPRST_DETECTED, &a->flags) && 1482 test_bit(AF_FIRST_INIT, &a->flags)) { 1483 /* 1484 * Reinitialization was performed during the first 1485 * initialization. Only clear the chip reset flag so the 1486 * original device polling is not cancelled. 1487 */ 1488 if (!rslt) 1489 clear_bit(AF_CHPRST_PENDING, &a->flags); 1490 } else { 1491 /* First initialization or a subsequent re-init is complete. */ 1492 if (!rslt) { 1493 clear_bit(AF_CHPRST_PENDING, &a->flags); 1494 clear_bit(AF_DISC_PENDING, &a->flags); 1495 } 1496 1497 1498 /* Enable deferred processing after the first initialization. */ 1499 if (test_bit(AF_FIRST_INIT, &a->flags)) { 1500 clear_bit(AF_FIRST_INIT, &a->flags); 1501 1502 if (atomic_dec_return(&a->disable_cnt) == 0) 1503 esas2r_do_deferred_processes(a); 1504 } 1505 } 1506 1507 return rslt; 1508 } 1509 1510 void esas2r_reset_adapter(struct esas2r_adapter *a) 1511 { 1512 set_bit(AF_OS_RESET, &a->flags); 1513 esas2r_local_reset_adapter(a); 1514 esas2r_schedule_tasklet(a); 1515 } 1516 1517 void esas2r_reset_chip(struct esas2r_adapter *a) 1518 { 1519 if (!esas2r_is_adapter_present(a)) 1520 return; 1521 1522 /* 1523 * Before we reset the chip, save off the VDA core dump. The VDA core 1524 * dump is located in the upper 512KB of the onchip SRAM. Make sure 1525 * to not overwrite a previous crash that was saved. 1526 */ 1527 if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) && 1528 !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) { 1529 esas2r_read_mem_block(a, 1530 a->fw_coredump_buff, 1531 MW_DATA_ADDR_SRAM + 0x80000, 1532 ESAS2R_FWCOREDUMP_SZ); 1533 1534 set_bit(AF2_COREDUMP_SAVED, &a->flags2); 1535 } 1536 1537 clear_bit(AF2_COREDUMP_AVAIL, &a->flags2); 1538 1539 /* Reset the chip */ 1540 if (a->pcid->revision == MVR_FREY_B2) 1541 esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2, 1542 MU_CTL_IN_FULL_RST2); 1543 else 1544 esas2r_write_register_dword(a, MU_CTL_STATUS_IN, 1545 MU_CTL_IN_FULL_RST); 1546 1547 1548 /* Stall a little while to let the reset condition clear */ 1549 mdelay(10); 1550 } 1551 1552 static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a) 1553 { 1554 u32 starttime; 1555 u32 doorbell; 1556 1557 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN); 1558 starttime = jiffies_to_msecs(jiffies); 1559 1560 while (true) { 1561 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1562 if (doorbell & DRBL_POWER_DOWN) { 1563 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1564 doorbell); 1565 break; 1566 } 1567 1568 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1569 1570 if ((jiffies_to_msecs(jiffies) - starttime) > 30000) { 1571 esas2r_hdebug("Timeout waiting for power down"); 1572 break; 1573 } 1574 } 1575 } 1576 1577 /* 1578 * Perform power management processing including managing device states, adapter 1579 * states, interrupts, and I/O. 1580 */ 1581 void esas2r_power_down(struct esas2r_adapter *a) 1582 { 1583 set_bit(AF_POWER_MGT, &a->flags); 1584 set_bit(AF_POWER_DOWN, &a->flags); 1585 1586 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) { 1587 u32 starttime; 1588 u32 doorbell; 1589 1590 /* 1591 * We are currently running OK and will be reinitializing later. 1592 * increment the disable count to coordinate with 1593 * esas2r_init_adapter. We don't have to do this in degraded 1594 * mode since we never enabled interrupts in the first place. 1595 */ 1596 esas2r_disable_chip_interrupts(a); 1597 esas2r_disable_heartbeat(a); 1598 1599 /* wait for any VDA activity to clear before continuing */ 1600 esas2r_write_register_dword(a, MU_DOORBELL_IN, 1601 DRBL_MSG_IFC_DOWN); 1602 starttime = jiffies_to_msecs(jiffies); 1603 1604 while (true) { 1605 doorbell = 1606 esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1607 if (doorbell & DRBL_MSG_IFC_DOWN) { 1608 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1609 doorbell); 1610 break; 1611 } 1612 1613 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1614 1615 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1616 esas2r_hdebug( 1617 "timeout waiting for interface down"); 1618 break; 1619 } 1620 } 1621 1622 /* 1623 * For versions of firmware that support it tell them the driver 1624 * is powering down. 1625 */ 1626 if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2)) 1627 esas2r_power_down_notify_firmware(a); 1628 } 1629 1630 /* Suspend I/O processing. */ 1631 set_bit(AF_OS_RESET, &a->flags); 1632 set_bit(AF_DISC_PENDING, &a->flags); 1633 set_bit(AF_CHPRST_PENDING, &a->flags); 1634 1635 esas2r_process_adapter_reset(a); 1636 1637 /* Remove devices now that I/O is cleaned up. */ 1638 a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a); 1639 esas2r_targ_db_remove_all(a, false); 1640 } 1641 1642 /* 1643 * Perform power management processing including managing device states, adapter 1644 * states, interrupts, and I/O. 1645 */ 1646 bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll) 1647 { 1648 bool ret; 1649 1650 clear_bit(AF_POWER_DOWN, &a->flags); 1651 esas2r_init_pci_cfg_space(a); 1652 set_bit(AF_FIRST_INIT, &a->flags); 1653 atomic_inc(&a->disable_cnt); 1654 1655 /* reinitialize the adapter */ 1656 ret = esas2r_check_adapter(a); 1657 if (!esas2r_init_adapter_hw(a, init_poll)) 1658 ret = false; 1659 1660 /* send the reset asynchronous event */ 1661 esas2r_send_reset_ae(a, true); 1662 1663 /* clear this flag after initialization. */ 1664 clear_bit(AF_POWER_MGT, &a->flags); 1665 return ret; 1666 } 1667 1668 bool esas2r_is_adapter_present(struct esas2r_adapter *a) 1669 { 1670 if (test_bit(AF_NOT_PRESENT, &a->flags)) 1671 return false; 1672 1673 if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) { 1674 set_bit(AF_NOT_PRESENT, &a->flags); 1675 1676 return false; 1677 } 1678 return true; 1679 } 1680 1681 const char *esas2r_get_model_name(struct esas2r_adapter *a) 1682 { 1683 switch (a->pcid->subsystem_device) { 1684 case ATTO_ESAS_R680: 1685 return "ATTO ExpressSAS R680"; 1686 1687 case ATTO_ESAS_R608: 1688 return "ATTO ExpressSAS R608"; 1689 1690 case ATTO_ESAS_R60F: 1691 return "ATTO ExpressSAS R60F"; 1692 1693 case ATTO_ESAS_R6F0: 1694 return "ATTO ExpressSAS R6F0"; 1695 1696 case ATTO_ESAS_R644: 1697 return "ATTO ExpressSAS R644"; 1698 1699 case ATTO_ESAS_R648: 1700 return "ATTO ExpressSAS R648"; 1701 1702 case ATTO_TSSC_3808: 1703 return "ATTO ThunderStream SC 3808D"; 1704 1705 case ATTO_TSSC_3808E: 1706 return "ATTO ThunderStream SC 3808E"; 1707 1708 case ATTO_TLSH_1068: 1709 return "ATTO ThunderLink SH 1068"; 1710 } 1711 1712 return "ATTO SAS Controller"; 1713 } 1714 1715 const char *esas2r_get_model_name_short(struct esas2r_adapter *a) 1716 { 1717 switch (a->pcid->subsystem_device) { 1718 case ATTO_ESAS_R680: 1719 return "R680"; 1720 1721 case ATTO_ESAS_R608: 1722 return "R608"; 1723 1724 case ATTO_ESAS_R60F: 1725 return "R60F"; 1726 1727 case ATTO_ESAS_R6F0: 1728 return "R6F0"; 1729 1730 case ATTO_ESAS_R644: 1731 return "R644"; 1732 1733 case ATTO_ESAS_R648: 1734 return "R648"; 1735 1736 case ATTO_TSSC_3808: 1737 return "SC 3808D"; 1738 1739 case ATTO_TSSC_3808E: 1740 return "SC 3808E"; 1741 1742 case ATTO_TLSH_1068: 1743 return "SH 1068"; 1744 } 1745 1746 return "unknown"; 1747 } 1748