1 /* 2 * linux/drivers/scsi/esas2r/esas2r_init.c 3 * For use with ATTO ExpressSAS R6xx SAS/SATA RAID controllers 4 * 5 * Copyright (c) 2001-2013 ATTO Technology, Inc. 6 * (mailto:linuxdrivers@attotech.com)mpt3sas/mpt3sas_trigger_diag. 7 * 8 * This program is free software; you can redistribute it and/or 9 * modify it under the terms of the GNU General Public License 10 * as published by the Free Software Foundation; either version 2 11 * of the License, or (at your option) any later version. 12 * 13 * This program is distributed in the hope that it will be useful, 14 * but WITHOUT ANY WARRANTY; without even the implied warranty of 15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 16 * GNU General Public License for more details. 17 * 18 * NO WARRANTY 19 * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR 20 * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT 21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT, 22 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is 23 * solely responsible for determining the appropriateness of using and 24 * distributing the Program and assumes all risks associated with its 25 * exercise of rights under this Agreement, including but not limited to 26 * the risks and costs of program errors, damage to or loss of data, 27 * programs or equipment, and unavailability or interruption of operations. 28 * 29 * DISCLAIMER OF LIABILITY 30 * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY 31 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND 33 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR 34 * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE 35 * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED 36 * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES 37 * 38 * You should have received a copy of the GNU General Public License 39 * along with this program; if not, write to the Free Software 40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, 41 * USA. 42 */ 43 44 #include "esas2r.h" 45 46 static bool esas2r_initmem_alloc(struct esas2r_adapter *a, 47 struct esas2r_mem_desc *mem_desc, 48 u32 align) 49 { 50 mem_desc->esas2r_param = mem_desc->size + align; 51 mem_desc->virt_addr = NULL; 52 mem_desc->phys_addr = 0; 53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, 54 (size_t)mem_desc-> 55 esas2r_param, 56 (dma_addr_t *)&mem_desc-> 57 phys_addr, 58 GFP_KERNEL); 59 60 if (mem_desc->esas2r_data == NULL) { 61 esas2r_log(ESAS2R_LOG_CRIT, 62 "failed to allocate %lu bytes of consistent memory!", 63 (long 64 unsigned 65 int)mem_desc->esas2r_param); 66 return false; 67 } 68 69 mem_desc->virt_addr = PTR_ALIGN(mem_desc->esas2r_data, align); 70 mem_desc->phys_addr = ALIGN(mem_desc->phys_addr, align); 71 memset(mem_desc->virt_addr, 0, mem_desc->size); 72 return true; 73 } 74 75 static void esas2r_initmem_free(struct esas2r_adapter *a, 76 struct esas2r_mem_desc *mem_desc) 77 { 78 if (mem_desc->virt_addr == NULL) 79 return; 80 81 /* 82 * Careful! phys_addr and virt_addr may have been adjusted from the 83 * original allocation in order to return the desired alignment. That 84 * means we have to use the original address (in esas2r_data) and size 85 * (esas2r_param) and calculate the original physical address based on 86 * the difference between the requested and actual allocation size. 87 */ 88 if (mem_desc->phys_addr) { 89 int unalign = ((u8 *)mem_desc->virt_addr) - 90 ((u8 *)mem_desc->esas2r_data); 91 92 dma_free_coherent(&a->pcid->dev, 93 (size_t)mem_desc->esas2r_param, 94 mem_desc->esas2r_data, 95 (dma_addr_t)(mem_desc->phys_addr - unalign)); 96 } else { 97 kfree(mem_desc->esas2r_data); 98 } 99 100 mem_desc->virt_addr = NULL; 101 } 102 103 static bool alloc_vda_req(struct esas2r_adapter *a, 104 struct esas2r_request *rq) 105 { 106 struct esas2r_mem_desc *memdesc = kzalloc( 107 sizeof(struct esas2r_mem_desc), GFP_KERNEL); 108 109 if (memdesc == NULL) { 110 esas2r_hdebug("could not alloc mem for vda request memdesc\n"); 111 return false; 112 } 113 114 memdesc->size = sizeof(union atto_vda_req) + 115 ESAS2R_DATA_BUF_LEN; 116 117 if (!esas2r_initmem_alloc(a, memdesc, 256)) { 118 esas2r_hdebug("could not alloc mem for vda request\n"); 119 kfree(memdesc); 120 return false; 121 } 122 123 a->num_vrqs++; 124 list_add(&memdesc->next_desc, &a->vrq_mds_head); 125 126 rq->vrq_md = memdesc; 127 rq->vrq = (union atto_vda_req *)memdesc->virt_addr; 128 rq->vrq->scsi.handle = a->num_vrqs; 129 130 return true; 131 } 132 133 static void esas2r_unmap_regions(struct esas2r_adapter *a) 134 { 135 if (a->regs) 136 iounmap((void __iomem *)a->regs); 137 138 a->regs = NULL; 139 140 pci_release_region(a->pcid, 2); 141 142 if (a->data_window) 143 iounmap((void __iomem *)a->data_window); 144 145 a->data_window = NULL; 146 147 pci_release_region(a->pcid, 0); 148 } 149 150 static int esas2r_map_regions(struct esas2r_adapter *a) 151 { 152 int error; 153 154 a->regs = NULL; 155 a->data_window = NULL; 156 157 error = pci_request_region(a->pcid, 2, a->name); 158 if (error != 0) { 159 esas2r_log(ESAS2R_LOG_CRIT, 160 "pci_request_region(2) failed, error %d", 161 error); 162 163 return error; 164 } 165 166 a->regs = (void __force *)ioremap(pci_resource_start(a->pcid, 2), 167 pci_resource_len(a->pcid, 2)); 168 if (a->regs == NULL) { 169 esas2r_log(ESAS2R_LOG_CRIT, 170 "ioremap failed for regs mem region\n"); 171 pci_release_region(a->pcid, 2); 172 return -EFAULT; 173 } 174 175 error = pci_request_region(a->pcid, 0, a->name); 176 if (error != 0) { 177 esas2r_log(ESAS2R_LOG_CRIT, 178 "pci_request_region(2) failed, error %d", 179 error); 180 esas2r_unmap_regions(a); 181 return error; 182 } 183 184 a->data_window = (void __force *)ioremap(pci_resource_start(a->pcid, 185 0), 186 pci_resource_len(a->pcid, 0)); 187 if (a->data_window == NULL) { 188 esas2r_log(ESAS2R_LOG_CRIT, 189 "ioremap failed for data_window mem region\n"); 190 esas2r_unmap_regions(a); 191 return -EFAULT; 192 } 193 194 return 0; 195 } 196 197 static void esas2r_setup_interrupts(struct esas2r_adapter *a, int intr_mode) 198 { 199 int i; 200 201 /* Set up interrupt mode based on the requested value */ 202 switch (intr_mode) { 203 case INTR_MODE_LEGACY: 204 use_legacy_interrupts: 205 a->intr_mode = INTR_MODE_LEGACY; 206 break; 207 208 case INTR_MODE_MSI: 209 i = pci_enable_msi(a->pcid); 210 if (i != 0) { 211 esas2r_log(ESAS2R_LOG_WARN, 212 "failed to enable MSI for adapter %d, " 213 "falling back to legacy interrupts " 214 "(err=%d)", a->index, 215 i); 216 goto use_legacy_interrupts; 217 } 218 a->intr_mode = INTR_MODE_MSI; 219 set_bit(AF2_MSI_ENABLED, &a->flags2); 220 break; 221 222 223 default: 224 esas2r_log(ESAS2R_LOG_WARN, 225 "unknown interrupt_mode %d requested, " 226 "falling back to legacy interrupt", 227 interrupt_mode); 228 goto use_legacy_interrupts; 229 } 230 } 231 232 static void esas2r_claim_interrupts(struct esas2r_adapter *a) 233 { 234 unsigned long flags = 0; 235 236 if (a->intr_mode == INTR_MODE_LEGACY) 237 flags |= IRQF_SHARED; 238 239 esas2r_log(ESAS2R_LOG_INFO, 240 "esas2r_claim_interrupts irq=%d (%p, %s, %lx)", 241 a->pcid->irq, a, a->name, flags); 242 243 if (request_irq(a->pcid->irq, 244 (a->intr_mode == 245 INTR_MODE_LEGACY) ? esas2r_interrupt : 246 esas2r_msi_interrupt, 247 flags, 248 a->name, 249 a)) { 250 esas2r_log(ESAS2R_LOG_CRIT, "unable to request IRQ %02X", 251 a->pcid->irq); 252 return; 253 } 254 255 set_bit(AF2_IRQ_CLAIMED, &a->flags2); 256 esas2r_log(ESAS2R_LOG_INFO, 257 "claimed IRQ %d flags: 0x%lx", 258 a->pcid->irq, flags); 259 } 260 261 int esas2r_init_adapter(struct Scsi_Host *host, struct pci_dev *pcid, 262 int index) 263 { 264 struct esas2r_adapter *a; 265 u64 bus_addr = 0; 266 int i; 267 void *next_uncached; 268 struct esas2r_request *first_request, *last_request; 269 bool dma64 = false; 270 271 if (index >= MAX_ADAPTERS) { 272 esas2r_log(ESAS2R_LOG_CRIT, 273 "tried to init invalid adapter index %u!", 274 index); 275 return 0; 276 } 277 278 if (esas2r_adapters[index]) { 279 esas2r_log(ESAS2R_LOG_CRIT, 280 "tried to init existing adapter index %u!", 281 index); 282 return 0; 283 } 284 285 a = (struct esas2r_adapter *)host->hostdata; 286 memset(a, 0, sizeof(struct esas2r_adapter)); 287 a->pcid = pcid; 288 a->host = host; 289 290 if (sizeof(dma_addr_t) > 4 && 291 dma_get_required_mask(&pcid->dev) > DMA_BIT_MASK(32) && 292 !dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(64))) 293 dma64 = true; 294 295 if (!dma64 && dma_set_mask_and_coherent(&pcid->dev, DMA_BIT_MASK(32))) { 296 esas2r_log(ESAS2R_LOG_CRIT, "failed to set DMA mask"); 297 esas2r_kill_adapter(index); 298 return 0; 299 } 300 301 esas2r_log_dev(ESAS2R_LOG_INFO, &pcid->dev, 302 "%s-bit PCI addressing enabled\n", dma64 ? "64" : "32"); 303 304 esas2r_adapters[index] = a; 305 sprintf(a->name, ESAS2R_DRVR_NAME "_%02d", index); 306 esas2r_debug("new adapter %p, name %s", a, a->name); 307 spin_lock_init(&a->request_lock); 308 spin_lock_init(&a->fw_event_lock); 309 mutex_init(&a->fm_api_mutex); 310 mutex_init(&a->fs_api_mutex); 311 sema_init(&a->nvram_semaphore, 1); 312 313 esas2r_fw_event_off(a); 314 snprintf(a->fw_event_q_name, ESAS2R_KOBJ_NAME_LEN, "esas2r/%d", 315 a->index); 316 a->fw_event_q = create_singlethread_workqueue(a->fw_event_q_name); 317 318 init_waitqueue_head(&a->buffered_ioctl_waiter); 319 init_waitqueue_head(&a->nvram_waiter); 320 init_waitqueue_head(&a->fm_api_waiter); 321 init_waitqueue_head(&a->fs_api_waiter); 322 init_waitqueue_head(&a->vda_waiter); 323 324 INIT_LIST_HEAD(&a->general_req.req_list); 325 INIT_LIST_HEAD(&a->active_list); 326 INIT_LIST_HEAD(&a->defer_list); 327 INIT_LIST_HEAD(&a->free_sg_list_head); 328 INIT_LIST_HEAD(&a->avail_request); 329 INIT_LIST_HEAD(&a->vrq_mds_head); 330 INIT_LIST_HEAD(&a->fw_event_list); 331 332 first_request = (struct esas2r_request *)((u8 *)(a + 1)); 333 334 for (last_request = first_request, i = 1; i < num_requests; 335 last_request++, i++) { 336 INIT_LIST_HEAD(&last_request->req_list); 337 list_add_tail(&last_request->comp_list, &a->avail_request); 338 if (!alloc_vda_req(a, last_request)) { 339 esas2r_log(ESAS2R_LOG_CRIT, 340 "failed to allocate a VDA request!"); 341 esas2r_kill_adapter(index); 342 return 0; 343 } 344 } 345 346 esas2r_debug("requests: %p to %p (%d, %d)", first_request, 347 last_request, 348 sizeof(*first_request), 349 num_requests); 350 351 if (esas2r_map_regions(a) != 0) { 352 esas2r_log(ESAS2R_LOG_CRIT, "could not map PCI regions!"); 353 esas2r_kill_adapter(index); 354 return 0; 355 } 356 357 a->index = index; 358 359 /* interrupts will be disabled until we are done with init */ 360 atomic_inc(&a->dis_ints_cnt); 361 atomic_inc(&a->disable_cnt); 362 set_bit(AF_CHPRST_PENDING, &a->flags); 363 set_bit(AF_DISC_PENDING, &a->flags); 364 set_bit(AF_FIRST_INIT, &a->flags); 365 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 366 367 a->init_msg = ESAS2R_INIT_MSG_START; 368 a->max_vdareq_size = 128; 369 a->build_sgl = esas2r_build_sg_list_sge; 370 371 esas2r_setup_interrupts(a, interrupt_mode); 372 373 a->uncached_size = esas2r_get_uncached_size(a); 374 a->uncached = dma_alloc_coherent(&pcid->dev, 375 (size_t)a->uncached_size, 376 (dma_addr_t *)&bus_addr, 377 GFP_KERNEL); 378 if (a->uncached == NULL) { 379 esas2r_log(ESAS2R_LOG_CRIT, 380 "failed to allocate %d bytes of consistent memory!", 381 a->uncached_size); 382 esas2r_kill_adapter(index); 383 return 0; 384 } 385 386 a->uncached_phys = bus_addr; 387 388 esas2r_debug("%d bytes uncached memory allocated @ %p (%x:%x)", 389 a->uncached_size, 390 a->uncached, 391 upper_32_bits(bus_addr), 392 lower_32_bits(bus_addr)); 393 memset(a->uncached, 0, a->uncached_size); 394 next_uncached = a->uncached; 395 396 if (!esas2r_init_adapter_struct(a, 397 &next_uncached)) { 398 esas2r_log(ESAS2R_LOG_CRIT, 399 "failed to initialize adapter structure (2)!"); 400 esas2r_kill_adapter(index); 401 return 0; 402 } 403 404 tasklet_init(&a->tasklet, 405 esas2r_adapter_tasklet, 406 (unsigned long)a); 407 408 /* 409 * Disable chip interrupts to prevent spurious interrupts 410 * until we claim the IRQ. 411 */ 412 esas2r_disable_chip_interrupts(a); 413 esas2r_check_adapter(a); 414 415 if (!esas2r_init_adapter_hw(a, true)) 416 esas2r_log(ESAS2R_LOG_CRIT, "failed to initialize hardware!"); 417 else 418 esas2r_debug("esas2r_init_adapter ok"); 419 420 esas2r_claim_interrupts(a); 421 422 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) 423 esas2r_enable_chip_interrupts(a); 424 425 set_bit(AF2_INIT_DONE, &a->flags2); 426 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) 427 esas2r_kickoff_timer(a); 428 esas2r_debug("esas2r_init_adapter done for %p (%d)", 429 a, a->disable_cnt); 430 431 return 1; 432 } 433 434 static void esas2r_adapter_power_down(struct esas2r_adapter *a, 435 int power_management) 436 { 437 struct esas2r_mem_desc *memdesc, *next; 438 439 if ((test_bit(AF2_INIT_DONE, &a->flags2)) 440 && (!test_bit(AF_DEGRADED_MODE, &a->flags))) { 441 if (!power_management) { 442 del_timer_sync(&a->timer); 443 tasklet_kill(&a->tasklet); 444 } 445 esas2r_power_down(a); 446 447 /* 448 * There are versions of firmware that do not handle the sync 449 * cache command correctly. Stall here to ensure that the 450 * cache is lazily flushed. 451 */ 452 mdelay(500); 453 esas2r_debug("chip halted"); 454 } 455 456 /* Remove sysfs binary files */ 457 if (a->sysfs_fw_created) { 458 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fw); 459 a->sysfs_fw_created = 0; 460 } 461 462 if (a->sysfs_fs_created) { 463 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_fs); 464 a->sysfs_fs_created = 0; 465 } 466 467 if (a->sysfs_vda_created) { 468 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_vda); 469 a->sysfs_vda_created = 0; 470 } 471 472 if (a->sysfs_hw_created) { 473 sysfs_remove_bin_file(&a->host->shost_dev.kobj, &bin_attr_hw); 474 a->sysfs_hw_created = 0; 475 } 476 477 if (a->sysfs_live_nvram_created) { 478 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 479 &bin_attr_live_nvram); 480 a->sysfs_live_nvram_created = 0; 481 } 482 483 if (a->sysfs_default_nvram_created) { 484 sysfs_remove_bin_file(&a->host->shost_dev.kobj, 485 &bin_attr_default_nvram); 486 a->sysfs_default_nvram_created = 0; 487 } 488 489 /* Clean up interrupts */ 490 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 491 esas2r_log_dev(ESAS2R_LOG_INFO, 492 &(a->pcid->dev), 493 "free_irq(%d) called", a->pcid->irq); 494 495 free_irq(a->pcid->irq, a); 496 esas2r_debug("IRQ released"); 497 clear_bit(AF2_IRQ_CLAIMED, &a->flags2); 498 } 499 500 if (test_bit(AF2_MSI_ENABLED, &a->flags2)) { 501 pci_disable_msi(a->pcid); 502 clear_bit(AF2_MSI_ENABLED, &a->flags2); 503 esas2r_debug("MSI disabled"); 504 } 505 506 if (a->inbound_list_md.virt_addr) 507 esas2r_initmem_free(a, &a->inbound_list_md); 508 509 if (a->outbound_list_md.virt_addr) 510 esas2r_initmem_free(a, &a->outbound_list_md); 511 512 list_for_each_entry_safe(memdesc, next, &a->free_sg_list_head, 513 next_desc) { 514 esas2r_initmem_free(a, memdesc); 515 } 516 517 /* Following frees everything allocated via alloc_vda_req */ 518 list_for_each_entry_safe(memdesc, next, &a->vrq_mds_head, next_desc) { 519 esas2r_initmem_free(a, memdesc); 520 list_del(&memdesc->next_desc); 521 kfree(memdesc); 522 } 523 524 kfree(a->first_ae_req); 525 a->first_ae_req = NULL; 526 527 kfree(a->sg_list_mds); 528 a->sg_list_mds = NULL; 529 530 kfree(a->req_table); 531 a->req_table = NULL; 532 533 if (a->regs) { 534 esas2r_unmap_regions(a); 535 a->regs = NULL; 536 a->data_window = NULL; 537 esas2r_debug("regions unmapped"); 538 } 539 } 540 541 /* Release/free allocated resources for specified adapters. */ 542 void esas2r_kill_adapter(int i) 543 { 544 struct esas2r_adapter *a = esas2r_adapters[i]; 545 546 if (a) { 547 unsigned long flags; 548 struct workqueue_struct *wq; 549 esas2r_debug("killing adapter %p [%d] ", a, i); 550 esas2r_fw_event_off(a); 551 esas2r_adapter_power_down(a, 0); 552 if (esas2r_buffered_ioctl && 553 (a->pcid == esas2r_buffered_ioctl_pcid)) { 554 dma_free_coherent(&a->pcid->dev, 555 (size_t)esas2r_buffered_ioctl_size, 556 esas2r_buffered_ioctl, 557 esas2r_buffered_ioctl_addr); 558 esas2r_buffered_ioctl = NULL; 559 } 560 561 if (a->vda_buffer) { 562 dma_free_coherent(&a->pcid->dev, 563 (size_t)VDA_MAX_BUFFER_SIZE, 564 a->vda_buffer, 565 (dma_addr_t)a->ppvda_buffer); 566 a->vda_buffer = NULL; 567 } 568 if (a->fs_api_buffer) { 569 dma_free_coherent(&a->pcid->dev, 570 (size_t)a->fs_api_buffer_size, 571 a->fs_api_buffer, 572 (dma_addr_t)a->ppfs_api_buffer); 573 a->fs_api_buffer = NULL; 574 } 575 576 kfree(a->local_atto_ioctl); 577 a->local_atto_ioctl = NULL; 578 579 spin_lock_irqsave(&a->fw_event_lock, flags); 580 wq = a->fw_event_q; 581 a->fw_event_q = NULL; 582 spin_unlock_irqrestore(&a->fw_event_lock, flags); 583 if (wq) 584 destroy_workqueue(wq); 585 586 if (a->uncached) { 587 dma_free_coherent(&a->pcid->dev, 588 (size_t)a->uncached_size, 589 a->uncached, 590 (dma_addr_t)a->uncached_phys); 591 a->uncached = NULL; 592 esas2r_debug("uncached area freed"); 593 } 594 595 esas2r_log_dev(ESAS2R_LOG_INFO, 596 &(a->pcid->dev), 597 "pci_disable_device() called. msix_enabled: %d " 598 "msi_enabled: %d irq: %d pin: %d", 599 a->pcid->msix_enabled, 600 a->pcid->msi_enabled, 601 a->pcid->irq, 602 a->pcid->pin); 603 604 esas2r_log_dev(ESAS2R_LOG_INFO, 605 &(a->pcid->dev), 606 "before pci_disable_device() enable_cnt: %d", 607 a->pcid->enable_cnt.counter); 608 609 pci_disable_device(a->pcid); 610 esas2r_log_dev(ESAS2R_LOG_INFO, 611 &(a->pcid->dev), 612 "after pci_disable_device() enable_cnt: %d", 613 a->pcid->enable_cnt.counter); 614 615 esas2r_log_dev(ESAS2R_LOG_INFO, 616 &(a->pcid->dev), 617 "pci_set_drv_data(%p, NULL) called", 618 a->pcid); 619 620 pci_set_drvdata(a->pcid, NULL); 621 esas2r_adapters[i] = NULL; 622 623 if (test_bit(AF2_INIT_DONE, &a->flags2)) { 624 clear_bit(AF2_INIT_DONE, &a->flags2); 625 626 set_bit(AF_DEGRADED_MODE, &a->flags); 627 628 esas2r_log_dev(ESAS2R_LOG_INFO, 629 &(a->host->shost_gendev), 630 "scsi_remove_host() called"); 631 632 scsi_remove_host(a->host); 633 634 esas2r_log_dev(ESAS2R_LOG_INFO, 635 &(a->host->shost_gendev), 636 "scsi_host_put() called"); 637 638 scsi_host_put(a->host); 639 } 640 } 641 } 642 643 int esas2r_suspend(struct pci_dev *pdev, pm_message_t state) 644 { 645 struct Scsi_Host *host = pci_get_drvdata(pdev); 646 u32 device_state; 647 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 648 649 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "suspending adapter()"); 650 if (!a) 651 return -ENODEV; 652 653 esas2r_adapter_power_down(a, 1); 654 device_state = pci_choose_state(pdev, state); 655 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 656 "pci_save_state() called"); 657 pci_save_state(pdev); 658 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 659 "pci_disable_device() called"); 660 pci_disable_device(pdev); 661 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 662 "pci_set_power_state() called"); 663 pci_set_power_state(pdev, device_state); 664 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "esas2r_suspend(): 0"); 665 return 0; 666 } 667 668 int esas2r_resume(struct pci_dev *pdev) 669 { 670 struct Scsi_Host *host = pci_get_drvdata(pdev); 671 struct esas2r_adapter *a = (struct esas2r_adapter *)host->hostdata; 672 int rez; 673 674 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), "resuming adapter()"); 675 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 676 "pci_set_power_state(PCI_D0) " 677 "called"); 678 pci_set_power_state(pdev, PCI_D0); 679 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 680 "pci_enable_wake(PCI_D0, 0) " 681 "called"); 682 pci_enable_wake(pdev, PCI_D0, 0); 683 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 684 "pci_restore_state() called"); 685 pci_restore_state(pdev); 686 esas2r_log_dev(ESAS2R_LOG_INFO, &(pdev->dev), 687 "pci_enable_device() called"); 688 rez = pci_enable_device(pdev); 689 pci_set_master(pdev); 690 691 if (!a) { 692 rez = -ENODEV; 693 goto error_exit; 694 } 695 696 if (esas2r_map_regions(a) != 0) { 697 esas2r_log(ESAS2R_LOG_CRIT, "could not re-map PCI regions!"); 698 rez = -ENOMEM; 699 goto error_exit; 700 } 701 702 /* Set up interupt mode */ 703 esas2r_setup_interrupts(a, a->intr_mode); 704 705 /* 706 * Disable chip interrupts to prevent spurious interrupts until we 707 * claim the IRQ. 708 */ 709 esas2r_disable_chip_interrupts(a); 710 if (!esas2r_power_up(a, true)) { 711 esas2r_debug("yikes, esas2r_power_up failed"); 712 rez = -ENOMEM; 713 goto error_exit; 714 } 715 716 esas2r_claim_interrupts(a); 717 718 if (test_bit(AF2_IRQ_CLAIMED, &a->flags2)) { 719 /* 720 * Now that system interrupt(s) are claimed, we can enable 721 * chip interrupts. 722 */ 723 esas2r_enable_chip_interrupts(a); 724 esas2r_kickoff_timer(a); 725 } else { 726 esas2r_debug("yikes, unable to claim IRQ"); 727 esas2r_log(ESAS2R_LOG_CRIT, "could not re-claim IRQ!"); 728 rez = -ENOMEM; 729 goto error_exit; 730 } 731 732 error_exit: 733 esas2r_log_dev(ESAS2R_LOG_CRIT, &(pdev->dev), "esas2r_resume(): %d", 734 rez); 735 return rez; 736 } 737 738 bool esas2r_set_degraded_mode(struct esas2r_adapter *a, char *error_str) 739 { 740 set_bit(AF_DEGRADED_MODE, &a->flags); 741 esas2r_log(ESAS2R_LOG_CRIT, 742 "setting adapter to degraded mode: %s\n", error_str); 743 return false; 744 } 745 746 u32 esas2r_get_uncached_size(struct esas2r_adapter *a) 747 { 748 return sizeof(struct esas2r_sas_nvram) 749 + ALIGN(ESAS2R_DISC_BUF_LEN, 8) 750 + ALIGN(sizeof(u32), 8) /* outbound list copy pointer */ 751 + 8 752 + (num_sg_lists * (u16)sgl_page_size) 753 + ALIGN((num_requests + num_ae_requests + 1 + 754 ESAS2R_LIST_EXTRA) * 755 sizeof(struct esas2r_inbound_list_source_entry), 756 8) 757 + ALIGN((num_requests + num_ae_requests + 1 + 758 ESAS2R_LIST_EXTRA) * 759 sizeof(struct atto_vda_ob_rsp), 8) 760 + 256; /* VDA request and buffer align */ 761 } 762 763 static void esas2r_init_pci_cfg_space(struct esas2r_adapter *a) 764 { 765 if (pci_is_pcie(a->pcid)) { 766 u16 devcontrol; 767 768 pcie_capability_read_word(a->pcid, PCI_EXP_DEVCTL, &devcontrol); 769 770 if ((devcontrol & PCI_EXP_DEVCTL_READRQ) > 771 PCI_EXP_DEVCTL_READRQ_512B) { 772 esas2r_log(ESAS2R_LOG_INFO, 773 "max read request size > 512B"); 774 775 devcontrol &= ~PCI_EXP_DEVCTL_READRQ; 776 devcontrol |= PCI_EXP_DEVCTL_READRQ_512B; 777 pcie_capability_write_word(a->pcid, PCI_EXP_DEVCTL, 778 devcontrol); 779 } 780 } 781 } 782 783 /* 784 * Determine the organization of the uncached data area and 785 * finish initializing the adapter structure 786 */ 787 bool esas2r_init_adapter_struct(struct esas2r_adapter *a, 788 void **uncached_area) 789 { 790 u32 i; 791 u8 *high; 792 struct esas2r_inbound_list_source_entry *element; 793 struct esas2r_request *rq; 794 struct esas2r_mem_desc *sgl; 795 796 spin_lock_init(&a->sg_list_lock); 797 spin_lock_init(&a->mem_lock); 798 spin_lock_init(&a->queue_lock); 799 800 a->targetdb_end = &a->targetdb[ESAS2R_MAX_TARGETS]; 801 802 if (!alloc_vda_req(a, &a->general_req)) { 803 esas2r_hdebug( 804 "failed to allocate a VDA request for the general req!"); 805 return false; 806 } 807 808 /* allocate requests for asynchronous events */ 809 a->first_ae_req = 810 kcalloc(num_ae_requests, sizeof(struct esas2r_request), 811 GFP_KERNEL); 812 813 if (a->first_ae_req == NULL) { 814 esas2r_log(ESAS2R_LOG_CRIT, 815 "failed to allocate memory for asynchronous events"); 816 return false; 817 } 818 819 /* allocate the S/G list memory descriptors */ 820 a->sg_list_mds = kcalloc(num_sg_lists, sizeof(struct esas2r_mem_desc), 821 GFP_KERNEL); 822 823 if (a->sg_list_mds == NULL) { 824 esas2r_log(ESAS2R_LOG_CRIT, 825 "failed to allocate memory for s/g list descriptors"); 826 return false; 827 } 828 829 /* allocate the request table */ 830 a->req_table = 831 kcalloc(num_requests + num_ae_requests + 1, 832 sizeof(struct esas2r_request *), 833 GFP_KERNEL); 834 835 if (a->req_table == NULL) { 836 esas2r_log(ESAS2R_LOG_CRIT, 837 "failed to allocate memory for the request table"); 838 return false; 839 } 840 841 /* initialize PCI configuration space */ 842 esas2r_init_pci_cfg_space(a); 843 844 /* 845 * the thunder_stream boards all have a serial flash part that has a 846 * different base address on the AHB bus. 847 */ 848 if ((a->pcid->subsystem_vendor == ATTO_VENDOR_ID) 849 && (a->pcid->subsystem_device & ATTO_SSDID_TBT)) 850 a->flags2 |= AF2_THUNDERBOLT; 851 852 if (test_bit(AF2_THUNDERBOLT, &a->flags2)) 853 a->flags2 |= AF2_SERIAL_FLASH; 854 855 if (a->pcid->subsystem_device == ATTO_TLSH_1068) 856 a->flags2 |= AF2_THUNDERLINK; 857 858 /* Uncached Area */ 859 high = (u8 *)*uncached_area; 860 861 /* initialize the scatter/gather table pages */ 862 863 for (i = 0, sgl = a->sg_list_mds; i < num_sg_lists; i++, sgl++) { 864 sgl->size = sgl_page_size; 865 866 list_add_tail(&sgl->next_desc, &a->free_sg_list_head); 867 868 if (!esas2r_initmem_alloc(a, sgl, ESAS2R_SGL_ALIGN)) { 869 /* Allow the driver to load if the minimum count met. */ 870 if (i < NUM_SGL_MIN) 871 return false; 872 break; 873 } 874 } 875 876 /* compute the size of the lists */ 877 a->list_size = num_requests + ESAS2R_LIST_EXTRA; 878 879 /* allocate the inbound list */ 880 a->inbound_list_md.size = a->list_size * 881 sizeof(struct 882 esas2r_inbound_list_source_entry); 883 884 if (!esas2r_initmem_alloc(a, &a->inbound_list_md, ESAS2R_LIST_ALIGN)) { 885 esas2r_hdebug("failed to allocate IB list"); 886 return false; 887 } 888 889 /* allocate the outbound list */ 890 a->outbound_list_md.size = a->list_size * 891 sizeof(struct atto_vda_ob_rsp); 892 893 if (!esas2r_initmem_alloc(a, &a->outbound_list_md, 894 ESAS2R_LIST_ALIGN)) { 895 esas2r_hdebug("failed to allocate IB list"); 896 return false; 897 } 898 899 /* allocate the NVRAM structure */ 900 a->nvram = (struct esas2r_sas_nvram *)high; 901 high += sizeof(struct esas2r_sas_nvram); 902 903 /* allocate the discovery buffer */ 904 a->disc_buffer = high; 905 high += ESAS2R_DISC_BUF_LEN; 906 high = PTR_ALIGN(high, 8); 907 908 /* allocate the outbound list copy pointer */ 909 a->outbound_copy = (u32 volatile *)high; 910 high += sizeof(u32); 911 912 if (!test_bit(AF_NVR_VALID, &a->flags)) 913 esas2r_nvram_set_defaults(a); 914 915 /* update the caller's uncached memory area pointer */ 916 *uncached_area = (void *)high; 917 918 /* initialize the allocated memory */ 919 if (test_bit(AF_FIRST_INIT, &a->flags)) { 920 esas2r_targ_db_initialize(a); 921 922 /* prime parts of the inbound list */ 923 element = 924 (struct esas2r_inbound_list_source_entry *)a-> 925 inbound_list_md. 926 virt_addr; 927 928 for (i = 0; i < a->list_size; i++) { 929 element->address = 0; 930 element->reserved = 0; 931 element->length = cpu_to_le32(HWILSE_INTERFACE_F0 932 | (sizeof(union 933 atto_vda_req) 934 / 935 sizeof(u32))); 936 element++; 937 } 938 939 /* init the AE requests */ 940 for (rq = a->first_ae_req, i = 0; i < num_ae_requests; rq++, 941 i++) { 942 INIT_LIST_HEAD(&rq->req_list); 943 if (!alloc_vda_req(a, rq)) { 944 esas2r_hdebug( 945 "failed to allocate a VDA request!"); 946 return false; 947 } 948 949 esas2r_rq_init_request(rq, a); 950 951 /* override the completion function */ 952 rq->comp_cb = esas2r_ae_complete; 953 } 954 } 955 956 return true; 957 } 958 959 /* This code will verify that the chip is operational. */ 960 bool esas2r_check_adapter(struct esas2r_adapter *a) 961 { 962 u32 starttime; 963 u32 doorbell; 964 u64 ppaddr; 965 u32 dw; 966 967 /* 968 * if the chip reset detected flag is set, we can bypass a bunch of 969 * stuff. 970 */ 971 if (test_bit(AF_CHPRST_DETECTED, &a->flags)) 972 goto skip_chip_reset; 973 974 /* 975 * BEFORE WE DO ANYTHING, disable the chip interrupts! the boot driver 976 * may have left them enabled or we may be recovering from a fault. 977 */ 978 esas2r_write_register_dword(a, MU_INT_MASK_OUT, ESAS2R_INT_DIS_MASK); 979 esas2r_flush_register_dword(a, MU_INT_MASK_OUT); 980 981 /* 982 * wait for the firmware to become ready by forcing an interrupt and 983 * waiting for a response. 984 */ 985 starttime = jiffies_to_msecs(jiffies); 986 987 while (true) { 988 esas2r_force_interrupt(a); 989 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 990 if (doorbell == 0xFFFFFFFF) { 991 /* 992 * Give the firmware up to two seconds to enable 993 * register access after a reset. 994 */ 995 if ((jiffies_to_msecs(jiffies) - starttime) > 2000) 996 return esas2r_set_degraded_mode(a, 997 "unable to access registers"); 998 } else if (doorbell & DRBL_FORCE_INT) { 999 u32 ver = (doorbell & DRBL_FW_VER_MSK); 1000 1001 /* 1002 * This driver supports version 0 and version 1 of 1003 * the API 1004 */ 1005 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1006 doorbell); 1007 1008 if (ver == DRBL_FW_VER_0) { 1009 set_bit(AF_LEGACY_SGE_MODE, &a->flags); 1010 1011 a->max_vdareq_size = 128; 1012 a->build_sgl = esas2r_build_sg_list_sge; 1013 } else if (ver == DRBL_FW_VER_1) { 1014 clear_bit(AF_LEGACY_SGE_MODE, &a->flags); 1015 1016 a->max_vdareq_size = 1024; 1017 a->build_sgl = esas2r_build_sg_list_prd; 1018 } else { 1019 return esas2r_set_degraded_mode(a, 1020 "unknown firmware version"); 1021 } 1022 break; 1023 } 1024 1025 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1026 1027 if ((jiffies_to_msecs(jiffies) - starttime) > 180000) { 1028 esas2r_hdebug("FW ready TMO"); 1029 esas2r_bugon(); 1030 1031 return esas2r_set_degraded_mode(a, 1032 "firmware start has timed out"); 1033 } 1034 } 1035 1036 /* purge any asynchronous events since we will repost them later */ 1037 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_DOWN); 1038 starttime = jiffies_to_msecs(jiffies); 1039 1040 while (true) { 1041 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1042 if (doorbell & DRBL_MSG_IFC_DOWN) { 1043 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1044 doorbell); 1045 break; 1046 } 1047 1048 schedule_timeout_interruptible(msecs_to_jiffies(50)); 1049 1050 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1051 esas2r_hdebug("timeout waiting for interface down"); 1052 break; 1053 } 1054 } 1055 skip_chip_reset: 1056 /* 1057 * first things first, before we go changing any of these registers 1058 * disable the communication lists. 1059 */ 1060 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1061 dw &= ~MU_ILC_ENABLE; 1062 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1063 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1064 dw &= ~MU_OLC_ENABLE; 1065 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1066 1067 /* configure the communication list addresses */ 1068 ppaddr = a->inbound_list_md.phys_addr; 1069 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_LO, 1070 lower_32_bits(ppaddr)); 1071 esas2r_write_register_dword(a, MU_IN_LIST_ADDR_HI, 1072 upper_32_bits(ppaddr)); 1073 ppaddr = a->outbound_list_md.phys_addr; 1074 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_LO, 1075 lower_32_bits(ppaddr)); 1076 esas2r_write_register_dword(a, MU_OUT_LIST_ADDR_HI, 1077 upper_32_bits(ppaddr)); 1078 ppaddr = a->uncached_phys + 1079 ((u8 *)a->outbound_copy - a->uncached); 1080 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_LO, 1081 lower_32_bits(ppaddr)); 1082 esas2r_write_register_dword(a, MU_OUT_LIST_COPY_PTR_HI, 1083 upper_32_bits(ppaddr)); 1084 1085 /* reset the read and write pointers */ 1086 *a->outbound_copy = 1087 a->last_write = 1088 a->last_read = a->list_size - 1; 1089 set_bit(AF_COMM_LIST_TOGGLE, &a->flags); 1090 esas2r_write_register_dword(a, MU_IN_LIST_WRITE, MU_ILW_TOGGLE | 1091 a->last_write); 1092 esas2r_write_register_dword(a, MU_OUT_LIST_COPY, MU_OLC_TOGGLE | 1093 a->last_write); 1094 esas2r_write_register_dword(a, MU_IN_LIST_READ, MU_ILR_TOGGLE | 1095 a->last_write); 1096 esas2r_write_register_dword(a, MU_OUT_LIST_WRITE, 1097 MU_OLW_TOGGLE | a->last_write); 1098 1099 /* configure the interface select fields */ 1100 dw = esas2r_read_register_dword(a, MU_IN_LIST_IFC_CONFIG); 1101 dw &= ~(MU_ILIC_LIST | MU_ILIC_DEST); 1102 esas2r_write_register_dword(a, MU_IN_LIST_IFC_CONFIG, 1103 (dw | MU_ILIC_LIST_F0 | MU_ILIC_DEST_DDR)); 1104 dw = esas2r_read_register_dword(a, MU_OUT_LIST_IFC_CONFIG); 1105 dw &= ~(MU_OLIC_LIST | MU_OLIC_SOURCE); 1106 esas2r_write_register_dword(a, MU_OUT_LIST_IFC_CONFIG, 1107 (dw | MU_OLIC_LIST_F0 | 1108 MU_OLIC_SOURCE_DDR)); 1109 1110 /* finish configuring the communication lists */ 1111 dw = esas2r_read_register_dword(a, MU_IN_LIST_CONFIG); 1112 dw &= ~(MU_ILC_ENTRY_MASK | MU_ILC_NUMBER_MASK); 1113 dw |= MU_ILC_ENTRY_4_DW | MU_ILC_DYNAMIC_SRC 1114 | (a->list_size << MU_ILC_NUMBER_SHIFT); 1115 esas2r_write_register_dword(a, MU_IN_LIST_CONFIG, dw); 1116 dw = esas2r_read_register_dword(a, MU_OUT_LIST_CONFIG); 1117 dw &= ~(MU_OLC_ENTRY_MASK | MU_OLC_NUMBER_MASK); 1118 dw |= MU_OLC_ENTRY_4_DW | (a->list_size << MU_OLC_NUMBER_SHIFT); 1119 esas2r_write_register_dword(a, MU_OUT_LIST_CONFIG, dw); 1120 1121 /* 1122 * notify the firmware that we're done setting up the communication 1123 * list registers. wait here until the firmware is done configuring 1124 * its lists. it will signal that it is done by enabling the lists. 1125 */ 1126 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_MSG_IFC_INIT); 1127 starttime = jiffies_to_msecs(jiffies); 1128 1129 while (true) { 1130 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1131 if (doorbell & DRBL_MSG_IFC_INIT) { 1132 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1133 doorbell); 1134 break; 1135 } 1136 1137 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1138 1139 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1140 esas2r_hdebug( 1141 "timeout waiting for communication list init"); 1142 esas2r_bugon(); 1143 return esas2r_set_degraded_mode(a, 1144 "timeout waiting for communication list init"); 1145 } 1146 } 1147 1148 /* 1149 * flag whether the firmware supports the power down doorbell. we 1150 * determine this by reading the inbound doorbell enable mask. 1151 */ 1152 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_IN_ENB); 1153 if (doorbell & DRBL_POWER_DOWN) 1154 set_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1155 else 1156 clear_bit(AF2_VDA_POWER_DOWN, &a->flags2); 1157 1158 /* 1159 * enable assertion of outbound queue and doorbell interrupts in the 1160 * main interrupt cause register. 1161 */ 1162 esas2r_write_register_dword(a, MU_OUT_LIST_INT_MASK, MU_OLIS_MASK); 1163 esas2r_write_register_dword(a, MU_DOORBELL_OUT_ENB, DRBL_ENB_MASK); 1164 return true; 1165 } 1166 1167 /* Process the initialization message just completed and format the next one. */ 1168 static bool esas2r_format_init_msg(struct esas2r_adapter *a, 1169 struct esas2r_request *rq) 1170 { 1171 u32 msg = a->init_msg; 1172 struct atto_vda_cfg_init *ci; 1173 1174 a->init_msg = 0; 1175 1176 switch (msg) { 1177 case ESAS2R_INIT_MSG_START: 1178 case ESAS2R_INIT_MSG_REINIT: 1179 { 1180 esas2r_hdebug("CFG init"); 1181 esas2r_build_cfg_req(a, 1182 rq, 1183 VDA_CFG_INIT, 1184 0, 1185 NULL); 1186 ci = (struct atto_vda_cfg_init *)&rq->vrq->cfg.data.init; 1187 ci->sgl_page_size = cpu_to_le32(sgl_page_size); 1188 /* firmware interface overflows in y2106 */ 1189 ci->epoch_time = cpu_to_le32(ktime_get_real_seconds()); 1190 rq->flags |= RF_FAILURE_OK; 1191 a->init_msg = ESAS2R_INIT_MSG_INIT; 1192 break; 1193 } 1194 1195 case ESAS2R_INIT_MSG_INIT: 1196 if (rq->req_stat == RS_SUCCESS) { 1197 u32 major; 1198 u32 minor; 1199 u16 fw_release; 1200 1201 a->fw_version = le16_to_cpu( 1202 rq->func_rsp.cfg_rsp.vda_version); 1203 a->fw_build = rq->func_rsp.cfg_rsp.fw_build; 1204 fw_release = le16_to_cpu( 1205 rq->func_rsp.cfg_rsp.fw_release); 1206 major = LOBYTE(fw_release); 1207 minor = HIBYTE(fw_release); 1208 a->fw_version += (major << 16) + (minor << 24); 1209 } else { 1210 esas2r_hdebug("FAILED"); 1211 } 1212 1213 /* 1214 * the 2.71 and earlier releases of R6xx firmware did not error 1215 * unsupported config requests correctly. 1216 */ 1217 1218 if ((test_bit(AF2_THUNDERBOLT, &a->flags2)) 1219 || (be32_to_cpu(a->fw_version) > 0x00524702)) { 1220 esas2r_hdebug("CFG get init"); 1221 esas2r_build_cfg_req(a, 1222 rq, 1223 VDA_CFG_GET_INIT2, 1224 sizeof(struct atto_vda_cfg_init), 1225 NULL); 1226 1227 rq->vrq->cfg.sg_list_offset = offsetof( 1228 struct atto_vda_cfg_req, 1229 data.sge); 1230 rq->vrq->cfg.data.prde.ctl_len = 1231 cpu_to_le32(sizeof(struct atto_vda_cfg_init)); 1232 rq->vrq->cfg.data.prde.address = cpu_to_le64( 1233 rq->vrq_md->phys_addr + 1234 sizeof(union atto_vda_req)); 1235 rq->flags |= RF_FAILURE_OK; 1236 a->init_msg = ESAS2R_INIT_MSG_GET_INIT; 1237 break; 1238 } 1239 /* fall through */ 1240 1241 case ESAS2R_INIT_MSG_GET_INIT: 1242 if (msg == ESAS2R_INIT_MSG_GET_INIT) { 1243 ci = (struct atto_vda_cfg_init *)rq->data_buf; 1244 if (rq->req_stat == RS_SUCCESS) { 1245 a->num_targets_backend = 1246 le32_to_cpu(ci->num_targets_backend); 1247 a->ioctl_tunnel = 1248 le32_to_cpu(ci->ioctl_tunnel); 1249 } else { 1250 esas2r_hdebug("FAILED"); 1251 } 1252 } 1253 /* fall through */ 1254 1255 default: 1256 rq->req_stat = RS_SUCCESS; 1257 return false; 1258 } 1259 return true; 1260 } 1261 1262 /* 1263 * Perform initialization messages via the request queue. Messages are 1264 * performed with interrupts disabled. 1265 */ 1266 bool esas2r_init_msgs(struct esas2r_adapter *a) 1267 { 1268 bool success = true; 1269 struct esas2r_request *rq = &a->general_req; 1270 1271 esas2r_rq_init_request(rq, a); 1272 rq->comp_cb = esas2r_dummy_complete; 1273 1274 if (a->init_msg == 0) 1275 a->init_msg = ESAS2R_INIT_MSG_REINIT; 1276 1277 while (a->init_msg) { 1278 if (esas2r_format_init_msg(a, rq)) { 1279 unsigned long flags; 1280 while (true) { 1281 spin_lock_irqsave(&a->queue_lock, flags); 1282 esas2r_start_vda_request(a, rq); 1283 spin_unlock_irqrestore(&a->queue_lock, flags); 1284 esas2r_wait_request(a, rq); 1285 if (rq->req_stat != RS_PENDING) 1286 break; 1287 } 1288 } 1289 1290 if (rq->req_stat == RS_SUCCESS 1291 || ((rq->flags & RF_FAILURE_OK) 1292 && rq->req_stat != RS_TIMEOUT)) 1293 continue; 1294 1295 esas2r_log(ESAS2R_LOG_CRIT, "init message %x failed (%x, %x)", 1296 a->init_msg, rq->req_stat, rq->flags); 1297 a->init_msg = ESAS2R_INIT_MSG_START; 1298 success = false; 1299 break; 1300 } 1301 1302 esas2r_rq_destroy_request(rq, a); 1303 return success; 1304 } 1305 1306 /* Initialize the adapter chip */ 1307 bool esas2r_init_adapter_hw(struct esas2r_adapter *a, bool init_poll) 1308 { 1309 bool rslt = false; 1310 struct esas2r_request *rq; 1311 u32 i; 1312 1313 if (test_bit(AF_DEGRADED_MODE, &a->flags)) 1314 goto exit; 1315 1316 if (!test_bit(AF_NVR_VALID, &a->flags)) { 1317 if (!esas2r_nvram_read_direct(a)) 1318 esas2r_log(ESAS2R_LOG_WARN, 1319 "invalid/missing NVRAM parameters"); 1320 } 1321 1322 if (!esas2r_init_msgs(a)) { 1323 esas2r_set_degraded_mode(a, "init messages failed"); 1324 goto exit; 1325 } 1326 1327 /* The firmware is ready. */ 1328 clear_bit(AF_DEGRADED_MODE, &a->flags); 1329 clear_bit(AF_CHPRST_PENDING, &a->flags); 1330 1331 /* Post all the async event requests */ 1332 for (i = 0, rq = a->first_ae_req; i < num_ae_requests; i++, rq++) 1333 esas2r_start_ae_request(a, rq); 1334 1335 if (!a->flash_rev[0]) 1336 esas2r_read_flash_rev(a); 1337 1338 if (!a->image_type[0]) 1339 esas2r_read_image_type(a); 1340 1341 if (a->fw_version == 0) 1342 a->fw_rev[0] = 0; 1343 else 1344 sprintf(a->fw_rev, "%1d.%02d", 1345 (int)LOBYTE(HIWORD(a->fw_version)), 1346 (int)HIBYTE(HIWORD(a->fw_version))); 1347 1348 esas2r_hdebug("firmware revision: %s", a->fw_rev); 1349 1350 if (test_bit(AF_CHPRST_DETECTED, &a->flags) 1351 && (test_bit(AF_FIRST_INIT, &a->flags))) { 1352 esas2r_enable_chip_interrupts(a); 1353 return true; 1354 } 1355 1356 /* initialize discovery */ 1357 esas2r_disc_initialize(a); 1358 1359 /* 1360 * wait for the device wait time to expire here if requested. this is 1361 * usually requested during initial driver load and possibly when 1362 * resuming from a low power state. deferred device waiting will use 1363 * interrupts. chip reset recovery always defers device waiting to 1364 * avoid being in a TASKLET too long. 1365 */ 1366 if (init_poll) { 1367 u32 currtime = a->disc_start_time; 1368 u32 nexttick = 100; 1369 u32 deltatime; 1370 1371 /* 1372 * Block Tasklets from getting scheduled and indicate this is 1373 * polled discovery. 1374 */ 1375 set_bit(AF_TASKLET_SCHEDULED, &a->flags); 1376 set_bit(AF_DISC_POLLED, &a->flags); 1377 1378 /* 1379 * Temporarily bring the disable count to zero to enable 1380 * deferred processing. Note that the count is already zero 1381 * after the first initialization. 1382 */ 1383 if (test_bit(AF_FIRST_INIT, &a->flags)) 1384 atomic_dec(&a->disable_cnt); 1385 1386 while (test_bit(AF_DISC_PENDING, &a->flags)) { 1387 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1388 1389 /* 1390 * Determine the need for a timer tick based on the 1391 * delta time between this and the last iteration of 1392 * this loop. We don't use the absolute time because 1393 * then we would have to worry about when nexttick 1394 * wraps and currtime hasn't yet. 1395 */ 1396 deltatime = jiffies_to_msecs(jiffies) - currtime; 1397 currtime += deltatime; 1398 1399 /* 1400 * Process any waiting discovery as long as the chip is 1401 * up. If a chip reset happens during initial polling, 1402 * we have to make sure the timer tick processes the 1403 * doorbell indicating the firmware is ready. 1404 */ 1405 if (!test_bit(AF_CHPRST_PENDING, &a->flags)) 1406 esas2r_disc_check_for_work(a); 1407 1408 /* Simulate a timer tick. */ 1409 if (nexttick <= deltatime) { 1410 1411 /* Time for a timer tick */ 1412 nexttick += 100; 1413 esas2r_timer_tick(a); 1414 } 1415 1416 if (nexttick > deltatime) 1417 nexttick -= deltatime; 1418 1419 /* Do any deferred processing */ 1420 if (esas2r_is_tasklet_pending(a)) 1421 esas2r_do_tasklet_tasks(a); 1422 1423 } 1424 1425 if (test_bit(AF_FIRST_INIT, &a->flags)) 1426 atomic_inc(&a->disable_cnt); 1427 1428 clear_bit(AF_DISC_POLLED, &a->flags); 1429 clear_bit(AF_TASKLET_SCHEDULED, &a->flags); 1430 } 1431 1432 1433 esas2r_targ_db_report_changes(a); 1434 1435 /* 1436 * For cases where (a) the initialization messages processing may 1437 * handle an interrupt for a port event and a discovery is waiting, but 1438 * we are not waiting for devices, or (b) the device wait time has been 1439 * exhausted but there is still discovery pending, start any leftover 1440 * discovery in interrupt driven mode. 1441 */ 1442 esas2r_disc_start_waiting(a); 1443 1444 /* Enable chip interrupts */ 1445 a->int_mask = ESAS2R_INT_STS_MASK; 1446 esas2r_enable_chip_interrupts(a); 1447 esas2r_enable_heartbeat(a); 1448 rslt = true; 1449 1450 exit: 1451 /* 1452 * Regardless of whether initialization was successful, certain things 1453 * need to get done before we exit. 1454 */ 1455 1456 if (test_bit(AF_CHPRST_DETECTED, &a->flags) && 1457 test_bit(AF_FIRST_INIT, &a->flags)) { 1458 /* 1459 * Reinitialization was performed during the first 1460 * initialization. Only clear the chip reset flag so the 1461 * original device polling is not cancelled. 1462 */ 1463 if (!rslt) 1464 clear_bit(AF_CHPRST_PENDING, &a->flags); 1465 } else { 1466 /* First initialization or a subsequent re-init is complete. */ 1467 if (!rslt) { 1468 clear_bit(AF_CHPRST_PENDING, &a->flags); 1469 clear_bit(AF_DISC_PENDING, &a->flags); 1470 } 1471 1472 1473 /* Enable deferred processing after the first initialization. */ 1474 if (test_bit(AF_FIRST_INIT, &a->flags)) { 1475 clear_bit(AF_FIRST_INIT, &a->flags); 1476 1477 if (atomic_dec_return(&a->disable_cnt) == 0) 1478 esas2r_do_deferred_processes(a); 1479 } 1480 } 1481 1482 return rslt; 1483 } 1484 1485 void esas2r_reset_adapter(struct esas2r_adapter *a) 1486 { 1487 set_bit(AF_OS_RESET, &a->flags); 1488 esas2r_local_reset_adapter(a); 1489 esas2r_schedule_tasklet(a); 1490 } 1491 1492 void esas2r_reset_chip(struct esas2r_adapter *a) 1493 { 1494 if (!esas2r_is_adapter_present(a)) 1495 return; 1496 1497 /* 1498 * Before we reset the chip, save off the VDA core dump. The VDA core 1499 * dump is located in the upper 512KB of the onchip SRAM. Make sure 1500 * to not overwrite a previous crash that was saved. 1501 */ 1502 if (test_bit(AF2_COREDUMP_AVAIL, &a->flags2) && 1503 !test_bit(AF2_COREDUMP_SAVED, &a->flags2)) { 1504 esas2r_read_mem_block(a, 1505 a->fw_coredump_buff, 1506 MW_DATA_ADDR_SRAM + 0x80000, 1507 ESAS2R_FWCOREDUMP_SZ); 1508 1509 set_bit(AF2_COREDUMP_SAVED, &a->flags2); 1510 } 1511 1512 clear_bit(AF2_COREDUMP_AVAIL, &a->flags2); 1513 1514 /* Reset the chip */ 1515 if (a->pcid->revision == MVR_FREY_B2) 1516 esas2r_write_register_dword(a, MU_CTL_STATUS_IN_B2, 1517 MU_CTL_IN_FULL_RST2); 1518 else 1519 esas2r_write_register_dword(a, MU_CTL_STATUS_IN, 1520 MU_CTL_IN_FULL_RST); 1521 1522 1523 /* Stall a little while to let the reset condition clear */ 1524 mdelay(10); 1525 } 1526 1527 static void esas2r_power_down_notify_firmware(struct esas2r_adapter *a) 1528 { 1529 u32 starttime; 1530 u32 doorbell; 1531 1532 esas2r_write_register_dword(a, MU_DOORBELL_IN, DRBL_POWER_DOWN); 1533 starttime = jiffies_to_msecs(jiffies); 1534 1535 while (true) { 1536 doorbell = esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1537 if (doorbell & DRBL_POWER_DOWN) { 1538 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1539 doorbell); 1540 break; 1541 } 1542 1543 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1544 1545 if ((jiffies_to_msecs(jiffies) - starttime) > 30000) { 1546 esas2r_hdebug("Timeout waiting for power down"); 1547 break; 1548 } 1549 } 1550 } 1551 1552 /* 1553 * Perform power management processing including managing device states, adapter 1554 * states, interrupts, and I/O. 1555 */ 1556 void esas2r_power_down(struct esas2r_adapter *a) 1557 { 1558 set_bit(AF_POWER_MGT, &a->flags); 1559 set_bit(AF_POWER_DOWN, &a->flags); 1560 1561 if (!test_bit(AF_DEGRADED_MODE, &a->flags)) { 1562 u32 starttime; 1563 u32 doorbell; 1564 1565 /* 1566 * We are currently running OK and will be reinitializing later. 1567 * increment the disable count to coordinate with 1568 * esas2r_init_adapter. We don't have to do this in degraded 1569 * mode since we never enabled interrupts in the first place. 1570 */ 1571 esas2r_disable_chip_interrupts(a); 1572 esas2r_disable_heartbeat(a); 1573 1574 /* wait for any VDA activity to clear before continuing */ 1575 esas2r_write_register_dword(a, MU_DOORBELL_IN, 1576 DRBL_MSG_IFC_DOWN); 1577 starttime = jiffies_to_msecs(jiffies); 1578 1579 while (true) { 1580 doorbell = 1581 esas2r_read_register_dword(a, MU_DOORBELL_OUT); 1582 if (doorbell & DRBL_MSG_IFC_DOWN) { 1583 esas2r_write_register_dword(a, MU_DOORBELL_OUT, 1584 doorbell); 1585 break; 1586 } 1587 1588 schedule_timeout_interruptible(msecs_to_jiffies(100)); 1589 1590 if ((jiffies_to_msecs(jiffies) - starttime) > 3000) { 1591 esas2r_hdebug( 1592 "timeout waiting for interface down"); 1593 break; 1594 } 1595 } 1596 1597 /* 1598 * For versions of firmware that support it tell them the driver 1599 * is powering down. 1600 */ 1601 if (test_bit(AF2_VDA_POWER_DOWN, &a->flags2)) 1602 esas2r_power_down_notify_firmware(a); 1603 } 1604 1605 /* Suspend I/O processing. */ 1606 set_bit(AF_OS_RESET, &a->flags); 1607 set_bit(AF_DISC_PENDING, &a->flags); 1608 set_bit(AF_CHPRST_PENDING, &a->flags); 1609 1610 esas2r_process_adapter_reset(a); 1611 1612 /* Remove devices now that I/O is cleaned up. */ 1613 a->prev_dev_cnt = esas2r_targ_db_get_tgt_cnt(a); 1614 esas2r_targ_db_remove_all(a, false); 1615 } 1616 1617 /* 1618 * Perform power management processing including managing device states, adapter 1619 * states, interrupts, and I/O. 1620 */ 1621 bool esas2r_power_up(struct esas2r_adapter *a, bool init_poll) 1622 { 1623 bool ret; 1624 1625 clear_bit(AF_POWER_DOWN, &a->flags); 1626 esas2r_init_pci_cfg_space(a); 1627 set_bit(AF_FIRST_INIT, &a->flags); 1628 atomic_inc(&a->disable_cnt); 1629 1630 /* reinitialize the adapter */ 1631 ret = esas2r_check_adapter(a); 1632 if (!esas2r_init_adapter_hw(a, init_poll)) 1633 ret = false; 1634 1635 /* send the reset asynchronous event */ 1636 esas2r_send_reset_ae(a, true); 1637 1638 /* clear this flag after initialization. */ 1639 clear_bit(AF_POWER_MGT, &a->flags); 1640 return ret; 1641 } 1642 1643 bool esas2r_is_adapter_present(struct esas2r_adapter *a) 1644 { 1645 if (test_bit(AF_NOT_PRESENT, &a->flags)) 1646 return false; 1647 1648 if (esas2r_read_register_dword(a, MU_DOORBELL_OUT) == 0xFFFFFFFF) { 1649 set_bit(AF_NOT_PRESENT, &a->flags); 1650 1651 return false; 1652 } 1653 return true; 1654 } 1655 1656 const char *esas2r_get_model_name(struct esas2r_adapter *a) 1657 { 1658 switch (a->pcid->subsystem_device) { 1659 case ATTO_ESAS_R680: 1660 return "ATTO ExpressSAS R680"; 1661 1662 case ATTO_ESAS_R608: 1663 return "ATTO ExpressSAS R608"; 1664 1665 case ATTO_ESAS_R60F: 1666 return "ATTO ExpressSAS R60F"; 1667 1668 case ATTO_ESAS_R6F0: 1669 return "ATTO ExpressSAS R6F0"; 1670 1671 case ATTO_ESAS_R644: 1672 return "ATTO ExpressSAS R644"; 1673 1674 case ATTO_ESAS_R648: 1675 return "ATTO ExpressSAS R648"; 1676 1677 case ATTO_TSSC_3808: 1678 return "ATTO ThunderStream SC 3808D"; 1679 1680 case ATTO_TSSC_3808E: 1681 return "ATTO ThunderStream SC 3808E"; 1682 1683 case ATTO_TLSH_1068: 1684 return "ATTO ThunderLink SH 1068"; 1685 } 1686 1687 return "ATTO SAS Controller"; 1688 } 1689 1690 const char *esas2r_get_model_name_short(struct esas2r_adapter *a) 1691 { 1692 switch (a->pcid->subsystem_device) { 1693 case ATTO_ESAS_R680: 1694 return "R680"; 1695 1696 case ATTO_ESAS_R608: 1697 return "R608"; 1698 1699 case ATTO_ESAS_R60F: 1700 return "R60F"; 1701 1702 case ATTO_ESAS_R6F0: 1703 return "R6F0"; 1704 1705 case ATTO_ESAS_R644: 1706 return "R644"; 1707 1708 case ATTO_ESAS_R648: 1709 return "R648"; 1710 1711 case ATTO_TSSC_3808: 1712 return "SC 3808D"; 1713 1714 case ATTO_TSSC_3808E: 1715 return "SC 3808E"; 1716 1717 case ATTO_TLSH_1068: 1718 return "SH 1068"; 1719 } 1720 1721 return "unknown"; 1722 } 1723