1 /* 2 * Copyright (c) 2005-2010 Brocade Communications Systems, Inc. 3 * All rights reserved 4 * www.brocade.com 5 * 6 * Linux driver for Brocade Fibre Channel Host Bus Adapter. 7 * 8 * This program is free software; you can redistribute it and/or modify it 9 * under the terms of the GNU General Public License (GPL) Version 2 as 10 * published by the Free Software Foundation 11 * 12 * This program is distributed in the hope that it will be useful, but 13 * WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 15 * General Public License for more details. 16 */ 17 #ifndef __BFA_H__ 18 #define __BFA_H__ 19 20 #include "bfad_drv.h" 21 #include "bfa_cs.h" 22 #include "bfa_plog.h" 23 #include "bfa_defs_svc.h" 24 #include "bfi.h" 25 #include "bfa_ioc.h" 26 27 struct bfa_s; 28 29 typedef void (*bfa_isr_func_t) (struct bfa_s *bfa, struct bfi_msg_s *m); 30 typedef void (*bfa_cb_cbfn_t) (void *cbarg, bfa_boolean_t complete); 31 32 /* 33 * Interrupt message handlers 34 */ 35 void bfa_isr_unhandled(struct bfa_s *bfa, struct bfi_msg_s *m); 36 37 /* 38 * Request and response queue related defines 39 */ 40 #define BFA_REQQ_NELEMS_MIN (4) 41 #define BFA_RSPQ_NELEMS_MIN (4) 42 43 #define bfa_reqq_pi(__bfa, __reqq) ((__bfa)->iocfc.req_cq_pi[__reqq]) 44 #define bfa_reqq_ci(__bfa, __reqq) \ 45 (*(u32 *)((__bfa)->iocfc.req_cq_shadow_ci[__reqq].kva)) 46 47 #define bfa_reqq_full(__bfa, __reqq) \ 48 (((bfa_reqq_pi(__bfa, __reqq) + 1) & \ 49 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1)) == \ 50 bfa_reqq_ci(__bfa, __reqq)) 51 52 #define bfa_reqq_next(__bfa, __reqq) \ 53 (bfa_reqq_full(__bfa, __reqq) ? NULL : \ 54 ((void *)((struct bfi_msg_s *)((__bfa)->iocfc.req_cq_ba[__reqq].kva) \ 55 + bfa_reqq_pi((__bfa), (__reqq))))) 56 57 #define bfa_reqq_produce(__bfa, __reqq) do { \ 58 (__bfa)->iocfc.req_cq_pi[__reqq]++; \ 59 (__bfa)->iocfc.req_cq_pi[__reqq] &= \ 60 ((__bfa)->iocfc.cfg.drvcfg.num_reqq_elems - 1); \ 61 writel((__bfa)->iocfc.req_cq_pi[__reqq], \ 62 (__bfa)->iocfc.bfa_regs.cpe_q_pi[__reqq]); \ 63 mmiowb(); \ 64 } while (0) 65 66 #define bfa_rspq_pi(__bfa, __rspq) \ 67 (*(u32 *)((__bfa)->iocfc.rsp_cq_shadow_pi[__rspq].kva)) 68 69 #define bfa_rspq_ci(__bfa, __rspq) ((__bfa)->iocfc.rsp_cq_ci[__rspq]) 70 #define bfa_rspq_elem(__bfa, __rspq, __ci) \ 71 (&((struct bfi_msg_s *)((__bfa)->iocfc.rsp_cq_ba[__rspq].kva))[__ci]) 72 73 #define CQ_INCR(__index, __size) do { \ 74 (__index)++; \ 75 (__index) &= ((__size) - 1); \ 76 } while (0) 77 78 /* 79 * Queue element to wait for room in request queue. FIFO order is 80 * maintained when fullfilling requests. 81 */ 82 struct bfa_reqq_wait_s { 83 struct list_head qe; 84 void (*qresume) (void *cbarg); 85 void *cbarg; 86 }; 87 88 /* 89 * Circular queue usage assignments 90 */ 91 enum { 92 BFA_REQQ_IOC = 0, /* all low-priority IOC msgs */ 93 BFA_REQQ_FCXP = 0, /* all FCXP messages */ 94 BFA_REQQ_LPS = 0, /* all lport service msgs */ 95 BFA_REQQ_PORT = 0, /* all port messages */ 96 BFA_REQQ_FLASH = 0, /* for flash module */ 97 BFA_REQQ_DIAG = 0, /* for diag module */ 98 BFA_REQQ_RPORT = 0, /* all port messages */ 99 BFA_REQQ_SBOOT = 0, /* all san boot messages */ 100 BFA_REQQ_QOS_LO = 1, /* all low priority IO */ 101 BFA_REQQ_QOS_MD = 2, /* all medium priority IO */ 102 BFA_REQQ_QOS_HI = 3, /* all high priority IO */ 103 }; 104 105 static inline void 106 bfa_reqq_winit(struct bfa_reqq_wait_s *wqe, void (*qresume) (void *cbarg), 107 void *cbarg) 108 { 109 wqe->qresume = qresume; 110 wqe->cbarg = cbarg; 111 } 112 113 #define bfa_reqq(__bfa, __reqq) (&(__bfa)->reqq_waitq[__reqq]) 114 115 /* 116 * static inline void 117 * bfa_reqq_wait(struct bfa_s *bfa, int reqq, struct bfa_reqq_wait_s *wqe) 118 */ 119 #define bfa_reqq_wait(__bfa, __reqq, __wqe) do { \ 120 \ 121 struct list_head *waitq = bfa_reqq(__bfa, __reqq); \ 122 \ 123 WARN_ON(((__reqq) >= BFI_IOC_MAX_CQS)); \ 124 WARN_ON(!((__wqe)->qresume && (__wqe)->cbarg)); \ 125 \ 126 list_add_tail(&(__wqe)->qe, waitq); \ 127 } while (0) 128 129 #define bfa_reqq_wcancel(__wqe) list_del(&(__wqe)->qe) 130 131 132 /* 133 * Generic BFA callback element. 134 */ 135 struct bfa_cb_qe_s { 136 struct list_head qe; 137 bfa_cb_cbfn_t cbfn; 138 bfa_boolean_t once; 139 u32 rsvd; 140 void *cbarg; 141 }; 142 143 #define bfa_cb_queue(__bfa, __hcb_qe, __cbfn, __cbarg) do { \ 144 (__hcb_qe)->cbfn = (__cbfn); \ 145 (__hcb_qe)->cbarg = (__cbarg); \ 146 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \ 147 } while (0) 148 149 #define bfa_cb_dequeue(__hcb_qe) list_del(&(__hcb_qe)->qe) 150 151 #define bfa_cb_queue_once(__bfa, __hcb_qe, __cbfn, __cbarg) do { \ 152 (__hcb_qe)->cbfn = (__cbfn); \ 153 (__hcb_qe)->cbarg = (__cbarg); \ 154 if (!(__hcb_qe)->once) { \ 155 list_add_tail(&(__hcb_qe)->qe, &(__bfa)->comp_q); \ 156 (__hcb_qe)->once = BFA_TRUE; \ 157 } \ 158 } while (0) 159 160 #define bfa_cb_queue_done(__hcb_qe) do { \ 161 (__hcb_qe)->once = BFA_FALSE; \ 162 } while (0) 163 164 165 /* 166 * PCI devices supported by the current BFA 167 */ 168 struct bfa_pciid_s { 169 u16 device_id; 170 u16 vendor_id; 171 }; 172 173 extern char bfa_version[]; 174 175 /* 176 * BFA memory resources 177 */ 178 enum bfa_mem_type { 179 BFA_MEM_TYPE_KVA = 1, /* Kernel Virtual Memory *(non-dma-able) */ 180 BFA_MEM_TYPE_DMA = 2, /* DMA-able memory */ 181 BFA_MEM_TYPE_MAX = BFA_MEM_TYPE_DMA, 182 }; 183 184 struct bfa_mem_elem_s { 185 enum bfa_mem_type mem_type; /* see enum bfa_mem_type */ 186 u32 mem_len; /* Total Length in Bytes */ 187 u8 *kva; /* kernel virtual address */ 188 u64 dma; /* dma address if DMA memory */ 189 u8 *kva_curp; /* kva allocation cursor */ 190 u64 dma_curp; /* dma allocation cursor */ 191 }; 192 193 struct bfa_meminfo_s { 194 struct bfa_mem_elem_s meminfo[BFA_MEM_TYPE_MAX]; 195 }; 196 #define bfa_meminfo_kva(_m) \ 197 ((_m)->meminfo[BFA_MEM_TYPE_KVA - 1].kva_curp) 198 #define bfa_meminfo_dma_virt(_m) \ 199 ((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].kva_curp) 200 #define bfa_meminfo_dma_phys(_m) \ 201 ((_m)->meminfo[BFA_MEM_TYPE_DMA - 1].dma_curp) 202 203 struct bfa_iocfc_regs_s { 204 void __iomem *intr_status; 205 void __iomem *intr_mask; 206 void __iomem *cpe_q_pi[BFI_IOC_MAX_CQS]; 207 void __iomem *cpe_q_ci[BFI_IOC_MAX_CQS]; 208 void __iomem *cpe_q_depth[BFI_IOC_MAX_CQS]; 209 void __iomem *cpe_q_ctrl[BFI_IOC_MAX_CQS]; 210 void __iomem *rme_q_ci[BFI_IOC_MAX_CQS]; 211 void __iomem *rme_q_pi[BFI_IOC_MAX_CQS]; 212 void __iomem *rme_q_depth[BFI_IOC_MAX_CQS]; 213 void __iomem *rme_q_ctrl[BFI_IOC_MAX_CQS]; 214 }; 215 216 /* 217 * MSIX vector handlers 218 */ 219 #define BFA_MSIX_MAX_VECTORS 22 220 typedef void (*bfa_msix_handler_t)(struct bfa_s *bfa, int vec); 221 struct bfa_msix_s { 222 int nvecs; 223 bfa_msix_handler_t handler[BFA_MSIX_MAX_VECTORS]; 224 }; 225 226 /* 227 * Chip specific interfaces 228 */ 229 struct bfa_hwif_s { 230 void (*hw_reginit)(struct bfa_s *bfa); 231 void (*hw_reqq_ack)(struct bfa_s *bfa, int reqq); 232 void (*hw_rspq_ack)(struct bfa_s *bfa, int rspq); 233 void (*hw_msix_init)(struct bfa_s *bfa, int nvecs); 234 void (*hw_msix_install)(struct bfa_s *bfa); 235 void (*hw_msix_uninstall)(struct bfa_s *bfa); 236 void (*hw_isr_mode_set)(struct bfa_s *bfa, bfa_boolean_t msix); 237 void (*hw_msix_getvecs)(struct bfa_s *bfa, u32 *vecmap, 238 u32 *nvecs, u32 *maxvec); 239 void (*hw_msix_get_rme_range) (struct bfa_s *bfa, u32 *start, 240 u32 *end); 241 }; 242 typedef void (*bfa_cb_iocfc_t) (void *cbarg, enum bfa_status status); 243 244 struct bfa_iocfc_s { 245 struct bfa_s *bfa; 246 struct bfa_iocfc_cfg_s cfg; 247 int action; 248 u32 req_cq_pi[BFI_IOC_MAX_CQS]; 249 u32 rsp_cq_ci[BFI_IOC_MAX_CQS]; 250 struct bfa_cb_qe_s init_hcb_qe; 251 struct bfa_cb_qe_s stop_hcb_qe; 252 struct bfa_cb_qe_s dis_hcb_qe; 253 struct bfa_cb_qe_s stats_hcb_qe; 254 bfa_boolean_t cfgdone; 255 256 struct bfa_dma_s cfg_info; 257 struct bfi_iocfc_cfg_s *cfginfo; 258 struct bfa_dma_s cfgrsp_dma; 259 struct bfi_iocfc_cfgrsp_s *cfgrsp; 260 struct bfi_iocfc_cfg_reply_s *cfg_reply; 261 struct bfa_dma_s req_cq_ba[BFI_IOC_MAX_CQS]; 262 struct bfa_dma_s req_cq_shadow_ci[BFI_IOC_MAX_CQS]; 263 struct bfa_dma_s rsp_cq_ba[BFI_IOC_MAX_CQS]; 264 struct bfa_dma_s rsp_cq_shadow_pi[BFI_IOC_MAX_CQS]; 265 struct bfa_iocfc_regs_s bfa_regs; /* BFA device registers */ 266 struct bfa_hwif_s hwif; 267 bfa_cb_iocfc_t updateq_cbfn; /* bios callback function */ 268 void *updateq_cbarg; /* bios callback arg */ 269 u32 intr_mask; 270 }; 271 272 #define bfa_lpuid(__bfa) \ 273 bfa_ioc_portid(&(__bfa)->ioc) 274 #define bfa_msix_init(__bfa, __nvecs) \ 275 ((__bfa)->iocfc.hwif.hw_msix_init(__bfa, __nvecs)) 276 #define bfa_msix_install(__bfa) \ 277 ((__bfa)->iocfc.hwif.hw_msix_install(__bfa)) 278 #define bfa_msix_uninstall(__bfa) \ 279 ((__bfa)->iocfc.hwif.hw_msix_uninstall(__bfa)) 280 #define bfa_isr_mode_set(__bfa, __msix) \ 281 ((__bfa)->iocfc.hwif.hw_isr_mode_set(__bfa, __msix)) 282 #define bfa_msix_getvecs(__bfa, __vecmap, __nvecs, __maxvec) \ 283 ((__bfa)->iocfc.hwif.hw_msix_getvecs(__bfa, __vecmap, \ 284 __nvecs, __maxvec)) 285 #define bfa_msix_get_rme_range(__bfa, __start, __end) \ 286 ((__bfa)->iocfc.hwif.hw_msix_get_rme_range(__bfa, __start, __end)) 287 #define bfa_msix(__bfa, __vec) \ 288 ((__bfa)->msix.handler[__vec](__bfa, __vec)) 289 290 /* 291 * FC specific IOC functions. 292 */ 293 void bfa_iocfc_meminfo(struct bfa_iocfc_cfg_s *cfg, u32 *km_len, 294 u32 *dm_len); 295 void bfa_iocfc_attach(struct bfa_s *bfa, void *bfad, 296 struct bfa_iocfc_cfg_s *cfg, 297 struct bfa_meminfo_s *meminfo, 298 struct bfa_pcidev_s *pcidev); 299 void bfa_iocfc_init(struct bfa_s *bfa); 300 void bfa_iocfc_start(struct bfa_s *bfa); 301 void bfa_iocfc_stop(struct bfa_s *bfa); 302 void bfa_iocfc_isr(void *bfa, struct bfi_mbmsg_s *msg); 303 void bfa_iocfc_set_snsbase(struct bfa_s *bfa, u64 snsbase_pa); 304 bfa_boolean_t bfa_iocfc_is_operational(struct bfa_s *bfa); 305 void bfa_iocfc_reset_queues(struct bfa_s *bfa); 306 307 void bfa_msix_all(struct bfa_s *bfa, int vec); 308 void bfa_msix_reqq(struct bfa_s *bfa, int vec); 309 void bfa_msix_rspq(struct bfa_s *bfa, int vec); 310 void bfa_msix_lpu_err(struct bfa_s *bfa, int vec); 311 312 void bfa_hwcb_reginit(struct bfa_s *bfa); 313 void bfa_hwcb_reqq_ack(struct bfa_s *bfa, int rspq); 314 void bfa_hwcb_rspq_ack(struct bfa_s *bfa, int rspq); 315 void bfa_hwcb_msix_init(struct bfa_s *bfa, int nvecs); 316 void bfa_hwcb_msix_install(struct bfa_s *bfa); 317 void bfa_hwcb_msix_uninstall(struct bfa_s *bfa); 318 void bfa_hwcb_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 319 void bfa_hwcb_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 320 u32 *maxvec); 321 void bfa_hwcb_msix_get_rme_range(struct bfa_s *bfa, u32 *start, 322 u32 *end); 323 void bfa_hwct_reginit(struct bfa_s *bfa); 324 void bfa_hwct_reqq_ack(struct bfa_s *bfa, int rspq); 325 void bfa_hwct_rspq_ack(struct bfa_s *bfa, int rspq); 326 void bfa_hwct_msix_init(struct bfa_s *bfa, int nvecs); 327 void bfa_hwct_msix_install(struct bfa_s *bfa); 328 void bfa_hwct_msix_uninstall(struct bfa_s *bfa); 329 void bfa_hwct_isr_mode_set(struct bfa_s *bfa, bfa_boolean_t msix); 330 void bfa_hwct_msix_getvecs(struct bfa_s *bfa, u32 *vecmap, u32 *nvecs, 331 u32 *maxvec); 332 void bfa_hwct_msix_get_rme_range(struct bfa_s *bfa, u32 *start, 333 u32 *end); 334 void bfa_iocfc_get_bootwwns(struct bfa_s *bfa, u8 *nwwns, wwn_t *wwns); 335 wwn_t bfa_iocfc_get_pwwn(struct bfa_s *bfa); 336 wwn_t bfa_iocfc_get_nwwn(struct bfa_s *bfa); 337 int bfa_iocfc_get_pbc_vports(struct bfa_s *bfa, 338 struct bfi_pbc_vport_s *pbc_vport); 339 340 341 /* 342 *---------------------------------------------------------------------- 343 * BFA public interfaces 344 *---------------------------------------------------------------------- 345 */ 346 #define bfa_stats(_mod, _stats) ((_mod)->stats._stats++) 347 #define bfa_ioc_get_stats(__bfa, __ioc_stats) \ 348 bfa_ioc_fetch_stats(&(__bfa)->ioc, __ioc_stats) 349 #define bfa_ioc_clear_stats(__bfa) \ 350 bfa_ioc_clr_stats(&(__bfa)->ioc) 351 #define bfa_get_nports(__bfa) \ 352 bfa_ioc_get_nports(&(__bfa)->ioc) 353 #define bfa_get_adapter_manufacturer(__bfa, __manufacturer) \ 354 bfa_ioc_get_adapter_manufacturer(&(__bfa)->ioc, __manufacturer) 355 #define bfa_get_adapter_model(__bfa, __model) \ 356 bfa_ioc_get_adapter_model(&(__bfa)->ioc, __model) 357 #define bfa_get_adapter_serial_num(__bfa, __serial_num) \ 358 bfa_ioc_get_adapter_serial_num(&(__bfa)->ioc, __serial_num) 359 #define bfa_get_adapter_fw_ver(__bfa, __fw_ver) \ 360 bfa_ioc_get_adapter_fw_ver(&(__bfa)->ioc, __fw_ver) 361 #define bfa_get_adapter_optrom_ver(__bfa, __optrom_ver) \ 362 bfa_ioc_get_adapter_optrom_ver(&(__bfa)->ioc, __optrom_ver) 363 #define bfa_get_pci_chip_rev(__bfa, __chip_rev) \ 364 bfa_ioc_get_pci_chip_rev(&(__bfa)->ioc, __chip_rev) 365 #define bfa_get_ioc_state(__bfa) \ 366 bfa_ioc_get_state(&(__bfa)->ioc) 367 #define bfa_get_type(__bfa) \ 368 bfa_ioc_get_type(&(__bfa)->ioc) 369 #define bfa_get_mac(__bfa) \ 370 bfa_ioc_get_mac(&(__bfa)->ioc) 371 #define bfa_get_mfg_mac(__bfa) \ 372 bfa_ioc_get_mfg_mac(&(__bfa)->ioc) 373 #define bfa_get_fw_clock_res(__bfa) \ 374 ((__bfa)->iocfc.cfgrsp->fwcfg.fw_tick_res) 375 376 void bfa_get_pciids(struct bfa_pciid_s **pciids, int *npciids); 377 void bfa_cfg_get_default(struct bfa_iocfc_cfg_s *cfg); 378 void bfa_cfg_get_min(struct bfa_iocfc_cfg_s *cfg); 379 void bfa_cfg_get_meminfo(struct bfa_iocfc_cfg_s *cfg, 380 struct bfa_meminfo_s *meminfo); 381 void bfa_attach(struct bfa_s *bfa, void *bfad, struct bfa_iocfc_cfg_s *cfg, 382 struct bfa_meminfo_s *meminfo, 383 struct bfa_pcidev_s *pcidev); 384 void bfa_detach(struct bfa_s *bfa); 385 void bfa_cb_init(void *bfad, bfa_status_t status); 386 void bfa_cb_updateq(void *bfad, bfa_status_t status); 387 388 bfa_boolean_t bfa_intx(struct bfa_s *bfa); 389 void bfa_isr_enable(struct bfa_s *bfa); 390 void bfa_isr_disable(struct bfa_s *bfa); 391 392 void bfa_comp_deq(struct bfa_s *bfa, struct list_head *comp_q); 393 void bfa_comp_process(struct bfa_s *bfa, struct list_head *comp_q); 394 void bfa_comp_free(struct bfa_s *bfa, struct list_head *comp_q); 395 396 typedef void (*bfa_cb_ioc_t) (void *cbarg, enum bfa_status status); 397 void bfa_iocfc_get_attr(struct bfa_s *bfa, struct bfa_iocfc_attr_s *attr); 398 399 400 bfa_status_t bfa_iocfc_israttr_set(struct bfa_s *bfa, 401 struct bfa_iocfc_intr_attr_s *attr); 402 403 void bfa_iocfc_enable(struct bfa_s *bfa); 404 void bfa_iocfc_disable(struct bfa_s *bfa); 405 #define bfa_timer_start(_bfa, _timer, _timercb, _arg, _timeout) \ 406 bfa_timer_begin(&(_bfa)->timer_mod, _timer, _timercb, _arg, _timeout) 407 408 #endif /* __BFA_H__ */ 409