1 /** 2 * Copyright (C) 2005 - 2010 ServerEngines 3 * All rights reserved. 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License version 2 7 * as published by the Free Software Foundation. The full GNU General 8 * Public License is included in this distribution in the file called COPYING. 9 * 10 * Contact Information: 11 * linux-drivers@serverengines.com 12 * 13 * ServerEngines 14 * 209 N. Fair Oaks Ave 15 * Sunnyvale, CA 94085 16 */ 17 18 #ifndef BEISCSI_CMDS_H 19 #define BEISCSI_CMDS_H 20 21 /** 22 * The driver sends configuration and managements command requests to the 23 * firmware in the BE. These requests are communicated to the processor 24 * using Work Request Blocks (WRBs) submitted to the MCC-WRB ring or via one 25 * WRB inside a MAILBOX. 26 * The commands are serviced by the ARM processor in the BladeEngine's MPU. 27 */ 28 struct be_sge { 29 u32 pa_lo; 30 u32 pa_hi; 31 u32 len; 32 }; 33 34 #define MCC_WRB_SGE_CNT_SHIFT 3 /* bits 3 - 7 of dword 0 */ 35 #define MCC_WRB_SGE_CNT_MASK 0x1F /* bits 3 - 7 of dword 0 */ 36 struct be_mcc_wrb { 37 u32 embedded; /* dword 0 */ 38 u32 payload_length; /* dword 1 */ 39 u32 tag0; /* dword 2 */ 40 u32 tag1; /* dword 3 */ 41 u32 rsvd; /* dword 4 */ 42 union { 43 u8 embedded_payload[236]; /* used by embedded cmds */ 44 struct be_sge sgl[19]; /* used by non-embedded cmds */ 45 } payload; 46 }; 47 48 #define CQE_FLAGS_VALID_MASK (1 << 31) 49 #define CQE_FLAGS_ASYNC_MASK (1 << 30) 50 #define CQE_FLAGS_COMPLETED_MASK (1 << 28) 51 #define CQE_FLAGS_CONSUMED_MASK (1 << 27) 52 53 /* Completion Status */ 54 #define MCC_STATUS_SUCCESS 0x0 55 56 #define CQE_STATUS_COMPL_MASK 0xFFFF 57 #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ 58 #define CQE_STATUS_EXTD_MASK 0xFFFF 59 #define CQE_STATUS_EXTD_SHIFT 16 /* bits 0 - 15 */ 60 61 struct be_mcc_compl { 62 u32 status; /* dword 0 */ 63 u32 tag0; /* dword 1 */ 64 u32 tag1; /* dword 2 */ 65 u32 flags; /* dword 3 */ 66 }; 67 68 /********* Mailbox door bell *************/ 69 /** 70 * Used for driver communication with the FW. 71 * The software must write this register twice to post any command. First, 72 * it writes the register with hi=1 and the upper bits of the physical address 73 * for the MAILBOX structure. Software must poll the ready bit until this 74 * is acknowledged. Then, sotware writes the register with hi=0 with the lower 75 * bits in the address. It must poll the ready bit until the command is 76 * complete. Upon completion, the MAILBOX will contain a valid completion 77 * queue entry. 78 */ 79 #define MPU_MAILBOX_DB_OFFSET 0x160 80 #define MPU_MAILBOX_DB_RDY_MASK 0x1 /* bit 0 */ 81 #define MPU_MAILBOX_DB_HI_MASK 0x2 /* bit 1 */ 82 83 /********** MPU semphore ******************/ 84 #define MPU_EP_SEMAPHORE_OFFSET 0xac 85 #define EP_SEMAPHORE_POST_STAGE_MASK 0x0000FFFF 86 #define EP_SEMAPHORE_POST_ERR_MASK 0x1 87 #define EP_SEMAPHORE_POST_ERR_SHIFT 31 88 89 /********** MCC door bell ************/ 90 #define DB_MCCQ_OFFSET 0x140 91 #define DB_MCCQ_RING_ID_MASK 0x7FF /* bits 0 - 10 */ 92 /* Number of entries posted */ 93 #define DB_MCCQ_NUM_POSTED_SHIFT 16 /* bits 16 - 29 */ 94 95 /* MPU semphore POST stage values */ 96 #define POST_STAGE_ARMFW_RDY 0xc000 /* FW is done with POST */ 97 98 /** 99 * When the async bit of mcc_compl is set, the last 4 bytes of 100 * mcc_compl is interpreted as follows: 101 */ 102 #define ASYNC_TRAILER_EVENT_CODE_SHIFT 8 /* bits 8 - 15 */ 103 #define ASYNC_TRAILER_EVENT_CODE_MASK 0xFF 104 #define ASYNC_EVENT_CODE_LINK_STATE 0x1 105 struct be_async_event_trailer { 106 u32 code; 107 }; 108 109 enum { 110 ASYNC_EVENT_LINK_DOWN = 0x0, 111 ASYNC_EVENT_LINK_UP = 0x1 112 }; 113 114 /** 115 * When the event code of an async trailer is link-state, the mcc_compl 116 * must be interpreted as follows 117 */ 118 struct be_async_event_link_state { 119 u8 physical_port; 120 u8 port_link_status; 121 u8 port_duplex; 122 u8 port_speed; 123 u8 port_fault; 124 u8 rsvd0[7]; 125 struct be_async_event_trailer trailer; 126 } __packed; 127 128 struct be_mcc_mailbox { 129 struct be_mcc_wrb wrb; 130 struct be_mcc_compl compl; 131 }; 132 133 /* Type of subsystems supported by FW */ 134 #define CMD_SUBSYSTEM_COMMON 0x1 135 #define CMD_SUBSYSTEM_ISCSI 0x2 136 #define CMD_SUBSYSTEM_ETH 0x3 137 #define CMD_SUBSYSTEM_ISCSI_INI 0x6 138 #define CMD_COMMON_TCP_UPLOAD 0x1 139 140 /** 141 * List of common opcodes subsystem CMD_SUBSYSTEM_COMMON 142 * These opcodes are unique for each subsystem defined above 143 */ 144 #define OPCODE_COMMON_CQ_CREATE 12 145 #define OPCODE_COMMON_EQ_CREATE 13 146 #define OPCODE_COMMON_MCC_CREATE 21 147 #define OPCODE_COMMON_GET_CNTL_ATTRIBUTES 32 148 #define OPCODE_COMMON_GET_FW_VERSION 35 149 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 150 #define OPCODE_COMMON_FIRMWARE_CONFIG 42 151 #define OPCODE_COMMON_MCC_DESTROY 53 152 #define OPCODE_COMMON_CQ_DESTROY 54 153 #define OPCODE_COMMON_EQ_DESTROY 55 154 #define OPCODE_COMMON_QUERY_FIRMWARE_CONFIG 58 155 #define OPCODE_COMMON_FUNCTION_RESET 61 156 157 /** 158 * LIST of opcodes that are common between Initiator and Target 159 * used by CMD_SUBSYSTEM_ISCSI 160 * These opcodes are unique for each subsystem defined above 161 */ 162 #define OPCODE_COMMON_ISCSI_CFG_POST_SGL_PAGES 2 163 #define OPCODE_COMMON_ISCSI_CFG_REMOVE_SGL_PAGES 3 164 #define OPCODE_COMMON_ISCSI_NTWK_GET_NIC_CONFIG 7 165 #define OPCODE_COMMON_ISCSI_NTWK_SET_VLAN 14 166 #define OPCODE_COMMON_ISCSI_NTWK_CONFIGURE_STATELESS_IP_ADDR 17 167 #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_IP_ADDR 21 168 #define OPCODE_COMMON_ISCSI_NTWK_GET_DEFAULT_GATEWAY 22 169 #define OPCODE_COMMON_ISCSI_NTWK_MODIFY_DEFAULT_GATEWAY 23 170 #define OPCODE_COMMON_ISCSI_NTWK_GET_ALL_IF_ID 24 171 #define OPCODE_COMMON_ISCSI_NTWK_GET_IF_INFO 25 172 #define OPCODE_COMMON_ISCSI_SET_FRAGNUM_BITS_FOR_SGL_CRA 61 173 #define OPCODE_COMMON_ISCSI_DEFQ_CREATE 64 174 #define OPCODE_COMMON_ISCSI_DEFQ_DESTROY 65 175 #define OPCODE_COMMON_ISCSI_WRBQ_CREATE 66 176 #define OPCODE_COMMON_ISCSI_WRBQ_DESTROY 67 177 178 struct be_cmd_req_hdr { 179 u8 opcode; /* dword 0 */ 180 u8 subsystem; /* dword 0 */ 181 u8 port_number; /* dword 0 */ 182 u8 domain; /* dword 0 */ 183 u32 timeout; /* dword 1 */ 184 u32 request_length; /* dword 2 */ 185 u32 rsvd0; /* dword 3 */ 186 }; 187 188 struct be_cmd_resp_hdr { 189 u32 info; /* dword 0 */ 190 u32 status; /* dword 1 */ 191 u32 response_length; /* dword 2 */ 192 u32 actual_resp_len; /* dword 3 */ 193 }; 194 195 struct phys_addr { 196 u32 lo; 197 u32 hi; 198 }; 199 200 /************************** 201 * BE Command definitions * 202 **************************/ 203 204 /** 205 * Pseudo amap definition in which each bit of the actual structure is defined 206 * as a byte - used to calculate offset/shift/mask of each field 207 */ 208 struct amap_eq_context { 209 u8 cidx[13]; /* dword 0 */ 210 u8 rsvd0[3]; /* dword 0 */ 211 u8 epidx[13]; /* dword 0 */ 212 u8 valid; /* dword 0 */ 213 u8 rsvd1; /* dword 0 */ 214 u8 size; /* dword 0 */ 215 u8 pidx[13]; /* dword 1 */ 216 u8 rsvd2[3]; /* dword 1 */ 217 u8 pd[10]; /* dword 1 */ 218 u8 count[3]; /* dword 1 */ 219 u8 solevent; /* dword 1 */ 220 u8 stalled; /* dword 1 */ 221 u8 armed; /* dword 1 */ 222 u8 rsvd3[4]; /* dword 2 */ 223 u8 func[8]; /* dword 2 */ 224 u8 rsvd4; /* dword 2 */ 225 u8 delaymult[10]; /* dword 2 */ 226 u8 rsvd5[2]; /* dword 2 */ 227 u8 phase[2]; /* dword 2 */ 228 u8 nodelay; /* dword 2 */ 229 u8 rsvd6[4]; /* dword 2 */ 230 u8 rsvd7[32]; /* dword 3 */ 231 } __packed; 232 233 struct be_cmd_req_eq_create { 234 struct be_cmd_req_hdr hdr; /* dw[4] */ 235 u16 num_pages; /* sword */ 236 u16 rsvd0; /* sword */ 237 u8 context[sizeof(struct amap_eq_context) / 8]; /* dw[4] */ 238 struct phys_addr pages[8]; 239 } __packed; 240 241 struct be_cmd_resp_eq_create { 242 struct be_cmd_resp_hdr resp_hdr; 243 u16 eq_id; /* sword */ 244 u16 rsvd0; /* sword */ 245 } __packed; 246 247 struct mgmt_chap_format { 248 u32 flags; 249 u8 intr_chap_name[256]; 250 u8 intr_secret[16]; 251 u8 target_chap_name[256]; 252 u8 target_secret[16]; 253 u16 intr_chap_name_length; 254 u16 intr_secret_length; 255 u16 target_chap_name_length; 256 u16 target_secret_length; 257 } __packed; 258 259 struct mgmt_auth_method_format { 260 u8 auth_method_type; 261 u8 padding[3]; 262 struct mgmt_chap_format chap; 263 } __packed; 264 265 struct mgmt_conn_login_options { 266 u8 flags; 267 u8 header_digest; 268 u8 data_digest; 269 u8 rsvd0; 270 u32 max_recv_datasegment_len_ini; 271 u32 max_recv_datasegment_len_tgt; 272 u32 tcp_mss; 273 u32 tcp_window_size; 274 struct mgmt_auth_method_format auth_data; 275 } __packed; 276 277 struct ip_address_format { 278 u16 size_of_structure; 279 u8 reserved; 280 u8 ip_type; 281 u8 ip_address[16]; 282 u32 rsvd0; 283 } __packed; 284 285 struct mgmt_conn_info { 286 u32 connection_handle; 287 u32 connection_status; 288 u16 src_port; 289 u16 dest_port; 290 u16 dest_port_redirected; 291 u16 cid; 292 u32 estimated_throughput; 293 struct ip_address_format src_ipaddr; 294 struct ip_address_format dest_ipaddr; 295 struct ip_address_format dest_ipaddr_redirected; 296 struct mgmt_conn_login_options negotiated_login_options; 297 } __packed; 298 299 struct mgmt_session_login_options { 300 u8 flags; 301 u8 error_recovery_level; 302 u16 rsvd0; 303 u32 first_burst_length; 304 u32 max_burst_length; 305 u16 max_connections; 306 u16 max_outstanding_r2t; 307 u16 default_time2wait; 308 u16 default_time2retain; 309 } __packed; 310 311 struct mgmt_session_info { 312 u32 session_handle; 313 u32 status; 314 u8 isid[6]; 315 u16 tsih; 316 u32 session_flags; 317 u16 conn_count; 318 u16 pad; 319 u8 target_name[224]; 320 u8 initiator_iscsiname[224]; 321 struct mgmt_session_login_options negotiated_login_options; 322 struct mgmt_conn_info conn_list[1]; 323 } __packed; 324 325 struct be_cmd_req_get_session { 326 struct be_cmd_req_hdr hdr; 327 u32 session_handle; 328 } __packed; 329 330 struct be_cmd_resp_get_session { 331 struct be_cmd_resp_hdr hdr; 332 struct mgmt_session_info session_info; 333 } __packed; 334 335 struct mac_addr { 336 u16 size_of_struct; 337 u8 addr[ETH_ALEN]; 338 } __packed; 339 340 struct be_cmd_req_get_boot_target { 341 struct be_cmd_req_hdr hdr; 342 } __packed; 343 344 struct be_cmd_resp_get_boot_target { 345 struct be_cmd_resp_hdr hdr; 346 u32 boot_session_count; 347 int boot_session_handle; 348 }; 349 350 struct be_cmd_req_mac_query { 351 struct be_cmd_req_hdr hdr; 352 u8 type; 353 u8 permanent; 354 u16 if_id; 355 } __packed; 356 357 struct be_cmd_resp_mac_query { 358 struct be_cmd_resp_hdr hdr; 359 struct mac_addr mac; 360 }; 361 362 /******************** Create CQ ***************************/ 363 /** 364 * Pseudo amap definition in which each bit of the actual structure is defined 365 * as a byte - used to calculate offset/shift/mask of each field 366 */ 367 struct amap_cq_context { 368 u8 cidx[11]; /* dword 0 */ 369 u8 rsvd0; /* dword 0 */ 370 u8 coalescwm[2]; /* dword 0 */ 371 u8 nodelay; /* dword 0 */ 372 u8 epidx[11]; /* dword 0 */ 373 u8 rsvd1; /* dword 0 */ 374 u8 count[2]; /* dword 0 */ 375 u8 valid; /* dword 0 */ 376 u8 solevent; /* dword 0 */ 377 u8 eventable; /* dword 0 */ 378 u8 pidx[11]; /* dword 1 */ 379 u8 rsvd2; /* dword 1 */ 380 u8 pd[10]; /* dword 1 */ 381 u8 eqid[8]; /* dword 1 */ 382 u8 stalled; /* dword 1 */ 383 u8 armed; /* dword 1 */ 384 u8 rsvd3[4]; /* dword 2 */ 385 u8 func[8]; /* dword 2 */ 386 u8 rsvd4[20]; /* dword 2 */ 387 u8 rsvd5[32]; /* dword 3 */ 388 } __packed; 389 390 struct be_cmd_req_cq_create { 391 struct be_cmd_req_hdr hdr; 392 u16 num_pages; 393 u16 rsvd0; 394 u8 context[sizeof(struct amap_cq_context) / 8]; 395 struct phys_addr pages[4]; 396 } __packed; 397 398 struct be_cmd_resp_cq_create { 399 struct be_cmd_resp_hdr hdr; 400 u16 cq_id; 401 u16 rsvd0; 402 } __packed; 403 404 /******************** Create MCCQ ***************************/ 405 /** 406 * Pseudo amap definition in which each bit of the actual structure is defined 407 * as a byte - used to calculate offset/shift/mask of each field 408 */ 409 struct amap_mcc_context { 410 u8 con_index[14]; 411 u8 rsvd0[2]; 412 u8 ring_size[4]; 413 u8 fetch_wrb; 414 u8 fetch_r2t; 415 u8 cq_id[10]; 416 u8 prod_index[14]; 417 u8 fid[8]; 418 u8 pdid[9]; 419 u8 valid; 420 u8 rsvd1[32]; 421 u8 rsvd2[32]; 422 } __packed; 423 424 struct be_cmd_req_mcc_create { 425 struct be_cmd_req_hdr hdr; 426 u16 num_pages; 427 u16 rsvd0; 428 u8 context[sizeof(struct amap_mcc_context) / 8]; 429 struct phys_addr pages[8]; 430 } __packed; 431 432 struct be_cmd_resp_mcc_create { 433 struct be_cmd_resp_hdr hdr; 434 u16 id; 435 u16 rsvd0; 436 } __packed; 437 438 /******************** Q Destroy ***************************/ 439 /* Type of Queue to be destroyed */ 440 enum { 441 QTYPE_EQ = 1, 442 QTYPE_CQ, 443 QTYPE_MCCQ, 444 QTYPE_WRBQ, 445 QTYPE_DPDUQ, 446 QTYPE_SGL 447 }; 448 449 struct be_cmd_req_q_destroy { 450 struct be_cmd_req_hdr hdr; 451 u16 id; 452 u16 bypass_flush; /* valid only for rx q destroy */ 453 } __packed; 454 455 struct macaddr { 456 u8 byte[ETH_ALEN]; 457 }; 458 459 struct be_cmd_req_mcast_mac_config { 460 struct be_cmd_req_hdr hdr; 461 u16 num_mac; 462 u8 promiscuous; 463 u8 interface_id; 464 struct macaddr mac[32]; 465 } __packed; 466 467 static inline void *embedded_payload(struct be_mcc_wrb *wrb) 468 { 469 return wrb->payload.embedded_payload; 470 } 471 472 static inline struct be_sge *nonembedded_sgl(struct be_mcc_wrb *wrb) 473 { 474 return &wrb->payload.sgl[0]; 475 } 476 477 /******************** Modify EQ Delay *******************/ 478 struct be_cmd_req_modify_eq_delay { 479 struct be_cmd_req_hdr hdr; 480 u32 num_eq; 481 struct { 482 u32 eq_id; 483 u32 phase; 484 u32 delay_multiplier; 485 } delay[8]; 486 } __packed; 487 488 /******************** Get MAC ADDR *******************/ 489 490 #define ETH_ALEN 6 491 492 struct be_cmd_req_get_mac_addr { 493 struct be_cmd_req_hdr hdr; 494 u32 nic_port_count; 495 u32 speed; 496 u32 max_speed; 497 u32 link_state; 498 u32 max_frame_size; 499 u16 size_of_structure; 500 u8 mac_address[ETH_ALEN]; 501 u32 rsvd[23]; 502 }; 503 504 struct be_cmd_resp_get_mac_addr { 505 struct be_cmd_resp_hdr hdr; 506 u32 nic_port_count; 507 u32 speed; 508 u32 max_speed; 509 u32 link_state; 510 u32 max_frame_size; 511 u16 size_of_structure; 512 u8 mac_address[6]; 513 u32 rsvd[23]; 514 }; 515 516 int beiscsi_cmd_eq_create(struct be_ctrl_info *ctrl, 517 struct be_queue_info *eq, int eq_delay); 518 519 int beiscsi_cmd_cq_create(struct be_ctrl_info *ctrl, 520 struct be_queue_info *cq, struct be_queue_info *eq, 521 bool sol_evts, bool no_delay, 522 int num_cqe_dma_coalesce); 523 524 int beiscsi_cmd_q_destroy(struct be_ctrl_info *ctrl, struct be_queue_info *q, 525 int type); 526 int beiscsi_cmd_mccq_create(struct beiscsi_hba *phba, 527 struct be_queue_info *mccq, 528 struct be_queue_info *cq); 529 530 int be_poll_mcc(struct be_ctrl_info *ctrl); 531 int mgmt_check_supported_fw(struct be_ctrl_info *ctrl, 532 struct beiscsi_hba *phba); 533 unsigned int be_cmd_get_mac_addr(struct beiscsi_hba *phba); 534 unsigned int beiscsi_get_boot_target(struct beiscsi_hba *phba); 535 unsigned int beiscsi_get_session_info(struct beiscsi_hba *phba, 536 u32 boot_session_handle, 537 struct be_dma_mem *nonemb_cmd); 538 539 void free_mcc_tag(struct be_ctrl_info *ctrl, unsigned int tag); 540 /*ISCSI Functuions */ 541 int be_cmd_fw_initialize(struct be_ctrl_info *ctrl); 542 543 struct be_mcc_wrb *wrb_from_mbox(struct be_dma_mem *mbox_mem); 544 struct be_mcc_wrb *wrb_from_mccq(struct beiscsi_hba *phba); 545 int be_mcc_notify_wait(struct beiscsi_hba *phba); 546 void be_mcc_notify(struct beiscsi_hba *phba); 547 unsigned int alloc_mcc_tag(struct beiscsi_hba *phba); 548 void beiscsi_async_link_state_process(struct beiscsi_hba *phba, 549 struct be_async_event_link_state *evt); 550 int be_mcc_compl_process_isr(struct be_ctrl_info *ctrl, 551 struct be_mcc_compl *compl); 552 553 int be_mbox_notify(struct be_ctrl_info *ctrl); 554 555 int be_cmd_create_default_pdu_queue(struct be_ctrl_info *ctrl, 556 struct be_queue_info *cq, 557 struct be_queue_info *dq, int length, 558 int entry_size); 559 560 int be_cmd_iscsi_post_sgl_pages(struct be_ctrl_info *ctrl, 561 struct be_dma_mem *q_mem, u32 page_offset, 562 u32 num_pages); 563 564 int be_cmd_wrbq_create(struct be_ctrl_info *ctrl, struct be_dma_mem *q_mem, 565 struct be_queue_info *wrbq); 566 567 bool is_link_state_evt(u32 trailer); 568 569 struct be_default_pdu_context { 570 u32 dw[4]; 571 } __packed; 572 573 struct amap_be_default_pdu_context { 574 u8 dbuf_cindex[13]; /* dword 0 */ 575 u8 rsvd0[3]; /* dword 0 */ 576 u8 ring_size[4]; /* dword 0 */ 577 u8 ring_state[4]; /* dword 0 */ 578 u8 rsvd1[8]; /* dword 0 */ 579 u8 dbuf_pindex[13]; /* dword 1 */ 580 u8 rsvd2; /* dword 1 */ 581 u8 pci_func_id[8]; /* dword 1 */ 582 u8 rx_pdid[9]; /* dword 1 */ 583 u8 rx_pdid_valid; /* dword 1 */ 584 u8 default_buffer_size[16]; /* dword 2 */ 585 u8 cq_id_recv[10]; /* dword 2 */ 586 u8 rx_pdid_not_valid; /* dword 2 */ 587 u8 rsvd3[5]; /* dword 2 */ 588 u8 rsvd4[32]; /* dword 3 */ 589 } __packed; 590 591 struct be_defq_create_req { 592 struct be_cmd_req_hdr hdr; 593 u16 num_pages; 594 u8 ulp_num; 595 u8 rsvd0; 596 struct be_default_pdu_context context; 597 struct phys_addr pages[8]; 598 } __packed; 599 600 struct be_defq_create_resp { 601 struct be_cmd_req_hdr hdr; 602 u16 id; 603 u16 rsvd0; 604 } __packed; 605 606 struct be_post_sgl_pages_req { 607 struct be_cmd_req_hdr hdr; 608 u16 num_pages; 609 u16 page_offset; 610 u32 rsvd0; 611 struct phys_addr pages[26]; 612 u32 rsvd1; 613 } __packed; 614 615 struct be_wrbq_create_req { 616 struct be_cmd_req_hdr hdr; 617 u16 num_pages; 618 u8 ulp_num; 619 u8 rsvd0; 620 struct phys_addr pages[8]; 621 } __packed; 622 623 struct be_wrbq_create_resp { 624 struct be_cmd_resp_hdr resp_hdr; 625 u16 cid; 626 u16 rsvd0; 627 } __packed; 628 629 #define SOL_CID_MASK 0x0000FFC0 630 #define SOL_CODE_MASK 0x0000003F 631 #define SOL_WRB_INDEX_MASK 0x00FF0000 632 #define SOL_CMD_WND_MASK 0xFF000000 633 #define SOL_RES_CNT_MASK 0x7FFFFFFF 634 #define SOL_EXP_CMD_SN_MASK 0xFFFFFFFF 635 #define SOL_HW_STS_MASK 0x000000FF 636 #define SOL_STS_MASK 0x0000FF00 637 #define SOL_RESP_MASK 0x00FF0000 638 #define SOL_FLAGS_MASK 0x7F000000 639 #define SOL_S_MASK 0x80000000 640 641 struct sol_cqe { 642 u32 dw[4]; 643 }; 644 645 struct amap_sol_cqe { 646 u8 hw_sts[8]; /* dword 0 */ 647 u8 i_sts[8]; /* dword 0 */ 648 u8 i_resp[8]; /* dword 0 */ 649 u8 i_flags[7]; /* dword 0 */ 650 u8 s; /* dword 0 */ 651 u8 i_exp_cmd_sn[32]; /* dword 1 */ 652 u8 code[6]; /* dword 2 */ 653 u8 cid[10]; /* dword 2 */ 654 u8 wrb_index[8]; /* dword 2 */ 655 u8 i_cmd_wnd[8]; /* dword 2 */ 656 u8 i_res_cnt[31]; /* dword 3 */ 657 u8 valid; /* dword 3 */ 658 } __packed; 659 660 #define SOL_ICD_INDEX_MASK 0x0003FFC0 661 struct amap_sol_cqe_ring { 662 u8 hw_sts[8]; /* dword 0 */ 663 u8 i_sts[8]; /* dword 0 */ 664 u8 i_resp[8]; /* dword 0 */ 665 u8 i_flags[7]; /* dword 0 */ 666 u8 s; /* dword 0 */ 667 u8 i_exp_cmd_sn[32]; /* dword 1 */ 668 u8 code[6]; /* dword 2 */ 669 u8 icd_index[12]; /* dword 2 */ 670 u8 rsvd[6]; /* dword 2 */ 671 u8 i_cmd_wnd[8]; /* dword 2 */ 672 u8 i_res_cnt[31]; /* dword 3 */ 673 u8 valid; /* dword 3 */ 674 } __packed; 675 676 677 678 /** 679 * Post WRB Queue Doorbell Register used by the host Storage 680 * stack to notify the 681 * controller of a posted Work Request Block 682 */ 683 #define DB_WRB_POST_CID_MASK 0x3FF /* bits 0 - 9 */ 684 #define DB_DEF_PDU_WRB_INDEX_MASK 0xFF /* bits 0 - 9 */ 685 686 #define DB_DEF_PDU_WRB_INDEX_SHIFT 16 687 #define DB_DEF_PDU_NUM_POSTED_SHIFT 24 688 689 struct fragnum_bits_for_sgl_cra_in { 690 struct be_cmd_req_hdr hdr; 691 u32 num_bits; 692 } __packed; 693 694 struct iscsi_cleanup_req { 695 struct be_cmd_req_hdr hdr; 696 u16 chute; 697 u8 hdr_ring_id; 698 u8 data_ring_id; 699 700 } __packed; 701 702 struct eq_delay { 703 u32 eq_id; 704 u32 phase; 705 u32 delay_multiplier; 706 } __packed; 707 708 struct be_eq_delay_params_in { 709 struct be_cmd_req_hdr hdr; 710 u32 num_eq; 711 struct eq_delay delay[8]; 712 } __packed; 713 714 struct tcp_connect_and_offload_in { 715 struct be_cmd_req_hdr hdr; 716 struct ip_address_format ip_address; 717 u16 tcp_port; 718 u16 cid; 719 u16 cq_id; 720 u16 defq_id; 721 struct phys_addr dataout_template_pa; 722 u16 hdr_ring_id; 723 u16 data_ring_id; 724 u8 do_offload; 725 u8 rsvd0[3]; 726 } __packed; 727 728 struct tcp_connect_and_offload_out { 729 struct be_cmd_resp_hdr hdr; 730 u32 connection_handle; 731 u16 cid; 732 u16 rsvd0; 733 734 } __packed; 735 736 struct be_mcc_wrb_context { 737 struct MCC_WRB *wrb; 738 int *users_final_status; 739 } __packed; 740 741 #define DB_DEF_PDU_RING_ID_MASK 0x3FF /* bits 0 - 9 */ 742 #define DB_DEF_PDU_CQPROC_MASK 0x3FFF /* bits 0 - 9 */ 743 #define DB_DEF_PDU_REARM_SHIFT 14 744 #define DB_DEF_PDU_EVENT_SHIFT 15 745 #define DB_DEF_PDU_CQPROC_SHIFT 16 746 747 struct dmsg_cqe { 748 u32 dw[4]; 749 } __packed; 750 751 struct tcp_upload_params_in { 752 struct be_cmd_req_hdr hdr; 753 u16 id; 754 u16 upload_type; 755 u32 reset_seq; 756 } __packed; 757 758 struct tcp_upload_params_out { 759 u32 dw[32]; 760 } __packed; 761 762 union tcp_upload_params { 763 struct tcp_upload_params_in request; 764 struct tcp_upload_params_out response; 765 } __packed; 766 767 struct be_ulp_fw_cfg { 768 u32 ulp_mode; 769 u32 etx_base; 770 u32 etx_count; 771 u32 sq_base; 772 u32 sq_count; 773 u32 rq_base; 774 u32 rq_count; 775 u32 dq_base; 776 u32 dq_count; 777 u32 lro_base; 778 u32 lro_count; 779 u32 icd_base; 780 u32 icd_count; 781 }; 782 783 struct be_fw_cfg { 784 struct be_cmd_req_hdr hdr; 785 u32 be_config_number; 786 u32 asic_revision; 787 u32 phys_port; 788 u32 function_mode; 789 struct be_ulp_fw_cfg ulp[2]; 790 u32 function_caps; 791 } __packed; 792 793 struct be_all_if_id { 794 struct be_cmd_req_hdr hdr; 795 u32 if_count; 796 u32 if_hndl_list[1]; 797 } __packed; 798 799 #define ISCSI_OPCODE_SCSI_DATA_OUT 5 800 #define OPCODE_COMMON_MODIFY_EQ_DELAY 41 801 #define OPCODE_COMMON_ISCSI_CLEANUP 59 802 #define OPCODE_COMMON_TCP_UPLOAD 56 803 #define OPCODE_COMMON_ISCSI_TCP_CONNECT_AND_OFFLOAD 70 804 #define OPCODE_COMMON_ISCSI_ERROR_RECOVERY_INVALIDATE_COMMANDS 1 805 #define OPCODE_ISCSI_INI_CFG_GET_HBA_NAME 6 806 #define OPCODE_ISCSI_INI_CFG_SET_HBA_NAME 7 807 #define OPCODE_ISCSI_INI_SESSION_GET_A_SESSION 14 808 #define OPCODE_ISCSI_INI_DRIVER_OFFLOAD_SESSION 41 809 #define OPCODE_ISCSI_INI_DRIVER_INVALIDATE_CONNECTION 42 810 #define OPCODE_ISCSI_INI_BOOT_GET_BOOT_TARGET 52 811 812 /* --- CMD_ISCSI_INVALIDATE_CONNECTION_TYPE --- */ 813 #define CMD_ISCSI_COMMAND_INVALIDATE 1 814 #define CMD_ISCSI_CONNECTION_INVALIDATE 0x8001 815 #define CMD_ISCSI_CONNECTION_ISSUE_TCP_RST 0x8002 816 817 #define INI_WR_CMD 1 /* Initiator write command */ 818 #define INI_TMF_CMD 2 /* Initiator TMF command */ 819 #define INI_NOPOUT_CMD 3 /* Initiator; Send a NOP-OUT */ 820 #define INI_RD_CMD 5 /* Initiator requesting to send 821 * a read command 822 */ 823 #define TGT_CTX_UPDT_CMD 7 /* Target context update */ 824 #define TGT_STS_CMD 8 /* Target R2T and other BHS 825 * where only the status number 826 * need to be updated 827 */ 828 #define TGT_DATAIN_CMD 9 /* Target Data-Ins in response 829 * to read command 830 */ 831 #define TGT_SOS_PDU 10 /* Target:standalone status 832 * response 833 */ 834 #define TGT_DM_CMD 11 /* Indicates that the bhs 835 * preparedby 836 * driver should not be touched 837 */ 838 /* --- CMD_CHUTE_TYPE --- */ 839 #define CMD_CONNECTION_CHUTE_0 1 840 #define CMD_CONNECTION_CHUTE_1 2 841 #define CMD_CONNECTION_CHUTE_2 3 842 843 #define EQ_MAJOR_CODE_COMPLETION 0 844 845 #define CMD_ISCSI_SESSION_DEL_CFG_FROM_FLASH 0 846 #define CMD_ISCSI_SESSION_SAVE_CFG_ON_FLASH 1 847 848 /* --- CONNECTION_UPLOAD_PARAMS --- */ 849 /* These parameters are used to define the type of upload desired. */ 850 #define CONNECTION_UPLOAD_GRACEFUL 1 /* Graceful upload */ 851 #define CONNECTION_UPLOAD_ABORT_RESET 2 /* Abortive upload with 852 * reset 853 */ 854 #define CONNECTION_UPLOAD_ABORT 3 /* Abortive upload without 855 * reset 856 */ 857 #define CONNECTION_UPLOAD_ABORT_WITH_SEQ 4 /* Abortive upload with reset, 858 * sequence number by driver */ 859 860 /* Returns byte size of given field with a structure. */ 861 862 /* Returns the number of items in the field array. */ 863 #define BE_NUMBER_OF_FIELD(_type_, _field_) \ 864 (FIELD_SIZEOF(_type_, _field_)/sizeof((((_type_ *)0)->_field_[0])))\ 865 866 /** 867 * Different types of iSCSI completions to host driver for both initiator 868 * and taget mode 869 * of operation. 870 */ 871 #define SOL_CMD_COMPLETE 1 /* Solicited command completed 872 * normally 873 */ 874 #define SOL_CMD_KILLED_DATA_DIGEST_ERR 2 /* Solicited command got 875 * invalidated internally due 876 * to Data Digest error 877 */ 878 #define CXN_KILLED_PDU_SIZE_EXCEEDS_DSL 3 /* Connection got invalidated 879 * internally 880 * due to a recieved PDU 881 * size > DSL 882 */ 883 #define CXN_KILLED_BURST_LEN_MISMATCH 4 /* Connection got invalidated 884 * internally due ti received 885 * PDU sequence size > 886 * FBL/MBL. 887 */ 888 #define CXN_KILLED_AHS_RCVD 5 /* Connection got invalidated 889 * internally due to a recieved 890 * PDU Hdr that has 891 * AHS */ 892 #define CXN_KILLED_HDR_DIGEST_ERR 6 /* Connection got invalidated 893 * internally due to Hdr Digest 894 * error 895 */ 896 #define CXN_KILLED_UNKNOWN_HDR 7 /* Connection got invalidated 897 * internally 898 * due to a bad opcode in the 899 * pdu hdr 900 */ 901 #define CXN_KILLED_STALE_ITT_TTT_RCVD 8 /* Connection got invalidated 902 * internally due to a recieved 903 * ITT/TTT that does not belong 904 * to this Connection 905 */ 906 #define CXN_KILLED_INVALID_ITT_TTT_RCVD 9 /* Connection got invalidated 907 * internally due to recieved 908 * ITT/TTT value > Max 909 * Supported ITTs/TTTs 910 */ 911 #define CXN_KILLED_RST_RCVD 10 /* Connection got invalidated 912 * internally due to an 913 * incoming TCP RST 914 */ 915 #define CXN_KILLED_TIMED_OUT 11 /* Connection got invalidated 916 * internally due to timeout on 917 * tcp segment 12 retransmit 918 * attempts failed 919 */ 920 #define CXN_KILLED_RST_SENT 12 /* Connection got invalidated 921 * internally due to TCP RST 922 * sent by the Tx side 923 */ 924 #define CXN_KILLED_FIN_RCVD 13 /* Connection got invalidated 925 * internally due to an 926 * incoming TCP FIN. 927 */ 928 #define CXN_KILLED_BAD_UNSOL_PDU_RCVD 14 /* Connection got invalidated 929 * internally due to bad 930 * unsolicited PDU Unsolicited 931 * PDUs are PDUs with 932 * ITT=0xffffffff 933 */ 934 #define CXN_KILLED_BAD_WRB_INDEX_ERROR 15 /* Connection got invalidated 935 * internally due to bad WRB 936 * index. 937 */ 938 #define CXN_KILLED_OVER_RUN_RESIDUAL 16 /* Command got invalidated 939 * internally due to recived 940 * command has residual 941 * over run bytes. 942 */ 943 #define CXN_KILLED_UNDER_RUN_RESIDUAL 17 /* Command got invalidated 944 * internally due to recived 945 * command has residual under 946 * run bytes. 947 */ 948 #define CMD_KILLED_INVALID_STATSN_RCVD 18 /* Command got invalidated 949 * internally due to a recieved 950 * PDU has an invalid StatusSN 951 */ 952 #define CMD_KILLED_INVALID_R2T_RCVD 19 /* Command got invalidated 953 * internally due to a recieved 954 * an R2T with some invalid 955 * fields in it 956 */ 957 #define CMD_CXN_KILLED_LUN_INVALID 20 /* Command got invalidated 958 * internally due to received 959 * PDU has an invalid LUN. 960 */ 961 #define CMD_CXN_KILLED_ICD_INVALID 21 /* Command got invalidated 962 * internally due to the 963 * corresponding ICD not in a 964 * valid state 965 */ 966 #define CMD_CXN_KILLED_ITT_INVALID 22 /* Command got invalidated due 967 * to received PDU has an 968 * invalid ITT. 969 */ 970 #define CMD_CXN_KILLED_SEQ_OUTOFORDER 23 /* Command got invalidated due 971 * to received sequence buffer 972 * offset is out of order. 973 */ 974 #define CMD_CXN_KILLED_INVALID_DATASN_RCVD 24 /* Command got invalidated 975 * internally due to a 976 * recieved PDU has an invalid 977 * DataSN 978 */ 979 #define CXN_INVALIDATE_NOTIFY 25 /* Connection invalidation 980 * completion notify. 981 */ 982 #define CXN_INVALIDATE_INDEX_NOTIFY 26 /* Connection invalidation 983 * completion 984 * with data PDU index. 985 */ 986 #define CMD_INVALIDATED_NOTIFY 27 /* Command invalidation 987 * completionnotifify. 988 */ 989 #define UNSOL_HDR_NOTIFY 28 /* Unsolicited header notify.*/ 990 #define UNSOL_DATA_NOTIFY 29 /* Unsolicited data notify.*/ 991 #define UNSOL_DATA_DIGEST_ERROR_NOTIFY 30 /* Unsolicited data digest 992 * error notify. 993 */ 994 #define DRIVERMSG_NOTIFY 31 /* TCP acknowledge based 995 * notification. 996 */ 997 #define CXN_KILLED_CMND_DATA_NOT_ON_SAME_CONN 32 /* Connection got invalidated 998 * internally due to command 999 * and data are not on same 1000 * connection. 1001 */ 1002 #define SOL_CMD_KILLED_DIF_ERR 33 /* Solicited command got 1003 * invalidated internally due 1004 * to DIF error 1005 */ 1006 #define CXN_KILLED_SYN_RCVD 34 /* Connection got invalidated 1007 * internally due to incoming 1008 * TCP SYN 1009 */ 1010 #define CXN_KILLED_IMM_DATA_RCVD 35 /* Connection got invalidated 1011 * internally due to an 1012 * incoming Unsolicited PDU 1013 * that has immediate data on 1014 * the cxn 1015 */ 1016 1017 int beiscsi_pci_soft_reset(struct beiscsi_hba *phba); 1018 int be_chk_reset_complete(struct beiscsi_hba *phba); 1019 1020 void be_wrb_hdr_prepare(struct be_mcc_wrb *wrb, int payload_len, 1021 bool embedded, u8 sge_cnt); 1022 1023 void be_cmd_hdr_prepare(struct be_cmd_req_hdr *req_hdr, 1024 u8 subsystem, u8 opcode, int cmd_len); 1025 1026 #endif /* !BEISCSI_CMDS_H */ 1027