1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Nick Cheng, C.L. Huang 6 ** Description: SCSI RAID Device Driver for Areca RAID Controller 7 ******************************************************************************* 8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved 9 ** 10 ** Web site: www.areca.com.tw 11 ** E-mail: support@areca.com.tw 12 ** 13 ** This program is free software; you can redistribute it and/or modify 14 ** it under the terms of the GNU General Public License version 2 as 15 ** published by the Free Software Foundation. 16 ** This program is distributed in the hope that it will be useful, 17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 ** GNU General Public License for more details. 20 ******************************************************************************* 21 ** Redistribution and use in source and binary forms, with or without 22 ** modification, are permitted provided that the following conditions 23 ** are met: 24 ** 1. Redistributions of source code must retain the above copyright 25 ** notice, this list of conditions and the following disclaimer. 26 ** 2. Redistributions in binary form must reproduce the above copyright 27 ** notice, this list of conditions and the following disclaimer in the 28 ** documentation and/or other materials provided with the distribution. 29 ** 3. The name of the author may not be used to endorse or promote products 30 ** derived from this software without specific prior written permission. 31 ** 32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 ******************************************************************************* 43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 44 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 45 ******************************************************************************* 46 */ 47 #include <linux/module.h> 48 #include <linux/reboot.h> 49 #include <linux/spinlock.h> 50 #include <linux/pci_ids.h> 51 #include <linux/interrupt.h> 52 #include <linux/moduleparam.h> 53 #include <linux/errno.h> 54 #include <linux/types.h> 55 #include <linux/delay.h> 56 #include <linux/dma-mapping.h> 57 #include <linux/timer.h> 58 #include <linux/slab.h> 59 #include <linux/pci.h> 60 #include <linux/aer.h> 61 #include <linux/circ_buf.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <asm/uaccess.h> 65 #include <scsi/scsi_host.h> 66 #include <scsi/scsi.h> 67 #include <scsi/scsi_cmnd.h> 68 #include <scsi/scsi_tcq.h> 69 #include <scsi/scsi_device.h> 70 #include <scsi/scsi_transport.h> 71 #include <scsi/scsicam.h> 72 #include "arcmsr.h" 73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>"); 74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver"); 75 MODULE_LICENSE("Dual BSD/GPL"); 76 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 77 78 #define ARCMSR_SLEEPTIME 10 79 #define ARCMSR_RETRYCOUNT 12 80 81 static wait_queue_head_t wait_q; 82 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 83 struct scsi_cmnd *cmd); 84 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 85 static int arcmsr_abort(struct scsi_cmnd *); 86 static int arcmsr_bus_reset(struct scsi_cmnd *); 87 static int arcmsr_bios_param(struct scsi_device *sdev, 88 struct block_device *bdev, sector_t capacity, int *info); 89 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 90 static int arcmsr_probe(struct pci_dev *pdev, 91 const struct pci_device_id *id); 92 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state); 93 static int arcmsr_resume(struct pci_dev *pdev); 94 static void arcmsr_remove(struct pci_dev *pdev); 95 static void arcmsr_shutdown(struct pci_dev *pdev); 96 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 97 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 98 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 99 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 100 u32 intmask_org); 101 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 102 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb); 103 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb); 104 static void arcmsr_request_device_map(unsigned long pacb); 105 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb); 106 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb); 107 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb); 108 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 109 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 110 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 111 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB); 112 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb); 113 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 114 static const char *arcmsr_info(struct Scsi_Host *); 115 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 116 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *); 117 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb); 118 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) 119 { 120 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 121 queue_depth = ARCMSR_MAX_CMD_PERLUN; 122 return scsi_change_queue_depth(sdev, queue_depth); 123 } 124 125 static struct scsi_host_template arcmsr_scsi_host_template = { 126 .module = THIS_MODULE, 127 .name = "Areca SAS/SATA RAID driver", 128 .info = arcmsr_info, 129 .queuecommand = arcmsr_queue_command, 130 .eh_abort_handler = arcmsr_abort, 131 .eh_bus_reset_handler = arcmsr_bus_reset, 132 .bios_param = arcmsr_bios_param, 133 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 134 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 135 .this_id = ARCMSR_SCSI_INITIATOR_ID, 136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 139 .use_clustering = ENABLE_CLUSTERING, 140 .shost_attrs = arcmsr_host_attrs, 141 .no_write_same = 1, 142 }; 143 144 static struct pci_device_id arcmsr_device_id_table[] = { 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110), 146 .driver_data = ACB_ADAPTER_TYPE_A}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120), 148 .driver_data = ACB_ADAPTER_TYPE_A}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130), 150 .driver_data = ACB_ADAPTER_TYPE_A}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160), 152 .driver_data = ACB_ADAPTER_TYPE_A}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170), 154 .driver_data = ACB_ADAPTER_TYPE_A}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200), 156 .driver_data = ACB_ADAPTER_TYPE_B}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201), 158 .driver_data = ACB_ADAPTER_TYPE_B}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202), 160 .driver_data = ACB_ADAPTER_TYPE_B}, 161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203), 162 .driver_data = ACB_ADAPTER_TYPE_B}, 163 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210), 164 .driver_data = ACB_ADAPTER_TYPE_A}, 165 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214), 166 .driver_data = ACB_ADAPTER_TYPE_D}, 167 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220), 168 .driver_data = ACB_ADAPTER_TYPE_A}, 169 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230), 170 .driver_data = ACB_ADAPTER_TYPE_A}, 171 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260), 172 .driver_data = ACB_ADAPTER_TYPE_A}, 173 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270), 174 .driver_data = ACB_ADAPTER_TYPE_A}, 175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280), 176 .driver_data = ACB_ADAPTER_TYPE_A}, 177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380), 178 .driver_data = ACB_ADAPTER_TYPE_A}, 179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381), 180 .driver_data = ACB_ADAPTER_TYPE_A}, 181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680), 182 .driver_data = ACB_ADAPTER_TYPE_A}, 183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681), 184 .driver_data = ACB_ADAPTER_TYPE_A}, 185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880), 186 .driver_data = ACB_ADAPTER_TYPE_C}, 187 {0, 0}, /* Terminating entry */ 188 }; 189 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 190 191 static struct pci_driver arcmsr_pci_driver = { 192 .name = "arcmsr", 193 .id_table = arcmsr_device_id_table, 194 .probe = arcmsr_probe, 195 .remove = arcmsr_remove, 196 .suspend = arcmsr_suspend, 197 .resume = arcmsr_resume, 198 .shutdown = arcmsr_shutdown, 199 }; 200 /* 201 **************************************************************************** 202 **************************************************************************** 203 */ 204 205 static void arcmsr_free_mu(struct AdapterControlBlock *acb) 206 { 207 switch (acb->adapter_type) { 208 case ACB_ADAPTER_TYPE_B: 209 case ACB_ADAPTER_TYPE_D: { 210 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize, 211 acb->dma_coherent2, acb->dma_coherent_handle2); 212 break; 213 } 214 } 215 } 216 217 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 218 { 219 struct pci_dev *pdev = acb->pdev; 220 switch (acb->adapter_type){ 221 case ACB_ADAPTER_TYPE_A:{ 222 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 223 if (!acb->pmuA) { 224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 225 return false; 226 } 227 break; 228 } 229 case ACB_ADAPTER_TYPE_B:{ 230 void __iomem *mem_base0, *mem_base1; 231 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 232 if (!mem_base0) { 233 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 234 return false; 235 } 236 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 237 if (!mem_base1) { 238 iounmap(mem_base0); 239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 240 return false; 241 } 242 acb->mem_base0 = mem_base0; 243 acb->mem_base1 = mem_base1; 244 break; 245 } 246 case ACB_ADAPTER_TYPE_C:{ 247 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 248 if (!acb->pmuC) { 249 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 250 return false; 251 } 252 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 253 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 254 return true; 255 } 256 break; 257 } 258 case ACB_ADAPTER_TYPE_D: { 259 void __iomem *mem_base0; 260 unsigned long addr, range, flags; 261 262 addr = (unsigned long)pci_resource_start(pdev, 0); 263 range = pci_resource_len(pdev, 0); 264 flags = pci_resource_flags(pdev, 0); 265 mem_base0 = ioremap(addr, range); 266 if (!mem_base0) { 267 pr_notice("arcmsr%d: memory mapping region fail\n", 268 acb->host->host_no); 269 return false; 270 } 271 acb->mem_base0 = mem_base0; 272 break; 273 } 274 } 275 return true; 276 } 277 278 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 279 { 280 switch (acb->adapter_type) { 281 case ACB_ADAPTER_TYPE_A:{ 282 iounmap(acb->pmuA); 283 } 284 break; 285 case ACB_ADAPTER_TYPE_B:{ 286 iounmap(acb->mem_base0); 287 iounmap(acb->mem_base1); 288 } 289 290 break; 291 case ACB_ADAPTER_TYPE_C:{ 292 iounmap(acb->pmuC); 293 } 294 break; 295 case ACB_ADAPTER_TYPE_D: 296 iounmap(acb->mem_base0); 297 break; 298 } 299 } 300 301 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 302 { 303 irqreturn_t handle_state; 304 struct AdapterControlBlock *acb = dev_id; 305 306 handle_state = arcmsr_interrupt(acb); 307 return handle_state; 308 } 309 310 static int arcmsr_bios_param(struct scsi_device *sdev, 311 struct block_device *bdev, sector_t capacity, int *geom) 312 { 313 int ret, heads, sectors, cylinders, total_capacity; 314 unsigned char *buffer;/* return copy of block device's partition table */ 315 316 buffer = scsi_bios_ptable(bdev); 317 if (buffer) { 318 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 319 kfree(buffer); 320 if (ret != -1) 321 return ret; 322 } 323 total_capacity = capacity; 324 heads = 64; 325 sectors = 32; 326 cylinders = total_capacity / (heads * sectors); 327 if (cylinders > 1024) { 328 heads = 255; 329 sectors = 63; 330 cylinders = total_capacity / (heads * sectors); 331 } 332 geom[0] = heads; 333 geom[1] = sectors; 334 geom[2] = cylinders; 335 return 0; 336 } 337 338 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb) 339 { 340 struct MessageUnit_A __iomem *reg = acb->pmuA; 341 int i; 342 343 for (i = 0; i < 2000; i++) { 344 if (readl(®->outbound_intstatus) & 345 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 346 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 347 ®->outbound_intstatus); 348 return true; 349 } 350 msleep(10); 351 } /* max 20 seconds */ 352 353 return false; 354 } 355 356 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb) 357 { 358 struct MessageUnit_B *reg = acb->pmuB; 359 int i; 360 361 for (i = 0; i < 2000; i++) { 362 if (readl(reg->iop2drv_doorbell) 363 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 364 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, 365 reg->iop2drv_doorbell); 366 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, 367 reg->drv2iop_doorbell); 368 return true; 369 } 370 msleep(10); 371 } /* max 20 seconds */ 372 373 return false; 374 } 375 376 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB) 377 { 378 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 379 int i; 380 381 for (i = 0; i < 2000; i++) { 382 if (readl(&phbcmu->outbound_doorbell) 383 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 384 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, 385 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/ 386 return true; 387 } 388 msleep(10); 389 } /* max 20 seconds */ 390 391 return false; 392 } 393 394 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB) 395 { 396 struct MessageUnit_D *reg = pACB->pmuD; 397 int i; 398 399 for (i = 0; i < 2000; i++) { 400 if (readl(reg->outbound_doorbell) 401 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 402 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 403 reg->outbound_doorbell); 404 return true; 405 } 406 msleep(10); 407 } /* max 20 seconds */ 408 return false; 409 } 410 411 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb) 412 { 413 struct MessageUnit_A __iomem *reg = acb->pmuA; 414 int retry_count = 30; 415 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 416 do { 417 if (arcmsr_hbaA_wait_msgint_ready(acb)) 418 break; 419 else { 420 retry_count--; 421 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 422 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 423 } 424 } while (retry_count != 0); 425 } 426 427 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb) 428 { 429 struct MessageUnit_B *reg = acb->pmuB; 430 int retry_count = 30; 431 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 432 do { 433 if (arcmsr_hbaB_wait_msgint_ready(acb)) 434 break; 435 else { 436 retry_count--; 437 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 438 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 439 } 440 } while (retry_count != 0); 441 } 442 443 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB) 444 { 445 struct MessageUnit_C __iomem *reg = pACB->pmuC; 446 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 447 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 448 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 449 do { 450 if (arcmsr_hbaC_wait_msgint_ready(pACB)) { 451 break; 452 } else { 453 retry_count--; 454 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 455 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 456 } 457 } while (retry_count != 0); 458 return; 459 } 460 461 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB) 462 { 463 int retry_count = 15; 464 struct MessageUnit_D *reg = pACB->pmuD; 465 466 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0); 467 do { 468 if (arcmsr_hbaD_wait_msgint_ready(pACB)) 469 break; 470 471 retry_count--; 472 pr_notice("arcmsr%d: wait 'flush adapter " 473 "cache' timeout, retry count down = %d\n", 474 pACB->host->host_no, retry_count); 475 } while (retry_count != 0); 476 } 477 478 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 479 { 480 switch (acb->adapter_type) { 481 482 case ACB_ADAPTER_TYPE_A: { 483 arcmsr_hbaA_flush_cache(acb); 484 } 485 break; 486 487 case ACB_ADAPTER_TYPE_B: { 488 arcmsr_hbaB_flush_cache(acb); 489 } 490 break; 491 case ACB_ADAPTER_TYPE_C: { 492 arcmsr_hbaC_flush_cache(acb); 493 } 494 break; 495 case ACB_ADAPTER_TYPE_D: 496 arcmsr_hbaD_flush_cache(acb); 497 break; 498 } 499 } 500 501 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb) 502 { 503 bool rtn = true; 504 void *dma_coherent; 505 dma_addr_t dma_coherent_handle; 506 struct pci_dev *pdev = acb->pdev; 507 508 switch (acb->adapter_type) { 509 case ACB_ADAPTER_TYPE_B: { 510 struct MessageUnit_B *reg; 511 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32); 512 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 513 &dma_coherent_handle, GFP_KERNEL); 514 if (!dma_coherent) { 515 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 516 return false; 517 } 518 acb->dma_coherent_handle2 = dma_coherent_handle; 519 acb->dma_coherent2 = dma_coherent; 520 reg = (struct MessageUnit_B *)dma_coherent; 521 acb->pmuB = reg; 522 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) { 523 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203); 524 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203); 525 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203); 526 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203); 527 } else { 528 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL); 529 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK); 530 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL); 531 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK); 532 } 533 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER); 534 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER); 535 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER); 536 } 537 break; 538 case ACB_ADAPTER_TYPE_D: { 539 struct MessageUnit_D *reg; 540 541 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32); 542 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 543 &dma_coherent_handle, GFP_KERNEL); 544 if (!dma_coherent) { 545 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 546 return false; 547 } 548 acb->dma_coherent_handle2 = dma_coherent_handle; 549 acb->dma_coherent2 = dma_coherent; 550 reg = (struct MessageUnit_D *)dma_coherent; 551 acb->pmuD = reg; 552 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID); 553 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION); 554 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK); 555 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET); 556 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST); 557 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS); 558 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE); 559 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0); 560 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1); 561 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0); 562 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1); 563 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL); 564 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL); 565 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE); 566 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW); 567 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH); 568 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER); 569 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW); 570 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH); 571 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER); 572 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER); 573 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE); 574 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE); 575 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER); 576 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER); 577 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER); 578 } 579 break; 580 default: 581 break; 582 } 583 return rtn; 584 } 585 586 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 587 { 588 struct pci_dev *pdev = acb->pdev; 589 void *dma_coherent; 590 dma_addr_t dma_coherent_handle; 591 struct CommandControlBlock *ccb_tmp; 592 int i = 0, j = 0; 593 dma_addr_t cdb_phyaddr; 594 unsigned long roundup_ccbsize; 595 unsigned long max_xfer_len; 596 unsigned long max_sg_entrys; 597 uint32_t firm_config_version; 598 599 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 600 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 601 acb->devstate[i][j] = ARECA_RAID_GONE; 602 603 max_xfer_len = ARCMSR_MAX_XFER_LEN; 604 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 605 firm_config_version = acb->firm_cfg_version; 606 if((firm_config_version & 0xFF) >= 3){ 607 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 608 max_sg_entrys = (max_xfer_len/4096); 609 } 610 acb->host->max_sectors = max_xfer_len/512; 611 acb->host->sg_tablesize = max_sg_entrys; 612 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 613 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; 614 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 615 if(!dma_coherent){ 616 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); 617 return -ENOMEM; 618 } 619 acb->dma_coherent = dma_coherent; 620 acb->dma_coherent_handle = dma_coherent_handle; 621 memset(dma_coherent, 0, acb->uncache_size); 622 ccb_tmp = dma_coherent; 623 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 624 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 625 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 626 switch (acb->adapter_type) { 627 case ACB_ADAPTER_TYPE_A: 628 case ACB_ADAPTER_TYPE_B: 629 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5; 630 break; 631 case ACB_ADAPTER_TYPE_C: 632 case ACB_ADAPTER_TYPE_D: 633 ccb_tmp->cdb_phyaddr = cdb_phyaddr; 634 break; 635 } 636 acb->pccb_pool[i] = ccb_tmp; 637 ccb_tmp->acb = acb; 638 INIT_LIST_HEAD(&ccb_tmp->list); 639 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 640 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 641 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 642 } 643 return 0; 644 } 645 646 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 647 { 648 struct AdapterControlBlock *acb = container_of(work, 649 struct AdapterControlBlock, arcmsr_do_message_isr_bh); 650 char *acb_dev_map = (char *)acb->device_map; 651 uint32_t __iomem *signature = NULL; 652 char __iomem *devicemap = NULL; 653 int target, lun; 654 struct scsi_device *psdev; 655 char diff, temp; 656 657 switch (acb->adapter_type) { 658 case ACB_ADAPTER_TYPE_A: { 659 struct MessageUnit_A __iomem *reg = acb->pmuA; 660 661 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 662 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 663 break; 664 } 665 case ACB_ADAPTER_TYPE_B: { 666 struct MessageUnit_B *reg = acb->pmuB; 667 668 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 669 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 670 break; 671 } 672 case ACB_ADAPTER_TYPE_C: { 673 struct MessageUnit_C __iomem *reg = acb->pmuC; 674 675 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 676 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 677 break; 678 } 679 case ACB_ADAPTER_TYPE_D: { 680 struct MessageUnit_D *reg = acb->pmuD; 681 682 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 683 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 684 break; 685 } 686 } 687 atomic_inc(&acb->rq_map_token); 688 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG) 689 return; 690 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; 691 target++) { 692 temp = readb(devicemap); 693 diff = (*acb_dev_map) ^ temp; 694 if (diff != 0) { 695 *acb_dev_map = temp; 696 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; 697 lun++) { 698 if ((diff & 0x01) == 1 && 699 (temp & 0x01) == 1) { 700 scsi_add_device(acb->host, 701 0, target, lun); 702 } else if ((diff & 0x01) == 1 703 && (temp & 0x01) == 0) { 704 psdev = scsi_device_lookup(acb->host, 705 0, target, lun); 706 if (psdev != NULL) { 707 scsi_remove_device(psdev); 708 scsi_device_put(psdev); 709 } 710 } 711 temp >>= 1; 712 diff >>= 1; 713 } 714 } 715 devicemap++; 716 acb_dev_map++; 717 } 718 } 719 720 static int 721 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb) 722 { 723 int i, j, r; 724 struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS]; 725 726 for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++) 727 entries[i].entry = i; 728 r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS); 729 if (r < 0) 730 goto msi_int; 731 acb->msix_vector_count = r; 732 for (i = 0; i < r; i++) { 733 if (request_irq(entries[i].vector, 734 arcmsr_do_interrupt, 0, "arcmsr", acb)) { 735 pr_warn("arcmsr%d: request_irq =%d failed!\n", 736 acb->host->host_no, entries[i].vector); 737 for (j = 0 ; j < i ; j++) 738 free_irq(entries[j].vector, acb); 739 pci_disable_msix(pdev); 740 goto msi_int; 741 } 742 acb->entries[i] = entries[i]; 743 } 744 acb->acb_flags |= ACB_F_MSIX_ENABLED; 745 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no); 746 return SUCCESS; 747 msi_int: 748 if (pci_enable_msi_exact(pdev, 1) < 0) 749 goto legacy_int; 750 if (request_irq(pdev->irq, arcmsr_do_interrupt, 751 IRQF_SHARED, "arcmsr", acb)) { 752 pr_warn("arcmsr%d: request_irq =%d failed!\n", 753 acb->host->host_no, pdev->irq); 754 pci_disable_msi(pdev); 755 goto legacy_int; 756 } 757 acb->acb_flags |= ACB_F_MSI_ENABLED; 758 pr_info("arcmsr%d: msi enabled\n", acb->host->host_no); 759 return SUCCESS; 760 legacy_int: 761 if (request_irq(pdev->irq, arcmsr_do_interrupt, 762 IRQF_SHARED, "arcmsr", acb)) { 763 pr_warn("arcmsr%d: request_irq = %d failed!\n", 764 acb->host->host_no, pdev->irq); 765 return FAILED; 766 } 767 return SUCCESS; 768 } 769 770 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 771 { 772 struct Scsi_Host *host; 773 struct AdapterControlBlock *acb; 774 uint8_t bus,dev_fun; 775 int error; 776 error = pci_enable_device(pdev); 777 if(error){ 778 return -ENODEV; 779 } 780 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 781 if(!host){ 782 goto pci_disable_dev; 783 } 784 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 785 if(error){ 786 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 787 if(error){ 788 printk(KERN_WARNING 789 "scsi%d: No suitable DMA mask available\n", 790 host->host_no); 791 goto scsi_host_release; 792 } 793 } 794 init_waitqueue_head(&wait_q); 795 bus = pdev->bus->number; 796 dev_fun = pdev->devfn; 797 acb = (struct AdapterControlBlock *) host->hostdata; 798 memset(acb,0,sizeof(struct AdapterControlBlock)); 799 acb->pdev = pdev; 800 acb->host = host; 801 host->max_lun = ARCMSR_MAX_TARGETLUN; 802 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 803 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 804 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD; 805 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 806 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 807 host->unique_id = (bus << 8) | dev_fun; 808 pci_set_drvdata(pdev, host); 809 pci_set_master(pdev); 810 error = pci_request_regions(pdev, "arcmsr"); 811 if(error){ 812 goto scsi_host_release; 813 } 814 spin_lock_init(&acb->eh_lock); 815 spin_lock_init(&acb->ccblist_lock); 816 spin_lock_init(&acb->postq_lock); 817 spin_lock_init(&acb->doneq_lock); 818 spin_lock_init(&acb->rqbuffer_lock); 819 spin_lock_init(&acb->wqbuffer_lock); 820 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 821 ACB_F_MESSAGE_RQBUFFER_CLEARED | 822 ACB_F_MESSAGE_WQBUFFER_READED); 823 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 824 INIT_LIST_HEAD(&acb->ccb_free_list); 825 acb->adapter_type = id->driver_data; 826 error = arcmsr_remap_pciregion(acb); 827 if(!error){ 828 goto pci_release_regs; 829 } 830 error = arcmsr_alloc_io_queue(acb); 831 if (!error) 832 goto unmap_pci_region; 833 error = arcmsr_get_firmware_spec(acb); 834 if(!error){ 835 goto free_hbb_mu; 836 } 837 error = arcmsr_alloc_ccb_pool(acb); 838 if(error){ 839 goto free_hbb_mu; 840 } 841 error = scsi_add_host(host, &pdev->dev); 842 if(error){ 843 goto free_ccb_pool; 844 } 845 if (arcmsr_request_irq(pdev, acb) == FAILED) 846 goto scsi_host_remove; 847 arcmsr_iop_init(acb); 848 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 849 atomic_set(&acb->rq_map_token, 16); 850 atomic_set(&acb->ante_token_value, 16); 851 acb->fw_flag = FW_NORMAL; 852 init_timer(&acb->eternal_timer); 853 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 854 acb->eternal_timer.data = (unsigned long) acb; 855 acb->eternal_timer.function = &arcmsr_request_device_map; 856 add_timer(&acb->eternal_timer); 857 if(arcmsr_alloc_sysfs_attr(acb)) 858 goto out_free_sysfs; 859 scsi_scan_host(host); 860 return 0; 861 out_free_sysfs: 862 del_timer_sync(&acb->eternal_timer); 863 flush_work(&acb->arcmsr_do_message_isr_bh); 864 arcmsr_stop_adapter_bgrb(acb); 865 arcmsr_flush_adapter_cache(acb); 866 arcmsr_free_irq(pdev, acb); 867 scsi_host_remove: 868 scsi_remove_host(host); 869 free_ccb_pool: 870 arcmsr_free_ccb_pool(acb); 871 free_hbb_mu: 872 arcmsr_free_mu(acb); 873 unmap_pci_region: 874 arcmsr_unmap_pciregion(acb); 875 pci_release_regs: 876 pci_release_regions(pdev); 877 scsi_host_release: 878 scsi_host_put(host); 879 pci_disable_dev: 880 pci_disable_device(pdev); 881 return -ENODEV; 882 } 883 884 static void arcmsr_free_irq(struct pci_dev *pdev, 885 struct AdapterControlBlock *acb) 886 { 887 int i; 888 889 if (acb->acb_flags & ACB_F_MSI_ENABLED) { 890 free_irq(pdev->irq, acb); 891 pci_disable_msi(pdev); 892 } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) { 893 for (i = 0; i < acb->msix_vector_count; i++) 894 free_irq(acb->entries[i].vector, acb); 895 pci_disable_msix(pdev); 896 } else 897 free_irq(pdev->irq, acb); 898 } 899 900 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state) 901 { 902 uint32_t intmask_org; 903 struct Scsi_Host *host = pci_get_drvdata(pdev); 904 struct AdapterControlBlock *acb = 905 (struct AdapterControlBlock *)host->hostdata; 906 907 intmask_org = arcmsr_disable_outbound_ints(acb); 908 arcmsr_free_irq(pdev, acb); 909 del_timer_sync(&acb->eternal_timer); 910 flush_work(&acb->arcmsr_do_message_isr_bh); 911 arcmsr_stop_adapter_bgrb(acb); 912 arcmsr_flush_adapter_cache(acb); 913 pci_set_drvdata(pdev, host); 914 pci_save_state(pdev); 915 pci_disable_device(pdev); 916 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 917 return 0; 918 } 919 920 static int arcmsr_resume(struct pci_dev *pdev) 921 { 922 int error; 923 struct Scsi_Host *host = pci_get_drvdata(pdev); 924 struct AdapterControlBlock *acb = 925 (struct AdapterControlBlock *)host->hostdata; 926 927 pci_set_power_state(pdev, PCI_D0); 928 pci_enable_wake(pdev, PCI_D0, 0); 929 pci_restore_state(pdev); 930 if (pci_enable_device(pdev)) { 931 pr_warn("%s: pci_enable_device error\n", __func__); 932 return -ENODEV; 933 } 934 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 935 if (error) { 936 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 937 if (error) { 938 pr_warn("scsi%d: No suitable DMA mask available\n", 939 host->host_no); 940 goto controller_unregister; 941 } 942 } 943 pci_set_master(pdev); 944 if (arcmsr_request_irq(pdev, acb) == FAILED) 945 goto controller_stop; 946 arcmsr_iop_init(acb); 947 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 948 atomic_set(&acb->rq_map_token, 16); 949 atomic_set(&acb->ante_token_value, 16); 950 acb->fw_flag = FW_NORMAL; 951 init_timer(&acb->eternal_timer); 952 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 953 acb->eternal_timer.data = (unsigned long) acb; 954 acb->eternal_timer.function = &arcmsr_request_device_map; 955 add_timer(&acb->eternal_timer); 956 return 0; 957 controller_stop: 958 arcmsr_stop_adapter_bgrb(acb); 959 arcmsr_flush_adapter_cache(acb); 960 controller_unregister: 961 scsi_remove_host(host); 962 arcmsr_free_ccb_pool(acb); 963 arcmsr_unmap_pciregion(acb); 964 pci_release_regions(pdev); 965 scsi_host_put(host); 966 pci_disable_device(pdev); 967 return -ENODEV; 968 } 969 970 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb) 971 { 972 struct MessageUnit_A __iomem *reg = acb->pmuA; 973 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 974 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 975 printk(KERN_NOTICE 976 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 977 , acb->host->host_no); 978 return false; 979 } 980 return true; 981 } 982 983 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb) 984 { 985 struct MessageUnit_B *reg = acb->pmuB; 986 987 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 988 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 989 printk(KERN_NOTICE 990 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 991 , acb->host->host_no); 992 return false; 993 } 994 return true; 995 } 996 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB) 997 { 998 struct MessageUnit_C __iomem *reg = pACB->pmuC; 999 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 1000 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1001 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1002 printk(KERN_NOTICE 1003 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 1004 , pACB->host->host_no); 1005 return false; 1006 } 1007 return true; 1008 } 1009 1010 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB) 1011 { 1012 struct MessageUnit_D *reg = pACB->pmuD; 1013 1014 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0); 1015 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 1016 pr_notice("arcmsr%d: wait 'abort all outstanding " 1017 "command' timeout\n", pACB->host->host_no); 1018 return false; 1019 } 1020 return true; 1021 } 1022 1023 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 1024 { 1025 uint8_t rtnval = 0; 1026 switch (acb->adapter_type) { 1027 case ACB_ADAPTER_TYPE_A: { 1028 rtnval = arcmsr_hbaA_abort_allcmd(acb); 1029 } 1030 break; 1031 1032 case ACB_ADAPTER_TYPE_B: { 1033 rtnval = arcmsr_hbaB_abort_allcmd(acb); 1034 } 1035 break; 1036 1037 case ACB_ADAPTER_TYPE_C: { 1038 rtnval = arcmsr_hbaC_abort_allcmd(acb); 1039 } 1040 break; 1041 1042 case ACB_ADAPTER_TYPE_D: 1043 rtnval = arcmsr_hbaD_abort_allcmd(acb); 1044 break; 1045 } 1046 return rtnval; 1047 } 1048 1049 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 1050 { 1051 struct scsi_cmnd *pcmd = ccb->pcmd; 1052 1053 scsi_dma_unmap(pcmd); 1054 } 1055 1056 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 1057 { 1058 struct AdapterControlBlock *acb = ccb->acb; 1059 struct scsi_cmnd *pcmd = ccb->pcmd; 1060 unsigned long flags; 1061 atomic_dec(&acb->ccboutstandingcount); 1062 arcmsr_pci_unmap_dma(ccb); 1063 ccb->startdone = ARCMSR_CCB_DONE; 1064 spin_lock_irqsave(&acb->ccblist_lock, flags); 1065 list_add_tail(&ccb->list, &acb->ccb_free_list); 1066 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 1067 pcmd->scsi_done(pcmd); 1068 } 1069 1070 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 1071 { 1072 1073 struct scsi_cmnd *pcmd = ccb->pcmd; 1074 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 1075 pcmd->result = DID_OK << 16; 1076 if (sensebuffer) { 1077 int sense_data_length = 1078 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 1079 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 1080 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 1081 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 1082 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 1083 sensebuffer->Valid = 1; 1084 } 1085 } 1086 1087 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 1088 { 1089 u32 orig_mask = 0; 1090 switch (acb->adapter_type) { 1091 case ACB_ADAPTER_TYPE_A : { 1092 struct MessageUnit_A __iomem *reg = acb->pmuA; 1093 orig_mask = readl(®->outbound_intmask); 1094 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 1095 ®->outbound_intmask); 1096 } 1097 break; 1098 case ACB_ADAPTER_TYPE_B : { 1099 struct MessageUnit_B *reg = acb->pmuB; 1100 orig_mask = readl(reg->iop2drv_doorbell_mask); 1101 writel(0, reg->iop2drv_doorbell_mask); 1102 } 1103 break; 1104 case ACB_ADAPTER_TYPE_C:{ 1105 struct MessageUnit_C __iomem *reg = acb->pmuC; 1106 /* disable all outbound interrupt */ 1107 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 1108 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 1109 } 1110 break; 1111 case ACB_ADAPTER_TYPE_D: { 1112 struct MessageUnit_D *reg = acb->pmuD; 1113 /* disable all outbound interrupt */ 1114 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable); 1115 } 1116 break; 1117 } 1118 return orig_mask; 1119 } 1120 1121 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 1122 struct CommandControlBlock *ccb, bool error) 1123 { 1124 uint8_t id, lun; 1125 id = ccb->pcmd->device->id; 1126 lun = ccb->pcmd->device->lun; 1127 if (!error) { 1128 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 1129 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1130 ccb->pcmd->result = DID_OK << 16; 1131 arcmsr_ccb_complete(ccb); 1132 }else{ 1133 switch (ccb->arcmsr_cdb.DeviceStatus) { 1134 case ARCMSR_DEV_SELECT_TIMEOUT: { 1135 acb->devstate[id][lun] = ARECA_RAID_GONE; 1136 ccb->pcmd->result = DID_NO_CONNECT << 16; 1137 arcmsr_ccb_complete(ccb); 1138 } 1139 break; 1140 1141 case ARCMSR_DEV_ABORTED: 1142 1143 case ARCMSR_DEV_INIT_FAIL: { 1144 acb->devstate[id][lun] = ARECA_RAID_GONE; 1145 ccb->pcmd->result = DID_BAD_TARGET << 16; 1146 arcmsr_ccb_complete(ccb); 1147 } 1148 break; 1149 1150 case ARCMSR_DEV_CHECK_CONDITION: { 1151 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1152 arcmsr_report_sense_info(ccb); 1153 arcmsr_ccb_complete(ccb); 1154 } 1155 break; 1156 1157 default: 1158 printk(KERN_NOTICE 1159 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 1160 but got unknown DeviceStatus = 0x%x \n" 1161 , acb->host->host_no 1162 , id 1163 , lun 1164 , ccb->arcmsr_cdb.DeviceStatus); 1165 acb->devstate[id][lun] = ARECA_RAID_GONE; 1166 ccb->pcmd->result = DID_NO_CONNECT << 16; 1167 arcmsr_ccb_complete(ccb); 1168 break; 1169 } 1170 } 1171 } 1172 1173 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 1174 { 1175 int id, lun; 1176 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 1177 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 1178 struct scsi_cmnd *abortcmd = pCCB->pcmd; 1179 if (abortcmd) { 1180 id = abortcmd->device->id; 1181 lun = abortcmd->device->lun; 1182 abortcmd->result |= DID_ABORT << 16; 1183 arcmsr_ccb_complete(pCCB); 1184 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 1185 acb->host->host_no, pCCB); 1186 } 1187 return; 1188 } 1189 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 1190 done acb = '0x%p'" 1191 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 1192 " ccboutstandingcount = %d \n" 1193 , acb->host->host_no 1194 , acb 1195 , pCCB 1196 , pCCB->acb 1197 , pCCB->startdone 1198 , atomic_read(&acb->ccboutstandingcount)); 1199 return; 1200 } 1201 arcmsr_report_ccb_state(acb, pCCB, error); 1202 } 1203 1204 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 1205 { 1206 int i = 0; 1207 uint32_t flag_ccb, ccb_cdb_phy; 1208 struct ARCMSR_CDB *pARCMSR_CDB; 1209 bool error; 1210 struct CommandControlBlock *pCCB; 1211 switch (acb->adapter_type) { 1212 1213 case ACB_ADAPTER_TYPE_A: { 1214 struct MessageUnit_A __iomem *reg = acb->pmuA; 1215 uint32_t outbound_intstatus; 1216 outbound_intstatus = readl(®->outbound_intstatus) & 1217 acb->outbound_int_enable; 1218 /*clear and abort all outbound posted Q*/ 1219 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 1220 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 1221 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1222 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1223 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1224 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1225 arcmsr_drain_donequeue(acb, pCCB, error); 1226 } 1227 } 1228 break; 1229 1230 case ACB_ADAPTER_TYPE_B: { 1231 struct MessageUnit_B *reg = acb->pmuB; 1232 /*clear all outbound posted Q*/ 1233 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 1234 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 1235 flag_ccb = reg->done_qbuffer[i]; 1236 if (flag_ccb != 0) { 1237 reg->done_qbuffer[i] = 0; 1238 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1239 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1240 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1241 arcmsr_drain_donequeue(acb, pCCB, error); 1242 } 1243 reg->post_qbuffer[i] = 0; 1244 } 1245 reg->doneq_index = 0; 1246 reg->postq_index = 0; 1247 } 1248 break; 1249 case ACB_ADAPTER_TYPE_C: { 1250 struct MessageUnit_C __iomem *reg = acb->pmuC; 1251 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1252 /*need to do*/ 1253 flag_ccb = readl(®->outbound_queueport_low); 1254 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1255 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1256 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1257 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1258 arcmsr_drain_donequeue(acb, pCCB, error); 1259 } 1260 } 1261 break; 1262 case ACB_ADAPTER_TYPE_D: { 1263 struct MessageUnit_D *pmu = acb->pmuD; 1264 uint32_t outbound_write_pointer; 1265 uint32_t doneq_index, index_stripped, addressLow, residual, toggle; 1266 unsigned long flags; 1267 1268 residual = atomic_read(&acb->ccboutstandingcount); 1269 for (i = 0; i < residual; i++) { 1270 spin_lock_irqsave(&acb->doneq_lock, flags); 1271 outbound_write_pointer = 1272 pmu->done_qbuffer[0].addressLow + 1; 1273 doneq_index = pmu->doneq_index; 1274 if ((doneq_index & 0xFFF) != 1275 (outbound_write_pointer & 0xFFF)) { 1276 toggle = doneq_index & 0x4000; 1277 index_stripped = (doneq_index & 0xFFF) + 1; 1278 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 1279 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 1280 ((toggle ^ 0x4000) + 1); 1281 doneq_index = pmu->doneq_index; 1282 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1283 addressLow = pmu->done_qbuffer[doneq_index & 1284 0xFFF].addressLow; 1285 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 1286 pARCMSR_CDB = (struct ARCMSR_CDB *) 1287 (acb->vir2phy_offset + ccb_cdb_phy); 1288 pCCB = container_of(pARCMSR_CDB, 1289 struct CommandControlBlock, arcmsr_cdb); 1290 error = (addressLow & 1291 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? 1292 true : false; 1293 arcmsr_drain_donequeue(acb, pCCB, error); 1294 writel(doneq_index, 1295 pmu->outboundlist_read_pointer); 1296 } else { 1297 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1298 mdelay(10); 1299 } 1300 } 1301 pmu->postq_index = 0; 1302 pmu->doneq_index = 0x40FF; 1303 } 1304 break; 1305 } 1306 } 1307 1308 static void arcmsr_remove(struct pci_dev *pdev) 1309 { 1310 struct Scsi_Host *host = pci_get_drvdata(pdev); 1311 struct AdapterControlBlock *acb = 1312 (struct AdapterControlBlock *) host->hostdata; 1313 int poll_count = 0; 1314 arcmsr_free_sysfs_attr(acb); 1315 scsi_remove_host(host); 1316 flush_work(&acb->arcmsr_do_message_isr_bh); 1317 del_timer_sync(&acb->eternal_timer); 1318 arcmsr_disable_outbound_ints(acb); 1319 arcmsr_stop_adapter_bgrb(acb); 1320 arcmsr_flush_adapter_cache(acb); 1321 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1322 acb->acb_flags &= ~ACB_F_IOP_INITED; 1323 1324 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1325 if (!atomic_read(&acb->ccboutstandingcount)) 1326 break; 1327 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1328 msleep(25); 1329 } 1330 1331 if (atomic_read(&acb->ccboutstandingcount)) { 1332 int i; 1333 1334 arcmsr_abort_allcmd(acb); 1335 arcmsr_done4abort_postqueue(acb); 1336 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1337 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1338 if (ccb->startdone == ARCMSR_CCB_START) { 1339 ccb->startdone = ARCMSR_CCB_ABORTED; 1340 ccb->pcmd->result = DID_ABORT << 16; 1341 arcmsr_ccb_complete(ccb); 1342 } 1343 } 1344 } 1345 arcmsr_free_irq(pdev, acb); 1346 arcmsr_free_ccb_pool(acb); 1347 arcmsr_free_mu(acb); 1348 arcmsr_unmap_pciregion(acb); 1349 pci_release_regions(pdev); 1350 scsi_host_put(host); 1351 pci_disable_device(pdev); 1352 } 1353 1354 static void arcmsr_shutdown(struct pci_dev *pdev) 1355 { 1356 struct Scsi_Host *host = pci_get_drvdata(pdev); 1357 struct AdapterControlBlock *acb = 1358 (struct AdapterControlBlock *)host->hostdata; 1359 del_timer_sync(&acb->eternal_timer); 1360 arcmsr_disable_outbound_ints(acb); 1361 arcmsr_free_irq(pdev, acb); 1362 flush_work(&acb->arcmsr_do_message_isr_bh); 1363 arcmsr_stop_adapter_bgrb(acb); 1364 arcmsr_flush_adapter_cache(acb); 1365 } 1366 1367 static int arcmsr_module_init(void) 1368 { 1369 int error = 0; 1370 error = pci_register_driver(&arcmsr_pci_driver); 1371 return error; 1372 } 1373 1374 static void arcmsr_module_exit(void) 1375 { 1376 pci_unregister_driver(&arcmsr_pci_driver); 1377 } 1378 module_init(arcmsr_module_init); 1379 module_exit(arcmsr_module_exit); 1380 1381 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1382 u32 intmask_org) 1383 { 1384 u32 mask; 1385 switch (acb->adapter_type) { 1386 1387 case ACB_ADAPTER_TYPE_A: { 1388 struct MessageUnit_A __iomem *reg = acb->pmuA; 1389 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1390 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1391 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1392 writel(mask, ®->outbound_intmask); 1393 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1394 } 1395 break; 1396 1397 case ACB_ADAPTER_TYPE_B: { 1398 struct MessageUnit_B *reg = acb->pmuB; 1399 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1400 ARCMSR_IOP2DRV_DATA_READ_OK | 1401 ARCMSR_IOP2DRV_CDB_DONE | 1402 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1403 writel(mask, reg->iop2drv_doorbell_mask); 1404 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1405 } 1406 break; 1407 case ACB_ADAPTER_TYPE_C: { 1408 struct MessageUnit_C __iomem *reg = acb->pmuC; 1409 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1410 writel(intmask_org & mask, ®->host_int_mask); 1411 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1412 } 1413 break; 1414 case ACB_ADAPTER_TYPE_D: { 1415 struct MessageUnit_D *reg = acb->pmuD; 1416 1417 mask = ARCMSR_ARC1214_ALL_INT_ENABLE; 1418 writel(intmask_org | mask, reg->pcief0_int_enable); 1419 break; 1420 } 1421 } 1422 } 1423 1424 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1425 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1426 { 1427 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1428 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1429 __le32 address_lo, address_hi; 1430 int arccdbsize = 0x30; 1431 __le32 length = 0; 1432 int i; 1433 struct scatterlist *sg; 1434 int nseg; 1435 ccb->pcmd = pcmd; 1436 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1437 arcmsr_cdb->TargetID = pcmd->device->id; 1438 arcmsr_cdb->LUN = pcmd->device->lun; 1439 arcmsr_cdb->Function = 1; 1440 arcmsr_cdb->msgContext = 0; 1441 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1442 1443 nseg = scsi_dma_map(pcmd); 1444 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1445 return FAILED; 1446 scsi_for_each_sg(pcmd, sg, nseg, i) { 1447 /* Get the physical address of the current data pointer */ 1448 length = cpu_to_le32(sg_dma_len(sg)); 1449 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1450 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1451 if (address_hi == 0) { 1452 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1453 1454 pdma_sg->address = address_lo; 1455 pdma_sg->length = length; 1456 psge += sizeof (struct SG32ENTRY); 1457 arccdbsize += sizeof (struct SG32ENTRY); 1458 } else { 1459 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1460 1461 pdma_sg->addresshigh = address_hi; 1462 pdma_sg->address = address_lo; 1463 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1464 psge += sizeof (struct SG64ENTRY); 1465 arccdbsize += sizeof (struct SG64ENTRY); 1466 } 1467 } 1468 arcmsr_cdb->sgcount = (uint8_t)nseg; 1469 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1470 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1471 if ( arccdbsize > 256) 1472 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1473 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1474 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1475 ccb->arc_cdb_size = arccdbsize; 1476 return SUCCESS; 1477 } 1478 1479 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1480 { 1481 uint32_t cdb_phyaddr = ccb->cdb_phyaddr; 1482 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1483 atomic_inc(&acb->ccboutstandingcount); 1484 ccb->startdone = ARCMSR_CCB_START; 1485 switch (acb->adapter_type) { 1486 case ACB_ADAPTER_TYPE_A: { 1487 struct MessageUnit_A __iomem *reg = acb->pmuA; 1488 1489 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1490 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1491 ®->inbound_queueport); 1492 else 1493 writel(cdb_phyaddr, ®->inbound_queueport); 1494 break; 1495 } 1496 1497 case ACB_ADAPTER_TYPE_B: { 1498 struct MessageUnit_B *reg = acb->pmuB; 1499 uint32_t ending_index, index = reg->postq_index; 1500 1501 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1502 reg->post_qbuffer[ending_index] = 0; 1503 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1504 reg->post_qbuffer[index] = 1505 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE; 1506 } else { 1507 reg->post_qbuffer[index] = cdb_phyaddr; 1508 } 1509 index++; 1510 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1511 reg->postq_index = index; 1512 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1513 } 1514 break; 1515 case ACB_ADAPTER_TYPE_C: { 1516 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1517 uint32_t ccb_post_stamp, arc_cdb_size; 1518 1519 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1520 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1); 1521 if (acb->cdb_phyaddr_hi32) { 1522 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1523 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1524 } else { 1525 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1526 } 1527 } 1528 break; 1529 case ACB_ADAPTER_TYPE_D: { 1530 struct MessageUnit_D *pmu = acb->pmuD; 1531 u16 index_stripped; 1532 u16 postq_index, toggle; 1533 unsigned long flags; 1534 struct InBound_SRB *pinbound_srb; 1535 1536 spin_lock_irqsave(&acb->postq_lock, flags); 1537 postq_index = pmu->postq_index; 1538 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]); 1539 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr); 1540 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr); 1541 pinbound_srb->length = ccb->arc_cdb_size >> 2; 1542 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr); 1543 toggle = postq_index & 0x4000; 1544 index_stripped = postq_index + 1; 1545 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1); 1546 pmu->postq_index = index_stripped ? (index_stripped | toggle) : 1547 (toggle ^ 0x4000); 1548 writel(postq_index, pmu->inboundlist_write_pointer); 1549 spin_unlock_irqrestore(&acb->postq_lock, flags); 1550 break; 1551 } 1552 } 1553 } 1554 1555 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb) 1556 { 1557 struct MessageUnit_A __iomem *reg = acb->pmuA; 1558 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1559 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1560 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 1561 printk(KERN_NOTICE 1562 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1563 , acb->host->host_no); 1564 } 1565 } 1566 1567 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb) 1568 { 1569 struct MessageUnit_B *reg = acb->pmuB; 1570 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1571 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1572 1573 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 1574 printk(KERN_NOTICE 1575 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1576 , acb->host->host_no); 1577 } 1578 } 1579 1580 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB) 1581 { 1582 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1583 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1584 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1585 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1586 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1587 printk(KERN_NOTICE 1588 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1589 , pACB->host->host_no); 1590 } 1591 return; 1592 } 1593 1594 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB) 1595 { 1596 struct MessageUnit_D *reg = pACB->pmuD; 1597 1598 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1599 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0); 1600 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) 1601 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' " 1602 "timeout\n", pACB->host->host_no); 1603 } 1604 1605 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1606 { 1607 switch (acb->adapter_type) { 1608 case ACB_ADAPTER_TYPE_A: { 1609 arcmsr_hbaA_stop_bgrb(acb); 1610 } 1611 break; 1612 1613 case ACB_ADAPTER_TYPE_B: { 1614 arcmsr_hbaB_stop_bgrb(acb); 1615 } 1616 break; 1617 case ACB_ADAPTER_TYPE_C: { 1618 arcmsr_hbaC_stop_bgrb(acb); 1619 } 1620 break; 1621 case ACB_ADAPTER_TYPE_D: 1622 arcmsr_hbaD_stop_bgrb(acb); 1623 break; 1624 } 1625 } 1626 1627 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1628 { 1629 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1630 } 1631 1632 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1633 { 1634 switch (acb->adapter_type) { 1635 case ACB_ADAPTER_TYPE_A: { 1636 struct MessageUnit_A __iomem *reg = acb->pmuA; 1637 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1638 } 1639 break; 1640 1641 case ACB_ADAPTER_TYPE_B: { 1642 struct MessageUnit_B *reg = acb->pmuB; 1643 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1644 } 1645 break; 1646 case ACB_ADAPTER_TYPE_C: { 1647 struct MessageUnit_C __iomem *reg = acb->pmuC; 1648 1649 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1650 } 1651 break; 1652 case ACB_ADAPTER_TYPE_D: { 1653 struct MessageUnit_D *reg = acb->pmuD; 1654 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 1655 reg->inbound_doorbell); 1656 } 1657 break; 1658 } 1659 } 1660 1661 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1662 { 1663 switch (acb->adapter_type) { 1664 case ACB_ADAPTER_TYPE_A: { 1665 struct MessageUnit_A __iomem *reg = acb->pmuA; 1666 /* 1667 ** push inbound doorbell tell iop, driver data write ok 1668 ** and wait reply on next hwinterrupt for next Qbuffer post 1669 */ 1670 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1671 } 1672 break; 1673 1674 case ACB_ADAPTER_TYPE_B: { 1675 struct MessageUnit_B *reg = acb->pmuB; 1676 /* 1677 ** push inbound doorbell tell iop, driver data write ok 1678 ** and wait reply on next hwinterrupt for next Qbuffer post 1679 */ 1680 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1681 } 1682 break; 1683 case ACB_ADAPTER_TYPE_C: { 1684 struct MessageUnit_C __iomem *reg = acb->pmuC; 1685 /* 1686 ** push inbound doorbell tell iop, driver data write ok 1687 ** and wait reply on next hwinterrupt for next Qbuffer post 1688 */ 1689 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1690 } 1691 break; 1692 case ACB_ADAPTER_TYPE_D: { 1693 struct MessageUnit_D *reg = acb->pmuD; 1694 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY, 1695 reg->inbound_doorbell); 1696 } 1697 break; 1698 } 1699 } 1700 1701 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1702 { 1703 struct QBUFFER __iomem *qbuffer = NULL; 1704 switch (acb->adapter_type) { 1705 1706 case ACB_ADAPTER_TYPE_A: { 1707 struct MessageUnit_A __iomem *reg = acb->pmuA; 1708 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1709 } 1710 break; 1711 1712 case ACB_ADAPTER_TYPE_B: { 1713 struct MessageUnit_B *reg = acb->pmuB; 1714 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1715 } 1716 break; 1717 case ACB_ADAPTER_TYPE_C: { 1718 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1719 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1720 } 1721 break; 1722 case ACB_ADAPTER_TYPE_D: { 1723 struct MessageUnit_D *reg = acb->pmuD; 1724 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1725 } 1726 break; 1727 } 1728 return qbuffer; 1729 } 1730 1731 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1732 { 1733 struct QBUFFER __iomem *pqbuffer = NULL; 1734 switch (acb->adapter_type) { 1735 1736 case ACB_ADAPTER_TYPE_A: { 1737 struct MessageUnit_A __iomem *reg = acb->pmuA; 1738 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1739 } 1740 break; 1741 1742 case ACB_ADAPTER_TYPE_B: { 1743 struct MessageUnit_B *reg = acb->pmuB; 1744 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1745 } 1746 break; 1747 case ACB_ADAPTER_TYPE_C: { 1748 struct MessageUnit_C __iomem *reg = acb->pmuC; 1749 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1750 } 1751 break; 1752 case ACB_ADAPTER_TYPE_D: { 1753 struct MessageUnit_D *reg = acb->pmuD; 1754 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1755 } 1756 break; 1757 } 1758 return pqbuffer; 1759 } 1760 1761 static uint32_t 1762 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb, 1763 struct QBUFFER __iomem *prbuffer) 1764 { 1765 uint8_t *pQbuffer; 1766 uint8_t *buf1 = NULL; 1767 uint32_t __iomem *iop_data; 1768 uint32_t iop_len, data_len, *buf2 = NULL; 1769 1770 iop_data = (uint32_t __iomem *)prbuffer->data; 1771 iop_len = readl(&prbuffer->data_len); 1772 if (iop_len > 0) { 1773 buf1 = kmalloc(128, GFP_ATOMIC); 1774 buf2 = (uint32_t *)buf1; 1775 if (buf1 == NULL) 1776 return 0; 1777 data_len = iop_len; 1778 while (data_len >= 4) { 1779 *buf2++ = readl(iop_data); 1780 iop_data++; 1781 data_len -= 4; 1782 } 1783 if (data_len) 1784 *buf2 = readl(iop_data); 1785 buf2 = (uint32_t *)buf1; 1786 } 1787 while (iop_len > 0) { 1788 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1789 *pQbuffer = *buf1; 1790 acb->rqbuf_putIndex++; 1791 /* if last, index number set it to 0 */ 1792 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1793 buf1++; 1794 iop_len--; 1795 } 1796 kfree(buf2); 1797 /* let IOP know data has been read */ 1798 arcmsr_iop_message_read(acb); 1799 return 1; 1800 } 1801 1802 uint32_t 1803 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1804 struct QBUFFER __iomem *prbuffer) { 1805 1806 uint8_t *pQbuffer; 1807 uint8_t __iomem *iop_data; 1808 uint32_t iop_len; 1809 1810 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) 1811 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer); 1812 iop_data = (uint8_t __iomem *)prbuffer->data; 1813 iop_len = readl(&prbuffer->data_len); 1814 while (iop_len > 0) { 1815 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1816 *pQbuffer = readb(iop_data); 1817 acb->rqbuf_putIndex++; 1818 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1819 iop_data++; 1820 iop_len--; 1821 } 1822 arcmsr_iop_message_read(acb); 1823 return 1; 1824 } 1825 1826 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1827 { 1828 unsigned long flags; 1829 struct QBUFFER __iomem *prbuffer; 1830 int32_t buf_empty_len; 1831 1832 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 1833 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1834 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) & 1835 (ARCMSR_MAX_QBUFFER - 1); 1836 if (buf_empty_len >= readl(&prbuffer->data_len)) { 1837 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 1838 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1839 } else 1840 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1841 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 1842 } 1843 1844 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb) 1845 { 1846 uint8_t *pQbuffer; 1847 struct QBUFFER __iomem *pwbuffer; 1848 uint8_t *buf1 = NULL; 1849 uint32_t __iomem *iop_data; 1850 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data; 1851 1852 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1853 buf1 = kmalloc(128, GFP_ATOMIC); 1854 buf2 = (uint32_t *)buf1; 1855 if (buf1 == NULL) 1856 return; 1857 1858 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1859 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1860 iop_data = (uint32_t __iomem *)pwbuffer->data; 1861 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1862 && (allxfer_len < 124)) { 1863 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1864 *buf1 = *pQbuffer; 1865 acb->wqbuf_getIndex++; 1866 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1867 buf1++; 1868 allxfer_len++; 1869 } 1870 data_len = allxfer_len; 1871 buf1 = (uint8_t *)buf2; 1872 while (data_len >= 4) { 1873 data = *buf2++; 1874 writel(data, iop_data); 1875 iop_data++; 1876 data_len -= 4; 1877 } 1878 if (data_len) { 1879 data = *buf2; 1880 writel(data, iop_data); 1881 } 1882 writel(allxfer_len, &pwbuffer->data_len); 1883 kfree(buf1); 1884 arcmsr_iop_message_wrote(acb); 1885 } 1886 } 1887 1888 void 1889 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb) 1890 { 1891 uint8_t *pQbuffer; 1892 struct QBUFFER __iomem *pwbuffer; 1893 uint8_t __iomem *iop_data; 1894 int32_t allxfer_len = 0; 1895 1896 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { 1897 arcmsr_write_ioctldata2iop_in_DWORD(acb); 1898 return; 1899 } 1900 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1901 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1902 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1903 iop_data = (uint8_t __iomem *)pwbuffer->data; 1904 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1905 && (allxfer_len < 124)) { 1906 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1907 writeb(*pQbuffer, iop_data); 1908 acb->wqbuf_getIndex++; 1909 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1910 iop_data++; 1911 allxfer_len++; 1912 } 1913 writel(allxfer_len, &pwbuffer->data_len); 1914 arcmsr_iop_message_wrote(acb); 1915 } 1916 } 1917 1918 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1919 { 1920 unsigned long flags; 1921 1922 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 1923 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1924 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1925 arcmsr_write_ioctldata2iop(acb); 1926 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex) 1927 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1928 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 1929 } 1930 1931 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb) 1932 { 1933 uint32_t outbound_doorbell; 1934 struct MessageUnit_A __iomem *reg = acb->pmuA; 1935 outbound_doorbell = readl(®->outbound_doorbell); 1936 do { 1937 writel(outbound_doorbell, ®->outbound_doorbell); 1938 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1939 arcmsr_iop2drv_data_wrote_handle(acb); 1940 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1941 arcmsr_iop2drv_data_read_handle(acb); 1942 outbound_doorbell = readl(®->outbound_doorbell); 1943 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 1944 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)); 1945 } 1946 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB) 1947 { 1948 uint32_t outbound_doorbell; 1949 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1950 /* 1951 ******************************************************************* 1952 ** Maybe here we need to check wrqbuffer_lock is lock or not 1953 ** DOORBELL: din! don! 1954 ** check if there are any mail need to pack from firmware 1955 ******************************************************************* 1956 */ 1957 outbound_doorbell = readl(®->outbound_doorbell); 1958 do { 1959 writel(outbound_doorbell, ®->outbound_doorbell_clear); 1960 readl(®->outbound_doorbell_clear); 1961 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) 1962 arcmsr_iop2drv_data_wrote_handle(pACB); 1963 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) 1964 arcmsr_iop2drv_data_read_handle(pACB); 1965 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) 1966 arcmsr_hbaC_message_isr(pACB); 1967 outbound_doorbell = readl(®->outbound_doorbell); 1968 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 1969 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 1970 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)); 1971 } 1972 1973 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB) 1974 { 1975 uint32_t outbound_doorbell; 1976 struct MessageUnit_D *pmu = pACB->pmuD; 1977 1978 outbound_doorbell = readl(pmu->outbound_doorbell); 1979 do { 1980 writel(outbound_doorbell, pmu->outbound_doorbell); 1981 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) 1982 arcmsr_hbaD_message_isr(pACB); 1983 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) 1984 arcmsr_iop2drv_data_wrote_handle(pACB); 1985 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK) 1986 arcmsr_iop2drv_data_read_handle(pACB); 1987 outbound_doorbell = readl(pmu->outbound_doorbell); 1988 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK 1989 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK 1990 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)); 1991 } 1992 1993 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb) 1994 { 1995 uint32_t flag_ccb; 1996 struct MessageUnit_A __iomem *reg = acb->pmuA; 1997 struct ARCMSR_CDB *pARCMSR_CDB; 1998 struct CommandControlBlock *pCCB; 1999 bool error; 2000 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 2001 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 2002 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 2003 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2004 arcmsr_drain_donequeue(acb, pCCB, error); 2005 } 2006 } 2007 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb) 2008 { 2009 uint32_t index; 2010 uint32_t flag_ccb; 2011 struct MessageUnit_B *reg = acb->pmuB; 2012 struct ARCMSR_CDB *pARCMSR_CDB; 2013 struct CommandControlBlock *pCCB; 2014 bool error; 2015 index = reg->doneq_index; 2016 while ((flag_ccb = reg->done_qbuffer[index]) != 0) { 2017 reg->done_qbuffer[index] = 0; 2018 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 2019 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 2020 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2021 arcmsr_drain_donequeue(acb, pCCB, error); 2022 index++; 2023 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2024 reg->doneq_index = index; 2025 } 2026 } 2027 2028 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb) 2029 { 2030 struct MessageUnit_C __iomem *phbcmu; 2031 struct ARCMSR_CDB *arcmsr_cdb; 2032 struct CommandControlBlock *ccb; 2033 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 2034 int error; 2035 2036 phbcmu = acb->pmuC; 2037 /* areca cdb command done */ 2038 /* Use correct offset and size for syncing */ 2039 2040 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) != 2041 0xFFFFFFFF) { 2042 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2043 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2044 + ccb_cdb_phy); 2045 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, 2046 arcmsr_cdb); 2047 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2048 ? true : false; 2049 /* check if command done with no error */ 2050 arcmsr_drain_donequeue(acb, ccb, error); 2051 throttling++; 2052 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 2053 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, 2054 &phbcmu->inbound_doorbell); 2055 throttling = 0; 2056 } 2057 } 2058 } 2059 2060 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb) 2061 { 2062 u32 outbound_write_pointer, doneq_index, index_stripped, toggle; 2063 uint32_t addressLow, ccb_cdb_phy; 2064 int error; 2065 struct MessageUnit_D *pmu; 2066 struct ARCMSR_CDB *arcmsr_cdb; 2067 struct CommandControlBlock *ccb; 2068 unsigned long flags; 2069 2070 spin_lock_irqsave(&acb->doneq_lock, flags); 2071 pmu = acb->pmuD; 2072 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 2073 doneq_index = pmu->doneq_index; 2074 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) { 2075 do { 2076 toggle = doneq_index & 0x4000; 2077 index_stripped = (doneq_index & 0xFFF) + 1; 2078 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 2079 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 2080 ((toggle ^ 0x4000) + 1); 2081 doneq_index = pmu->doneq_index; 2082 addressLow = pmu->done_qbuffer[doneq_index & 2083 0xFFF].addressLow; 2084 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 2085 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2086 + ccb_cdb_phy); 2087 ccb = container_of(arcmsr_cdb, 2088 struct CommandControlBlock, arcmsr_cdb); 2089 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2090 ? true : false; 2091 arcmsr_drain_donequeue(acb, ccb, error); 2092 writel(doneq_index, pmu->outboundlist_read_pointer); 2093 } while ((doneq_index & 0xFFF) != 2094 (outbound_write_pointer & 0xFFF)); 2095 } 2096 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR, 2097 pmu->outboundlist_interrupt_cause); 2098 readl(pmu->outboundlist_interrupt_cause); 2099 spin_unlock_irqrestore(&acb->doneq_lock, flags); 2100 } 2101 2102 /* 2103 ********************************************************************************** 2104 ** Handle a message interrupt 2105 ** 2106 ** The only message interrupt we expect is in response to a query for the current adapter config. 2107 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2108 ********************************************************************************** 2109 */ 2110 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb) 2111 { 2112 struct MessageUnit_A __iomem *reg = acb->pmuA; 2113 /*clear interrupt and message state*/ 2114 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 2115 schedule_work(&acb->arcmsr_do_message_isr_bh); 2116 } 2117 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb) 2118 { 2119 struct MessageUnit_B *reg = acb->pmuB; 2120 2121 /*clear interrupt and message state*/ 2122 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2123 schedule_work(&acb->arcmsr_do_message_isr_bh); 2124 } 2125 /* 2126 ********************************************************************************** 2127 ** Handle a message interrupt 2128 ** 2129 ** The only message interrupt we expect is in response to a query for the 2130 ** current adapter config. 2131 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2132 ********************************************************************************** 2133 */ 2134 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb) 2135 { 2136 struct MessageUnit_C __iomem *reg = acb->pmuC; 2137 /*clear interrupt and message state*/ 2138 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 2139 schedule_work(&acb->arcmsr_do_message_isr_bh); 2140 } 2141 2142 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb) 2143 { 2144 struct MessageUnit_D *reg = acb->pmuD; 2145 2146 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell); 2147 readl(reg->outbound_doorbell); 2148 schedule_work(&acb->arcmsr_do_message_isr_bh); 2149 } 2150 2151 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb) 2152 { 2153 uint32_t outbound_intstatus; 2154 struct MessageUnit_A __iomem *reg = acb->pmuA; 2155 outbound_intstatus = readl(®->outbound_intstatus) & 2156 acb->outbound_int_enable; 2157 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) 2158 return IRQ_NONE; 2159 do { 2160 writel(outbound_intstatus, ®->outbound_intstatus); 2161 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 2162 arcmsr_hbaA_doorbell_isr(acb); 2163 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 2164 arcmsr_hbaA_postqueue_isr(acb); 2165 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 2166 arcmsr_hbaA_message_isr(acb); 2167 outbound_intstatus = readl(®->outbound_intstatus) & 2168 acb->outbound_int_enable; 2169 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT 2170 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 2171 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT)); 2172 return IRQ_HANDLED; 2173 } 2174 2175 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb) 2176 { 2177 uint32_t outbound_doorbell; 2178 struct MessageUnit_B *reg = acb->pmuB; 2179 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2180 acb->outbound_int_enable; 2181 if (!outbound_doorbell) 2182 return IRQ_NONE; 2183 do { 2184 writel(~outbound_doorbell, reg->iop2drv_doorbell); 2185 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2186 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) 2187 arcmsr_iop2drv_data_wrote_handle(acb); 2188 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) 2189 arcmsr_iop2drv_data_read_handle(acb); 2190 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) 2191 arcmsr_hbaB_postqueue_isr(acb); 2192 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) 2193 arcmsr_hbaB_message_isr(acb); 2194 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2195 acb->outbound_int_enable; 2196 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK 2197 | ARCMSR_IOP2DRV_DATA_READ_OK 2198 | ARCMSR_IOP2DRV_CDB_DONE 2199 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)); 2200 return IRQ_HANDLED; 2201 } 2202 2203 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB) 2204 { 2205 uint32_t host_interrupt_status; 2206 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 2207 /* 2208 ********************************************* 2209 ** check outbound intstatus 2210 ********************************************* 2211 */ 2212 host_interrupt_status = readl(&phbcmu->host_int_status) & 2213 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2214 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR); 2215 if (!host_interrupt_status) 2216 return IRQ_NONE; 2217 do { 2218 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) 2219 arcmsr_hbaC_doorbell_isr(pACB); 2220 /* MU post queue interrupts*/ 2221 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) 2222 arcmsr_hbaC_postqueue_isr(pACB); 2223 host_interrupt_status = readl(&phbcmu->host_int_status); 2224 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2225 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)); 2226 return IRQ_HANDLED; 2227 } 2228 2229 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB) 2230 { 2231 u32 host_interrupt_status; 2232 struct MessageUnit_D *pmu = pACB->pmuD; 2233 2234 host_interrupt_status = readl(pmu->host_int_status) & 2235 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2236 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR); 2237 if (!host_interrupt_status) 2238 return IRQ_NONE; 2239 do { 2240 /* MU post queue interrupts*/ 2241 if (host_interrupt_status & 2242 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR) 2243 arcmsr_hbaD_postqueue_isr(pACB); 2244 if (host_interrupt_status & 2245 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR) 2246 arcmsr_hbaD_doorbell_isr(pACB); 2247 host_interrupt_status = readl(pmu->host_int_status); 2248 } while (host_interrupt_status & 2249 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2250 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)); 2251 return IRQ_HANDLED; 2252 } 2253 2254 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 2255 { 2256 switch (acb->adapter_type) { 2257 case ACB_ADAPTER_TYPE_A: 2258 return arcmsr_hbaA_handle_isr(acb); 2259 break; 2260 case ACB_ADAPTER_TYPE_B: 2261 return arcmsr_hbaB_handle_isr(acb); 2262 break; 2263 case ACB_ADAPTER_TYPE_C: 2264 return arcmsr_hbaC_handle_isr(acb); 2265 case ACB_ADAPTER_TYPE_D: 2266 return arcmsr_hbaD_handle_isr(acb); 2267 default: 2268 return IRQ_NONE; 2269 } 2270 } 2271 2272 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 2273 { 2274 if (acb) { 2275 /* stop adapter background rebuild */ 2276 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 2277 uint32_t intmask_org; 2278 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 2279 intmask_org = arcmsr_disable_outbound_ints(acb); 2280 arcmsr_stop_adapter_bgrb(acb); 2281 arcmsr_flush_adapter_cache(acb); 2282 arcmsr_enable_outbound_ints(acb, intmask_org); 2283 } 2284 } 2285 } 2286 2287 2288 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb) 2289 { 2290 uint32_t i; 2291 2292 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2293 for (i = 0; i < 15; i++) { 2294 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2295 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2296 acb->rqbuf_getIndex = 0; 2297 acb->rqbuf_putIndex = 0; 2298 arcmsr_iop_message_read(acb); 2299 mdelay(30); 2300 } else if (acb->rqbuf_getIndex != 2301 acb->rqbuf_putIndex) { 2302 acb->rqbuf_getIndex = 0; 2303 acb->rqbuf_putIndex = 0; 2304 mdelay(30); 2305 } else 2306 break; 2307 } 2308 } 2309 } 2310 2311 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 2312 struct scsi_cmnd *cmd) 2313 { 2314 char *buffer; 2315 unsigned short use_sg; 2316 int retvalue = 0, transfer_len = 0; 2317 unsigned long flags; 2318 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 2319 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 | 2320 (uint32_t)cmd->cmnd[6] << 16 | 2321 (uint32_t)cmd->cmnd[7] << 8 | 2322 (uint32_t)cmd->cmnd[8]; 2323 struct scatterlist *sg; 2324 2325 use_sg = scsi_sg_count(cmd); 2326 sg = scsi_sglist(cmd); 2327 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2328 if (use_sg > 1) { 2329 retvalue = ARCMSR_MESSAGE_FAIL; 2330 goto message_out; 2331 } 2332 transfer_len += sg->length; 2333 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 2334 retvalue = ARCMSR_MESSAGE_FAIL; 2335 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__); 2336 goto message_out; 2337 } 2338 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer; 2339 switch (controlcode) { 2340 case ARCMSR_MESSAGE_READ_RQBUFFER: { 2341 unsigned char *ver_addr; 2342 uint8_t *ptmpQbuffer; 2343 uint32_t allxfer_len = 0; 2344 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2345 if (!ver_addr) { 2346 retvalue = ARCMSR_MESSAGE_FAIL; 2347 pr_info("%s: memory not enough!\n", __func__); 2348 goto message_out; 2349 } 2350 ptmpQbuffer = ver_addr; 2351 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2352 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) { 2353 unsigned int tail = acb->rqbuf_getIndex; 2354 unsigned int head = acb->rqbuf_putIndex; 2355 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER); 2356 2357 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER); 2358 if (allxfer_len > ARCMSR_API_DATA_BUFLEN) 2359 allxfer_len = ARCMSR_API_DATA_BUFLEN; 2360 2361 if (allxfer_len <= cnt_to_end) 2362 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len); 2363 else { 2364 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end); 2365 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end); 2366 } 2367 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER; 2368 } 2369 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, 2370 allxfer_len); 2371 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2372 struct QBUFFER __iomem *prbuffer; 2373 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2374 prbuffer = arcmsr_get_iop_rqbuffer(acb); 2375 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 2376 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 2377 } 2378 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2379 kfree(ver_addr); 2380 pcmdmessagefld->cmdmessage.Length = allxfer_len; 2381 if (acb->fw_flag == FW_DEADLOCK) 2382 pcmdmessagefld->cmdmessage.ReturnCode = 2383 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2384 else 2385 pcmdmessagefld->cmdmessage.ReturnCode = 2386 ARCMSR_MESSAGE_RETURNCODE_OK; 2387 break; 2388 } 2389 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 2390 unsigned char *ver_addr; 2391 uint32_t user_len; 2392 int32_t cnt2end; 2393 uint8_t *pQbuffer, *ptmpuserbuffer; 2394 2395 user_len = pcmdmessagefld->cmdmessage.Length; 2396 if (user_len > ARCMSR_API_DATA_BUFLEN) { 2397 retvalue = ARCMSR_MESSAGE_FAIL; 2398 goto message_out; 2399 } 2400 2401 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2402 if (!ver_addr) { 2403 retvalue = ARCMSR_MESSAGE_FAIL; 2404 goto message_out; 2405 } 2406 ptmpuserbuffer = ver_addr; 2407 2408 memcpy(ptmpuserbuffer, 2409 pcmdmessagefld->messagedatabuffer, user_len); 2410 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2411 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) { 2412 struct SENSE_DATA *sensebuffer = 2413 (struct SENSE_DATA *)cmd->sense_buffer; 2414 arcmsr_write_ioctldata2iop(acb); 2415 /* has error report sensedata */ 2416 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 2417 sensebuffer->SenseKey = ILLEGAL_REQUEST; 2418 sensebuffer->AdditionalSenseLength = 0x0A; 2419 sensebuffer->AdditionalSenseCode = 0x20; 2420 sensebuffer->Valid = 1; 2421 retvalue = ARCMSR_MESSAGE_FAIL; 2422 } else { 2423 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex]; 2424 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex; 2425 if (user_len > cnt2end) { 2426 memcpy(pQbuffer, ptmpuserbuffer, cnt2end); 2427 ptmpuserbuffer += cnt2end; 2428 user_len -= cnt2end; 2429 acb->wqbuf_putIndex = 0; 2430 pQbuffer = acb->wqbuffer; 2431 } 2432 memcpy(pQbuffer, ptmpuserbuffer, user_len); 2433 acb->wqbuf_putIndex += user_len; 2434 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 2435 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 2436 acb->acb_flags &= 2437 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 2438 arcmsr_write_ioctldata2iop(acb); 2439 } 2440 } 2441 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2442 kfree(ver_addr); 2443 if (acb->fw_flag == FW_DEADLOCK) 2444 pcmdmessagefld->cmdmessage.ReturnCode = 2445 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2446 else 2447 pcmdmessagefld->cmdmessage.ReturnCode = 2448 ARCMSR_MESSAGE_RETURNCODE_OK; 2449 break; 2450 } 2451 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 2452 uint8_t *pQbuffer = acb->rqbuffer; 2453 2454 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2455 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2456 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2457 acb->rqbuf_getIndex = 0; 2458 acb->rqbuf_putIndex = 0; 2459 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2460 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2461 if (acb->fw_flag == FW_DEADLOCK) 2462 pcmdmessagefld->cmdmessage.ReturnCode = 2463 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2464 else 2465 pcmdmessagefld->cmdmessage.ReturnCode = 2466 ARCMSR_MESSAGE_RETURNCODE_OK; 2467 break; 2468 } 2469 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 2470 uint8_t *pQbuffer = acb->wqbuffer; 2471 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2472 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2473 ACB_F_MESSAGE_WQBUFFER_READED); 2474 acb->wqbuf_getIndex = 0; 2475 acb->wqbuf_putIndex = 0; 2476 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2477 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2478 if (acb->fw_flag == FW_DEADLOCK) 2479 pcmdmessagefld->cmdmessage.ReturnCode = 2480 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2481 else 2482 pcmdmessagefld->cmdmessage.ReturnCode = 2483 ARCMSR_MESSAGE_RETURNCODE_OK; 2484 break; 2485 } 2486 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 2487 uint8_t *pQbuffer; 2488 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2489 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2490 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2491 acb->rqbuf_getIndex = 0; 2492 acb->rqbuf_putIndex = 0; 2493 pQbuffer = acb->rqbuffer; 2494 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2495 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2496 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2497 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2498 ACB_F_MESSAGE_WQBUFFER_READED); 2499 acb->wqbuf_getIndex = 0; 2500 acb->wqbuf_putIndex = 0; 2501 pQbuffer = acb->wqbuffer; 2502 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2503 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2504 if (acb->fw_flag == FW_DEADLOCK) 2505 pcmdmessagefld->cmdmessage.ReturnCode = 2506 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2507 else 2508 pcmdmessagefld->cmdmessage.ReturnCode = 2509 ARCMSR_MESSAGE_RETURNCODE_OK; 2510 break; 2511 } 2512 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 2513 if (acb->fw_flag == FW_DEADLOCK) 2514 pcmdmessagefld->cmdmessage.ReturnCode = 2515 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2516 else 2517 pcmdmessagefld->cmdmessage.ReturnCode = 2518 ARCMSR_MESSAGE_RETURNCODE_3F; 2519 break; 2520 } 2521 case ARCMSR_MESSAGE_SAY_HELLO: { 2522 int8_t *hello_string = "Hello! I am ARCMSR"; 2523 if (acb->fw_flag == FW_DEADLOCK) 2524 pcmdmessagefld->cmdmessage.ReturnCode = 2525 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2526 else 2527 pcmdmessagefld->cmdmessage.ReturnCode = 2528 ARCMSR_MESSAGE_RETURNCODE_OK; 2529 memcpy(pcmdmessagefld->messagedatabuffer, 2530 hello_string, (int16_t)strlen(hello_string)); 2531 break; 2532 } 2533 case ARCMSR_MESSAGE_SAY_GOODBYE: { 2534 if (acb->fw_flag == FW_DEADLOCK) 2535 pcmdmessagefld->cmdmessage.ReturnCode = 2536 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2537 else 2538 pcmdmessagefld->cmdmessage.ReturnCode = 2539 ARCMSR_MESSAGE_RETURNCODE_OK; 2540 arcmsr_iop_parking(acb); 2541 break; 2542 } 2543 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 2544 if (acb->fw_flag == FW_DEADLOCK) 2545 pcmdmessagefld->cmdmessage.ReturnCode = 2546 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2547 else 2548 pcmdmessagefld->cmdmessage.ReturnCode = 2549 ARCMSR_MESSAGE_RETURNCODE_OK; 2550 arcmsr_flush_adapter_cache(acb); 2551 break; 2552 } 2553 default: 2554 retvalue = ARCMSR_MESSAGE_FAIL; 2555 pr_info("%s: unknown controlcode!\n", __func__); 2556 } 2557 message_out: 2558 if (use_sg) { 2559 struct scatterlist *sg = scsi_sglist(cmd); 2560 kunmap_atomic(buffer - sg->offset); 2561 } 2562 return retvalue; 2563 } 2564 2565 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2566 { 2567 struct list_head *head = &acb->ccb_free_list; 2568 struct CommandControlBlock *ccb = NULL; 2569 unsigned long flags; 2570 spin_lock_irqsave(&acb->ccblist_lock, flags); 2571 if (!list_empty(head)) { 2572 ccb = list_entry(head->next, struct CommandControlBlock, list); 2573 list_del_init(&ccb->list); 2574 }else{ 2575 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2576 return NULL; 2577 } 2578 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2579 return ccb; 2580 } 2581 2582 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2583 struct scsi_cmnd *cmd) 2584 { 2585 switch (cmd->cmnd[0]) { 2586 case INQUIRY: { 2587 unsigned char inqdata[36]; 2588 char *buffer; 2589 struct scatterlist *sg; 2590 2591 if (cmd->device->lun) { 2592 cmd->result = (DID_TIME_OUT << 16); 2593 cmd->scsi_done(cmd); 2594 return; 2595 } 2596 inqdata[0] = TYPE_PROCESSOR; 2597 /* Periph Qualifier & Periph Dev Type */ 2598 inqdata[1] = 0; 2599 /* rem media bit & Dev Type Modifier */ 2600 inqdata[2] = 0; 2601 /* ISO, ECMA, & ANSI versions */ 2602 inqdata[4] = 31; 2603 /* length of additional data */ 2604 strncpy(&inqdata[8], "Areca ", 8); 2605 /* Vendor Identification */ 2606 strncpy(&inqdata[16], "RAID controller ", 16); 2607 /* Product Identification */ 2608 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2609 2610 sg = scsi_sglist(cmd); 2611 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2612 2613 memcpy(buffer, inqdata, sizeof(inqdata)); 2614 sg = scsi_sglist(cmd); 2615 kunmap_atomic(buffer - sg->offset); 2616 2617 cmd->scsi_done(cmd); 2618 } 2619 break; 2620 case WRITE_BUFFER: 2621 case READ_BUFFER: { 2622 if (arcmsr_iop_message_xfer(acb, cmd)) 2623 cmd->result = (DID_ERROR << 16); 2624 cmd->scsi_done(cmd); 2625 } 2626 break; 2627 default: 2628 cmd->scsi_done(cmd); 2629 } 2630 } 2631 2632 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2633 void (* done)(struct scsi_cmnd *)) 2634 { 2635 struct Scsi_Host *host = cmd->device->host; 2636 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2637 struct CommandControlBlock *ccb; 2638 int target = cmd->device->id; 2639 cmd->scsi_done = done; 2640 cmd->host_scribble = NULL; 2641 cmd->result = 0; 2642 if (target == 16) { 2643 /* virtual device for iop message transfer */ 2644 arcmsr_handle_virtual_command(acb, cmd); 2645 return 0; 2646 } 2647 ccb = arcmsr_get_freeccb(acb); 2648 if (!ccb) 2649 return SCSI_MLQUEUE_HOST_BUSY; 2650 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2651 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2652 cmd->scsi_done(cmd); 2653 return 0; 2654 } 2655 arcmsr_post_ccb(acb, ccb); 2656 return 0; 2657 } 2658 2659 static DEF_SCSI_QCMD(arcmsr_queue_command) 2660 2661 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb) 2662 { 2663 struct MessageUnit_A __iomem *reg = acb->pmuA; 2664 char *acb_firm_model = acb->firm_model; 2665 char *acb_firm_version = acb->firm_version; 2666 char *acb_device_map = acb->device_map; 2667 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2668 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2669 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2670 int count; 2671 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2672 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 2673 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2674 miscellaneous data' timeout \n", acb->host->host_no); 2675 return false; 2676 } 2677 count = 8; 2678 while (count){ 2679 *acb_firm_model = readb(iop_firm_model); 2680 acb_firm_model++; 2681 iop_firm_model++; 2682 count--; 2683 } 2684 2685 count = 16; 2686 while (count){ 2687 *acb_firm_version = readb(iop_firm_version); 2688 acb_firm_version++; 2689 iop_firm_version++; 2690 count--; 2691 } 2692 2693 count=16; 2694 while(count){ 2695 *acb_device_map = readb(iop_device_map); 2696 acb_device_map++; 2697 iop_device_map++; 2698 count--; 2699 } 2700 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2701 acb->host->host_no, 2702 acb->firm_model, 2703 acb->firm_version); 2704 acb->signature = readl(®->message_rwbuffer[0]); 2705 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2706 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2707 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2708 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2709 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2710 return true; 2711 } 2712 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb) 2713 { 2714 struct MessageUnit_B *reg = acb->pmuB; 2715 char *acb_firm_model = acb->firm_model; 2716 char *acb_firm_version = acb->firm_version; 2717 char *acb_device_map = acb->device_map; 2718 char __iomem *iop_firm_model; 2719 /*firm_model,15,60-67*/ 2720 char __iomem *iop_firm_version; 2721 /*firm_version,17,68-83*/ 2722 char __iomem *iop_device_map; 2723 /*firm_version,21,84-99*/ 2724 int count; 2725 2726 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2727 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2728 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2729 2730 arcmsr_wait_firmware_ready(acb); 2731 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 2732 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2733 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no); 2734 return false; 2735 } 2736 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2737 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2738 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2739 miscellaneous data' timeout \n", acb->host->host_no); 2740 return false; 2741 } 2742 count = 8; 2743 while (count){ 2744 *acb_firm_model = readb(iop_firm_model); 2745 acb_firm_model++; 2746 iop_firm_model++; 2747 count--; 2748 } 2749 count = 16; 2750 while (count){ 2751 *acb_firm_version = readb(iop_firm_version); 2752 acb_firm_version++; 2753 iop_firm_version++; 2754 count--; 2755 } 2756 2757 count = 16; 2758 while(count){ 2759 *acb_device_map = readb(iop_device_map); 2760 acb_device_map++; 2761 iop_device_map++; 2762 count--; 2763 } 2764 2765 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2766 acb->host->host_no, 2767 acb->firm_model, 2768 acb->firm_version); 2769 2770 acb->signature = readl(®->message_rwbuffer[0]); 2771 /*firm_signature,1,00-03*/ 2772 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2773 /*firm_request_len,1,04-07*/ 2774 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2775 /*firm_numbers_queue,2,08-11*/ 2776 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2777 /*firm_sdram_size,3,12-15*/ 2778 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2779 /*firm_ide_channels,4,16-19*/ 2780 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2781 /*firm_ide_channels,4,16-19*/ 2782 return true; 2783 } 2784 2785 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB) 2786 { 2787 uint32_t intmask_org, Index, firmware_state = 0; 2788 struct MessageUnit_C __iomem *reg = pACB->pmuC; 2789 char *acb_firm_model = pACB->firm_model; 2790 char *acb_firm_version = pACB->firm_version; 2791 char __iomem *iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2792 char __iomem *iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2793 int count; 2794 /* disable all outbound interrupt */ 2795 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2796 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2797 /* wait firmware ready */ 2798 do { 2799 firmware_state = readl(®->outbound_msgaddr1); 2800 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2801 /* post "get config" instruction */ 2802 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2803 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2804 /* wait message ready */ 2805 for (Index = 0; Index < 2000; Index++) { 2806 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2807 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2808 break; 2809 } 2810 udelay(10); 2811 } /*max 1 seconds*/ 2812 if (Index >= 2000) { 2813 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2814 miscellaneous data' timeout \n", pACB->host->host_no); 2815 return false; 2816 } 2817 count = 8; 2818 while (count) { 2819 *acb_firm_model = readb(iop_firm_model); 2820 acb_firm_model++; 2821 iop_firm_model++; 2822 count--; 2823 } 2824 count = 16; 2825 while (count) { 2826 *acb_firm_version = readb(iop_firm_version); 2827 acb_firm_version++; 2828 iop_firm_version++; 2829 count--; 2830 } 2831 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2832 pACB->host->host_no, 2833 pACB->firm_model, 2834 pACB->firm_version); 2835 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2836 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2837 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2838 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2839 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2840 /*all interrupt service will be enable at arcmsr_iop_init*/ 2841 return true; 2842 } 2843 2844 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb) 2845 { 2846 char *acb_firm_model = acb->firm_model; 2847 char *acb_firm_version = acb->firm_version; 2848 char *acb_device_map = acb->device_map; 2849 char __iomem *iop_firm_model; 2850 char __iomem *iop_firm_version; 2851 char __iomem *iop_device_map; 2852 u32 count; 2853 struct MessageUnit_D *reg = acb->pmuD; 2854 2855 iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); 2856 iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); 2857 iop_device_map = (char __iomem *)(®->msgcode_rwbuffer[21]); 2858 if (readl(acb->pmuD->outbound_doorbell) & 2859 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 2860 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 2861 acb->pmuD->outbound_doorbell);/*clear interrupt*/ 2862 } 2863 /* post "get config" instruction */ 2864 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0); 2865 /* wait message ready */ 2866 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 2867 pr_notice("arcmsr%d: wait get adapter firmware " 2868 "miscellaneous data timeout\n", acb->host->host_no); 2869 return false; 2870 } 2871 count = 8; 2872 while (count) { 2873 *acb_firm_model = readb(iop_firm_model); 2874 acb_firm_model++; 2875 iop_firm_model++; 2876 count--; 2877 } 2878 count = 16; 2879 while (count) { 2880 *acb_firm_version = readb(iop_firm_version); 2881 acb_firm_version++; 2882 iop_firm_version++; 2883 count--; 2884 } 2885 count = 16; 2886 while (count) { 2887 *acb_device_map = readb(iop_device_map); 2888 acb_device_map++; 2889 iop_device_map++; 2890 count--; 2891 } 2892 acb->signature = readl(®->msgcode_rwbuffer[0]); 2893 /*firm_signature,1,00-03*/ 2894 acb->firm_request_len = readl(®->msgcode_rwbuffer[1]); 2895 /*firm_request_len,1,04-07*/ 2896 acb->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); 2897 /*firm_numbers_queue,2,08-11*/ 2898 acb->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); 2899 /*firm_sdram_size,3,12-15*/ 2900 acb->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); 2901 /*firm_hd_channels,4,16-19*/ 2902 acb->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); 2903 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2904 acb->host->host_no, 2905 acb->firm_model, 2906 acb->firm_version); 2907 return true; 2908 } 2909 2910 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2911 { 2912 bool rtn = false; 2913 2914 switch (acb->adapter_type) { 2915 case ACB_ADAPTER_TYPE_A: 2916 rtn = arcmsr_hbaA_get_config(acb); 2917 break; 2918 case ACB_ADAPTER_TYPE_B: 2919 rtn = arcmsr_hbaB_get_config(acb); 2920 break; 2921 case ACB_ADAPTER_TYPE_C: 2922 rtn = arcmsr_hbaC_get_config(acb); 2923 break; 2924 case ACB_ADAPTER_TYPE_D: 2925 rtn = arcmsr_hbaD_get_config(acb); 2926 break; 2927 default: 2928 break; 2929 } 2930 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD) 2931 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD; 2932 else 2933 acb->maxOutstanding = acb->firm_numbers_queue - 1; 2934 acb->host->can_queue = acb->maxOutstanding; 2935 return rtn; 2936 } 2937 2938 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb, 2939 struct CommandControlBlock *poll_ccb) 2940 { 2941 struct MessageUnit_A __iomem *reg = acb->pmuA; 2942 struct CommandControlBlock *ccb; 2943 struct ARCMSR_CDB *arcmsr_cdb; 2944 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2945 int rtn; 2946 bool error; 2947 polling_hba_ccb_retry: 2948 poll_count++; 2949 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2950 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2951 while (1) { 2952 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2953 if (poll_ccb_done){ 2954 rtn = SUCCESS; 2955 break; 2956 }else { 2957 msleep(25); 2958 if (poll_count > 100){ 2959 rtn = FAILED; 2960 break; 2961 } 2962 goto polling_hba_ccb_retry; 2963 } 2964 } 2965 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2966 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2967 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 2968 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2969 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2970 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2971 " poll command abort successfully \n" 2972 , acb->host->host_no 2973 , ccb->pcmd->device->id 2974 , (u32)ccb->pcmd->device->lun 2975 , ccb); 2976 ccb->pcmd->result = DID_ABORT << 16; 2977 arcmsr_ccb_complete(ccb); 2978 continue; 2979 } 2980 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2981 " command done ccb = '0x%p'" 2982 "ccboutstandingcount = %d \n" 2983 , acb->host->host_no 2984 , ccb 2985 , atomic_read(&acb->ccboutstandingcount)); 2986 continue; 2987 } 2988 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2989 arcmsr_report_ccb_state(acb, ccb, error); 2990 } 2991 return rtn; 2992 } 2993 2994 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb, 2995 struct CommandControlBlock *poll_ccb) 2996 { 2997 struct MessageUnit_B *reg = acb->pmuB; 2998 struct ARCMSR_CDB *arcmsr_cdb; 2999 struct CommandControlBlock *ccb; 3000 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 3001 int index, rtn; 3002 bool error; 3003 polling_hbb_ccb_retry: 3004 3005 poll_count++; 3006 /* clear doorbell interrupt */ 3007 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3008 while(1){ 3009 index = reg->doneq_index; 3010 flag_ccb = reg->done_qbuffer[index]; 3011 if (flag_ccb == 0) { 3012 if (poll_ccb_done){ 3013 rtn = SUCCESS; 3014 break; 3015 }else { 3016 msleep(25); 3017 if (poll_count > 100){ 3018 rtn = FAILED; 3019 break; 3020 } 3021 goto polling_hbb_ccb_retry; 3022 } 3023 } 3024 reg->done_qbuffer[index] = 0; 3025 index++; 3026 /*if last index number set it to 0 */ 3027 index %= ARCMSR_MAX_HBB_POSTQUEUE; 3028 reg->doneq_index = index; 3029 /* check if command done with no error*/ 3030 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 3031 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3032 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 3033 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 3034 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 3035 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3036 " poll command abort successfully \n" 3037 ,acb->host->host_no 3038 ,ccb->pcmd->device->id 3039 ,(u32)ccb->pcmd->device->lun 3040 ,ccb); 3041 ccb->pcmd->result = DID_ABORT << 16; 3042 arcmsr_ccb_complete(ccb); 3043 continue; 3044 } 3045 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3046 " command done ccb = '0x%p'" 3047 "ccboutstandingcount = %d \n" 3048 , acb->host->host_no 3049 , ccb 3050 , atomic_read(&acb->ccboutstandingcount)); 3051 continue; 3052 } 3053 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 3054 arcmsr_report_ccb_state(acb, ccb, error); 3055 } 3056 return rtn; 3057 } 3058 3059 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb, 3060 struct CommandControlBlock *poll_ccb) 3061 { 3062 struct MessageUnit_C __iomem *reg = acb->pmuC; 3063 uint32_t flag_ccb, ccb_cdb_phy; 3064 struct ARCMSR_CDB *arcmsr_cdb; 3065 bool error; 3066 struct CommandControlBlock *pCCB; 3067 uint32_t poll_ccb_done = 0, poll_count = 0; 3068 int rtn; 3069 polling_hbc_ccb_retry: 3070 poll_count++; 3071 while (1) { 3072 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 3073 if (poll_ccb_done) { 3074 rtn = SUCCESS; 3075 break; 3076 } else { 3077 msleep(25); 3078 if (poll_count > 100) { 3079 rtn = FAILED; 3080 break; 3081 } 3082 goto polling_hbc_ccb_retry; 3083 } 3084 } 3085 flag_ccb = readl(®->outbound_queueport_low); 3086 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3087 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 3088 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3089 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3090 /* check ifcommand done with no error*/ 3091 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 3092 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3093 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3094 " poll command abort successfully \n" 3095 , acb->host->host_no 3096 , pCCB->pcmd->device->id 3097 , (u32)pCCB->pcmd->device->lun 3098 , pCCB); 3099 pCCB->pcmd->result = DID_ABORT << 16; 3100 arcmsr_ccb_complete(pCCB); 3101 continue; 3102 } 3103 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3104 " command done ccb = '0x%p'" 3105 "ccboutstandingcount = %d \n" 3106 , acb->host->host_no 3107 , pCCB 3108 , atomic_read(&acb->ccboutstandingcount)); 3109 continue; 3110 } 3111 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 3112 arcmsr_report_ccb_state(acb, pCCB, error); 3113 } 3114 return rtn; 3115 } 3116 3117 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb, 3118 struct CommandControlBlock *poll_ccb) 3119 { 3120 bool error; 3121 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy; 3122 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle; 3123 unsigned long flags; 3124 struct ARCMSR_CDB *arcmsr_cdb; 3125 struct CommandControlBlock *pCCB; 3126 struct MessageUnit_D *pmu = acb->pmuD; 3127 3128 polling_hbaD_ccb_retry: 3129 poll_count++; 3130 while (1) { 3131 spin_lock_irqsave(&acb->doneq_lock, flags); 3132 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 3133 doneq_index = pmu->doneq_index; 3134 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) { 3135 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3136 if (poll_ccb_done) { 3137 rtn = SUCCESS; 3138 break; 3139 } else { 3140 msleep(25); 3141 if (poll_count > 40) { 3142 rtn = FAILED; 3143 break; 3144 } 3145 goto polling_hbaD_ccb_retry; 3146 } 3147 } 3148 toggle = doneq_index & 0x4000; 3149 index_stripped = (doneq_index & 0xFFF) + 1; 3150 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 3151 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 3152 ((toggle ^ 0x4000) + 1); 3153 doneq_index = pmu->doneq_index; 3154 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3155 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow; 3156 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3157 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + 3158 ccb_cdb_phy); 3159 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, 3160 arcmsr_cdb); 3161 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3162 if ((pCCB->acb != acb) || 3163 (pCCB->startdone != ARCMSR_CCB_START)) { 3164 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3165 pr_notice("arcmsr%d: scsi id = %d " 3166 "lun = %d ccb = '0x%p' poll command " 3167 "abort successfully\n" 3168 , acb->host->host_no 3169 , pCCB->pcmd->device->id 3170 , (u32)pCCB->pcmd->device->lun 3171 , pCCB); 3172 pCCB->pcmd->result = DID_ABORT << 16; 3173 arcmsr_ccb_complete(pCCB); 3174 continue; 3175 } 3176 pr_notice("arcmsr%d: polling an illegal " 3177 "ccb command done ccb = '0x%p' " 3178 "ccboutstandingcount = %d\n" 3179 , acb->host->host_no 3180 , pCCB 3181 , atomic_read(&acb->ccboutstandingcount)); 3182 continue; 3183 } 3184 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 3185 ? true : false; 3186 arcmsr_report_ccb_state(acb, pCCB, error); 3187 } 3188 return rtn; 3189 } 3190 3191 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 3192 struct CommandControlBlock *poll_ccb) 3193 { 3194 int rtn = 0; 3195 switch (acb->adapter_type) { 3196 3197 case ACB_ADAPTER_TYPE_A: { 3198 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb); 3199 } 3200 break; 3201 3202 case ACB_ADAPTER_TYPE_B: { 3203 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb); 3204 } 3205 break; 3206 case ACB_ADAPTER_TYPE_C: { 3207 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb); 3208 } 3209 break; 3210 case ACB_ADAPTER_TYPE_D: 3211 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb); 3212 break; 3213 } 3214 return rtn; 3215 } 3216 3217 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 3218 { 3219 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 3220 dma_addr_t dma_coherent_handle; 3221 3222 /* 3223 ******************************************************************** 3224 ** here we need to tell iop 331 our freeccb.HighPart 3225 ** if freeccb.HighPart is not zero 3226 ******************************************************************** 3227 */ 3228 switch (acb->adapter_type) { 3229 case ACB_ADAPTER_TYPE_B: 3230 case ACB_ADAPTER_TYPE_D: 3231 dma_coherent_handle = acb->dma_coherent_handle2; 3232 break; 3233 default: 3234 dma_coherent_handle = acb->dma_coherent_handle; 3235 break; 3236 } 3237 cdb_phyaddr = lower_32_bits(dma_coherent_handle); 3238 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle); 3239 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 3240 /* 3241 *********************************************************************** 3242 ** if adapter type B, set window of "post command Q" 3243 *********************************************************************** 3244 */ 3245 switch (acb->adapter_type) { 3246 3247 case ACB_ADAPTER_TYPE_A: { 3248 if (cdb_phyaddr_hi32 != 0) { 3249 struct MessageUnit_A __iomem *reg = acb->pmuA; 3250 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 3251 ®->message_rwbuffer[0]); 3252 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 3253 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 3254 ®->inbound_msgaddr0); 3255 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3256 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 3257 part physical address timeout\n", 3258 acb->host->host_no); 3259 return 1; 3260 } 3261 } 3262 } 3263 break; 3264 3265 case ACB_ADAPTER_TYPE_B: { 3266 uint32_t __iomem *rwbuffer; 3267 3268 struct MessageUnit_B *reg = acb->pmuB; 3269 reg->postq_index = 0; 3270 reg->doneq_index = 0; 3271 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 3272 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3273 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \ 3274 acb->host->host_no); 3275 return 1; 3276 } 3277 rwbuffer = reg->message_rwbuffer; 3278 /* driver "set config" signature */ 3279 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3280 /* normal should be zero */ 3281 writel(cdb_phyaddr_hi32, rwbuffer++); 3282 /* postQ size (256 + 8)*4 */ 3283 writel(cdb_phyaddr, rwbuffer++); 3284 /* doneQ size (256 + 8)*4 */ 3285 writel(cdb_phyaddr + 1056, rwbuffer++); 3286 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 3287 writel(1056, rwbuffer); 3288 3289 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 3290 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3291 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3292 timeout \n",acb->host->host_no); 3293 return 1; 3294 } 3295 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 3296 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3297 pr_err("arcmsr%d: can't set driver mode.\n", 3298 acb->host->host_no); 3299 return 1; 3300 } 3301 } 3302 break; 3303 case ACB_ADAPTER_TYPE_C: { 3304 if (cdb_phyaddr_hi32 != 0) { 3305 struct MessageUnit_C __iomem *reg = acb->pmuC; 3306 3307 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 3308 acb->adapter_index, cdb_phyaddr_hi32); 3309 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 3310 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 3311 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 3312 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3313 if (!arcmsr_hbaC_wait_msgint_ready(acb)) { 3314 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3315 timeout \n", acb->host->host_no); 3316 return 1; 3317 } 3318 } 3319 } 3320 break; 3321 case ACB_ADAPTER_TYPE_D: { 3322 uint32_t __iomem *rwbuffer; 3323 struct MessageUnit_D *reg = acb->pmuD; 3324 reg->postq_index = 0; 3325 reg->doneq_index = 0; 3326 rwbuffer = reg->msgcode_rwbuffer; 3327 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3328 writel(cdb_phyaddr_hi32, rwbuffer++); 3329 writel(cdb_phyaddr, rwbuffer++); 3330 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE * 3331 sizeof(struct InBound_SRB)), rwbuffer++); 3332 writel(0x100, rwbuffer); 3333 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0); 3334 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 3335 pr_notice("arcmsr%d: 'set command Q window' timeout\n", 3336 acb->host->host_no); 3337 return 1; 3338 } 3339 } 3340 break; 3341 } 3342 return 0; 3343 } 3344 3345 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 3346 { 3347 uint32_t firmware_state = 0; 3348 switch (acb->adapter_type) { 3349 3350 case ACB_ADAPTER_TYPE_A: { 3351 struct MessageUnit_A __iomem *reg = acb->pmuA; 3352 do { 3353 firmware_state = readl(®->outbound_msgaddr1); 3354 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 3355 } 3356 break; 3357 3358 case ACB_ADAPTER_TYPE_B: { 3359 struct MessageUnit_B *reg = acb->pmuB; 3360 do { 3361 firmware_state = readl(reg->iop2drv_doorbell); 3362 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 3363 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 3364 } 3365 break; 3366 case ACB_ADAPTER_TYPE_C: { 3367 struct MessageUnit_C __iomem *reg = acb->pmuC; 3368 do { 3369 firmware_state = readl(®->outbound_msgaddr1); 3370 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 3371 } 3372 break; 3373 case ACB_ADAPTER_TYPE_D: { 3374 struct MessageUnit_D *reg = acb->pmuD; 3375 do { 3376 firmware_state = readl(reg->outbound_msgaddr1); 3377 } while ((firmware_state & 3378 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0); 3379 } 3380 break; 3381 } 3382 } 3383 3384 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb) 3385 { 3386 struct MessageUnit_A __iomem *reg = acb->pmuA; 3387 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3388 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3389 return; 3390 } else { 3391 acb->fw_flag = FW_NORMAL; 3392 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 3393 atomic_set(&acb->rq_map_token, 16); 3394 } 3395 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3396 if (atomic_dec_and_test(&acb->rq_map_token)) { 3397 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3398 return; 3399 } 3400 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3401 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3402 } 3403 return; 3404 } 3405 3406 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb) 3407 { 3408 struct MessageUnit_B *reg = acb->pmuB; 3409 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3410 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3411 return; 3412 } else { 3413 acb->fw_flag = FW_NORMAL; 3414 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3415 atomic_set(&acb->rq_map_token, 16); 3416 } 3417 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3418 if (atomic_dec_and_test(&acb->rq_map_token)) { 3419 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3420 return; 3421 } 3422 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 3423 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3424 } 3425 return; 3426 } 3427 3428 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb) 3429 { 3430 struct MessageUnit_C __iomem *reg = acb->pmuC; 3431 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3432 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3433 return; 3434 } else { 3435 acb->fw_flag = FW_NORMAL; 3436 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3437 atomic_set(&acb->rq_map_token, 16); 3438 } 3439 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3440 if (atomic_dec_and_test(&acb->rq_map_token)) { 3441 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3442 return; 3443 } 3444 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3445 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3446 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3447 } 3448 return; 3449 } 3450 3451 static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb) 3452 { 3453 struct MessageUnit_D *reg = acb->pmuD; 3454 3455 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || 3456 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || 3457 ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3458 mod_timer(&acb->eternal_timer, 3459 jiffies + msecs_to_jiffies(6 * HZ)); 3460 } else { 3461 acb->fw_flag = FW_NORMAL; 3462 if (atomic_read(&acb->ante_token_value) == 3463 atomic_read(&acb->rq_map_token)) { 3464 atomic_set(&acb->rq_map_token, 16); 3465 } 3466 atomic_set(&acb->ante_token_value, 3467 atomic_read(&acb->rq_map_token)); 3468 if (atomic_dec_and_test(&acb->rq_map_token)) { 3469 mod_timer(&acb->eternal_timer, jiffies + 3470 msecs_to_jiffies(6 * HZ)); 3471 return; 3472 } 3473 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, 3474 reg->inbound_msgaddr0); 3475 mod_timer(&acb->eternal_timer, jiffies + 3476 msecs_to_jiffies(6 * HZ)); 3477 } 3478 } 3479 3480 static void arcmsr_request_device_map(unsigned long pacb) 3481 { 3482 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 3483 switch (acb->adapter_type) { 3484 case ACB_ADAPTER_TYPE_A: { 3485 arcmsr_hbaA_request_device_map(acb); 3486 } 3487 break; 3488 case ACB_ADAPTER_TYPE_B: { 3489 arcmsr_hbaB_request_device_map(acb); 3490 } 3491 break; 3492 case ACB_ADAPTER_TYPE_C: { 3493 arcmsr_hbaC_request_device_map(acb); 3494 } 3495 break; 3496 case ACB_ADAPTER_TYPE_D: 3497 arcmsr_hbaD_request_device_map(acb); 3498 break; 3499 } 3500 } 3501 3502 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb) 3503 { 3504 struct MessageUnit_A __iomem *reg = acb->pmuA; 3505 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3506 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 3507 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3508 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3509 rebulid' timeout \n", acb->host->host_no); 3510 } 3511 } 3512 3513 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb) 3514 { 3515 struct MessageUnit_B *reg = acb->pmuB; 3516 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3517 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 3518 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3519 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3520 rebulid' timeout \n",acb->host->host_no); 3521 } 3522 } 3523 3524 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB) 3525 { 3526 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 3527 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3528 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 3529 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 3530 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 3531 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3532 rebulid' timeout \n", pACB->host->host_no); 3533 } 3534 return; 3535 } 3536 3537 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB) 3538 { 3539 struct MessageUnit_D *pmu = pACB->pmuD; 3540 3541 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3542 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0); 3543 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 3544 pr_notice("arcmsr%d: wait 'start adapter " 3545 "background rebulid' timeout\n", pACB->host->host_no); 3546 } 3547 } 3548 3549 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3550 { 3551 switch (acb->adapter_type) { 3552 case ACB_ADAPTER_TYPE_A: 3553 arcmsr_hbaA_start_bgrb(acb); 3554 break; 3555 case ACB_ADAPTER_TYPE_B: 3556 arcmsr_hbaB_start_bgrb(acb); 3557 break; 3558 case ACB_ADAPTER_TYPE_C: 3559 arcmsr_hbaC_start_bgrb(acb); 3560 break; 3561 case ACB_ADAPTER_TYPE_D: 3562 arcmsr_hbaD_start_bgrb(acb); 3563 break; 3564 } 3565 } 3566 3567 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 3568 { 3569 switch (acb->adapter_type) { 3570 case ACB_ADAPTER_TYPE_A: { 3571 struct MessageUnit_A __iomem *reg = acb->pmuA; 3572 uint32_t outbound_doorbell; 3573 /* empty doorbell Qbuffer if door bell ringed */ 3574 outbound_doorbell = readl(®->outbound_doorbell); 3575 /*clear doorbell interrupt */ 3576 writel(outbound_doorbell, ®->outbound_doorbell); 3577 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3578 } 3579 break; 3580 3581 case ACB_ADAPTER_TYPE_B: { 3582 struct MessageUnit_B *reg = acb->pmuB; 3583 /*clear interrupt and message state*/ 3584 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3585 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 3586 /* let IOP know data has been read */ 3587 } 3588 break; 3589 case ACB_ADAPTER_TYPE_C: { 3590 struct MessageUnit_C __iomem *reg = acb->pmuC; 3591 uint32_t outbound_doorbell, i; 3592 /* empty doorbell Qbuffer if door bell ringed */ 3593 outbound_doorbell = readl(®->outbound_doorbell); 3594 writel(outbound_doorbell, ®->outbound_doorbell_clear); 3595 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3596 for (i = 0; i < 200; i++) { 3597 msleep(20); 3598 outbound_doorbell = readl(®->outbound_doorbell); 3599 if (outbound_doorbell & 3600 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 3601 writel(outbound_doorbell, 3602 ®->outbound_doorbell_clear); 3603 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, 3604 ®->inbound_doorbell); 3605 } else 3606 break; 3607 } 3608 } 3609 break; 3610 case ACB_ADAPTER_TYPE_D: { 3611 struct MessageUnit_D *reg = acb->pmuD; 3612 uint32_t outbound_doorbell, i; 3613 /* empty doorbell Qbuffer if door bell ringed */ 3614 outbound_doorbell = readl(reg->outbound_doorbell); 3615 writel(outbound_doorbell, reg->outbound_doorbell); 3616 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3617 reg->inbound_doorbell); 3618 for (i = 0; i < 200; i++) { 3619 msleep(20); 3620 outbound_doorbell = readl(reg->outbound_doorbell); 3621 if (outbound_doorbell & 3622 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) { 3623 writel(outbound_doorbell, 3624 reg->outbound_doorbell); 3625 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3626 reg->inbound_doorbell); 3627 } else 3628 break; 3629 } 3630 } 3631 break; 3632 } 3633 } 3634 3635 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 3636 { 3637 switch (acb->adapter_type) { 3638 case ACB_ADAPTER_TYPE_A: 3639 return; 3640 case ACB_ADAPTER_TYPE_B: 3641 { 3642 struct MessageUnit_B *reg = acb->pmuB; 3643 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 3644 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3645 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 3646 return; 3647 } 3648 } 3649 break; 3650 case ACB_ADAPTER_TYPE_C: 3651 return; 3652 } 3653 return; 3654 } 3655 3656 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 3657 { 3658 uint8_t value[64]; 3659 int i, count = 0; 3660 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 3661 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 3662 struct MessageUnit_D *pmuD = acb->pmuD; 3663 3664 /* backup pci config data */ 3665 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 3666 for (i = 0; i < 64; i++) { 3667 pci_read_config_byte(acb->pdev, i, &value[i]); 3668 } 3669 /* hardware reset signal */ 3670 if ((acb->dev_id == 0x1680)) { 3671 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 3672 } else if ((acb->dev_id == 0x1880)) { 3673 do { 3674 count++; 3675 writel(0xF, &pmuC->write_sequence); 3676 writel(0x4, &pmuC->write_sequence); 3677 writel(0xB, &pmuC->write_sequence); 3678 writel(0x2, &pmuC->write_sequence); 3679 writel(0x7, &pmuC->write_sequence); 3680 writel(0xD, &pmuC->write_sequence); 3681 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 3682 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 3683 } else if ((acb->dev_id == 0x1214)) { 3684 writel(0x20, pmuD->reset_request); 3685 } else { 3686 pci_write_config_byte(acb->pdev, 0x84, 0x20); 3687 } 3688 msleep(2000); 3689 /* write back pci config data */ 3690 for (i = 0; i < 64; i++) { 3691 pci_write_config_byte(acb->pdev, i, value[i]); 3692 } 3693 msleep(1000); 3694 return; 3695 } 3696 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 3697 { 3698 uint32_t intmask_org; 3699 /* disable all outbound interrupt */ 3700 intmask_org = arcmsr_disable_outbound_ints(acb); 3701 arcmsr_wait_firmware_ready(acb); 3702 arcmsr_iop_confirm(acb); 3703 /*start background rebuild*/ 3704 arcmsr_start_adapter_bgrb(acb); 3705 /* empty doorbell Qbuffer if door bell ringed */ 3706 arcmsr_clear_doorbell_queue_buffer(acb); 3707 arcmsr_enable_eoi_mode(acb); 3708 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3709 arcmsr_enable_outbound_ints(acb, intmask_org); 3710 acb->acb_flags |= ACB_F_IOP_INITED; 3711 } 3712 3713 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 3714 { 3715 struct CommandControlBlock *ccb; 3716 uint32_t intmask_org; 3717 uint8_t rtnval = 0x00; 3718 int i = 0; 3719 unsigned long flags; 3720 3721 if (atomic_read(&acb->ccboutstandingcount) != 0) { 3722 /* disable all outbound interrupt */ 3723 intmask_org = arcmsr_disable_outbound_ints(acb); 3724 /* talk to iop 331 outstanding command aborted */ 3725 rtnval = arcmsr_abort_allcmd(acb); 3726 /* clear all outbound posted Q */ 3727 arcmsr_done4abort_postqueue(acb); 3728 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3729 ccb = acb->pccb_pool[i]; 3730 if (ccb->startdone == ARCMSR_CCB_START) { 3731 scsi_dma_unmap(ccb->pcmd); 3732 ccb->startdone = ARCMSR_CCB_DONE; 3733 ccb->ccb_flags = 0; 3734 spin_lock_irqsave(&acb->ccblist_lock, flags); 3735 list_add_tail(&ccb->list, &acb->ccb_free_list); 3736 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 3737 } 3738 } 3739 atomic_set(&acb->ccboutstandingcount, 0); 3740 /* enable all outbound interrupt */ 3741 arcmsr_enable_outbound_ints(acb, intmask_org); 3742 return rtnval; 3743 } 3744 return rtnval; 3745 } 3746 3747 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 3748 { 3749 struct AdapterControlBlock *acb; 3750 uint32_t intmask_org, outbound_doorbell; 3751 int retry_count = 0; 3752 int rtn = FAILED; 3753 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 3754 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 3755 acb->num_resets++; 3756 3757 switch(acb->adapter_type){ 3758 case ACB_ADAPTER_TYPE_A:{ 3759 if (acb->acb_flags & ACB_F_BUS_RESET){ 3760 long timeout; 3761 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3762 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3763 if (timeout) { 3764 return SUCCESS; 3765 } 3766 } 3767 acb->acb_flags |= ACB_F_BUS_RESET; 3768 if (!arcmsr_iop_reset(acb)) { 3769 struct MessageUnit_A __iomem *reg; 3770 reg = acb->pmuA; 3771 arcmsr_hardware_reset(acb); 3772 acb->acb_flags &= ~ACB_F_IOP_INITED; 3773 sleep_again: 3774 ssleep(ARCMSR_SLEEPTIME); 3775 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 3776 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3777 if (retry_count > ARCMSR_RETRYCOUNT) { 3778 acb->fw_flag = FW_DEADLOCK; 3779 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3780 return FAILED; 3781 } 3782 retry_count++; 3783 goto sleep_again; 3784 } 3785 acb->acb_flags |= ACB_F_IOP_INITED; 3786 /* disable all outbound interrupt */ 3787 intmask_org = arcmsr_disable_outbound_ints(acb); 3788 arcmsr_get_firmware_spec(acb); 3789 arcmsr_start_adapter_bgrb(acb); 3790 /* clear Qbuffer if door bell ringed */ 3791 outbound_doorbell = readl(®->outbound_doorbell); 3792 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 3793 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3794 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3795 arcmsr_enable_outbound_ints(acb, intmask_org); 3796 atomic_set(&acb->rq_map_token, 16); 3797 atomic_set(&acb->ante_token_value, 16); 3798 acb->fw_flag = FW_NORMAL; 3799 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3800 acb->acb_flags &= ~ACB_F_BUS_RESET; 3801 rtn = SUCCESS; 3802 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3803 } else { 3804 acb->acb_flags &= ~ACB_F_BUS_RESET; 3805 atomic_set(&acb->rq_map_token, 16); 3806 atomic_set(&acb->ante_token_value, 16); 3807 acb->fw_flag = FW_NORMAL; 3808 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3809 rtn = SUCCESS; 3810 } 3811 break; 3812 } 3813 case ACB_ADAPTER_TYPE_B:{ 3814 acb->acb_flags |= ACB_F_BUS_RESET; 3815 if (!arcmsr_iop_reset(acb)) { 3816 acb->acb_flags &= ~ACB_F_BUS_RESET; 3817 rtn = FAILED; 3818 } else { 3819 acb->acb_flags &= ~ACB_F_BUS_RESET; 3820 atomic_set(&acb->rq_map_token, 16); 3821 atomic_set(&acb->ante_token_value, 16); 3822 acb->fw_flag = FW_NORMAL; 3823 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3824 rtn = SUCCESS; 3825 } 3826 break; 3827 } 3828 case ACB_ADAPTER_TYPE_C:{ 3829 if (acb->acb_flags & ACB_F_BUS_RESET) { 3830 long timeout; 3831 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3832 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3833 if (timeout) { 3834 return SUCCESS; 3835 } 3836 } 3837 acb->acb_flags |= ACB_F_BUS_RESET; 3838 if (!arcmsr_iop_reset(acb)) { 3839 struct MessageUnit_C __iomem *reg; 3840 reg = acb->pmuC; 3841 arcmsr_hardware_reset(acb); 3842 acb->acb_flags &= ~ACB_F_IOP_INITED; 3843 sleep: 3844 ssleep(ARCMSR_SLEEPTIME); 3845 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3846 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3847 if (retry_count > ARCMSR_RETRYCOUNT) { 3848 acb->fw_flag = FW_DEADLOCK; 3849 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3850 return FAILED; 3851 } 3852 retry_count++; 3853 goto sleep; 3854 } 3855 acb->acb_flags |= ACB_F_IOP_INITED; 3856 /* disable all outbound interrupt */ 3857 intmask_org = arcmsr_disable_outbound_ints(acb); 3858 arcmsr_get_firmware_spec(acb); 3859 arcmsr_start_adapter_bgrb(acb); 3860 /* clear Qbuffer if door bell ringed */ 3861 arcmsr_clear_doorbell_queue_buffer(acb); 3862 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3863 arcmsr_enable_outbound_ints(acb, intmask_org); 3864 atomic_set(&acb->rq_map_token, 16); 3865 atomic_set(&acb->ante_token_value, 16); 3866 acb->fw_flag = FW_NORMAL; 3867 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3868 acb->acb_flags &= ~ACB_F_BUS_RESET; 3869 rtn = SUCCESS; 3870 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3871 } else { 3872 acb->acb_flags &= ~ACB_F_BUS_RESET; 3873 atomic_set(&acb->rq_map_token, 16); 3874 atomic_set(&acb->ante_token_value, 16); 3875 acb->fw_flag = FW_NORMAL; 3876 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3877 rtn = SUCCESS; 3878 } 3879 break; 3880 } 3881 case ACB_ADAPTER_TYPE_D: { 3882 if (acb->acb_flags & ACB_F_BUS_RESET) { 3883 long timeout; 3884 pr_notice("arcmsr: there is an bus reset" 3885 " eh proceeding.......\n"); 3886 timeout = wait_event_timeout(wait_q, (acb->acb_flags 3887 & ACB_F_BUS_RESET) == 0, 220 * HZ); 3888 if (timeout) 3889 return SUCCESS; 3890 } 3891 acb->acb_flags |= ACB_F_BUS_RESET; 3892 if (!arcmsr_iop_reset(acb)) { 3893 struct MessageUnit_D *reg; 3894 reg = acb->pmuD; 3895 arcmsr_hardware_reset(acb); 3896 acb->acb_flags &= ~ACB_F_IOP_INITED; 3897 nap: 3898 ssleep(ARCMSR_SLEEPTIME); 3899 if ((readl(reg->sample_at_reset) & 0x80) != 0) { 3900 pr_err("arcmsr%d: waiting for " 3901 "hw bus reset return, retry=%d\n", 3902 acb->host->host_no, retry_count); 3903 if (retry_count > ARCMSR_RETRYCOUNT) { 3904 acb->fw_flag = FW_DEADLOCK; 3905 pr_err("arcmsr%d: waiting for hw bus" 3906 " reset return, " 3907 "RETRY TERMINATED!!\n", 3908 acb->host->host_no); 3909 return FAILED; 3910 } 3911 retry_count++; 3912 goto nap; 3913 } 3914 acb->acb_flags |= ACB_F_IOP_INITED; 3915 /* disable all outbound interrupt */ 3916 intmask_org = arcmsr_disable_outbound_ints(acb); 3917 arcmsr_get_firmware_spec(acb); 3918 arcmsr_start_adapter_bgrb(acb); 3919 arcmsr_clear_doorbell_queue_buffer(acb); 3920 arcmsr_enable_outbound_ints(acb, intmask_org); 3921 atomic_set(&acb->rq_map_token, 16); 3922 atomic_set(&acb->ante_token_value, 16); 3923 acb->fw_flag = FW_NORMAL; 3924 mod_timer(&acb->eternal_timer, 3925 jiffies + msecs_to_jiffies(6 * HZ)); 3926 acb->acb_flags &= ~ACB_F_BUS_RESET; 3927 rtn = SUCCESS; 3928 pr_err("arcmsr: scsi bus reset " 3929 "eh returns with success\n"); 3930 } else { 3931 acb->acb_flags &= ~ACB_F_BUS_RESET; 3932 atomic_set(&acb->rq_map_token, 16); 3933 atomic_set(&acb->ante_token_value, 16); 3934 acb->fw_flag = FW_NORMAL; 3935 mod_timer(&acb->eternal_timer, 3936 jiffies + msecs_to_jiffies(6 * HZ)); 3937 rtn = SUCCESS; 3938 } 3939 break; 3940 } 3941 } 3942 return rtn; 3943 } 3944 3945 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3946 struct CommandControlBlock *ccb) 3947 { 3948 int rtn; 3949 rtn = arcmsr_polling_ccbdone(acb, ccb); 3950 return rtn; 3951 } 3952 3953 static int arcmsr_abort(struct scsi_cmnd *cmd) 3954 { 3955 struct AdapterControlBlock *acb = 3956 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3957 int i = 0; 3958 int rtn = FAILED; 3959 uint32_t intmask_org; 3960 3961 printk(KERN_NOTICE 3962 "arcmsr%d: abort device command of scsi id = %d lun = %d\n", 3963 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun); 3964 acb->acb_flags |= ACB_F_ABORT; 3965 acb->num_aborts++; 3966 /* 3967 ************************************************ 3968 ** the all interrupt service routine is locked 3969 ** we need to handle it as soon as possible and exit 3970 ************************************************ 3971 */ 3972 if (!atomic_read(&acb->ccboutstandingcount)) { 3973 acb->acb_flags &= ~ACB_F_ABORT; 3974 return rtn; 3975 } 3976 3977 intmask_org = arcmsr_disable_outbound_ints(acb); 3978 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3979 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3980 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3981 ccb->startdone = ARCMSR_CCB_ABORTED; 3982 rtn = arcmsr_abort_one_cmd(acb, ccb); 3983 break; 3984 } 3985 } 3986 acb->acb_flags &= ~ACB_F_ABORT; 3987 arcmsr_enable_outbound_ints(acb, intmask_org); 3988 return rtn; 3989 } 3990 3991 static const char *arcmsr_info(struct Scsi_Host *host) 3992 { 3993 struct AdapterControlBlock *acb = 3994 (struct AdapterControlBlock *) host->hostdata; 3995 static char buf[256]; 3996 char *type; 3997 int raid6 = 1; 3998 switch (acb->pdev->device) { 3999 case PCI_DEVICE_ID_ARECA_1110: 4000 case PCI_DEVICE_ID_ARECA_1200: 4001 case PCI_DEVICE_ID_ARECA_1202: 4002 case PCI_DEVICE_ID_ARECA_1210: 4003 raid6 = 0; 4004 /*FALLTHRU*/ 4005 case PCI_DEVICE_ID_ARECA_1120: 4006 case PCI_DEVICE_ID_ARECA_1130: 4007 case PCI_DEVICE_ID_ARECA_1160: 4008 case PCI_DEVICE_ID_ARECA_1170: 4009 case PCI_DEVICE_ID_ARECA_1201: 4010 case PCI_DEVICE_ID_ARECA_1203: 4011 case PCI_DEVICE_ID_ARECA_1220: 4012 case PCI_DEVICE_ID_ARECA_1230: 4013 case PCI_DEVICE_ID_ARECA_1260: 4014 case PCI_DEVICE_ID_ARECA_1270: 4015 case PCI_DEVICE_ID_ARECA_1280: 4016 type = "SATA"; 4017 break; 4018 case PCI_DEVICE_ID_ARECA_1214: 4019 case PCI_DEVICE_ID_ARECA_1380: 4020 case PCI_DEVICE_ID_ARECA_1381: 4021 case PCI_DEVICE_ID_ARECA_1680: 4022 case PCI_DEVICE_ID_ARECA_1681: 4023 case PCI_DEVICE_ID_ARECA_1880: 4024 type = "SAS/SATA"; 4025 break; 4026 default: 4027 type = "unknown"; 4028 raid6 = 0; 4029 break; 4030 } 4031 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n", 4032 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION); 4033 return buf; 4034 } 4035