1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Nick Cheng, C.L. Huang 6 ** Description: SCSI RAID Device Driver for Areca RAID Controller 7 ******************************************************************************* 8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved 9 ** 10 ** Web site: www.areca.com.tw 11 ** E-mail: support@areca.com.tw 12 ** 13 ** This program is free software; you can redistribute it and/or modify 14 ** it under the terms of the GNU General Public License version 2 as 15 ** published by the Free Software Foundation. 16 ** This program is distributed in the hope that it will be useful, 17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 ** GNU General Public License for more details. 20 ******************************************************************************* 21 ** Redistribution and use in source and binary forms, with or without 22 ** modification, are permitted provided that the following conditions 23 ** are met: 24 ** 1. Redistributions of source code must retain the above copyright 25 ** notice, this list of conditions and the following disclaimer. 26 ** 2. Redistributions in binary form must reproduce the above copyright 27 ** notice, this list of conditions and the following disclaimer in the 28 ** documentation and/or other materials provided with the distribution. 29 ** 3. The name of the author may not be used to endorse or promote products 30 ** derived from this software without specific prior written permission. 31 ** 32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 ******************************************************************************* 43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 44 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 45 ******************************************************************************* 46 */ 47 #include <linux/module.h> 48 #include <linux/reboot.h> 49 #include <linux/spinlock.h> 50 #include <linux/pci_ids.h> 51 #include <linux/interrupt.h> 52 #include <linux/moduleparam.h> 53 #include <linux/errno.h> 54 #include <linux/types.h> 55 #include <linux/delay.h> 56 #include <linux/dma-mapping.h> 57 #include <linux/timer.h> 58 #include <linux/slab.h> 59 #include <linux/pci.h> 60 #include <linux/aer.h> 61 #include <linux/circ_buf.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <linux/uaccess.h> 65 #include <scsi/scsi_host.h> 66 #include <scsi/scsi.h> 67 #include <scsi/scsi_cmnd.h> 68 #include <scsi/scsi_tcq.h> 69 #include <scsi/scsi_device.h> 70 #include <scsi/scsi_transport.h> 71 #include <scsi/scsicam.h> 72 #include "arcmsr.h" 73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>"); 74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver"); 75 MODULE_LICENSE("Dual BSD/GPL"); 76 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 77 78 #define ARCMSR_SLEEPTIME 10 79 #define ARCMSR_RETRYCOUNT 12 80 81 static wait_queue_head_t wait_q; 82 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 83 struct scsi_cmnd *cmd); 84 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 85 static int arcmsr_abort(struct scsi_cmnd *); 86 static int arcmsr_bus_reset(struct scsi_cmnd *); 87 static int arcmsr_bios_param(struct scsi_device *sdev, 88 struct block_device *bdev, sector_t capacity, int *info); 89 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 90 static int arcmsr_probe(struct pci_dev *pdev, 91 const struct pci_device_id *id); 92 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state); 93 static int arcmsr_resume(struct pci_dev *pdev); 94 static void arcmsr_remove(struct pci_dev *pdev); 95 static void arcmsr_shutdown(struct pci_dev *pdev); 96 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 97 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 98 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 99 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 100 u32 intmask_org); 101 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 102 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb); 103 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb); 104 static void arcmsr_request_device_map(struct timer_list *t); 105 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb); 106 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb); 107 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb); 108 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 109 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 110 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 111 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB); 112 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb); 113 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 114 static const char *arcmsr_info(struct Scsi_Host *); 115 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 116 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *); 117 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb); 118 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) 119 { 120 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 121 queue_depth = ARCMSR_MAX_CMD_PERLUN; 122 return scsi_change_queue_depth(sdev, queue_depth); 123 } 124 125 static struct scsi_host_template arcmsr_scsi_host_template = { 126 .module = THIS_MODULE, 127 .name = "Areca SAS/SATA RAID driver", 128 .info = arcmsr_info, 129 .queuecommand = arcmsr_queue_command, 130 .eh_abort_handler = arcmsr_abort, 131 .eh_bus_reset_handler = arcmsr_bus_reset, 132 .bios_param = arcmsr_bios_param, 133 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 134 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 135 .this_id = ARCMSR_SCSI_INITIATOR_ID, 136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 139 .use_clustering = ENABLE_CLUSTERING, 140 .shost_attrs = arcmsr_host_attrs, 141 .no_write_same = 1, 142 }; 143 144 static struct pci_device_id arcmsr_device_id_table[] = { 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110), 146 .driver_data = ACB_ADAPTER_TYPE_A}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120), 148 .driver_data = ACB_ADAPTER_TYPE_A}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130), 150 .driver_data = ACB_ADAPTER_TYPE_A}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160), 152 .driver_data = ACB_ADAPTER_TYPE_A}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170), 154 .driver_data = ACB_ADAPTER_TYPE_A}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200), 156 .driver_data = ACB_ADAPTER_TYPE_B}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201), 158 .driver_data = ACB_ADAPTER_TYPE_B}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202), 160 .driver_data = ACB_ADAPTER_TYPE_B}, 161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203), 162 .driver_data = ACB_ADAPTER_TYPE_B}, 163 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210), 164 .driver_data = ACB_ADAPTER_TYPE_A}, 165 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214), 166 .driver_data = ACB_ADAPTER_TYPE_D}, 167 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220), 168 .driver_data = ACB_ADAPTER_TYPE_A}, 169 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230), 170 .driver_data = ACB_ADAPTER_TYPE_A}, 171 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260), 172 .driver_data = ACB_ADAPTER_TYPE_A}, 173 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270), 174 .driver_data = ACB_ADAPTER_TYPE_A}, 175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280), 176 .driver_data = ACB_ADAPTER_TYPE_A}, 177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380), 178 .driver_data = ACB_ADAPTER_TYPE_A}, 179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381), 180 .driver_data = ACB_ADAPTER_TYPE_A}, 181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680), 182 .driver_data = ACB_ADAPTER_TYPE_A}, 183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681), 184 .driver_data = ACB_ADAPTER_TYPE_A}, 185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880), 186 .driver_data = ACB_ADAPTER_TYPE_C}, 187 {0, 0}, /* Terminating entry */ 188 }; 189 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 190 191 static struct pci_driver arcmsr_pci_driver = { 192 .name = "arcmsr", 193 .id_table = arcmsr_device_id_table, 194 .probe = arcmsr_probe, 195 .remove = arcmsr_remove, 196 .suspend = arcmsr_suspend, 197 .resume = arcmsr_resume, 198 .shutdown = arcmsr_shutdown, 199 }; 200 /* 201 **************************************************************************** 202 **************************************************************************** 203 */ 204 205 static void arcmsr_free_mu(struct AdapterControlBlock *acb) 206 { 207 switch (acb->adapter_type) { 208 case ACB_ADAPTER_TYPE_B: 209 case ACB_ADAPTER_TYPE_D: { 210 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize, 211 acb->dma_coherent2, acb->dma_coherent_handle2); 212 break; 213 } 214 } 215 } 216 217 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 218 { 219 struct pci_dev *pdev = acb->pdev; 220 switch (acb->adapter_type){ 221 case ACB_ADAPTER_TYPE_A:{ 222 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 223 if (!acb->pmuA) { 224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 225 return false; 226 } 227 break; 228 } 229 case ACB_ADAPTER_TYPE_B:{ 230 void __iomem *mem_base0, *mem_base1; 231 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 232 if (!mem_base0) { 233 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 234 return false; 235 } 236 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 237 if (!mem_base1) { 238 iounmap(mem_base0); 239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 240 return false; 241 } 242 acb->mem_base0 = mem_base0; 243 acb->mem_base1 = mem_base1; 244 break; 245 } 246 case ACB_ADAPTER_TYPE_C:{ 247 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 248 if (!acb->pmuC) { 249 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 250 return false; 251 } 252 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 253 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 254 return true; 255 } 256 break; 257 } 258 case ACB_ADAPTER_TYPE_D: { 259 void __iomem *mem_base0; 260 unsigned long addr, range, flags; 261 262 addr = (unsigned long)pci_resource_start(pdev, 0); 263 range = pci_resource_len(pdev, 0); 264 flags = pci_resource_flags(pdev, 0); 265 mem_base0 = ioremap(addr, range); 266 if (!mem_base0) { 267 pr_notice("arcmsr%d: memory mapping region fail\n", 268 acb->host->host_no); 269 return false; 270 } 271 acb->mem_base0 = mem_base0; 272 break; 273 } 274 } 275 return true; 276 } 277 278 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 279 { 280 switch (acb->adapter_type) { 281 case ACB_ADAPTER_TYPE_A:{ 282 iounmap(acb->pmuA); 283 } 284 break; 285 case ACB_ADAPTER_TYPE_B:{ 286 iounmap(acb->mem_base0); 287 iounmap(acb->mem_base1); 288 } 289 290 break; 291 case ACB_ADAPTER_TYPE_C:{ 292 iounmap(acb->pmuC); 293 } 294 break; 295 case ACB_ADAPTER_TYPE_D: 296 iounmap(acb->mem_base0); 297 break; 298 } 299 } 300 301 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 302 { 303 irqreturn_t handle_state; 304 struct AdapterControlBlock *acb = dev_id; 305 306 handle_state = arcmsr_interrupt(acb); 307 return handle_state; 308 } 309 310 static int arcmsr_bios_param(struct scsi_device *sdev, 311 struct block_device *bdev, sector_t capacity, int *geom) 312 { 313 int ret, heads, sectors, cylinders, total_capacity; 314 unsigned char *buffer;/* return copy of block device's partition table */ 315 316 buffer = scsi_bios_ptable(bdev); 317 if (buffer) { 318 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 319 kfree(buffer); 320 if (ret != -1) 321 return ret; 322 } 323 total_capacity = capacity; 324 heads = 64; 325 sectors = 32; 326 cylinders = total_capacity / (heads * sectors); 327 if (cylinders > 1024) { 328 heads = 255; 329 sectors = 63; 330 cylinders = total_capacity / (heads * sectors); 331 } 332 geom[0] = heads; 333 geom[1] = sectors; 334 geom[2] = cylinders; 335 return 0; 336 } 337 338 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb) 339 { 340 struct MessageUnit_A __iomem *reg = acb->pmuA; 341 int i; 342 343 for (i = 0; i < 2000; i++) { 344 if (readl(®->outbound_intstatus) & 345 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 346 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 347 ®->outbound_intstatus); 348 return true; 349 } 350 msleep(10); 351 } /* max 20 seconds */ 352 353 return false; 354 } 355 356 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb) 357 { 358 struct MessageUnit_B *reg = acb->pmuB; 359 int i; 360 361 for (i = 0; i < 2000; i++) { 362 if (readl(reg->iop2drv_doorbell) 363 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 364 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, 365 reg->iop2drv_doorbell); 366 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, 367 reg->drv2iop_doorbell); 368 return true; 369 } 370 msleep(10); 371 } /* max 20 seconds */ 372 373 return false; 374 } 375 376 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB) 377 { 378 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 379 int i; 380 381 for (i = 0; i < 2000; i++) { 382 if (readl(&phbcmu->outbound_doorbell) 383 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 384 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, 385 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/ 386 return true; 387 } 388 msleep(10); 389 } /* max 20 seconds */ 390 391 return false; 392 } 393 394 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB) 395 { 396 struct MessageUnit_D *reg = pACB->pmuD; 397 int i; 398 399 for (i = 0; i < 2000; i++) { 400 if (readl(reg->outbound_doorbell) 401 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 402 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 403 reg->outbound_doorbell); 404 return true; 405 } 406 msleep(10); 407 } /* max 20 seconds */ 408 return false; 409 } 410 411 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb) 412 { 413 struct MessageUnit_A __iomem *reg = acb->pmuA; 414 int retry_count = 30; 415 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 416 do { 417 if (arcmsr_hbaA_wait_msgint_ready(acb)) 418 break; 419 else { 420 retry_count--; 421 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 422 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 423 } 424 } while (retry_count != 0); 425 } 426 427 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb) 428 { 429 struct MessageUnit_B *reg = acb->pmuB; 430 int retry_count = 30; 431 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 432 do { 433 if (arcmsr_hbaB_wait_msgint_ready(acb)) 434 break; 435 else { 436 retry_count--; 437 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 438 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 439 } 440 } while (retry_count != 0); 441 } 442 443 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB) 444 { 445 struct MessageUnit_C __iomem *reg = pACB->pmuC; 446 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 447 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 448 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 449 do { 450 if (arcmsr_hbaC_wait_msgint_ready(pACB)) { 451 break; 452 } else { 453 retry_count--; 454 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 455 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 456 } 457 } while (retry_count != 0); 458 return; 459 } 460 461 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB) 462 { 463 int retry_count = 15; 464 struct MessageUnit_D *reg = pACB->pmuD; 465 466 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0); 467 do { 468 if (arcmsr_hbaD_wait_msgint_ready(pACB)) 469 break; 470 471 retry_count--; 472 pr_notice("arcmsr%d: wait 'flush adapter " 473 "cache' timeout, retry count down = %d\n", 474 pACB->host->host_no, retry_count); 475 } while (retry_count != 0); 476 } 477 478 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 479 { 480 switch (acb->adapter_type) { 481 482 case ACB_ADAPTER_TYPE_A: { 483 arcmsr_hbaA_flush_cache(acb); 484 } 485 break; 486 487 case ACB_ADAPTER_TYPE_B: { 488 arcmsr_hbaB_flush_cache(acb); 489 } 490 break; 491 case ACB_ADAPTER_TYPE_C: { 492 arcmsr_hbaC_flush_cache(acb); 493 } 494 break; 495 case ACB_ADAPTER_TYPE_D: 496 arcmsr_hbaD_flush_cache(acb); 497 break; 498 } 499 } 500 501 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb) 502 { 503 bool rtn = true; 504 void *dma_coherent; 505 dma_addr_t dma_coherent_handle; 506 struct pci_dev *pdev = acb->pdev; 507 508 switch (acb->adapter_type) { 509 case ACB_ADAPTER_TYPE_B: { 510 struct MessageUnit_B *reg; 511 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32); 512 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 513 &dma_coherent_handle, GFP_KERNEL); 514 if (!dma_coherent) { 515 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 516 return false; 517 } 518 acb->dma_coherent_handle2 = dma_coherent_handle; 519 acb->dma_coherent2 = dma_coherent; 520 reg = (struct MessageUnit_B *)dma_coherent; 521 acb->pmuB = reg; 522 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) { 523 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203); 524 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203); 525 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203); 526 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203); 527 } else { 528 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL); 529 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK); 530 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL); 531 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK); 532 } 533 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER); 534 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER); 535 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER); 536 } 537 break; 538 case ACB_ADAPTER_TYPE_D: { 539 struct MessageUnit_D *reg; 540 541 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32); 542 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 543 &dma_coherent_handle, GFP_KERNEL); 544 if (!dma_coherent) { 545 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 546 return false; 547 } 548 acb->dma_coherent_handle2 = dma_coherent_handle; 549 acb->dma_coherent2 = dma_coherent; 550 reg = (struct MessageUnit_D *)dma_coherent; 551 acb->pmuD = reg; 552 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID); 553 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION); 554 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK); 555 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET); 556 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST); 557 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS); 558 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE); 559 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0); 560 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1); 561 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0); 562 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1); 563 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL); 564 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL); 565 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE); 566 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW); 567 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH); 568 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER); 569 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW); 570 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH); 571 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER); 572 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER); 573 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE); 574 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE); 575 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER); 576 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER); 577 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER); 578 } 579 break; 580 default: 581 break; 582 } 583 return rtn; 584 } 585 586 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 587 { 588 struct pci_dev *pdev = acb->pdev; 589 void *dma_coherent; 590 dma_addr_t dma_coherent_handle; 591 struct CommandControlBlock *ccb_tmp; 592 int i = 0, j = 0; 593 dma_addr_t cdb_phyaddr; 594 unsigned long roundup_ccbsize; 595 unsigned long max_xfer_len; 596 unsigned long max_sg_entrys; 597 uint32_t firm_config_version; 598 599 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 600 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 601 acb->devstate[i][j] = ARECA_RAID_GONE; 602 603 max_xfer_len = ARCMSR_MAX_XFER_LEN; 604 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 605 firm_config_version = acb->firm_cfg_version; 606 if((firm_config_version & 0xFF) >= 3){ 607 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 608 max_sg_entrys = (max_xfer_len/4096); 609 } 610 acb->host->max_sectors = max_xfer_len/512; 611 acb->host->sg_tablesize = max_sg_entrys; 612 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 613 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; 614 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 615 if(!dma_coherent){ 616 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); 617 return -ENOMEM; 618 } 619 acb->dma_coherent = dma_coherent; 620 acb->dma_coherent_handle = dma_coherent_handle; 621 memset(dma_coherent, 0, acb->uncache_size); 622 ccb_tmp = dma_coherent; 623 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 624 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 625 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 626 switch (acb->adapter_type) { 627 case ACB_ADAPTER_TYPE_A: 628 case ACB_ADAPTER_TYPE_B: 629 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5; 630 break; 631 case ACB_ADAPTER_TYPE_C: 632 case ACB_ADAPTER_TYPE_D: 633 ccb_tmp->cdb_phyaddr = cdb_phyaddr; 634 break; 635 } 636 acb->pccb_pool[i] = ccb_tmp; 637 ccb_tmp->acb = acb; 638 INIT_LIST_HEAD(&ccb_tmp->list); 639 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 640 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 641 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 642 } 643 return 0; 644 } 645 646 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 647 { 648 struct AdapterControlBlock *acb = container_of(work, 649 struct AdapterControlBlock, arcmsr_do_message_isr_bh); 650 char *acb_dev_map = (char *)acb->device_map; 651 uint32_t __iomem *signature = NULL; 652 char __iomem *devicemap = NULL; 653 int target, lun; 654 struct scsi_device *psdev; 655 char diff, temp; 656 657 switch (acb->adapter_type) { 658 case ACB_ADAPTER_TYPE_A: { 659 struct MessageUnit_A __iomem *reg = acb->pmuA; 660 661 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 662 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 663 break; 664 } 665 case ACB_ADAPTER_TYPE_B: { 666 struct MessageUnit_B *reg = acb->pmuB; 667 668 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 669 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 670 break; 671 } 672 case ACB_ADAPTER_TYPE_C: { 673 struct MessageUnit_C __iomem *reg = acb->pmuC; 674 675 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 676 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 677 break; 678 } 679 case ACB_ADAPTER_TYPE_D: { 680 struct MessageUnit_D *reg = acb->pmuD; 681 682 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 683 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 684 break; 685 } 686 } 687 atomic_inc(&acb->rq_map_token); 688 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG) 689 return; 690 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; 691 target++) { 692 temp = readb(devicemap); 693 diff = (*acb_dev_map) ^ temp; 694 if (diff != 0) { 695 *acb_dev_map = temp; 696 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; 697 lun++) { 698 if ((diff & 0x01) == 1 && 699 (temp & 0x01) == 1) { 700 scsi_add_device(acb->host, 701 0, target, lun); 702 } else if ((diff & 0x01) == 1 703 && (temp & 0x01) == 0) { 704 psdev = scsi_device_lookup(acb->host, 705 0, target, lun); 706 if (psdev != NULL) { 707 scsi_remove_device(psdev); 708 scsi_device_put(psdev); 709 } 710 } 711 temp >>= 1; 712 diff >>= 1; 713 } 714 } 715 devicemap++; 716 acb_dev_map++; 717 } 718 } 719 720 static int 721 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb) 722 { 723 unsigned long flags; 724 int nvec, i; 725 726 nvec = pci_alloc_irq_vectors(pdev, 1, ARCMST_NUM_MSIX_VECTORS, 727 PCI_IRQ_MSIX); 728 if (nvec > 0) { 729 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no); 730 flags = 0; 731 } else { 732 nvec = pci_alloc_irq_vectors(pdev, 1, 1, 733 PCI_IRQ_MSI | PCI_IRQ_LEGACY); 734 if (nvec < 1) 735 return FAILED; 736 737 flags = IRQF_SHARED; 738 } 739 740 acb->vector_count = nvec; 741 for (i = 0; i < nvec; i++) { 742 if (request_irq(pci_irq_vector(pdev, i), arcmsr_do_interrupt, 743 flags, "arcmsr", acb)) { 744 pr_warn("arcmsr%d: request_irq =%d failed!\n", 745 acb->host->host_no, pci_irq_vector(pdev, i)); 746 goto out_free_irq; 747 } 748 } 749 750 return SUCCESS; 751 out_free_irq: 752 while (--i >= 0) 753 free_irq(pci_irq_vector(pdev, i), acb); 754 pci_free_irq_vectors(pdev); 755 return FAILED; 756 } 757 758 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 759 { 760 struct Scsi_Host *host; 761 struct AdapterControlBlock *acb; 762 uint8_t bus,dev_fun; 763 int error; 764 error = pci_enable_device(pdev); 765 if(error){ 766 return -ENODEV; 767 } 768 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 769 if(!host){ 770 goto pci_disable_dev; 771 } 772 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 773 if(error){ 774 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 775 if(error){ 776 printk(KERN_WARNING 777 "scsi%d: No suitable DMA mask available\n", 778 host->host_no); 779 goto scsi_host_release; 780 } 781 } 782 init_waitqueue_head(&wait_q); 783 bus = pdev->bus->number; 784 dev_fun = pdev->devfn; 785 acb = (struct AdapterControlBlock *) host->hostdata; 786 memset(acb,0,sizeof(struct AdapterControlBlock)); 787 acb->pdev = pdev; 788 acb->host = host; 789 host->max_lun = ARCMSR_MAX_TARGETLUN; 790 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 791 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 792 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD; 793 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 794 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 795 host->unique_id = (bus << 8) | dev_fun; 796 pci_set_drvdata(pdev, host); 797 pci_set_master(pdev); 798 error = pci_request_regions(pdev, "arcmsr"); 799 if(error){ 800 goto scsi_host_release; 801 } 802 spin_lock_init(&acb->eh_lock); 803 spin_lock_init(&acb->ccblist_lock); 804 spin_lock_init(&acb->postq_lock); 805 spin_lock_init(&acb->doneq_lock); 806 spin_lock_init(&acb->rqbuffer_lock); 807 spin_lock_init(&acb->wqbuffer_lock); 808 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 809 ACB_F_MESSAGE_RQBUFFER_CLEARED | 810 ACB_F_MESSAGE_WQBUFFER_READED); 811 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 812 INIT_LIST_HEAD(&acb->ccb_free_list); 813 acb->adapter_type = id->driver_data; 814 error = arcmsr_remap_pciregion(acb); 815 if(!error){ 816 goto pci_release_regs; 817 } 818 error = arcmsr_alloc_io_queue(acb); 819 if (!error) 820 goto unmap_pci_region; 821 error = arcmsr_get_firmware_spec(acb); 822 if(!error){ 823 goto free_hbb_mu; 824 } 825 error = arcmsr_alloc_ccb_pool(acb); 826 if(error){ 827 goto free_hbb_mu; 828 } 829 error = scsi_add_host(host, &pdev->dev); 830 if(error){ 831 goto free_ccb_pool; 832 } 833 if (arcmsr_request_irq(pdev, acb) == FAILED) 834 goto scsi_host_remove; 835 arcmsr_iop_init(acb); 836 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 837 atomic_set(&acb->rq_map_token, 16); 838 atomic_set(&acb->ante_token_value, 16); 839 acb->fw_flag = FW_NORMAL; 840 timer_setup(&acb->eternal_timer, arcmsr_request_device_map, 0); 841 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 842 add_timer(&acb->eternal_timer); 843 if(arcmsr_alloc_sysfs_attr(acb)) 844 goto out_free_sysfs; 845 scsi_scan_host(host); 846 return 0; 847 out_free_sysfs: 848 del_timer_sync(&acb->eternal_timer); 849 flush_work(&acb->arcmsr_do_message_isr_bh); 850 arcmsr_stop_adapter_bgrb(acb); 851 arcmsr_flush_adapter_cache(acb); 852 arcmsr_free_irq(pdev, acb); 853 scsi_host_remove: 854 scsi_remove_host(host); 855 free_ccb_pool: 856 arcmsr_free_ccb_pool(acb); 857 free_hbb_mu: 858 arcmsr_free_mu(acb); 859 unmap_pci_region: 860 arcmsr_unmap_pciregion(acb); 861 pci_release_regs: 862 pci_release_regions(pdev); 863 scsi_host_release: 864 scsi_host_put(host); 865 pci_disable_dev: 866 pci_disable_device(pdev); 867 return -ENODEV; 868 } 869 870 static void arcmsr_free_irq(struct pci_dev *pdev, 871 struct AdapterControlBlock *acb) 872 { 873 int i; 874 875 for (i = 0; i < acb->vector_count; i++) 876 free_irq(pci_irq_vector(pdev, i), acb); 877 pci_free_irq_vectors(pdev); 878 } 879 880 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state) 881 { 882 uint32_t intmask_org; 883 struct Scsi_Host *host = pci_get_drvdata(pdev); 884 struct AdapterControlBlock *acb = 885 (struct AdapterControlBlock *)host->hostdata; 886 887 intmask_org = arcmsr_disable_outbound_ints(acb); 888 arcmsr_free_irq(pdev, acb); 889 del_timer_sync(&acb->eternal_timer); 890 flush_work(&acb->arcmsr_do_message_isr_bh); 891 arcmsr_stop_adapter_bgrb(acb); 892 arcmsr_flush_adapter_cache(acb); 893 pci_set_drvdata(pdev, host); 894 pci_save_state(pdev); 895 pci_disable_device(pdev); 896 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 897 return 0; 898 } 899 900 static int arcmsr_resume(struct pci_dev *pdev) 901 { 902 int error; 903 struct Scsi_Host *host = pci_get_drvdata(pdev); 904 struct AdapterControlBlock *acb = 905 (struct AdapterControlBlock *)host->hostdata; 906 907 pci_set_power_state(pdev, PCI_D0); 908 pci_enable_wake(pdev, PCI_D0, 0); 909 pci_restore_state(pdev); 910 if (pci_enable_device(pdev)) { 911 pr_warn("%s: pci_enable_device error\n", __func__); 912 return -ENODEV; 913 } 914 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 915 if (error) { 916 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 917 if (error) { 918 pr_warn("scsi%d: No suitable DMA mask available\n", 919 host->host_no); 920 goto controller_unregister; 921 } 922 } 923 pci_set_master(pdev); 924 if (arcmsr_request_irq(pdev, acb) == FAILED) 925 goto controller_stop; 926 arcmsr_iop_init(acb); 927 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 928 atomic_set(&acb->rq_map_token, 16); 929 atomic_set(&acb->ante_token_value, 16); 930 acb->fw_flag = FW_NORMAL; 931 timer_setup(&acb->eternal_timer, arcmsr_request_device_map, 0); 932 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 933 add_timer(&acb->eternal_timer); 934 return 0; 935 controller_stop: 936 arcmsr_stop_adapter_bgrb(acb); 937 arcmsr_flush_adapter_cache(acb); 938 controller_unregister: 939 scsi_remove_host(host); 940 arcmsr_free_ccb_pool(acb); 941 arcmsr_unmap_pciregion(acb); 942 pci_release_regions(pdev); 943 scsi_host_put(host); 944 pci_disable_device(pdev); 945 return -ENODEV; 946 } 947 948 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb) 949 { 950 struct MessageUnit_A __iomem *reg = acb->pmuA; 951 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 952 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 953 printk(KERN_NOTICE 954 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 955 , acb->host->host_no); 956 return false; 957 } 958 return true; 959 } 960 961 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb) 962 { 963 struct MessageUnit_B *reg = acb->pmuB; 964 965 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 966 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 967 printk(KERN_NOTICE 968 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 969 , acb->host->host_no); 970 return false; 971 } 972 return true; 973 } 974 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB) 975 { 976 struct MessageUnit_C __iomem *reg = pACB->pmuC; 977 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 978 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 979 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 980 printk(KERN_NOTICE 981 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 982 , pACB->host->host_no); 983 return false; 984 } 985 return true; 986 } 987 988 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB) 989 { 990 struct MessageUnit_D *reg = pACB->pmuD; 991 992 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0); 993 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 994 pr_notice("arcmsr%d: wait 'abort all outstanding " 995 "command' timeout\n", pACB->host->host_no); 996 return false; 997 } 998 return true; 999 } 1000 1001 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 1002 { 1003 uint8_t rtnval = 0; 1004 switch (acb->adapter_type) { 1005 case ACB_ADAPTER_TYPE_A: { 1006 rtnval = arcmsr_hbaA_abort_allcmd(acb); 1007 } 1008 break; 1009 1010 case ACB_ADAPTER_TYPE_B: { 1011 rtnval = arcmsr_hbaB_abort_allcmd(acb); 1012 } 1013 break; 1014 1015 case ACB_ADAPTER_TYPE_C: { 1016 rtnval = arcmsr_hbaC_abort_allcmd(acb); 1017 } 1018 break; 1019 1020 case ACB_ADAPTER_TYPE_D: 1021 rtnval = arcmsr_hbaD_abort_allcmd(acb); 1022 break; 1023 } 1024 return rtnval; 1025 } 1026 1027 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 1028 { 1029 struct scsi_cmnd *pcmd = ccb->pcmd; 1030 1031 scsi_dma_unmap(pcmd); 1032 } 1033 1034 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 1035 { 1036 struct AdapterControlBlock *acb = ccb->acb; 1037 struct scsi_cmnd *pcmd = ccb->pcmd; 1038 unsigned long flags; 1039 atomic_dec(&acb->ccboutstandingcount); 1040 arcmsr_pci_unmap_dma(ccb); 1041 ccb->startdone = ARCMSR_CCB_DONE; 1042 spin_lock_irqsave(&acb->ccblist_lock, flags); 1043 list_add_tail(&ccb->list, &acb->ccb_free_list); 1044 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 1045 pcmd->scsi_done(pcmd); 1046 } 1047 1048 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 1049 { 1050 1051 struct scsi_cmnd *pcmd = ccb->pcmd; 1052 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 1053 pcmd->result = DID_OK << 16; 1054 if (sensebuffer) { 1055 int sense_data_length = 1056 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 1057 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 1058 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 1059 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 1060 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 1061 sensebuffer->Valid = 1; 1062 } 1063 } 1064 1065 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 1066 { 1067 u32 orig_mask = 0; 1068 switch (acb->adapter_type) { 1069 case ACB_ADAPTER_TYPE_A : { 1070 struct MessageUnit_A __iomem *reg = acb->pmuA; 1071 orig_mask = readl(®->outbound_intmask); 1072 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 1073 ®->outbound_intmask); 1074 } 1075 break; 1076 case ACB_ADAPTER_TYPE_B : { 1077 struct MessageUnit_B *reg = acb->pmuB; 1078 orig_mask = readl(reg->iop2drv_doorbell_mask); 1079 writel(0, reg->iop2drv_doorbell_mask); 1080 } 1081 break; 1082 case ACB_ADAPTER_TYPE_C:{ 1083 struct MessageUnit_C __iomem *reg = acb->pmuC; 1084 /* disable all outbound interrupt */ 1085 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 1086 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 1087 } 1088 break; 1089 case ACB_ADAPTER_TYPE_D: { 1090 struct MessageUnit_D *reg = acb->pmuD; 1091 /* disable all outbound interrupt */ 1092 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable); 1093 } 1094 break; 1095 } 1096 return orig_mask; 1097 } 1098 1099 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 1100 struct CommandControlBlock *ccb, bool error) 1101 { 1102 uint8_t id, lun; 1103 id = ccb->pcmd->device->id; 1104 lun = ccb->pcmd->device->lun; 1105 if (!error) { 1106 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 1107 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1108 ccb->pcmd->result = DID_OK << 16; 1109 arcmsr_ccb_complete(ccb); 1110 }else{ 1111 switch (ccb->arcmsr_cdb.DeviceStatus) { 1112 case ARCMSR_DEV_SELECT_TIMEOUT: { 1113 acb->devstate[id][lun] = ARECA_RAID_GONE; 1114 ccb->pcmd->result = DID_NO_CONNECT << 16; 1115 arcmsr_ccb_complete(ccb); 1116 } 1117 break; 1118 1119 case ARCMSR_DEV_ABORTED: 1120 1121 case ARCMSR_DEV_INIT_FAIL: { 1122 acb->devstate[id][lun] = ARECA_RAID_GONE; 1123 ccb->pcmd->result = DID_BAD_TARGET << 16; 1124 arcmsr_ccb_complete(ccb); 1125 } 1126 break; 1127 1128 case ARCMSR_DEV_CHECK_CONDITION: { 1129 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1130 arcmsr_report_sense_info(ccb); 1131 arcmsr_ccb_complete(ccb); 1132 } 1133 break; 1134 1135 default: 1136 printk(KERN_NOTICE 1137 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 1138 but got unknown DeviceStatus = 0x%x \n" 1139 , acb->host->host_no 1140 , id 1141 , lun 1142 , ccb->arcmsr_cdb.DeviceStatus); 1143 acb->devstate[id][lun] = ARECA_RAID_GONE; 1144 ccb->pcmd->result = DID_NO_CONNECT << 16; 1145 arcmsr_ccb_complete(ccb); 1146 break; 1147 } 1148 } 1149 } 1150 1151 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 1152 { 1153 int id, lun; 1154 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 1155 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 1156 struct scsi_cmnd *abortcmd = pCCB->pcmd; 1157 if (abortcmd) { 1158 id = abortcmd->device->id; 1159 lun = abortcmd->device->lun; 1160 abortcmd->result |= DID_ABORT << 16; 1161 arcmsr_ccb_complete(pCCB); 1162 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 1163 acb->host->host_no, pCCB); 1164 } 1165 return; 1166 } 1167 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 1168 done acb = '0x%p'" 1169 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 1170 " ccboutstandingcount = %d \n" 1171 , acb->host->host_no 1172 , acb 1173 , pCCB 1174 , pCCB->acb 1175 , pCCB->startdone 1176 , atomic_read(&acb->ccboutstandingcount)); 1177 return; 1178 } 1179 arcmsr_report_ccb_state(acb, pCCB, error); 1180 } 1181 1182 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 1183 { 1184 int i = 0; 1185 uint32_t flag_ccb, ccb_cdb_phy; 1186 struct ARCMSR_CDB *pARCMSR_CDB; 1187 bool error; 1188 struct CommandControlBlock *pCCB; 1189 switch (acb->adapter_type) { 1190 1191 case ACB_ADAPTER_TYPE_A: { 1192 struct MessageUnit_A __iomem *reg = acb->pmuA; 1193 uint32_t outbound_intstatus; 1194 outbound_intstatus = readl(®->outbound_intstatus) & 1195 acb->outbound_int_enable; 1196 /*clear and abort all outbound posted Q*/ 1197 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 1198 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 1199 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1200 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1201 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1202 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1203 arcmsr_drain_donequeue(acb, pCCB, error); 1204 } 1205 } 1206 break; 1207 1208 case ACB_ADAPTER_TYPE_B: { 1209 struct MessageUnit_B *reg = acb->pmuB; 1210 /*clear all outbound posted Q*/ 1211 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 1212 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 1213 flag_ccb = reg->done_qbuffer[i]; 1214 if (flag_ccb != 0) { 1215 reg->done_qbuffer[i] = 0; 1216 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1217 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1218 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1219 arcmsr_drain_donequeue(acb, pCCB, error); 1220 } 1221 reg->post_qbuffer[i] = 0; 1222 } 1223 reg->doneq_index = 0; 1224 reg->postq_index = 0; 1225 } 1226 break; 1227 case ACB_ADAPTER_TYPE_C: { 1228 struct MessageUnit_C __iomem *reg = acb->pmuC; 1229 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1230 /*need to do*/ 1231 flag_ccb = readl(®->outbound_queueport_low); 1232 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1233 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1234 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1235 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1236 arcmsr_drain_donequeue(acb, pCCB, error); 1237 } 1238 } 1239 break; 1240 case ACB_ADAPTER_TYPE_D: { 1241 struct MessageUnit_D *pmu = acb->pmuD; 1242 uint32_t outbound_write_pointer; 1243 uint32_t doneq_index, index_stripped, addressLow, residual, toggle; 1244 unsigned long flags; 1245 1246 residual = atomic_read(&acb->ccboutstandingcount); 1247 for (i = 0; i < residual; i++) { 1248 spin_lock_irqsave(&acb->doneq_lock, flags); 1249 outbound_write_pointer = 1250 pmu->done_qbuffer[0].addressLow + 1; 1251 doneq_index = pmu->doneq_index; 1252 if ((doneq_index & 0xFFF) != 1253 (outbound_write_pointer & 0xFFF)) { 1254 toggle = doneq_index & 0x4000; 1255 index_stripped = (doneq_index & 0xFFF) + 1; 1256 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 1257 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 1258 ((toggle ^ 0x4000) + 1); 1259 doneq_index = pmu->doneq_index; 1260 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1261 addressLow = pmu->done_qbuffer[doneq_index & 1262 0xFFF].addressLow; 1263 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 1264 pARCMSR_CDB = (struct ARCMSR_CDB *) 1265 (acb->vir2phy_offset + ccb_cdb_phy); 1266 pCCB = container_of(pARCMSR_CDB, 1267 struct CommandControlBlock, arcmsr_cdb); 1268 error = (addressLow & 1269 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? 1270 true : false; 1271 arcmsr_drain_donequeue(acb, pCCB, error); 1272 writel(doneq_index, 1273 pmu->outboundlist_read_pointer); 1274 } else { 1275 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1276 mdelay(10); 1277 } 1278 } 1279 pmu->postq_index = 0; 1280 pmu->doneq_index = 0x40FF; 1281 } 1282 break; 1283 } 1284 } 1285 1286 static void arcmsr_remove(struct pci_dev *pdev) 1287 { 1288 struct Scsi_Host *host = pci_get_drvdata(pdev); 1289 struct AdapterControlBlock *acb = 1290 (struct AdapterControlBlock *) host->hostdata; 1291 int poll_count = 0; 1292 arcmsr_free_sysfs_attr(acb); 1293 scsi_remove_host(host); 1294 flush_work(&acb->arcmsr_do_message_isr_bh); 1295 del_timer_sync(&acb->eternal_timer); 1296 arcmsr_disable_outbound_ints(acb); 1297 arcmsr_stop_adapter_bgrb(acb); 1298 arcmsr_flush_adapter_cache(acb); 1299 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1300 acb->acb_flags &= ~ACB_F_IOP_INITED; 1301 1302 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1303 if (!atomic_read(&acb->ccboutstandingcount)) 1304 break; 1305 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1306 msleep(25); 1307 } 1308 1309 if (atomic_read(&acb->ccboutstandingcount)) { 1310 int i; 1311 1312 arcmsr_abort_allcmd(acb); 1313 arcmsr_done4abort_postqueue(acb); 1314 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1315 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1316 if (ccb->startdone == ARCMSR_CCB_START) { 1317 ccb->startdone = ARCMSR_CCB_ABORTED; 1318 ccb->pcmd->result = DID_ABORT << 16; 1319 arcmsr_ccb_complete(ccb); 1320 } 1321 } 1322 } 1323 arcmsr_free_irq(pdev, acb); 1324 arcmsr_free_ccb_pool(acb); 1325 arcmsr_free_mu(acb); 1326 arcmsr_unmap_pciregion(acb); 1327 pci_release_regions(pdev); 1328 scsi_host_put(host); 1329 pci_disable_device(pdev); 1330 } 1331 1332 static void arcmsr_shutdown(struct pci_dev *pdev) 1333 { 1334 struct Scsi_Host *host = pci_get_drvdata(pdev); 1335 struct AdapterControlBlock *acb = 1336 (struct AdapterControlBlock *)host->hostdata; 1337 del_timer_sync(&acb->eternal_timer); 1338 arcmsr_disable_outbound_ints(acb); 1339 arcmsr_free_irq(pdev, acb); 1340 flush_work(&acb->arcmsr_do_message_isr_bh); 1341 arcmsr_stop_adapter_bgrb(acb); 1342 arcmsr_flush_adapter_cache(acb); 1343 } 1344 1345 static int arcmsr_module_init(void) 1346 { 1347 int error = 0; 1348 error = pci_register_driver(&arcmsr_pci_driver); 1349 return error; 1350 } 1351 1352 static void arcmsr_module_exit(void) 1353 { 1354 pci_unregister_driver(&arcmsr_pci_driver); 1355 } 1356 module_init(arcmsr_module_init); 1357 module_exit(arcmsr_module_exit); 1358 1359 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1360 u32 intmask_org) 1361 { 1362 u32 mask; 1363 switch (acb->adapter_type) { 1364 1365 case ACB_ADAPTER_TYPE_A: { 1366 struct MessageUnit_A __iomem *reg = acb->pmuA; 1367 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1368 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1369 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1370 writel(mask, ®->outbound_intmask); 1371 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1372 } 1373 break; 1374 1375 case ACB_ADAPTER_TYPE_B: { 1376 struct MessageUnit_B *reg = acb->pmuB; 1377 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1378 ARCMSR_IOP2DRV_DATA_READ_OK | 1379 ARCMSR_IOP2DRV_CDB_DONE | 1380 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1381 writel(mask, reg->iop2drv_doorbell_mask); 1382 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1383 } 1384 break; 1385 case ACB_ADAPTER_TYPE_C: { 1386 struct MessageUnit_C __iomem *reg = acb->pmuC; 1387 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1388 writel(intmask_org & mask, ®->host_int_mask); 1389 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1390 } 1391 break; 1392 case ACB_ADAPTER_TYPE_D: { 1393 struct MessageUnit_D *reg = acb->pmuD; 1394 1395 mask = ARCMSR_ARC1214_ALL_INT_ENABLE; 1396 writel(intmask_org | mask, reg->pcief0_int_enable); 1397 break; 1398 } 1399 } 1400 } 1401 1402 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1403 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1404 { 1405 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1406 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1407 __le32 address_lo, address_hi; 1408 int arccdbsize = 0x30; 1409 __le32 length = 0; 1410 int i; 1411 struct scatterlist *sg; 1412 int nseg; 1413 ccb->pcmd = pcmd; 1414 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1415 arcmsr_cdb->TargetID = pcmd->device->id; 1416 arcmsr_cdb->LUN = pcmd->device->lun; 1417 arcmsr_cdb->Function = 1; 1418 arcmsr_cdb->msgContext = 0; 1419 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1420 1421 nseg = scsi_dma_map(pcmd); 1422 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1423 return FAILED; 1424 scsi_for_each_sg(pcmd, sg, nseg, i) { 1425 /* Get the physical address of the current data pointer */ 1426 length = cpu_to_le32(sg_dma_len(sg)); 1427 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1428 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1429 if (address_hi == 0) { 1430 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1431 1432 pdma_sg->address = address_lo; 1433 pdma_sg->length = length; 1434 psge += sizeof (struct SG32ENTRY); 1435 arccdbsize += sizeof (struct SG32ENTRY); 1436 } else { 1437 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1438 1439 pdma_sg->addresshigh = address_hi; 1440 pdma_sg->address = address_lo; 1441 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1442 psge += sizeof (struct SG64ENTRY); 1443 arccdbsize += sizeof (struct SG64ENTRY); 1444 } 1445 } 1446 arcmsr_cdb->sgcount = (uint8_t)nseg; 1447 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1448 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1449 if ( arccdbsize > 256) 1450 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1451 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1452 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1453 ccb->arc_cdb_size = arccdbsize; 1454 return SUCCESS; 1455 } 1456 1457 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1458 { 1459 uint32_t cdb_phyaddr = ccb->cdb_phyaddr; 1460 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1461 atomic_inc(&acb->ccboutstandingcount); 1462 ccb->startdone = ARCMSR_CCB_START; 1463 switch (acb->adapter_type) { 1464 case ACB_ADAPTER_TYPE_A: { 1465 struct MessageUnit_A __iomem *reg = acb->pmuA; 1466 1467 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1468 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1469 ®->inbound_queueport); 1470 else 1471 writel(cdb_phyaddr, ®->inbound_queueport); 1472 break; 1473 } 1474 1475 case ACB_ADAPTER_TYPE_B: { 1476 struct MessageUnit_B *reg = acb->pmuB; 1477 uint32_t ending_index, index = reg->postq_index; 1478 1479 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1480 reg->post_qbuffer[ending_index] = 0; 1481 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1482 reg->post_qbuffer[index] = 1483 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE; 1484 } else { 1485 reg->post_qbuffer[index] = cdb_phyaddr; 1486 } 1487 index++; 1488 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1489 reg->postq_index = index; 1490 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1491 } 1492 break; 1493 case ACB_ADAPTER_TYPE_C: { 1494 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1495 uint32_t ccb_post_stamp, arc_cdb_size; 1496 1497 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1498 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1); 1499 if (acb->cdb_phyaddr_hi32) { 1500 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1501 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1502 } else { 1503 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1504 } 1505 } 1506 break; 1507 case ACB_ADAPTER_TYPE_D: { 1508 struct MessageUnit_D *pmu = acb->pmuD; 1509 u16 index_stripped; 1510 u16 postq_index, toggle; 1511 unsigned long flags; 1512 struct InBound_SRB *pinbound_srb; 1513 1514 spin_lock_irqsave(&acb->postq_lock, flags); 1515 postq_index = pmu->postq_index; 1516 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]); 1517 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr); 1518 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr); 1519 pinbound_srb->length = ccb->arc_cdb_size >> 2; 1520 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr); 1521 toggle = postq_index & 0x4000; 1522 index_stripped = postq_index + 1; 1523 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1); 1524 pmu->postq_index = index_stripped ? (index_stripped | toggle) : 1525 (toggle ^ 0x4000); 1526 writel(postq_index, pmu->inboundlist_write_pointer); 1527 spin_unlock_irqrestore(&acb->postq_lock, flags); 1528 break; 1529 } 1530 } 1531 } 1532 1533 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb) 1534 { 1535 struct MessageUnit_A __iomem *reg = acb->pmuA; 1536 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1537 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1538 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 1539 printk(KERN_NOTICE 1540 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1541 , acb->host->host_no); 1542 } 1543 } 1544 1545 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb) 1546 { 1547 struct MessageUnit_B *reg = acb->pmuB; 1548 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1549 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1550 1551 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 1552 printk(KERN_NOTICE 1553 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1554 , acb->host->host_no); 1555 } 1556 } 1557 1558 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB) 1559 { 1560 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1561 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1562 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1563 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1564 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1565 printk(KERN_NOTICE 1566 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1567 , pACB->host->host_no); 1568 } 1569 return; 1570 } 1571 1572 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB) 1573 { 1574 struct MessageUnit_D *reg = pACB->pmuD; 1575 1576 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1577 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0); 1578 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) 1579 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' " 1580 "timeout\n", pACB->host->host_no); 1581 } 1582 1583 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1584 { 1585 switch (acb->adapter_type) { 1586 case ACB_ADAPTER_TYPE_A: { 1587 arcmsr_hbaA_stop_bgrb(acb); 1588 } 1589 break; 1590 1591 case ACB_ADAPTER_TYPE_B: { 1592 arcmsr_hbaB_stop_bgrb(acb); 1593 } 1594 break; 1595 case ACB_ADAPTER_TYPE_C: { 1596 arcmsr_hbaC_stop_bgrb(acb); 1597 } 1598 break; 1599 case ACB_ADAPTER_TYPE_D: 1600 arcmsr_hbaD_stop_bgrb(acb); 1601 break; 1602 } 1603 } 1604 1605 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1606 { 1607 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1608 } 1609 1610 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1611 { 1612 switch (acb->adapter_type) { 1613 case ACB_ADAPTER_TYPE_A: { 1614 struct MessageUnit_A __iomem *reg = acb->pmuA; 1615 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1616 } 1617 break; 1618 1619 case ACB_ADAPTER_TYPE_B: { 1620 struct MessageUnit_B *reg = acb->pmuB; 1621 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1622 } 1623 break; 1624 case ACB_ADAPTER_TYPE_C: { 1625 struct MessageUnit_C __iomem *reg = acb->pmuC; 1626 1627 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1628 } 1629 break; 1630 case ACB_ADAPTER_TYPE_D: { 1631 struct MessageUnit_D *reg = acb->pmuD; 1632 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 1633 reg->inbound_doorbell); 1634 } 1635 break; 1636 } 1637 } 1638 1639 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1640 { 1641 switch (acb->adapter_type) { 1642 case ACB_ADAPTER_TYPE_A: { 1643 struct MessageUnit_A __iomem *reg = acb->pmuA; 1644 /* 1645 ** push inbound doorbell tell iop, driver data write ok 1646 ** and wait reply on next hwinterrupt for next Qbuffer post 1647 */ 1648 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1649 } 1650 break; 1651 1652 case ACB_ADAPTER_TYPE_B: { 1653 struct MessageUnit_B *reg = acb->pmuB; 1654 /* 1655 ** push inbound doorbell tell iop, driver data write ok 1656 ** and wait reply on next hwinterrupt for next Qbuffer post 1657 */ 1658 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1659 } 1660 break; 1661 case ACB_ADAPTER_TYPE_C: { 1662 struct MessageUnit_C __iomem *reg = acb->pmuC; 1663 /* 1664 ** push inbound doorbell tell iop, driver data write ok 1665 ** and wait reply on next hwinterrupt for next Qbuffer post 1666 */ 1667 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1668 } 1669 break; 1670 case ACB_ADAPTER_TYPE_D: { 1671 struct MessageUnit_D *reg = acb->pmuD; 1672 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY, 1673 reg->inbound_doorbell); 1674 } 1675 break; 1676 } 1677 } 1678 1679 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1680 { 1681 struct QBUFFER __iomem *qbuffer = NULL; 1682 switch (acb->adapter_type) { 1683 1684 case ACB_ADAPTER_TYPE_A: { 1685 struct MessageUnit_A __iomem *reg = acb->pmuA; 1686 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1687 } 1688 break; 1689 1690 case ACB_ADAPTER_TYPE_B: { 1691 struct MessageUnit_B *reg = acb->pmuB; 1692 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1693 } 1694 break; 1695 case ACB_ADAPTER_TYPE_C: { 1696 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1697 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1698 } 1699 break; 1700 case ACB_ADAPTER_TYPE_D: { 1701 struct MessageUnit_D *reg = acb->pmuD; 1702 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1703 } 1704 break; 1705 } 1706 return qbuffer; 1707 } 1708 1709 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1710 { 1711 struct QBUFFER __iomem *pqbuffer = NULL; 1712 switch (acb->adapter_type) { 1713 1714 case ACB_ADAPTER_TYPE_A: { 1715 struct MessageUnit_A __iomem *reg = acb->pmuA; 1716 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1717 } 1718 break; 1719 1720 case ACB_ADAPTER_TYPE_B: { 1721 struct MessageUnit_B *reg = acb->pmuB; 1722 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1723 } 1724 break; 1725 case ACB_ADAPTER_TYPE_C: { 1726 struct MessageUnit_C __iomem *reg = acb->pmuC; 1727 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1728 } 1729 break; 1730 case ACB_ADAPTER_TYPE_D: { 1731 struct MessageUnit_D *reg = acb->pmuD; 1732 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1733 } 1734 break; 1735 } 1736 return pqbuffer; 1737 } 1738 1739 static uint32_t 1740 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb, 1741 struct QBUFFER __iomem *prbuffer) 1742 { 1743 uint8_t *pQbuffer; 1744 uint8_t *buf1 = NULL; 1745 uint32_t __iomem *iop_data; 1746 uint32_t iop_len, data_len, *buf2 = NULL; 1747 1748 iop_data = (uint32_t __iomem *)prbuffer->data; 1749 iop_len = readl(&prbuffer->data_len); 1750 if (iop_len > 0) { 1751 buf1 = kmalloc(128, GFP_ATOMIC); 1752 buf2 = (uint32_t *)buf1; 1753 if (buf1 == NULL) 1754 return 0; 1755 data_len = iop_len; 1756 while (data_len >= 4) { 1757 *buf2++ = readl(iop_data); 1758 iop_data++; 1759 data_len -= 4; 1760 } 1761 if (data_len) 1762 *buf2 = readl(iop_data); 1763 buf2 = (uint32_t *)buf1; 1764 } 1765 while (iop_len > 0) { 1766 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1767 *pQbuffer = *buf1; 1768 acb->rqbuf_putIndex++; 1769 /* if last, index number set it to 0 */ 1770 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1771 buf1++; 1772 iop_len--; 1773 } 1774 kfree(buf2); 1775 /* let IOP know data has been read */ 1776 arcmsr_iop_message_read(acb); 1777 return 1; 1778 } 1779 1780 uint32_t 1781 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1782 struct QBUFFER __iomem *prbuffer) { 1783 1784 uint8_t *pQbuffer; 1785 uint8_t __iomem *iop_data; 1786 uint32_t iop_len; 1787 1788 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) 1789 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer); 1790 iop_data = (uint8_t __iomem *)prbuffer->data; 1791 iop_len = readl(&prbuffer->data_len); 1792 while (iop_len > 0) { 1793 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1794 *pQbuffer = readb(iop_data); 1795 acb->rqbuf_putIndex++; 1796 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1797 iop_data++; 1798 iop_len--; 1799 } 1800 arcmsr_iop_message_read(acb); 1801 return 1; 1802 } 1803 1804 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1805 { 1806 unsigned long flags; 1807 struct QBUFFER __iomem *prbuffer; 1808 int32_t buf_empty_len; 1809 1810 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 1811 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1812 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) & 1813 (ARCMSR_MAX_QBUFFER - 1); 1814 if (buf_empty_len >= readl(&prbuffer->data_len)) { 1815 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 1816 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1817 } else 1818 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1819 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 1820 } 1821 1822 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb) 1823 { 1824 uint8_t *pQbuffer; 1825 struct QBUFFER __iomem *pwbuffer; 1826 uint8_t *buf1 = NULL; 1827 uint32_t __iomem *iop_data; 1828 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data; 1829 1830 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1831 buf1 = kmalloc(128, GFP_ATOMIC); 1832 buf2 = (uint32_t *)buf1; 1833 if (buf1 == NULL) 1834 return; 1835 1836 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1837 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1838 iop_data = (uint32_t __iomem *)pwbuffer->data; 1839 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1840 && (allxfer_len < 124)) { 1841 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1842 *buf1 = *pQbuffer; 1843 acb->wqbuf_getIndex++; 1844 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1845 buf1++; 1846 allxfer_len++; 1847 } 1848 data_len = allxfer_len; 1849 buf1 = (uint8_t *)buf2; 1850 while (data_len >= 4) { 1851 data = *buf2++; 1852 writel(data, iop_data); 1853 iop_data++; 1854 data_len -= 4; 1855 } 1856 if (data_len) { 1857 data = *buf2; 1858 writel(data, iop_data); 1859 } 1860 writel(allxfer_len, &pwbuffer->data_len); 1861 kfree(buf1); 1862 arcmsr_iop_message_wrote(acb); 1863 } 1864 } 1865 1866 void 1867 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb) 1868 { 1869 uint8_t *pQbuffer; 1870 struct QBUFFER __iomem *pwbuffer; 1871 uint8_t __iomem *iop_data; 1872 int32_t allxfer_len = 0; 1873 1874 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { 1875 arcmsr_write_ioctldata2iop_in_DWORD(acb); 1876 return; 1877 } 1878 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1879 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1880 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1881 iop_data = (uint8_t __iomem *)pwbuffer->data; 1882 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1883 && (allxfer_len < 124)) { 1884 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1885 writeb(*pQbuffer, iop_data); 1886 acb->wqbuf_getIndex++; 1887 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1888 iop_data++; 1889 allxfer_len++; 1890 } 1891 writel(allxfer_len, &pwbuffer->data_len); 1892 arcmsr_iop_message_wrote(acb); 1893 } 1894 } 1895 1896 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1897 { 1898 unsigned long flags; 1899 1900 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 1901 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1902 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1903 arcmsr_write_ioctldata2iop(acb); 1904 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex) 1905 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1906 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 1907 } 1908 1909 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb) 1910 { 1911 uint32_t outbound_doorbell; 1912 struct MessageUnit_A __iomem *reg = acb->pmuA; 1913 outbound_doorbell = readl(®->outbound_doorbell); 1914 do { 1915 writel(outbound_doorbell, ®->outbound_doorbell); 1916 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1917 arcmsr_iop2drv_data_wrote_handle(acb); 1918 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1919 arcmsr_iop2drv_data_read_handle(acb); 1920 outbound_doorbell = readl(®->outbound_doorbell); 1921 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 1922 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)); 1923 } 1924 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB) 1925 { 1926 uint32_t outbound_doorbell; 1927 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1928 /* 1929 ******************************************************************* 1930 ** Maybe here we need to check wrqbuffer_lock is lock or not 1931 ** DOORBELL: din! don! 1932 ** check if there are any mail need to pack from firmware 1933 ******************************************************************* 1934 */ 1935 outbound_doorbell = readl(®->outbound_doorbell); 1936 do { 1937 writel(outbound_doorbell, ®->outbound_doorbell_clear); 1938 readl(®->outbound_doorbell_clear); 1939 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) 1940 arcmsr_iop2drv_data_wrote_handle(pACB); 1941 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) 1942 arcmsr_iop2drv_data_read_handle(pACB); 1943 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) 1944 arcmsr_hbaC_message_isr(pACB); 1945 outbound_doorbell = readl(®->outbound_doorbell); 1946 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 1947 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 1948 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)); 1949 } 1950 1951 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB) 1952 { 1953 uint32_t outbound_doorbell; 1954 struct MessageUnit_D *pmu = pACB->pmuD; 1955 1956 outbound_doorbell = readl(pmu->outbound_doorbell); 1957 do { 1958 writel(outbound_doorbell, pmu->outbound_doorbell); 1959 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) 1960 arcmsr_hbaD_message_isr(pACB); 1961 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) 1962 arcmsr_iop2drv_data_wrote_handle(pACB); 1963 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK) 1964 arcmsr_iop2drv_data_read_handle(pACB); 1965 outbound_doorbell = readl(pmu->outbound_doorbell); 1966 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK 1967 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK 1968 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)); 1969 } 1970 1971 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb) 1972 { 1973 uint32_t flag_ccb; 1974 struct MessageUnit_A __iomem *reg = acb->pmuA; 1975 struct ARCMSR_CDB *pARCMSR_CDB; 1976 struct CommandControlBlock *pCCB; 1977 bool error; 1978 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1979 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1980 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1981 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1982 arcmsr_drain_donequeue(acb, pCCB, error); 1983 } 1984 } 1985 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb) 1986 { 1987 uint32_t index; 1988 uint32_t flag_ccb; 1989 struct MessageUnit_B *reg = acb->pmuB; 1990 struct ARCMSR_CDB *pARCMSR_CDB; 1991 struct CommandControlBlock *pCCB; 1992 bool error; 1993 index = reg->doneq_index; 1994 while ((flag_ccb = reg->done_qbuffer[index]) != 0) { 1995 reg->done_qbuffer[index] = 0; 1996 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1997 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1998 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1999 arcmsr_drain_donequeue(acb, pCCB, error); 2000 index++; 2001 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2002 reg->doneq_index = index; 2003 } 2004 } 2005 2006 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb) 2007 { 2008 struct MessageUnit_C __iomem *phbcmu; 2009 struct ARCMSR_CDB *arcmsr_cdb; 2010 struct CommandControlBlock *ccb; 2011 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 2012 int error; 2013 2014 phbcmu = acb->pmuC; 2015 /* areca cdb command done */ 2016 /* Use correct offset and size for syncing */ 2017 2018 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) != 2019 0xFFFFFFFF) { 2020 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2021 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2022 + ccb_cdb_phy); 2023 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, 2024 arcmsr_cdb); 2025 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2026 ? true : false; 2027 /* check if command done with no error */ 2028 arcmsr_drain_donequeue(acb, ccb, error); 2029 throttling++; 2030 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 2031 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, 2032 &phbcmu->inbound_doorbell); 2033 throttling = 0; 2034 } 2035 } 2036 } 2037 2038 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb) 2039 { 2040 u32 outbound_write_pointer, doneq_index, index_stripped, toggle; 2041 uint32_t addressLow, ccb_cdb_phy; 2042 int error; 2043 struct MessageUnit_D *pmu; 2044 struct ARCMSR_CDB *arcmsr_cdb; 2045 struct CommandControlBlock *ccb; 2046 unsigned long flags; 2047 2048 spin_lock_irqsave(&acb->doneq_lock, flags); 2049 pmu = acb->pmuD; 2050 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 2051 doneq_index = pmu->doneq_index; 2052 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) { 2053 do { 2054 toggle = doneq_index & 0x4000; 2055 index_stripped = (doneq_index & 0xFFF) + 1; 2056 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 2057 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 2058 ((toggle ^ 0x4000) + 1); 2059 doneq_index = pmu->doneq_index; 2060 addressLow = pmu->done_qbuffer[doneq_index & 2061 0xFFF].addressLow; 2062 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 2063 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2064 + ccb_cdb_phy); 2065 ccb = container_of(arcmsr_cdb, 2066 struct CommandControlBlock, arcmsr_cdb); 2067 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2068 ? true : false; 2069 arcmsr_drain_donequeue(acb, ccb, error); 2070 writel(doneq_index, pmu->outboundlist_read_pointer); 2071 } while ((doneq_index & 0xFFF) != 2072 (outbound_write_pointer & 0xFFF)); 2073 } 2074 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR, 2075 pmu->outboundlist_interrupt_cause); 2076 readl(pmu->outboundlist_interrupt_cause); 2077 spin_unlock_irqrestore(&acb->doneq_lock, flags); 2078 } 2079 2080 /* 2081 ********************************************************************************** 2082 ** Handle a message interrupt 2083 ** 2084 ** The only message interrupt we expect is in response to a query for the current adapter config. 2085 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2086 ********************************************************************************** 2087 */ 2088 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb) 2089 { 2090 struct MessageUnit_A __iomem *reg = acb->pmuA; 2091 /*clear interrupt and message state*/ 2092 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 2093 schedule_work(&acb->arcmsr_do_message_isr_bh); 2094 } 2095 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb) 2096 { 2097 struct MessageUnit_B *reg = acb->pmuB; 2098 2099 /*clear interrupt and message state*/ 2100 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2101 schedule_work(&acb->arcmsr_do_message_isr_bh); 2102 } 2103 /* 2104 ********************************************************************************** 2105 ** Handle a message interrupt 2106 ** 2107 ** The only message interrupt we expect is in response to a query for the 2108 ** current adapter config. 2109 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2110 ********************************************************************************** 2111 */ 2112 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb) 2113 { 2114 struct MessageUnit_C __iomem *reg = acb->pmuC; 2115 /*clear interrupt and message state*/ 2116 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 2117 schedule_work(&acb->arcmsr_do_message_isr_bh); 2118 } 2119 2120 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb) 2121 { 2122 struct MessageUnit_D *reg = acb->pmuD; 2123 2124 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell); 2125 readl(reg->outbound_doorbell); 2126 schedule_work(&acb->arcmsr_do_message_isr_bh); 2127 } 2128 2129 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb) 2130 { 2131 uint32_t outbound_intstatus; 2132 struct MessageUnit_A __iomem *reg = acb->pmuA; 2133 outbound_intstatus = readl(®->outbound_intstatus) & 2134 acb->outbound_int_enable; 2135 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) 2136 return IRQ_NONE; 2137 do { 2138 writel(outbound_intstatus, ®->outbound_intstatus); 2139 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 2140 arcmsr_hbaA_doorbell_isr(acb); 2141 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 2142 arcmsr_hbaA_postqueue_isr(acb); 2143 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 2144 arcmsr_hbaA_message_isr(acb); 2145 outbound_intstatus = readl(®->outbound_intstatus) & 2146 acb->outbound_int_enable; 2147 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT 2148 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 2149 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT)); 2150 return IRQ_HANDLED; 2151 } 2152 2153 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb) 2154 { 2155 uint32_t outbound_doorbell; 2156 struct MessageUnit_B *reg = acb->pmuB; 2157 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2158 acb->outbound_int_enable; 2159 if (!outbound_doorbell) 2160 return IRQ_NONE; 2161 do { 2162 writel(~outbound_doorbell, reg->iop2drv_doorbell); 2163 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2164 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) 2165 arcmsr_iop2drv_data_wrote_handle(acb); 2166 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) 2167 arcmsr_iop2drv_data_read_handle(acb); 2168 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) 2169 arcmsr_hbaB_postqueue_isr(acb); 2170 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) 2171 arcmsr_hbaB_message_isr(acb); 2172 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2173 acb->outbound_int_enable; 2174 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK 2175 | ARCMSR_IOP2DRV_DATA_READ_OK 2176 | ARCMSR_IOP2DRV_CDB_DONE 2177 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)); 2178 return IRQ_HANDLED; 2179 } 2180 2181 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB) 2182 { 2183 uint32_t host_interrupt_status; 2184 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 2185 /* 2186 ********************************************* 2187 ** check outbound intstatus 2188 ********************************************* 2189 */ 2190 host_interrupt_status = readl(&phbcmu->host_int_status) & 2191 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2192 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR); 2193 if (!host_interrupt_status) 2194 return IRQ_NONE; 2195 do { 2196 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) 2197 arcmsr_hbaC_doorbell_isr(pACB); 2198 /* MU post queue interrupts*/ 2199 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) 2200 arcmsr_hbaC_postqueue_isr(pACB); 2201 host_interrupt_status = readl(&phbcmu->host_int_status); 2202 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2203 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)); 2204 return IRQ_HANDLED; 2205 } 2206 2207 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB) 2208 { 2209 u32 host_interrupt_status; 2210 struct MessageUnit_D *pmu = pACB->pmuD; 2211 2212 host_interrupt_status = readl(pmu->host_int_status) & 2213 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2214 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR); 2215 if (!host_interrupt_status) 2216 return IRQ_NONE; 2217 do { 2218 /* MU post queue interrupts*/ 2219 if (host_interrupt_status & 2220 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR) 2221 arcmsr_hbaD_postqueue_isr(pACB); 2222 if (host_interrupt_status & 2223 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR) 2224 arcmsr_hbaD_doorbell_isr(pACB); 2225 host_interrupt_status = readl(pmu->host_int_status); 2226 } while (host_interrupt_status & 2227 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2228 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)); 2229 return IRQ_HANDLED; 2230 } 2231 2232 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 2233 { 2234 switch (acb->adapter_type) { 2235 case ACB_ADAPTER_TYPE_A: 2236 return arcmsr_hbaA_handle_isr(acb); 2237 break; 2238 case ACB_ADAPTER_TYPE_B: 2239 return arcmsr_hbaB_handle_isr(acb); 2240 break; 2241 case ACB_ADAPTER_TYPE_C: 2242 return arcmsr_hbaC_handle_isr(acb); 2243 case ACB_ADAPTER_TYPE_D: 2244 return arcmsr_hbaD_handle_isr(acb); 2245 default: 2246 return IRQ_NONE; 2247 } 2248 } 2249 2250 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 2251 { 2252 if (acb) { 2253 /* stop adapter background rebuild */ 2254 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 2255 uint32_t intmask_org; 2256 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 2257 intmask_org = arcmsr_disable_outbound_ints(acb); 2258 arcmsr_stop_adapter_bgrb(acb); 2259 arcmsr_flush_adapter_cache(acb); 2260 arcmsr_enable_outbound_ints(acb, intmask_org); 2261 } 2262 } 2263 } 2264 2265 2266 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb) 2267 { 2268 uint32_t i; 2269 2270 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2271 for (i = 0; i < 15; i++) { 2272 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2273 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2274 acb->rqbuf_getIndex = 0; 2275 acb->rqbuf_putIndex = 0; 2276 arcmsr_iop_message_read(acb); 2277 mdelay(30); 2278 } else if (acb->rqbuf_getIndex != 2279 acb->rqbuf_putIndex) { 2280 acb->rqbuf_getIndex = 0; 2281 acb->rqbuf_putIndex = 0; 2282 mdelay(30); 2283 } else 2284 break; 2285 } 2286 } 2287 } 2288 2289 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 2290 struct scsi_cmnd *cmd) 2291 { 2292 char *buffer; 2293 unsigned short use_sg; 2294 int retvalue = 0, transfer_len = 0; 2295 unsigned long flags; 2296 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 2297 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 | 2298 (uint32_t)cmd->cmnd[6] << 16 | 2299 (uint32_t)cmd->cmnd[7] << 8 | 2300 (uint32_t)cmd->cmnd[8]; 2301 struct scatterlist *sg; 2302 2303 use_sg = scsi_sg_count(cmd); 2304 sg = scsi_sglist(cmd); 2305 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2306 if (use_sg > 1) { 2307 retvalue = ARCMSR_MESSAGE_FAIL; 2308 goto message_out; 2309 } 2310 transfer_len += sg->length; 2311 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 2312 retvalue = ARCMSR_MESSAGE_FAIL; 2313 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__); 2314 goto message_out; 2315 } 2316 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer; 2317 switch (controlcode) { 2318 case ARCMSR_MESSAGE_READ_RQBUFFER: { 2319 unsigned char *ver_addr; 2320 uint8_t *ptmpQbuffer; 2321 uint32_t allxfer_len = 0; 2322 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2323 if (!ver_addr) { 2324 retvalue = ARCMSR_MESSAGE_FAIL; 2325 pr_info("%s: memory not enough!\n", __func__); 2326 goto message_out; 2327 } 2328 ptmpQbuffer = ver_addr; 2329 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2330 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) { 2331 unsigned int tail = acb->rqbuf_getIndex; 2332 unsigned int head = acb->rqbuf_putIndex; 2333 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER); 2334 2335 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER); 2336 if (allxfer_len > ARCMSR_API_DATA_BUFLEN) 2337 allxfer_len = ARCMSR_API_DATA_BUFLEN; 2338 2339 if (allxfer_len <= cnt_to_end) 2340 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len); 2341 else { 2342 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end); 2343 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end); 2344 } 2345 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER; 2346 } 2347 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, 2348 allxfer_len); 2349 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2350 struct QBUFFER __iomem *prbuffer; 2351 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2352 prbuffer = arcmsr_get_iop_rqbuffer(acb); 2353 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 2354 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 2355 } 2356 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2357 kfree(ver_addr); 2358 pcmdmessagefld->cmdmessage.Length = allxfer_len; 2359 if (acb->fw_flag == FW_DEADLOCK) 2360 pcmdmessagefld->cmdmessage.ReturnCode = 2361 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2362 else 2363 pcmdmessagefld->cmdmessage.ReturnCode = 2364 ARCMSR_MESSAGE_RETURNCODE_OK; 2365 break; 2366 } 2367 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 2368 unsigned char *ver_addr; 2369 uint32_t user_len; 2370 int32_t cnt2end; 2371 uint8_t *pQbuffer, *ptmpuserbuffer; 2372 2373 user_len = pcmdmessagefld->cmdmessage.Length; 2374 if (user_len > ARCMSR_API_DATA_BUFLEN) { 2375 retvalue = ARCMSR_MESSAGE_FAIL; 2376 goto message_out; 2377 } 2378 2379 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2380 if (!ver_addr) { 2381 retvalue = ARCMSR_MESSAGE_FAIL; 2382 goto message_out; 2383 } 2384 ptmpuserbuffer = ver_addr; 2385 2386 memcpy(ptmpuserbuffer, 2387 pcmdmessagefld->messagedatabuffer, user_len); 2388 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2389 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) { 2390 struct SENSE_DATA *sensebuffer = 2391 (struct SENSE_DATA *)cmd->sense_buffer; 2392 arcmsr_write_ioctldata2iop(acb); 2393 /* has error report sensedata */ 2394 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 2395 sensebuffer->SenseKey = ILLEGAL_REQUEST; 2396 sensebuffer->AdditionalSenseLength = 0x0A; 2397 sensebuffer->AdditionalSenseCode = 0x20; 2398 sensebuffer->Valid = 1; 2399 retvalue = ARCMSR_MESSAGE_FAIL; 2400 } else { 2401 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex]; 2402 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex; 2403 if (user_len > cnt2end) { 2404 memcpy(pQbuffer, ptmpuserbuffer, cnt2end); 2405 ptmpuserbuffer += cnt2end; 2406 user_len -= cnt2end; 2407 acb->wqbuf_putIndex = 0; 2408 pQbuffer = acb->wqbuffer; 2409 } 2410 memcpy(pQbuffer, ptmpuserbuffer, user_len); 2411 acb->wqbuf_putIndex += user_len; 2412 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 2413 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 2414 acb->acb_flags &= 2415 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 2416 arcmsr_write_ioctldata2iop(acb); 2417 } 2418 } 2419 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2420 kfree(ver_addr); 2421 if (acb->fw_flag == FW_DEADLOCK) 2422 pcmdmessagefld->cmdmessage.ReturnCode = 2423 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2424 else 2425 pcmdmessagefld->cmdmessage.ReturnCode = 2426 ARCMSR_MESSAGE_RETURNCODE_OK; 2427 break; 2428 } 2429 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 2430 uint8_t *pQbuffer = acb->rqbuffer; 2431 2432 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2433 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2434 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2435 acb->rqbuf_getIndex = 0; 2436 acb->rqbuf_putIndex = 0; 2437 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2438 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2439 if (acb->fw_flag == FW_DEADLOCK) 2440 pcmdmessagefld->cmdmessage.ReturnCode = 2441 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2442 else 2443 pcmdmessagefld->cmdmessage.ReturnCode = 2444 ARCMSR_MESSAGE_RETURNCODE_OK; 2445 break; 2446 } 2447 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 2448 uint8_t *pQbuffer = acb->wqbuffer; 2449 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2450 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2451 ACB_F_MESSAGE_WQBUFFER_READED); 2452 acb->wqbuf_getIndex = 0; 2453 acb->wqbuf_putIndex = 0; 2454 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2455 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2456 if (acb->fw_flag == FW_DEADLOCK) 2457 pcmdmessagefld->cmdmessage.ReturnCode = 2458 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2459 else 2460 pcmdmessagefld->cmdmessage.ReturnCode = 2461 ARCMSR_MESSAGE_RETURNCODE_OK; 2462 break; 2463 } 2464 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 2465 uint8_t *pQbuffer; 2466 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2467 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2468 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2469 acb->rqbuf_getIndex = 0; 2470 acb->rqbuf_putIndex = 0; 2471 pQbuffer = acb->rqbuffer; 2472 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2473 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2474 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2475 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2476 ACB_F_MESSAGE_WQBUFFER_READED); 2477 acb->wqbuf_getIndex = 0; 2478 acb->wqbuf_putIndex = 0; 2479 pQbuffer = acb->wqbuffer; 2480 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2481 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2482 if (acb->fw_flag == FW_DEADLOCK) 2483 pcmdmessagefld->cmdmessage.ReturnCode = 2484 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2485 else 2486 pcmdmessagefld->cmdmessage.ReturnCode = 2487 ARCMSR_MESSAGE_RETURNCODE_OK; 2488 break; 2489 } 2490 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 2491 if (acb->fw_flag == FW_DEADLOCK) 2492 pcmdmessagefld->cmdmessage.ReturnCode = 2493 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2494 else 2495 pcmdmessagefld->cmdmessage.ReturnCode = 2496 ARCMSR_MESSAGE_RETURNCODE_3F; 2497 break; 2498 } 2499 case ARCMSR_MESSAGE_SAY_HELLO: { 2500 int8_t *hello_string = "Hello! I am ARCMSR"; 2501 if (acb->fw_flag == FW_DEADLOCK) 2502 pcmdmessagefld->cmdmessage.ReturnCode = 2503 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2504 else 2505 pcmdmessagefld->cmdmessage.ReturnCode = 2506 ARCMSR_MESSAGE_RETURNCODE_OK; 2507 memcpy(pcmdmessagefld->messagedatabuffer, 2508 hello_string, (int16_t)strlen(hello_string)); 2509 break; 2510 } 2511 case ARCMSR_MESSAGE_SAY_GOODBYE: { 2512 if (acb->fw_flag == FW_DEADLOCK) 2513 pcmdmessagefld->cmdmessage.ReturnCode = 2514 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2515 else 2516 pcmdmessagefld->cmdmessage.ReturnCode = 2517 ARCMSR_MESSAGE_RETURNCODE_OK; 2518 arcmsr_iop_parking(acb); 2519 break; 2520 } 2521 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 2522 if (acb->fw_flag == FW_DEADLOCK) 2523 pcmdmessagefld->cmdmessage.ReturnCode = 2524 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2525 else 2526 pcmdmessagefld->cmdmessage.ReturnCode = 2527 ARCMSR_MESSAGE_RETURNCODE_OK; 2528 arcmsr_flush_adapter_cache(acb); 2529 break; 2530 } 2531 default: 2532 retvalue = ARCMSR_MESSAGE_FAIL; 2533 pr_info("%s: unknown controlcode!\n", __func__); 2534 } 2535 message_out: 2536 if (use_sg) { 2537 struct scatterlist *sg = scsi_sglist(cmd); 2538 kunmap_atomic(buffer - sg->offset); 2539 } 2540 return retvalue; 2541 } 2542 2543 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2544 { 2545 struct list_head *head = &acb->ccb_free_list; 2546 struct CommandControlBlock *ccb = NULL; 2547 unsigned long flags; 2548 spin_lock_irqsave(&acb->ccblist_lock, flags); 2549 if (!list_empty(head)) { 2550 ccb = list_entry(head->next, struct CommandControlBlock, list); 2551 list_del_init(&ccb->list); 2552 }else{ 2553 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2554 return NULL; 2555 } 2556 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2557 return ccb; 2558 } 2559 2560 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2561 struct scsi_cmnd *cmd) 2562 { 2563 switch (cmd->cmnd[0]) { 2564 case INQUIRY: { 2565 unsigned char inqdata[36]; 2566 char *buffer; 2567 struct scatterlist *sg; 2568 2569 if (cmd->device->lun) { 2570 cmd->result = (DID_TIME_OUT << 16); 2571 cmd->scsi_done(cmd); 2572 return; 2573 } 2574 inqdata[0] = TYPE_PROCESSOR; 2575 /* Periph Qualifier & Periph Dev Type */ 2576 inqdata[1] = 0; 2577 /* rem media bit & Dev Type Modifier */ 2578 inqdata[2] = 0; 2579 /* ISO, ECMA, & ANSI versions */ 2580 inqdata[4] = 31; 2581 /* length of additional data */ 2582 strncpy(&inqdata[8], "Areca ", 8); 2583 /* Vendor Identification */ 2584 strncpy(&inqdata[16], "RAID controller ", 16); 2585 /* Product Identification */ 2586 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2587 2588 sg = scsi_sglist(cmd); 2589 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2590 2591 memcpy(buffer, inqdata, sizeof(inqdata)); 2592 sg = scsi_sglist(cmd); 2593 kunmap_atomic(buffer - sg->offset); 2594 2595 cmd->scsi_done(cmd); 2596 } 2597 break; 2598 case WRITE_BUFFER: 2599 case READ_BUFFER: { 2600 if (arcmsr_iop_message_xfer(acb, cmd)) 2601 cmd->result = (DID_ERROR << 16); 2602 cmd->scsi_done(cmd); 2603 } 2604 break; 2605 default: 2606 cmd->scsi_done(cmd); 2607 } 2608 } 2609 2610 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2611 void (* done)(struct scsi_cmnd *)) 2612 { 2613 struct Scsi_Host *host = cmd->device->host; 2614 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2615 struct CommandControlBlock *ccb; 2616 int target = cmd->device->id; 2617 cmd->scsi_done = done; 2618 cmd->host_scribble = NULL; 2619 cmd->result = 0; 2620 if (target == 16) { 2621 /* virtual device for iop message transfer */ 2622 arcmsr_handle_virtual_command(acb, cmd); 2623 return 0; 2624 } 2625 ccb = arcmsr_get_freeccb(acb); 2626 if (!ccb) 2627 return SCSI_MLQUEUE_HOST_BUSY; 2628 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2629 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2630 cmd->scsi_done(cmd); 2631 return 0; 2632 } 2633 arcmsr_post_ccb(acb, ccb); 2634 return 0; 2635 } 2636 2637 static DEF_SCSI_QCMD(arcmsr_queue_command) 2638 2639 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb) 2640 { 2641 struct MessageUnit_A __iomem *reg = acb->pmuA; 2642 char *acb_firm_model = acb->firm_model; 2643 char *acb_firm_version = acb->firm_version; 2644 char *acb_device_map = acb->device_map; 2645 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2646 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2647 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2648 int count; 2649 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2650 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 2651 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2652 miscellaneous data' timeout \n", acb->host->host_no); 2653 return false; 2654 } 2655 count = 8; 2656 while (count){ 2657 *acb_firm_model = readb(iop_firm_model); 2658 acb_firm_model++; 2659 iop_firm_model++; 2660 count--; 2661 } 2662 2663 count = 16; 2664 while (count){ 2665 *acb_firm_version = readb(iop_firm_version); 2666 acb_firm_version++; 2667 iop_firm_version++; 2668 count--; 2669 } 2670 2671 count=16; 2672 while(count){ 2673 *acb_device_map = readb(iop_device_map); 2674 acb_device_map++; 2675 iop_device_map++; 2676 count--; 2677 } 2678 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2679 acb->host->host_no, 2680 acb->firm_model, 2681 acb->firm_version); 2682 acb->signature = readl(®->message_rwbuffer[0]); 2683 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2684 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2685 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2686 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2687 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2688 return true; 2689 } 2690 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb) 2691 { 2692 struct MessageUnit_B *reg = acb->pmuB; 2693 char *acb_firm_model = acb->firm_model; 2694 char *acb_firm_version = acb->firm_version; 2695 char *acb_device_map = acb->device_map; 2696 char __iomem *iop_firm_model; 2697 /*firm_model,15,60-67*/ 2698 char __iomem *iop_firm_version; 2699 /*firm_version,17,68-83*/ 2700 char __iomem *iop_device_map; 2701 /*firm_version,21,84-99*/ 2702 int count; 2703 2704 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2705 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2706 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2707 2708 arcmsr_wait_firmware_ready(acb); 2709 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 2710 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2711 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no); 2712 return false; 2713 } 2714 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2715 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2716 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2717 miscellaneous data' timeout \n", acb->host->host_no); 2718 return false; 2719 } 2720 count = 8; 2721 while (count){ 2722 *acb_firm_model = readb(iop_firm_model); 2723 acb_firm_model++; 2724 iop_firm_model++; 2725 count--; 2726 } 2727 count = 16; 2728 while (count){ 2729 *acb_firm_version = readb(iop_firm_version); 2730 acb_firm_version++; 2731 iop_firm_version++; 2732 count--; 2733 } 2734 2735 count = 16; 2736 while(count){ 2737 *acb_device_map = readb(iop_device_map); 2738 acb_device_map++; 2739 iop_device_map++; 2740 count--; 2741 } 2742 2743 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2744 acb->host->host_no, 2745 acb->firm_model, 2746 acb->firm_version); 2747 2748 acb->signature = readl(®->message_rwbuffer[0]); 2749 /*firm_signature,1,00-03*/ 2750 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2751 /*firm_request_len,1,04-07*/ 2752 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2753 /*firm_numbers_queue,2,08-11*/ 2754 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2755 /*firm_sdram_size,3,12-15*/ 2756 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2757 /*firm_ide_channels,4,16-19*/ 2758 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2759 /*firm_ide_channels,4,16-19*/ 2760 return true; 2761 } 2762 2763 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB) 2764 { 2765 uint32_t intmask_org, Index, firmware_state = 0; 2766 struct MessageUnit_C __iomem *reg = pACB->pmuC; 2767 char *acb_firm_model = pACB->firm_model; 2768 char *acb_firm_version = pACB->firm_version; 2769 char __iomem *iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2770 char __iomem *iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2771 int count; 2772 /* disable all outbound interrupt */ 2773 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2774 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2775 /* wait firmware ready */ 2776 do { 2777 firmware_state = readl(®->outbound_msgaddr1); 2778 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2779 /* post "get config" instruction */ 2780 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2781 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2782 /* wait message ready */ 2783 for (Index = 0; Index < 2000; Index++) { 2784 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2785 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2786 break; 2787 } 2788 udelay(10); 2789 } /*max 1 seconds*/ 2790 if (Index >= 2000) { 2791 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2792 miscellaneous data' timeout \n", pACB->host->host_no); 2793 return false; 2794 } 2795 count = 8; 2796 while (count) { 2797 *acb_firm_model = readb(iop_firm_model); 2798 acb_firm_model++; 2799 iop_firm_model++; 2800 count--; 2801 } 2802 count = 16; 2803 while (count) { 2804 *acb_firm_version = readb(iop_firm_version); 2805 acb_firm_version++; 2806 iop_firm_version++; 2807 count--; 2808 } 2809 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2810 pACB->host->host_no, 2811 pACB->firm_model, 2812 pACB->firm_version); 2813 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2814 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2815 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2816 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2817 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2818 /*all interrupt service will be enable at arcmsr_iop_init*/ 2819 return true; 2820 } 2821 2822 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb) 2823 { 2824 char *acb_firm_model = acb->firm_model; 2825 char *acb_firm_version = acb->firm_version; 2826 char *acb_device_map = acb->device_map; 2827 char __iomem *iop_firm_model; 2828 char __iomem *iop_firm_version; 2829 char __iomem *iop_device_map; 2830 u32 count; 2831 struct MessageUnit_D *reg = acb->pmuD; 2832 2833 iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); 2834 iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); 2835 iop_device_map = (char __iomem *)(®->msgcode_rwbuffer[21]); 2836 if (readl(acb->pmuD->outbound_doorbell) & 2837 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 2838 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 2839 acb->pmuD->outbound_doorbell);/*clear interrupt*/ 2840 } 2841 /* post "get config" instruction */ 2842 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0); 2843 /* wait message ready */ 2844 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 2845 pr_notice("arcmsr%d: wait get adapter firmware " 2846 "miscellaneous data timeout\n", acb->host->host_no); 2847 return false; 2848 } 2849 count = 8; 2850 while (count) { 2851 *acb_firm_model = readb(iop_firm_model); 2852 acb_firm_model++; 2853 iop_firm_model++; 2854 count--; 2855 } 2856 count = 16; 2857 while (count) { 2858 *acb_firm_version = readb(iop_firm_version); 2859 acb_firm_version++; 2860 iop_firm_version++; 2861 count--; 2862 } 2863 count = 16; 2864 while (count) { 2865 *acb_device_map = readb(iop_device_map); 2866 acb_device_map++; 2867 iop_device_map++; 2868 count--; 2869 } 2870 acb->signature = readl(®->msgcode_rwbuffer[0]); 2871 /*firm_signature,1,00-03*/ 2872 acb->firm_request_len = readl(®->msgcode_rwbuffer[1]); 2873 /*firm_request_len,1,04-07*/ 2874 acb->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); 2875 /*firm_numbers_queue,2,08-11*/ 2876 acb->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); 2877 /*firm_sdram_size,3,12-15*/ 2878 acb->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); 2879 /*firm_hd_channels,4,16-19*/ 2880 acb->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); 2881 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2882 acb->host->host_no, 2883 acb->firm_model, 2884 acb->firm_version); 2885 return true; 2886 } 2887 2888 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2889 { 2890 bool rtn = false; 2891 2892 switch (acb->adapter_type) { 2893 case ACB_ADAPTER_TYPE_A: 2894 rtn = arcmsr_hbaA_get_config(acb); 2895 break; 2896 case ACB_ADAPTER_TYPE_B: 2897 rtn = arcmsr_hbaB_get_config(acb); 2898 break; 2899 case ACB_ADAPTER_TYPE_C: 2900 rtn = arcmsr_hbaC_get_config(acb); 2901 break; 2902 case ACB_ADAPTER_TYPE_D: 2903 rtn = arcmsr_hbaD_get_config(acb); 2904 break; 2905 default: 2906 break; 2907 } 2908 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD) 2909 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD; 2910 else 2911 acb->maxOutstanding = acb->firm_numbers_queue - 1; 2912 acb->host->can_queue = acb->maxOutstanding; 2913 return rtn; 2914 } 2915 2916 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb, 2917 struct CommandControlBlock *poll_ccb) 2918 { 2919 struct MessageUnit_A __iomem *reg = acb->pmuA; 2920 struct CommandControlBlock *ccb; 2921 struct ARCMSR_CDB *arcmsr_cdb; 2922 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2923 int rtn; 2924 bool error; 2925 polling_hba_ccb_retry: 2926 poll_count++; 2927 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2928 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2929 while (1) { 2930 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2931 if (poll_ccb_done){ 2932 rtn = SUCCESS; 2933 break; 2934 }else { 2935 msleep(25); 2936 if (poll_count > 100){ 2937 rtn = FAILED; 2938 break; 2939 } 2940 goto polling_hba_ccb_retry; 2941 } 2942 } 2943 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2944 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2945 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 2946 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2947 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2948 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2949 " poll command abort successfully \n" 2950 , acb->host->host_no 2951 , ccb->pcmd->device->id 2952 , (u32)ccb->pcmd->device->lun 2953 , ccb); 2954 ccb->pcmd->result = DID_ABORT << 16; 2955 arcmsr_ccb_complete(ccb); 2956 continue; 2957 } 2958 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2959 " command done ccb = '0x%p'" 2960 "ccboutstandingcount = %d \n" 2961 , acb->host->host_no 2962 , ccb 2963 , atomic_read(&acb->ccboutstandingcount)); 2964 continue; 2965 } 2966 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2967 arcmsr_report_ccb_state(acb, ccb, error); 2968 } 2969 return rtn; 2970 } 2971 2972 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb, 2973 struct CommandControlBlock *poll_ccb) 2974 { 2975 struct MessageUnit_B *reg = acb->pmuB; 2976 struct ARCMSR_CDB *arcmsr_cdb; 2977 struct CommandControlBlock *ccb; 2978 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2979 int index, rtn; 2980 bool error; 2981 polling_hbb_ccb_retry: 2982 2983 poll_count++; 2984 /* clear doorbell interrupt */ 2985 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2986 while(1){ 2987 index = reg->doneq_index; 2988 flag_ccb = reg->done_qbuffer[index]; 2989 if (flag_ccb == 0) { 2990 if (poll_ccb_done){ 2991 rtn = SUCCESS; 2992 break; 2993 }else { 2994 msleep(25); 2995 if (poll_count > 100){ 2996 rtn = FAILED; 2997 break; 2998 } 2999 goto polling_hbb_ccb_retry; 3000 } 3001 } 3002 reg->done_qbuffer[index] = 0; 3003 index++; 3004 /*if last index number set it to 0 */ 3005 index %= ARCMSR_MAX_HBB_POSTQUEUE; 3006 reg->doneq_index = index; 3007 /* check if command done with no error*/ 3008 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 3009 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3010 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 3011 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 3012 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 3013 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3014 " poll command abort successfully \n" 3015 ,acb->host->host_no 3016 ,ccb->pcmd->device->id 3017 ,(u32)ccb->pcmd->device->lun 3018 ,ccb); 3019 ccb->pcmd->result = DID_ABORT << 16; 3020 arcmsr_ccb_complete(ccb); 3021 continue; 3022 } 3023 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3024 " command done ccb = '0x%p'" 3025 "ccboutstandingcount = %d \n" 3026 , acb->host->host_no 3027 , ccb 3028 , atomic_read(&acb->ccboutstandingcount)); 3029 continue; 3030 } 3031 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 3032 arcmsr_report_ccb_state(acb, ccb, error); 3033 } 3034 return rtn; 3035 } 3036 3037 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb, 3038 struct CommandControlBlock *poll_ccb) 3039 { 3040 struct MessageUnit_C __iomem *reg = acb->pmuC; 3041 uint32_t flag_ccb, ccb_cdb_phy; 3042 struct ARCMSR_CDB *arcmsr_cdb; 3043 bool error; 3044 struct CommandControlBlock *pCCB; 3045 uint32_t poll_ccb_done = 0, poll_count = 0; 3046 int rtn; 3047 polling_hbc_ccb_retry: 3048 poll_count++; 3049 while (1) { 3050 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 3051 if (poll_ccb_done) { 3052 rtn = SUCCESS; 3053 break; 3054 } else { 3055 msleep(25); 3056 if (poll_count > 100) { 3057 rtn = FAILED; 3058 break; 3059 } 3060 goto polling_hbc_ccb_retry; 3061 } 3062 } 3063 flag_ccb = readl(®->outbound_queueport_low); 3064 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3065 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 3066 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3067 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3068 /* check ifcommand done with no error*/ 3069 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 3070 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3071 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3072 " poll command abort successfully \n" 3073 , acb->host->host_no 3074 , pCCB->pcmd->device->id 3075 , (u32)pCCB->pcmd->device->lun 3076 , pCCB); 3077 pCCB->pcmd->result = DID_ABORT << 16; 3078 arcmsr_ccb_complete(pCCB); 3079 continue; 3080 } 3081 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3082 " command done ccb = '0x%p'" 3083 "ccboutstandingcount = %d \n" 3084 , acb->host->host_no 3085 , pCCB 3086 , atomic_read(&acb->ccboutstandingcount)); 3087 continue; 3088 } 3089 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 3090 arcmsr_report_ccb_state(acb, pCCB, error); 3091 } 3092 return rtn; 3093 } 3094 3095 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb, 3096 struct CommandControlBlock *poll_ccb) 3097 { 3098 bool error; 3099 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy; 3100 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle; 3101 unsigned long flags; 3102 struct ARCMSR_CDB *arcmsr_cdb; 3103 struct CommandControlBlock *pCCB; 3104 struct MessageUnit_D *pmu = acb->pmuD; 3105 3106 polling_hbaD_ccb_retry: 3107 poll_count++; 3108 while (1) { 3109 spin_lock_irqsave(&acb->doneq_lock, flags); 3110 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 3111 doneq_index = pmu->doneq_index; 3112 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) { 3113 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3114 if (poll_ccb_done) { 3115 rtn = SUCCESS; 3116 break; 3117 } else { 3118 msleep(25); 3119 if (poll_count > 40) { 3120 rtn = FAILED; 3121 break; 3122 } 3123 goto polling_hbaD_ccb_retry; 3124 } 3125 } 3126 toggle = doneq_index & 0x4000; 3127 index_stripped = (doneq_index & 0xFFF) + 1; 3128 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 3129 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 3130 ((toggle ^ 0x4000) + 1); 3131 doneq_index = pmu->doneq_index; 3132 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3133 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow; 3134 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3135 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + 3136 ccb_cdb_phy); 3137 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, 3138 arcmsr_cdb); 3139 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3140 if ((pCCB->acb != acb) || 3141 (pCCB->startdone != ARCMSR_CCB_START)) { 3142 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3143 pr_notice("arcmsr%d: scsi id = %d " 3144 "lun = %d ccb = '0x%p' poll command " 3145 "abort successfully\n" 3146 , acb->host->host_no 3147 , pCCB->pcmd->device->id 3148 , (u32)pCCB->pcmd->device->lun 3149 , pCCB); 3150 pCCB->pcmd->result = DID_ABORT << 16; 3151 arcmsr_ccb_complete(pCCB); 3152 continue; 3153 } 3154 pr_notice("arcmsr%d: polling an illegal " 3155 "ccb command done ccb = '0x%p' " 3156 "ccboutstandingcount = %d\n" 3157 , acb->host->host_no 3158 , pCCB 3159 , atomic_read(&acb->ccboutstandingcount)); 3160 continue; 3161 } 3162 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 3163 ? true : false; 3164 arcmsr_report_ccb_state(acb, pCCB, error); 3165 } 3166 return rtn; 3167 } 3168 3169 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 3170 struct CommandControlBlock *poll_ccb) 3171 { 3172 int rtn = 0; 3173 switch (acb->adapter_type) { 3174 3175 case ACB_ADAPTER_TYPE_A: { 3176 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb); 3177 } 3178 break; 3179 3180 case ACB_ADAPTER_TYPE_B: { 3181 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb); 3182 } 3183 break; 3184 case ACB_ADAPTER_TYPE_C: { 3185 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb); 3186 } 3187 break; 3188 case ACB_ADAPTER_TYPE_D: 3189 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb); 3190 break; 3191 } 3192 return rtn; 3193 } 3194 3195 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 3196 { 3197 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 3198 dma_addr_t dma_coherent_handle; 3199 3200 /* 3201 ******************************************************************** 3202 ** here we need to tell iop 331 our freeccb.HighPart 3203 ** if freeccb.HighPart is not zero 3204 ******************************************************************** 3205 */ 3206 switch (acb->adapter_type) { 3207 case ACB_ADAPTER_TYPE_B: 3208 case ACB_ADAPTER_TYPE_D: 3209 dma_coherent_handle = acb->dma_coherent_handle2; 3210 break; 3211 default: 3212 dma_coherent_handle = acb->dma_coherent_handle; 3213 break; 3214 } 3215 cdb_phyaddr = lower_32_bits(dma_coherent_handle); 3216 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle); 3217 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 3218 /* 3219 *********************************************************************** 3220 ** if adapter type B, set window of "post command Q" 3221 *********************************************************************** 3222 */ 3223 switch (acb->adapter_type) { 3224 3225 case ACB_ADAPTER_TYPE_A: { 3226 if (cdb_phyaddr_hi32 != 0) { 3227 struct MessageUnit_A __iomem *reg = acb->pmuA; 3228 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 3229 ®->message_rwbuffer[0]); 3230 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 3231 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 3232 ®->inbound_msgaddr0); 3233 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3234 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 3235 part physical address timeout\n", 3236 acb->host->host_no); 3237 return 1; 3238 } 3239 } 3240 } 3241 break; 3242 3243 case ACB_ADAPTER_TYPE_B: { 3244 uint32_t __iomem *rwbuffer; 3245 3246 struct MessageUnit_B *reg = acb->pmuB; 3247 reg->postq_index = 0; 3248 reg->doneq_index = 0; 3249 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 3250 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3251 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \ 3252 acb->host->host_no); 3253 return 1; 3254 } 3255 rwbuffer = reg->message_rwbuffer; 3256 /* driver "set config" signature */ 3257 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3258 /* normal should be zero */ 3259 writel(cdb_phyaddr_hi32, rwbuffer++); 3260 /* postQ size (256 + 8)*4 */ 3261 writel(cdb_phyaddr, rwbuffer++); 3262 /* doneQ size (256 + 8)*4 */ 3263 writel(cdb_phyaddr + 1056, rwbuffer++); 3264 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 3265 writel(1056, rwbuffer); 3266 3267 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 3268 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3269 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3270 timeout \n",acb->host->host_no); 3271 return 1; 3272 } 3273 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 3274 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3275 pr_err("arcmsr%d: can't set driver mode.\n", 3276 acb->host->host_no); 3277 return 1; 3278 } 3279 } 3280 break; 3281 case ACB_ADAPTER_TYPE_C: { 3282 if (cdb_phyaddr_hi32 != 0) { 3283 struct MessageUnit_C __iomem *reg = acb->pmuC; 3284 3285 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 3286 acb->adapter_index, cdb_phyaddr_hi32); 3287 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 3288 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 3289 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 3290 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3291 if (!arcmsr_hbaC_wait_msgint_ready(acb)) { 3292 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3293 timeout \n", acb->host->host_no); 3294 return 1; 3295 } 3296 } 3297 } 3298 break; 3299 case ACB_ADAPTER_TYPE_D: { 3300 uint32_t __iomem *rwbuffer; 3301 struct MessageUnit_D *reg = acb->pmuD; 3302 reg->postq_index = 0; 3303 reg->doneq_index = 0; 3304 rwbuffer = reg->msgcode_rwbuffer; 3305 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3306 writel(cdb_phyaddr_hi32, rwbuffer++); 3307 writel(cdb_phyaddr, rwbuffer++); 3308 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE * 3309 sizeof(struct InBound_SRB)), rwbuffer++); 3310 writel(0x100, rwbuffer); 3311 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0); 3312 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 3313 pr_notice("arcmsr%d: 'set command Q window' timeout\n", 3314 acb->host->host_no); 3315 return 1; 3316 } 3317 } 3318 break; 3319 } 3320 return 0; 3321 } 3322 3323 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 3324 { 3325 uint32_t firmware_state = 0; 3326 switch (acb->adapter_type) { 3327 3328 case ACB_ADAPTER_TYPE_A: { 3329 struct MessageUnit_A __iomem *reg = acb->pmuA; 3330 do { 3331 firmware_state = readl(®->outbound_msgaddr1); 3332 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 3333 } 3334 break; 3335 3336 case ACB_ADAPTER_TYPE_B: { 3337 struct MessageUnit_B *reg = acb->pmuB; 3338 do { 3339 firmware_state = readl(reg->iop2drv_doorbell); 3340 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 3341 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 3342 } 3343 break; 3344 case ACB_ADAPTER_TYPE_C: { 3345 struct MessageUnit_C __iomem *reg = acb->pmuC; 3346 do { 3347 firmware_state = readl(®->outbound_msgaddr1); 3348 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 3349 } 3350 break; 3351 case ACB_ADAPTER_TYPE_D: { 3352 struct MessageUnit_D *reg = acb->pmuD; 3353 do { 3354 firmware_state = readl(reg->outbound_msgaddr1); 3355 } while ((firmware_state & 3356 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0); 3357 } 3358 break; 3359 } 3360 } 3361 3362 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb) 3363 { 3364 struct MessageUnit_A __iomem *reg = acb->pmuA; 3365 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3366 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3367 return; 3368 } else { 3369 acb->fw_flag = FW_NORMAL; 3370 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 3371 atomic_set(&acb->rq_map_token, 16); 3372 } 3373 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3374 if (atomic_dec_and_test(&acb->rq_map_token)) { 3375 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3376 return; 3377 } 3378 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3379 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3380 } 3381 return; 3382 } 3383 3384 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb) 3385 { 3386 struct MessageUnit_B *reg = acb->pmuB; 3387 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3388 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3389 return; 3390 } else { 3391 acb->fw_flag = FW_NORMAL; 3392 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3393 atomic_set(&acb->rq_map_token, 16); 3394 } 3395 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3396 if (atomic_dec_and_test(&acb->rq_map_token)) { 3397 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3398 return; 3399 } 3400 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 3401 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3402 } 3403 return; 3404 } 3405 3406 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb) 3407 { 3408 struct MessageUnit_C __iomem *reg = acb->pmuC; 3409 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3410 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3411 return; 3412 } else { 3413 acb->fw_flag = FW_NORMAL; 3414 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3415 atomic_set(&acb->rq_map_token, 16); 3416 } 3417 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3418 if (atomic_dec_and_test(&acb->rq_map_token)) { 3419 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3420 return; 3421 } 3422 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3423 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3424 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3425 } 3426 return; 3427 } 3428 3429 static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb) 3430 { 3431 struct MessageUnit_D *reg = acb->pmuD; 3432 3433 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || 3434 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || 3435 ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3436 mod_timer(&acb->eternal_timer, 3437 jiffies + msecs_to_jiffies(6 * HZ)); 3438 } else { 3439 acb->fw_flag = FW_NORMAL; 3440 if (atomic_read(&acb->ante_token_value) == 3441 atomic_read(&acb->rq_map_token)) { 3442 atomic_set(&acb->rq_map_token, 16); 3443 } 3444 atomic_set(&acb->ante_token_value, 3445 atomic_read(&acb->rq_map_token)); 3446 if (atomic_dec_and_test(&acb->rq_map_token)) { 3447 mod_timer(&acb->eternal_timer, jiffies + 3448 msecs_to_jiffies(6 * HZ)); 3449 return; 3450 } 3451 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, 3452 reg->inbound_msgaddr0); 3453 mod_timer(&acb->eternal_timer, jiffies + 3454 msecs_to_jiffies(6 * HZ)); 3455 } 3456 } 3457 3458 static void arcmsr_request_device_map(struct timer_list *t) 3459 { 3460 struct AdapterControlBlock *acb = from_timer(acb, t, eternal_timer); 3461 switch (acb->adapter_type) { 3462 case ACB_ADAPTER_TYPE_A: { 3463 arcmsr_hbaA_request_device_map(acb); 3464 } 3465 break; 3466 case ACB_ADAPTER_TYPE_B: { 3467 arcmsr_hbaB_request_device_map(acb); 3468 } 3469 break; 3470 case ACB_ADAPTER_TYPE_C: { 3471 arcmsr_hbaC_request_device_map(acb); 3472 } 3473 break; 3474 case ACB_ADAPTER_TYPE_D: 3475 arcmsr_hbaD_request_device_map(acb); 3476 break; 3477 } 3478 } 3479 3480 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb) 3481 { 3482 struct MessageUnit_A __iomem *reg = acb->pmuA; 3483 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3484 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 3485 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3486 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3487 rebulid' timeout \n", acb->host->host_no); 3488 } 3489 } 3490 3491 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb) 3492 { 3493 struct MessageUnit_B *reg = acb->pmuB; 3494 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3495 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 3496 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3497 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3498 rebulid' timeout \n",acb->host->host_no); 3499 } 3500 } 3501 3502 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB) 3503 { 3504 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 3505 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3506 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 3507 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 3508 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 3509 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3510 rebulid' timeout \n", pACB->host->host_no); 3511 } 3512 return; 3513 } 3514 3515 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB) 3516 { 3517 struct MessageUnit_D *pmu = pACB->pmuD; 3518 3519 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3520 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0); 3521 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 3522 pr_notice("arcmsr%d: wait 'start adapter " 3523 "background rebulid' timeout\n", pACB->host->host_no); 3524 } 3525 } 3526 3527 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3528 { 3529 switch (acb->adapter_type) { 3530 case ACB_ADAPTER_TYPE_A: 3531 arcmsr_hbaA_start_bgrb(acb); 3532 break; 3533 case ACB_ADAPTER_TYPE_B: 3534 arcmsr_hbaB_start_bgrb(acb); 3535 break; 3536 case ACB_ADAPTER_TYPE_C: 3537 arcmsr_hbaC_start_bgrb(acb); 3538 break; 3539 case ACB_ADAPTER_TYPE_D: 3540 arcmsr_hbaD_start_bgrb(acb); 3541 break; 3542 } 3543 } 3544 3545 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 3546 { 3547 switch (acb->adapter_type) { 3548 case ACB_ADAPTER_TYPE_A: { 3549 struct MessageUnit_A __iomem *reg = acb->pmuA; 3550 uint32_t outbound_doorbell; 3551 /* empty doorbell Qbuffer if door bell ringed */ 3552 outbound_doorbell = readl(®->outbound_doorbell); 3553 /*clear doorbell interrupt */ 3554 writel(outbound_doorbell, ®->outbound_doorbell); 3555 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3556 } 3557 break; 3558 3559 case ACB_ADAPTER_TYPE_B: { 3560 struct MessageUnit_B *reg = acb->pmuB; 3561 /*clear interrupt and message state*/ 3562 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3563 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 3564 /* let IOP know data has been read */ 3565 } 3566 break; 3567 case ACB_ADAPTER_TYPE_C: { 3568 struct MessageUnit_C __iomem *reg = acb->pmuC; 3569 uint32_t outbound_doorbell, i; 3570 /* empty doorbell Qbuffer if door bell ringed */ 3571 outbound_doorbell = readl(®->outbound_doorbell); 3572 writel(outbound_doorbell, ®->outbound_doorbell_clear); 3573 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3574 for (i = 0; i < 200; i++) { 3575 msleep(20); 3576 outbound_doorbell = readl(®->outbound_doorbell); 3577 if (outbound_doorbell & 3578 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 3579 writel(outbound_doorbell, 3580 ®->outbound_doorbell_clear); 3581 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, 3582 ®->inbound_doorbell); 3583 } else 3584 break; 3585 } 3586 } 3587 break; 3588 case ACB_ADAPTER_TYPE_D: { 3589 struct MessageUnit_D *reg = acb->pmuD; 3590 uint32_t outbound_doorbell, i; 3591 /* empty doorbell Qbuffer if door bell ringed */ 3592 outbound_doorbell = readl(reg->outbound_doorbell); 3593 writel(outbound_doorbell, reg->outbound_doorbell); 3594 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3595 reg->inbound_doorbell); 3596 for (i = 0; i < 200; i++) { 3597 msleep(20); 3598 outbound_doorbell = readl(reg->outbound_doorbell); 3599 if (outbound_doorbell & 3600 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) { 3601 writel(outbound_doorbell, 3602 reg->outbound_doorbell); 3603 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3604 reg->inbound_doorbell); 3605 } else 3606 break; 3607 } 3608 } 3609 break; 3610 } 3611 } 3612 3613 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 3614 { 3615 switch (acb->adapter_type) { 3616 case ACB_ADAPTER_TYPE_A: 3617 return; 3618 case ACB_ADAPTER_TYPE_B: 3619 { 3620 struct MessageUnit_B *reg = acb->pmuB; 3621 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 3622 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3623 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 3624 return; 3625 } 3626 } 3627 break; 3628 case ACB_ADAPTER_TYPE_C: 3629 return; 3630 } 3631 return; 3632 } 3633 3634 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 3635 { 3636 uint8_t value[64]; 3637 int i, count = 0; 3638 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 3639 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 3640 struct MessageUnit_D *pmuD = acb->pmuD; 3641 3642 /* backup pci config data */ 3643 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 3644 for (i = 0; i < 64; i++) { 3645 pci_read_config_byte(acb->pdev, i, &value[i]); 3646 } 3647 /* hardware reset signal */ 3648 if ((acb->dev_id == 0x1680)) { 3649 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 3650 } else if ((acb->dev_id == 0x1880)) { 3651 do { 3652 count++; 3653 writel(0xF, &pmuC->write_sequence); 3654 writel(0x4, &pmuC->write_sequence); 3655 writel(0xB, &pmuC->write_sequence); 3656 writel(0x2, &pmuC->write_sequence); 3657 writel(0x7, &pmuC->write_sequence); 3658 writel(0xD, &pmuC->write_sequence); 3659 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 3660 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 3661 } else if ((acb->dev_id == 0x1214)) { 3662 writel(0x20, pmuD->reset_request); 3663 } else { 3664 pci_write_config_byte(acb->pdev, 0x84, 0x20); 3665 } 3666 msleep(2000); 3667 /* write back pci config data */ 3668 for (i = 0; i < 64; i++) { 3669 pci_write_config_byte(acb->pdev, i, value[i]); 3670 } 3671 msleep(1000); 3672 return; 3673 } 3674 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 3675 { 3676 uint32_t intmask_org; 3677 /* disable all outbound interrupt */ 3678 intmask_org = arcmsr_disable_outbound_ints(acb); 3679 arcmsr_wait_firmware_ready(acb); 3680 arcmsr_iop_confirm(acb); 3681 /*start background rebuild*/ 3682 arcmsr_start_adapter_bgrb(acb); 3683 /* empty doorbell Qbuffer if door bell ringed */ 3684 arcmsr_clear_doorbell_queue_buffer(acb); 3685 arcmsr_enable_eoi_mode(acb); 3686 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3687 arcmsr_enable_outbound_ints(acb, intmask_org); 3688 acb->acb_flags |= ACB_F_IOP_INITED; 3689 } 3690 3691 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 3692 { 3693 struct CommandControlBlock *ccb; 3694 uint32_t intmask_org; 3695 uint8_t rtnval = 0x00; 3696 int i = 0; 3697 unsigned long flags; 3698 3699 if (atomic_read(&acb->ccboutstandingcount) != 0) { 3700 /* disable all outbound interrupt */ 3701 intmask_org = arcmsr_disable_outbound_ints(acb); 3702 /* talk to iop 331 outstanding command aborted */ 3703 rtnval = arcmsr_abort_allcmd(acb); 3704 /* clear all outbound posted Q */ 3705 arcmsr_done4abort_postqueue(acb); 3706 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3707 ccb = acb->pccb_pool[i]; 3708 if (ccb->startdone == ARCMSR_CCB_START) { 3709 scsi_dma_unmap(ccb->pcmd); 3710 ccb->startdone = ARCMSR_CCB_DONE; 3711 ccb->ccb_flags = 0; 3712 spin_lock_irqsave(&acb->ccblist_lock, flags); 3713 list_add_tail(&ccb->list, &acb->ccb_free_list); 3714 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 3715 } 3716 } 3717 atomic_set(&acb->ccboutstandingcount, 0); 3718 /* enable all outbound interrupt */ 3719 arcmsr_enable_outbound_ints(acb, intmask_org); 3720 return rtnval; 3721 } 3722 return rtnval; 3723 } 3724 3725 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 3726 { 3727 struct AdapterControlBlock *acb; 3728 uint32_t intmask_org, outbound_doorbell; 3729 int retry_count = 0; 3730 int rtn = FAILED; 3731 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 3732 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 3733 acb->num_resets++; 3734 3735 switch(acb->adapter_type){ 3736 case ACB_ADAPTER_TYPE_A:{ 3737 if (acb->acb_flags & ACB_F_BUS_RESET){ 3738 long timeout; 3739 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3740 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3741 if (timeout) { 3742 return SUCCESS; 3743 } 3744 } 3745 acb->acb_flags |= ACB_F_BUS_RESET; 3746 if (!arcmsr_iop_reset(acb)) { 3747 struct MessageUnit_A __iomem *reg; 3748 reg = acb->pmuA; 3749 arcmsr_hardware_reset(acb); 3750 acb->acb_flags &= ~ACB_F_IOP_INITED; 3751 sleep_again: 3752 ssleep(ARCMSR_SLEEPTIME); 3753 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 3754 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3755 if (retry_count > ARCMSR_RETRYCOUNT) { 3756 acb->fw_flag = FW_DEADLOCK; 3757 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3758 return FAILED; 3759 } 3760 retry_count++; 3761 goto sleep_again; 3762 } 3763 acb->acb_flags |= ACB_F_IOP_INITED; 3764 /* disable all outbound interrupt */ 3765 intmask_org = arcmsr_disable_outbound_ints(acb); 3766 arcmsr_get_firmware_spec(acb); 3767 arcmsr_start_adapter_bgrb(acb); 3768 /* clear Qbuffer if door bell ringed */ 3769 outbound_doorbell = readl(®->outbound_doorbell); 3770 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 3771 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3772 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3773 arcmsr_enable_outbound_ints(acb, intmask_org); 3774 atomic_set(&acb->rq_map_token, 16); 3775 atomic_set(&acb->ante_token_value, 16); 3776 acb->fw_flag = FW_NORMAL; 3777 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3778 acb->acb_flags &= ~ACB_F_BUS_RESET; 3779 rtn = SUCCESS; 3780 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3781 } else { 3782 acb->acb_flags &= ~ACB_F_BUS_RESET; 3783 atomic_set(&acb->rq_map_token, 16); 3784 atomic_set(&acb->ante_token_value, 16); 3785 acb->fw_flag = FW_NORMAL; 3786 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3787 rtn = SUCCESS; 3788 } 3789 break; 3790 } 3791 case ACB_ADAPTER_TYPE_B:{ 3792 acb->acb_flags |= ACB_F_BUS_RESET; 3793 if (!arcmsr_iop_reset(acb)) { 3794 acb->acb_flags &= ~ACB_F_BUS_RESET; 3795 rtn = FAILED; 3796 } else { 3797 acb->acb_flags &= ~ACB_F_BUS_RESET; 3798 atomic_set(&acb->rq_map_token, 16); 3799 atomic_set(&acb->ante_token_value, 16); 3800 acb->fw_flag = FW_NORMAL; 3801 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3802 rtn = SUCCESS; 3803 } 3804 break; 3805 } 3806 case ACB_ADAPTER_TYPE_C:{ 3807 if (acb->acb_flags & ACB_F_BUS_RESET) { 3808 long timeout; 3809 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3810 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3811 if (timeout) { 3812 return SUCCESS; 3813 } 3814 } 3815 acb->acb_flags |= ACB_F_BUS_RESET; 3816 if (!arcmsr_iop_reset(acb)) { 3817 struct MessageUnit_C __iomem *reg; 3818 reg = acb->pmuC; 3819 arcmsr_hardware_reset(acb); 3820 acb->acb_flags &= ~ACB_F_IOP_INITED; 3821 sleep: 3822 ssleep(ARCMSR_SLEEPTIME); 3823 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3824 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3825 if (retry_count > ARCMSR_RETRYCOUNT) { 3826 acb->fw_flag = FW_DEADLOCK; 3827 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3828 return FAILED; 3829 } 3830 retry_count++; 3831 goto sleep; 3832 } 3833 acb->acb_flags |= ACB_F_IOP_INITED; 3834 /* disable all outbound interrupt */ 3835 intmask_org = arcmsr_disable_outbound_ints(acb); 3836 arcmsr_get_firmware_spec(acb); 3837 arcmsr_start_adapter_bgrb(acb); 3838 /* clear Qbuffer if door bell ringed */ 3839 arcmsr_clear_doorbell_queue_buffer(acb); 3840 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3841 arcmsr_enable_outbound_ints(acb, intmask_org); 3842 atomic_set(&acb->rq_map_token, 16); 3843 atomic_set(&acb->ante_token_value, 16); 3844 acb->fw_flag = FW_NORMAL; 3845 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3846 acb->acb_flags &= ~ACB_F_BUS_RESET; 3847 rtn = SUCCESS; 3848 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3849 } else { 3850 acb->acb_flags &= ~ACB_F_BUS_RESET; 3851 atomic_set(&acb->rq_map_token, 16); 3852 atomic_set(&acb->ante_token_value, 16); 3853 acb->fw_flag = FW_NORMAL; 3854 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3855 rtn = SUCCESS; 3856 } 3857 break; 3858 } 3859 case ACB_ADAPTER_TYPE_D: { 3860 if (acb->acb_flags & ACB_F_BUS_RESET) { 3861 long timeout; 3862 pr_notice("arcmsr: there is an bus reset" 3863 " eh proceeding.......\n"); 3864 timeout = wait_event_timeout(wait_q, (acb->acb_flags 3865 & ACB_F_BUS_RESET) == 0, 220 * HZ); 3866 if (timeout) 3867 return SUCCESS; 3868 } 3869 acb->acb_flags |= ACB_F_BUS_RESET; 3870 if (!arcmsr_iop_reset(acb)) { 3871 struct MessageUnit_D *reg; 3872 reg = acb->pmuD; 3873 arcmsr_hardware_reset(acb); 3874 acb->acb_flags &= ~ACB_F_IOP_INITED; 3875 nap: 3876 ssleep(ARCMSR_SLEEPTIME); 3877 if ((readl(reg->sample_at_reset) & 0x80) != 0) { 3878 pr_err("arcmsr%d: waiting for " 3879 "hw bus reset return, retry=%d\n", 3880 acb->host->host_no, retry_count); 3881 if (retry_count > ARCMSR_RETRYCOUNT) { 3882 acb->fw_flag = FW_DEADLOCK; 3883 pr_err("arcmsr%d: waiting for hw bus" 3884 " reset return, " 3885 "RETRY TERMINATED!!\n", 3886 acb->host->host_no); 3887 return FAILED; 3888 } 3889 retry_count++; 3890 goto nap; 3891 } 3892 acb->acb_flags |= ACB_F_IOP_INITED; 3893 /* disable all outbound interrupt */ 3894 intmask_org = arcmsr_disable_outbound_ints(acb); 3895 arcmsr_get_firmware_spec(acb); 3896 arcmsr_start_adapter_bgrb(acb); 3897 arcmsr_clear_doorbell_queue_buffer(acb); 3898 arcmsr_enable_outbound_ints(acb, intmask_org); 3899 atomic_set(&acb->rq_map_token, 16); 3900 atomic_set(&acb->ante_token_value, 16); 3901 acb->fw_flag = FW_NORMAL; 3902 mod_timer(&acb->eternal_timer, 3903 jiffies + msecs_to_jiffies(6 * HZ)); 3904 acb->acb_flags &= ~ACB_F_BUS_RESET; 3905 rtn = SUCCESS; 3906 pr_err("arcmsr: scsi bus reset " 3907 "eh returns with success\n"); 3908 } else { 3909 acb->acb_flags &= ~ACB_F_BUS_RESET; 3910 atomic_set(&acb->rq_map_token, 16); 3911 atomic_set(&acb->ante_token_value, 16); 3912 acb->fw_flag = FW_NORMAL; 3913 mod_timer(&acb->eternal_timer, 3914 jiffies + msecs_to_jiffies(6 * HZ)); 3915 rtn = SUCCESS; 3916 } 3917 break; 3918 } 3919 } 3920 return rtn; 3921 } 3922 3923 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3924 struct CommandControlBlock *ccb) 3925 { 3926 int rtn; 3927 rtn = arcmsr_polling_ccbdone(acb, ccb); 3928 return rtn; 3929 } 3930 3931 static int arcmsr_abort(struct scsi_cmnd *cmd) 3932 { 3933 struct AdapterControlBlock *acb = 3934 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3935 int i = 0; 3936 int rtn = FAILED; 3937 uint32_t intmask_org; 3938 3939 printk(KERN_NOTICE 3940 "arcmsr%d: abort device command of scsi id = %d lun = %d\n", 3941 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun); 3942 acb->acb_flags |= ACB_F_ABORT; 3943 acb->num_aborts++; 3944 /* 3945 ************************************************ 3946 ** the all interrupt service routine is locked 3947 ** we need to handle it as soon as possible and exit 3948 ************************************************ 3949 */ 3950 if (!atomic_read(&acb->ccboutstandingcount)) { 3951 acb->acb_flags &= ~ACB_F_ABORT; 3952 return rtn; 3953 } 3954 3955 intmask_org = arcmsr_disable_outbound_ints(acb); 3956 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3957 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3958 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3959 ccb->startdone = ARCMSR_CCB_ABORTED; 3960 rtn = arcmsr_abort_one_cmd(acb, ccb); 3961 break; 3962 } 3963 } 3964 acb->acb_flags &= ~ACB_F_ABORT; 3965 arcmsr_enable_outbound_ints(acb, intmask_org); 3966 return rtn; 3967 } 3968 3969 static const char *arcmsr_info(struct Scsi_Host *host) 3970 { 3971 struct AdapterControlBlock *acb = 3972 (struct AdapterControlBlock *) host->hostdata; 3973 static char buf[256]; 3974 char *type; 3975 int raid6 = 1; 3976 switch (acb->pdev->device) { 3977 case PCI_DEVICE_ID_ARECA_1110: 3978 case PCI_DEVICE_ID_ARECA_1200: 3979 case PCI_DEVICE_ID_ARECA_1202: 3980 case PCI_DEVICE_ID_ARECA_1210: 3981 raid6 = 0; 3982 /*FALLTHRU*/ 3983 case PCI_DEVICE_ID_ARECA_1120: 3984 case PCI_DEVICE_ID_ARECA_1130: 3985 case PCI_DEVICE_ID_ARECA_1160: 3986 case PCI_DEVICE_ID_ARECA_1170: 3987 case PCI_DEVICE_ID_ARECA_1201: 3988 case PCI_DEVICE_ID_ARECA_1203: 3989 case PCI_DEVICE_ID_ARECA_1220: 3990 case PCI_DEVICE_ID_ARECA_1230: 3991 case PCI_DEVICE_ID_ARECA_1260: 3992 case PCI_DEVICE_ID_ARECA_1270: 3993 case PCI_DEVICE_ID_ARECA_1280: 3994 type = "SATA"; 3995 break; 3996 case PCI_DEVICE_ID_ARECA_1214: 3997 case PCI_DEVICE_ID_ARECA_1380: 3998 case PCI_DEVICE_ID_ARECA_1381: 3999 case PCI_DEVICE_ID_ARECA_1680: 4000 case PCI_DEVICE_ID_ARECA_1681: 4001 case PCI_DEVICE_ID_ARECA_1880: 4002 type = "SAS/SATA"; 4003 break; 4004 default: 4005 type = "unknown"; 4006 raid6 = 0; 4007 break; 4008 } 4009 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n", 4010 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION); 4011 return buf; 4012 } 4013