1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Erich Chen 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA RAID Host adapter 8 ******************************************************************************* 9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved 10 ** 11 ** Web site: www.areca.com.tw 12 ** E-mail: support@areca.com.tw 13 ** 14 ** This program is free software; you can redistribute it and/or modify 15 ** it under the terms of the GNU General Public License version 2 as 16 ** published by the Free Software Foundation. 17 ** This program is distributed in the hope that it will be useful, 18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 ** GNU General Public License for more details. 21 ******************************************************************************* 22 ** Redistribution and use in source and binary forms, with or without 23 ** modification, are permitted provided that the following conditions 24 ** are met: 25 ** 1. Redistributions of source code must retain the above copyright 26 ** notice, this list of conditions and the following disclaimer. 27 ** 2. Redistributions in binary form must reproduce the above copyright 28 ** notice, this list of conditions and the following disclaimer in the 29 ** documentation and/or other materials provided with the distribution. 30 ** 3. The name of the author may not be used to endorse or promote products 31 ** derived from this software without specific prior written permission. 32 ** 33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43 ******************************************************************************* 44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 46 ******************************************************************************* 47 */ 48 #include <linux/module.h> 49 #include <linux/reboot.h> 50 #include <linux/spinlock.h> 51 #include <linux/pci_ids.h> 52 #include <linux/interrupt.h> 53 #include <linux/moduleparam.h> 54 #include <linux/errno.h> 55 #include <linux/types.h> 56 #include <linux/delay.h> 57 #include <linux/dma-mapping.h> 58 #include <linux/timer.h> 59 #include <linux/slab.h> 60 #include <linux/pci.h> 61 #include <linux/aer.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <asm/system.h> 65 #include <asm/uaccess.h> 66 #include <scsi/scsi_host.h> 67 #include <scsi/scsi.h> 68 #include <scsi/scsi_cmnd.h> 69 #include <scsi/scsi_tcq.h> 70 #include <scsi/scsi_device.h> 71 #include <scsi/scsi_transport.h> 72 #include <scsi/scsicam.h> 73 #include "arcmsr.h" 74 MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>"); 75 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); 76 MODULE_LICENSE("Dual BSD/GPL"); 77 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 78 static int sleeptime = 10; 79 static int retrycount = 30; 80 wait_queue_head_t wait_q; 81 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 82 struct scsi_cmnd *cmd); 83 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 84 static int arcmsr_abort(struct scsi_cmnd *); 85 static int arcmsr_bus_reset(struct scsi_cmnd *); 86 static int arcmsr_bios_param(struct scsi_device *sdev, 87 struct block_device *bdev, sector_t capacity, int *info); 88 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 89 static int arcmsr_probe(struct pci_dev *pdev, 90 const struct pci_device_id *id); 91 static void arcmsr_remove(struct pci_dev *pdev); 92 static void arcmsr_shutdown(struct pci_dev *pdev); 93 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 94 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 95 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 96 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 97 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); 98 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); 99 static void arcmsr_request_device_map(unsigned long pacb); 100 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); 101 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); 102 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); 103 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 104 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 105 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 106 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); 107 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 108 static const char *arcmsr_info(struct Scsi_Host *); 109 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 110 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, 111 int queue_depth, int reason) 112 { 113 if (reason != SCSI_QDEPTH_DEFAULT) 114 return -EOPNOTSUPP; 115 116 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 117 queue_depth = ARCMSR_MAX_CMD_PERLUN; 118 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); 119 return queue_depth; 120 } 121 122 static struct scsi_host_template arcmsr_scsi_host_template = { 123 .module = THIS_MODULE, 124 .name = "ARCMSR ARECA SATA/SAS RAID Controller" 125 ARCMSR_DRIVER_VERSION, 126 .info = arcmsr_info, 127 .queuecommand = arcmsr_queue_command, 128 .eh_abort_handler = arcmsr_abort, 129 .eh_bus_reset_handler = arcmsr_bus_reset, 130 .bios_param = arcmsr_bios_param, 131 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 132 .can_queue = ARCMSR_MAX_FREECCB_NUM, 133 .this_id = ARCMSR_SCSI_INITIATOR_ID, 134 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 135 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 136 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 137 .use_clustering = ENABLE_CLUSTERING, 138 .shost_attrs = arcmsr_host_attrs, 139 }; 140 static struct pci_device_id arcmsr_device_id_table[] = { 141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, 142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, 143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, 160 {0, 0}, /* Terminating entry */ 161 }; 162 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 163 static struct pci_driver arcmsr_pci_driver = { 164 .name = "arcmsr", 165 .id_table = arcmsr_device_id_table, 166 .probe = arcmsr_probe, 167 .remove = arcmsr_remove, 168 .shutdown = arcmsr_shutdown, 169 }; 170 /* 171 **************************************************************************** 172 **************************************************************************** 173 */ 174 int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) 175 { 176 struct Scsi_Host *shost = NULL; 177 int i, isleep; 178 shost = cmd->device->host; 179 isleep = sleeptime / 10; 180 if (isleep > 0) { 181 for (i = 0; i < isleep; i++) { 182 msleep(10000); 183 } 184 } 185 186 isleep = sleeptime % 10; 187 if (isleep > 0) { 188 msleep(isleep*1000); 189 } 190 printk(KERN_NOTICE "wake-up\n"); 191 return 0; 192 } 193 194 static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) 195 { 196 switch (acb->adapter_type) { 197 case ACB_ADAPTER_TYPE_A: 198 case ACB_ADAPTER_TYPE_C: 199 break; 200 case ACB_ADAPTER_TYPE_B:{ 201 dma_free_coherent(&acb->pdev->dev, 202 sizeof(struct MessageUnit_B), 203 acb->pmuB, acb->dma_coherent_handle_hbb_mu); 204 } 205 } 206 } 207 208 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 209 { 210 struct pci_dev *pdev = acb->pdev; 211 switch (acb->adapter_type){ 212 case ACB_ADAPTER_TYPE_A:{ 213 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 214 if (!acb->pmuA) { 215 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 216 return false; 217 } 218 break; 219 } 220 case ACB_ADAPTER_TYPE_B:{ 221 void __iomem *mem_base0, *mem_base1; 222 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 223 if (!mem_base0) { 224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 225 return false; 226 } 227 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 228 if (!mem_base1) { 229 iounmap(mem_base0); 230 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 231 return false; 232 } 233 acb->mem_base0 = mem_base0; 234 acb->mem_base1 = mem_base1; 235 break; 236 } 237 case ACB_ADAPTER_TYPE_C:{ 238 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 239 if (!acb->pmuC) { 240 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 241 return false; 242 } 243 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 244 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 245 return true; 246 } 247 break; 248 } 249 } 250 return true; 251 } 252 253 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 254 { 255 switch (acb->adapter_type) { 256 case ACB_ADAPTER_TYPE_A:{ 257 iounmap(acb->pmuA); 258 } 259 break; 260 case ACB_ADAPTER_TYPE_B:{ 261 iounmap(acb->mem_base0); 262 iounmap(acb->mem_base1); 263 } 264 265 break; 266 case ACB_ADAPTER_TYPE_C:{ 267 iounmap(acb->pmuC); 268 } 269 } 270 } 271 272 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 273 { 274 irqreturn_t handle_state; 275 struct AdapterControlBlock *acb = dev_id; 276 277 handle_state = arcmsr_interrupt(acb); 278 return handle_state; 279 } 280 281 static int arcmsr_bios_param(struct scsi_device *sdev, 282 struct block_device *bdev, sector_t capacity, int *geom) 283 { 284 int ret, heads, sectors, cylinders, total_capacity; 285 unsigned char *buffer;/* return copy of block device's partition table */ 286 287 buffer = scsi_bios_ptable(bdev); 288 if (buffer) { 289 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 290 kfree(buffer); 291 if (ret != -1) 292 return ret; 293 } 294 total_capacity = capacity; 295 heads = 64; 296 sectors = 32; 297 cylinders = total_capacity / (heads * sectors); 298 if (cylinders > 1024) { 299 heads = 255; 300 sectors = 63; 301 cylinders = total_capacity / (heads * sectors); 302 } 303 geom[0] = heads; 304 geom[1] = sectors; 305 geom[2] = cylinders; 306 return 0; 307 } 308 309 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) 310 { 311 struct pci_dev *pdev = acb->pdev; 312 u16 dev_id; 313 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 314 acb->dev_id = dev_id; 315 switch (dev_id) { 316 case 0x1880: { 317 acb->adapter_type = ACB_ADAPTER_TYPE_C; 318 } 319 break; 320 case 0x1201: { 321 acb->adapter_type = ACB_ADAPTER_TYPE_B; 322 } 323 break; 324 325 default: acb->adapter_type = ACB_ADAPTER_TYPE_A; 326 } 327 } 328 329 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 330 { 331 struct MessageUnit_A __iomem *reg = acb->pmuA; 332 uint32_t Index; 333 uint8_t Retries = 0x00; 334 do { 335 for (Index = 0; Index < 100; Index++) { 336 if (readl(®->outbound_intstatus) & 337 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 338 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 339 ®->outbound_intstatus); 340 return true; 341 } 342 msleep(10); 343 }/*max 1 seconds*/ 344 345 } while (Retries++ < 20);/*max 20 sec*/ 346 return false; 347 } 348 349 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) 350 { 351 struct MessageUnit_B *reg = acb->pmuB; 352 uint32_t Index; 353 uint8_t Retries = 0x00; 354 do { 355 for (Index = 0; Index < 100; Index++) { 356 if (readl(reg->iop2drv_doorbell) 357 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 358 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN 359 , reg->iop2drv_doorbell); 360 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 361 return true; 362 } 363 msleep(10); 364 }/*max 1 seconds*/ 365 366 } while (Retries++ < 20);/*max 20 sec*/ 367 return false; 368 } 369 370 static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) 371 { 372 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 373 unsigned char Retries = 0x00; 374 uint32_t Index; 375 do { 376 for (Index = 0; Index < 100; Index++) { 377 if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 378 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/ 379 return true; 380 } 381 /* one us delay */ 382 msleep(10); 383 } /*max 1 seconds*/ 384 } while (Retries++ < 20); /*max 20 sec*/ 385 return false; 386 } 387 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 388 { 389 struct MessageUnit_A __iomem *reg = acb->pmuA; 390 int retry_count = 30; 391 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 392 do { 393 if (arcmsr_hba_wait_msgint_ready(acb)) 394 break; 395 else { 396 retry_count--; 397 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 398 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 399 } 400 } while (retry_count != 0); 401 } 402 403 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) 404 { 405 struct MessageUnit_B *reg = acb->pmuB; 406 int retry_count = 30; 407 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 408 do { 409 if (arcmsr_hbb_wait_msgint_ready(acb)) 410 break; 411 else { 412 retry_count--; 413 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 414 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 415 } 416 } while (retry_count != 0); 417 } 418 419 static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) 420 { 421 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 422 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 423 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 424 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 425 do { 426 if (arcmsr_hbc_wait_msgint_ready(pACB)) { 427 break; 428 } else { 429 retry_count--; 430 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 431 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 432 } 433 } while (retry_count != 0); 434 return; 435 } 436 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 437 { 438 switch (acb->adapter_type) { 439 440 case ACB_ADAPTER_TYPE_A: { 441 arcmsr_flush_hba_cache(acb); 442 } 443 break; 444 445 case ACB_ADAPTER_TYPE_B: { 446 arcmsr_flush_hbb_cache(acb); 447 } 448 break; 449 case ACB_ADAPTER_TYPE_C: { 450 arcmsr_flush_hbc_cache(acb); 451 } 452 } 453 } 454 455 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 456 { 457 struct pci_dev *pdev = acb->pdev; 458 void *dma_coherent; 459 dma_addr_t dma_coherent_handle; 460 struct CommandControlBlock *ccb_tmp; 461 int i = 0, j = 0; 462 dma_addr_t cdb_phyaddr; 463 unsigned long roundup_ccbsize = 0, offset; 464 unsigned long max_xfer_len; 465 unsigned long max_sg_entrys; 466 uint32_t firm_config_version; 467 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 468 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 469 acb->devstate[i][j] = ARECA_RAID_GONE; 470 471 max_xfer_len = ARCMSR_MAX_XFER_LEN; 472 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 473 firm_config_version = acb->firm_cfg_version; 474 if((firm_config_version & 0xFF) >= 3){ 475 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 476 max_sg_entrys = (max_xfer_len/4096); 477 } 478 acb->host->max_sectors = max_xfer_len/512; 479 acb->host->sg_tablesize = max_sg_entrys; 480 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 481 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; 482 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 483 if(!dma_coherent){ 484 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); 485 return -ENOMEM; 486 } 487 acb->dma_coherent = dma_coherent; 488 acb->dma_coherent_handle = dma_coherent_handle; 489 memset(dma_coherent, 0, acb->uncache_size); 490 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; 491 dma_coherent_handle = dma_coherent_handle + offset; 492 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; 493 ccb_tmp = dma_coherent; 494 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 495 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 496 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 497 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); 498 acb->pccb_pool[i] = ccb_tmp; 499 ccb_tmp->acb = acb; 500 INIT_LIST_HEAD(&ccb_tmp->list); 501 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 502 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 503 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 504 } 505 return 0; 506 } 507 508 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 509 { 510 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh); 511 switch (acb->adapter_type) { 512 case ACB_ADAPTER_TYPE_A: { 513 514 struct MessageUnit_A __iomem *reg = acb->pmuA; 515 char *acb_dev_map = (char *)acb->device_map; 516 uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); 517 char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); 518 int target, lun; 519 struct scsi_device *psdev; 520 char diff; 521 522 atomic_inc(&acb->rq_map_token); 523 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 524 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 525 diff = (*acb_dev_map)^readb(devicemap); 526 if (diff != 0) { 527 char temp; 528 *acb_dev_map = readb(devicemap); 529 temp =*acb_dev_map; 530 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 531 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 532 scsi_add_device(acb->host, 0, target, lun); 533 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 534 psdev = scsi_device_lookup(acb->host, 0, target, lun); 535 if (psdev != NULL ) { 536 scsi_remove_device(psdev); 537 scsi_device_put(psdev); 538 } 539 } 540 temp >>= 1; 541 diff >>= 1; 542 } 543 } 544 devicemap++; 545 acb_dev_map++; 546 } 547 } 548 break; 549 } 550 551 case ACB_ADAPTER_TYPE_B: { 552 struct MessageUnit_B *reg = acb->pmuB; 553 char *acb_dev_map = (char *)acb->device_map; 554 uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); 555 char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); 556 int target, lun; 557 struct scsi_device *psdev; 558 char diff; 559 560 atomic_inc(&acb->rq_map_token); 561 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 562 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 563 diff = (*acb_dev_map)^readb(devicemap); 564 if (diff != 0) { 565 char temp; 566 *acb_dev_map = readb(devicemap); 567 temp =*acb_dev_map; 568 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 569 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 570 scsi_add_device(acb->host, 0, target, lun); 571 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 572 psdev = scsi_device_lookup(acb->host, 0, target, lun); 573 if (psdev != NULL ) { 574 scsi_remove_device(psdev); 575 scsi_device_put(psdev); 576 } 577 } 578 temp >>= 1; 579 diff >>= 1; 580 } 581 } 582 devicemap++; 583 acb_dev_map++; 584 } 585 } 586 } 587 break; 588 case ACB_ADAPTER_TYPE_C: { 589 struct MessageUnit_C *reg = acb->pmuC; 590 char *acb_dev_map = (char *)acb->device_map; 591 uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 592 char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 593 int target, lun; 594 struct scsi_device *psdev; 595 char diff; 596 597 atomic_inc(&acb->rq_map_token); 598 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 599 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) { 600 diff = (*acb_dev_map)^readb(devicemap); 601 if (diff != 0) { 602 char temp; 603 *acb_dev_map = readb(devicemap); 604 temp = *acb_dev_map; 605 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 606 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) { 607 scsi_add_device(acb->host, 0, target, lun); 608 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) { 609 psdev = scsi_device_lookup(acb->host, 0, target, lun); 610 if (psdev != NULL) { 611 scsi_remove_device(psdev); 612 scsi_device_put(psdev); 613 } 614 } 615 temp >>= 1; 616 diff >>= 1; 617 } 618 } 619 devicemap++; 620 acb_dev_map++; 621 } 622 } 623 } 624 } 625 } 626 627 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 628 { 629 struct Scsi_Host *host; 630 struct AdapterControlBlock *acb; 631 uint8_t bus,dev_fun; 632 int error; 633 error = pci_enable_device(pdev); 634 if(error){ 635 return -ENODEV; 636 } 637 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 638 if(!host){ 639 goto pci_disable_dev; 640 } 641 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 642 if(error){ 643 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 644 if(error){ 645 printk(KERN_WARNING 646 "scsi%d: No suitable DMA mask available\n", 647 host->host_no); 648 goto scsi_host_release; 649 } 650 } 651 init_waitqueue_head(&wait_q); 652 bus = pdev->bus->number; 653 dev_fun = pdev->devfn; 654 acb = (struct AdapterControlBlock *) host->hostdata; 655 memset(acb,0,sizeof(struct AdapterControlBlock)); 656 acb->pdev = pdev; 657 acb->host = host; 658 host->max_lun = ARCMSR_MAX_TARGETLUN; 659 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 660 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 661 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 662 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 663 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 664 host->unique_id = (bus << 8) | dev_fun; 665 pci_set_drvdata(pdev, host); 666 pci_set_master(pdev); 667 error = pci_request_regions(pdev, "arcmsr"); 668 if(error){ 669 goto scsi_host_release; 670 } 671 spin_lock_init(&acb->eh_lock); 672 spin_lock_init(&acb->ccblist_lock); 673 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 674 ACB_F_MESSAGE_RQBUFFER_CLEARED | 675 ACB_F_MESSAGE_WQBUFFER_READED); 676 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 677 INIT_LIST_HEAD(&acb->ccb_free_list); 678 arcmsr_define_adapter_type(acb); 679 error = arcmsr_remap_pciregion(acb); 680 if(!error){ 681 goto pci_release_regs; 682 } 683 error = arcmsr_get_firmware_spec(acb); 684 if(!error){ 685 goto unmap_pci_region; 686 } 687 error = arcmsr_alloc_ccb_pool(acb); 688 if(error){ 689 goto free_hbb_mu; 690 } 691 arcmsr_iop_init(acb); 692 error = scsi_add_host(host, &pdev->dev); 693 if(error){ 694 goto RAID_controller_stop; 695 } 696 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); 697 if(error){ 698 goto scsi_host_remove; 699 } 700 host->irq = pdev->irq; 701 scsi_scan_host(host); 702 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 703 atomic_set(&acb->rq_map_token, 16); 704 atomic_set(&acb->ante_token_value, 16); 705 acb->fw_flag = FW_NORMAL; 706 init_timer(&acb->eternal_timer); 707 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 708 acb->eternal_timer.data = (unsigned long) acb; 709 acb->eternal_timer.function = &arcmsr_request_device_map; 710 add_timer(&acb->eternal_timer); 711 if(arcmsr_alloc_sysfs_attr(acb)) 712 goto out_free_sysfs; 713 return 0; 714 out_free_sysfs: 715 scsi_host_remove: 716 scsi_remove_host(host); 717 RAID_controller_stop: 718 arcmsr_stop_adapter_bgrb(acb); 719 arcmsr_flush_adapter_cache(acb); 720 arcmsr_free_ccb_pool(acb); 721 free_hbb_mu: 722 arcmsr_free_hbb_mu(acb); 723 unmap_pci_region: 724 arcmsr_unmap_pciregion(acb); 725 pci_release_regs: 726 pci_release_regions(pdev); 727 scsi_host_release: 728 scsi_host_put(host); 729 pci_disable_dev: 730 pci_disable_device(pdev); 731 return -ENODEV; 732 } 733 734 static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 735 { 736 struct MessageUnit_A __iomem *reg = acb->pmuA; 737 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 738 if (!arcmsr_hba_wait_msgint_ready(acb)) { 739 printk(KERN_NOTICE 740 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 741 , acb->host->host_no); 742 return false; 743 } 744 return true; 745 } 746 747 static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) 748 { 749 struct MessageUnit_B *reg = acb->pmuB; 750 751 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 752 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 753 printk(KERN_NOTICE 754 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 755 , acb->host->host_no); 756 return false; 757 } 758 return true; 759 } 760 static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) 761 { 762 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 763 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 764 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 765 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 766 printk(KERN_NOTICE 767 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 768 , pACB->host->host_no); 769 return false; 770 } 771 return true; 772 } 773 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 774 { 775 uint8_t rtnval = 0; 776 switch (acb->adapter_type) { 777 case ACB_ADAPTER_TYPE_A: { 778 rtnval = arcmsr_abort_hba_allcmd(acb); 779 } 780 break; 781 782 case ACB_ADAPTER_TYPE_B: { 783 rtnval = arcmsr_abort_hbb_allcmd(acb); 784 } 785 break; 786 787 case ACB_ADAPTER_TYPE_C: { 788 rtnval = arcmsr_abort_hbc_allcmd(acb); 789 } 790 } 791 return rtnval; 792 } 793 794 static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) 795 { 796 struct MessageUnit_B *reg = pacb->pmuB; 797 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 798 if (!arcmsr_hbb_wait_msgint_ready(pacb)) { 799 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); 800 return false; 801 } 802 return true; 803 } 804 805 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 806 { 807 struct scsi_cmnd *pcmd = ccb->pcmd; 808 809 scsi_dma_unmap(pcmd); 810 } 811 812 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 813 { 814 struct AdapterControlBlock *acb = ccb->acb; 815 struct scsi_cmnd *pcmd = ccb->pcmd; 816 unsigned long flags; 817 atomic_dec(&acb->ccboutstandingcount); 818 arcmsr_pci_unmap_dma(ccb); 819 ccb->startdone = ARCMSR_CCB_DONE; 820 spin_lock_irqsave(&acb->ccblist_lock, flags); 821 list_add_tail(&ccb->list, &acb->ccb_free_list); 822 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 823 pcmd->scsi_done(pcmd); 824 } 825 826 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 827 { 828 829 struct scsi_cmnd *pcmd = ccb->pcmd; 830 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 831 pcmd->result = DID_OK << 16; 832 if (sensebuffer) { 833 int sense_data_length = 834 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 835 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 836 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 837 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 838 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 839 sensebuffer->Valid = 1; 840 } 841 } 842 843 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 844 { 845 u32 orig_mask = 0; 846 switch (acb->adapter_type) { 847 case ACB_ADAPTER_TYPE_A : { 848 struct MessageUnit_A __iomem *reg = acb->pmuA; 849 orig_mask = readl(®->outbound_intmask); 850 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 851 ®->outbound_intmask); 852 } 853 break; 854 case ACB_ADAPTER_TYPE_B : { 855 struct MessageUnit_B *reg = acb->pmuB; 856 orig_mask = readl(reg->iop2drv_doorbell_mask); 857 writel(0, reg->iop2drv_doorbell_mask); 858 } 859 break; 860 case ACB_ADAPTER_TYPE_C:{ 861 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 862 /* disable all outbound interrupt */ 863 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 864 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 865 } 866 break; 867 } 868 return orig_mask; 869 } 870 871 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 872 struct CommandControlBlock *ccb, bool error) 873 { 874 uint8_t id, lun; 875 id = ccb->pcmd->device->id; 876 lun = ccb->pcmd->device->lun; 877 if (!error) { 878 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 879 acb->devstate[id][lun] = ARECA_RAID_GOOD; 880 ccb->pcmd->result = DID_OK << 16; 881 arcmsr_ccb_complete(ccb); 882 }else{ 883 switch (ccb->arcmsr_cdb.DeviceStatus) { 884 case ARCMSR_DEV_SELECT_TIMEOUT: { 885 acb->devstate[id][lun] = ARECA_RAID_GONE; 886 ccb->pcmd->result = DID_NO_CONNECT << 16; 887 arcmsr_ccb_complete(ccb); 888 } 889 break; 890 891 case ARCMSR_DEV_ABORTED: 892 893 case ARCMSR_DEV_INIT_FAIL: { 894 acb->devstate[id][lun] = ARECA_RAID_GONE; 895 ccb->pcmd->result = DID_BAD_TARGET << 16; 896 arcmsr_ccb_complete(ccb); 897 } 898 break; 899 900 case ARCMSR_DEV_CHECK_CONDITION: { 901 acb->devstate[id][lun] = ARECA_RAID_GOOD; 902 arcmsr_report_sense_info(ccb); 903 arcmsr_ccb_complete(ccb); 904 } 905 break; 906 907 default: 908 printk(KERN_NOTICE 909 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 910 but got unknown DeviceStatus = 0x%x \n" 911 , acb->host->host_no 912 , id 913 , lun 914 , ccb->arcmsr_cdb.DeviceStatus); 915 acb->devstate[id][lun] = ARECA_RAID_GONE; 916 ccb->pcmd->result = DID_NO_CONNECT << 16; 917 arcmsr_ccb_complete(ccb); 918 break; 919 } 920 } 921 } 922 923 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 924 925 { 926 int id, lun; 927 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 928 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 929 struct scsi_cmnd *abortcmd = pCCB->pcmd; 930 if (abortcmd) { 931 id = abortcmd->device->id; 932 lun = abortcmd->device->lun; 933 abortcmd->result |= DID_ABORT << 16; 934 arcmsr_ccb_complete(pCCB); 935 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 936 acb->host->host_no, pCCB); 937 } 938 return; 939 } 940 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 941 done acb = '0x%p'" 942 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 943 " ccboutstandingcount = %d \n" 944 , acb->host->host_no 945 , acb 946 , pCCB 947 , pCCB->acb 948 , pCCB->startdone 949 , atomic_read(&acb->ccboutstandingcount)); 950 return; 951 } 952 arcmsr_report_ccb_state(acb, pCCB, error); 953 } 954 955 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 956 { 957 int i = 0; 958 uint32_t flag_ccb; 959 struct ARCMSR_CDB *pARCMSR_CDB; 960 bool error; 961 struct CommandControlBlock *pCCB; 962 switch (acb->adapter_type) { 963 964 case ACB_ADAPTER_TYPE_A: { 965 struct MessageUnit_A __iomem *reg = acb->pmuA; 966 uint32_t outbound_intstatus; 967 outbound_intstatus = readl(®->outbound_intstatus) & 968 acb->outbound_int_enable; 969 /*clear and abort all outbound posted Q*/ 970 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 971 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 972 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 973 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 974 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 975 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 976 arcmsr_drain_donequeue(acb, pCCB, error); 977 } 978 } 979 break; 980 981 case ACB_ADAPTER_TYPE_B: { 982 struct MessageUnit_B *reg = acb->pmuB; 983 /*clear all outbound posted Q*/ 984 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, ®->iop2drv_doorbell); /* clear doorbell interrupt */ 985 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 986 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { 987 writel(0, ®->done_qbuffer[i]); 988 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 989 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 990 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 991 arcmsr_drain_donequeue(acb, pCCB, error); 992 } 993 reg->post_qbuffer[i] = 0; 994 } 995 reg->doneq_index = 0; 996 reg->postq_index = 0; 997 } 998 break; 999 case ACB_ADAPTER_TYPE_C: { 1000 struct MessageUnit_C *reg = acb->pmuC; 1001 struct ARCMSR_CDB *pARCMSR_CDB; 1002 uint32_t flag_ccb, ccb_cdb_phy; 1003 bool error; 1004 struct CommandControlBlock *pCCB; 1005 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1006 /*need to do*/ 1007 flag_ccb = readl(®->outbound_queueport_low); 1008 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1009 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1010 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1011 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1012 arcmsr_drain_donequeue(acb, pCCB, error); 1013 } 1014 } 1015 } 1016 } 1017 static void arcmsr_remove(struct pci_dev *pdev) 1018 { 1019 struct Scsi_Host *host = pci_get_drvdata(pdev); 1020 struct AdapterControlBlock *acb = 1021 (struct AdapterControlBlock *) host->hostdata; 1022 int poll_count = 0; 1023 arcmsr_free_sysfs_attr(acb); 1024 scsi_remove_host(host); 1025 flush_scheduled_work(); 1026 del_timer_sync(&acb->eternal_timer); 1027 arcmsr_disable_outbound_ints(acb); 1028 arcmsr_stop_adapter_bgrb(acb); 1029 arcmsr_flush_adapter_cache(acb); 1030 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1031 acb->acb_flags &= ~ACB_F_IOP_INITED; 1032 1033 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1034 if (!atomic_read(&acb->ccboutstandingcount)) 1035 break; 1036 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1037 msleep(25); 1038 } 1039 1040 if (atomic_read(&acb->ccboutstandingcount)) { 1041 int i; 1042 1043 arcmsr_abort_allcmd(acb); 1044 arcmsr_done4abort_postqueue(acb); 1045 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1046 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1047 if (ccb->startdone == ARCMSR_CCB_START) { 1048 ccb->startdone = ARCMSR_CCB_ABORTED; 1049 ccb->pcmd->result = DID_ABORT << 16; 1050 arcmsr_ccb_complete(ccb); 1051 } 1052 } 1053 } 1054 free_irq(pdev->irq, acb); 1055 arcmsr_free_ccb_pool(acb); 1056 arcmsr_free_hbb_mu(acb); 1057 arcmsr_unmap_pciregion(acb); 1058 pci_release_regions(pdev); 1059 scsi_host_put(host); 1060 pci_disable_device(pdev); 1061 pci_set_drvdata(pdev, NULL); 1062 } 1063 1064 static void arcmsr_shutdown(struct pci_dev *pdev) 1065 { 1066 struct Scsi_Host *host = pci_get_drvdata(pdev); 1067 struct AdapterControlBlock *acb = 1068 (struct AdapterControlBlock *)host->hostdata; 1069 del_timer_sync(&acb->eternal_timer); 1070 arcmsr_disable_outbound_ints(acb); 1071 flush_scheduled_work(); 1072 arcmsr_stop_adapter_bgrb(acb); 1073 arcmsr_flush_adapter_cache(acb); 1074 } 1075 1076 static int arcmsr_module_init(void) 1077 { 1078 int error = 0; 1079 error = pci_register_driver(&arcmsr_pci_driver); 1080 return error; 1081 } 1082 1083 static void arcmsr_module_exit(void) 1084 { 1085 pci_unregister_driver(&arcmsr_pci_driver); 1086 } 1087 module_init(arcmsr_module_init); 1088 module_exit(arcmsr_module_exit); 1089 1090 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1091 u32 intmask_org) 1092 { 1093 u32 mask; 1094 switch (acb->adapter_type) { 1095 1096 case ACB_ADAPTER_TYPE_A: { 1097 struct MessageUnit_A __iomem *reg = acb->pmuA; 1098 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1099 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1100 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1101 writel(mask, ®->outbound_intmask); 1102 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1103 } 1104 break; 1105 1106 case ACB_ADAPTER_TYPE_B: { 1107 struct MessageUnit_B *reg = acb->pmuB; 1108 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1109 ARCMSR_IOP2DRV_DATA_READ_OK | 1110 ARCMSR_IOP2DRV_CDB_DONE | 1111 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1112 writel(mask, reg->iop2drv_doorbell_mask); 1113 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1114 } 1115 break; 1116 case ACB_ADAPTER_TYPE_C: { 1117 struct MessageUnit_C *reg = acb->pmuC; 1118 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1119 writel(intmask_org & mask, ®->host_int_mask); 1120 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1121 } 1122 } 1123 } 1124 1125 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1126 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1127 { 1128 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1129 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1130 __le32 address_lo, address_hi; 1131 int arccdbsize = 0x30; 1132 __le32 length = 0; 1133 int i; 1134 struct scatterlist *sg; 1135 int nseg; 1136 ccb->pcmd = pcmd; 1137 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1138 arcmsr_cdb->TargetID = pcmd->device->id; 1139 arcmsr_cdb->LUN = pcmd->device->lun; 1140 arcmsr_cdb->Function = 1; 1141 arcmsr_cdb->Context = 0; 1142 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1143 1144 nseg = scsi_dma_map(pcmd); 1145 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1146 return FAILED; 1147 scsi_for_each_sg(pcmd, sg, nseg, i) { 1148 /* Get the physical address of the current data pointer */ 1149 length = cpu_to_le32(sg_dma_len(sg)); 1150 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1151 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1152 if (address_hi == 0) { 1153 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1154 1155 pdma_sg->address = address_lo; 1156 pdma_sg->length = length; 1157 psge += sizeof (struct SG32ENTRY); 1158 arccdbsize += sizeof (struct SG32ENTRY); 1159 } else { 1160 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1161 1162 pdma_sg->addresshigh = address_hi; 1163 pdma_sg->address = address_lo; 1164 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1165 psge += sizeof (struct SG64ENTRY); 1166 arccdbsize += sizeof (struct SG64ENTRY); 1167 } 1168 } 1169 arcmsr_cdb->sgcount = (uint8_t)nseg; 1170 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1171 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1172 if ( arccdbsize > 256) 1173 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1174 if (pcmd->cmnd[0]|WRITE_6 || pcmd->cmnd[0]|WRITE_10 || pcmd->cmnd[0]|WRITE_12 ){ 1175 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1176 } 1177 ccb->arc_cdb_size = arccdbsize; 1178 return SUCCESS; 1179 } 1180 1181 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1182 { 1183 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; 1184 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1185 atomic_inc(&acb->ccboutstandingcount); 1186 ccb->startdone = ARCMSR_CCB_START; 1187 switch (acb->adapter_type) { 1188 case ACB_ADAPTER_TYPE_A: { 1189 struct MessageUnit_A __iomem *reg = acb->pmuA; 1190 1191 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1192 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1193 ®->inbound_queueport); 1194 else { 1195 writel(cdb_phyaddr_pattern, ®->inbound_queueport); 1196 } 1197 } 1198 break; 1199 1200 case ACB_ADAPTER_TYPE_B: { 1201 struct MessageUnit_B *reg = acb->pmuB; 1202 uint32_t ending_index, index = reg->postq_index; 1203 1204 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1205 writel(0, ®->post_qbuffer[ending_index]); 1206 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1207 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 1208 ®->post_qbuffer[index]); 1209 } else { 1210 writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); 1211 } 1212 index++; 1213 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1214 reg->postq_index = index; 1215 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1216 } 1217 break; 1218 case ACB_ADAPTER_TYPE_C: { 1219 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1220 uint32_t ccb_post_stamp, arc_cdb_size; 1221 1222 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1223 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1); 1224 if (acb->cdb_phyaddr_hi32) { 1225 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1226 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1227 } else { 1228 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1229 } 1230 } 1231 } 1232 } 1233 1234 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1235 { 1236 struct MessageUnit_A __iomem *reg = acb->pmuA; 1237 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1238 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1239 if (!arcmsr_hba_wait_msgint_ready(acb)) { 1240 printk(KERN_NOTICE 1241 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1242 , acb->host->host_no); 1243 } 1244 } 1245 1246 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) 1247 { 1248 struct MessageUnit_B *reg = acb->pmuB; 1249 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1250 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1251 1252 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 1253 printk(KERN_NOTICE 1254 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1255 , acb->host->host_no); 1256 } 1257 } 1258 1259 static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) 1260 { 1261 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1262 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1263 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1264 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1265 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 1266 printk(KERN_NOTICE 1267 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1268 , pACB->host->host_no); 1269 } 1270 return; 1271 } 1272 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1273 { 1274 switch (acb->adapter_type) { 1275 case ACB_ADAPTER_TYPE_A: { 1276 arcmsr_stop_hba_bgrb(acb); 1277 } 1278 break; 1279 1280 case ACB_ADAPTER_TYPE_B: { 1281 arcmsr_stop_hbb_bgrb(acb); 1282 } 1283 break; 1284 case ACB_ADAPTER_TYPE_C: { 1285 arcmsr_stop_hbc_bgrb(acb); 1286 } 1287 } 1288 } 1289 1290 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1291 { 1292 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1293 } 1294 1295 void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1296 { 1297 switch (acb->adapter_type) { 1298 case ACB_ADAPTER_TYPE_A: { 1299 struct MessageUnit_A __iomem *reg = acb->pmuA; 1300 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1301 } 1302 break; 1303 1304 case ACB_ADAPTER_TYPE_B: { 1305 struct MessageUnit_B *reg = acb->pmuB; 1306 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1307 } 1308 break; 1309 case ACB_ADAPTER_TYPE_C: { 1310 struct MessageUnit_C __iomem *reg = acb->pmuC; 1311 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1312 } 1313 } 1314 } 1315 1316 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1317 { 1318 switch (acb->adapter_type) { 1319 case ACB_ADAPTER_TYPE_A: { 1320 struct MessageUnit_A __iomem *reg = acb->pmuA; 1321 /* 1322 ** push inbound doorbell tell iop, driver data write ok 1323 ** and wait reply on next hwinterrupt for next Qbuffer post 1324 */ 1325 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1326 } 1327 break; 1328 1329 case ACB_ADAPTER_TYPE_B: { 1330 struct MessageUnit_B *reg = acb->pmuB; 1331 /* 1332 ** push inbound doorbell tell iop, driver data write ok 1333 ** and wait reply on next hwinterrupt for next Qbuffer post 1334 */ 1335 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1336 } 1337 break; 1338 case ACB_ADAPTER_TYPE_C: { 1339 struct MessageUnit_C __iomem *reg = acb->pmuC; 1340 /* 1341 ** push inbound doorbell tell iop, driver data write ok 1342 ** and wait reply on next hwinterrupt for next Qbuffer post 1343 */ 1344 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1345 } 1346 break; 1347 } 1348 } 1349 1350 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1351 { 1352 struct QBUFFER __iomem *qbuffer = NULL; 1353 switch (acb->adapter_type) { 1354 1355 case ACB_ADAPTER_TYPE_A: { 1356 struct MessageUnit_A __iomem *reg = acb->pmuA; 1357 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1358 } 1359 break; 1360 1361 case ACB_ADAPTER_TYPE_B: { 1362 struct MessageUnit_B *reg = acb->pmuB; 1363 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1364 } 1365 break; 1366 case ACB_ADAPTER_TYPE_C: { 1367 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1368 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1369 } 1370 } 1371 return qbuffer; 1372 } 1373 1374 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1375 { 1376 struct QBUFFER __iomem *pqbuffer = NULL; 1377 switch (acb->adapter_type) { 1378 1379 case ACB_ADAPTER_TYPE_A: { 1380 struct MessageUnit_A __iomem *reg = acb->pmuA; 1381 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1382 } 1383 break; 1384 1385 case ACB_ADAPTER_TYPE_B: { 1386 struct MessageUnit_B *reg = acb->pmuB; 1387 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1388 } 1389 break; 1390 case ACB_ADAPTER_TYPE_C: { 1391 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 1392 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1393 } 1394 1395 } 1396 return pqbuffer; 1397 } 1398 1399 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1400 { 1401 struct QBUFFER __iomem *prbuffer; 1402 struct QBUFFER *pQbuffer; 1403 uint8_t __iomem *iop_data; 1404 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 1405 rqbuf_lastindex = acb->rqbuf_lastindex; 1406 rqbuf_firstindex = acb->rqbuf_firstindex; 1407 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1408 iop_data = (uint8_t __iomem *)prbuffer->data; 1409 iop_len = prbuffer->data_len; 1410 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1); 1411 1412 if (my_empty_len >= iop_len) 1413 { 1414 while (iop_len > 0) { 1415 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; 1416 memcpy(pQbuffer, iop_data, 1); 1417 rqbuf_lastindex++; 1418 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1419 iop_data++; 1420 iop_len--; 1421 } 1422 acb->rqbuf_lastindex = rqbuf_lastindex; 1423 arcmsr_iop_message_read(acb); 1424 } 1425 1426 else { 1427 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1428 } 1429 } 1430 1431 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1432 { 1433 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1434 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { 1435 uint8_t *pQbuffer; 1436 struct QBUFFER __iomem *pwbuffer; 1437 uint8_t __iomem *iop_data; 1438 int32_t allxfer_len = 0; 1439 1440 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1441 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1442 iop_data = (uint8_t __iomem *)pwbuffer->data; 1443 1444 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ 1445 (allxfer_len < 124)) { 1446 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; 1447 memcpy(iop_data, pQbuffer, 1); 1448 acb->wqbuf_firstindex++; 1449 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1450 iop_data++; 1451 allxfer_len++; 1452 } 1453 pwbuffer->data_len = allxfer_len; 1454 1455 arcmsr_iop_message_wrote(acb); 1456 } 1457 1458 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { 1459 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1460 } 1461 } 1462 1463 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1464 { 1465 uint32_t outbound_doorbell; 1466 struct MessageUnit_A __iomem *reg = acb->pmuA; 1467 outbound_doorbell = readl(®->outbound_doorbell); 1468 writel(outbound_doorbell, ®->outbound_doorbell); 1469 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 1470 arcmsr_iop2drv_data_wrote_handle(acb); 1471 } 1472 1473 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 1474 arcmsr_iop2drv_data_read_handle(acb); 1475 } 1476 } 1477 static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) 1478 { 1479 uint32_t outbound_doorbell; 1480 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1481 /* 1482 ******************************************************************* 1483 ** Maybe here we need to check wrqbuffer_lock is lock or not 1484 ** DOORBELL: din! don! 1485 ** check if there are any mail need to pack from firmware 1486 ******************************************************************* 1487 */ 1488 outbound_doorbell = readl(®->outbound_doorbell); 1489 writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ 1490 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 1491 arcmsr_iop2drv_data_wrote_handle(pACB); 1492 } 1493 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { 1494 arcmsr_iop2drv_data_read_handle(pACB); 1495 } 1496 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 1497 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ 1498 } 1499 return; 1500 } 1501 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1502 { 1503 uint32_t flag_ccb; 1504 struct MessageUnit_A __iomem *reg = acb->pmuA; 1505 struct ARCMSR_CDB *pARCMSR_CDB; 1506 struct CommandControlBlock *pCCB; 1507 bool error; 1508 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1509 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1510 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1511 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1512 arcmsr_drain_donequeue(acb, pCCB, error); 1513 } 1514 } 1515 1516 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) 1517 { 1518 uint32_t index; 1519 uint32_t flag_ccb; 1520 struct MessageUnit_B *reg = acb->pmuB; 1521 struct ARCMSR_CDB *pARCMSR_CDB; 1522 struct CommandControlBlock *pCCB; 1523 bool error; 1524 index = reg->doneq_index; 1525 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { 1526 writel(0, ®->done_qbuffer[index]); 1527 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1528 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1529 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1530 arcmsr_drain_donequeue(acb, pCCB, error); 1531 index++; 1532 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1533 reg->doneq_index = index; 1534 } 1535 } 1536 1537 static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) 1538 { 1539 struct MessageUnit_C *phbcmu; 1540 struct ARCMSR_CDB *arcmsr_cdb; 1541 struct CommandControlBlock *ccb; 1542 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1543 int error; 1544 1545 phbcmu = (struct MessageUnit_C *)acb->pmuC; 1546 /* areca cdb command done */ 1547 /* Use correct offset and size for syncing */ 1548 1549 while (readl(&phbcmu->host_int_status) & 1550 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ 1551 /* check if command done with no error*/ 1552 flag_ccb = readl(&phbcmu->outbound_queueport_low); 1553 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ 1554 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); 1555 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 1556 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1557 /* check if command done with no error */ 1558 arcmsr_drain_donequeue(acb, ccb, error); 1559 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 1560 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); 1561 break; 1562 } 1563 throttling++; 1564 } 1565 } 1566 /* 1567 ********************************************************************************** 1568 ** Handle a message interrupt 1569 ** 1570 ** The only message interrupt we expect is in response to a query for the current adapter config. 1571 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1572 ********************************************************************************** 1573 */ 1574 static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) 1575 { 1576 struct MessageUnit_A *reg = acb->pmuA; 1577 /*clear interrupt and message state*/ 1578 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 1579 schedule_work(&acb->arcmsr_do_message_isr_bh); 1580 } 1581 static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) 1582 { 1583 struct MessageUnit_B *reg = acb->pmuB; 1584 1585 /*clear interrupt and message state*/ 1586 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 1587 schedule_work(&acb->arcmsr_do_message_isr_bh); 1588 } 1589 /* 1590 ********************************************************************************** 1591 ** Handle a message interrupt 1592 ** 1593 ** The only message interrupt we expect is in response to a query for the 1594 ** current adapter config. 1595 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1596 ********************************************************************************** 1597 */ 1598 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) 1599 { 1600 struct MessageUnit_C *reg = acb->pmuC; 1601 /*clear interrupt and message state*/ 1602 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 1603 schedule_work(&acb->arcmsr_do_message_isr_bh); 1604 } 1605 1606 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1607 { 1608 uint32_t outbound_intstatus; 1609 struct MessageUnit_A __iomem *reg = acb->pmuA; 1610 outbound_intstatus = readl(®->outbound_intstatus) & 1611 acb->outbound_int_enable; 1612 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { 1613 return 1; 1614 } 1615 writel(outbound_intstatus, ®->outbound_intstatus); 1616 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 1617 arcmsr_hba_doorbell_isr(acb); 1618 } 1619 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 1620 arcmsr_hba_postqueue_isr(acb); 1621 } 1622 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 1623 /* messenger of "driver to iop commands" */ 1624 arcmsr_hba_message_isr(acb); 1625 } 1626 return 0; 1627 } 1628 1629 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) 1630 { 1631 uint32_t outbound_doorbell; 1632 struct MessageUnit_B *reg = acb->pmuB; 1633 outbound_doorbell = readl(reg->iop2drv_doorbell) & 1634 acb->outbound_int_enable; 1635 if (!outbound_doorbell) 1636 return 1; 1637 1638 writel(~outbound_doorbell, reg->iop2drv_doorbell); 1639 /*in case the last action of doorbell interrupt clearance is cached, 1640 this action can push HW to write down the clear bit*/ 1641 readl(reg->iop2drv_doorbell); 1642 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 1643 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1644 arcmsr_iop2drv_data_wrote_handle(acb); 1645 } 1646 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { 1647 arcmsr_iop2drv_data_read_handle(acb); 1648 } 1649 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { 1650 arcmsr_hbb_postqueue_isr(acb); 1651 } 1652 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 1653 /* messenger of "driver to iop commands" */ 1654 arcmsr_hbb_message_isr(acb); 1655 } 1656 return 0; 1657 } 1658 1659 static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) 1660 { 1661 uint32_t host_interrupt_status; 1662 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 1663 /* 1664 ********************************************* 1665 ** check outbound intstatus 1666 ********************************************* 1667 */ 1668 host_interrupt_status = readl(&phbcmu->host_int_status); 1669 if (!host_interrupt_status) { 1670 /*it must be share irq*/ 1671 return 1; 1672 } 1673 /* MU ioctl transfer doorbell interrupts*/ 1674 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { 1675 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ 1676 } 1677 /* MU post queue interrupts*/ 1678 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { 1679 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ 1680 } 1681 return 0; 1682 } 1683 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 1684 { 1685 switch (acb->adapter_type) { 1686 case ACB_ADAPTER_TYPE_A: { 1687 if (arcmsr_handle_hba_isr(acb)) { 1688 return IRQ_NONE; 1689 } 1690 } 1691 break; 1692 1693 case ACB_ADAPTER_TYPE_B: { 1694 if (arcmsr_handle_hbb_isr(acb)) { 1695 return IRQ_NONE; 1696 } 1697 } 1698 break; 1699 case ACB_ADAPTER_TYPE_C: { 1700 if (arcmsr_handle_hbc_isr(acb)) { 1701 return IRQ_NONE; 1702 } 1703 } 1704 } 1705 return IRQ_HANDLED; 1706 } 1707 1708 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 1709 { 1710 if (acb) { 1711 /* stop adapter background rebuild */ 1712 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 1713 uint32_t intmask_org; 1714 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1715 intmask_org = arcmsr_disable_outbound_ints(acb); 1716 arcmsr_stop_adapter_bgrb(acb); 1717 arcmsr_flush_adapter_cache(acb); 1718 arcmsr_enable_outbound_ints(acb, intmask_org); 1719 } 1720 } 1721 } 1722 1723 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) 1724 { 1725 int32_t wqbuf_firstindex, wqbuf_lastindex; 1726 uint8_t *pQbuffer; 1727 struct QBUFFER __iomem *pwbuffer; 1728 uint8_t __iomem *iop_data; 1729 int32_t allxfer_len = 0; 1730 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1731 iop_data = (uint8_t __iomem *)pwbuffer->data; 1732 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1733 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1734 wqbuf_firstindex = acb->wqbuf_firstindex; 1735 wqbuf_lastindex = acb->wqbuf_lastindex; 1736 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { 1737 pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; 1738 memcpy(iop_data, pQbuffer, 1); 1739 wqbuf_firstindex++; 1740 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1741 iop_data++; 1742 allxfer_len++; 1743 } 1744 acb->wqbuf_firstindex = wqbuf_firstindex; 1745 pwbuffer->data_len = allxfer_len; 1746 arcmsr_iop_message_wrote(acb); 1747 } 1748 } 1749 1750 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 1751 struct scsi_cmnd *cmd) 1752 { 1753 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 1754 int retvalue = 0, transfer_len = 0; 1755 char *buffer; 1756 struct scatterlist *sg; 1757 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | 1758 (uint32_t ) cmd->cmnd[6] << 16 | 1759 (uint32_t ) cmd->cmnd[7] << 8 | 1760 (uint32_t ) cmd->cmnd[8]; 1761 /* 4 bytes: Areca io control code */ 1762 sg = scsi_sglist(cmd); 1763 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1764 if (scsi_sg_count(cmd) > 1) { 1765 retvalue = ARCMSR_MESSAGE_FAIL; 1766 goto message_out; 1767 } 1768 transfer_len += sg->length; 1769 1770 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1771 retvalue = ARCMSR_MESSAGE_FAIL; 1772 goto message_out; 1773 } 1774 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1775 switch(controlcode) { 1776 1777 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1778 unsigned char *ver_addr; 1779 uint8_t *pQbuffer, *ptmpQbuffer; 1780 int32_t allxfer_len = 0; 1781 1782 ver_addr = kmalloc(1032, GFP_ATOMIC); 1783 if (!ver_addr) { 1784 retvalue = ARCMSR_MESSAGE_FAIL; 1785 goto message_out; 1786 } 1787 1788 ptmpQbuffer = ver_addr; 1789 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1790 && (allxfer_len < 1031)) { 1791 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1792 memcpy(ptmpQbuffer, pQbuffer, 1); 1793 acb->rqbuf_firstindex++; 1794 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1795 ptmpQbuffer++; 1796 allxfer_len++; 1797 } 1798 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1799 1800 struct QBUFFER __iomem *prbuffer; 1801 uint8_t __iomem *iop_data; 1802 int32_t iop_len; 1803 1804 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1805 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1806 iop_data = prbuffer->data; 1807 iop_len = readl(&prbuffer->data_len); 1808 while (iop_len > 0) { 1809 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); 1810 acb->rqbuf_lastindex++; 1811 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1812 iop_data++; 1813 iop_len--; 1814 } 1815 arcmsr_iop_message_read(acb); 1816 } 1817 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1818 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1819 if(acb->fw_flag == FW_DEADLOCK) { 1820 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1821 }else{ 1822 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1823 } 1824 kfree(ver_addr); 1825 } 1826 break; 1827 1828 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1829 unsigned char *ver_addr; 1830 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1831 uint8_t *pQbuffer, *ptmpuserbuffer; 1832 1833 ver_addr = kmalloc(1032, GFP_ATOMIC); 1834 if (!ver_addr) { 1835 retvalue = ARCMSR_MESSAGE_FAIL; 1836 goto message_out; 1837 } 1838 if(acb->fw_flag == FW_DEADLOCK) { 1839 pcmdmessagefld->cmdmessage.ReturnCode = 1840 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1841 }else{ 1842 pcmdmessagefld->cmdmessage.ReturnCode = 1843 ARCMSR_MESSAGE_RETURNCODE_OK; 1844 } 1845 ptmpuserbuffer = ver_addr; 1846 user_len = pcmdmessagefld->cmdmessage.Length; 1847 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1848 wqbuf_lastindex = acb->wqbuf_lastindex; 1849 wqbuf_firstindex = acb->wqbuf_firstindex; 1850 if (wqbuf_lastindex != wqbuf_firstindex) { 1851 struct SENSE_DATA *sensebuffer = 1852 (struct SENSE_DATA *)cmd->sense_buffer; 1853 arcmsr_post_ioctldata2iop(acb); 1854 /* has error report sensedata */ 1855 sensebuffer->ErrorCode = 0x70; 1856 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1857 sensebuffer->AdditionalSenseLength = 0x0A; 1858 sensebuffer->AdditionalSenseCode = 0x20; 1859 sensebuffer->Valid = 1; 1860 retvalue = ARCMSR_MESSAGE_FAIL; 1861 } else { 1862 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1863 &(ARCMSR_MAX_QBUFFER - 1); 1864 if (my_empty_len >= user_len) { 1865 while (user_len > 0) { 1866 pQbuffer = 1867 &acb->wqbuffer[acb->wqbuf_lastindex]; 1868 memcpy(pQbuffer, ptmpuserbuffer, 1); 1869 acb->wqbuf_lastindex++; 1870 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1871 ptmpuserbuffer++; 1872 user_len--; 1873 } 1874 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1875 acb->acb_flags &= 1876 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1877 arcmsr_post_ioctldata2iop(acb); 1878 } 1879 } else { 1880 /* has error report sensedata */ 1881 struct SENSE_DATA *sensebuffer = 1882 (struct SENSE_DATA *)cmd->sense_buffer; 1883 sensebuffer->ErrorCode = 0x70; 1884 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1885 sensebuffer->AdditionalSenseLength = 0x0A; 1886 sensebuffer->AdditionalSenseCode = 0x20; 1887 sensebuffer->Valid = 1; 1888 retvalue = ARCMSR_MESSAGE_FAIL; 1889 } 1890 } 1891 kfree(ver_addr); 1892 } 1893 break; 1894 1895 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1896 uint8_t *pQbuffer = acb->rqbuffer; 1897 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1898 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1899 arcmsr_iop_message_read(acb); 1900 } 1901 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1902 acb->rqbuf_firstindex = 0; 1903 acb->rqbuf_lastindex = 0; 1904 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1905 if(acb->fw_flag == FW_DEADLOCK) { 1906 pcmdmessagefld->cmdmessage.ReturnCode = 1907 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1908 }else{ 1909 pcmdmessagefld->cmdmessage.ReturnCode = 1910 ARCMSR_MESSAGE_RETURNCODE_OK; 1911 } 1912 } 1913 break; 1914 1915 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1916 uint8_t *pQbuffer = acb->wqbuffer; 1917 if(acb->fw_flag == FW_DEADLOCK) { 1918 pcmdmessagefld->cmdmessage.ReturnCode = 1919 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1920 }else{ 1921 pcmdmessagefld->cmdmessage.ReturnCode = 1922 ARCMSR_MESSAGE_RETURNCODE_OK; 1923 } 1924 1925 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1926 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1927 arcmsr_iop_message_read(acb); 1928 } 1929 acb->acb_flags |= 1930 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1931 ACB_F_MESSAGE_WQBUFFER_READED); 1932 acb->wqbuf_firstindex = 0; 1933 acb->wqbuf_lastindex = 0; 1934 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1935 } 1936 break; 1937 1938 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1939 uint8_t *pQbuffer; 1940 1941 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1942 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1943 arcmsr_iop_message_read(acb); 1944 } 1945 acb->acb_flags |= 1946 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1947 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1948 | ACB_F_MESSAGE_WQBUFFER_READED); 1949 acb->rqbuf_firstindex = 0; 1950 acb->rqbuf_lastindex = 0; 1951 acb->wqbuf_firstindex = 0; 1952 acb->wqbuf_lastindex = 0; 1953 pQbuffer = acb->rqbuffer; 1954 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1955 pQbuffer = acb->wqbuffer; 1956 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1957 if(acb->fw_flag == FW_DEADLOCK) { 1958 pcmdmessagefld->cmdmessage.ReturnCode = 1959 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1960 }else{ 1961 pcmdmessagefld->cmdmessage.ReturnCode = 1962 ARCMSR_MESSAGE_RETURNCODE_OK; 1963 } 1964 } 1965 break; 1966 1967 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1968 if(acb->fw_flag == FW_DEADLOCK) { 1969 pcmdmessagefld->cmdmessage.ReturnCode = 1970 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1971 }else{ 1972 pcmdmessagefld->cmdmessage.ReturnCode = 1973 ARCMSR_MESSAGE_RETURNCODE_3F; 1974 } 1975 break; 1976 } 1977 case ARCMSR_MESSAGE_SAY_HELLO: { 1978 int8_t *hello_string = "Hello! I am ARCMSR"; 1979 if(acb->fw_flag == FW_DEADLOCK) { 1980 pcmdmessagefld->cmdmessage.ReturnCode = 1981 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1982 }else{ 1983 pcmdmessagefld->cmdmessage.ReturnCode = 1984 ARCMSR_MESSAGE_RETURNCODE_OK; 1985 } 1986 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1987 , (int16_t)strlen(hello_string)); 1988 } 1989 break; 1990 1991 case ARCMSR_MESSAGE_SAY_GOODBYE: 1992 if(acb->fw_flag == FW_DEADLOCK) { 1993 pcmdmessagefld->cmdmessage.ReturnCode = 1994 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1995 } 1996 arcmsr_iop_parking(acb); 1997 break; 1998 1999 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 2000 if(acb->fw_flag == FW_DEADLOCK) { 2001 pcmdmessagefld->cmdmessage.ReturnCode = 2002 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2003 } 2004 arcmsr_flush_adapter_cache(acb); 2005 break; 2006 2007 default: 2008 retvalue = ARCMSR_MESSAGE_FAIL; 2009 } 2010 message_out: 2011 sg = scsi_sglist(cmd); 2012 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2013 return retvalue; 2014 } 2015 2016 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2017 { 2018 struct list_head *head = &acb->ccb_free_list; 2019 struct CommandControlBlock *ccb = NULL; 2020 unsigned long flags; 2021 spin_lock_irqsave(&acb->ccblist_lock, flags); 2022 if (!list_empty(head)) { 2023 ccb = list_entry(head->next, struct CommandControlBlock, list); 2024 list_del_init(&ccb->list); 2025 }else{ 2026 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2027 return 0; 2028 } 2029 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2030 return ccb; 2031 } 2032 2033 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2034 struct scsi_cmnd *cmd) 2035 { 2036 switch (cmd->cmnd[0]) { 2037 case INQUIRY: { 2038 unsigned char inqdata[36]; 2039 char *buffer; 2040 struct scatterlist *sg; 2041 2042 if (cmd->device->lun) { 2043 cmd->result = (DID_TIME_OUT << 16); 2044 cmd->scsi_done(cmd); 2045 return; 2046 } 2047 inqdata[0] = TYPE_PROCESSOR; 2048 /* Periph Qualifier & Periph Dev Type */ 2049 inqdata[1] = 0; 2050 /* rem media bit & Dev Type Modifier */ 2051 inqdata[2] = 0; 2052 /* ISO, ECMA, & ANSI versions */ 2053 inqdata[4] = 31; 2054 /* length of additional data */ 2055 strncpy(&inqdata[8], "Areca ", 8); 2056 /* Vendor Identification */ 2057 strncpy(&inqdata[16], "RAID controller ", 16); 2058 /* Product Identification */ 2059 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2060 2061 sg = scsi_sglist(cmd); 2062 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 2063 2064 memcpy(buffer, inqdata, sizeof(inqdata)); 2065 sg = scsi_sglist(cmd); 2066 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2067 2068 cmd->scsi_done(cmd); 2069 } 2070 break; 2071 case WRITE_BUFFER: 2072 case READ_BUFFER: { 2073 if (arcmsr_iop_message_xfer(acb, cmd)) 2074 cmd->result = (DID_ERROR << 16); 2075 cmd->scsi_done(cmd); 2076 } 2077 break; 2078 default: 2079 cmd->scsi_done(cmd); 2080 } 2081 } 2082 2083 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2084 void (* done)(struct scsi_cmnd *)) 2085 { 2086 struct Scsi_Host *host = cmd->device->host; 2087 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2088 struct CommandControlBlock *ccb; 2089 int target = cmd->device->id; 2090 int lun = cmd->device->lun; 2091 uint8_t scsicmd = cmd->cmnd[0]; 2092 cmd->scsi_done = done; 2093 cmd->host_scribble = NULL; 2094 cmd->result = 0; 2095 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2096 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2097 cmd->result = (DID_NO_CONNECT << 16); 2098 } 2099 cmd->scsi_done(cmd); 2100 return 0; 2101 } 2102 if (target == 16) { 2103 /* virtual device for iop message transfer */ 2104 arcmsr_handle_virtual_command(acb, cmd); 2105 return 0; 2106 } 2107 if (atomic_read(&acb->ccboutstandingcount) >= 2108 ARCMSR_MAX_OUTSTANDING_CMD) 2109 return SCSI_MLQUEUE_HOST_BUSY; 2110 if ((scsicmd == SCSI_CMD_ARECA_SPECIFIC)) { 2111 printk(KERN_NOTICE "Receiveing SCSI_CMD_ARECA_SPECIFIC command..\n"); 2112 return 0; 2113 } 2114 ccb = arcmsr_get_freeccb(acb); 2115 if (!ccb) 2116 return SCSI_MLQUEUE_HOST_BUSY; 2117 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2118 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2119 cmd->scsi_done(cmd); 2120 return 0; 2121 } 2122 arcmsr_post_ccb(acb, ccb); 2123 return 0; 2124 } 2125 2126 static DEF_SCSI_QCMD(arcmsr_queue_command) 2127 2128 static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb) 2129 { 2130 struct MessageUnit_A __iomem *reg = acb->pmuA; 2131 char *acb_firm_model = acb->firm_model; 2132 char *acb_firm_version = acb->firm_version; 2133 char *acb_device_map = acb->device_map; 2134 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2135 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2136 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2137 int count; 2138 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2139 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2140 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2141 miscellaneous data' timeout \n", acb->host->host_no); 2142 return false; 2143 } 2144 count = 8; 2145 while (count){ 2146 *acb_firm_model = readb(iop_firm_model); 2147 acb_firm_model++; 2148 iop_firm_model++; 2149 count--; 2150 } 2151 2152 count = 16; 2153 while (count){ 2154 *acb_firm_version = readb(iop_firm_version); 2155 acb_firm_version++; 2156 iop_firm_version++; 2157 count--; 2158 } 2159 2160 count=16; 2161 while(count){ 2162 *acb_device_map = readb(iop_device_map); 2163 acb_device_map++; 2164 iop_device_map++; 2165 count--; 2166 } 2167 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2168 acb->host->host_no, 2169 acb->firm_version, 2170 acb->firm_model); 2171 acb->signature = readl(®->message_rwbuffer[0]); 2172 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2173 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2174 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2175 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2176 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2177 return true; 2178 } 2179 static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) 2180 { 2181 struct MessageUnit_B *reg = acb->pmuB; 2182 struct pci_dev *pdev = acb->pdev; 2183 void *dma_coherent; 2184 dma_addr_t dma_coherent_handle; 2185 char *acb_firm_model = acb->firm_model; 2186 char *acb_firm_version = acb->firm_version; 2187 char *acb_device_map = acb->device_map; 2188 char __iomem *iop_firm_model; 2189 /*firm_model,15,60-67*/ 2190 char __iomem *iop_firm_version; 2191 /*firm_version,17,68-83*/ 2192 char __iomem *iop_device_map; 2193 /*firm_version,21,84-99*/ 2194 int count; 2195 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); 2196 if (!dma_coherent){ 2197 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); 2198 return false; 2199 } 2200 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; 2201 reg = (struct MessageUnit_B *)dma_coherent; 2202 acb->pmuB = reg; 2203 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); 2204 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); 2205 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); 2206 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); 2207 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); 2208 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); 2209 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); 2210 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2211 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2212 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2213 2214 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2215 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2216 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2217 miscellaneous data' timeout \n", acb->host->host_no); 2218 return false; 2219 } 2220 count = 8; 2221 while (count){ 2222 *acb_firm_model = readb(iop_firm_model); 2223 acb_firm_model++; 2224 iop_firm_model++; 2225 count--; 2226 } 2227 count = 16; 2228 while (count){ 2229 *acb_firm_version = readb(iop_firm_version); 2230 acb_firm_version++; 2231 iop_firm_version++; 2232 count--; 2233 } 2234 2235 count = 16; 2236 while(count){ 2237 *acb_device_map = readb(iop_device_map); 2238 acb_device_map++; 2239 iop_device_map++; 2240 count--; 2241 } 2242 2243 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2244 acb->host->host_no, 2245 acb->firm_version, 2246 acb->firm_model); 2247 2248 acb->signature = readl(®->message_rwbuffer[1]); 2249 /*firm_signature,1,00-03*/ 2250 acb->firm_request_len = readl(®->message_rwbuffer[2]); 2251 /*firm_request_len,1,04-07*/ 2252 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]); 2253 /*firm_numbers_queue,2,08-11*/ 2254 acb->firm_sdram_size = readl(®->message_rwbuffer[4]); 2255 /*firm_sdram_size,3,12-15*/ 2256 acb->firm_hd_channels = readl(®->message_rwbuffer[5]); 2257 /*firm_ide_channels,4,16-19*/ 2258 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2259 /*firm_ide_channels,4,16-19*/ 2260 return true; 2261 } 2262 2263 static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) 2264 { 2265 uint32_t intmask_org, Index, firmware_state = 0; 2266 struct MessageUnit_C *reg = pACB->pmuC; 2267 char *acb_firm_model = pACB->firm_model; 2268 char *acb_firm_version = pACB->firm_version; 2269 char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2270 char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2271 int count; 2272 /* disable all outbound interrupt */ 2273 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2274 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2275 /* wait firmware ready */ 2276 do { 2277 firmware_state = readl(®->outbound_msgaddr1); 2278 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2279 /* post "get config" instruction */ 2280 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2281 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2282 /* wait message ready */ 2283 for (Index = 0; Index < 2000; Index++) { 2284 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2285 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2286 break; 2287 } 2288 udelay(10); 2289 } /*max 1 seconds*/ 2290 if (Index >= 2000) { 2291 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2292 miscellaneous data' timeout \n", pACB->host->host_no); 2293 return false; 2294 } 2295 count = 8; 2296 while (count) { 2297 *acb_firm_model = readb(iop_firm_model); 2298 acb_firm_model++; 2299 iop_firm_model++; 2300 count--; 2301 } 2302 count = 16; 2303 while (count) { 2304 *acb_firm_version = readb(iop_firm_version); 2305 acb_firm_version++; 2306 iop_firm_version++; 2307 count--; 2308 } 2309 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2310 pACB->host->host_no, 2311 pACB->firm_version, 2312 pACB->firm_model); 2313 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2314 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2315 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2316 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2317 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2318 /*all interrupt service will be enable at arcmsr_iop_init*/ 2319 return true; 2320 } 2321 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2322 { 2323 if (acb->adapter_type == ACB_ADAPTER_TYPE_A) 2324 return arcmsr_get_hba_config(acb); 2325 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B) 2326 return arcmsr_get_hbb_config(acb); 2327 else 2328 return arcmsr_get_hbc_config(acb); 2329 } 2330 2331 static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 2332 struct CommandControlBlock *poll_ccb) 2333 { 2334 struct MessageUnit_A __iomem *reg = acb->pmuA; 2335 struct CommandControlBlock *ccb; 2336 struct ARCMSR_CDB *arcmsr_cdb; 2337 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2338 int rtn; 2339 bool error; 2340 polling_hba_ccb_retry: 2341 poll_count++; 2342 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2343 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2344 while (1) { 2345 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2346 if (poll_ccb_done){ 2347 rtn = SUCCESS; 2348 break; 2349 }else { 2350 msleep(25); 2351 if (poll_count > 100){ 2352 rtn = FAILED; 2353 break; 2354 } 2355 goto polling_hba_ccb_retry; 2356 } 2357 } 2358 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2359 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2360 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2361 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2362 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2363 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2364 " poll command abort successfully \n" 2365 , acb->host->host_no 2366 , ccb->pcmd->device->id 2367 , ccb->pcmd->device->lun 2368 , ccb); 2369 ccb->pcmd->result = DID_ABORT << 16; 2370 arcmsr_ccb_complete(ccb); 2371 continue; 2372 } 2373 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2374 " command done ccb = '0x%p'" 2375 "ccboutstandingcount = %d \n" 2376 , acb->host->host_no 2377 , ccb 2378 , atomic_read(&acb->ccboutstandingcount)); 2379 continue; 2380 } 2381 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2382 arcmsr_report_ccb_state(acb, ccb, error); 2383 } 2384 return rtn; 2385 } 2386 2387 static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 2388 struct CommandControlBlock *poll_ccb) 2389 { 2390 struct MessageUnit_B *reg = acb->pmuB; 2391 struct ARCMSR_CDB *arcmsr_cdb; 2392 struct CommandControlBlock *ccb; 2393 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2394 int index, rtn; 2395 bool error; 2396 polling_hbb_ccb_retry: 2397 poll_count++; 2398 /* clear doorbell interrupt */ 2399 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2400 while(1){ 2401 index = reg->doneq_index; 2402 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { 2403 if (poll_ccb_done){ 2404 rtn = SUCCESS; 2405 break; 2406 }else { 2407 msleep(25); 2408 if (poll_count > 100){ 2409 rtn = FAILED; 2410 break; 2411 } 2412 goto polling_hbb_ccb_retry; 2413 } 2414 } 2415 writel(0, ®->done_qbuffer[index]); 2416 index++; 2417 /*if last index number set it to 0 */ 2418 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2419 reg->doneq_index = index; 2420 /* check if command done with no error*/ 2421 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2422 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2423 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2424 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2425 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2426 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2427 " poll command abort successfully \n" 2428 ,acb->host->host_no 2429 ,ccb->pcmd->device->id 2430 ,ccb->pcmd->device->lun 2431 ,ccb); 2432 ccb->pcmd->result = DID_ABORT << 16; 2433 arcmsr_ccb_complete(ccb); 2434 continue; 2435 } 2436 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2437 " command done ccb = '0x%p'" 2438 "ccboutstandingcount = %d \n" 2439 , acb->host->host_no 2440 , ccb 2441 , atomic_read(&acb->ccboutstandingcount)); 2442 continue; 2443 } 2444 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2445 arcmsr_report_ccb_state(acb, ccb, error); 2446 } 2447 return rtn; 2448 } 2449 2450 static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) 2451 { 2452 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2453 uint32_t flag_ccb, ccb_cdb_phy; 2454 struct ARCMSR_CDB *arcmsr_cdb; 2455 bool error; 2456 struct CommandControlBlock *pCCB; 2457 uint32_t poll_ccb_done = 0, poll_count = 0; 2458 int rtn; 2459 polling_hbc_ccb_retry: 2460 poll_count++; 2461 while (1) { 2462 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 2463 if (poll_ccb_done) { 2464 rtn = SUCCESS; 2465 break; 2466 } else { 2467 msleep(25); 2468 if (poll_count > 100) { 2469 rtn = FAILED; 2470 break; 2471 } 2472 goto polling_hbc_ccb_retry; 2473 } 2474 } 2475 flag_ccb = readl(®->outbound_queueport_low); 2476 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2477 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 2478 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2479 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0; 2480 /* check ifcommand done with no error*/ 2481 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 2482 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 2483 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2484 " poll command abort successfully \n" 2485 , acb->host->host_no 2486 , pCCB->pcmd->device->id 2487 , pCCB->pcmd->device->lun 2488 , pCCB); 2489 pCCB->pcmd->result = DID_ABORT << 16; 2490 arcmsr_ccb_complete(pCCB); 2491 continue; 2492 } 2493 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2494 " command done ccb = '0x%p'" 2495 "ccboutstandingcount = %d \n" 2496 , acb->host->host_no 2497 , pCCB 2498 , atomic_read(&acb->ccboutstandingcount)); 2499 continue; 2500 } 2501 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 2502 arcmsr_report_ccb_state(acb, pCCB, error); 2503 } 2504 return rtn; 2505 } 2506 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 2507 struct CommandControlBlock *poll_ccb) 2508 { 2509 int rtn = 0; 2510 switch (acb->adapter_type) { 2511 2512 case ACB_ADAPTER_TYPE_A: { 2513 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb); 2514 } 2515 break; 2516 2517 case ACB_ADAPTER_TYPE_B: { 2518 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb); 2519 } 2520 break; 2521 case ACB_ADAPTER_TYPE_C: { 2522 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb); 2523 } 2524 } 2525 return rtn; 2526 } 2527 2528 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 2529 { 2530 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 2531 dma_addr_t dma_coherent_handle; 2532 /* 2533 ******************************************************************** 2534 ** here we need to tell iop 331 our freeccb.HighPart 2535 ** if freeccb.HighPart is not zero 2536 ******************************************************************** 2537 */ 2538 dma_coherent_handle = acb->dma_coherent_handle; 2539 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 2540 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 2541 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 2542 /* 2543 *********************************************************************** 2544 ** if adapter type B, set window of "post command Q" 2545 *********************************************************************** 2546 */ 2547 switch (acb->adapter_type) { 2548 2549 case ACB_ADAPTER_TYPE_A: { 2550 if (cdb_phyaddr_hi32 != 0) { 2551 struct MessageUnit_A __iomem *reg = acb->pmuA; 2552 uint32_t intmask_org; 2553 intmask_org = arcmsr_disable_outbound_ints(acb); 2554 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 2555 ®->message_rwbuffer[0]); 2556 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 2557 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 2558 ®->inbound_msgaddr0); 2559 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2560 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 2561 part physical address timeout\n", 2562 acb->host->host_no); 2563 return 1; 2564 } 2565 arcmsr_enable_outbound_ints(acb, intmask_org); 2566 } 2567 } 2568 break; 2569 2570 case ACB_ADAPTER_TYPE_B: { 2571 unsigned long post_queue_phyaddr; 2572 uint32_t __iomem *rwbuffer; 2573 2574 struct MessageUnit_B *reg = acb->pmuB; 2575 uint32_t intmask_org; 2576 intmask_org = arcmsr_disable_outbound_ints(acb); 2577 reg->postq_index = 0; 2578 reg->doneq_index = 0; 2579 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 2580 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2581 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 2582 acb->host->host_no); 2583 return 1; 2584 } 2585 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; 2586 rwbuffer = reg->message_rwbuffer; 2587 /* driver "set config" signature */ 2588 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 2589 /* normal should be zero */ 2590 writel(cdb_phyaddr_hi32, rwbuffer++); 2591 /* postQ size (256 + 8)*4 */ 2592 writel(post_queue_phyaddr, rwbuffer++); 2593 /* doneQ size (256 + 8)*4 */ 2594 writel(post_queue_phyaddr + 1056, rwbuffer++); 2595 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 2596 writel(1056, rwbuffer); 2597 2598 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 2599 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2600 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2601 timeout \n",acb->host->host_no); 2602 return 1; 2603 } 2604 arcmsr_hbb_enable_driver_mode(acb); 2605 arcmsr_enable_outbound_ints(acb, intmask_org); 2606 } 2607 break; 2608 case ACB_ADAPTER_TYPE_C: { 2609 if (cdb_phyaddr_hi32 != 0) { 2610 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2611 2612 if (cdb_phyaddr_hi32 != 0) { 2613 unsigned char Retries = 0x00; 2614 do { 2615 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32); 2616 } while (Retries++ < 100); 2617 } 2618 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 2619 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 2620 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 2621 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2622 if (!arcmsr_hbc_wait_msgint_ready(acb)) { 2623 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2624 timeout \n", acb->host->host_no); 2625 return 1; 2626 } 2627 } 2628 } 2629 } 2630 return 0; 2631 } 2632 2633 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 2634 { 2635 uint32_t firmware_state = 0; 2636 switch (acb->adapter_type) { 2637 2638 case ACB_ADAPTER_TYPE_A: { 2639 struct MessageUnit_A __iomem *reg = acb->pmuA; 2640 do { 2641 firmware_state = readl(®->outbound_msgaddr1); 2642 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 2643 } 2644 break; 2645 2646 case ACB_ADAPTER_TYPE_B: { 2647 struct MessageUnit_B *reg = acb->pmuB; 2648 do { 2649 firmware_state = readl(reg->iop2drv_doorbell); 2650 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2651 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2652 } 2653 break; 2654 case ACB_ADAPTER_TYPE_C: { 2655 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2656 do { 2657 firmware_state = readl(®->outbound_msgaddr1); 2658 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2659 } 2660 } 2661 } 2662 2663 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) 2664 { 2665 struct MessageUnit_A __iomem *reg = acb->pmuA; 2666 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2667 return; 2668 } else { 2669 acb->fw_flag = FW_NORMAL; 2670 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 2671 atomic_set(&acb->rq_map_token, 16); 2672 } 2673 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2674 if (atomic_dec_and_test(&acb->rq_map_token)) 2675 return; 2676 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2677 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2678 } 2679 return; 2680 } 2681 2682 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) 2683 { 2684 struct MessageUnit_B __iomem *reg = acb->pmuB; 2685 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2686 return; 2687 } else { 2688 acb->fw_flag = FW_NORMAL; 2689 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2690 atomic_set(&acb->rq_map_token,16); 2691 } 2692 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2693 if(atomic_dec_and_test(&acb->rq_map_token)) 2694 return; 2695 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2696 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2697 } 2698 return; 2699 } 2700 2701 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) 2702 { 2703 struct MessageUnit_C __iomem *reg = acb->pmuC; 2704 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 2705 return; 2706 } else { 2707 acb->fw_flag = FW_NORMAL; 2708 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2709 atomic_set(&acb->rq_map_token, 16); 2710 } 2711 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2712 if (atomic_dec_and_test(&acb->rq_map_token)) 2713 return; 2714 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2715 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2716 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2717 } 2718 return; 2719 } 2720 2721 static void arcmsr_request_device_map(unsigned long pacb) 2722 { 2723 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 2724 switch (acb->adapter_type) { 2725 case ACB_ADAPTER_TYPE_A: { 2726 arcmsr_request_hba_device_map(acb); 2727 } 2728 break; 2729 case ACB_ADAPTER_TYPE_B: { 2730 arcmsr_request_hbb_device_map(acb); 2731 } 2732 break; 2733 case ACB_ADAPTER_TYPE_C: { 2734 arcmsr_request_hbc_device_map(acb); 2735 } 2736 } 2737 } 2738 2739 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) 2740 { 2741 struct MessageUnit_A __iomem *reg = acb->pmuA; 2742 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2743 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 2744 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2745 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2746 rebulid' timeout \n", acb->host->host_no); 2747 } 2748 } 2749 2750 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) 2751 { 2752 struct MessageUnit_B *reg = acb->pmuB; 2753 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2754 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 2755 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2756 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2757 rebulid' timeout \n",acb->host->host_no); 2758 } 2759 } 2760 2761 static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) 2762 { 2763 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 2764 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2765 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 2766 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 2767 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 2768 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2769 rebulid' timeout \n", pACB->host->host_no); 2770 } 2771 return; 2772 } 2773 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 2774 { 2775 switch (acb->adapter_type) { 2776 case ACB_ADAPTER_TYPE_A: 2777 arcmsr_start_hba_bgrb(acb); 2778 break; 2779 case ACB_ADAPTER_TYPE_B: 2780 arcmsr_start_hbb_bgrb(acb); 2781 break; 2782 case ACB_ADAPTER_TYPE_C: 2783 arcmsr_start_hbc_bgrb(acb); 2784 } 2785 } 2786 2787 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 2788 { 2789 switch (acb->adapter_type) { 2790 case ACB_ADAPTER_TYPE_A: { 2791 struct MessageUnit_A __iomem *reg = acb->pmuA; 2792 uint32_t outbound_doorbell; 2793 /* empty doorbell Qbuffer if door bell ringed */ 2794 outbound_doorbell = readl(®->outbound_doorbell); 2795 /*clear doorbell interrupt */ 2796 writel(outbound_doorbell, ®->outbound_doorbell); 2797 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2798 } 2799 break; 2800 2801 case ACB_ADAPTER_TYPE_B: { 2802 struct MessageUnit_B *reg = acb->pmuB; 2803 /*clear interrupt and message state*/ 2804 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2805 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 2806 /* let IOP know data has been read */ 2807 } 2808 break; 2809 case ACB_ADAPTER_TYPE_C: { 2810 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2811 uint32_t outbound_doorbell; 2812 /* empty doorbell Qbuffer if door bell ringed */ 2813 outbound_doorbell = readl(®->outbound_doorbell); 2814 writel(outbound_doorbell, ®->outbound_doorbell_clear); 2815 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 2816 } 2817 } 2818 } 2819 2820 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 2821 { 2822 switch (acb->adapter_type) { 2823 case ACB_ADAPTER_TYPE_A: 2824 return; 2825 case ACB_ADAPTER_TYPE_B: 2826 { 2827 struct MessageUnit_B *reg = acb->pmuB; 2828 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 2829 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2830 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2831 return; 2832 } 2833 } 2834 break; 2835 case ACB_ADAPTER_TYPE_C: 2836 return; 2837 } 2838 return; 2839 } 2840 2841 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 2842 { 2843 uint8_t value[64]; 2844 int i, count = 0; 2845 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 2846 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 2847 u32 temp = 0; 2848 /* backup pci config data */ 2849 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 2850 for (i = 0; i < 64; i++) { 2851 pci_read_config_byte(acb->pdev, i, &value[i]); 2852 } 2853 /* hardware reset signal */ 2854 if ((acb->dev_id == 0x1680)) { 2855 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 2856 } else if ((acb->dev_id == 0x1880)) { 2857 do { 2858 count++; 2859 writel(0xF, &pmuC->write_sequence); 2860 writel(0x4, &pmuC->write_sequence); 2861 writel(0xB, &pmuC->write_sequence); 2862 writel(0x2, &pmuC->write_sequence); 2863 writel(0x7, &pmuC->write_sequence); 2864 writel(0xD, &pmuC->write_sequence); 2865 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 2866 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 2867 } else { 2868 pci_write_config_byte(acb->pdev, 0x84, 0x20); 2869 } 2870 msleep(2000); 2871 /* write back pci config data */ 2872 for (i = 0; i < 64; i++) { 2873 pci_write_config_byte(acb->pdev, i, value[i]); 2874 } 2875 msleep(1000); 2876 return; 2877 } 2878 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2879 { 2880 uint32_t intmask_org; 2881 /* disable all outbound interrupt */ 2882 intmask_org = arcmsr_disable_outbound_ints(acb); 2883 arcmsr_wait_firmware_ready(acb); 2884 arcmsr_iop_confirm(acb); 2885 /*start background rebuild*/ 2886 arcmsr_start_adapter_bgrb(acb); 2887 /* empty doorbell Qbuffer if door bell ringed */ 2888 arcmsr_clear_doorbell_queue_buffer(acb); 2889 arcmsr_enable_eoi_mode(acb); 2890 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2891 arcmsr_enable_outbound_ints(acb, intmask_org); 2892 acb->acb_flags |= ACB_F_IOP_INITED; 2893 } 2894 2895 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 2896 { 2897 struct CommandControlBlock *ccb; 2898 uint32_t intmask_org; 2899 uint8_t rtnval = 0x00; 2900 int i = 0; 2901 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2902 /* disable all outbound interrupt */ 2903 intmask_org = arcmsr_disable_outbound_ints(acb); 2904 /* talk to iop 331 outstanding command aborted */ 2905 rtnval = arcmsr_abort_allcmd(acb); 2906 /* clear all outbound posted Q */ 2907 arcmsr_done4abort_postqueue(acb); 2908 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2909 ccb = acb->pccb_pool[i]; 2910 if (ccb->startdone == ARCMSR_CCB_START) { 2911 arcmsr_ccb_complete(ccb); 2912 } 2913 } 2914 atomic_set(&acb->ccboutstandingcount, 0); 2915 /* enable all outbound interrupt */ 2916 arcmsr_enable_outbound_ints(acb, intmask_org); 2917 return rtnval; 2918 } 2919 return rtnval; 2920 } 2921 2922 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 2923 { 2924 struct AdapterControlBlock *acb = 2925 (struct AdapterControlBlock *)cmd->device->host->hostdata; 2926 uint32_t intmask_org, outbound_doorbell; 2927 int retry_count = 0; 2928 int rtn = FAILED; 2929 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 2930 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 2931 acb->num_resets++; 2932 2933 switch(acb->adapter_type){ 2934 case ACB_ADAPTER_TYPE_A:{ 2935 if (acb->acb_flags & ACB_F_BUS_RESET){ 2936 long timeout; 2937 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 2938 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 2939 if (timeout) { 2940 return SUCCESS; 2941 } 2942 } 2943 acb->acb_flags |= ACB_F_BUS_RESET; 2944 if (!arcmsr_iop_reset(acb)) { 2945 struct MessageUnit_A __iomem *reg; 2946 reg = acb->pmuA; 2947 arcmsr_hardware_reset(acb); 2948 acb->acb_flags &= ~ACB_F_IOP_INITED; 2949 sleep_again: 2950 arcmsr_sleep_for_bus_reset(cmd); 2951 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 2952 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 2953 if (retry_count > retrycount) { 2954 acb->fw_flag = FW_DEADLOCK; 2955 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 2956 return FAILED; 2957 } 2958 retry_count++; 2959 goto sleep_again; 2960 } 2961 acb->acb_flags |= ACB_F_IOP_INITED; 2962 /* disable all outbound interrupt */ 2963 intmask_org = arcmsr_disable_outbound_ints(acb); 2964 arcmsr_get_firmware_spec(acb); 2965 arcmsr_start_adapter_bgrb(acb); 2966 /* clear Qbuffer if door bell ringed */ 2967 outbound_doorbell = readl(®->outbound_doorbell); 2968 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 2969 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2970 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2971 arcmsr_enable_outbound_ints(acb, intmask_org); 2972 atomic_set(&acb->rq_map_token, 16); 2973 atomic_set(&acb->ante_token_value, 16); 2974 acb->fw_flag = FW_NORMAL; 2975 init_timer(&acb->eternal_timer); 2976 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 2977 acb->eternal_timer.data = (unsigned long) acb; 2978 acb->eternal_timer.function = &arcmsr_request_device_map; 2979 add_timer(&acb->eternal_timer); 2980 acb->acb_flags &= ~ACB_F_BUS_RESET; 2981 rtn = SUCCESS; 2982 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 2983 } else { 2984 acb->acb_flags &= ~ACB_F_BUS_RESET; 2985 if (atomic_read(&acb->rq_map_token) == 0) { 2986 atomic_set(&acb->rq_map_token, 16); 2987 atomic_set(&acb->ante_token_value, 16); 2988 acb->fw_flag = FW_NORMAL; 2989 init_timer(&acb->eternal_timer); 2990 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 2991 acb->eternal_timer.data = (unsigned long) acb; 2992 acb->eternal_timer.function = &arcmsr_request_device_map; 2993 add_timer(&acb->eternal_timer); 2994 } else { 2995 atomic_set(&acb->rq_map_token, 16); 2996 atomic_set(&acb->ante_token_value, 16); 2997 acb->fw_flag = FW_NORMAL; 2998 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 2999 } 3000 rtn = SUCCESS; 3001 } 3002 break; 3003 } 3004 case ACB_ADAPTER_TYPE_B:{ 3005 acb->acb_flags |= ACB_F_BUS_RESET; 3006 if (!arcmsr_iop_reset(acb)) { 3007 acb->acb_flags &= ~ACB_F_BUS_RESET; 3008 rtn = FAILED; 3009 } else { 3010 acb->acb_flags &= ~ACB_F_BUS_RESET; 3011 if (atomic_read(&acb->rq_map_token) == 0) { 3012 atomic_set(&acb->rq_map_token, 16); 3013 atomic_set(&acb->ante_token_value, 16); 3014 acb->fw_flag = FW_NORMAL; 3015 init_timer(&acb->eternal_timer); 3016 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 3017 acb->eternal_timer.data = (unsigned long) acb; 3018 acb->eternal_timer.function = &arcmsr_request_device_map; 3019 add_timer(&acb->eternal_timer); 3020 } else { 3021 atomic_set(&acb->rq_map_token, 16); 3022 atomic_set(&acb->ante_token_value, 16); 3023 acb->fw_flag = FW_NORMAL; 3024 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3025 } 3026 rtn = SUCCESS; 3027 } 3028 break; 3029 } 3030 case ACB_ADAPTER_TYPE_C:{ 3031 if (acb->acb_flags & ACB_F_BUS_RESET) { 3032 long timeout; 3033 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3034 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3035 if (timeout) { 3036 return SUCCESS; 3037 } 3038 } 3039 acb->acb_flags |= ACB_F_BUS_RESET; 3040 if (!arcmsr_iop_reset(acb)) { 3041 struct MessageUnit_C __iomem *reg; 3042 reg = acb->pmuC; 3043 arcmsr_hardware_reset(acb); 3044 acb->acb_flags &= ~ACB_F_IOP_INITED; 3045 sleep: 3046 arcmsr_sleep_for_bus_reset(cmd); 3047 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3048 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 3049 if (retry_count > retrycount) { 3050 acb->fw_flag = FW_DEADLOCK; 3051 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 3052 return FAILED; 3053 } 3054 retry_count++; 3055 goto sleep; 3056 } 3057 acb->acb_flags |= ACB_F_IOP_INITED; 3058 /* disable all outbound interrupt */ 3059 intmask_org = arcmsr_disable_outbound_ints(acb); 3060 arcmsr_get_firmware_spec(acb); 3061 arcmsr_start_adapter_bgrb(acb); 3062 /* clear Qbuffer if door bell ringed */ 3063 outbound_doorbell = readl(®->outbound_doorbell); 3064 writel(outbound_doorbell, ®->outbound_doorbell_clear); /*clear interrupt */ 3065 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3066 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3067 arcmsr_enable_outbound_ints(acb, intmask_org); 3068 atomic_set(&acb->rq_map_token, 16); 3069 atomic_set(&acb->ante_token_value, 16); 3070 acb->fw_flag = FW_NORMAL; 3071 init_timer(&acb->eternal_timer); 3072 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 3073 acb->eternal_timer.data = (unsigned long) acb; 3074 acb->eternal_timer.function = &arcmsr_request_device_map; 3075 add_timer(&acb->eternal_timer); 3076 acb->acb_flags &= ~ACB_F_BUS_RESET; 3077 rtn = SUCCESS; 3078 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3079 } else { 3080 acb->acb_flags &= ~ACB_F_BUS_RESET; 3081 if (atomic_read(&acb->rq_map_token) == 0) { 3082 atomic_set(&acb->rq_map_token, 16); 3083 atomic_set(&acb->ante_token_value, 16); 3084 acb->fw_flag = FW_NORMAL; 3085 init_timer(&acb->eternal_timer); 3086 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); 3087 acb->eternal_timer.data = (unsigned long) acb; 3088 acb->eternal_timer.function = &arcmsr_request_device_map; 3089 add_timer(&acb->eternal_timer); 3090 } else { 3091 atomic_set(&acb->rq_map_token, 16); 3092 atomic_set(&acb->ante_token_value, 16); 3093 acb->fw_flag = FW_NORMAL; 3094 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3095 } 3096 rtn = SUCCESS; 3097 } 3098 break; 3099 } 3100 } 3101 return rtn; 3102 } 3103 3104 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3105 struct CommandControlBlock *ccb) 3106 { 3107 int rtn; 3108 rtn = arcmsr_polling_ccbdone(acb, ccb); 3109 return rtn; 3110 } 3111 3112 static int arcmsr_abort(struct scsi_cmnd *cmd) 3113 { 3114 struct AdapterControlBlock *acb = 3115 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3116 int i = 0; 3117 int rtn = FAILED; 3118 printk(KERN_NOTICE 3119 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 3120 acb->host->host_no, cmd->device->id, cmd->device->lun); 3121 acb->acb_flags |= ACB_F_ABORT; 3122 acb->num_aborts++; 3123 /* 3124 ************************************************ 3125 ** the all interrupt service routine is locked 3126 ** we need to handle it as soon as possible and exit 3127 ************************************************ 3128 */ 3129 if (!atomic_read(&acb->ccboutstandingcount)) 3130 return rtn; 3131 3132 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3133 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3134 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3135 ccb->startdone = ARCMSR_CCB_ABORTED; 3136 rtn = arcmsr_abort_one_cmd(acb, ccb); 3137 break; 3138 } 3139 } 3140 acb->acb_flags &= ~ACB_F_ABORT; 3141 return rtn; 3142 } 3143 3144 static const char *arcmsr_info(struct Scsi_Host *host) 3145 { 3146 struct AdapterControlBlock *acb = 3147 (struct AdapterControlBlock *) host->hostdata; 3148 static char buf[256]; 3149 char *type; 3150 int raid6 = 1; 3151 switch (acb->pdev->device) { 3152 case PCI_DEVICE_ID_ARECA_1110: 3153 case PCI_DEVICE_ID_ARECA_1200: 3154 case PCI_DEVICE_ID_ARECA_1202: 3155 case PCI_DEVICE_ID_ARECA_1210: 3156 raid6 = 0; 3157 /*FALLTHRU*/ 3158 case PCI_DEVICE_ID_ARECA_1120: 3159 case PCI_DEVICE_ID_ARECA_1130: 3160 case PCI_DEVICE_ID_ARECA_1160: 3161 case PCI_DEVICE_ID_ARECA_1170: 3162 case PCI_DEVICE_ID_ARECA_1201: 3163 case PCI_DEVICE_ID_ARECA_1220: 3164 case PCI_DEVICE_ID_ARECA_1230: 3165 case PCI_DEVICE_ID_ARECA_1260: 3166 case PCI_DEVICE_ID_ARECA_1270: 3167 case PCI_DEVICE_ID_ARECA_1280: 3168 type = "SATA"; 3169 break; 3170 case PCI_DEVICE_ID_ARECA_1380: 3171 case PCI_DEVICE_ID_ARECA_1381: 3172 case PCI_DEVICE_ID_ARECA_1680: 3173 case PCI_DEVICE_ID_ARECA_1681: 3174 case PCI_DEVICE_ID_ARECA_1880: 3175 type = "SAS"; 3176 break; 3177 default: 3178 type = "X-TYPE"; 3179 break; 3180 } 3181 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", 3182 type, raid6 ? "( RAID6 capable)" : "", 3183 ARCMSR_DRIVER_VERSION); 3184 return buf; 3185 } 3186