1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Nick Cheng 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA RAID Host adapter 8 ******************************************************************************* 9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved 10 ** 11 ** Web site: www.areca.com.tw 12 ** E-mail: support@areca.com.tw 13 ** 14 ** This program is free software; you can redistribute it and/or modify 15 ** it under the terms of the GNU General Public License version 2 as 16 ** published by the Free Software Foundation. 17 ** This program is distributed in the hope that it will be useful, 18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 ** GNU General Public License for more details. 21 ******************************************************************************* 22 ** Redistribution and use in source and binary forms, with or without 23 ** modification, are permitted provided that the following conditions 24 ** are met: 25 ** 1. Redistributions of source code must retain the above copyright 26 ** notice, this list of conditions and the following disclaimer. 27 ** 2. Redistributions in binary form must reproduce the above copyright 28 ** notice, this list of conditions and the following disclaimer in the 29 ** documentation and/or other materials provided with the distribution. 30 ** 3. The name of the author may not be used to endorse or promote products 31 ** derived from this software without specific prior written permission. 32 ** 33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43 ******************************************************************************* 44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 46 ******************************************************************************* 47 */ 48 #include <linux/module.h> 49 #include <linux/reboot.h> 50 #include <linux/spinlock.h> 51 #include <linux/pci_ids.h> 52 #include <linux/interrupt.h> 53 #include <linux/moduleparam.h> 54 #include <linux/errno.h> 55 #include <linux/types.h> 56 #include <linux/delay.h> 57 #include <linux/dma-mapping.h> 58 #include <linux/timer.h> 59 #include <linux/slab.h> 60 #include <linux/pci.h> 61 #include <linux/aer.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <asm/system.h> 65 #include <asm/uaccess.h> 66 #include <scsi/scsi_host.h> 67 #include <scsi/scsi.h> 68 #include <scsi/scsi_cmnd.h> 69 #include <scsi/scsi_tcq.h> 70 #include <scsi/scsi_device.h> 71 #include <scsi/scsi_transport.h> 72 #include <scsi/scsicam.h> 73 #include "arcmsr.h" 74 MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>"); 75 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); 76 MODULE_LICENSE("Dual BSD/GPL"); 77 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 78 79 #define ARCMSR_SLEEPTIME 10 80 #define ARCMSR_RETRYCOUNT 12 81 82 wait_queue_head_t wait_q; 83 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 84 struct scsi_cmnd *cmd); 85 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 86 static int arcmsr_abort(struct scsi_cmnd *); 87 static int arcmsr_bus_reset(struct scsi_cmnd *); 88 static int arcmsr_bios_param(struct scsi_device *sdev, 89 struct block_device *bdev, sector_t capacity, int *info); 90 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 91 static int arcmsr_probe(struct pci_dev *pdev, 92 const struct pci_device_id *id); 93 static void arcmsr_remove(struct pci_dev *pdev); 94 static void arcmsr_shutdown(struct pci_dev *pdev); 95 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 96 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 97 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 98 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 99 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); 100 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); 101 static void arcmsr_request_device_map(unsigned long pacb); 102 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); 103 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); 104 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); 105 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 106 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 107 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 108 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); 109 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 110 static const char *arcmsr_info(struct Scsi_Host *); 111 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 112 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, 113 int queue_depth, int reason) 114 { 115 if (reason != SCSI_QDEPTH_DEFAULT) 116 return -EOPNOTSUPP; 117 118 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 119 queue_depth = ARCMSR_MAX_CMD_PERLUN; 120 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); 121 return queue_depth; 122 } 123 124 static struct scsi_host_template arcmsr_scsi_host_template = { 125 .module = THIS_MODULE, 126 .name = "ARCMSR ARECA SATA/SAS RAID Controller" 127 ARCMSR_DRIVER_VERSION, 128 .info = arcmsr_info, 129 .queuecommand = arcmsr_queue_command, 130 .eh_abort_handler = arcmsr_abort, 131 .eh_bus_reset_handler = arcmsr_bus_reset, 132 .bios_param = arcmsr_bios_param, 133 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 134 .can_queue = ARCMSR_MAX_FREECCB_NUM, 135 .this_id = ARCMSR_SCSI_INITIATOR_ID, 136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 139 .use_clustering = ENABLE_CLUSTERING, 140 .shost_attrs = arcmsr_host_attrs, 141 }; 142 static struct pci_device_id arcmsr_device_id_table[] = { 143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 160 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, 162 {0, 0}, /* Terminating entry */ 163 }; 164 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 165 static struct pci_driver arcmsr_pci_driver = { 166 .name = "arcmsr", 167 .id_table = arcmsr_device_id_table, 168 .probe = arcmsr_probe, 169 .remove = arcmsr_remove, 170 .shutdown = arcmsr_shutdown, 171 }; 172 /* 173 **************************************************************************** 174 **************************************************************************** 175 */ 176 177 static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) 178 { 179 switch (acb->adapter_type) { 180 case ACB_ADAPTER_TYPE_A: 181 case ACB_ADAPTER_TYPE_C: 182 break; 183 case ACB_ADAPTER_TYPE_B:{ 184 dma_free_coherent(&acb->pdev->dev, 185 sizeof(struct MessageUnit_B), 186 acb->pmuB, acb->dma_coherent_handle_hbb_mu); 187 } 188 } 189 } 190 191 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 192 { 193 struct pci_dev *pdev = acb->pdev; 194 switch (acb->adapter_type){ 195 case ACB_ADAPTER_TYPE_A:{ 196 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 197 if (!acb->pmuA) { 198 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 199 return false; 200 } 201 break; 202 } 203 case ACB_ADAPTER_TYPE_B:{ 204 void __iomem *mem_base0, *mem_base1; 205 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 206 if (!mem_base0) { 207 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 208 return false; 209 } 210 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 211 if (!mem_base1) { 212 iounmap(mem_base0); 213 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 214 return false; 215 } 216 acb->mem_base0 = mem_base0; 217 acb->mem_base1 = mem_base1; 218 break; 219 } 220 case ACB_ADAPTER_TYPE_C:{ 221 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 222 if (!acb->pmuC) { 223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 224 return false; 225 } 226 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 227 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 228 return true; 229 } 230 break; 231 } 232 } 233 return true; 234 } 235 236 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 237 { 238 switch (acb->adapter_type) { 239 case ACB_ADAPTER_TYPE_A:{ 240 iounmap(acb->pmuA); 241 } 242 break; 243 case ACB_ADAPTER_TYPE_B:{ 244 iounmap(acb->mem_base0); 245 iounmap(acb->mem_base1); 246 } 247 248 break; 249 case ACB_ADAPTER_TYPE_C:{ 250 iounmap(acb->pmuC); 251 } 252 } 253 } 254 255 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 256 { 257 irqreturn_t handle_state; 258 struct AdapterControlBlock *acb = dev_id; 259 260 handle_state = arcmsr_interrupt(acb); 261 return handle_state; 262 } 263 264 static int arcmsr_bios_param(struct scsi_device *sdev, 265 struct block_device *bdev, sector_t capacity, int *geom) 266 { 267 int ret, heads, sectors, cylinders, total_capacity; 268 unsigned char *buffer;/* return copy of block device's partition table */ 269 270 buffer = scsi_bios_ptable(bdev); 271 if (buffer) { 272 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 273 kfree(buffer); 274 if (ret != -1) 275 return ret; 276 } 277 total_capacity = capacity; 278 heads = 64; 279 sectors = 32; 280 cylinders = total_capacity / (heads * sectors); 281 if (cylinders > 1024) { 282 heads = 255; 283 sectors = 63; 284 cylinders = total_capacity / (heads * sectors); 285 } 286 geom[0] = heads; 287 geom[1] = sectors; 288 geom[2] = cylinders; 289 return 0; 290 } 291 292 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) 293 { 294 struct pci_dev *pdev = acb->pdev; 295 u16 dev_id; 296 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 297 acb->dev_id = dev_id; 298 switch (dev_id) { 299 case 0x1880: { 300 acb->adapter_type = ACB_ADAPTER_TYPE_C; 301 } 302 break; 303 case 0x1201: { 304 acb->adapter_type = ACB_ADAPTER_TYPE_B; 305 } 306 break; 307 308 default: acb->adapter_type = ACB_ADAPTER_TYPE_A; 309 } 310 } 311 312 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 313 { 314 struct MessageUnit_A __iomem *reg = acb->pmuA; 315 int i; 316 317 for (i = 0; i < 2000; i++) { 318 if (readl(®->outbound_intstatus) & 319 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 320 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 321 ®->outbound_intstatus); 322 return true; 323 } 324 msleep(10); 325 } /* max 20 seconds */ 326 327 return false; 328 } 329 330 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) 331 { 332 struct MessageUnit_B *reg = acb->pmuB; 333 int i; 334 335 for (i = 0; i < 2000; i++) { 336 if (readl(reg->iop2drv_doorbell) 337 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 338 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, 339 reg->iop2drv_doorbell); 340 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, 341 reg->drv2iop_doorbell); 342 return true; 343 } 344 msleep(10); 345 } /* max 20 seconds */ 346 347 return false; 348 } 349 350 static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) 351 { 352 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 353 int i; 354 355 for (i = 0; i < 2000; i++) { 356 if (readl(&phbcmu->outbound_doorbell) 357 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 358 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, 359 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/ 360 return true; 361 } 362 msleep(10); 363 } /* max 20 seconds */ 364 365 return false; 366 } 367 368 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 369 { 370 struct MessageUnit_A __iomem *reg = acb->pmuA; 371 int retry_count = 30; 372 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 373 do { 374 if (arcmsr_hba_wait_msgint_ready(acb)) 375 break; 376 else { 377 retry_count--; 378 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 379 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 380 } 381 } while (retry_count != 0); 382 } 383 384 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) 385 { 386 struct MessageUnit_B *reg = acb->pmuB; 387 int retry_count = 30; 388 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 389 do { 390 if (arcmsr_hbb_wait_msgint_ready(acb)) 391 break; 392 else { 393 retry_count--; 394 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 395 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 396 } 397 } while (retry_count != 0); 398 } 399 400 static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) 401 { 402 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 403 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 404 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 405 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 406 do { 407 if (arcmsr_hbc_wait_msgint_ready(pACB)) { 408 break; 409 } else { 410 retry_count--; 411 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 412 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 413 } 414 } while (retry_count != 0); 415 return; 416 } 417 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 418 { 419 switch (acb->adapter_type) { 420 421 case ACB_ADAPTER_TYPE_A: { 422 arcmsr_flush_hba_cache(acb); 423 } 424 break; 425 426 case ACB_ADAPTER_TYPE_B: { 427 arcmsr_flush_hbb_cache(acb); 428 } 429 break; 430 case ACB_ADAPTER_TYPE_C: { 431 arcmsr_flush_hbc_cache(acb); 432 } 433 } 434 } 435 436 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 437 { 438 struct pci_dev *pdev = acb->pdev; 439 void *dma_coherent; 440 dma_addr_t dma_coherent_handle; 441 struct CommandControlBlock *ccb_tmp; 442 int i = 0, j = 0; 443 dma_addr_t cdb_phyaddr; 444 unsigned long roundup_ccbsize; 445 unsigned long max_xfer_len; 446 unsigned long max_sg_entrys; 447 uint32_t firm_config_version; 448 449 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 450 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 451 acb->devstate[i][j] = ARECA_RAID_GONE; 452 453 max_xfer_len = ARCMSR_MAX_XFER_LEN; 454 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 455 firm_config_version = acb->firm_cfg_version; 456 if((firm_config_version & 0xFF) >= 3){ 457 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 458 max_sg_entrys = (max_xfer_len/4096); 459 } 460 acb->host->max_sectors = max_xfer_len/512; 461 acb->host->sg_tablesize = max_sg_entrys; 462 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 463 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; 464 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 465 if(!dma_coherent){ 466 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); 467 return -ENOMEM; 468 } 469 acb->dma_coherent = dma_coherent; 470 acb->dma_coherent_handle = dma_coherent_handle; 471 memset(dma_coherent, 0, acb->uncache_size); 472 ccb_tmp = dma_coherent; 473 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 474 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 475 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 476 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); 477 acb->pccb_pool[i] = ccb_tmp; 478 ccb_tmp->acb = acb; 479 INIT_LIST_HEAD(&ccb_tmp->list); 480 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 481 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 482 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 483 } 484 return 0; 485 } 486 487 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 488 { 489 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh); 490 switch (acb->adapter_type) { 491 case ACB_ADAPTER_TYPE_A: { 492 493 struct MessageUnit_A __iomem *reg = acb->pmuA; 494 char *acb_dev_map = (char *)acb->device_map; 495 uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); 496 char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); 497 int target, lun; 498 struct scsi_device *psdev; 499 char diff; 500 501 atomic_inc(&acb->rq_map_token); 502 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 503 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 504 diff = (*acb_dev_map)^readb(devicemap); 505 if (diff != 0) { 506 char temp; 507 *acb_dev_map = readb(devicemap); 508 temp =*acb_dev_map; 509 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 510 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 511 scsi_add_device(acb->host, 0, target, lun); 512 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 513 psdev = scsi_device_lookup(acb->host, 0, target, lun); 514 if (psdev != NULL ) { 515 scsi_remove_device(psdev); 516 scsi_device_put(psdev); 517 } 518 } 519 temp >>= 1; 520 diff >>= 1; 521 } 522 } 523 devicemap++; 524 acb_dev_map++; 525 } 526 } 527 break; 528 } 529 530 case ACB_ADAPTER_TYPE_B: { 531 struct MessageUnit_B *reg = acb->pmuB; 532 char *acb_dev_map = (char *)acb->device_map; 533 uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); 534 char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); 535 int target, lun; 536 struct scsi_device *psdev; 537 char diff; 538 539 atomic_inc(&acb->rq_map_token); 540 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 541 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 542 diff = (*acb_dev_map)^readb(devicemap); 543 if (diff != 0) { 544 char temp; 545 *acb_dev_map = readb(devicemap); 546 temp =*acb_dev_map; 547 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 548 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 549 scsi_add_device(acb->host, 0, target, lun); 550 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 551 psdev = scsi_device_lookup(acb->host, 0, target, lun); 552 if (psdev != NULL ) { 553 scsi_remove_device(psdev); 554 scsi_device_put(psdev); 555 } 556 } 557 temp >>= 1; 558 diff >>= 1; 559 } 560 } 561 devicemap++; 562 acb_dev_map++; 563 } 564 } 565 } 566 break; 567 case ACB_ADAPTER_TYPE_C: { 568 struct MessageUnit_C *reg = acb->pmuC; 569 char *acb_dev_map = (char *)acb->device_map; 570 uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 571 char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 572 int target, lun; 573 struct scsi_device *psdev; 574 char diff; 575 576 atomic_inc(&acb->rq_map_token); 577 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 578 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) { 579 diff = (*acb_dev_map)^readb(devicemap); 580 if (diff != 0) { 581 char temp; 582 *acb_dev_map = readb(devicemap); 583 temp = *acb_dev_map; 584 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 585 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) { 586 scsi_add_device(acb->host, 0, target, lun); 587 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) { 588 psdev = scsi_device_lookup(acb->host, 0, target, lun); 589 if (psdev != NULL) { 590 scsi_remove_device(psdev); 591 scsi_device_put(psdev); 592 } 593 } 594 temp >>= 1; 595 diff >>= 1; 596 } 597 } 598 devicemap++; 599 acb_dev_map++; 600 } 601 } 602 } 603 } 604 } 605 606 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 607 { 608 struct Scsi_Host *host; 609 struct AdapterControlBlock *acb; 610 uint8_t bus,dev_fun; 611 int error; 612 error = pci_enable_device(pdev); 613 if(error){ 614 return -ENODEV; 615 } 616 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 617 if(!host){ 618 goto pci_disable_dev; 619 } 620 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 621 if(error){ 622 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 623 if(error){ 624 printk(KERN_WARNING 625 "scsi%d: No suitable DMA mask available\n", 626 host->host_no); 627 goto scsi_host_release; 628 } 629 } 630 init_waitqueue_head(&wait_q); 631 bus = pdev->bus->number; 632 dev_fun = pdev->devfn; 633 acb = (struct AdapterControlBlock *) host->hostdata; 634 memset(acb,0,sizeof(struct AdapterControlBlock)); 635 acb->pdev = pdev; 636 acb->host = host; 637 host->max_lun = ARCMSR_MAX_TARGETLUN; 638 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 639 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 640 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 641 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 642 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 643 host->unique_id = (bus << 8) | dev_fun; 644 pci_set_drvdata(pdev, host); 645 pci_set_master(pdev); 646 error = pci_request_regions(pdev, "arcmsr"); 647 if(error){ 648 goto scsi_host_release; 649 } 650 spin_lock_init(&acb->eh_lock); 651 spin_lock_init(&acb->ccblist_lock); 652 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 653 ACB_F_MESSAGE_RQBUFFER_CLEARED | 654 ACB_F_MESSAGE_WQBUFFER_READED); 655 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 656 INIT_LIST_HEAD(&acb->ccb_free_list); 657 arcmsr_define_adapter_type(acb); 658 error = arcmsr_remap_pciregion(acb); 659 if(!error){ 660 goto pci_release_regs; 661 } 662 error = arcmsr_get_firmware_spec(acb); 663 if(!error){ 664 goto unmap_pci_region; 665 } 666 error = arcmsr_alloc_ccb_pool(acb); 667 if(error){ 668 goto free_hbb_mu; 669 } 670 arcmsr_iop_init(acb); 671 error = scsi_add_host(host, &pdev->dev); 672 if(error){ 673 goto RAID_controller_stop; 674 } 675 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); 676 if(error){ 677 goto scsi_host_remove; 678 } 679 host->irq = pdev->irq; 680 scsi_scan_host(host); 681 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 682 atomic_set(&acb->rq_map_token, 16); 683 atomic_set(&acb->ante_token_value, 16); 684 acb->fw_flag = FW_NORMAL; 685 init_timer(&acb->eternal_timer); 686 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 687 acb->eternal_timer.data = (unsigned long) acb; 688 acb->eternal_timer.function = &arcmsr_request_device_map; 689 add_timer(&acb->eternal_timer); 690 if(arcmsr_alloc_sysfs_attr(acb)) 691 goto out_free_sysfs; 692 return 0; 693 out_free_sysfs: 694 scsi_host_remove: 695 scsi_remove_host(host); 696 RAID_controller_stop: 697 arcmsr_stop_adapter_bgrb(acb); 698 arcmsr_flush_adapter_cache(acb); 699 arcmsr_free_ccb_pool(acb); 700 free_hbb_mu: 701 arcmsr_free_hbb_mu(acb); 702 unmap_pci_region: 703 arcmsr_unmap_pciregion(acb); 704 pci_release_regs: 705 pci_release_regions(pdev); 706 scsi_host_release: 707 scsi_host_put(host); 708 pci_disable_dev: 709 pci_disable_device(pdev); 710 return -ENODEV; 711 } 712 713 static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 714 { 715 struct MessageUnit_A __iomem *reg = acb->pmuA; 716 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 717 if (!arcmsr_hba_wait_msgint_ready(acb)) { 718 printk(KERN_NOTICE 719 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 720 , acb->host->host_no); 721 return false; 722 } 723 return true; 724 } 725 726 static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) 727 { 728 struct MessageUnit_B *reg = acb->pmuB; 729 730 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 731 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 732 printk(KERN_NOTICE 733 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 734 , acb->host->host_no); 735 return false; 736 } 737 return true; 738 } 739 static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) 740 { 741 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 742 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 743 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 744 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 745 printk(KERN_NOTICE 746 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 747 , pACB->host->host_no); 748 return false; 749 } 750 return true; 751 } 752 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 753 { 754 uint8_t rtnval = 0; 755 switch (acb->adapter_type) { 756 case ACB_ADAPTER_TYPE_A: { 757 rtnval = arcmsr_abort_hba_allcmd(acb); 758 } 759 break; 760 761 case ACB_ADAPTER_TYPE_B: { 762 rtnval = arcmsr_abort_hbb_allcmd(acb); 763 } 764 break; 765 766 case ACB_ADAPTER_TYPE_C: { 767 rtnval = arcmsr_abort_hbc_allcmd(acb); 768 } 769 } 770 return rtnval; 771 } 772 773 static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) 774 { 775 struct MessageUnit_B *reg = pacb->pmuB; 776 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 777 if (!arcmsr_hbb_wait_msgint_ready(pacb)) { 778 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); 779 return false; 780 } 781 return true; 782 } 783 784 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 785 { 786 struct scsi_cmnd *pcmd = ccb->pcmd; 787 788 scsi_dma_unmap(pcmd); 789 } 790 791 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 792 { 793 struct AdapterControlBlock *acb = ccb->acb; 794 struct scsi_cmnd *pcmd = ccb->pcmd; 795 unsigned long flags; 796 atomic_dec(&acb->ccboutstandingcount); 797 arcmsr_pci_unmap_dma(ccb); 798 ccb->startdone = ARCMSR_CCB_DONE; 799 spin_lock_irqsave(&acb->ccblist_lock, flags); 800 list_add_tail(&ccb->list, &acb->ccb_free_list); 801 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 802 pcmd->scsi_done(pcmd); 803 } 804 805 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 806 { 807 808 struct scsi_cmnd *pcmd = ccb->pcmd; 809 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 810 pcmd->result = DID_OK << 16; 811 if (sensebuffer) { 812 int sense_data_length = 813 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 814 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 815 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 816 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 817 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 818 sensebuffer->Valid = 1; 819 } 820 } 821 822 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 823 { 824 u32 orig_mask = 0; 825 switch (acb->adapter_type) { 826 case ACB_ADAPTER_TYPE_A : { 827 struct MessageUnit_A __iomem *reg = acb->pmuA; 828 orig_mask = readl(®->outbound_intmask); 829 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 830 ®->outbound_intmask); 831 } 832 break; 833 case ACB_ADAPTER_TYPE_B : { 834 struct MessageUnit_B *reg = acb->pmuB; 835 orig_mask = readl(reg->iop2drv_doorbell_mask); 836 writel(0, reg->iop2drv_doorbell_mask); 837 } 838 break; 839 case ACB_ADAPTER_TYPE_C:{ 840 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 841 /* disable all outbound interrupt */ 842 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 843 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 844 } 845 break; 846 } 847 return orig_mask; 848 } 849 850 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 851 struct CommandControlBlock *ccb, bool error) 852 { 853 uint8_t id, lun; 854 id = ccb->pcmd->device->id; 855 lun = ccb->pcmd->device->lun; 856 if (!error) { 857 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 858 acb->devstate[id][lun] = ARECA_RAID_GOOD; 859 ccb->pcmd->result = DID_OK << 16; 860 arcmsr_ccb_complete(ccb); 861 }else{ 862 switch (ccb->arcmsr_cdb.DeviceStatus) { 863 case ARCMSR_DEV_SELECT_TIMEOUT: { 864 acb->devstate[id][lun] = ARECA_RAID_GONE; 865 ccb->pcmd->result = DID_NO_CONNECT << 16; 866 arcmsr_ccb_complete(ccb); 867 } 868 break; 869 870 case ARCMSR_DEV_ABORTED: 871 872 case ARCMSR_DEV_INIT_FAIL: { 873 acb->devstate[id][lun] = ARECA_RAID_GONE; 874 ccb->pcmd->result = DID_BAD_TARGET << 16; 875 arcmsr_ccb_complete(ccb); 876 } 877 break; 878 879 case ARCMSR_DEV_CHECK_CONDITION: { 880 acb->devstate[id][lun] = ARECA_RAID_GOOD; 881 arcmsr_report_sense_info(ccb); 882 arcmsr_ccb_complete(ccb); 883 } 884 break; 885 886 default: 887 printk(KERN_NOTICE 888 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 889 but got unknown DeviceStatus = 0x%x \n" 890 , acb->host->host_no 891 , id 892 , lun 893 , ccb->arcmsr_cdb.DeviceStatus); 894 acb->devstate[id][lun] = ARECA_RAID_GONE; 895 ccb->pcmd->result = DID_NO_CONNECT << 16; 896 arcmsr_ccb_complete(ccb); 897 break; 898 } 899 } 900 } 901 902 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 903 { 904 int id, lun; 905 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 906 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 907 struct scsi_cmnd *abortcmd = pCCB->pcmd; 908 if (abortcmd) { 909 id = abortcmd->device->id; 910 lun = abortcmd->device->lun; 911 abortcmd->result |= DID_ABORT << 16; 912 arcmsr_ccb_complete(pCCB); 913 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 914 acb->host->host_no, pCCB); 915 } 916 return; 917 } 918 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 919 done acb = '0x%p'" 920 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 921 " ccboutstandingcount = %d \n" 922 , acb->host->host_no 923 , acb 924 , pCCB 925 , pCCB->acb 926 , pCCB->startdone 927 , atomic_read(&acb->ccboutstandingcount)); 928 return; 929 } 930 arcmsr_report_ccb_state(acb, pCCB, error); 931 } 932 933 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 934 { 935 int i = 0; 936 uint32_t flag_ccb; 937 struct ARCMSR_CDB *pARCMSR_CDB; 938 bool error; 939 struct CommandControlBlock *pCCB; 940 switch (acb->adapter_type) { 941 942 case ACB_ADAPTER_TYPE_A: { 943 struct MessageUnit_A __iomem *reg = acb->pmuA; 944 uint32_t outbound_intstatus; 945 outbound_intstatus = readl(®->outbound_intstatus) & 946 acb->outbound_int_enable; 947 /*clear and abort all outbound posted Q*/ 948 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 949 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 950 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 951 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 952 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 953 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 954 arcmsr_drain_donequeue(acb, pCCB, error); 955 } 956 } 957 break; 958 959 case ACB_ADAPTER_TYPE_B: { 960 struct MessageUnit_B *reg = acb->pmuB; 961 /*clear all outbound posted Q*/ 962 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 963 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 964 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { 965 writel(0, ®->done_qbuffer[i]); 966 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 967 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 968 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 969 arcmsr_drain_donequeue(acb, pCCB, error); 970 } 971 reg->post_qbuffer[i] = 0; 972 } 973 reg->doneq_index = 0; 974 reg->postq_index = 0; 975 } 976 break; 977 case ACB_ADAPTER_TYPE_C: { 978 struct MessageUnit_C *reg = acb->pmuC; 979 struct ARCMSR_CDB *pARCMSR_CDB; 980 uint32_t flag_ccb, ccb_cdb_phy; 981 bool error; 982 struct CommandControlBlock *pCCB; 983 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 984 /*need to do*/ 985 flag_ccb = readl(®->outbound_queueport_low); 986 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 987 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 988 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 989 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 990 arcmsr_drain_donequeue(acb, pCCB, error); 991 } 992 } 993 } 994 } 995 static void arcmsr_remove(struct pci_dev *pdev) 996 { 997 struct Scsi_Host *host = pci_get_drvdata(pdev); 998 struct AdapterControlBlock *acb = 999 (struct AdapterControlBlock *) host->hostdata; 1000 int poll_count = 0; 1001 arcmsr_free_sysfs_attr(acb); 1002 scsi_remove_host(host); 1003 flush_work_sync(&acb->arcmsr_do_message_isr_bh); 1004 del_timer_sync(&acb->eternal_timer); 1005 arcmsr_disable_outbound_ints(acb); 1006 arcmsr_stop_adapter_bgrb(acb); 1007 arcmsr_flush_adapter_cache(acb); 1008 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1009 acb->acb_flags &= ~ACB_F_IOP_INITED; 1010 1011 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1012 if (!atomic_read(&acb->ccboutstandingcount)) 1013 break; 1014 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1015 msleep(25); 1016 } 1017 1018 if (atomic_read(&acb->ccboutstandingcount)) { 1019 int i; 1020 1021 arcmsr_abort_allcmd(acb); 1022 arcmsr_done4abort_postqueue(acb); 1023 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1024 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1025 if (ccb->startdone == ARCMSR_CCB_START) { 1026 ccb->startdone = ARCMSR_CCB_ABORTED; 1027 ccb->pcmd->result = DID_ABORT << 16; 1028 arcmsr_ccb_complete(ccb); 1029 } 1030 } 1031 } 1032 free_irq(pdev->irq, acb); 1033 arcmsr_free_ccb_pool(acb); 1034 arcmsr_free_hbb_mu(acb); 1035 arcmsr_unmap_pciregion(acb); 1036 pci_release_regions(pdev); 1037 scsi_host_put(host); 1038 pci_disable_device(pdev); 1039 pci_set_drvdata(pdev, NULL); 1040 } 1041 1042 static void arcmsr_shutdown(struct pci_dev *pdev) 1043 { 1044 struct Scsi_Host *host = pci_get_drvdata(pdev); 1045 struct AdapterControlBlock *acb = 1046 (struct AdapterControlBlock *)host->hostdata; 1047 del_timer_sync(&acb->eternal_timer); 1048 arcmsr_disable_outbound_ints(acb); 1049 flush_work_sync(&acb->arcmsr_do_message_isr_bh); 1050 arcmsr_stop_adapter_bgrb(acb); 1051 arcmsr_flush_adapter_cache(acb); 1052 } 1053 1054 static int arcmsr_module_init(void) 1055 { 1056 int error = 0; 1057 error = pci_register_driver(&arcmsr_pci_driver); 1058 return error; 1059 } 1060 1061 static void arcmsr_module_exit(void) 1062 { 1063 pci_unregister_driver(&arcmsr_pci_driver); 1064 } 1065 module_init(arcmsr_module_init); 1066 module_exit(arcmsr_module_exit); 1067 1068 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1069 u32 intmask_org) 1070 { 1071 u32 mask; 1072 switch (acb->adapter_type) { 1073 1074 case ACB_ADAPTER_TYPE_A: { 1075 struct MessageUnit_A __iomem *reg = acb->pmuA; 1076 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1077 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1078 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1079 writel(mask, ®->outbound_intmask); 1080 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1081 } 1082 break; 1083 1084 case ACB_ADAPTER_TYPE_B: { 1085 struct MessageUnit_B *reg = acb->pmuB; 1086 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1087 ARCMSR_IOP2DRV_DATA_READ_OK | 1088 ARCMSR_IOP2DRV_CDB_DONE | 1089 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1090 writel(mask, reg->iop2drv_doorbell_mask); 1091 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1092 } 1093 break; 1094 case ACB_ADAPTER_TYPE_C: { 1095 struct MessageUnit_C *reg = acb->pmuC; 1096 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1097 writel(intmask_org & mask, ®->host_int_mask); 1098 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1099 } 1100 } 1101 } 1102 1103 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1104 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1105 { 1106 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1107 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1108 __le32 address_lo, address_hi; 1109 int arccdbsize = 0x30; 1110 __le32 length = 0; 1111 int i; 1112 struct scatterlist *sg; 1113 int nseg; 1114 ccb->pcmd = pcmd; 1115 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1116 arcmsr_cdb->TargetID = pcmd->device->id; 1117 arcmsr_cdb->LUN = pcmd->device->lun; 1118 arcmsr_cdb->Function = 1; 1119 arcmsr_cdb->Context = 0; 1120 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1121 1122 nseg = scsi_dma_map(pcmd); 1123 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1124 return FAILED; 1125 scsi_for_each_sg(pcmd, sg, nseg, i) { 1126 /* Get the physical address of the current data pointer */ 1127 length = cpu_to_le32(sg_dma_len(sg)); 1128 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1129 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1130 if (address_hi == 0) { 1131 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1132 1133 pdma_sg->address = address_lo; 1134 pdma_sg->length = length; 1135 psge += sizeof (struct SG32ENTRY); 1136 arccdbsize += sizeof (struct SG32ENTRY); 1137 } else { 1138 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1139 1140 pdma_sg->addresshigh = address_hi; 1141 pdma_sg->address = address_lo; 1142 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1143 psge += sizeof (struct SG64ENTRY); 1144 arccdbsize += sizeof (struct SG64ENTRY); 1145 } 1146 } 1147 arcmsr_cdb->sgcount = (uint8_t)nseg; 1148 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1149 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1150 if ( arccdbsize > 256) 1151 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1152 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1153 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1154 ccb->arc_cdb_size = arccdbsize; 1155 return SUCCESS; 1156 } 1157 1158 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1159 { 1160 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; 1161 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1162 atomic_inc(&acb->ccboutstandingcount); 1163 ccb->startdone = ARCMSR_CCB_START; 1164 switch (acb->adapter_type) { 1165 case ACB_ADAPTER_TYPE_A: { 1166 struct MessageUnit_A __iomem *reg = acb->pmuA; 1167 1168 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1169 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1170 ®->inbound_queueport); 1171 else { 1172 writel(cdb_phyaddr_pattern, ®->inbound_queueport); 1173 } 1174 } 1175 break; 1176 1177 case ACB_ADAPTER_TYPE_B: { 1178 struct MessageUnit_B *reg = acb->pmuB; 1179 uint32_t ending_index, index = reg->postq_index; 1180 1181 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1182 writel(0, ®->post_qbuffer[ending_index]); 1183 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1184 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 1185 ®->post_qbuffer[index]); 1186 } else { 1187 writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); 1188 } 1189 index++; 1190 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1191 reg->postq_index = index; 1192 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1193 } 1194 break; 1195 case ACB_ADAPTER_TYPE_C: { 1196 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1197 uint32_t ccb_post_stamp, arc_cdb_size; 1198 1199 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1200 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1); 1201 if (acb->cdb_phyaddr_hi32) { 1202 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1203 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1204 } else { 1205 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1206 } 1207 } 1208 } 1209 } 1210 1211 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1212 { 1213 struct MessageUnit_A __iomem *reg = acb->pmuA; 1214 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1215 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1216 if (!arcmsr_hba_wait_msgint_ready(acb)) { 1217 printk(KERN_NOTICE 1218 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1219 , acb->host->host_no); 1220 } 1221 } 1222 1223 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) 1224 { 1225 struct MessageUnit_B *reg = acb->pmuB; 1226 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1227 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1228 1229 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 1230 printk(KERN_NOTICE 1231 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1232 , acb->host->host_no); 1233 } 1234 } 1235 1236 static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) 1237 { 1238 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1239 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1240 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1241 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1242 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 1243 printk(KERN_NOTICE 1244 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1245 , pACB->host->host_no); 1246 } 1247 return; 1248 } 1249 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1250 { 1251 switch (acb->adapter_type) { 1252 case ACB_ADAPTER_TYPE_A: { 1253 arcmsr_stop_hba_bgrb(acb); 1254 } 1255 break; 1256 1257 case ACB_ADAPTER_TYPE_B: { 1258 arcmsr_stop_hbb_bgrb(acb); 1259 } 1260 break; 1261 case ACB_ADAPTER_TYPE_C: { 1262 arcmsr_stop_hbc_bgrb(acb); 1263 } 1264 } 1265 } 1266 1267 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1268 { 1269 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1270 } 1271 1272 void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1273 { 1274 switch (acb->adapter_type) { 1275 case ACB_ADAPTER_TYPE_A: { 1276 struct MessageUnit_A __iomem *reg = acb->pmuA; 1277 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1278 } 1279 break; 1280 1281 case ACB_ADAPTER_TYPE_B: { 1282 struct MessageUnit_B *reg = acb->pmuB; 1283 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1284 } 1285 break; 1286 case ACB_ADAPTER_TYPE_C: { 1287 struct MessageUnit_C __iomem *reg = acb->pmuC; 1288 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1289 } 1290 } 1291 } 1292 1293 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1294 { 1295 switch (acb->adapter_type) { 1296 case ACB_ADAPTER_TYPE_A: { 1297 struct MessageUnit_A __iomem *reg = acb->pmuA; 1298 /* 1299 ** push inbound doorbell tell iop, driver data write ok 1300 ** and wait reply on next hwinterrupt for next Qbuffer post 1301 */ 1302 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1303 } 1304 break; 1305 1306 case ACB_ADAPTER_TYPE_B: { 1307 struct MessageUnit_B *reg = acb->pmuB; 1308 /* 1309 ** push inbound doorbell tell iop, driver data write ok 1310 ** and wait reply on next hwinterrupt for next Qbuffer post 1311 */ 1312 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1313 } 1314 break; 1315 case ACB_ADAPTER_TYPE_C: { 1316 struct MessageUnit_C __iomem *reg = acb->pmuC; 1317 /* 1318 ** push inbound doorbell tell iop, driver data write ok 1319 ** and wait reply on next hwinterrupt for next Qbuffer post 1320 */ 1321 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1322 } 1323 break; 1324 } 1325 } 1326 1327 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1328 { 1329 struct QBUFFER __iomem *qbuffer = NULL; 1330 switch (acb->adapter_type) { 1331 1332 case ACB_ADAPTER_TYPE_A: { 1333 struct MessageUnit_A __iomem *reg = acb->pmuA; 1334 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1335 } 1336 break; 1337 1338 case ACB_ADAPTER_TYPE_B: { 1339 struct MessageUnit_B *reg = acb->pmuB; 1340 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1341 } 1342 break; 1343 case ACB_ADAPTER_TYPE_C: { 1344 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1345 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1346 } 1347 } 1348 return qbuffer; 1349 } 1350 1351 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1352 { 1353 struct QBUFFER __iomem *pqbuffer = NULL; 1354 switch (acb->adapter_type) { 1355 1356 case ACB_ADAPTER_TYPE_A: { 1357 struct MessageUnit_A __iomem *reg = acb->pmuA; 1358 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1359 } 1360 break; 1361 1362 case ACB_ADAPTER_TYPE_B: { 1363 struct MessageUnit_B *reg = acb->pmuB; 1364 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1365 } 1366 break; 1367 case ACB_ADAPTER_TYPE_C: { 1368 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 1369 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1370 } 1371 1372 } 1373 return pqbuffer; 1374 } 1375 1376 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1377 { 1378 struct QBUFFER __iomem *prbuffer; 1379 struct QBUFFER *pQbuffer; 1380 uint8_t __iomem *iop_data; 1381 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 1382 rqbuf_lastindex = acb->rqbuf_lastindex; 1383 rqbuf_firstindex = acb->rqbuf_firstindex; 1384 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1385 iop_data = (uint8_t __iomem *)prbuffer->data; 1386 iop_len = prbuffer->data_len; 1387 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1); 1388 1389 if (my_empty_len >= iop_len) 1390 { 1391 while (iop_len > 0) { 1392 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; 1393 memcpy(pQbuffer, iop_data, 1); 1394 rqbuf_lastindex++; 1395 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1396 iop_data++; 1397 iop_len--; 1398 } 1399 acb->rqbuf_lastindex = rqbuf_lastindex; 1400 arcmsr_iop_message_read(acb); 1401 } 1402 1403 else { 1404 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1405 } 1406 } 1407 1408 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1409 { 1410 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1411 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { 1412 uint8_t *pQbuffer; 1413 struct QBUFFER __iomem *pwbuffer; 1414 uint8_t __iomem *iop_data; 1415 int32_t allxfer_len = 0; 1416 1417 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1418 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1419 iop_data = (uint8_t __iomem *)pwbuffer->data; 1420 1421 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ 1422 (allxfer_len < 124)) { 1423 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; 1424 memcpy(iop_data, pQbuffer, 1); 1425 acb->wqbuf_firstindex++; 1426 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1427 iop_data++; 1428 allxfer_len++; 1429 } 1430 pwbuffer->data_len = allxfer_len; 1431 1432 arcmsr_iop_message_wrote(acb); 1433 } 1434 1435 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { 1436 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1437 } 1438 } 1439 1440 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1441 { 1442 uint32_t outbound_doorbell; 1443 struct MessageUnit_A __iomem *reg = acb->pmuA; 1444 outbound_doorbell = readl(®->outbound_doorbell); 1445 writel(outbound_doorbell, ®->outbound_doorbell); 1446 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 1447 arcmsr_iop2drv_data_wrote_handle(acb); 1448 } 1449 1450 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 1451 arcmsr_iop2drv_data_read_handle(acb); 1452 } 1453 } 1454 static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) 1455 { 1456 uint32_t outbound_doorbell; 1457 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1458 /* 1459 ******************************************************************* 1460 ** Maybe here we need to check wrqbuffer_lock is lock or not 1461 ** DOORBELL: din! don! 1462 ** check if there are any mail need to pack from firmware 1463 ******************************************************************* 1464 */ 1465 outbound_doorbell = readl(®->outbound_doorbell); 1466 writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ 1467 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 1468 arcmsr_iop2drv_data_wrote_handle(pACB); 1469 } 1470 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { 1471 arcmsr_iop2drv_data_read_handle(pACB); 1472 } 1473 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 1474 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ 1475 } 1476 return; 1477 } 1478 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1479 { 1480 uint32_t flag_ccb; 1481 struct MessageUnit_A __iomem *reg = acb->pmuA; 1482 struct ARCMSR_CDB *pARCMSR_CDB; 1483 struct CommandControlBlock *pCCB; 1484 bool error; 1485 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1486 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1487 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1488 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1489 arcmsr_drain_donequeue(acb, pCCB, error); 1490 } 1491 } 1492 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) 1493 { 1494 uint32_t index; 1495 uint32_t flag_ccb; 1496 struct MessageUnit_B *reg = acb->pmuB; 1497 struct ARCMSR_CDB *pARCMSR_CDB; 1498 struct CommandControlBlock *pCCB; 1499 bool error; 1500 index = reg->doneq_index; 1501 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { 1502 writel(0, ®->done_qbuffer[index]); 1503 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1504 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1505 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1506 arcmsr_drain_donequeue(acb, pCCB, error); 1507 index++; 1508 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1509 reg->doneq_index = index; 1510 } 1511 } 1512 1513 static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) 1514 { 1515 struct MessageUnit_C *phbcmu; 1516 struct ARCMSR_CDB *arcmsr_cdb; 1517 struct CommandControlBlock *ccb; 1518 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1519 int error; 1520 1521 phbcmu = (struct MessageUnit_C *)acb->pmuC; 1522 /* areca cdb command done */ 1523 /* Use correct offset and size for syncing */ 1524 1525 while (readl(&phbcmu->host_int_status) & 1526 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ 1527 /* check if command done with no error*/ 1528 flag_ccb = readl(&phbcmu->outbound_queueport_low); 1529 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ 1530 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); 1531 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 1532 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1533 /* check if command done with no error */ 1534 arcmsr_drain_donequeue(acb, ccb, error); 1535 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 1536 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); 1537 break; 1538 } 1539 throttling++; 1540 } 1541 } 1542 /* 1543 ********************************************************************************** 1544 ** Handle a message interrupt 1545 ** 1546 ** The only message interrupt we expect is in response to a query for the current adapter config. 1547 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1548 ********************************************************************************** 1549 */ 1550 static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) 1551 { 1552 struct MessageUnit_A *reg = acb->pmuA; 1553 /*clear interrupt and message state*/ 1554 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 1555 schedule_work(&acb->arcmsr_do_message_isr_bh); 1556 } 1557 static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) 1558 { 1559 struct MessageUnit_B *reg = acb->pmuB; 1560 1561 /*clear interrupt and message state*/ 1562 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 1563 schedule_work(&acb->arcmsr_do_message_isr_bh); 1564 } 1565 /* 1566 ********************************************************************************** 1567 ** Handle a message interrupt 1568 ** 1569 ** The only message interrupt we expect is in response to a query for the 1570 ** current adapter config. 1571 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1572 ********************************************************************************** 1573 */ 1574 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) 1575 { 1576 struct MessageUnit_C *reg = acb->pmuC; 1577 /*clear interrupt and message state*/ 1578 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 1579 schedule_work(&acb->arcmsr_do_message_isr_bh); 1580 } 1581 1582 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1583 { 1584 uint32_t outbound_intstatus; 1585 struct MessageUnit_A __iomem *reg = acb->pmuA; 1586 outbound_intstatus = readl(®->outbound_intstatus) & 1587 acb->outbound_int_enable; 1588 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { 1589 return 1; 1590 } 1591 writel(outbound_intstatus, ®->outbound_intstatus); 1592 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 1593 arcmsr_hba_doorbell_isr(acb); 1594 } 1595 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 1596 arcmsr_hba_postqueue_isr(acb); 1597 } 1598 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 1599 /* messenger of "driver to iop commands" */ 1600 arcmsr_hba_message_isr(acb); 1601 } 1602 return 0; 1603 } 1604 1605 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) 1606 { 1607 uint32_t outbound_doorbell; 1608 struct MessageUnit_B *reg = acb->pmuB; 1609 outbound_doorbell = readl(reg->iop2drv_doorbell) & 1610 acb->outbound_int_enable; 1611 if (!outbound_doorbell) 1612 return 1; 1613 1614 writel(~outbound_doorbell, reg->iop2drv_doorbell); 1615 /*in case the last action of doorbell interrupt clearance is cached, 1616 this action can push HW to write down the clear bit*/ 1617 readl(reg->iop2drv_doorbell); 1618 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 1619 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1620 arcmsr_iop2drv_data_wrote_handle(acb); 1621 } 1622 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { 1623 arcmsr_iop2drv_data_read_handle(acb); 1624 } 1625 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { 1626 arcmsr_hbb_postqueue_isr(acb); 1627 } 1628 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 1629 /* messenger of "driver to iop commands" */ 1630 arcmsr_hbb_message_isr(acb); 1631 } 1632 return 0; 1633 } 1634 1635 static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) 1636 { 1637 uint32_t host_interrupt_status; 1638 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 1639 /* 1640 ********************************************* 1641 ** check outbound intstatus 1642 ********************************************* 1643 */ 1644 host_interrupt_status = readl(&phbcmu->host_int_status); 1645 if (!host_interrupt_status) { 1646 /*it must be share irq*/ 1647 return 1; 1648 } 1649 /* MU ioctl transfer doorbell interrupts*/ 1650 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { 1651 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ 1652 } 1653 /* MU post queue interrupts*/ 1654 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { 1655 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ 1656 } 1657 return 0; 1658 } 1659 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 1660 { 1661 switch (acb->adapter_type) { 1662 case ACB_ADAPTER_TYPE_A: { 1663 if (arcmsr_handle_hba_isr(acb)) { 1664 return IRQ_NONE; 1665 } 1666 } 1667 break; 1668 1669 case ACB_ADAPTER_TYPE_B: { 1670 if (arcmsr_handle_hbb_isr(acb)) { 1671 return IRQ_NONE; 1672 } 1673 } 1674 break; 1675 case ACB_ADAPTER_TYPE_C: { 1676 if (arcmsr_handle_hbc_isr(acb)) { 1677 return IRQ_NONE; 1678 } 1679 } 1680 } 1681 return IRQ_HANDLED; 1682 } 1683 1684 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 1685 { 1686 if (acb) { 1687 /* stop adapter background rebuild */ 1688 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 1689 uint32_t intmask_org; 1690 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1691 intmask_org = arcmsr_disable_outbound_ints(acb); 1692 arcmsr_stop_adapter_bgrb(acb); 1693 arcmsr_flush_adapter_cache(acb); 1694 arcmsr_enable_outbound_ints(acb, intmask_org); 1695 } 1696 } 1697 } 1698 1699 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) 1700 { 1701 int32_t wqbuf_firstindex, wqbuf_lastindex; 1702 uint8_t *pQbuffer; 1703 struct QBUFFER __iomem *pwbuffer; 1704 uint8_t __iomem *iop_data; 1705 int32_t allxfer_len = 0; 1706 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1707 iop_data = (uint8_t __iomem *)pwbuffer->data; 1708 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1709 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1710 wqbuf_firstindex = acb->wqbuf_firstindex; 1711 wqbuf_lastindex = acb->wqbuf_lastindex; 1712 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { 1713 pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; 1714 memcpy(iop_data, pQbuffer, 1); 1715 wqbuf_firstindex++; 1716 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1717 iop_data++; 1718 allxfer_len++; 1719 } 1720 acb->wqbuf_firstindex = wqbuf_firstindex; 1721 pwbuffer->data_len = allxfer_len; 1722 arcmsr_iop_message_wrote(acb); 1723 } 1724 } 1725 1726 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 1727 struct scsi_cmnd *cmd) 1728 { 1729 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 1730 int retvalue = 0, transfer_len = 0; 1731 char *buffer; 1732 struct scatterlist *sg; 1733 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | 1734 (uint32_t ) cmd->cmnd[6] << 16 | 1735 (uint32_t ) cmd->cmnd[7] << 8 | 1736 (uint32_t ) cmd->cmnd[8]; 1737 /* 4 bytes: Areca io control code */ 1738 sg = scsi_sglist(cmd); 1739 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1740 if (scsi_sg_count(cmd) > 1) { 1741 retvalue = ARCMSR_MESSAGE_FAIL; 1742 goto message_out; 1743 } 1744 transfer_len += sg->length; 1745 1746 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1747 retvalue = ARCMSR_MESSAGE_FAIL; 1748 goto message_out; 1749 } 1750 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1751 switch(controlcode) { 1752 1753 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1754 unsigned char *ver_addr; 1755 uint8_t *pQbuffer, *ptmpQbuffer; 1756 int32_t allxfer_len = 0; 1757 1758 ver_addr = kmalloc(1032, GFP_ATOMIC); 1759 if (!ver_addr) { 1760 retvalue = ARCMSR_MESSAGE_FAIL; 1761 goto message_out; 1762 } 1763 1764 ptmpQbuffer = ver_addr; 1765 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1766 && (allxfer_len < 1031)) { 1767 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1768 memcpy(ptmpQbuffer, pQbuffer, 1); 1769 acb->rqbuf_firstindex++; 1770 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1771 ptmpQbuffer++; 1772 allxfer_len++; 1773 } 1774 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1775 1776 struct QBUFFER __iomem *prbuffer; 1777 uint8_t __iomem *iop_data; 1778 int32_t iop_len; 1779 1780 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1781 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1782 iop_data = prbuffer->data; 1783 iop_len = readl(&prbuffer->data_len); 1784 while (iop_len > 0) { 1785 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); 1786 acb->rqbuf_lastindex++; 1787 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1788 iop_data++; 1789 iop_len--; 1790 } 1791 arcmsr_iop_message_read(acb); 1792 } 1793 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1794 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1795 if(acb->fw_flag == FW_DEADLOCK) { 1796 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1797 }else{ 1798 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1799 } 1800 kfree(ver_addr); 1801 } 1802 break; 1803 1804 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1805 unsigned char *ver_addr; 1806 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1807 uint8_t *pQbuffer, *ptmpuserbuffer; 1808 1809 ver_addr = kmalloc(1032, GFP_ATOMIC); 1810 if (!ver_addr) { 1811 retvalue = ARCMSR_MESSAGE_FAIL; 1812 goto message_out; 1813 } 1814 if(acb->fw_flag == FW_DEADLOCK) { 1815 pcmdmessagefld->cmdmessage.ReturnCode = 1816 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1817 }else{ 1818 pcmdmessagefld->cmdmessage.ReturnCode = 1819 ARCMSR_MESSAGE_RETURNCODE_OK; 1820 } 1821 ptmpuserbuffer = ver_addr; 1822 user_len = pcmdmessagefld->cmdmessage.Length; 1823 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1824 wqbuf_lastindex = acb->wqbuf_lastindex; 1825 wqbuf_firstindex = acb->wqbuf_firstindex; 1826 if (wqbuf_lastindex != wqbuf_firstindex) { 1827 struct SENSE_DATA *sensebuffer = 1828 (struct SENSE_DATA *)cmd->sense_buffer; 1829 arcmsr_post_ioctldata2iop(acb); 1830 /* has error report sensedata */ 1831 sensebuffer->ErrorCode = 0x70; 1832 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1833 sensebuffer->AdditionalSenseLength = 0x0A; 1834 sensebuffer->AdditionalSenseCode = 0x20; 1835 sensebuffer->Valid = 1; 1836 retvalue = ARCMSR_MESSAGE_FAIL; 1837 } else { 1838 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1839 &(ARCMSR_MAX_QBUFFER - 1); 1840 if (my_empty_len >= user_len) { 1841 while (user_len > 0) { 1842 pQbuffer = 1843 &acb->wqbuffer[acb->wqbuf_lastindex]; 1844 memcpy(pQbuffer, ptmpuserbuffer, 1); 1845 acb->wqbuf_lastindex++; 1846 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1847 ptmpuserbuffer++; 1848 user_len--; 1849 } 1850 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1851 acb->acb_flags &= 1852 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1853 arcmsr_post_ioctldata2iop(acb); 1854 } 1855 } else { 1856 /* has error report sensedata */ 1857 struct SENSE_DATA *sensebuffer = 1858 (struct SENSE_DATA *)cmd->sense_buffer; 1859 sensebuffer->ErrorCode = 0x70; 1860 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1861 sensebuffer->AdditionalSenseLength = 0x0A; 1862 sensebuffer->AdditionalSenseCode = 0x20; 1863 sensebuffer->Valid = 1; 1864 retvalue = ARCMSR_MESSAGE_FAIL; 1865 } 1866 } 1867 kfree(ver_addr); 1868 } 1869 break; 1870 1871 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1872 uint8_t *pQbuffer = acb->rqbuffer; 1873 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1874 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1875 arcmsr_iop_message_read(acb); 1876 } 1877 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1878 acb->rqbuf_firstindex = 0; 1879 acb->rqbuf_lastindex = 0; 1880 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1881 if(acb->fw_flag == FW_DEADLOCK) { 1882 pcmdmessagefld->cmdmessage.ReturnCode = 1883 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1884 }else{ 1885 pcmdmessagefld->cmdmessage.ReturnCode = 1886 ARCMSR_MESSAGE_RETURNCODE_OK; 1887 } 1888 } 1889 break; 1890 1891 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1892 uint8_t *pQbuffer = acb->wqbuffer; 1893 if(acb->fw_flag == FW_DEADLOCK) { 1894 pcmdmessagefld->cmdmessage.ReturnCode = 1895 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1896 }else{ 1897 pcmdmessagefld->cmdmessage.ReturnCode = 1898 ARCMSR_MESSAGE_RETURNCODE_OK; 1899 } 1900 1901 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1902 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1903 arcmsr_iop_message_read(acb); 1904 } 1905 acb->acb_flags |= 1906 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1907 ACB_F_MESSAGE_WQBUFFER_READED); 1908 acb->wqbuf_firstindex = 0; 1909 acb->wqbuf_lastindex = 0; 1910 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1911 } 1912 break; 1913 1914 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1915 uint8_t *pQbuffer; 1916 1917 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1918 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1919 arcmsr_iop_message_read(acb); 1920 } 1921 acb->acb_flags |= 1922 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1923 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1924 | ACB_F_MESSAGE_WQBUFFER_READED); 1925 acb->rqbuf_firstindex = 0; 1926 acb->rqbuf_lastindex = 0; 1927 acb->wqbuf_firstindex = 0; 1928 acb->wqbuf_lastindex = 0; 1929 pQbuffer = acb->rqbuffer; 1930 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1931 pQbuffer = acb->wqbuffer; 1932 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1933 if(acb->fw_flag == FW_DEADLOCK) { 1934 pcmdmessagefld->cmdmessage.ReturnCode = 1935 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1936 }else{ 1937 pcmdmessagefld->cmdmessage.ReturnCode = 1938 ARCMSR_MESSAGE_RETURNCODE_OK; 1939 } 1940 } 1941 break; 1942 1943 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1944 if(acb->fw_flag == FW_DEADLOCK) { 1945 pcmdmessagefld->cmdmessage.ReturnCode = 1946 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1947 }else{ 1948 pcmdmessagefld->cmdmessage.ReturnCode = 1949 ARCMSR_MESSAGE_RETURNCODE_3F; 1950 } 1951 break; 1952 } 1953 case ARCMSR_MESSAGE_SAY_HELLO: { 1954 int8_t *hello_string = "Hello! I am ARCMSR"; 1955 if(acb->fw_flag == FW_DEADLOCK) { 1956 pcmdmessagefld->cmdmessage.ReturnCode = 1957 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1958 }else{ 1959 pcmdmessagefld->cmdmessage.ReturnCode = 1960 ARCMSR_MESSAGE_RETURNCODE_OK; 1961 } 1962 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1963 , (int16_t)strlen(hello_string)); 1964 } 1965 break; 1966 1967 case ARCMSR_MESSAGE_SAY_GOODBYE: 1968 if(acb->fw_flag == FW_DEADLOCK) { 1969 pcmdmessagefld->cmdmessage.ReturnCode = 1970 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1971 } 1972 arcmsr_iop_parking(acb); 1973 break; 1974 1975 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1976 if(acb->fw_flag == FW_DEADLOCK) { 1977 pcmdmessagefld->cmdmessage.ReturnCode = 1978 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1979 } 1980 arcmsr_flush_adapter_cache(acb); 1981 break; 1982 1983 default: 1984 retvalue = ARCMSR_MESSAGE_FAIL; 1985 } 1986 message_out: 1987 sg = scsi_sglist(cmd); 1988 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 1989 return retvalue; 1990 } 1991 1992 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 1993 { 1994 struct list_head *head = &acb->ccb_free_list; 1995 struct CommandControlBlock *ccb = NULL; 1996 unsigned long flags; 1997 spin_lock_irqsave(&acb->ccblist_lock, flags); 1998 if (!list_empty(head)) { 1999 ccb = list_entry(head->next, struct CommandControlBlock, list); 2000 list_del_init(&ccb->list); 2001 }else{ 2002 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2003 return 0; 2004 } 2005 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2006 return ccb; 2007 } 2008 2009 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2010 struct scsi_cmnd *cmd) 2011 { 2012 switch (cmd->cmnd[0]) { 2013 case INQUIRY: { 2014 unsigned char inqdata[36]; 2015 char *buffer; 2016 struct scatterlist *sg; 2017 2018 if (cmd->device->lun) { 2019 cmd->result = (DID_TIME_OUT << 16); 2020 cmd->scsi_done(cmd); 2021 return; 2022 } 2023 inqdata[0] = TYPE_PROCESSOR; 2024 /* Periph Qualifier & Periph Dev Type */ 2025 inqdata[1] = 0; 2026 /* rem media bit & Dev Type Modifier */ 2027 inqdata[2] = 0; 2028 /* ISO, ECMA, & ANSI versions */ 2029 inqdata[4] = 31; 2030 /* length of additional data */ 2031 strncpy(&inqdata[8], "Areca ", 8); 2032 /* Vendor Identification */ 2033 strncpy(&inqdata[16], "RAID controller ", 16); 2034 /* Product Identification */ 2035 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2036 2037 sg = scsi_sglist(cmd); 2038 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 2039 2040 memcpy(buffer, inqdata, sizeof(inqdata)); 2041 sg = scsi_sglist(cmd); 2042 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2043 2044 cmd->scsi_done(cmd); 2045 } 2046 break; 2047 case WRITE_BUFFER: 2048 case READ_BUFFER: { 2049 if (arcmsr_iop_message_xfer(acb, cmd)) 2050 cmd->result = (DID_ERROR << 16); 2051 cmd->scsi_done(cmd); 2052 } 2053 break; 2054 default: 2055 cmd->scsi_done(cmd); 2056 } 2057 } 2058 2059 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2060 void (* done)(struct scsi_cmnd *)) 2061 { 2062 struct Scsi_Host *host = cmd->device->host; 2063 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2064 struct CommandControlBlock *ccb; 2065 int target = cmd->device->id; 2066 int lun = cmd->device->lun; 2067 uint8_t scsicmd = cmd->cmnd[0]; 2068 cmd->scsi_done = done; 2069 cmd->host_scribble = NULL; 2070 cmd->result = 0; 2071 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2072 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2073 cmd->result = (DID_NO_CONNECT << 16); 2074 } 2075 cmd->scsi_done(cmd); 2076 return 0; 2077 } 2078 if (target == 16) { 2079 /* virtual device for iop message transfer */ 2080 arcmsr_handle_virtual_command(acb, cmd); 2081 return 0; 2082 } 2083 if (atomic_read(&acb->ccboutstandingcount) >= 2084 ARCMSR_MAX_OUTSTANDING_CMD) 2085 return SCSI_MLQUEUE_HOST_BUSY; 2086 ccb = arcmsr_get_freeccb(acb); 2087 if (!ccb) 2088 return SCSI_MLQUEUE_HOST_BUSY; 2089 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2090 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2091 cmd->scsi_done(cmd); 2092 return 0; 2093 } 2094 arcmsr_post_ccb(acb, ccb); 2095 return 0; 2096 } 2097 2098 static DEF_SCSI_QCMD(arcmsr_queue_command) 2099 2100 static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb) 2101 { 2102 struct MessageUnit_A __iomem *reg = acb->pmuA; 2103 char *acb_firm_model = acb->firm_model; 2104 char *acb_firm_version = acb->firm_version; 2105 char *acb_device_map = acb->device_map; 2106 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2107 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2108 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2109 int count; 2110 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2111 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2112 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2113 miscellaneous data' timeout \n", acb->host->host_no); 2114 return false; 2115 } 2116 count = 8; 2117 while (count){ 2118 *acb_firm_model = readb(iop_firm_model); 2119 acb_firm_model++; 2120 iop_firm_model++; 2121 count--; 2122 } 2123 2124 count = 16; 2125 while (count){ 2126 *acb_firm_version = readb(iop_firm_version); 2127 acb_firm_version++; 2128 iop_firm_version++; 2129 count--; 2130 } 2131 2132 count=16; 2133 while(count){ 2134 *acb_device_map = readb(iop_device_map); 2135 acb_device_map++; 2136 iop_device_map++; 2137 count--; 2138 } 2139 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2140 acb->host->host_no, 2141 acb->firm_version, 2142 acb->firm_model); 2143 acb->signature = readl(®->message_rwbuffer[0]); 2144 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2145 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2146 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2147 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2148 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2149 return true; 2150 } 2151 static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) 2152 { 2153 struct MessageUnit_B *reg = acb->pmuB; 2154 struct pci_dev *pdev = acb->pdev; 2155 void *dma_coherent; 2156 dma_addr_t dma_coherent_handle; 2157 char *acb_firm_model = acb->firm_model; 2158 char *acb_firm_version = acb->firm_version; 2159 char *acb_device_map = acb->device_map; 2160 char __iomem *iop_firm_model; 2161 /*firm_model,15,60-67*/ 2162 char __iomem *iop_firm_version; 2163 /*firm_version,17,68-83*/ 2164 char __iomem *iop_device_map; 2165 /*firm_version,21,84-99*/ 2166 int count; 2167 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); 2168 if (!dma_coherent){ 2169 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); 2170 return false; 2171 } 2172 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; 2173 reg = (struct MessageUnit_B *)dma_coherent; 2174 acb->pmuB = reg; 2175 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); 2176 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); 2177 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); 2178 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); 2179 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); 2180 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); 2181 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); 2182 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2183 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2184 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2185 2186 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2187 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2188 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2189 miscellaneous data' timeout \n", acb->host->host_no); 2190 return false; 2191 } 2192 count = 8; 2193 while (count){ 2194 *acb_firm_model = readb(iop_firm_model); 2195 acb_firm_model++; 2196 iop_firm_model++; 2197 count--; 2198 } 2199 count = 16; 2200 while (count){ 2201 *acb_firm_version = readb(iop_firm_version); 2202 acb_firm_version++; 2203 iop_firm_version++; 2204 count--; 2205 } 2206 2207 count = 16; 2208 while(count){ 2209 *acb_device_map = readb(iop_device_map); 2210 acb_device_map++; 2211 iop_device_map++; 2212 count--; 2213 } 2214 2215 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2216 acb->host->host_no, 2217 acb->firm_version, 2218 acb->firm_model); 2219 2220 acb->signature = readl(®->message_rwbuffer[1]); 2221 /*firm_signature,1,00-03*/ 2222 acb->firm_request_len = readl(®->message_rwbuffer[2]); 2223 /*firm_request_len,1,04-07*/ 2224 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]); 2225 /*firm_numbers_queue,2,08-11*/ 2226 acb->firm_sdram_size = readl(®->message_rwbuffer[4]); 2227 /*firm_sdram_size,3,12-15*/ 2228 acb->firm_hd_channels = readl(®->message_rwbuffer[5]); 2229 /*firm_ide_channels,4,16-19*/ 2230 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2231 /*firm_ide_channels,4,16-19*/ 2232 return true; 2233 } 2234 2235 static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) 2236 { 2237 uint32_t intmask_org, Index, firmware_state = 0; 2238 struct MessageUnit_C *reg = pACB->pmuC; 2239 char *acb_firm_model = pACB->firm_model; 2240 char *acb_firm_version = pACB->firm_version; 2241 char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2242 char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2243 int count; 2244 /* disable all outbound interrupt */ 2245 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2246 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2247 /* wait firmware ready */ 2248 do { 2249 firmware_state = readl(®->outbound_msgaddr1); 2250 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2251 /* post "get config" instruction */ 2252 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2253 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2254 /* wait message ready */ 2255 for (Index = 0; Index < 2000; Index++) { 2256 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2257 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2258 break; 2259 } 2260 udelay(10); 2261 } /*max 1 seconds*/ 2262 if (Index >= 2000) { 2263 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2264 miscellaneous data' timeout \n", pACB->host->host_no); 2265 return false; 2266 } 2267 count = 8; 2268 while (count) { 2269 *acb_firm_model = readb(iop_firm_model); 2270 acb_firm_model++; 2271 iop_firm_model++; 2272 count--; 2273 } 2274 count = 16; 2275 while (count) { 2276 *acb_firm_version = readb(iop_firm_version); 2277 acb_firm_version++; 2278 iop_firm_version++; 2279 count--; 2280 } 2281 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2282 pACB->host->host_no, 2283 pACB->firm_version, 2284 pACB->firm_model); 2285 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2286 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2287 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2288 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2289 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2290 /*all interrupt service will be enable at arcmsr_iop_init*/ 2291 return true; 2292 } 2293 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2294 { 2295 if (acb->adapter_type == ACB_ADAPTER_TYPE_A) 2296 return arcmsr_get_hba_config(acb); 2297 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B) 2298 return arcmsr_get_hbb_config(acb); 2299 else 2300 return arcmsr_get_hbc_config(acb); 2301 } 2302 2303 static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 2304 struct CommandControlBlock *poll_ccb) 2305 { 2306 struct MessageUnit_A __iomem *reg = acb->pmuA; 2307 struct CommandControlBlock *ccb; 2308 struct ARCMSR_CDB *arcmsr_cdb; 2309 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2310 int rtn; 2311 bool error; 2312 polling_hba_ccb_retry: 2313 poll_count++; 2314 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2315 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2316 while (1) { 2317 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2318 if (poll_ccb_done){ 2319 rtn = SUCCESS; 2320 break; 2321 }else { 2322 msleep(25); 2323 if (poll_count > 100){ 2324 rtn = FAILED; 2325 break; 2326 } 2327 goto polling_hba_ccb_retry; 2328 } 2329 } 2330 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2331 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2332 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2333 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2334 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2335 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2336 " poll command abort successfully \n" 2337 , acb->host->host_no 2338 , ccb->pcmd->device->id 2339 , ccb->pcmd->device->lun 2340 , ccb); 2341 ccb->pcmd->result = DID_ABORT << 16; 2342 arcmsr_ccb_complete(ccb); 2343 continue; 2344 } 2345 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2346 " command done ccb = '0x%p'" 2347 "ccboutstandingcount = %d \n" 2348 , acb->host->host_no 2349 , ccb 2350 , atomic_read(&acb->ccboutstandingcount)); 2351 continue; 2352 } 2353 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2354 arcmsr_report_ccb_state(acb, ccb, error); 2355 } 2356 return rtn; 2357 } 2358 2359 static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 2360 struct CommandControlBlock *poll_ccb) 2361 { 2362 struct MessageUnit_B *reg = acb->pmuB; 2363 struct ARCMSR_CDB *arcmsr_cdb; 2364 struct CommandControlBlock *ccb; 2365 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2366 int index, rtn; 2367 bool error; 2368 polling_hbb_ccb_retry: 2369 2370 poll_count++; 2371 /* clear doorbell interrupt */ 2372 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2373 while(1){ 2374 index = reg->doneq_index; 2375 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { 2376 if (poll_ccb_done){ 2377 rtn = SUCCESS; 2378 break; 2379 }else { 2380 msleep(25); 2381 if (poll_count > 100){ 2382 rtn = FAILED; 2383 break; 2384 } 2385 goto polling_hbb_ccb_retry; 2386 } 2387 } 2388 writel(0, ®->done_qbuffer[index]); 2389 index++; 2390 /*if last index number set it to 0 */ 2391 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2392 reg->doneq_index = index; 2393 /* check if command done with no error*/ 2394 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2395 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2396 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2397 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2398 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2399 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2400 " poll command abort successfully \n" 2401 ,acb->host->host_no 2402 ,ccb->pcmd->device->id 2403 ,ccb->pcmd->device->lun 2404 ,ccb); 2405 ccb->pcmd->result = DID_ABORT << 16; 2406 arcmsr_ccb_complete(ccb); 2407 continue; 2408 } 2409 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2410 " command done ccb = '0x%p'" 2411 "ccboutstandingcount = %d \n" 2412 , acb->host->host_no 2413 , ccb 2414 , atomic_read(&acb->ccboutstandingcount)); 2415 continue; 2416 } 2417 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2418 arcmsr_report_ccb_state(acb, ccb, error); 2419 } 2420 return rtn; 2421 } 2422 2423 static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) 2424 { 2425 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2426 uint32_t flag_ccb, ccb_cdb_phy; 2427 struct ARCMSR_CDB *arcmsr_cdb; 2428 bool error; 2429 struct CommandControlBlock *pCCB; 2430 uint32_t poll_ccb_done = 0, poll_count = 0; 2431 int rtn; 2432 polling_hbc_ccb_retry: 2433 poll_count++; 2434 while (1) { 2435 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 2436 if (poll_ccb_done) { 2437 rtn = SUCCESS; 2438 break; 2439 } else { 2440 msleep(25); 2441 if (poll_count > 100) { 2442 rtn = FAILED; 2443 break; 2444 } 2445 goto polling_hbc_ccb_retry; 2446 } 2447 } 2448 flag_ccb = readl(®->outbound_queueport_low); 2449 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2450 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 2451 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2452 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0; 2453 /* check ifcommand done with no error*/ 2454 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 2455 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 2456 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2457 " poll command abort successfully \n" 2458 , acb->host->host_no 2459 , pCCB->pcmd->device->id 2460 , pCCB->pcmd->device->lun 2461 , pCCB); 2462 pCCB->pcmd->result = DID_ABORT << 16; 2463 arcmsr_ccb_complete(pCCB); 2464 continue; 2465 } 2466 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2467 " command done ccb = '0x%p'" 2468 "ccboutstandingcount = %d \n" 2469 , acb->host->host_no 2470 , pCCB 2471 , atomic_read(&acb->ccboutstandingcount)); 2472 continue; 2473 } 2474 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 2475 arcmsr_report_ccb_state(acb, pCCB, error); 2476 } 2477 return rtn; 2478 } 2479 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 2480 struct CommandControlBlock *poll_ccb) 2481 { 2482 int rtn = 0; 2483 switch (acb->adapter_type) { 2484 2485 case ACB_ADAPTER_TYPE_A: { 2486 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb); 2487 } 2488 break; 2489 2490 case ACB_ADAPTER_TYPE_B: { 2491 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb); 2492 } 2493 break; 2494 case ACB_ADAPTER_TYPE_C: { 2495 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb); 2496 } 2497 } 2498 return rtn; 2499 } 2500 2501 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 2502 { 2503 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 2504 dma_addr_t dma_coherent_handle; 2505 /* 2506 ******************************************************************** 2507 ** here we need to tell iop 331 our freeccb.HighPart 2508 ** if freeccb.HighPart is not zero 2509 ******************************************************************** 2510 */ 2511 dma_coherent_handle = acb->dma_coherent_handle; 2512 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 2513 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 2514 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 2515 /* 2516 *********************************************************************** 2517 ** if adapter type B, set window of "post command Q" 2518 *********************************************************************** 2519 */ 2520 switch (acb->adapter_type) { 2521 2522 case ACB_ADAPTER_TYPE_A: { 2523 if (cdb_phyaddr_hi32 != 0) { 2524 struct MessageUnit_A __iomem *reg = acb->pmuA; 2525 uint32_t intmask_org; 2526 intmask_org = arcmsr_disable_outbound_ints(acb); 2527 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 2528 ®->message_rwbuffer[0]); 2529 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 2530 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 2531 ®->inbound_msgaddr0); 2532 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2533 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 2534 part physical address timeout\n", 2535 acb->host->host_no); 2536 return 1; 2537 } 2538 arcmsr_enable_outbound_ints(acb, intmask_org); 2539 } 2540 } 2541 break; 2542 2543 case ACB_ADAPTER_TYPE_B: { 2544 unsigned long post_queue_phyaddr; 2545 uint32_t __iomem *rwbuffer; 2546 2547 struct MessageUnit_B *reg = acb->pmuB; 2548 uint32_t intmask_org; 2549 intmask_org = arcmsr_disable_outbound_ints(acb); 2550 reg->postq_index = 0; 2551 reg->doneq_index = 0; 2552 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 2553 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2554 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 2555 acb->host->host_no); 2556 return 1; 2557 } 2558 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; 2559 rwbuffer = reg->message_rwbuffer; 2560 /* driver "set config" signature */ 2561 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 2562 /* normal should be zero */ 2563 writel(cdb_phyaddr_hi32, rwbuffer++); 2564 /* postQ size (256 + 8)*4 */ 2565 writel(post_queue_phyaddr, rwbuffer++); 2566 /* doneQ size (256 + 8)*4 */ 2567 writel(post_queue_phyaddr + 1056, rwbuffer++); 2568 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 2569 writel(1056, rwbuffer); 2570 2571 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 2572 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2573 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2574 timeout \n",acb->host->host_no); 2575 return 1; 2576 } 2577 arcmsr_hbb_enable_driver_mode(acb); 2578 arcmsr_enable_outbound_ints(acb, intmask_org); 2579 } 2580 break; 2581 case ACB_ADAPTER_TYPE_C: { 2582 if (cdb_phyaddr_hi32 != 0) { 2583 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2584 2585 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 2586 acb->adapter_index, cdb_phyaddr_hi32); 2587 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 2588 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 2589 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 2590 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2591 if (!arcmsr_hbc_wait_msgint_ready(acb)) { 2592 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2593 timeout \n", acb->host->host_no); 2594 return 1; 2595 } 2596 } 2597 } 2598 } 2599 return 0; 2600 } 2601 2602 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 2603 { 2604 uint32_t firmware_state = 0; 2605 switch (acb->adapter_type) { 2606 2607 case ACB_ADAPTER_TYPE_A: { 2608 struct MessageUnit_A __iomem *reg = acb->pmuA; 2609 do { 2610 firmware_state = readl(®->outbound_msgaddr1); 2611 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 2612 } 2613 break; 2614 2615 case ACB_ADAPTER_TYPE_B: { 2616 struct MessageUnit_B *reg = acb->pmuB; 2617 do { 2618 firmware_state = readl(reg->iop2drv_doorbell); 2619 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2620 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2621 } 2622 break; 2623 case ACB_ADAPTER_TYPE_C: { 2624 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2625 do { 2626 firmware_state = readl(®->outbound_msgaddr1); 2627 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2628 } 2629 } 2630 } 2631 2632 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) 2633 { 2634 struct MessageUnit_A __iomem *reg = acb->pmuA; 2635 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2636 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2637 return; 2638 } else { 2639 acb->fw_flag = FW_NORMAL; 2640 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 2641 atomic_set(&acb->rq_map_token, 16); 2642 } 2643 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2644 if (atomic_dec_and_test(&acb->rq_map_token)) { 2645 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2646 return; 2647 } 2648 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2649 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2650 } 2651 return; 2652 } 2653 2654 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) 2655 { 2656 struct MessageUnit_B __iomem *reg = acb->pmuB; 2657 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2658 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2659 return; 2660 } else { 2661 acb->fw_flag = FW_NORMAL; 2662 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2663 atomic_set(&acb->rq_map_token, 16); 2664 } 2665 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2666 if (atomic_dec_and_test(&acb->rq_map_token)) { 2667 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2668 return; 2669 } 2670 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2671 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2672 } 2673 return; 2674 } 2675 2676 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) 2677 { 2678 struct MessageUnit_C __iomem *reg = acb->pmuC; 2679 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 2680 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2681 return; 2682 } else { 2683 acb->fw_flag = FW_NORMAL; 2684 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2685 atomic_set(&acb->rq_map_token, 16); 2686 } 2687 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2688 if (atomic_dec_and_test(&acb->rq_map_token)) { 2689 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2690 return; 2691 } 2692 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2693 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2694 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2695 } 2696 return; 2697 } 2698 2699 static void arcmsr_request_device_map(unsigned long pacb) 2700 { 2701 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 2702 switch (acb->adapter_type) { 2703 case ACB_ADAPTER_TYPE_A: { 2704 arcmsr_request_hba_device_map(acb); 2705 } 2706 break; 2707 case ACB_ADAPTER_TYPE_B: { 2708 arcmsr_request_hbb_device_map(acb); 2709 } 2710 break; 2711 case ACB_ADAPTER_TYPE_C: { 2712 arcmsr_request_hbc_device_map(acb); 2713 } 2714 } 2715 } 2716 2717 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) 2718 { 2719 struct MessageUnit_A __iomem *reg = acb->pmuA; 2720 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2721 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 2722 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2723 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2724 rebulid' timeout \n", acb->host->host_no); 2725 } 2726 } 2727 2728 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) 2729 { 2730 struct MessageUnit_B *reg = acb->pmuB; 2731 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2732 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 2733 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2734 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2735 rebulid' timeout \n",acb->host->host_no); 2736 } 2737 } 2738 2739 static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) 2740 { 2741 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 2742 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2743 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 2744 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 2745 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 2746 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2747 rebulid' timeout \n", pACB->host->host_no); 2748 } 2749 return; 2750 } 2751 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 2752 { 2753 switch (acb->adapter_type) { 2754 case ACB_ADAPTER_TYPE_A: 2755 arcmsr_start_hba_bgrb(acb); 2756 break; 2757 case ACB_ADAPTER_TYPE_B: 2758 arcmsr_start_hbb_bgrb(acb); 2759 break; 2760 case ACB_ADAPTER_TYPE_C: 2761 arcmsr_start_hbc_bgrb(acb); 2762 } 2763 } 2764 2765 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 2766 { 2767 switch (acb->adapter_type) { 2768 case ACB_ADAPTER_TYPE_A: { 2769 struct MessageUnit_A __iomem *reg = acb->pmuA; 2770 uint32_t outbound_doorbell; 2771 /* empty doorbell Qbuffer if door bell ringed */ 2772 outbound_doorbell = readl(®->outbound_doorbell); 2773 /*clear doorbell interrupt */ 2774 writel(outbound_doorbell, ®->outbound_doorbell); 2775 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2776 } 2777 break; 2778 2779 case ACB_ADAPTER_TYPE_B: { 2780 struct MessageUnit_B *reg = acb->pmuB; 2781 /*clear interrupt and message state*/ 2782 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2783 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 2784 /* let IOP know data has been read */ 2785 } 2786 break; 2787 case ACB_ADAPTER_TYPE_C: { 2788 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2789 uint32_t outbound_doorbell; 2790 /* empty doorbell Qbuffer if door bell ringed */ 2791 outbound_doorbell = readl(®->outbound_doorbell); 2792 writel(outbound_doorbell, ®->outbound_doorbell_clear); 2793 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 2794 } 2795 } 2796 } 2797 2798 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 2799 { 2800 switch (acb->adapter_type) { 2801 case ACB_ADAPTER_TYPE_A: 2802 return; 2803 case ACB_ADAPTER_TYPE_B: 2804 { 2805 struct MessageUnit_B *reg = acb->pmuB; 2806 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 2807 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2808 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2809 return; 2810 } 2811 } 2812 break; 2813 case ACB_ADAPTER_TYPE_C: 2814 return; 2815 } 2816 return; 2817 } 2818 2819 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 2820 { 2821 uint8_t value[64]; 2822 int i, count = 0; 2823 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 2824 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 2825 u32 temp = 0; 2826 /* backup pci config data */ 2827 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 2828 for (i = 0; i < 64; i++) { 2829 pci_read_config_byte(acb->pdev, i, &value[i]); 2830 } 2831 /* hardware reset signal */ 2832 if ((acb->dev_id == 0x1680)) { 2833 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 2834 } else if ((acb->dev_id == 0x1880)) { 2835 do { 2836 count++; 2837 writel(0xF, &pmuC->write_sequence); 2838 writel(0x4, &pmuC->write_sequence); 2839 writel(0xB, &pmuC->write_sequence); 2840 writel(0x2, &pmuC->write_sequence); 2841 writel(0x7, &pmuC->write_sequence); 2842 writel(0xD, &pmuC->write_sequence); 2843 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 2844 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 2845 } else { 2846 pci_write_config_byte(acb->pdev, 0x84, 0x20); 2847 } 2848 msleep(2000); 2849 /* write back pci config data */ 2850 for (i = 0; i < 64; i++) { 2851 pci_write_config_byte(acb->pdev, i, value[i]); 2852 } 2853 msleep(1000); 2854 return; 2855 } 2856 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2857 { 2858 uint32_t intmask_org; 2859 /* disable all outbound interrupt */ 2860 intmask_org = arcmsr_disable_outbound_ints(acb); 2861 arcmsr_wait_firmware_ready(acb); 2862 arcmsr_iop_confirm(acb); 2863 /*start background rebuild*/ 2864 arcmsr_start_adapter_bgrb(acb); 2865 /* empty doorbell Qbuffer if door bell ringed */ 2866 arcmsr_clear_doorbell_queue_buffer(acb); 2867 arcmsr_enable_eoi_mode(acb); 2868 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2869 arcmsr_enable_outbound_ints(acb, intmask_org); 2870 acb->acb_flags |= ACB_F_IOP_INITED; 2871 } 2872 2873 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 2874 { 2875 struct CommandControlBlock *ccb; 2876 uint32_t intmask_org; 2877 uint8_t rtnval = 0x00; 2878 int i = 0; 2879 unsigned long flags; 2880 2881 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2882 /* disable all outbound interrupt */ 2883 intmask_org = arcmsr_disable_outbound_ints(acb); 2884 /* talk to iop 331 outstanding command aborted */ 2885 rtnval = arcmsr_abort_allcmd(acb); 2886 /* clear all outbound posted Q */ 2887 arcmsr_done4abort_postqueue(acb); 2888 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2889 ccb = acb->pccb_pool[i]; 2890 if (ccb->startdone == ARCMSR_CCB_START) { 2891 scsi_dma_unmap(ccb->pcmd); 2892 ccb->startdone = ARCMSR_CCB_DONE; 2893 ccb->ccb_flags = 0; 2894 spin_lock_irqsave(&acb->ccblist_lock, flags); 2895 list_add_tail(&ccb->list, &acb->ccb_free_list); 2896 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2897 } 2898 } 2899 atomic_set(&acb->ccboutstandingcount, 0); 2900 /* enable all outbound interrupt */ 2901 arcmsr_enable_outbound_ints(acb, intmask_org); 2902 return rtnval; 2903 } 2904 return rtnval; 2905 } 2906 2907 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 2908 { 2909 struct AdapterControlBlock *acb; 2910 uint32_t intmask_org, outbound_doorbell; 2911 int retry_count = 0; 2912 int rtn = FAILED; 2913 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 2914 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 2915 acb->num_resets++; 2916 2917 switch(acb->adapter_type){ 2918 case ACB_ADAPTER_TYPE_A:{ 2919 if (acb->acb_flags & ACB_F_BUS_RESET){ 2920 long timeout; 2921 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 2922 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 2923 if (timeout) { 2924 return SUCCESS; 2925 } 2926 } 2927 acb->acb_flags |= ACB_F_BUS_RESET; 2928 if (!arcmsr_iop_reset(acb)) { 2929 struct MessageUnit_A __iomem *reg; 2930 reg = acb->pmuA; 2931 arcmsr_hardware_reset(acb); 2932 acb->acb_flags &= ~ACB_F_IOP_INITED; 2933 sleep_again: 2934 ssleep(ARCMSR_SLEEPTIME); 2935 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 2936 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 2937 if (retry_count > ARCMSR_RETRYCOUNT) { 2938 acb->fw_flag = FW_DEADLOCK; 2939 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 2940 return FAILED; 2941 } 2942 retry_count++; 2943 goto sleep_again; 2944 } 2945 acb->acb_flags |= ACB_F_IOP_INITED; 2946 /* disable all outbound interrupt */ 2947 intmask_org = arcmsr_disable_outbound_ints(acb); 2948 arcmsr_get_firmware_spec(acb); 2949 arcmsr_start_adapter_bgrb(acb); 2950 /* clear Qbuffer if door bell ringed */ 2951 outbound_doorbell = readl(®->outbound_doorbell); 2952 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 2953 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2954 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2955 arcmsr_enable_outbound_ints(acb, intmask_org); 2956 atomic_set(&acb->rq_map_token, 16); 2957 atomic_set(&acb->ante_token_value, 16); 2958 acb->fw_flag = FW_NORMAL; 2959 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2960 acb->acb_flags &= ~ACB_F_BUS_RESET; 2961 rtn = SUCCESS; 2962 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 2963 } else { 2964 acb->acb_flags &= ~ACB_F_BUS_RESET; 2965 atomic_set(&acb->rq_map_token, 16); 2966 atomic_set(&acb->ante_token_value, 16); 2967 acb->fw_flag = FW_NORMAL; 2968 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 2969 rtn = SUCCESS; 2970 } 2971 break; 2972 } 2973 case ACB_ADAPTER_TYPE_B:{ 2974 acb->acb_flags |= ACB_F_BUS_RESET; 2975 if (!arcmsr_iop_reset(acb)) { 2976 acb->acb_flags &= ~ACB_F_BUS_RESET; 2977 rtn = FAILED; 2978 } else { 2979 acb->acb_flags &= ~ACB_F_BUS_RESET; 2980 atomic_set(&acb->rq_map_token, 16); 2981 atomic_set(&acb->ante_token_value, 16); 2982 acb->fw_flag = FW_NORMAL; 2983 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2984 rtn = SUCCESS; 2985 } 2986 break; 2987 } 2988 case ACB_ADAPTER_TYPE_C:{ 2989 if (acb->acb_flags & ACB_F_BUS_RESET) { 2990 long timeout; 2991 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 2992 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 2993 if (timeout) { 2994 return SUCCESS; 2995 } 2996 } 2997 acb->acb_flags |= ACB_F_BUS_RESET; 2998 if (!arcmsr_iop_reset(acb)) { 2999 struct MessageUnit_C __iomem *reg; 3000 reg = acb->pmuC; 3001 arcmsr_hardware_reset(acb); 3002 acb->acb_flags &= ~ACB_F_IOP_INITED; 3003 sleep: 3004 ssleep(ARCMSR_SLEEPTIME); 3005 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3006 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3007 if (retry_count > ARCMSR_RETRYCOUNT) { 3008 acb->fw_flag = FW_DEADLOCK; 3009 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3010 return FAILED; 3011 } 3012 retry_count++; 3013 goto sleep; 3014 } 3015 acb->acb_flags |= ACB_F_IOP_INITED; 3016 /* disable all outbound interrupt */ 3017 intmask_org = arcmsr_disable_outbound_ints(acb); 3018 arcmsr_get_firmware_spec(acb); 3019 arcmsr_start_adapter_bgrb(acb); 3020 /* clear Qbuffer if door bell ringed */ 3021 outbound_doorbell = readl(®->outbound_doorbell); 3022 writel(outbound_doorbell, ®->outbound_doorbell_clear); /*clear interrupt */ 3023 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3024 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3025 arcmsr_enable_outbound_ints(acb, intmask_org); 3026 atomic_set(&acb->rq_map_token, 16); 3027 atomic_set(&acb->ante_token_value, 16); 3028 acb->fw_flag = FW_NORMAL; 3029 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3030 acb->acb_flags &= ~ACB_F_BUS_RESET; 3031 rtn = SUCCESS; 3032 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3033 } else { 3034 acb->acb_flags &= ~ACB_F_BUS_RESET; 3035 atomic_set(&acb->rq_map_token, 16); 3036 atomic_set(&acb->ante_token_value, 16); 3037 acb->fw_flag = FW_NORMAL; 3038 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3039 rtn = SUCCESS; 3040 } 3041 break; 3042 } 3043 } 3044 return rtn; 3045 } 3046 3047 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3048 struct CommandControlBlock *ccb) 3049 { 3050 int rtn; 3051 rtn = arcmsr_polling_ccbdone(acb, ccb); 3052 return rtn; 3053 } 3054 3055 static int arcmsr_abort(struct scsi_cmnd *cmd) 3056 { 3057 struct AdapterControlBlock *acb = 3058 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3059 int i = 0; 3060 int rtn = FAILED; 3061 printk(KERN_NOTICE 3062 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 3063 acb->host->host_no, cmd->device->id, cmd->device->lun); 3064 acb->acb_flags |= ACB_F_ABORT; 3065 acb->num_aborts++; 3066 /* 3067 ************************************************ 3068 ** the all interrupt service routine is locked 3069 ** we need to handle it as soon as possible and exit 3070 ************************************************ 3071 */ 3072 if (!atomic_read(&acb->ccboutstandingcount)) 3073 return rtn; 3074 3075 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3076 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3077 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3078 ccb->startdone = ARCMSR_CCB_ABORTED; 3079 rtn = arcmsr_abort_one_cmd(acb, ccb); 3080 break; 3081 } 3082 } 3083 acb->acb_flags &= ~ACB_F_ABORT; 3084 return rtn; 3085 } 3086 3087 static const char *arcmsr_info(struct Scsi_Host *host) 3088 { 3089 struct AdapterControlBlock *acb = 3090 (struct AdapterControlBlock *) host->hostdata; 3091 static char buf[256]; 3092 char *type; 3093 int raid6 = 1; 3094 switch (acb->pdev->device) { 3095 case PCI_DEVICE_ID_ARECA_1110: 3096 case PCI_DEVICE_ID_ARECA_1200: 3097 case PCI_DEVICE_ID_ARECA_1202: 3098 case PCI_DEVICE_ID_ARECA_1210: 3099 raid6 = 0; 3100 /*FALLTHRU*/ 3101 case PCI_DEVICE_ID_ARECA_1120: 3102 case PCI_DEVICE_ID_ARECA_1130: 3103 case PCI_DEVICE_ID_ARECA_1160: 3104 case PCI_DEVICE_ID_ARECA_1170: 3105 case PCI_DEVICE_ID_ARECA_1201: 3106 case PCI_DEVICE_ID_ARECA_1220: 3107 case PCI_DEVICE_ID_ARECA_1230: 3108 case PCI_DEVICE_ID_ARECA_1260: 3109 case PCI_DEVICE_ID_ARECA_1270: 3110 case PCI_DEVICE_ID_ARECA_1280: 3111 type = "SATA"; 3112 break; 3113 case PCI_DEVICE_ID_ARECA_1380: 3114 case PCI_DEVICE_ID_ARECA_1381: 3115 case PCI_DEVICE_ID_ARECA_1680: 3116 case PCI_DEVICE_ID_ARECA_1681: 3117 case PCI_DEVICE_ID_ARECA_1880: 3118 type = "SAS"; 3119 break; 3120 default: 3121 type = "X-TYPE"; 3122 break; 3123 } 3124 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", 3125 type, raid6 ? "( RAID6 capable)" : "", 3126 ARCMSR_DRIVER_VERSION); 3127 return buf; 3128 } 3129