1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Nick Cheng, C.L. Huang 6 ** Description: SCSI RAID Device Driver for Areca RAID Controller 7 ******************************************************************************* 8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved 9 ** 10 ** Web site: www.areca.com.tw 11 ** E-mail: support@areca.com.tw 12 ** 13 ** This program is free software; you can redistribute it and/or modify 14 ** it under the terms of the GNU General Public License version 2 as 15 ** published by the Free Software Foundation. 16 ** This program is distributed in the hope that it will be useful, 17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 ** GNU General Public License for more details. 20 ******************************************************************************* 21 ** Redistribution and use in source and binary forms, with or without 22 ** modification, are permitted provided that the following conditions 23 ** are met: 24 ** 1. Redistributions of source code must retain the above copyright 25 ** notice, this list of conditions and the following disclaimer. 26 ** 2. Redistributions in binary form must reproduce the above copyright 27 ** notice, this list of conditions and the following disclaimer in the 28 ** documentation and/or other materials provided with the distribution. 29 ** 3. The name of the author may not be used to endorse or promote products 30 ** derived from this software without specific prior written permission. 31 ** 32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 42 ******************************************************************************* 43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 44 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 45 ******************************************************************************* 46 */ 47 #include <linux/module.h> 48 #include <linux/reboot.h> 49 #include <linux/spinlock.h> 50 #include <linux/pci_ids.h> 51 #include <linux/interrupt.h> 52 #include <linux/moduleparam.h> 53 #include <linux/errno.h> 54 #include <linux/types.h> 55 #include <linux/delay.h> 56 #include <linux/dma-mapping.h> 57 #include <linux/timer.h> 58 #include <linux/slab.h> 59 #include <linux/pci.h> 60 #include <linux/aer.h> 61 #include <linux/circ_buf.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <asm/uaccess.h> 65 #include <scsi/scsi_host.h> 66 #include <scsi/scsi.h> 67 #include <scsi/scsi_cmnd.h> 68 #include <scsi/scsi_tcq.h> 69 #include <scsi/scsi_device.h> 70 #include <scsi/scsi_transport.h> 71 #include <scsi/scsicam.h> 72 #include "arcmsr.h" 73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>"); 74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver"); 75 MODULE_LICENSE("Dual BSD/GPL"); 76 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 77 78 #define ARCMSR_SLEEPTIME 10 79 #define ARCMSR_RETRYCOUNT 12 80 81 static wait_queue_head_t wait_q; 82 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 83 struct scsi_cmnd *cmd); 84 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 85 static int arcmsr_abort(struct scsi_cmnd *); 86 static int arcmsr_bus_reset(struct scsi_cmnd *); 87 static int arcmsr_bios_param(struct scsi_device *sdev, 88 struct block_device *bdev, sector_t capacity, int *info); 89 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 90 static int arcmsr_probe(struct pci_dev *pdev, 91 const struct pci_device_id *id); 92 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state); 93 static int arcmsr_resume(struct pci_dev *pdev); 94 static void arcmsr_remove(struct pci_dev *pdev); 95 static void arcmsr_shutdown(struct pci_dev *pdev); 96 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 97 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 98 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 99 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 100 u32 intmask_org); 101 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 102 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb); 103 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb); 104 static void arcmsr_request_device_map(unsigned long pacb); 105 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb); 106 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb); 107 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb); 108 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 109 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 110 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 111 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB); 112 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb); 113 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 114 static const char *arcmsr_info(struct Scsi_Host *); 115 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 116 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *); 117 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb); 118 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth) 119 { 120 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 121 queue_depth = ARCMSR_MAX_CMD_PERLUN; 122 return scsi_change_queue_depth(sdev, queue_depth); 123 } 124 125 static struct scsi_host_template arcmsr_scsi_host_template = { 126 .module = THIS_MODULE, 127 .name = "Areca SAS/SATA RAID driver", 128 .info = arcmsr_info, 129 .queuecommand = arcmsr_queue_command, 130 .eh_abort_handler = arcmsr_abort, 131 .eh_bus_reset_handler = arcmsr_bus_reset, 132 .bios_param = arcmsr_bios_param, 133 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 134 .can_queue = ARCMSR_MAX_OUTSTANDING_CMD, 135 .this_id = ARCMSR_SCSI_INITIATOR_ID, 136 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 137 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 138 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 139 .use_clustering = ENABLE_CLUSTERING, 140 .shost_attrs = arcmsr_host_attrs, 141 .no_write_same = 1, 142 }; 143 144 static struct pci_device_id arcmsr_device_id_table[] = { 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110), 146 .driver_data = ACB_ADAPTER_TYPE_A}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120), 148 .driver_data = ACB_ADAPTER_TYPE_A}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130), 150 .driver_data = ACB_ADAPTER_TYPE_A}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160), 152 .driver_data = ACB_ADAPTER_TYPE_A}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170), 154 .driver_data = ACB_ADAPTER_TYPE_A}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200), 156 .driver_data = ACB_ADAPTER_TYPE_B}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201), 158 .driver_data = ACB_ADAPTER_TYPE_B}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202), 160 .driver_data = ACB_ADAPTER_TYPE_B}, 161 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1203), 162 .driver_data = ACB_ADAPTER_TYPE_B}, 163 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210), 164 .driver_data = ACB_ADAPTER_TYPE_A}, 165 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214), 166 .driver_data = ACB_ADAPTER_TYPE_D}, 167 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220), 168 .driver_data = ACB_ADAPTER_TYPE_A}, 169 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230), 170 .driver_data = ACB_ADAPTER_TYPE_A}, 171 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260), 172 .driver_data = ACB_ADAPTER_TYPE_A}, 173 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270), 174 .driver_data = ACB_ADAPTER_TYPE_A}, 175 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280), 176 .driver_data = ACB_ADAPTER_TYPE_A}, 177 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380), 178 .driver_data = ACB_ADAPTER_TYPE_A}, 179 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381), 180 .driver_data = ACB_ADAPTER_TYPE_A}, 181 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680), 182 .driver_data = ACB_ADAPTER_TYPE_A}, 183 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681), 184 .driver_data = ACB_ADAPTER_TYPE_A}, 185 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880), 186 .driver_data = ACB_ADAPTER_TYPE_C}, 187 {0, 0}, /* Terminating entry */ 188 }; 189 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 190 191 static struct pci_driver arcmsr_pci_driver = { 192 .name = "arcmsr", 193 .id_table = arcmsr_device_id_table, 194 .probe = arcmsr_probe, 195 .remove = arcmsr_remove, 196 .suspend = arcmsr_suspend, 197 .resume = arcmsr_resume, 198 .shutdown = arcmsr_shutdown, 199 }; 200 /* 201 **************************************************************************** 202 **************************************************************************** 203 */ 204 205 static void arcmsr_free_mu(struct AdapterControlBlock *acb) 206 { 207 switch (acb->adapter_type) { 208 case ACB_ADAPTER_TYPE_B: 209 case ACB_ADAPTER_TYPE_D: { 210 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize, 211 acb->dma_coherent2, acb->dma_coherent_handle2); 212 break; 213 } 214 } 215 } 216 217 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 218 { 219 struct pci_dev *pdev = acb->pdev; 220 switch (acb->adapter_type){ 221 case ACB_ADAPTER_TYPE_A:{ 222 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 223 if (!acb->pmuA) { 224 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 225 return false; 226 } 227 break; 228 } 229 case ACB_ADAPTER_TYPE_B:{ 230 void __iomem *mem_base0, *mem_base1; 231 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 232 if (!mem_base0) { 233 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 234 return false; 235 } 236 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 237 if (!mem_base1) { 238 iounmap(mem_base0); 239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 240 return false; 241 } 242 acb->mem_base0 = mem_base0; 243 acb->mem_base1 = mem_base1; 244 break; 245 } 246 case ACB_ADAPTER_TYPE_C:{ 247 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 248 if (!acb->pmuC) { 249 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 250 return false; 251 } 252 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 253 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 254 return true; 255 } 256 break; 257 } 258 case ACB_ADAPTER_TYPE_D: { 259 void __iomem *mem_base0; 260 unsigned long addr, range, flags; 261 262 addr = (unsigned long)pci_resource_start(pdev, 0); 263 range = pci_resource_len(pdev, 0); 264 flags = pci_resource_flags(pdev, 0); 265 mem_base0 = ioremap(addr, range); 266 if (!mem_base0) { 267 pr_notice("arcmsr%d: memory mapping region fail\n", 268 acb->host->host_no); 269 return false; 270 } 271 acb->mem_base0 = mem_base0; 272 break; 273 } 274 } 275 return true; 276 } 277 278 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 279 { 280 switch (acb->adapter_type) { 281 case ACB_ADAPTER_TYPE_A:{ 282 iounmap(acb->pmuA); 283 } 284 break; 285 case ACB_ADAPTER_TYPE_B:{ 286 iounmap(acb->mem_base0); 287 iounmap(acb->mem_base1); 288 } 289 290 break; 291 case ACB_ADAPTER_TYPE_C:{ 292 iounmap(acb->pmuC); 293 } 294 break; 295 case ACB_ADAPTER_TYPE_D: 296 iounmap(acb->mem_base0); 297 break; 298 } 299 } 300 301 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 302 { 303 irqreturn_t handle_state; 304 struct AdapterControlBlock *acb = dev_id; 305 306 handle_state = arcmsr_interrupt(acb); 307 return handle_state; 308 } 309 310 static int arcmsr_bios_param(struct scsi_device *sdev, 311 struct block_device *bdev, sector_t capacity, int *geom) 312 { 313 int ret, heads, sectors, cylinders, total_capacity; 314 unsigned char *buffer;/* return copy of block device's partition table */ 315 316 buffer = scsi_bios_ptable(bdev); 317 if (buffer) { 318 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 319 kfree(buffer); 320 if (ret != -1) 321 return ret; 322 } 323 total_capacity = capacity; 324 heads = 64; 325 sectors = 32; 326 cylinders = total_capacity / (heads * sectors); 327 if (cylinders > 1024) { 328 heads = 255; 329 sectors = 63; 330 cylinders = total_capacity / (heads * sectors); 331 } 332 geom[0] = heads; 333 geom[1] = sectors; 334 geom[2] = cylinders; 335 return 0; 336 } 337 338 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb) 339 { 340 struct MessageUnit_A __iomem *reg = acb->pmuA; 341 int i; 342 343 for (i = 0; i < 2000; i++) { 344 if (readl(®->outbound_intstatus) & 345 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 346 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 347 ®->outbound_intstatus); 348 return true; 349 } 350 msleep(10); 351 } /* max 20 seconds */ 352 353 return false; 354 } 355 356 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb) 357 { 358 struct MessageUnit_B *reg = acb->pmuB; 359 int i; 360 361 for (i = 0; i < 2000; i++) { 362 if (readl(reg->iop2drv_doorbell) 363 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 364 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, 365 reg->iop2drv_doorbell); 366 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, 367 reg->drv2iop_doorbell); 368 return true; 369 } 370 msleep(10); 371 } /* max 20 seconds */ 372 373 return false; 374 } 375 376 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB) 377 { 378 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 379 int i; 380 381 for (i = 0; i < 2000; i++) { 382 if (readl(&phbcmu->outbound_doorbell) 383 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 384 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, 385 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/ 386 return true; 387 } 388 msleep(10); 389 } /* max 20 seconds */ 390 391 return false; 392 } 393 394 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB) 395 { 396 struct MessageUnit_D *reg = pACB->pmuD; 397 int i; 398 399 for (i = 0; i < 2000; i++) { 400 if (readl(reg->outbound_doorbell) 401 & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 402 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 403 reg->outbound_doorbell); 404 return true; 405 } 406 msleep(10); 407 } /* max 20 seconds */ 408 return false; 409 } 410 411 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb) 412 { 413 struct MessageUnit_A __iomem *reg = acb->pmuA; 414 int retry_count = 30; 415 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 416 do { 417 if (arcmsr_hbaA_wait_msgint_ready(acb)) 418 break; 419 else { 420 retry_count--; 421 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 422 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 423 } 424 } while (retry_count != 0); 425 } 426 427 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb) 428 { 429 struct MessageUnit_B *reg = acb->pmuB; 430 int retry_count = 30; 431 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 432 do { 433 if (arcmsr_hbaB_wait_msgint_ready(acb)) 434 break; 435 else { 436 retry_count--; 437 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 438 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 439 } 440 } while (retry_count != 0); 441 } 442 443 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB) 444 { 445 struct MessageUnit_C __iomem *reg = pACB->pmuC; 446 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 447 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 448 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 449 do { 450 if (arcmsr_hbaC_wait_msgint_ready(pACB)) { 451 break; 452 } else { 453 retry_count--; 454 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 455 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 456 } 457 } while (retry_count != 0); 458 return; 459 } 460 461 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB) 462 { 463 int retry_count = 15; 464 struct MessageUnit_D *reg = pACB->pmuD; 465 466 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0); 467 do { 468 if (arcmsr_hbaD_wait_msgint_ready(pACB)) 469 break; 470 471 retry_count--; 472 pr_notice("arcmsr%d: wait 'flush adapter " 473 "cache' timeout, retry count down = %d\n", 474 pACB->host->host_no, retry_count); 475 } while (retry_count != 0); 476 } 477 478 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 479 { 480 switch (acb->adapter_type) { 481 482 case ACB_ADAPTER_TYPE_A: { 483 arcmsr_hbaA_flush_cache(acb); 484 } 485 break; 486 487 case ACB_ADAPTER_TYPE_B: { 488 arcmsr_hbaB_flush_cache(acb); 489 } 490 break; 491 case ACB_ADAPTER_TYPE_C: { 492 arcmsr_hbaC_flush_cache(acb); 493 } 494 break; 495 case ACB_ADAPTER_TYPE_D: 496 arcmsr_hbaD_flush_cache(acb); 497 break; 498 } 499 } 500 501 static bool arcmsr_alloc_io_queue(struct AdapterControlBlock *acb) 502 { 503 bool rtn = true; 504 void *dma_coherent; 505 dma_addr_t dma_coherent_handle; 506 struct pci_dev *pdev = acb->pdev; 507 508 switch (acb->adapter_type) { 509 case ACB_ADAPTER_TYPE_B: { 510 struct MessageUnit_B *reg; 511 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32); 512 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 513 &dma_coherent_handle, GFP_KERNEL); 514 if (!dma_coherent) { 515 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 516 return false; 517 } 518 acb->dma_coherent_handle2 = dma_coherent_handle; 519 acb->dma_coherent2 = dma_coherent; 520 reg = (struct MessageUnit_B *)dma_coherent; 521 acb->pmuB = reg; 522 if (acb->pdev->device == PCI_DEVICE_ID_ARECA_1203) { 523 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_1203); 524 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK_1203); 525 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_1203); 526 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK_1203); 527 } else { 528 reg->drv2iop_doorbell = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL); 529 reg->drv2iop_doorbell_mask = MEM_BASE0(ARCMSR_DRV2IOP_DOORBELL_MASK); 530 reg->iop2drv_doorbell = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL); 531 reg->iop2drv_doorbell_mask = MEM_BASE0(ARCMSR_IOP2DRV_DOORBELL_MASK); 532 } 533 reg->message_wbuffer = MEM_BASE1(ARCMSR_MESSAGE_WBUFFER); 534 reg->message_rbuffer = MEM_BASE1(ARCMSR_MESSAGE_RBUFFER); 535 reg->message_rwbuffer = MEM_BASE1(ARCMSR_MESSAGE_RWBUFFER); 536 } 537 break; 538 case ACB_ADAPTER_TYPE_D: { 539 struct MessageUnit_D *reg; 540 541 acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32); 542 dma_coherent = dma_zalloc_coherent(&pdev->dev, acb->roundup_ccbsize, 543 &dma_coherent_handle, GFP_KERNEL); 544 if (!dma_coherent) { 545 pr_notice("arcmsr%d: DMA allocation failed\n", acb->host->host_no); 546 return false; 547 } 548 acb->dma_coherent_handle2 = dma_coherent_handle; 549 acb->dma_coherent2 = dma_coherent; 550 reg = (struct MessageUnit_D *)dma_coherent; 551 acb->pmuD = reg; 552 reg->chip_id = MEM_BASE0(ARCMSR_ARC1214_CHIP_ID); 553 reg->cpu_mem_config = MEM_BASE0(ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION); 554 reg->i2o_host_interrupt_mask = MEM_BASE0(ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK); 555 reg->sample_at_reset = MEM_BASE0(ARCMSR_ARC1214_SAMPLE_RESET); 556 reg->reset_request = MEM_BASE0(ARCMSR_ARC1214_RESET_REQUEST); 557 reg->host_int_status = MEM_BASE0(ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS); 558 reg->pcief0_int_enable = MEM_BASE0(ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE); 559 reg->inbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE0); 560 reg->inbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_INBOUND_MESSAGE1); 561 reg->outbound_msgaddr0 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE0); 562 reg->outbound_msgaddr1 = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_MESSAGE1); 563 reg->inbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_INBOUND_DOORBELL); 564 reg->outbound_doorbell = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL); 565 reg->outbound_doorbell_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE); 566 reg->inboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW); 567 reg->inboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH); 568 reg->inboundlist_write_pointer = MEM_BASE0(ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER); 569 reg->outboundlist_base_low = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW); 570 reg->outboundlist_base_high = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH); 571 reg->outboundlist_copy_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER); 572 reg->outboundlist_read_pointer = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER); 573 reg->outboundlist_interrupt_cause = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE); 574 reg->outboundlist_interrupt_enable = MEM_BASE0(ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE); 575 reg->message_wbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_WBUFFER); 576 reg->message_rbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RBUFFER); 577 reg->msgcode_rwbuffer = MEM_BASE0(ARCMSR_ARC1214_MESSAGE_RWBUFFER); 578 } 579 break; 580 default: 581 break; 582 } 583 return rtn; 584 } 585 586 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 587 { 588 struct pci_dev *pdev = acb->pdev; 589 void *dma_coherent; 590 dma_addr_t dma_coherent_handle; 591 struct CommandControlBlock *ccb_tmp; 592 int i = 0, j = 0; 593 dma_addr_t cdb_phyaddr; 594 unsigned long roundup_ccbsize; 595 unsigned long max_xfer_len; 596 unsigned long max_sg_entrys; 597 uint32_t firm_config_version; 598 599 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 600 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 601 acb->devstate[i][j] = ARECA_RAID_GONE; 602 603 max_xfer_len = ARCMSR_MAX_XFER_LEN; 604 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 605 firm_config_version = acb->firm_cfg_version; 606 if((firm_config_version & 0xFF) >= 3){ 607 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 608 max_sg_entrys = (max_xfer_len/4096); 609 } 610 acb->host->max_sectors = max_xfer_len/512; 611 acb->host->sg_tablesize = max_sg_entrys; 612 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 613 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM; 614 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 615 if(!dma_coherent){ 616 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no); 617 return -ENOMEM; 618 } 619 acb->dma_coherent = dma_coherent; 620 acb->dma_coherent_handle = dma_coherent_handle; 621 memset(dma_coherent, 0, acb->uncache_size); 622 ccb_tmp = dma_coherent; 623 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 624 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 625 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 626 switch (acb->adapter_type) { 627 case ACB_ADAPTER_TYPE_A: 628 case ACB_ADAPTER_TYPE_B: 629 ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5; 630 break; 631 case ACB_ADAPTER_TYPE_C: 632 case ACB_ADAPTER_TYPE_D: 633 ccb_tmp->cdb_phyaddr = cdb_phyaddr; 634 break; 635 } 636 acb->pccb_pool[i] = ccb_tmp; 637 ccb_tmp->acb = acb; 638 INIT_LIST_HEAD(&ccb_tmp->list); 639 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 640 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 641 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 642 } 643 return 0; 644 } 645 646 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 647 { 648 struct AdapterControlBlock *acb = container_of(work, 649 struct AdapterControlBlock, arcmsr_do_message_isr_bh); 650 char *acb_dev_map = (char *)acb->device_map; 651 uint32_t __iomem *signature = NULL; 652 char __iomem *devicemap = NULL; 653 int target, lun; 654 struct scsi_device *psdev; 655 char diff, temp; 656 657 switch (acb->adapter_type) { 658 case ACB_ADAPTER_TYPE_A: { 659 struct MessageUnit_A __iomem *reg = acb->pmuA; 660 661 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 662 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 663 break; 664 } 665 case ACB_ADAPTER_TYPE_B: { 666 struct MessageUnit_B *reg = acb->pmuB; 667 668 signature = (uint32_t __iomem *)(®->message_rwbuffer[0]); 669 devicemap = (char __iomem *)(®->message_rwbuffer[21]); 670 break; 671 } 672 case ACB_ADAPTER_TYPE_C: { 673 struct MessageUnit_C __iomem *reg = acb->pmuC; 674 675 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 676 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 677 break; 678 } 679 case ACB_ADAPTER_TYPE_D: { 680 struct MessageUnit_D *reg = acb->pmuD; 681 682 signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 683 devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 684 break; 685 } 686 } 687 atomic_inc(&acb->rq_map_token); 688 if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG) 689 return; 690 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; 691 target++) { 692 temp = readb(devicemap); 693 diff = (*acb_dev_map) ^ temp; 694 if (diff != 0) { 695 *acb_dev_map = temp; 696 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; 697 lun++) { 698 if ((diff & 0x01) == 1 && 699 (temp & 0x01) == 1) { 700 scsi_add_device(acb->host, 701 0, target, lun); 702 } else if ((diff & 0x01) == 1 703 && (temp & 0x01) == 0) { 704 psdev = scsi_device_lookup(acb->host, 705 0, target, lun); 706 if (psdev != NULL) { 707 scsi_remove_device(psdev); 708 scsi_device_put(psdev); 709 } 710 } 711 temp >>= 1; 712 diff >>= 1; 713 } 714 } 715 devicemap++; 716 acb_dev_map++; 717 } 718 } 719 720 static int 721 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb) 722 { 723 int i, j, r; 724 struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS]; 725 726 for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++) 727 entries[i].entry = i; 728 r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS); 729 if (r < 0) 730 goto msi_int; 731 acb->msix_vector_count = r; 732 for (i = 0; i < r; i++) { 733 if (request_irq(entries[i].vector, 734 arcmsr_do_interrupt, 0, "arcmsr", acb)) { 735 pr_warn("arcmsr%d: request_irq =%d failed!\n", 736 acb->host->host_no, entries[i].vector); 737 for (j = 0 ; j < i ; j++) 738 free_irq(entries[j].vector, acb); 739 pci_disable_msix(pdev); 740 goto msi_int; 741 } 742 acb->entries[i] = entries[i]; 743 } 744 acb->acb_flags |= ACB_F_MSIX_ENABLED; 745 pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no); 746 return SUCCESS; 747 msi_int: 748 if (pci_enable_msi_exact(pdev, 1) < 0) 749 goto legacy_int; 750 if (request_irq(pdev->irq, arcmsr_do_interrupt, 751 IRQF_SHARED, "arcmsr", acb)) { 752 pr_warn("arcmsr%d: request_irq =%d failed!\n", 753 acb->host->host_no, pdev->irq); 754 pci_disable_msi(pdev); 755 goto legacy_int; 756 } 757 acb->acb_flags |= ACB_F_MSI_ENABLED; 758 pr_info("arcmsr%d: msi enabled\n", acb->host->host_no); 759 return SUCCESS; 760 legacy_int: 761 if (request_irq(pdev->irq, arcmsr_do_interrupt, 762 IRQF_SHARED, "arcmsr", acb)) { 763 pr_warn("arcmsr%d: request_irq = %d failed!\n", 764 acb->host->host_no, pdev->irq); 765 return FAILED; 766 } 767 return SUCCESS; 768 } 769 770 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 771 { 772 struct Scsi_Host *host; 773 struct AdapterControlBlock *acb; 774 uint8_t bus,dev_fun; 775 int error; 776 error = pci_enable_device(pdev); 777 if(error){ 778 return -ENODEV; 779 } 780 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 781 if(!host){ 782 goto pci_disable_dev; 783 } 784 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 785 if(error){ 786 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 787 if(error){ 788 printk(KERN_WARNING 789 "scsi%d: No suitable DMA mask available\n", 790 host->host_no); 791 goto scsi_host_release; 792 } 793 } 794 init_waitqueue_head(&wait_q); 795 bus = pdev->bus->number; 796 dev_fun = pdev->devfn; 797 acb = (struct AdapterControlBlock *) host->hostdata; 798 memset(acb,0,sizeof(struct AdapterControlBlock)); 799 acb->pdev = pdev; 800 acb->host = host; 801 host->max_lun = ARCMSR_MAX_TARGETLUN; 802 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 803 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 804 host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD; 805 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 806 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 807 host->unique_id = (bus << 8) | dev_fun; 808 pci_set_drvdata(pdev, host); 809 pci_set_master(pdev); 810 error = pci_request_regions(pdev, "arcmsr"); 811 if(error){ 812 goto scsi_host_release; 813 } 814 spin_lock_init(&acb->eh_lock); 815 spin_lock_init(&acb->ccblist_lock); 816 spin_lock_init(&acb->postq_lock); 817 spin_lock_init(&acb->doneq_lock); 818 spin_lock_init(&acb->rqbuffer_lock); 819 spin_lock_init(&acb->wqbuffer_lock); 820 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 821 ACB_F_MESSAGE_RQBUFFER_CLEARED | 822 ACB_F_MESSAGE_WQBUFFER_READED); 823 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 824 INIT_LIST_HEAD(&acb->ccb_free_list); 825 acb->adapter_type = id->driver_data; 826 error = arcmsr_remap_pciregion(acb); 827 if(!error){ 828 goto pci_release_regs; 829 } 830 error = arcmsr_alloc_io_queue(acb); 831 if (!error) 832 goto unmap_pci_region; 833 error = arcmsr_get_firmware_spec(acb); 834 if(!error){ 835 goto free_hbb_mu; 836 } 837 error = arcmsr_alloc_ccb_pool(acb); 838 if(error){ 839 goto free_hbb_mu; 840 } 841 error = scsi_add_host(host, &pdev->dev); 842 if(error){ 843 goto free_ccb_pool; 844 } 845 if (arcmsr_request_irq(pdev, acb) == FAILED) 846 goto scsi_host_remove; 847 arcmsr_iop_init(acb); 848 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 849 atomic_set(&acb->rq_map_token, 16); 850 atomic_set(&acb->ante_token_value, 16); 851 acb->fw_flag = FW_NORMAL; 852 init_timer(&acb->eternal_timer); 853 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 854 acb->eternal_timer.data = (unsigned long) acb; 855 acb->eternal_timer.function = &arcmsr_request_device_map; 856 add_timer(&acb->eternal_timer); 857 if(arcmsr_alloc_sysfs_attr(acb)) 858 goto out_free_sysfs; 859 scsi_scan_host(host); 860 return 0; 861 out_free_sysfs: 862 del_timer_sync(&acb->eternal_timer); 863 flush_work(&acb->arcmsr_do_message_isr_bh); 864 arcmsr_stop_adapter_bgrb(acb); 865 arcmsr_flush_adapter_cache(acb); 866 arcmsr_free_irq(pdev, acb); 867 scsi_host_remove: 868 scsi_remove_host(host); 869 free_ccb_pool: 870 arcmsr_free_ccb_pool(acb); 871 free_hbb_mu: 872 arcmsr_free_mu(acb); 873 unmap_pci_region: 874 arcmsr_unmap_pciregion(acb); 875 pci_release_regs: 876 pci_release_regions(pdev); 877 scsi_host_release: 878 scsi_host_put(host); 879 pci_disable_dev: 880 pci_disable_device(pdev); 881 return -ENODEV; 882 } 883 884 static void arcmsr_free_irq(struct pci_dev *pdev, 885 struct AdapterControlBlock *acb) 886 { 887 int i; 888 889 if (acb->acb_flags & ACB_F_MSI_ENABLED) { 890 free_irq(pdev->irq, acb); 891 pci_disable_msi(pdev); 892 } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) { 893 for (i = 0; i < acb->msix_vector_count; i++) 894 free_irq(acb->entries[i].vector, acb); 895 pci_disable_msix(pdev); 896 } else 897 free_irq(pdev->irq, acb); 898 } 899 900 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state) 901 { 902 uint32_t intmask_org; 903 struct Scsi_Host *host = pci_get_drvdata(pdev); 904 struct AdapterControlBlock *acb = 905 (struct AdapterControlBlock *)host->hostdata; 906 907 intmask_org = arcmsr_disable_outbound_ints(acb); 908 arcmsr_free_irq(pdev, acb); 909 del_timer_sync(&acb->eternal_timer); 910 flush_work(&acb->arcmsr_do_message_isr_bh); 911 arcmsr_stop_adapter_bgrb(acb); 912 arcmsr_flush_adapter_cache(acb); 913 pci_set_drvdata(pdev, host); 914 pci_save_state(pdev); 915 pci_disable_device(pdev); 916 pci_set_power_state(pdev, pci_choose_state(pdev, state)); 917 return 0; 918 } 919 920 static int arcmsr_resume(struct pci_dev *pdev) 921 { 922 int error; 923 struct Scsi_Host *host = pci_get_drvdata(pdev); 924 struct AdapterControlBlock *acb = 925 (struct AdapterControlBlock *)host->hostdata; 926 927 pci_set_power_state(pdev, PCI_D0); 928 pci_enable_wake(pdev, PCI_D0, 0); 929 pci_restore_state(pdev); 930 if (pci_enable_device(pdev)) { 931 pr_warn("%s: pci_enable_device error\n", __func__); 932 return -ENODEV; 933 } 934 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 935 if (error) { 936 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 937 if (error) { 938 pr_warn("scsi%d: No suitable DMA mask available\n", 939 host->host_no); 940 goto controller_unregister; 941 } 942 } 943 pci_set_master(pdev); 944 if (arcmsr_request_irq(pdev, acb) == FAILED) 945 goto controller_stop; 946 arcmsr_iop_init(acb); 947 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 948 atomic_set(&acb->rq_map_token, 16); 949 atomic_set(&acb->ante_token_value, 16); 950 acb->fw_flag = FW_NORMAL; 951 init_timer(&acb->eternal_timer); 952 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 953 acb->eternal_timer.data = (unsigned long) acb; 954 acb->eternal_timer.function = &arcmsr_request_device_map; 955 add_timer(&acb->eternal_timer); 956 return 0; 957 controller_stop: 958 arcmsr_stop_adapter_bgrb(acb); 959 arcmsr_flush_adapter_cache(acb); 960 controller_unregister: 961 scsi_remove_host(host); 962 arcmsr_free_ccb_pool(acb); 963 arcmsr_unmap_pciregion(acb); 964 pci_release_regions(pdev); 965 scsi_host_put(host); 966 pci_disable_device(pdev); 967 return -ENODEV; 968 } 969 970 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb) 971 { 972 struct MessageUnit_A __iomem *reg = acb->pmuA; 973 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 974 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 975 printk(KERN_NOTICE 976 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 977 , acb->host->host_no); 978 return false; 979 } 980 return true; 981 } 982 983 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb) 984 { 985 struct MessageUnit_B *reg = acb->pmuB; 986 987 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 988 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 989 printk(KERN_NOTICE 990 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 991 , acb->host->host_no); 992 return false; 993 } 994 return true; 995 } 996 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB) 997 { 998 struct MessageUnit_C __iomem *reg = pACB->pmuC; 999 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 1000 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1001 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1002 printk(KERN_NOTICE 1003 "arcmsr%d: wait 'abort all outstanding command' timeout\n" 1004 , pACB->host->host_no); 1005 return false; 1006 } 1007 return true; 1008 } 1009 1010 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB) 1011 { 1012 struct MessageUnit_D *reg = pACB->pmuD; 1013 1014 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0); 1015 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 1016 pr_notice("arcmsr%d: wait 'abort all outstanding " 1017 "command' timeout\n", pACB->host->host_no); 1018 return false; 1019 } 1020 return true; 1021 } 1022 1023 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 1024 { 1025 uint8_t rtnval = 0; 1026 switch (acb->adapter_type) { 1027 case ACB_ADAPTER_TYPE_A: { 1028 rtnval = arcmsr_hbaA_abort_allcmd(acb); 1029 } 1030 break; 1031 1032 case ACB_ADAPTER_TYPE_B: { 1033 rtnval = arcmsr_hbaB_abort_allcmd(acb); 1034 } 1035 break; 1036 1037 case ACB_ADAPTER_TYPE_C: { 1038 rtnval = arcmsr_hbaC_abort_allcmd(acb); 1039 } 1040 break; 1041 1042 case ACB_ADAPTER_TYPE_D: 1043 rtnval = arcmsr_hbaD_abort_allcmd(acb); 1044 break; 1045 } 1046 return rtnval; 1047 } 1048 1049 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 1050 { 1051 struct scsi_cmnd *pcmd = ccb->pcmd; 1052 1053 scsi_dma_unmap(pcmd); 1054 } 1055 1056 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 1057 { 1058 struct AdapterControlBlock *acb = ccb->acb; 1059 struct scsi_cmnd *pcmd = ccb->pcmd; 1060 unsigned long flags; 1061 atomic_dec(&acb->ccboutstandingcount); 1062 arcmsr_pci_unmap_dma(ccb); 1063 ccb->startdone = ARCMSR_CCB_DONE; 1064 spin_lock_irqsave(&acb->ccblist_lock, flags); 1065 list_add_tail(&ccb->list, &acb->ccb_free_list); 1066 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 1067 pcmd->scsi_done(pcmd); 1068 } 1069 1070 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 1071 { 1072 1073 struct scsi_cmnd *pcmd = ccb->pcmd; 1074 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 1075 pcmd->result = DID_OK << 16; 1076 if (sensebuffer) { 1077 int sense_data_length = 1078 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 1079 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 1080 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 1081 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 1082 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 1083 sensebuffer->Valid = 1; 1084 } 1085 } 1086 1087 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 1088 { 1089 u32 orig_mask = 0; 1090 switch (acb->adapter_type) { 1091 case ACB_ADAPTER_TYPE_A : { 1092 struct MessageUnit_A __iomem *reg = acb->pmuA; 1093 orig_mask = readl(®->outbound_intmask); 1094 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 1095 ®->outbound_intmask); 1096 } 1097 break; 1098 case ACB_ADAPTER_TYPE_B : { 1099 struct MessageUnit_B *reg = acb->pmuB; 1100 orig_mask = readl(reg->iop2drv_doorbell_mask); 1101 writel(0, reg->iop2drv_doorbell_mask); 1102 } 1103 break; 1104 case ACB_ADAPTER_TYPE_C:{ 1105 struct MessageUnit_C __iomem *reg = acb->pmuC; 1106 /* disable all outbound interrupt */ 1107 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 1108 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 1109 } 1110 break; 1111 case ACB_ADAPTER_TYPE_D: { 1112 struct MessageUnit_D *reg = acb->pmuD; 1113 /* disable all outbound interrupt */ 1114 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable); 1115 } 1116 break; 1117 } 1118 return orig_mask; 1119 } 1120 1121 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 1122 struct CommandControlBlock *ccb, bool error) 1123 { 1124 uint8_t id, lun; 1125 id = ccb->pcmd->device->id; 1126 lun = ccb->pcmd->device->lun; 1127 if (!error) { 1128 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 1129 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1130 ccb->pcmd->result = DID_OK << 16; 1131 arcmsr_ccb_complete(ccb); 1132 }else{ 1133 switch (ccb->arcmsr_cdb.DeviceStatus) { 1134 case ARCMSR_DEV_SELECT_TIMEOUT: { 1135 acb->devstate[id][lun] = ARECA_RAID_GONE; 1136 ccb->pcmd->result = DID_NO_CONNECT << 16; 1137 arcmsr_ccb_complete(ccb); 1138 } 1139 break; 1140 1141 case ARCMSR_DEV_ABORTED: 1142 1143 case ARCMSR_DEV_INIT_FAIL: { 1144 acb->devstate[id][lun] = ARECA_RAID_GONE; 1145 ccb->pcmd->result = DID_BAD_TARGET << 16; 1146 arcmsr_ccb_complete(ccb); 1147 } 1148 break; 1149 1150 case ARCMSR_DEV_CHECK_CONDITION: { 1151 acb->devstate[id][lun] = ARECA_RAID_GOOD; 1152 arcmsr_report_sense_info(ccb); 1153 arcmsr_ccb_complete(ccb); 1154 } 1155 break; 1156 1157 default: 1158 printk(KERN_NOTICE 1159 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 1160 but got unknown DeviceStatus = 0x%x \n" 1161 , acb->host->host_no 1162 , id 1163 , lun 1164 , ccb->arcmsr_cdb.DeviceStatus); 1165 acb->devstate[id][lun] = ARECA_RAID_GONE; 1166 ccb->pcmd->result = DID_NO_CONNECT << 16; 1167 arcmsr_ccb_complete(ccb); 1168 break; 1169 } 1170 } 1171 } 1172 1173 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 1174 { 1175 int id, lun; 1176 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 1177 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 1178 struct scsi_cmnd *abortcmd = pCCB->pcmd; 1179 if (abortcmd) { 1180 id = abortcmd->device->id; 1181 lun = abortcmd->device->lun; 1182 abortcmd->result |= DID_ABORT << 16; 1183 arcmsr_ccb_complete(pCCB); 1184 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 1185 acb->host->host_no, pCCB); 1186 } 1187 return; 1188 } 1189 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 1190 done acb = '0x%p'" 1191 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 1192 " ccboutstandingcount = %d \n" 1193 , acb->host->host_no 1194 , acb 1195 , pCCB 1196 , pCCB->acb 1197 , pCCB->startdone 1198 , atomic_read(&acb->ccboutstandingcount)); 1199 return; 1200 } 1201 arcmsr_report_ccb_state(acb, pCCB, error); 1202 } 1203 1204 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 1205 { 1206 int i = 0; 1207 uint32_t flag_ccb, ccb_cdb_phy; 1208 struct ARCMSR_CDB *pARCMSR_CDB; 1209 bool error; 1210 struct CommandControlBlock *pCCB; 1211 switch (acb->adapter_type) { 1212 1213 case ACB_ADAPTER_TYPE_A: { 1214 struct MessageUnit_A __iomem *reg = acb->pmuA; 1215 uint32_t outbound_intstatus; 1216 outbound_intstatus = readl(®->outbound_intstatus) & 1217 acb->outbound_int_enable; 1218 /*clear and abort all outbound posted Q*/ 1219 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 1220 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 1221 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1222 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1223 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1224 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1225 arcmsr_drain_donequeue(acb, pCCB, error); 1226 } 1227 } 1228 break; 1229 1230 case ACB_ADAPTER_TYPE_B: { 1231 struct MessageUnit_B *reg = acb->pmuB; 1232 /*clear all outbound posted Q*/ 1233 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 1234 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 1235 flag_ccb = reg->done_qbuffer[i]; 1236 if (flag_ccb != 0) { 1237 reg->done_qbuffer[i] = 0; 1238 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1239 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1240 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1241 arcmsr_drain_donequeue(acb, pCCB, error); 1242 } 1243 reg->post_qbuffer[i] = 0; 1244 } 1245 reg->doneq_index = 0; 1246 reg->postq_index = 0; 1247 } 1248 break; 1249 case ACB_ADAPTER_TYPE_C: { 1250 struct MessageUnit_C __iomem *reg = acb->pmuC; 1251 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1252 /*need to do*/ 1253 flag_ccb = readl(®->outbound_queueport_low); 1254 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1255 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1256 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1257 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1258 arcmsr_drain_donequeue(acb, pCCB, error); 1259 } 1260 } 1261 break; 1262 case ACB_ADAPTER_TYPE_D: { 1263 struct MessageUnit_D *pmu = acb->pmuD; 1264 uint32_t outbound_write_pointer; 1265 uint32_t doneq_index, index_stripped, addressLow, residual, toggle; 1266 unsigned long flags; 1267 1268 residual = atomic_read(&acb->ccboutstandingcount); 1269 for (i = 0; i < residual; i++) { 1270 spin_lock_irqsave(&acb->doneq_lock, flags); 1271 outbound_write_pointer = 1272 pmu->done_qbuffer[0].addressLow + 1; 1273 doneq_index = pmu->doneq_index; 1274 if ((doneq_index & 0xFFF) != 1275 (outbound_write_pointer & 0xFFF)) { 1276 toggle = doneq_index & 0x4000; 1277 index_stripped = (doneq_index & 0xFFF) + 1; 1278 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 1279 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 1280 ((toggle ^ 0x4000) + 1); 1281 doneq_index = pmu->doneq_index; 1282 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1283 addressLow = pmu->done_qbuffer[doneq_index & 1284 0xFFF].addressLow; 1285 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 1286 pARCMSR_CDB = (struct ARCMSR_CDB *) 1287 (acb->vir2phy_offset + ccb_cdb_phy); 1288 pCCB = container_of(pARCMSR_CDB, 1289 struct CommandControlBlock, arcmsr_cdb); 1290 error = (addressLow & 1291 ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? 1292 true : false; 1293 arcmsr_drain_donequeue(acb, pCCB, error); 1294 writel(doneq_index, 1295 pmu->outboundlist_read_pointer); 1296 } else { 1297 spin_unlock_irqrestore(&acb->doneq_lock, flags); 1298 mdelay(10); 1299 } 1300 } 1301 pmu->postq_index = 0; 1302 pmu->doneq_index = 0x40FF; 1303 } 1304 break; 1305 } 1306 } 1307 1308 static void arcmsr_remove(struct pci_dev *pdev) 1309 { 1310 struct Scsi_Host *host = pci_get_drvdata(pdev); 1311 struct AdapterControlBlock *acb = 1312 (struct AdapterControlBlock *) host->hostdata; 1313 int poll_count = 0; 1314 arcmsr_free_sysfs_attr(acb); 1315 scsi_remove_host(host); 1316 flush_work(&acb->arcmsr_do_message_isr_bh); 1317 del_timer_sync(&acb->eternal_timer); 1318 arcmsr_disable_outbound_ints(acb); 1319 arcmsr_stop_adapter_bgrb(acb); 1320 arcmsr_flush_adapter_cache(acb); 1321 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1322 acb->acb_flags &= ~ACB_F_IOP_INITED; 1323 1324 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1325 if (!atomic_read(&acb->ccboutstandingcount)) 1326 break; 1327 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1328 msleep(25); 1329 } 1330 1331 if (atomic_read(&acb->ccboutstandingcount)) { 1332 int i; 1333 1334 arcmsr_abort_allcmd(acb); 1335 arcmsr_done4abort_postqueue(acb); 1336 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1337 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1338 if (ccb->startdone == ARCMSR_CCB_START) { 1339 ccb->startdone = ARCMSR_CCB_ABORTED; 1340 ccb->pcmd->result = DID_ABORT << 16; 1341 arcmsr_ccb_complete(ccb); 1342 } 1343 } 1344 } 1345 arcmsr_free_irq(pdev, acb); 1346 arcmsr_free_ccb_pool(acb); 1347 arcmsr_free_mu(acb); 1348 arcmsr_unmap_pciregion(acb); 1349 pci_release_regions(pdev); 1350 scsi_host_put(host); 1351 pci_disable_device(pdev); 1352 } 1353 1354 static void arcmsr_shutdown(struct pci_dev *pdev) 1355 { 1356 struct Scsi_Host *host = pci_get_drvdata(pdev); 1357 struct AdapterControlBlock *acb = 1358 (struct AdapterControlBlock *)host->hostdata; 1359 del_timer_sync(&acb->eternal_timer); 1360 arcmsr_disable_outbound_ints(acb); 1361 arcmsr_free_irq(pdev, acb); 1362 flush_work(&acb->arcmsr_do_message_isr_bh); 1363 arcmsr_stop_adapter_bgrb(acb); 1364 arcmsr_flush_adapter_cache(acb); 1365 } 1366 1367 static int arcmsr_module_init(void) 1368 { 1369 int error = 0; 1370 error = pci_register_driver(&arcmsr_pci_driver); 1371 return error; 1372 } 1373 1374 static void arcmsr_module_exit(void) 1375 { 1376 pci_unregister_driver(&arcmsr_pci_driver); 1377 } 1378 module_init(arcmsr_module_init); 1379 module_exit(arcmsr_module_exit); 1380 1381 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1382 u32 intmask_org) 1383 { 1384 u32 mask; 1385 switch (acb->adapter_type) { 1386 1387 case ACB_ADAPTER_TYPE_A: { 1388 struct MessageUnit_A __iomem *reg = acb->pmuA; 1389 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1390 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1391 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1392 writel(mask, ®->outbound_intmask); 1393 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1394 } 1395 break; 1396 1397 case ACB_ADAPTER_TYPE_B: { 1398 struct MessageUnit_B *reg = acb->pmuB; 1399 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1400 ARCMSR_IOP2DRV_DATA_READ_OK | 1401 ARCMSR_IOP2DRV_CDB_DONE | 1402 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1403 writel(mask, reg->iop2drv_doorbell_mask); 1404 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1405 } 1406 break; 1407 case ACB_ADAPTER_TYPE_C: { 1408 struct MessageUnit_C __iomem *reg = acb->pmuC; 1409 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1410 writel(intmask_org & mask, ®->host_int_mask); 1411 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1412 } 1413 break; 1414 case ACB_ADAPTER_TYPE_D: { 1415 struct MessageUnit_D *reg = acb->pmuD; 1416 1417 mask = ARCMSR_ARC1214_ALL_INT_ENABLE; 1418 writel(intmask_org | mask, reg->pcief0_int_enable); 1419 break; 1420 } 1421 } 1422 } 1423 1424 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1425 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1426 { 1427 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1428 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1429 __le32 address_lo, address_hi; 1430 int arccdbsize = 0x30; 1431 __le32 length = 0; 1432 int i; 1433 struct scatterlist *sg; 1434 int nseg; 1435 ccb->pcmd = pcmd; 1436 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1437 arcmsr_cdb->TargetID = pcmd->device->id; 1438 arcmsr_cdb->LUN = pcmd->device->lun; 1439 arcmsr_cdb->Function = 1; 1440 arcmsr_cdb->msgContext = 0; 1441 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1442 1443 nseg = scsi_dma_map(pcmd); 1444 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1445 return FAILED; 1446 scsi_for_each_sg(pcmd, sg, nseg, i) { 1447 /* Get the physical address of the current data pointer */ 1448 length = cpu_to_le32(sg_dma_len(sg)); 1449 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1450 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1451 if (address_hi == 0) { 1452 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1453 1454 pdma_sg->address = address_lo; 1455 pdma_sg->length = length; 1456 psge += sizeof (struct SG32ENTRY); 1457 arccdbsize += sizeof (struct SG32ENTRY); 1458 } else { 1459 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1460 1461 pdma_sg->addresshigh = address_hi; 1462 pdma_sg->address = address_lo; 1463 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1464 psge += sizeof (struct SG64ENTRY); 1465 arccdbsize += sizeof (struct SG64ENTRY); 1466 } 1467 } 1468 arcmsr_cdb->sgcount = (uint8_t)nseg; 1469 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1470 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1471 if ( arccdbsize > 256) 1472 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1473 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1474 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1475 ccb->arc_cdb_size = arccdbsize; 1476 return SUCCESS; 1477 } 1478 1479 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1480 { 1481 uint32_t cdb_phyaddr = ccb->cdb_phyaddr; 1482 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1483 atomic_inc(&acb->ccboutstandingcount); 1484 ccb->startdone = ARCMSR_CCB_START; 1485 switch (acb->adapter_type) { 1486 case ACB_ADAPTER_TYPE_A: { 1487 struct MessageUnit_A __iomem *reg = acb->pmuA; 1488 1489 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1490 writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1491 ®->inbound_queueport); 1492 else 1493 writel(cdb_phyaddr, ®->inbound_queueport); 1494 break; 1495 } 1496 1497 case ACB_ADAPTER_TYPE_B: { 1498 struct MessageUnit_B *reg = acb->pmuB; 1499 uint32_t ending_index, index = reg->postq_index; 1500 1501 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1502 reg->post_qbuffer[ending_index] = 0; 1503 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1504 reg->post_qbuffer[index] = 1505 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE; 1506 } else { 1507 reg->post_qbuffer[index] = cdb_phyaddr; 1508 } 1509 index++; 1510 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1511 reg->postq_index = index; 1512 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1513 } 1514 break; 1515 case ACB_ADAPTER_TYPE_C: { 1516 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1517 uint32_t ccb_post_stamp, arc_cdb_size; 1518 1519 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1520 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1); 1521 if (acb->cdb_phyaddr_hi32) { 1522 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1523 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1524 } else { 1525 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1526 } 1527 } 1528 break; 1529 case ACB_ADAPTER_TYPE_D: { 1530 struct MessageUnit_D *pmu = acb->pmuD; 1531 u16 index_stripped; 1532 u16 postq_index, toggle; 1533 unsigned long flags; 1534 struct InBound_SRB *pinbound_srb; 1535 1536 spin_lock_irqsave(&acb->postq_lock, flags); 1537 postq_index = pmu->postq_index; 1538 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]); 1539 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr); 1540 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr); 1541 pinbound_srb->length = ccb->arc_cdb_size >> 2; 1542 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr); 1543 toggle = postq_index & 0x4000; 1544 index_stripped = postq_index + 1; 1545 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1); 1546 pmu->postq_index = index_stripped ? (index_stripped | toggle) : 1547 (toggle ^ 0x4000); 1548 writel(postq_index, pmu->inboundlist_write_pointer); 1549 spin_unlock_irqrestore(&acb->postq_lock, flags); 1550 break; 1551 } 1552 } 1553 } 1554 1555 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb) 1556 { 1557 struct MessageUnit_A __iomem *reg = acb->pmuA; 1558 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1559 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1560 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 1561 printk(KERN_NOTICE 1562 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1563 , acb->host->host_no); 1564 } 1565 } 1566 1567 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb) 1568 { 1569 struct MessageUnit_B *reg = acb->pmuB; 1570 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1571 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1572 1573 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 1574 printk(KERN_NOTICE 1575 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1576 , acb->host->host_no); 1577 } 1578 } 1579 1580 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB) 1581 { 1582 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1583 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1584 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1585 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1586 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 1587 printk(KERN_NOTICE 1588 "arcmsr%d: wait 'stop adapter background rebulid' timeout\n" 1589 , pACB->host->host_no); 1590 } 1591 return; 1592 } 1593 1594 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB) 1595 { 1596 struct MessageUnit_D *reg = pACB->pmuD; 1597 1598 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1599 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0); 1600 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) 1601 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' " 1602 "timeout\n", pACB->host->host_no); 1603 } 1604 1605 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1606 { 1607 switch (acb->adapter_type) { 1608 case ACB_ADAPTER_TYPE_A: { 1609 arcmsr_hbaA_stop_bgrb(acb); 1610 } 1611 break; 1612 1613 case ACB_ADAPTER_TYPE_B: { 1614 arcmsr_hbaB_stop_bgrb(acb); 1615 } 1616 break; 1617 case ACB_ADAPTER_TYPE_C: { 1618 arcmsr_hbaC_stop_bgrb(acb); 1619 } 1620 break; 1621 case ACB_ADAPTER_TYPE_D: 1622 arcmsr_hbaD_stop_bgrb(acb); 1623 break; 1624 } 1625 } 1626 1627 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1628 { 1629 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1630 } 1631 1632 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1633 { 1634 switch (acb->adapter_type) { 1635 case ACB_ADAPTER_TYPE_A: { 1636 struct MessageUnit_A __iomem *reg = acb->pmuA; 1637 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1638 } 1639 break; 1640 1641 case ACB_ADAPTER_TYPE_B: { 1642 struct MessageUnit_B *reg = acb->pmuB; 1643 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1644 } 1645 break; 1646 case ACB_ADAPTER_TYPE_C: { 1647 struct MessageUnit_C __iomem *reg = acb->pmuC; 1648 1649 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1650 } 1651 break; 1652 case ACB_ADAPTER_TYPE_D: { 1653 struct MessageUnit_D *reg = acb->pmuD; 1654 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 1655 reg->inbound_doorbell); 1656 } 1657 break; 1658 } 1659 } 1660 1661 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1662 { 1663 switch (acb->adapter_type) { 1664 case ACB_ADAPTER_TYPE_A: { 1665 struct MessageUnit_A __iomem *reg = acb->pmuA; 1666 /* 1667 ** push inbound doorbell tell iop, driver data write ok 1668 ** and wait reply on next hwinterrupt for next Qbuffer post 1669 */ 1670 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1671 } 1672 break; 1673 1674 case ACB_ADAPTER_TYPE_B: { 1675 struct MessageUnit_B *reg = acb->pmuB; 1676 /* 1677 ** push inbound doorbell tell iop, driver data write ok 1678 ** and wait reply on next hwinterrupt for next Qbuffer post 1679 */ 1680 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1681 } 1682 break; 1683 case ACB_ADAPTER_TYPE_C: { 1684 struct MessageUnit_C __iomem *reg = acb->pmuC; 1685 /* 1686 ** push inbound doorbell tell iop, driver data write ok 1687 ** and wait reply on next hwinterrupt for next Qbuffer post 1688 */ 1689 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1690 } 1691 break; 1692 case ACB_ADAPTER_TYPE_D: { 1693 struct MessageUnit_D *reg = acb->pmuD; 1694 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY, 1695 reg->inbound_doorbell); 1696 } 1697 break; 1698 } 1699 } 1700 1701 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1702 { 1703 struct QBUFFER __iomem *qbuffer = NULL; 1704 switch (acb->adapter_type) { 1705 1706 case ACB_ADAPTER_TYPE_A: { 1707 struct MessageUnit_A __iomem *reg = acb->pmuA; 1708 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1709 } 1710 break; 1711 1712 case ACB_ADAPTER_TYPE_B: { 1713 struct MessageUnit_B *reg = acb->pmuB; 1714 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1715 } 1716 break; 1717 case ACB_ADAPTER_TYPE_C: { 1718 struct MessageUnit_C __iomem *phbcmu = acb->pmuC; 1719 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1720 } 1721 break; 1722 case ACB_ADAPTER_TYPE_D: { 1723 struct MessageUnit_D *reg = acb->pmuD; 1724 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1725 } 1726 break; 1727 } 1728 return qbuffer; 1729 } 1730 1731 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1732 { 1733 struct QBUFFER __iomem *pqbuffer = NULL; 1734 switch (acb->adapter_type) { 1735 1736 case ACB_ADAPTER_TYPE_A: { 1737 struct MessageUnit_A __iomem *reg = acb->pmuA; 1738 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1739 } 1740 break; 1741 1742 case ACB_ADAPTER_TYPE_B: { 1743 struct MessageUnit_B *reg = acb->pmuB; 1744 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1745 } 1746 break; 1747 case ACB_ADAPTER_TYPE_C: { 1748 struct MessageUnit_C __iomem *reg = acb->pmuC; 1749 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1750 } 1751 break; 1752 case ACB_ADAPTER_TYPE_D: { 1753 struct MessageUnit_D *reg = acb->pmuD; 1754 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1755 } 1756 break; 1757 } 1758 return pqbuffer; 1759 } 1760 1761 static uint32_t 1762 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb, 1763 struct QBUFFER __iomem *prbuffer) 1764 { 1765 uint8_t *pQbuffer; 1766 uint8_t *buf1 = NULL; 1767 uint32_t __iomem *iop_data; 1768 uint32_t iop_len, data_len, *buf2 = NULL; 1769 1770 iop_data = (uint32_t __iomem *)prbuffer->data; 1771 iop_len = readl(&prbuffer->data_len); 1772 if (iop_len > 0) { 1773 buf1 = kmalloc(128, GFP_ATOMIC); 1774 buf2 = (uint32_t *)buf1; 1775 if (buf1 == NULL) 1776 return 0; 1777 data_len = iop_len; 1778 while (data_len >= 4) { 1779 *buf2++ = readl(iop_data); 1780 iop_data++; 1781 data_len -= 4; 1782 } 1783 if (data_len) 1784 *buf2 = readl(iop_data); 1785 buf2 = (uint32_t *)buf1; 1786 } 1787 while (iop_len > 0) { 1788 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1789 *pQbuffer = *buf1; 1790 acb->rqbuf_putIndex++; 1791 /* if last, index number set it to 0 */ 1792 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1793 buf1++; 1794 iop_len--; 1795 } 1796 kfree(buf2); 1797 /* let IOP know data has been read */ 1798 arcmsr_iop_message_read(acb); 1799 return 1; 1800 } 1801 1802 uint32_t 1803 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb, 1804 struct QBUFFER __iomem *prbuffer) { 1805 1806 uint8_t *pQbuffer; 1807 uint8_t __iomem *iop_data; 1808 uint32_t iop_len; 1809 1810 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) 1811 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer); 1812 iop_data = (uint8_t __iomem *)prbuffer->data; 1813 iop_len = readl(&prbuffer->data_len); 1814 while (iop_len > 0) { 1815 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex]; 1816 *pQbuffer = readb(iop_data); 1817 acb->rqbuf_putIndex++; 1818 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 1819 iop_data++; 1820 iop_len--; 1821 } 1822 arcmsr_iop_message_read(acb); 1823 return 1; 1824 } 1825 1826 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1827 { 1828 unsigned long flags; 1829 struct QBUFFER __iomem *prbuffer; 1830 int32_t buf_empty_len; 1831 1832 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 1833 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1834 buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) & 1835 (ARCMSR_MAX_QBUFFER - 1); 1836 if (buf_empty_len >= readl(&prbuffer->data_len)) { 1837 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 1838 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1839 } else 1840 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1841 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 1842 } 1843 1844 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb) 1845 { 1846 uint8_t *pQbuffer; 1847 struct QBUFFER __iomem *pwbuffer; 1848 uint8_t *buf1 = NULL; 1849 uint32_t __iomem *iop_data; 1850 uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data; 1851 1852 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1853 buf1 = kmalloc(128, GFP_ATOMIC); 1854 buf2 = (uint32_t *)buf1; 1855 if (buf1 == NULL) 1856 return; 1857 1858 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1859 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1860 iop_data = (uint32_t __iomem *)pwbuffer->data; 1861 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1862 && (allxfer_len < 124)) { 1863 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1864 *buf1 = *pQbuffer; 1865 acb->wqbuf_getIndex++; 1866 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1867 buf1++; 1868 allxfer_len++; 1869 } 1870 data_len = allxfer_len; 1871 buf1 = (uint8_t *)buf2; 1872 while (data_len >= 4) { 1873 data = *buf2++; 1874 writel(data, iop_data); 1875 iop_data++; 1876 data_len -= 4; 1877 } 1878 if (data_len) { 1879 data = *buf2; 1880 writel(data, iop_data); 1881 } 1882 writel(allxfer_len, &pwbuffer->data_len); 1883 kfree(buf1); 1884 arcmsr_iop_message_wrote(acb); 1885 } 1886 } 1887 1888 void 1889 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb) 1890 { 1891 uint8_t *pQbuffer; 1892 struct QBUFFER __iomem *pwbuffer; 1893 uint8_t __iomem *iop_data; 1894 int32_t allxfer_len = 0; 1895 1896 if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) { 1897 arcmsr_write_ioctldata2iop_in_DWORD(acb); 1898 return; 1899 } 1900 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1901 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1902 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1903 iop_data = (uint8_t __iomem *)pwbuffer->data; 1904 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1905 && (allxfer_len < 124)) { 1906 pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex]; 1907 writeb(*pQbuffer, iop_data); 1908 acb->wqbuf_getIndex++; 1909 acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER; 1910 iop_data++; 1911 allxfer_len++; 1912 } 1913 writel(allxfer_len, &pwbuffer->data_len); 1914 arcmsr_iop_message_wrote(acb); 1915 } 1916 } 1917 1918 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1919 { 1920 unsigned long flags; 1921 1922 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 1923 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1924 if (acb->wqbuf_getIndex != acb->wqbuf_putIndex) 1925 arcmsr_write_ioctldata2iop(acb); 1926 if (acb->wqbuf_getIndex == acb->wqbuf_putIndex) 1927 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1928 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 1929 } 1930 1931 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb) 1932 { 1933 uint32_t outbound_doorbell; 1934 struct MessageUnit_A __iomem *reg = acb->pmuA; 1935 outbound_doorbell = readl(®->outbound_doorbell); 1936 do { 1937 writel(outbound_doorbell, ®->outbound_doorbell); 1938 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) 1939 arcmsr_iop2drv_data_wrote_handle(acb); 1940 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) 1941 arcmsr_iop2drv_data_read_handle(acb); 1942 outbound_doorbell = readl(®->outbound_doorbell); 1943 } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK 1944 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)); 1945 } 1946 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB) 1947 { 1948 uint32_t outbound_doorbell; 1949 struct MessageUnit_C __iomem *reg = pACB->pmuC; 1950 /* 1951 ******************************************************************* 1952 ** Maybe here we need to check wrqbuffer_lock is lock or not 1953 ** DOORBELL: din! don! 1954 ** check if there are any mail need to pack from firmware 1955 ******************************************************************* 1956 */ 1957 outbound_doorbell = readl(®->outbound_doorbell); 1958 do { 1959 writel(outbound_doorbell, ®->outbound_doorbell_clear); 1960 readl(®->outbound_doorbell_clear); 1961 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) 1962 arcmsr_iop2drv_data_wrote_handle(pACB); 1963 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) 1964 arcmsr_iop2drv_data_read_handle(pACB); 1965 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) 1966 arcmsr_hbaC_message_isr(pACB); 1967 outbound_doorbell = readl(®->outbound_doorbell); 1968 } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK 1969 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK 1970 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)); 1971 } 1972 1973 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB) 1974 { 1975 uint32_t outbound_doorbell; 1976 struct MessageUnit_D *pmu = pACB->pmuD; 1977 1978 outbound_doorbell = readl(pmu->outbound_doorbell); 1979 do { 1980 writel(outbound_doorbell, pmu->outbound_doorbell); 1981 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) 1982 arcmsr_hbaD_message_isr(pACB); 1983 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) 1984 arcmsr_iop2drv_data_wrote_handle(pACB); 1985 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK) 1986 arcmsr_iop2drv_data_read_handle(pACB); 1987 outbound_doorbell = readl(pmu->outbound_doorbell); 1988 } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK 1989 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK 1990 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)); 1991 } 1992 1993 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb) 1994 { 1995 uint32_t flag_ccb; 1996 struct MessageUnit_A __iomem *reg = acb->pmuA; 1997 struct ARCMSR_CDB *pARCMSR_CDB; 1998 struct CommandControlBlock *pCCB; 1999 bool error; 2000 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 2001 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 2002 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 2003 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2004 arcmsr_drain_donequeue(acb, pCCB, error); 2005 } 2006 } 2007 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb) 2008 { 2009 uint32_t index; 2010 uint32_t flag_ccb; 2011 struct MessageUnit_B *reg = acb->pmuB; 2012 struct ARCMSR_CDB *pARCMSR_CDB; 2013 struct CommandControlBlock *pCCB; 2014 bool error; 2015 index = reg->doneq_index; 2016 while ((flag_ccb = reg->done_qbuffer[index]) != 0) { 2017 reg->done_qbuffer[index] = 0; 2018 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 2019 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 2020 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2021 arcmsr_drain_donequeue(acb, pCCB, error); 2022 index++; 2023 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2024 reg->doneq_index = index; 2025 } 2026 } 2027 2028 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb) 2029 { 2030 struct MessageUnit_C __iomem *phbcmu; 2031 struct ARCMSR_CDB *arcmsr_cdb; 2032 struct CommandControlBlock *ccb; 2033 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 2034 int error; 2035 2036 phbcmu = acb->pmuC; 2037 /* areca cdb command done */ 2038 /* Use correct offset and size for syncing */ 2039 2040 while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) != 2041 0xFFFFFFFF) { 2042 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2043 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2044 + ccb_cdb_phy); 2045 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, 2046 arcmsr_cdb); 2047 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2048 ? true : false; 2049 /* check if command done with no error */ 2050 arcmsr_drain_donequeue(acb, ccb, error); 2051 throttling++; 2052 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 2053 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, 2054 &phbcmu->inbound_doorbell); 2055 throttling = 0; 2056 } 2057 } 2058 } 2059 2060 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb) 2061 { 2062 u32 outbound_write_pointer, doneq_index, index_stripped, toggle; 2063 uint32_t addressLow, ccb_cdb_phy; 2064 int error; 2065 struct MessageUnit_D *pmu; 2066 struct ARCMSR_CDB *arcmsr_cdb; 2067 struct CommandControlBlock *ccb; 2068 unsigned long flags; 2069 2070 spin_lock_irqsave(&acb->doneq_lock, flags); 2071 pmu = acb->pmuD; 2072 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 2073 doneq_index = pmu->doneq_index; 2074 if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) { 2075 do { 2076 toggle = doneq_index & 0x4000; 2077 index_stripped = (doneq_index & 0xFFF) + 1; 2078 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 2079 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 2080 ((toggle ^ 0x4000) + 1); 2081 doneq_index = pmu->doneq_index; 2082 addressLow = pmu->done_qbuffer[doneq_index & 2083 0xFFF].addressLow; 2084 ccb_cdb_phy = (addressLow & 0xFFFFFFF0); 2085 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset 2086 + ccb_cdb_phy); 2087 ccb = container_of(arcmsr_cdb, 2088 struct CommandControlBlock, arcmsr_cdb); 2089 error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 2090 ? true : false; 2091 arcmsr_drain_donequeue(acb, ccb, error); 2092 writel(doneq_index, pmu->outboundlist_read_pointer); 2093 } while ((doneq_index & 0xFFF) != 2094 (outbound_write_pointer & 0xFFF)); 2095 } 2096 writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR, 2097 pmu->outboundlist_interrupt_cause); 2098 readl(pmu->outboundlist_interrupt_cause); 2099 spin_unlock_irqrestore(&acb->doneq_lock, flags); 2100 } 2101 2102 /* 2103 ********************************************************************************** 2104 ** Handle a message interrupt 2105 ** 2106 ** The only message interrupt we expect is in response to a query for the current adapter config. 2107 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2108 ********************************************************************************** 2109 */ 2110 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb) 2111 { 2112 struct MessageUnit_A __iomem *reg = acb->pmuA; 2113 /*clear interrupt and message state*/ 2114 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 2115 schedule_work(&acb->arcmsr_do_message_isr_bh); 2116 } 2117 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb) 2118 { 2119 struct MessageUnit_B *reg = acb->pmuB; 2120 2121 /*clear interrupt and message state*/ 2122 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2123 schedule_work(&acb->arcmsr_do_message_isr_bh); 2124 } 2125 /* 2126 ********************************************************************************** 2127 ** Handle a message interrupt 2128 ** 2129 ** The only message interrupt we expect is in response to a query for the 2130 ** current adapter config. 2131 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 2132 ********************************************************************************** 2133 */ 2134 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb) 2135 { 2136 struct MessageUnit_C __iomem *reg = acb->pmuC; 2137 /*clear interrupt and message state*/ 2138 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 2139 schedule_work(&acb->arcmsr_do_message_isr_bh); 2140 } 2141 2142 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb) 2143 { 2144 struct MessageUnit_D *reg = acb->pmuD; 2145 2146 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell); 2147 readl(reg->outbound_doorbell); 2148 schedule_work(&acb->arcmsr_do_message_isr_bh); 2149 } 2150 2151 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb) 2152 { 2153 uint32_t outbound_intstatus; 2154 struct MessageUnit_A __iomem *reg = acb->pmuA; 2155 outbound_intstatus = readl(®->outbound_intstatus) & 2156 acb->outbound_int_enable; 2157 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) 2158 return IRQ_NONE; 2159 do { 2160 writel(outbound_intstatus, ®->outbound_intstatus); 2161 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) 2162 arcmsr_hbaA_doorbell_isr(acb); 2163 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) 2164 arcmsr_hbaA_postqueue_isr(acb); 2165 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) 2166 arcmsr_hbaA_message_isr(acb); 2167 outbound_intstatus = readl(®->outbound_intstatus) & 2168 acb->outbound_int_enable; 2169 } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT 2170 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT 2171 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT)); 2172 return IRQ_HANDLED; 2173 } 2174 2175 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb) 2176 { 2177 uint32_t outbound_doorbell; 2178 struct MessageUnit_B *reg = acb->pmuB; 2179 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2180 acb->outbound_int_enable; 2181 if (!outbound_doorbell) 2182 return IRQ_NONE; 2183 do { 2184 writel(~outbound_doorbell, reg->iop2drv_doorbell); 2185 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2186 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) 2187 arcmsr_iop2drv_data_wrote_handle(acb); 2188 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) 2189 arcmsr_iop2drv_data_read_handle(acb); 2190 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) 2191 arcmsr_hbaB_postqueue_isr(acb); 2192 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) 2193 arcmsr_hbaB_message_isr(acb); 2194 outbound_doorbell = readl(reg->iop2drv_doorbell) & 2195 acb->outbound_int_enable; 2196 } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK 2197 | ARCMSR_IOP2DRV_DATA_READ_OK 2198 | ARCMSR_IOP2DRV_CDB_DONE 2199 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)); 2200 return IRQ_HANDLED; 2201 } 2202 2203 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB) 2204 { 2205 uint32_t host_interrupt_status; 2206 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 2207 /* 2208 ********************************************* 2209 ** check outbound intstatus 2210 ********************************************* 2211 */ 2212 host_interrupt_status = readl(&phbcmu->host_int_status) & 2213 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2214 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR); 2215 if (!host_interrupt_status) 2216 return IRQ_NONE; 2217 do { 2218 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) 2219 arcmsr_hbaC_doorbell_isr(pACB); 2220 /* MU post queue interrupts*/ 2221 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) 2222 arcmsr_hbaC_postqueue_isr(pACB); 2223 host_interrupt_status = readl(&phbcmu->host_int_status); 2224 } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | 2225 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)); 2226 return IRQ_HANDLED; 2227 } 2228 2229 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB) 2230 { 2231 u32 host_interrupt_status; 2232 struct MessageUnit_D *pmu = pACB->pmuD; 2233 2234 host_interrupt_status = readl(pmu->host_int_status) & 2235 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2236 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR); 2237 if (!host_interrupt_status) 2238 return IRQ_NONE; 2239 do { 2240 /* MU post queue interrupts*/ 2241 if (host_interrupt_status & 2242 ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR) 2243 arcmsr_hbaD_postqueue_isr(pACB); 2244 if (host_interrupt_status & 2245 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR) 2246 arcmsr_hbaD_doorbell_isr(pACB); 2247 host_interrupt_status = readl(pmu->host_int_status); 2248 } while (host_interrupt_status & 2249 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR | 2250 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)); 2251 return IRQ_HANDLED; 2252 } 2253 2254 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 2255 { 2256 switch (acb->adapter_type) { 2257 case ACB_ADAPTER_TYPE_A: 2258 return arcmsr_hbaA_handle_isr(acb); 2259 break; 2260 case ACB_ADAPTER_TYPE_B: 2261 return arcmsr_hbaB_handle_isr(acb); 2262 break; 2263 case ACB_ADAPTER_TYPE_C: 2264 return arcmsr_hbaC_handle_isr(acb); 2265 case ACB_ADAPTER_TYPE_D: 2266 return arcmsr_hbaD_handle_isr(acb); 2267 default: 2268 return IRQ_NONE; 2269 } 2270 } 2271 2272 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 2273 { 2274 if (acb) { 2275 /* stop adapter background rebuild */ 2276 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 2277 uint32_t intmask_org; 2278 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 2279 intmask_org = arcmsr_disable_outbound_ints(acb); 2280 arcmsr_stop_adapter_bgrb(acb); 2281 arcmsr_flush_adapter_cache(acb); 2282 arcmsr_enable_outbound_ints(acb, intmask_org); 2283 } 2284 } 2285 } 2286 2287 2288 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb) 2289 { 2290 uint32_t i; 2291 2292 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2293 for (i = 0; i < 15; i++) { 2294 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2295 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2296 acb->rqbuf_getIndex = 0; 2297 acb->rqbuf_putIndex = 0; 2298 arcmsr_iop_message_read(acb); 2299 mdelay(30); 2300 } else if (acb->rqbuf_getIndex != 2301 acb->rqbuf_putIndex) { 2302 acb->rqbuf_getIndex = 0; 2303 acb->rqbuf_putIndex = 0; 2304 mdelay(30); 2305 } else 2306 break; 2307 } 2308 } 2309 } 2310 2311 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 2312 struct scsi_cmnd *cmd) 2313 { 2314 char *buffer; 2315 unsigned short use_sg; 2316 int retvalue = 0, transfer_len = 0; 2317 unsigned long flags; 2318 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 2319 uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 | 2320 (uint32_t)cmd->cmnd[6] << 16 | 2321 (uint32_t)cmd->cmnd[7] << 8 | 2322 (uint32_t)cmd->cmnd[8]; 2323 struct scatterlist *sg; 2324 2325 use_sg = scsi_sg_count(cmd); 2326 sg = scsi_sglist(cmd); 2327 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2328 if (use_sg > 1) { 2329 retvalue = ARCMSR_MESSAGE_FAIL; 2330 goto message_out; 2331 } 2332 transfer_len += sg->length; 2333 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 2334 retvalue = ARCMSR_MESSAGE_FAIL; 2335 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__); 2336 goto message_out; 2337 } 2338 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer; 2339 switch (controlcode) { 2340 case ARCMSR_MESSAGE_READ_RQBUFFER: { 2341 unsigned char *ver_addr; 2342 uint8_t *ptmpQbuffer; 2343 uint32_t allxfer_len = 0; 2344 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2345 if (!ver_addr) { 2346 retvalue = ARCMSR_MESSAGE_FAIL; 2347 pr_info("%s: memory not enough!\n", __func__); 2348 goto message_out; 2349 } 2350 ptmpQbuffer = ver_addr; 2351 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2352 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) { 2353 unsigned int tail = acb->rqbuf_getIndex; 2354 unsigned int head = acb->rqbuf_putIndex; 2355 unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER); 2356 2357 allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER); 2358 if (allxfer_len > ARCMSR_API_DATA_BUFLEN) 2359 allxfer_len = ARCMSR_API_DATA_BUFLEN; 2360 2361 if (allxfer_len <= cnt_to_end) 2362 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len); 2363 else { 2364 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end); 2365 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end); 2366 } 2367 acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER; 2368 } 2369 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, 2370 allxfer_len); 2371 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 2372 struct QBUFFER __iomem *prbuffer; 2373 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 2374 prbuffer = arcmsr_get_iop_rqbuffer(acb); 2375 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0) 2376 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 2377 } 2378 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2379 kfree(ver_addr); 2380 pcmdmessagefld->cmdmessage.Length = allxfer_len; 2381 if (acb->fw_flag == FW_DEADLOCK) 2382 pcmdmessagefld->cmdmessage.ReturnCode = 2383 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2384 else 2385 pcmdmessagefld->cmdmessage.ReturnCode = 2386 ARCMSR_MESSAGE_RETURNCODE_OK; 2387 break; 2388 } 2389 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 2390 unsigned char *ver_addr; 2391 int32_t user_len, cnt2end; 2392 uint8_t *pQbuffer, *ptmpuserbuffer; 2393 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC); 2394 if (!ver_addr) { 2395 retvalue = ARCMSR_MESSAGE_FAIL; 2396 goto message_out; 2397 } 2398 ptmpuserbuffer = ver_addr; 2399 user_len = pcmdmessagefld->cmdmessage.Length; 2400 memcpy(ptmpuserbuffer, 2401 pcmdmessagefld->messagedatabuffer, user_len); 2402 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2403 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) { 2404 struct SENSE_DATA *sensebuffer = 2405 (struct SENSE_DATA *)cmd->sense_buffer; 2406 arcmsr_write_ioctldata2iop(acb); 2407 /* has error report sensedata */ 2408 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 2409 sensebuffer->SenseKey = ILLEGAL_REQUEST; 2410 sensebuffer->AdditionalSenseLength = 0x0A; 2411 sensebuffer->AdditionalSenseCode = 0x20; 2412 sensebuffer->Valid = 1; 2413 retvalue = ARCMSR_MESSAGE_FAIL; 2414 } else { 2415 pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex]; 2416 cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex; 2417 if (user_len > cnt2end) { 2418 memcpy(pQbuffer, ptmpuserbuffer, cnt2end); 2419 ptmpuserbuffer += cnt2end; 2420 user_len -= cnt2end; 2421 acb->wqbuf_putIndex = 0; 2422 pQbuffer = acb->wqbuffer; 2423 } 2424 memcpy(pQbuffer, ptmpuserbuffer, user_len); 2425 acb->wqbuf_putIndex += user_len; 2426 acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER; 2427 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 2428 acb->acb_flags &= 2429 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 2430 arcmsr_write_ioctldata2iop(acb); 2431 } 2432 } 2433 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2434 kfree(ver_addr); 2435 if (acb->fw_flag == FW_DEADLOCK) 2436 pcmdmessagefld->cmdmessage.ReturnCode = 2437 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2438 else 2439 pcmdmessagefld->cmdmessage.ReturnCode = 2440 ARCMSR_MESSAGE_RETURNCODE_OK; 2441 break; 2442 } 2443 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 2444 uint8_t *pQbuffer = acb->rqbuffer; 2445 2446 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2447 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2448 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2449 acb->rqbuf_getIndex = 0; 2450 acb->rqbuf_putIndex = 0; 2451 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2452 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2453 if (acb->fw_flag == FW_DEADLOCK) 2454 pcmdmessagefld->cmdmessage.ReturnCode = 2455 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2456 else 2457 pcmdmessagefld->cmdmessage.ReturnCode = 2458 ARCMSR_MESSAGE_RETURNCODE_OK; 2459 break; 2460 } 2461 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 2462 uint8_t *pQbuffer = acb->wqbuffer; 2463 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2464 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2465 ACB_F_MESSAGE_WQBUFFER_READED); 2466 acb->wqbuf_getIndex = 0; 2467 acb->wqbuf_putIndex = 0; 2468 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 2469 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2470 if (acb->fw_flag == FW_DEADLOCK) 2471 pcmdmessagefld->cmdmessage.ReturnCode = 2472 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2473 else 2474 pcmdmessagefld->cmdmessage.ReturnCode = 2475 ARCMSR_MESSAGE_RETURNCODE_OK; 2476 break; 2477 } 2478 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 2479 uint8_t *pQbuffer; 2480 arcmsr_clear_iop2drv_rqueue_buffer(acb); 2481 spin_lock_irqsave(&acb->rqbuffer_lock, flags); 2482 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 2483 acb->rqbuf_getIndex = 0; 2484 acb->rqbuf_putIndex = 0; 2485 pQbuffer = acb->rqbuffer; 2486 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2487 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags); 2488 spin_lock_irqsave(&acb->wqbuffer_lock, flags); 2489 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 2490 ACB_F_MESSAGE_WQBUFFER_READED); 2491 acb->wqbuf_getIndex = 0; 2492 acb->wqbuf_putIndex = 0; 2493 pQbuffer = acb->wqbuffer; 2494 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 2495 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags); 2496 if (acb->fw_flag == FW_DEADLOCK) 2497 pcmdmessagefld->cmdmessage.ReturnCode = 2498 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2499 else 2500 pcmdmessagefld->cmdmessage.ReturnCode = 2501 ARCMSR_MESSAGE_RETURNCODE_OK; 2502 break; 2503 } 2504 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 2505 if (acb->fw_flag == FW_DEADLOCK) 2506 pcmdmessagefld->cmdmessage.ReturnCode = 2507 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2508 else 2509 pcmdmessagefld->cmdmessage.ReturnCode = 2510 ARCMSR_MESSAGE_RETURNCODE_3F; 2511 break; 2512 } 2513 case ARCMSR_MESSAGE_SAY_HELLO: { 2514 int8_t *hello_string = "Hello! I am ARCMSR"; 2515 if (acb->fw_flag == FW_DEADLOCK) 2516 pcmdmessagefld->cmdmessage.ReturnCode = 2517 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2518 else 2519 pcmdmessagefld->cmdmessage.ReturnCode = 2520 ARCMSR_MESSAGE_RETURNCODE_OK; 2521 memcpy(pcmdmessagefld->messagedatabuffer, 2522 hello_string, (int16_t)strlen(hello_string)); 2523 break; 2524 } 2525 case ARCMSR_MESSAGE_SAY_GOODBYE: { 2526 if (acb->fw_flag == FW_DEADLOCK) 2527 pcmdmessagefld->cmdmessage.ReturnCode = 2528 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2529 else 2530 pcmdmessagefld->cmdmessage.ReturnCode = 2531 ARCMSR_MESSAGE_RETURNCODE_OK; 2532 arcmsr_iop_parking(acb); 2533 break; 2534 } 2535 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: { 2536 if (acb->fw_flag == FW_DEADLOCK) 2537 pcmdmessagefld->cmdmessage.ReturnCode = 2538 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 2539 else 2540 pcmdmessagefld->cmdmessage.ReturnCode = 2541 ARCMSR_MESSAGE_RETURNCODE_OK; 2542 arcmsr_flush_adapter_cache(acb); 2543 break; 2544 } 2545 default: 2546 retvalue = ARCMSR_MESSAGE_FAIL; 2547 pr_info("%s: unknown controlcode!\n", __func__); 2548 } 2549 message_out: 2550 if (use_sg) { 2551 struct scatterlist *sg = scsi_sglist(cmd); 2552 kunmap_atomic(buffer - sg->offset); 2553 } 2554 return retvalue; 2555 } 2556 2557 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2558 { 2559 struct list_head *head = &acb->ccb_free_list; 2560 struct CommandControlBlock *ccb = NULL; 2561 unsigned long flags; 2562 spin_lock_irqsave(&acb->ccblist_lock, flags); 2563 if (!list_empty(head)) { 2564 ccb = list_entry(head->next, struct CommandControlBlock, list); 2565 list_del_init(&ccb->list); 2566 }else{ 2567 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2568 return NULL; 2569 } 2570 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2571 return ccb; 2572 } 2573 2574 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2575 struct scsi_cmnd *cmd) 2576 { 2577 switch (cmd->cmnd[0]) { 2578 case INQUIRY: { 2579 unsigned char inqdata[36]; 2580 char *buffer; 2581 struct scatterlist *sg; 2582 2583 if (cmd->device->lun) { 2584 cmd->result = (DID_TIME_OUT << 16); 2585 cmd->scsi_done(cmd); 2586 return; 2587 } 2588 inqdata[0] = TYPE_PROCESSOR; 2589 /* Periph Qualifier & Periph Dev Type */ 2590 inqdata[1] = 0; 2591 /* rem media bit & Dev Type Modifier */ 2592 inqdata[2] = 0; 2593 /* ISO, ECMA, & ANSI versions */ 2594 inqdata[4] = 31; 2595 /* length of additional data */ 2596 strncpy(&inqdata[8], "Areca ", 8); 2597 /* Vendor Identification */ 2598 strncpy(&inqdata[16], "RAID controller ", 16); 2599 /* Product Identification */ 2600 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2601 2602 sg = scsi_sglist(cmd); 2603 buffer = kmap_atomic(sg_page(sg)) + sg->offset; 2604 2605 memcpy(buffer, inqdata, sizeof(inqdata)); 2606 sg = scsi_sglist(cmd); 2607 kunmap_atomic(buffer - sg->offset); 2608 2609 cmd->scsi_done(cmd); 2610 } 2611 break; 2612 case WRITE_BUFFER: 2613 case READ_BUFFER: { 2614 if (arcmsr_iop_message_xfer(acb, cmd)) 2615 cmd->result = (DID_ERROR << 16); 2616 cmd->scsi_done(cmd); 2617 } 2618 break; 2619 default: 2620 cmd->scsi_done(cmd); 2621 } 2622 } 2623 2624 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2625 void (* done)(struct scsi_cmnd *)) 2626 { 2627 struct Scsi_Host *host = cmd->device->host; 2628 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2629 struct CommandControlBlock *ccb; 2630 int target = cmd->device->id; 2631 int lun = cmd->device->lun; 2632 uint8_t scsicmd = cmd->cmnd[0]; 2633 cmd->scsi_done = done; 2634 cmd->host_scribble = NULL; 2635 cmd->result = 0; 2636 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2637 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2638 cmd->result = (DID_NO_CONNECT << 16); 2639 } 2640 cmd->scsi_done(cmd); 2641 return 0; 2642 } 2643 if (target == 16) { 2644 /* virtual device for iop message transfer */ 2645 arcmsr_handle_virtual_command(acb, cmd); 2646 return 0; 2647 } 2648 ccb = arcmsr_get_freeccb(acb); 2649 if (!ccb) 2650 return SCSI_MLQUEUE_HOST_BUSY; 2651 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2652 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2653 cmd->scsi_done(cmd); 2654 return 0; 2655 } 2656 arcmsr_post_ccb(acb, ccb); 2657 return 0; 2658 } 2659 2660 static DEF_SCSI_QCMD(arcmsr_queue_command) 2661 2662 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb) 2663 { 2664 struct MessageUnit_A __iomem *reg = acb->pmuA; 2665 char *acb_firm_model = acb->firm_model; 2666 char *acb_firm_version = acb->firm_version; 2667 char *acb_device_map = acb->device_map; 2668 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2669 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2670 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2671 int count; 2672 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2673 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 2674 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2675 miscellaneous data' timeout \n", acb->host->host_no); 2676 return false; 2677 } 2678 count = 8; 2679 while (count){ 2680 *acb_firm_model = readb(iop_firm_model); 2681 acb_firm_model++; 2682 iop_firm_model++; 2683 count--; 2684 } 2685 2686 count = 16; 2687 while (count){ 2688 *acb_firm_version = readb(iop_firm_version); 2689 acb_firm_version++; 2690 iop_firm_version++; 2691 count--; 2692 } 2693 2694 count=16; 2695 while(count){ 2696 *acb_device_map = readb(iop_device_map); 2697 acb_device_map++; 2698 iop_device_map++; 2699 count--; 2700 } 2701 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2702 acb->host->host_no, 2703 acb->firm_model, 2704 acb->firm_version); 2705 acb->signature = readl(®->message_rwbuffer[0]); 2706 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2707 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2708 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2709 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2710 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2711 return true; 2712 } 2713 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb) 2714 { 2715 struct MessageUnit_B *reg = acb->pmuB; 2716 char *acb_firm_model = acb->firm_model; 2717 char *acb_firm_version = acb->firm_version; 2718 char *acb_device_map = acb->device_map; 2719 char __iomem *iop_firm_model; 2720 /*firm_model,15,60-67*/ 2721 char __iomem *iop_firm_version; 2722 /*firm_version,17,68-83*/ 2723 char __iomem *iop_device_map; 2724 /*firm_version,21,84-99*/ 2725 int count; 2726 2727 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2728 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2729 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2730 2731 arcmsr_wait_firmware_ready(acb); 2732 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 2733 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2734 printk(KERN_ERR "arcmsr%d: can't set driver mode.\n", acb->host->host_no); 2735 return false; 2736 } 2737 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2738 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 2739 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2740 miscellaneous data' timeout \n", acb->host->host_no); 2741 return false; 2742 } 2743 count = 8; 2744 while (count){ 2745 *acb_firm_model = readb(iop_firm_model); 2746 acb_firm_model++; 2747 iop_firm_model++; 2748 count--; 2749 } 2750 count = 16; 2751 while (count){ 2752 *acb_firm_version = readb(iop_firm_version); 2753 acb_firm_version++; 2754 iop_firm_version++; 2755 count--; 2756 } 2757 2758 count = 16; 2759 while(count){ 2760 *acb_device_map = readb(iop_device_map); 2761 acb_device_map++; 2762 iop_device_map++; 2763 count--; 2764 } 2765 2766 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2767 acb->host->host_no, 2768 acb->firm_model, 2769 acb->firm_version); 2770 2771 acb->signature = readl(®->message_rwbuffer[0]); 2772 /*firm_signature,1,00-03*/ 2773 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2774 /*firm_request_len,1,04-07*/ 2775 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2776 /*firm_numbers_queue,2,08-11*/ 2777 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2778 /*firm_sdram_size,3,12-15*/ 2779 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2780 /*firm_ide_channels,4,16-19*/ 2781 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2782 /*firm_ide_channels,4,16-19*/ 2783 return true; 2784 } 2785 2786 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB) 2787 { 2788 uint32_t intmask_org, Index, firmware_state = 0; 2789 struct MessageUnit_C __iomem *reg = pACB->pmuC; 2790 char *acb_firm_model = pACB->firm_model; 2791 char *acb_firm_version = pACB->firm_version; 2792 char __iomem *iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2793 char __iomem *iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2794 int count; 2795 /* disable all outbound interrupt */ 2796 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2797 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2798 /* wait firmware ready */ 2799 do { 2800 firmware_state = readl(®->outbound_msgaddr1); 2801 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2802 /* post "get config" instruction */ 2803 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2804 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2805 /* wait message ready */ 2806 for (Index = 0; Index < 2000; Index++) { 2807 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2808 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2809 break; 2810 } 2811 udelay(10); 2812 } /*max 1 seconds*/ 2813 if (Index >= 2000) { 2814 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2815 miscellaneous data' timeout \n", pACB->host->host_no); 2816 return false; 2817 } 2818 count = 8; 2819 while (count) { 2820 *acb_firm_model = readb(iop_firm_model); 2821 acb_firm_model++; 2822 iop_firm_model++; 2823 count--; 2824 } 2825 count = 16; 2826 while (count) { 2827 *acb_firm_version = readb(iop_firm_version); 2828 acb_firm_version++; 2829 iop_firm_version++; 2830 count--; 2831 } 2832 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2833 pACB->host->host_no, 2834 pACB->firm_model, 2835 pACB->firm_version); 2836 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2837 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2838 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2839 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2840 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2841 /*all interrupt service will be enable at arcmsr_iop_init*/ 2842 return true; 2843 } 2844 2845 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb) 2846 { 2847 char *acb_firm_model = acb->firm_model; 2848 char *acb_firm_version = acb->firm_version; 2849 char *acb_device_map = acb->device_map; 2850 char __iomem *iop_firm_model; 2851 char __iomem *iop_firm_version; 2852 char __iomem *iop_device_map; 2853 u32 count; 2854 struct MessageUnit_D *reg = acb->pmuD; 2855 2856 iop_firm_model = (char __iomem *)(®->msgcode_rwbuffer[15]); 2857 iop_firm_version = (char __iomem *)(®->msgcode_rwbuffer[17]); 2858 iop_device_map = (char __iomem *)(®->msgcode_rwbuffer[21]); 2859 if (readl(acb->pmuD->outbound_doorbell) & 2860 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) { 2861 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, 2862 acb->pmuD->outbound_doorbell);/*clear interrupt*/ 2863 } 2864 /* post "get config" instruction */ 2865 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0); 2866 /* wait message ready */ 2867 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 2868 pr_notice("arcmsr%d: wait get adapter firmware " 2869 "miscellaneous data timeout\n", acb->host->host_no); 2870 return false; 2871 } 2872 count = 8; 2873 while (count) { 2874 *acb_firm_model = readb(iop_firm_model); 2875 acb_firm_model++; 2876 iop_firm_model++; 2877 count--; 2878 } 2879 count = 16; 2880 while (count) { 2881 *acb_firm_version = readb(iop_firm_version); 2882 acb_firm_version++; 2883 iop_firm_version++; 2884 count--; 2885 } 2886 count = 16; 2887 while (count) { 2888 *acb_device_map = readb(iop_device_map); 2889 acb_device_map++; 2890 iop_device_map++; 2891 count--; 2892 } 2893 acb->signature = readl(®->msgcode_rwbuffer[0]); 2894 /*firm_signature,1,00-03*/ 2895 acb->firm_request_len = readl(®->msgcode_rwbuffer[1]); 2896 /*firm_request_len,1,04-07*/ 2897 acb->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); 2898 /*firm_numbers_queue,2,08-11*/ 2899 acb->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); 2900 /*firm_sdram_size,3,12-15*/ 2901 acb->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); 2902 /*firm_hd_channels,4,16-19*/ 2903 acb->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); 2904 pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n", 2905 acb->host->host_no, 2906 acb->firm_model, 2907 acb->firm_version); 2908 return true; 2909 } 2910 2911 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2912 { 2913 bool rtn = false; 2914 2915 switch (acb->adapter_type) { 2916 case ACB_ADAPTER_TYPE_A: 2917 rtn = arcmsr_hbaA_get_config(acb); 2918 break; 2919 case ACB_ADAPTER_TYPE_B: 2920 rtn = arcmsr_hbaB_get_config(acb); 2921 break; 2922 case ACB_ADAPTER_TYPE_C: 2923 rtn = arcmsr_hbaC_get_config(acb); 2924 break; 2925 case ACB_ADAPTER_TYPE_D: 2926 rtn = arcmsr_hbaD_get_config(acb); 2927 break; 2928 default: 2929 break; 2930 } 2931 if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD) 2932 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD; 2933 else 2934 acb->maxOutstanding = acb->firm_numbers_queue - 1; 2935 acb->host->can_queue = acb->maxOutstanding; 2936 return rtn; 2937 } 2938 2939 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb, 2940 struct CommandControlBlock *poll_ccb) 2941 { 2942 struct MessageUnit_A __iomem *reg = acb->pmuA; 2943 struct CommandControlBlock *ccb; 2944 struct ARCMSR_CDB *arcmsr_cdb; 2945 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2946 int rtn; 2947 bool error; 2948 polling_hba_ccb_retry: 2949 poll_count++; 2950 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2951 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2952 while (1) { 2953 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2954 if (poll_ccb_done){ 2955 rtn = SUCCESS; 2956 break; 2957 }else { 2958 msleep(25); 2959 if (poll_count > 100){ 2960 rtn = FAILED; 2961 break; 2962 } 2963 goto polling_hba_ccb_retry; 2964 } 2965 } 2966 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2967 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2968 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 2969 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2970 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2971 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2972 " poll command abort successfully \n" 2973 , acb->host->host_no 2974 , ccb->pcmd->device->id 2975 , (u32)ccb->pcmd->device->lun 2976 , ccb); 2977 ccb->pcmd->result = DID_ABORT << 16; 2978 arcmsr_ccb_complete(ccb); 2979 continue; 2980 } 2981 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2982 " command done ccb = '0x%p'" 2983 "ccboutstandingcount = %d \n" 2984 , acb->host->host_no 2985 , ccb 2986 , atomic_read(&acb->ccboutstandingcount)); 2987 continue; 2988 } 2989 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2990 arcmsr_report_ccb_state(acb, ccb, error); 2991 } 2992 return rtn; 2993 } 2994 2995 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb, 2996 struct CommandControlBlock *poll_ccb) 2997 { 2998 struct MessageUnit_B *reg = acb->pmuB; 2999 struct ARCMSR_CDB *arcmsr_cdb; 3000 struct CommandControlBlock *ccb; 3001 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 3002 int index, rtn; 3003 bool error; 3004 polling_hbb_ccb_retry: 3005 3006 poll_count++; 3007 /* clear doorbell interrupt */ 3008 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3009 while(1){ 3010 index = reg->doneq_index; 3011 flag_ccb = reg->done_qbuffer[index]; 3012 if (flag_ccb == 0) { 3013 if (poll_ccb_done){ 3014 rtn = SUCCESS; 3015 break; 3016 }else { 3017 msleep(25); 3018 if (poll_count > 100){ 3019 rtn = FAILED; 3020 break; 3021 } 3022 goto polling_hbb_ccb_retry; 3023 } 3024 } 3025 reg->done_qbuffer[index] = 0; 3026 index++; 3027 /*if last index number set it to 0 */ 3028 index %= ARCMSR_MAX_HBB_POSTQUEUE; 3029 reg->doneq_index = index; 3030 /* check if command done with no error*/ 3031 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 3032 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3033 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0; 3034 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 3035 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 3036 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3037 " poll command abort successfully \n" 3038 ,acb->host->host_no 3039 ,ccb->pcmd->device->id 3040 ,(u32)ccb->pcmd->device->lun 3041 ,ccb); 3042 ccb->pcmd->result = DID_ABORT << 16; 3043 arcmsr_ccb_complete(ccb); 3044 continue; 3045 } 3046 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3047 " command done ccb = '0x%p'" 3048 "ccboutstandingcount = %d \n" 3049 , acb->host->host_no 3050 , ccb 3051 , atomic_read(&acb->ccboutstandingcount)); 3052 continue; 3053 } 3054 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 3055 arcmsr_report_ccb_state(acb, ccb, error); 3056 } 3057 return rtn; 3058 } 3059 3060 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb, 3061 struct CommandControlBlock *poll_ccb) 3062 { 3063 struct MessageUnit_C __iomem *reg = acb->pmuC; 3064 uint32_t flag_ccb, ccb_cdb_phy; 3065 struct ARCMSR_CDB *arcmsr_cdb; 3066 bool error; 3067 struct CommandControlBlock *pCCB; 3068 uint32_t poll_ccb_done = 0, poll_count = 0; 3069 int rtn; 3070 polling_hbc_ccb_retry: 3071 poll_count++; 3072 while (1) { 3073 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 3074 if (poll_ccb_done) { 3075 rtn = SUCCESS; 3076 break; 3077 } else { 3078 msleep(25); 3079 if (poll_count > 100) { 3080 rtn = FAILED; 3081 break; 3082 } 3083 goto polling_hbc_ccb_retry; 3084 } 3085 } 3086 flag_ccb = readl(®->outbound_queueport_low); 3087 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3088 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 3089 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 3090 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3091 /* check ifcommand done with no error*/ 3092 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 3093 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3094 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 3095 " poll command abort successfully \n" 3096 , acb->host->host_no 3097 , pCCB->pcmd->device->id 3098 , (u32)pCCB->pcmd->device->lun 3099 , pCCB); 3100 pCCB->pcmd->result = DID_ABORT << 16; 3101 arcmsr_ccb_complete(pCCB); 3102 continue; 3103 } 3104 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 3105 " command done ccb = '0x%p'" 3106 "ccboutstandingcount = %d \n" 3107 , acb->host->host_no 3108 , pCCB 3109 , atomic_read(&acb->ccboutstandingcount)); 3110 continue; 3111 } 3112 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 3113 arcmsr_report_ccb_state(acb, pCCB, error); 3114 } 3115 return rtn; 3116 } 3117 3118 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb, 3119 struct CommandControlBlock *poll_ccb) 3120 { 3121 bool error; 3122 uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy; 3123 int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle; 3124 unsigned long flags; 3125 struct ARCMSR_CDB *arcmsr_cdb; 3126 struct CommandControlBlock *pCCB; 3127 struct MessageUnit_D *pmu = acb->pmuD; 3128 3129 polling_hbaD_ccb_retry: 3130 poll_count++; 3131 while (1) { 3132 spin_lock_irqsave(&acb->doneq_lock, flags); 3133 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1; 3134 doneq_index = pmu->doneq_index; 3135 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) { 3136 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3137 if (poll_ccb_done) { 3138 rtn = SUCCESS; 3139 break; 3140 } else { 3141 msleep(25); 3142 if (poll_count > 40) { 3143 rtn = FAILED; 3144 break; 3145 } 3146 goto polling_hbaD_ccb_retry; 3147 } 3148 } 3149 toggle = doneq_index & 0x4000; 3150 index_stripped = (doneq_index & 0xFFF) + 1; 3151 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE; 3152 pmu->doneq_index = index_stripped ? (index_stripped | toggle) : 3153 ((toggle ^ 0x4000) + 1); 3154 doneq_index = pmu->doneq_index; 3155 spin_unlock_irqrestore(&acb->doneq_lock, flags); 3156 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow; 3157 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 3158 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + 3159 ccb_cdb_phy); 3160 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, 3161 arcmsr_cdb); 3162 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0; 3163 if ((pCCB->acb != acb) || 3164 (pCCB->startdone != ARCMSR_CCB_START)) { 3165 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 3166 pr_notice("arcmsr%d: scsi id = %d " 3167 "lun = %d ccb = '0x%p' poll command " 3168 "abort successfully\n" 3169 , acb->host->host_no 3170 , pCCB->pcmd->device->id 3171 , (u32)pCCB->pcmd->device->lun 3172 , pCCB); 3173 pCCB->pcmd->result = DID_ABORT << 16; 3174 arcmsr_ccb_complete(pCCB); 3175 continue; 3176 } 3177 pr_notice("arcmsr%d: polling an illegal " 3178 "ccb command done ccb = '0x%p' " 3179 "ccboutstandingcount = %d\n" 3180 , acb->host->host_no 3181 , pCCB 3182 , atomic_read(&acb->ccboutstandingcount)); 3183 continue; 3184 } 3185 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) 3186 ? true : false; 3187 arcmsr_report_ccb_state(acb, pCCB, error); 3188 } 3189 return rtn; 3190 } 3191 3192 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 3193 struct CommandControlBlock *poll_ccb) 3194 { 3195 int rtn = 0; 3196 switch (acb->adapter_type) { 3197 3198 case ACB_ADAPTER_TYPE_A: { 3199 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb); 3200 } 3201 break; 3202 3203 case ACB_ADAPTER_TYPE_B: { 3204 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb); 3205 } 3206 break; 3207 case ACB_ADAPTER_TYPE_C: { 3208 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb); 3209 } 3210 break; 3211 case ACB_ADAPTER_TYPE_D: 3212 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb); 3213 break; 3214 } 3215 return rtn; 3216 } 3217 3218 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 3219 { 3220 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 3221 dma_addr_t dma_coherent_handle; 3222 3223 /* 3224 ******************************************************************** 3225 ** here we need to tell iop 331 our freeccb.HighPart 3226 ** if freeccb.HighPart is not zero 3227 ******************************************************************** 3228 */ 3229 switch (acb->adapter_type) { 3230 case ACB_ADAPTER_TYPE_B: 3231 case ACB_ADAPTER_TYPE_D: 3232 dma_coherent_handle = acb->dma_coherent_handle2; 3233 break; 3234 default: 3235 dma_coherent_handle = acb->dma_coherent_handle; 3236 break; 3237 } 3238 cdb_phyaddr = lower_32_bits(dma_coherent_handle); 3239 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle); 3240 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 3241 /* 3242 *********************************************************************** 3243 ** if adapter type B, set window of "post command Q" 3244 *********************************************************************** 3245 */ 3246 switch (acb->adapter_type) { 3247 3248 case ACB_ADAPTER_TYPE_A: { 3249 if (cdb_phyaddr_hi32 != 0) { 3250 struct MessageUnit_A __iomem *reg = acb->pmuA; 3251 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 3252 ®->message_rwbuffer[0]); 3253 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 3254 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 3255 ®->inbound_msgaddr0); 3256 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3257 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 3258 part physical address timeout\n", 3259 acb->host->host_no); 3260 return 1; 3261 } 3262 } 3263 } 3264 break; 3265 3266 case ACB_ADAPTER_TYPE_B: { 3267 uint32_t __iomem *rwbuffer; 3268 3269 struct MessageUnit_B *reg = acb->pmuB; 3270 reg->postq_index = 0; 3271 reg->doneq_index = 0; 3272 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 3273 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3274 printk(KERN_NOTICE "arcmsr%d: cannot set driver mode\n", \ 3275 acb->host->host_no); 3276 return 1; 3277 } 3278 rwbuffer = reg->message_rwbuffer; 3279 /* driver "set config" signature */ 3280 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3281 /* normal should be zero */ 3282 writel(cdb_phyaddr_hi32, rwbuffer++); 3283 /* postQ size (256 + 8)*4 */ 3284 writel(cdb_phyaddr, rwbuffer++); 3285 /* doneQ size (256 + 8)*4 */ 3286 writel(cdb_phyaddr + 1056, rwbuffer++); 3287 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 3288 writel(1056, rwbuffer); 3289 3290 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 3291 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3292 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3293 timeout \n",acb->host->host_no); 3294 return 1; 3295 } 3296 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 3297 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3298 pr_err("arcmsr%d: can't set driver mode.\n", 3299 acb->host->host_no); 3300 return 1; 3301 } 3302 } 3303 break; 3304 case ACB_ADAPTER_TYPE_C: { 3305 if (cdb_phyaddr_hi32 != 0) { 3306 struct MessageUnit_C __iomem *reg = acb->pmuC; 3307 3308 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n", 3309 acb->adapter_index, cdb_phyaddr_hi32); 3310 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 3311 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 3312 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 3313 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3314 if (!arcmsr_hbaC_wait_msgint_ready(acb)) { 3315 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 3316 timeout \n", acb->host->host_no); 3317 return 1; 3318 } 3319 } 3320 } 3321 break; 3322 case ACB_ADAPTER_TYPE_D: { 3323 uint32_t __iomem *rwbuffer; 3324 struct MessageUnit_D *reg = acb->pmuD; 3325 reg->postq_index = 0; 3326 reg->doneq_index = 0; 3327 rwbuffer = reg->msgcode_rwbuffer; 3328 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 3329 writel(cdb_phyaddr_hi32, rwbuffer++); 3330 writel(cdb_phyaddr, rwbuffer++); 3331 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE * 3332 sizeof(struct InBound_SRB)), rwbuffer++); 3333 writel(0x100, rwbuffer); 3334 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0); 3335 if (!arcmsr_hbaD_wait_msgint_ready(acb)) { 3336 pr_notice("arcmsr%d: 'set command Q window' timeout\n", 3337 acb->host->host_no); 3338 return 1; 3339 } 3340 } 3341 break; 3342 } 3343 return 0; 3344 } 3345 3346 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 3347 { 3348 uint32_t firmware_state = 0; 3349 switch (acb->adapter_type) { 3350 3351 case ACB_ADAPTER_TYPE_A: { 3352 struct MessageUnit_A __iomem *reg = acb->pmuA; 3353 do { 3354 firmware_state = readl(®->outbound_msgaddr1); 3355 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 3356 } 3357 break; 3358 3359 case ACB_ADAPTER_TYPE_B: { 3360 struct MessageUnit_B *reg = acb->pmuB; 3361 do { 3362 firmware_state = readl(reg->iop2drv_doorbell); 3363 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 3364 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 3365 } 3366 break; 3367 case ACB_ADAPTER_TYPE_C: { 3368 struct MessageUnit_C __iomem *reg = acb->pmuC; 3369 do { 3370 firmware_state = readl(®->outbound_msgaddr1); 3371 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 3372 } 3373 break; 3374 case ACB_ADAPTER_TYPE_D: { 3375 struct MessageUnit_D *reg = acb->pmuD; 3376 do { 3377 firmware_state = readl(reg->outbound_msgaddr1); 3378 } while ((firmware_state & 3379 ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0); 3380 } 3381 break; 3382 } 3383 } 3384 3385 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb) 3386 { 3387 struct MessageUnit_A __iomem *reg = acb->pmuA; 3388 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3389 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3390 return; 3391 } else { 3392 acb->fw_flag = FW_NORMAL; 3393 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 3394 atomic_set(&acb->rq_map_token, 16); 3395 } 3396 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3397 if (atomic_dec_and_test(&acb->rq_map_token)) { 3398 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3399 return; 3400 } 3401 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3402 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3403 } 3404 return; 3405 } 3406 3407 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb) 3408 { 3409 struct MessageUnit_B *reg = acb->pmuB; 3410 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 3411 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3412 return; 3413 } else { 3414 acb->fw_flag = FW_NORMAL; 3415 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3416 atomic_set(&acb->rq_map_token, 16); 3417 } 3418 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3419 if (atomic_dec_and_test(&acb->rq_map_token)) { 3420 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3421 return; 3422 } 3423 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 3424 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3425 } 3426 return; 3427 } 3428 3429 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb) 3430 { 3431 struct MessageUnit_C __iomem *reg = acb->pmuC; 3432 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3433 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3434 return; 3435 } else { 3436 acb->fw_flag = FW_NORMAL; 3437 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 3438 atomic_set(&acb->rq_map_token, 16); 3439 } 3440 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 3441 if (atomic_dec_and_test(&acb->rq_map_token)) { 3442 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3443 return; 3444 } 3445 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 3446 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 3447 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3448 } 3449 return; 3450 } 3451 3452 static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb) 3453 { 3454 struct MessageUnit_D *reg = acb->pmuD; 3455 3456 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || 3457 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || 3458 ((acb->acb_flags & ACB_F_ABORT) != 0)) { 3459 mod_timer(&acb->eternal_timer, 3460 jiffies + msecs_to_jiffies(6 * HZ)); 3461 } else { 3462 acb->fw_flag = FW_NORMAL; 3463 if (atomic_read(&acb->ante_token_value) == 3464 atomic_read(&acb->rq_map_token)) { 3465 atomic_set(&acb->rq_map_token, 16); 3466 } 3467 atomic_set(&acb->ante_token_value, 3468 atomic_read(&acb->rq_map_token)); 3469 if (atomic_dec_and_test(&acb->rq_map_token)) { 3470 mod_timer(&acb->eternal_timer, jiffies + 3471 msecs_to_jiffies(6 * HZ)); 3472 return; 3473 } 3474 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, 3475 reg->inbound_msgaddr0); 3476 mod_timer(&acb->eternal_timer, jiffies + 3477 msecs_to_jiffies(6 * HZ)); 3478 } 3479 } 3480 3481 static void arcmsr_request_device_map(unsigned long pacb) 3482 { 3483 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 3484 switch (acb->adapter_type) { 3485 case ACB_ADAPTER_TYPE_A: { 3486 arcmsr_hbaA_request_device_map(acb); 3487 } 3488 break; 3489 case ACB_ADAPTER_TYPE_B: { 3490 arcmsr_hbaB_request_device_map(acb); 3491 } 3492 break; 3493 case ACB_ADAPTER_TYPE_C: { 3494 arcmsr_hbaC_request_device_map(acb); 3495 } 3496 break; 3497 case ACB_ADAPTER_TYPE_D: 3498 arcmsr_hbaD_request_device_map(acb); 3499 break; 3500 } 3501 } 3502 3503 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb) 3504 { 3505 struct MessageUnit_A __iomem *reg = acb->pmuA; 3506 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3507 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 3508 if (!arcmsr_hbaA_wait_msgint_ready(acb)) { 3509 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3510 rebulid' timeout \n", acb->host->host_no); 3511 } 3512 } 3513 3514 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb) 3515 { 3516 struct MessageUnit_B *reg = acb->pmuB; 3517 acb->acb_flags |= ACB_F_MSG_START_BGRB; 3518 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 3519 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3520 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3521 rebulid' timeout \n",acb->host->host_no); 3522 } 3523 } 3524 3525 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB) 3526 { 3527 struct MessageUnit_C __iomem *phbcmu = pACB->pmuC; 3528 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3529 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 3530 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 3531 if (!arcmsr_hbaC_wait_msgint_ready(pACB)) { 3532 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 3533 rebulid' timeout \n", pACB->host->host_no); 3534 } 3535 return; 3536 } 3537 3538 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB) 3539 { 3540 struct MessageUnit_D *pmu = pACB->pmuD; 3541 3542 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 3543 writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0); 3544 if (!arcmsr_hbaD_wait_msgint_ready(pACB)) { 3545 pr_notice("arcmsr%d: wait 'start adapter " 3546 "background rebulid' timeout\n", pACB->host->host_no); 3547 } 3548 } 3549 3550 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 3551 { 3552 switch (acb->adapter_type) { 3553 case ACB_ADAPTER_TYPE_A: 3554 arcmsr_hbaA_start_bgrb(acb); 3555 break; 3556 case ACB_ADAPTER_TYPE_B: 3557 arcmsr_hbaB_start_bgrb(acb); 3558 break; 3559 case ACB_ADAPTER_TYPE_C: 3560 arcmsr_hbaC_start_bgrb(acb); 3561 break; 3562 case ACB_ADAPTER_TYPE_D: 3563 arcmsr_hbaD_start_bgrb(acb); 3564 break; 3565 } 3566 } 3567 3568 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 3569 { 3570 switch (acb->adapter_type) { 3571 case ACB_ADAPTER_TYPE_A: { 3572 struct MessageUnit_A __iomem *reg = acb->pmuA; 3573 uint32_t outbound_doorbell; 3574 /* empty doorbell Qbuffer if door bell ringed */ 3575 outbound_doorbell = readl(®->outbound_doorbell); 3576 /*clear doorbell interrupt */ 3577 writel(outbound_doorbell, ®->outbound_doorbell); 3578 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3579 } 3580 break; 3581 3582 case ACB_ADAPTER_TYPE_B: { 3583 struct MessageUnit_B *reg = acb->pmuB; 3584 /*clear interrupt and message state*/ 3585 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 3586 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 3587 /* let IOP know data has been read */ 3588 } 3589 break; 3590 case ACB_ADAPTER_TYPE_C: { 3591 struct MessageUnit_C __iomem *reg = acb->pmuC; 3592 uint32_t outbound_doorbell, i; 3593 /* empty doorbell Qbuffer if door bell ringed */ 3594 outbound_doorbell = readl(®->outbound_doorbell); 3595 writel(outbound_doorbell, ®->outbound_doorbell_clear); 3596 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3597 for (i = 0; i < 200; i++) { 3598 msleep(20); 3599 outbound_doorbell = readl(®->outbound_doorbell); 3600 if (outbound_doorbell & 3601 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 3602 writel(outbound_doorbell, 3603 ®->outbound_doorbell_clear); 3604 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, 3605 ®->inbound_doorbell); 3606 } else 3607 break; 3608 } 3609 } 3610 break; 3611 case ACB_ADAPTER_TYPE_D: { 3612 struct MessageUnit_D *reg = acb->pmuD; 3613 uint32_t outbound_doorbell, i; 3614 /* empty doorbell Qbuffer if door bell ringed */ 3615 outbound_doorbell = readl(reg->outbound_doorbell); 3616 writel(outbound_doorbell, reg->outbound_doorbell); 3617 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3618 reg->inbound_doorbell); 3619 for (i = 0; i < 200; i++) { 3620 msleep(20); 3621 outbound_doorbell = readl(reg->outbound_doorbell); 3622 if (outbound_doorbell & 3623 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) { 3624 writel(outbound_doorbell, 3625 reg->outbound_doorbell); 3626 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ, 3627 reg->inbound_doorbell); 3628 } else 3629 break; 3630 } 3631 } 3632 break; 3633 } 3634 } 3635 3636 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 3637 { 3638 switch (acb->adapter_type) { 3639 case ACB_ADAPTER_TYPE_A: 3640 return; 3641 case ACB_ADAPTER_TYPE_B: 3642 { 3643 struct MessageUnit_B *reg = acb->pmuB; 3644 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 3645 if (!arcmsr_hbaB_wait_msgint_ready(acb)) { 3646 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 3647 return; 3648 } 3649 } 3650 break; 3651 case ACB_ADAPTER_TYPE_C: 3652 return; 3653 } 3654 return; 3655 } 3656 3657 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 3658 { 3659 uint8_t value[64]; 3660 int i, count = 0; 3661 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 3662 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 3663 struct MessageUnit_D *pmuD = acb->pmuD; 3664 3665 /* backup pci config data */ 3666 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 3667 for (i = 0; i < 64; i++) { 3668 pci_read_config_byte(acb->pdev, i, &value[i]); 3669 } 3670 /* hardware reset signal */ 3671 if ((acb->dev_id == 0x1680)) { 3672 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 3673 } else if ((acb->dev_id == 0x1880)) { 3674 do { 3675 count++; 3676 writel(0xF, &pmuC->write_sequence); 3677 writel(0x4, &pmuC->write_sequence); 3678 writel(0xB, &pmuC->write_sequence); 3679 writel(0x2, &pmuC->write_sequence); 3680 writel(0x7, &pmuC->write_sequence); 3681 writel(0xD, &pmuC->write_sequence); 3682 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 3683 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 3684 } else if ((acb->dev_id == 0x1214)) { 3685 writel(0x20, pmuD->reset_request); 3686 } else { 3687 pci_write_config_byte(acb->pdev, 0x84, 0x20); 3688 } 3689 msleep(2000); 3690 /* write back pci config data */ 3691 for (i = 0; i < 64; i++) { 3692 pci_write_config_byte(acb->pdev, i, value[i]); 3693 } 3694 msleep(1000); 3695 return; 3696 } 3697 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 3698 { 3699 uint32_t intmask_org; 3700 /* disable all outbound interrupt */ 3701 intmask_org = arcmsr_disable_outbound_ints(acb); 3702 arcmsr_wait_firmware_ready(acb); 3703 arcmsr_iop_confirm(acb); 3704 /*start background rebuild*/ 3705 arcmsr_start_adapter_bgrb(acb); 3706 /* empty doorbell Qbuffer if door bell ringed */ 3707 arcmsr_clear_doorbell_queue_buffer(acb); 3708 arcmsr_enable_eoi_mode(acb); 3709 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3710 arcmsr_enable_outbound_ints(acb, intmask_org); 3711 acb->acb_flags |= ACB_F_IOP_INITED; 3712 } 3713 3714 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 3715 { 3716 struct CommandControlBlock *ccb; 3717 uint32_t intmask_org; 3718 uint8_t rtnval = 0x00; 3719 int i = 0; 3720 unsigned long flags; 3721 3722 if (atomic_read(&acb->ccboutstandingcount) != 0) { 3723 /* disable all outbound interrupt */ 3724 intmask_org = arcmsr_disable_outbound_ints(acb); 3725 /* talk to iop 331 outstanding command aborted */ 3726 rtnval = arcmsr_abort_allcmd(acb); 3727 /* clear all outbound posted Q */ 3728 arcmsr_done4abort_postqueue(acb); 3729 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3730 ccb = acb->pccb_pool[i]; 3731 if (ccb->startdone == ARCMSR_CCB_START) { 3732 scsi_dma_unmap(ccb->pcmd); 3733 ccb->startdone = ARCMSR_CCB_DONE; 3734 ccb->ccb_flags = 0; 3735 spin_lock_irqsave(&acb->ccblist_lock, flags); 3736 list_add_tail(&ccb->list, &acb->ccb_free_list); 3737 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 3738 } 3739 } 3740 atomic_set(&acb->ccboutstandingcount, 0); 3741 /* enable all outbound interrupt */ 3742 arcmsr_enable_outbound_ints(acb, intmask_org); 3743 return rtnval; 3744 } 3745 return rtnval; 3746 } 3747 3748 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 3749 { 3750 struct AdapterControlBlock *acb; 3751 uint32_t intmask_org, outbound_doorbell; 3752 int retry_count = 0; 3753 int rtn = FAILED; 3754 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 3755 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 3756 acb->num_resets++; 3757 3758 switch(acb->adapter_type){ 3759 case ACB_ADAPTER_TYPE_A:{ 3760 if (acb->acb_flags & ACB_F_BUS_RESET){ 3761 long timeout; 3762 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3763 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3764 if (timeout) { 3765 return SUCCESS; 3766 } 3767 } 3768 acb->acb_flags |= ACB_F_BUS_RESET; 3769 if (!arcmsr_iop_reset(acb)) { 3770 struct MessageUnit_A __iomem *reg; 3771 reg = acb->pmuA; 3772 arcmsr_hardware_reset(acb); 3773 acb->acb_flags &= ~ACB_F_IOP_INITED; 3774 sleep_again: 3775 ssleep(ARCMSR_SLEEPTIME); 3776 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 3777 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3778 if (retry_count > ARCMSR_RETRYCOUNT) { 3779 acb->fw_flag = FW_DEADLOCK; 3780 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3781 return FAILED; 3782 } 3783 retry_count++; 3784 goto sleep_again; 3785 } 3786 acb->acb_flags |= ACB_F_IOP_INITED; 3787 /* disable all outbound interrupt */ 3788 intmask_org = arcmsr_disable_outbound_ints(acb); 3789 arcmsr_get_firmware_spec(acb); 3790 arcmsr_start_adapter_bgrb(acb); 3791 /* clear Qbuffer if door bell ringed */ 3792 outbound_doorbell = readl(®->outbound_doorbell); 3793 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 3794 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 3795 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3796 arcmsr_enable_outbound_ints(acb, intmask_org); 3797 atomic_set(&acb->rq_map_token, 16); 3798 atomic_set(&acb->ante_token_value, 16); 3799 acb->fw_flag = FW_NORMAL; 3800 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3801 acb->acb_flags &= ~ACB_F_BUS_RESET; 3802 rtn = SUCCESS; 3803 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3804 } else { 3805 acb->acb_flags &= ~ACB_F_BUS_RESET; 3806 atomic_set(&acb->rq_map_token, 16); 3807 atomic_set(&acb->ante_token_value, 16); 3808 acb->fw_flag = FW_NORMAL; 3809 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3810 rtn = SUCCESS; 3811 } 3812 break; 3813 } 3814 case ACB_ADAPTER_TYPE_B:{ 3815 acb->acb_flags |= ACB_F_BUS_RESET; 3816 if (!arcmsr_iop_reset(acb)) { 3817 acb->acb_flags &= ~ACB_F_BUS_RESET; 3818 rtn = FAILED; 3819 } else { 3820 acb->acb_flags &= ~ACB_F_BUS_RESET; 3821 atomic_set(&acb->rq_map_token, 16); 3822 atomic_set(&acb->ante_token_value, 16); 3823 acb->fw_flag = FW_NORMAL; 3824 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3825 rtn = SUCCESS; 3826 } 3827 break; 3828 } 3829 case ACB_ADAPTER_TYPE_C:{ 3830 if (acb->acb_flags & ACB_F_BUS_RESET) { 3831 long timeout; 3832 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3833 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3834 if (timeout) { 3835 return SUCCESS; 3836 } 3837 } 3838 acb->acb_flags |= ACB_F_BUS_RESET; 3839 if (!arcmsr_iop_reset(acb)) { 3840 struct MessageUnit_C __iomem *reg; 3841 reg = acb->pmuC; 3842 arcmsr_hardware_reset(acb); 3843 acb->acb_flags &= ~ACB_F_IOP_INITED; 3844 sleep: 3845 ssleep(ARCMSR_SLEEPTIME); 3846 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3847 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count); 3848 if (retry_count > ARCMSR_RETRYCOUNT) { 3849 acb->fw_flag = FW_DEADLOCK; 3850 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no); 3851 return FAILED; 3852 } 3853 retry_count++; 3854 goto sleep; 3855 } 3856 acb->acb_flags |= ACB_F_IOP_INITED; 3857 /* disable all outbound interrupt */ 3858 intmask_org = arcmsr_disable_outbound_ints(acb); 3859 arcmsr_get_firmware_spec(acb); 3860 arcmsr_start_adapter_bgrb(acb); 3861 /* clear Qbuffer if door bell ringed */ 3862 arcmsr_clear_doorbell_queue_buffer(acb); 3863 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3864 arcmsr_enable_outbound_ints(acb, intmask_org); 3865 atomic_set(&acb->rq_map_token, 16); 3866 atomic_set(&acb->ante_token_value, 16); 3867 acb->fw_flag = FW_NORMAL; 3868 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3869 acb->acb_flags &= ~ACB_F_BUS_RESET; 3870 rtn = SUCCESS; 3871 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3872 } else { 3873 acb->acb_flags &= ~ACB_F_BUS_RESET; 3874 atomic_set(&acb->rq_map_token, 16); 3875 atomic_set(&acb->ante_token_value, 16); 3876 acb->fw_flag = FW_NORMAL; 3877 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3878 rtn = SUCCESS; 3879 } 3880 break; 3881 } 3882 case ACB_ADAPTER_TYPE_D: { 3883 if (acb->acb_flags & ACB_F_BUS_RESET) { 3884 long timeout; 3885 pr_notice("arcmsr: there is an bus reset" 3886 " eh proceeding.......\n"); 3887 timeout = wait_event_timeout(wait_q, (acb->acb_flags 3888 & ACB_F_BUS_RESET) == 0, 220 * HZ); 3889 if (timeout) 3890 return SUCCESS; 3891 } 3892 acb->acb_flags |= ACB_F_BUS_RESET; 3893 if (!arcmsr_iop_reset(acb)) { 3894 struct MessageUnit_D *reg; 3895 reg = acb->pmuD; 3896 arcmsr_hardware_reset(acb); 3897 acb->acb_flags &= ~ACB_F_IOP_INITED; 3898 nap: 3899 ssleep(ARCMSR_SLEEPTIME); 3900 if ((readl(reg->sample_at_reset) & 0x80) != 0) { 3901 pr_err("arcmsr%d: waiting for " 3902 "hw bus reset return, retry=%d\n", 3903 acb->host->host_no, retry_count); 3904 if (retry_count > ARCMSR_RETRYCOUNT) { 3905 acb->fw_flag = FW_DEADLOCK; 3906 pr_err("arcmsr%d: waiting for hw bus" 3907 " reset return, " 3908 "RETRY TERMINATED!!\n", 3909 acb->host->host_no); 3910 return FAILED; 3911 } 3912 retry_count++; 3913 goto nap; 3914 } 3915 acb->acb_flags |= ACB_F_IOP_INITED; 3916 /* disable all outbound interrupt */ 3917 intmask_org = arcmsr_disable_outbound_ints(acb); 3918 arcmsr_get_firmware_spec(acb); 3919 arcmsr_start_adapter_bgrb(acb); 3920 arcmsr_clear_doorbell_queue_buffer(acb); 3921 arcmsr_enable_outbound_ints(acb, intmask_org); 3922 atomic_set(&acb->rq_map_token, 16); 3923 atomic_set(&acb->ante_token_value, 16); 3924 acb->fw_flag = FW_NORMAL; 3925 mod_timer(&acb->eternal_timer, 3926 jiffies + msecs_to_jiffies(6 * HZ)); 3927 acb->acb_flags &= ~ACB_F_BUS_RESET; 3928 rtn = SUCCESS; 3929 pr_err("arcmsr: scsi bus reset " 3930 "eh returns with success\n"); 3931 } else { 3932 acb->acb_flags &= ~ACB_F_BUS_RESET; 3933 atomic_set(&acb->rq_map_token, 16); 3934 atomic_set(&acb->ante_token_value, 16); 3935 acb->fw_flag = FW_NORMAL; 3936 mod_timer(&acb->eternal_timer, 3937 jiffies + msecs_to_jiffies(6 * HZ)); 3938 rtn = SUCCESS; 3939 } 3940 break; 3941 } 3942 } 3943 return rtn; 3944 } 3945 3946 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3947 struct CommandControlBlock *ccb) 3948 { 3949 int rtn; 3950 rtn = arcmsr_polling_ccbdone(acb, ccb); 3951 return rtn; 3952 } 3953 3954 static int arcmsr_abort(struct scsi_cmnd *cmd) 3955 { 3956 struct AdapterControlBlock *acb = 3957 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3958 int i = 0; 3959 int rtn = FAILED; 3960 uint32_t intmask_org; 3961 3962 printk(KERN_NOTICE 3963 "arcmsr%d: abort device command of scsi id = %d lun = %d\n", 3964 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun); 3965 acb->acb_flags |= ACB_F_ABORT; 3966 acb->num_aborts++; 3967 /* 3968 ************************************************ 3969 ** the all interrupt service routine is locked 3970 ** we need to handle it as soon as possible and exit 3971 ************************************************ 3972 */ 3973 if (!atomic_read(&acb->ccboutstandingcount)) { 3974 acb->acb_flags &= ~ACB_F_ABORT; 3975 return rtn; 3976 } 3977 3978 intmask_org = arcmsr_disable_outbound_ints(acb); 3979 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3980 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3981 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3982 ccb->startdone = ARCMSR_CCB_ABORTED; 3983 rtn = arcmsr_abort_one_cmd(acb, ccb); 3984 break; 3985 } 3986 } 3987 acb->acb_flags &= ~ACB_F_ABORT; 3988 arcmsr_enable_outbound_ints(acb, intmask_org); 3989 return rtn; 3990 } 3991 3992 static const char *arcmsr_info(struct Scsi_Host *host) 3993 { 3994 struct AdapterControlBlock *acb = 3995 (struct AdapterControlBlock *) host->hostdata; 3996 static char buf[256]; 3997 char *type; 3998 int raid6 = 1; 3999 switch (acb->pdev->device) { 4000 case PCI_DEVICE_ID_ARECA_1110: 4001 case PCI_DEVICE_ID_ARECA_1200: 4002 case PCI_DEVICE_ID_ARECA_1202: 4003 case PCI_DEVICE_ID_ARECA_1210: 4004 raid6 = 0; 4005 /*FALLTHRU*/ 4006 case PCI_DEVICE_ID_ARECA_1120: 4007 case PCI_DEVICE_ID_ARECA_1130: 4008 case PCI_DEVICE_ID_ARECA_1160: 4009 case PCI_DEVICE_ID_ARECA_1170: 4010 case PCI_DEVICE_ID_ARECA_1201: 4011 case PCI_DEVICE_ID_ARECA_1203: 4012 case PCI_DEVICE_ID_ARECA_1220: 4013 case PCI_DEVICE_ID_ARECA_1230: 4014 case PCI_DEVICE_ID_ARECA_1260: 4015 case PCI_DEVICE_ID_ARECA_1270: 4016 case PCI_DEVICE_ID_ARECA_1280: 4017 type = "SATA"; 4018 break; 4019 case PCI_DEVICE_ID_ARECA_1214: 4020 case PCI_DEVICE_ID_ARECA_1380: 4021 case PCI_DEVICE_ID_ARECA_1381: 4022 case PCI_DEVICE_ID_ARECA_1680: 4023 case PCI_DEVICE_ID_ARECA_1681: 4024 case PCI_DEVICE_ID_ARECA_1880: 4025 type = "SAS/SATA"; 4026 break; 4027 default: 4028 type = "unknown"; 4029 raid6 = 0; 4030 break; 4031 } 4032 sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n", 4033 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION); 4034 return buf; 4035 } 4036