1 /* 2 ******************************************************************************* 3 ** O.S : Linux 4 ** FILE NAME : arcmsr_hba.c 5 ** BY : Nick Cheng 6 ** Description: SCSI RAID Device Driver for 7 ** ARECA RAID Host adapter 8 ******************************************************************************* 9 ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved 10 ** 11 ** Web site: www.areca.com.tw 12 ** E-mail: support@areca.com.tw 13 ** 14 ** This program is free software; you can redistribute it and/or modify 15 ** it under the terms of the GNU General Public License version 2 as 16 ** published by the Free Software Foundation. 17 ** This program is distributed in the hope that it will be useful, 18 ** but WITHOUT ANY WARRANTY; without even the implied warranty of 19 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 ** GNU General Public License for more details. 21 ******************************************************************************* 22 ** Redistribution and use in source and binary forms, with or without 23 ** modification, are permitted provided that the following conditions 24 ** are met: 25 ** 1. Redistributions of source code must retain the above copyright 26 ** notice, this list of conditions and the following disclaimer. 27 ** 2. Redistributions in binary form must reproduce the above copyright 28 ** notice, this list of conditions and the following disclaimer in the 29 ** documentation and/or other materials provided with the distribution. 30 ** 3. The name of the author may not be used to endorse or promote products 31 ** derived from this software without specific prior written permission. 32 ** 33 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 34 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 35 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 36 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 37 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT 38 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 39 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY 40 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 41 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF 42 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 43 ******************************************************************************* 44 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr 45 ** Firmware Specification, see Documentation/scsi/arcmsr_spec.txt 46 ******************************************************************************* 47 */ 48 #include <linux/module.h> 49 #include <linux/reboot.h> 50 #include <linux/spinlock.h> 51 #include <linux/pci_ids.h> 52 #include <linux/interrupt.h> 53 #include <linux/moduleparam.h> 54 #include <linux/errno.h> 55 #include <linux/types.h> 56 #include <linux/delay.h> 57 #include <linux/dma-mapping.h> 58 #include <linux/timer.h> 59 #include <linux/slab.h> 60 #include <linux/pci.h> 61 #include <linux/aer.h> 62 #include <asm/dma.h> 63 #include <asm/io.h> 64 #include <asm/system.h> 65 #include <asm/uaccess.h> 66 #include <scsi/scsi_host.h> 67 #include <scsi/scsi.h> 68 #include <scsi/scsi_cmnd.h> 69 #include <scsi/scsi_tcq.h> 70 #include <scsi/scsi_device.h> 71 #include <scsi/scsi_transport.h> 72 #include <scsi/scsicam.h> 73 #include "arcmsr.h" 74 MODULE_AUTHOR("Nick Cheng <support@areca.com.tw>"); 75 MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapter"); 76 MODULE_LICENSE("Dual BSD/GPL"); 77 MODULE_VERSION(ARCMSR_DRIVER_VERSION); 78 static int sleeptime = 10; 79 static int retrycount = 12; 80 wait_queue_head_t wait_q; 81 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 82 struct scsi_cmnd *cmd); 83 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb); 84 static int arcmsr_abort(struct scsi_cmnd *); 85 static int arcmsr_bus_reset(struct scsi_cmnd *); 86 static int arcmsr_bios_param(struct scsi_device *sdev, 87 struct block_device *bdev, sector_t capacity, int *info); 88 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd); 89 static int arcmsr_probe(struct pci_dev *pdev, 90 const struct pci_device_id *id); 91 static void arcmsr_remove(struct pci_dev *pdev); 92 static void arcmsr_shutdown(struct pci_dev *pdev); 93 static void arcmsr_iop_init(struct AdapterControlBlock *acb); 94 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb); 95 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb); 96 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb); 97 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb); 98 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb); 99 static void arcmsr_request_device_map(unsigned long pacb); 100 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb); 101 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb); 102 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb); 103 static void arcmsr_message_isr_bh_fn(struct work_struct *work); 104 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb); 105 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb); 106 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *pACB); 107 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb); 108 static const char *arcmsr_info(struct Scsi_Host *); 109 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb); 110 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, 111 int queue_depth, int reason) 112 { 113 if (reason != SCSI_QDEPTH_DEFAULT) 114 return -EOPNOTSUPP; 115 116 if (queue_depth > ARCMSR_MAX_CMD_PERLUN) 117 queue_depth = ARCMSR_MAX_CMD_PERLUN; 118 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, queue_depth); 119 return queue_depth; 120 } 121 122 static struct scsi_host_template arcmsr_scsi_host_template = { 123 .module = THIS_MODULE, 124 .name = "ARCMSR ARECA SATA/SAS RAID Controller" 125 ARCMSR_DRIVER_VERSION, 126 .info = arcmsr_info, 127 .queuecommand = arcmsr_queue_command, 128 .eh_abort_handler = arcmsr_abort, 129 .eh_bus_reset_handler = arcmsr_bus_reset, 130 .bios_param = arcmsr_bios_param, 131 .change_queue_depth = arcmsr_adjust_disk_queue_depth, 132 .can_queue = ARCMSR_MAX_FREECCB_NUM, 133 .this_id = ARCMSR_SCSI_INITIATOR_ID, 134 .sg_tablesize = ARCMSR_DEFAULT_SG_ENTRIES, 135 .max_sectors = ARCMSR_MAX_XFER_SECTORS_C, 136 .cmd_per_lun = ARCMSR_MAX_CMD_PERLUN, 137 .use_clustering = ENABLE_CLUSTERING, 138 .shost_attrs = arcmsr_host_attrs, 139 }; 140 static struct pci_device_id arcmsr_device_id_table[] = { 141 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110)}, 142 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120)}, 143 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130)}, 144 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160)}, 145 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170)}, 146 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200)}, 147 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201)}, 148 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202)}, 149 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210)}, 150 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220)}, 151 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230)}, 152 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260)}, 153 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270)}, 154 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280)}, 155 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380)}, 156 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381)}, 157 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680)}, 158 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681)}, 159 {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880)}, 160 {0, 0}, /* Terminating entry */ 161 }; 162 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table); 163 static struct pci_driver arcmsr_pci_driver = { 164 .name = "arcmsr", 165 .id_table = arcmsr_device_id_table, 166 .probe = arcmsr_probe, 167 .remove = arcmsr_remove, 168 .shutdown = arcmsr_shutdown, 169 }; 170 /* 171 **************************************************************************** 172 **************************************************************************** 173 */ 174 int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) 175 { 176 struct Scsi_Host *shost = NULL; 177 int i, isleep; 178 shost = cmd->device->host; 179 isleep = sleeptime / 10; 180 if (isleep > 0) { 181 for (i = 0; i < isleep; i++) { 182 msleep(10000); 183 } 184 } 185 186 isleep = sleeptime % 10; 187 if (isleep > 0) { 188 msleep(isleep*1000); 189 } 190 return 0; 191 } 192 193 static void arcmsr_free_hbb_mu(struct AdapterControlBlock *acb) 194 { 195 switch (acb->adapter_type) { 196 case ACB_ADAPTER_TYPE_A: 197 case ACB_ADAPTER_TYPE_C: 198 break; 199 case ACB_ADAPTER_TYPE_B:{ 200 dma_free_coherent(&acb->pdev->dev, 201 sizeof(struct MessageUnit_B), 202 acb->pmuB, acb->dma_coherent_handle_hbb_mu); 203 } 204 } 205 } 206 207 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb) 208 { 209 struct pci_dev *pdev = acb->pdev; 210 switch (acb->adapter_type){ 211 case ACB_ADAPTER_TYPE_A:{ 212 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0)); 213 if (!acb->pmuA) { 214 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 215 return false; 216 } 217 break; 218 } 219 case ACB_ADAPTER_TYPE_B:{ 220 void __iomem *mem_base0, *mem_base1; 221 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0)); 222 if (!mem_base0) { 223 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 224 return false; 225 } 226 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2)); 227 if (!mem_base1) { 228 iounmap(mem_base0); 229 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 230 return false; 231 } 232 acb->mem_base0 = mem_base0; 233 acb->mem_base1 = mem_base1; 234 break; 235 } 236 case ACB_ADAPTER_TYPE_C:{ 237 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1)); 238 if (!acb->pmuC) { 239 printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no); 240 return false; 241 } 242 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 243 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/ 244 return true; 245 } 246 break; 247 } 248 } 249 return true; 250 } 251 252 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb) 253 { 254 switch (acb->adapter_type) { 255 case ACB_ADAPTER_TYPE_A:{ 256 iounmap(acb->pmuA); 257 } 258 break; 259 case ACB_ADAPTER_TYPE_B:{ 260 iounmap(acb->mem_base0); 261 iounmap(acb->mem_base1); 262 } 263 264 break; 265 case ACB_ADAPTER_TYPE_C:{ 266 iounmap(acb->pmuC); 267 } 268 } 269 } 270 271 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id) 272 { 273 irqreturn_t handle_state; 274 struct AdapterControlBlock *acb = dev_id; 275 276 handle_state = arcmsr_interrupt(acb); 277 return handle_state; 278 } 279 280 static int arcmsr_bios_param(struct scsi_device *sdev, 281 struct block_device *bdev, sector_t capacity, int *geom) 282 { 283 int ret, heads, sectors, cylinders, total_capacity; 284 unsigned char *buffer;/* return copy of block device's partition table */ 285 286 buffer = scsi_bios_ptable(bdev); 287 if (buffer) { 288 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]); 289 kfree(buffer); 290 if (ret != -1) 291 return ret; 292 } 293 total_capacity = capacity; 294 heads = 64; 295 sectors = 32; 296 cylinders = total_capacity / (heads * sectors); 297 if (cylinders > 1024) { 298 heads = 255; 299 sectors = 63; 300 cylinders = total_capacity / (heads * sectors); 301 } 302 geom[0] = heads; 303 geom[1] = sectors; 304 geom[2] = cylinders; 305 return 0; 306 } 307 308 static void arcmsr_define_adapter_type(struct AdapterControlBlock *acb) 309 { 310 struct pci_dev *pdev = acb->pdev; 311 u16 dev_id; 312 pci_read_config_word(pdev, PCI_DEVICE_ID, &dev_id); 313 acb->dev_id = dev_id; 314 switch (dev_id) { 315 case 0x1880: { 316 acb->adapter_type = ACB_ADAPTER_TYPE_C; 317 } 318 break; 319 case 0x1201: { 320 acb->adapter_type = ACB_ADAPTER_TYPE_B; 321 } 322 break; 323 324 default: acb->adapter_type = ACB_ADAPTER_TYPE_A; 325 } 326 } 327 328 static uint8_t arcmsr_hba_wait_msgint_ready(struct AdapterControlBlock *acb) 329 { 330 struct MessageUnit_A __iomem *reg = acb->pmuA; 331 uint32_t Index; 332 uint8_t Retries = 0x00; 333 do { 334 for (Index = 0; Index < 100; Index++) { 335 if (readl(®->outbound_intstatus) & 336 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 337 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, 338 ®->outbound_intstatus); 339 return true; 340 } 341 msleep(10); 342 }/*max 1 seconds*/ 343 344 } while (Retries++ < 20);/*max 20 sec*/ 345 return false; 346 } 347 348 static uint8_t arcmsr_hbb_wait_msgint_ready(struct AdapterControlBlock *acb) 349 { 350 struct MessageUnit_B *reg = acb->pmuB; 351 uint32_t Index; 352 uint8_t Retries = 0x00; 353 do { 354 for (Index = 0; Index < 100; Index++) { 355 if (readl(reg->iop2drv_doorbell) 356 & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 357 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN 358 , reg->iop2drv_doorbell); 359 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 360 return true; 361 } 362 msleep(10); 363 }/*max 1 seconds*/ 364 365 } while (Retries++ < 20);/*max 20 sec*/ 366 return false; 367 } 368 369 static uint8_t arcmsr_hbc_wait_msgint_ready(struct AdapterControlBlock *pACB) 370 { 371 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 372 unsigned char Retries = 0x00; 373 uint32_t Index; 374 do { 375 for (Index = 0; Index < 100; Index++) { 376 if (readl(&phbcmu->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 377 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &phbcmu->outbound_doorbell_clear);/*clear interrupt*/ 378 return true; 379 } 380 /* one us delay */ 381 msleep(10); 382 } /*max 1 seconds*/ 383 } while (Retries++ < 20); /*max 20 sec*/ 384 return false; 385 } 386 static void arcmsr_flush_hba_cache(struct AdapterControlBlock *acb) 387 { 388 struct MessageUnit_A __iomem *reg = acb->pmuA; 389 int retry_count = 30; 390 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 391 do { 392 if (arcmsr_hba_wait_msgint_ready(acb)) 393 break; 394 else { 395 retry_count--; 396 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 397 timeout, retry count down = %d \n", acb->host->host_no, retry_count); 398 } 399 } while (retry_count != 0); 400 } 401 402 static void arcmsr_flush_hbb_cache(struct AdapterControlBlock *acb) 403 { 404 struct MessageUnit_B *reg = acb->pmuB; 405 int retry_count = 30; 406 writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell); 407 do { 408 if (arcmsr_hbb_wait_msgint_ready(acb)) 409 break; 410 else { 411 retry_count--; 412 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 413 timeout,retry count down = %d \n", acb->host->host_no, retry_count); 414 } 415 } while (retry_count != 0); 416 } 417 418 static void arcmsr_flush_hbc_cache(struct AdapterControlBlock *pACB) 419 { 420 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 421 int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */ 422 writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, ®->inbound_msgaddr0); 423 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 424 do { 425 if (arcmsr_hbc_wait_msgint_ready(pACB)) { 426 break; 427 } else { 428 retry_count--; 429 printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \ 430 timeout,retry count down = %d \n", pACB->host->host_no, retry_count); 431 } 432 } while (retry_count != 0); 433 return; 434 } 435 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb) 436 { 437 switch (acb->adapter_type) { 438 439 case ACB_ADAPTER_TYPE_A: { 440 arcmsr_flush_hba_cache(acb); 441 } 442 break; 443 444 case ACB_ADAPTER_TYPE_B: { 445 arcmsr_flush_hbb_cache(acb); 446 } 447 break; 448 case ACB_ADAPTER_TYPE_C: { 449 arcmsr_flush_hbc_cache(acb); 450 } 451 } 452 } 453 454 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb) 455 { 456 struct pci_dev *pdev = acb->pdev; 457 void *dma_coherent; 458 dma_addr_t dma_coherent_handle; 459 struct CommandControlBlock *ccb_tmp; 460 int i = 0, j = 0; 461 dma_addr_t cdb_phyaddr; 462 unsigned long roundup_ccbsize = 0, offset; 463 unsigned long max_xfer_len; 464 unsigned long max_sg_entrys; 465 uint32_t firm_config_version; 466 for (i = 0; i < ARCMSR_MAX_TARGETID; i++) 467 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++) 468 acb->devstate[i][j] = ARECA_RAID_GONE; 469 470 max_xfer_len = ARCMSR_MAX_XFER_LEN; 471 max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES; 472 firm_config_version = acb->firm_cfg_version; 473 if((firm_config_version & 0xFF) >= 3){ 474 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */ 475 max_sg_entrys = (max_xfer_len/4096); 476 } 477 acb->host->max_sectors = max_xfer_len/512; 478 acb->host->sg_tablesize = max_sg_entrys; 479 roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32); 480 acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM + 32; 481 dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL); 482 if(!dma_coherent){ 483 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error \n", acb->host->host_no); 484 return -ENOMEM; 485 } 486 acb->dma_coherent = dma_coherent; 487 acb->dma_coherent_handle = dma_coherent_handle; 488 memset(dma_coherent, 0, acb->uncache_size); 489 offset = roundup((unsigned long)dma_coherent, 32) - (unsigned long)dma_coherent; 490 dma_coherent_handle = dma_coherent_handle + offset; 491 dma_coherent = (struct CommandControlBlock *)dma_coherent + offset; 492 ccb_tmp = dma_coherent; 493 acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle; 494 for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){ 495 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb); 496 ccb_tmp->cdb_phyaddr_pattern = ((acb->adapter_type == ACB_ADAPTER_TYPE_C) ? cdb_phyaddr : (cdb_phyaddr >> 5)); 497 acb->pccb_pool[i] = ccb_tmp; 498 ccb_tmp->acb = acb; 499 INIT_LIST_HEAD(&ccb_tmp->list); 500 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list); 501 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize); 502 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize; 503 } 504 return 0; 505 } 506 507 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 508 { 509 struct AdapterControlBlock *acb = container_of(work,struct AdapterControlBlock, arcmsr_do_message_isr_bh); 510 switch (acb->adapter_type) { 511 case ACB_ADAPTER_TYPE_A: { 512 513 struct MessageUnit_A __iomem *reg = acb->pmuA; 514 char *acb_dev_map = (char *)acb->device_map; 515 uint32_t __iomem *signature = (uint32_t __iomem*) (®->message_rwbuffer[0]); 516 char __iomem *devicemap = (char __iomem*) (®->message_rwbuffer[21]); 517 int target, lun; 518 struct scsi_device *psdev; 519 char diff; 520 521 atomic_inc(&acb->rq_map_token); 522 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 523 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 524 diff = (*acb_dev_map)^readb(devicemap); 525 if (diff != 0) { 526 char temp; 527 *acb_dev_map = readb(devicemap); 528 temp =*acb_dev_map; 529 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 530 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 531 scsi_add_device(acb->host, 0, target, lun); 532 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 533 psdev = scsi_device_lookup(acb->host, 0, target, lun); 534 if (psdev != NULL ) { 535 scsi_remove_device(psdev); 536 scsi_device_put(psdev); 537 } 538 } 539 temp >>= 1; 540 diff >>= 1; 541 } 542 } 543 devicemap++; 544 acb_dev_map++; 545 } 546 } 547 break; 548 } 549 550 case ACB_ADAPTER_TYPE_B: { 551 struct MessageUnit_B *reg = acb->pmuB; 552 char *acb_dev_map = (char *)acb->device_map; 553 uint32_t __iomem *signature = (uint32_t __iomem*)(®->message_rwbuffer[0]); 554 char __iomem *devicemap = (char __iomem*)(®->message_rwbuffer[21]); 555 int target, lun; 556 struct scsi_device *psdev; 557 char diff; 558 559 atomic_inc(&acb->rq_map_token); 560 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 561 for(target = 0; target < ARCMSR_MAX_TARGETID -1; target++) { 562 diff = (*acb_dev_map)^readb(devicemap); 563 if (diff != 0) { 564 char temp; 565 *acb_dev_map = readb(devicemap); 566 temp =*acb_dev_map; 567 for(lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 568 if((temp & 0x01)==1 && (diff & 0x01) == 1) { 569 scsi_add_device(acb->host, 0, target, lun); 570 }else if((temp & 0x01) == 0 && (diff & 0x01) == 1) { 571 psdev = scsi_device_lookup(acb->host, 0, target, lun); 572 if (psdev != NULL ) { 573 scsi_remove_device(psdev); 574 scsi_device_put(psdev); 575 } 576 } 577 temp >>= 1; 578 diff >>= 1; 579 } 580 } 581 devicemap++; 582 acb_dev_map++; 583 } 584 } 585 } 586 break; 587 case ACB_ADAPTER_TYPE_C: { 588 struct MessageUnit_C *reg = acb->pmuC; 589 char *acb_dev_map = (char *)acb->device_map; 590 uint32_t __iomem *signature = (uint32_t __iomem *)(®->msgcode_rwbuffer[0]); 591 char __iomem *devicemap = (char __iomem *)(®->msgcode_rwbuffer[21]); 592 int target, lun; 593 struct scsi_device *psdev; 594 char diff; 595 596 atomic_inc(&acb->rq_map_token); 597 if (readl(signature) == ARCMSR_SIGNATURE_GET_CONFIG) { 598 for (target = 0; target < ARCMSR_MAX_TARGETID - 1; target++) { 599 diff = (*acb_dev_map)^readb(devicemap); 600 if (diff != 0) { 601 char temp; 602 *acb_dev_map = readb(devicemap); 603 temp = *acb_dev_map; 604 for (lun = 0; lun < ARCMSR_MAX_TARGETLUN; lun++) { 605 if ((temp & 0x01) == 1 && (diff & 0x01) == 1) { 606 scsi_add_device(acb->host, 0, target, lun); 607 } else if ((temp & 0x01) == 0 && (diff & 0x01) == 1) { 608 psdev = scsi_device_lookup(acb->host, 0, target, lun); 609 if (psdev != NULL) { 610 scsi_remove_device(psdev); 611 scsi_device_put(psdev); 612 } 613 } 614 temp >>= 1; 615 diff >>= 1; 616 } 617 } 618 devicemap++; 619 acb_dev_map++; 620 } 621 } 622 } 623 } 624 } 625 626 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id) 627 { 628 struct Scsi_Host *host; 629 struct AdapterControlBlock *acb; 630 uint8_t bus,dev_fun; 631 int error; 632 error = pci_enable_device(pdev); 633 if(error){ 634 return -ENODEV; 635 } 636 host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock)); 637 if(!host){ 638 goto pci_disable_dev; 639 } 640 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64)); 641 if(error){ 642 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 643 if(error){ 644 printk(KERN_WARNING 645 "scsi%d: No suitable DMA mask available\n", 646 host->host_no); 647 goto scsi_host_release; 648 } 649 } 650 init_waitqueue_head(&wait_q); 651 bus = pdev->bus->number; 652 dev_fun = pdev->devfn; 653 acb = (struct AdapterControlBlock *) host->hostdata; 654 memset(acb,0,sizeof(struct AdapterControlBlock)); 655 acb->pdev = pdev; 656 acb->host = host; 657 host->max_lun = ARCMSR_MAX_TARGETLUN; 658 host->max_id = ARCMSR_MAX_TARGETID; /*16:8*/ 659 host->max_cmd_len = 16; /*this is issue of 64bit LBA ,over 2T byte*/ 660 host->can_queue = ARCMSR_MAX_FREECCB_NUM; /* max simultaneous cmds */ 661 host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN; 662 host->this_id = ARCMSR_SCSI_INITIATOR_ID; 663 host->unique_id = (bus << 8) | dev_fun; 664 pci_set_drvdata(pdev, host); 665 pci_set_master(pdev); 666 error = pci_request_regions(pdev, "arcmsr"); 667 if(error){ 668 goto scsi_host_release; 669 } 670 spin_lock_init(&acb->eh_lock); 671 spin_lock_init(&acb->ccblist_lock); 672 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED | 673 ACB_F_MESSAGE_RQBUFFER_CLEARED | 674 ACB_F_MESSAGE_WQBUFFER_READED); 675 acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER; 676 INIT_LIST_HEAD(&acb->ccb_free_list); 677 arcmsr_define_adapter_type(acb); 678 error = arcmsr_remap_pciregion(acb); 679 if(!error){ 680 goto pci_release_regs; 681 } 682 error = arcmsr_get_firmware_spec(acb); 683 if(!error){ 684 goto unmap_pci_region; 685 } 686 error = arcmsr_alloc_ccb_pool(acb); 687 if(error){ 688 goto free_hbb_mu; 689 } 690 arcmsr_iop_init(acb); 691 error = scsi_add_host(host, &pdev->dev); 692 if(error){ 693 goto RAID_controller_stop; 694 } 695 error = request_irq(pdev->irq, arcmsr_do_interrupt, IRQF_SHARED, "arcmsr", acb); 696 if(error){ 697 goto scsi_host_remove; 698 } 699 host->irq = pdev->irq; 700 scsi_scan_host(host); 701 INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn); 702 atomic_set(&acb->rq_map_token, 16); 703 atomic_set(&acb->ante_token_value, 16); 704 acb->fw_flag = FW_NORMAL; 705 init_timer(&acb->eternal_timer); 706 acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); 707 acb->eternal_timer.data = (unsigned long) acb; 708 acb->eternal_timer.function = &arcmsr_request_device_map; 709 add_timer(&acb->eternal_timer); 710 if(arcmsr_alloc_sysfs_attr(acb)) 711 goto out_free_sysfs; 712 return 0; 713 out_free_sysfs: 714 scsi_host_remove: 715 scsi_remove_host(host); 716 RAID_controller_stop: 717 arcmsr_stop_adapter_bgrb(acb); 718 arcmsr_flush_adapter_cache(acb); 719 arcmsr_free_ccb_pool(acb); 720 free_hbb_mu: 721 arcmsr_free_hbb_mu(acb); 722 unmap_pci_region: 723 arcmsr_unmap_pciregion(acb); 724 pci_release_regs: 725 pci_release_regions(pdev); 726 scsi_host_release: 727 scsi_host_put(host); 728 pci_disable_dev: 729 pci_disable_device(pdev); 730 return -ENODEV; 731 } 732 733 static uint8_t arcmsr_abort_hba_allcmd(struct AdapterControlBlock *acb) 734 { 735 struct MessageUnit_A __iomem *reg = acb->pmuA; 736 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 737 if (!arcmsr_hba_wait_msgint_ready(acb)) { 738 printk(KERN_NOTICE 739 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 740 , acb->host->host_no); 741 return false; 742 } 743 return true; 744 } 745 746 static uint8_t arcmsr_abort_hbb_allcmd(struct AdapterControlBlock *acb) 747 { 748 struct MessageUnit_B *reg = acb->pmuB; 749 750 writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell); 751 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 752 printk(KERN_NOTICE 753 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 754 , acb->host->host_no); 755 return false; 756 } 757 return true; 758 } 759 static uint8_t arcmsr_abort_hbc_allcmd(struct AdapterControlBlock *pACB) 760 { 761 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 762 writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, ®->inbound_msgaddr0); 763 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 764 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 765 printk(KERN_NOTICE 766 "arcmsr%d: wait 'abort all outstanding command' timeout \n" 767 , pACB->host->host_no); 768 return false; 769 } 770 return true; 771 } 772 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb) 773 { 774 uint8_t rtnval = 0; 775 switch (acb->adapter_type) { 776 case ACB_ADAPTER_TYPE_A: { 777 rtnval = arcmsr_abort_hba_allcmd(acb); 778 } 779 break; 780 781 case ACB_ADAPTER_TYPE_B: { 782 rtnval = arcmsr_abort_hbb_allcmd(acb); 783 } 784 break; 785 786 case ACB_ADAPTER_TYPE_C: { 787 rtnval = arcmsr_abort_hbc_allcmd(acb); 788 } 789 } 790 return rtnval; 791 } 792 793 static bool arcmsr_hbb_enable_driver_mode(struct AdapterControlBlock *pacb) 794 { 795 struct MessageUnit_B *reg = pacb->pmuB; 796 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell); 797 if (!arcmsr_hbb_wait_msgint_ready(pacb)) { 798 printk(KERN_ERR "arcmsr%d: can't set driver mode. \n", pacb->host->host_no); 799 return false; 800 } 801 return true; 802 } 803 804 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb) 805 { 806 struct scsi_cmnd *pcmd = ccb->pcmd; 807 808 scsi_dma_unmap(pcmd); 809 } 810 811 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb) 812 { 813 struct AdapterControlBlock *acb = ccb->acb; 814 struct scsi_cmnd *pcmd = ccb->pcmd; 815 unsigned long flags; 816 atomic_dec(&acb->ccboutstandingcount); 817 arcmsr_pci_unmap_dma(ccb); 818 ccb->startdone = ARCMSR_CCB_DONE; 819 spin_lock_irqsave(&acb->ccblist_lock, flags); 820 list_add_tail(&ccb->list, &acb->ccb_free_list); 821 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 822 pcmd->scsi_done(pcmd); 823 } 824 825 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb) 826 { 827 828 struct scsi_cmnd *pcmd = ccb->pcmd; 829 struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer; 830 pcmd->result = DID_OK << 16; 831 if (sensebuffer) { 832 int sense_data_length = 833 sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE 834 ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE; 835 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE); 836 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length); 837 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS; 838 sensebuffer->Valid = 1; 839 } 840 } 841 842 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb) 843 { 844 u32 orig_mask = 0; 845 switch (acb->adapter_type) { 846 case ACB_ADAPTER_TYPE_A : { 847 struct MessageUnit_A __iomem *reg = acb->pmuA; 848 orig_mask = readl(®->outbound_intmask); 849 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \ 850 ®->outbound_intmask); 851 } 852 break; 853 case ACB_ADAPTER_TYPE_B : { 854 struct MessageUnit_B *reg = acb->pmuB; 855 orig_mask = readl(reg->iop2drv_doorbell_mask); 856 writel(0, reg->iop2drv_doorbell_mask); 857 } 858 break; 859 case ACB_ADAPTER_TYPE_C:{ 860 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 861 /* disable all outbound interrupt */ 862 orig_mask = readl(®->host_int_mask); /* disable outbound message0 int */ 863 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 864 } 865 break; 866 } 867 return orig_mask; 868 } 869 870 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 871 struct CommandControlBlock *ccb, bool error) 872 { 873 uint8_t id, lun; 874 id = ccb->pcmd->device->id; 875 lun = ccb->pcmd->device->lun; 876 if (!error) { 877 if (acb->devstate[id][lun] == ARECA_RAID_GONE) 878 acb->devstate[id][lun] = ARECA_RAID_GOOD; 879 ccb->pcmd->result = DID_OK << 16; 880 arcmsr_ccb_complete(ccb); 881 }else{ 882 switch (ccb->arcmsr_cdb.DeviceStatus) { 883 case ARCMSR_DEV_SELECT_TIMEOUT: { 884 acb->devstate[id][lun] = ARECA_RAID_GONE; 885 ccb->pcmd->result = DID_NO_CONNECT << 16; 886 arcmsr_ccb_complete(ccb); 887 } 888 break; 889 890 case ARCMSR_DEV_ABORTED: 891 892 case ARCMSR_DEV_INIT_FAIL: { 893 acb->devstate[id][lun] = ARECA_RAID_GONE; 894 ccb->pcmd->result = DID_BAD_TARGET << 16; 895 arcmsr_ccb_complete(ccb); 896 } 897 break; 898 899 case ARCMSR_DEV_CHECK_CONDITION: { 900 acb->devstate[id][lun] = ARECA_RAID_GOOD; 901 arcmsr_report_sense_info(ccb); 902 arcmsr_ccb_complete(ccb); 903 } 904 break; 905 906 default: 907 printk(KERN_NOTICE 908 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \ 909 but got unknown DeviceStatus = 0x%x \n" 910 , acb->host->host_no 911 , id 912 , lun 913 , ccb->arcmsr_cdb.DeviceStatus); 914 acb->devstate[id][lun] = ARECA_RAID_GONE; 915 ccb->pcmd->result = DID_NO_CONNECT << 16; 916 arcmsr_ccb_complete(ccb); 917 break; 918 } 919 } 920 } 921 922 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) 923 { 924 int id, lun; 925 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 926 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 927 struct scsi_cmnd *abortcmd = pCCB->pcmd; 928 if (abortcmd) { 929 id = abortcmd->device->id; 930 lun = abortcmd->device->lun; 931 abortcmd->result |= DID_ABORT << 16; 932 arcmsr_ccb_complete(pCCB); 933 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n", 934 acb->host->host_no, pCCB); 935 } 936 return; 937 } 938 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \ 939 done acb = '0x%p'" 940 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x" 941 " ccboutstandingcount = %d \n" 942 , acb->host->host_no 943 , acb 944 , pCCB 945 , pCCB->acb 946 , pCCB->startdone 947 , atomic_read(&acb->ccboutstandingcount)); 948 return; 949 } 950 arcmsr_report_ccb_state(acb, pCCB, error); 951 } 952 953 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) 954 { 955 int i = 0; 956 uint32_t flag_ccb; 957 struct ARCMSR_CDB *pARCMSR_CDB; 958 bool error; 959 struct CommandControlBlock *pCCB; 960 switch (acb->adapter_type) { 961 962 case ACB_ADAPTER_TYPE_A: { 963 struct MessageUnit_A __iomem *reg = acb->pmuA; 964 uint32_t outbound_intstatus; 965 outbound_intstatus = readl(®->outbound_intstatus) & 966 acb->outbound_int_enable; 967 /*clear and abort all outbound posted Q*/ 968 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 969 while(((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) 970 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 971 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 972 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 973 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 974 arcmsr_drain_donequeue(acb, pCCB, error); 975 } 976 } 977 break; 978 979 case ACB_ADAPTER_TYPE_B: { 980 struct MessageUnit_B *reg = acb->pmuB; 981 /*clear all outbound posted Q*/ 982 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ 983 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { 984 if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { 985 writel(0, ®->done_qbuffer[i]); 986 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 987 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 988 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 989 arcmsr_drain_donequeue(acb, pCCB, error); 990 } 991 reg->post_qbuffer[i] = 0; 992 } 993 reg->doneq_index = 0; 994 reg->postq_index = 0; 995 } 996 break; 997 case ACB_ADAPTER_TYPE_C: { 998 struct MessageUnit_C *reg = acb->pmuC; 999 struct ARCMSR_CDB *pARCMSR_CDB; 1000 uint32_t flag_ccb, ccb_cdb_phy; 1001 bool error; 1002 struct CommandControlBlock *pCCB; 1003 while ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) { 1004 /*need to do*/ 1005 flag_ccb = readl(®->outbound_queueport_low); 1006 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 1007 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 1008 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1009 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1010 arcmsr_drain_donequeue(acb, pCCB, error); 1011 } 1012 } 1013 } 1014 } 1015 static void arcmsr_remove(struct pci_dev *pdev) 1016 { 1017 struct Scsi_Host *host = pci_get_drvdata(pdev); 1018 struct AdapterControlBlock *acb = 1019 (struct AdapterControlBlock *) host->hostdata; 1020 int poll_count = 0; 1021 arcmsr_free_sysfs_attr(acb); 1022 scsi_remove_host(host); 1023 flush_scheduled_work(); 1024 del_timer_sync(&acb->eternal_timer); 1025 arcmsr_disable_outbound_ints(acb); 1026 arcmsr_stop_adapter_bgrb(acb); 1027 arcmsr_flush_adapter_cache(acb); 1028 acb->acb_flags |= ACB_F_SCSISTOPADAPTER; 1029 acb->acb_flags &= ~ACB_F_IOP_INITED; 1030 1031 for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){ 1032 if (!atomic_read(&acb->ccboutstandingcount)) 1033 break; 1034 arcmsr_interrupt(acb);/* FIXME: need spinlock */ 1035 msleep(25); 1036 } 1037 1038 if (atomic_read(&acb->ccboutstandingcount)) { 1039 int i; 1040 1041 arcmsr_abort_allcmd(acb); 1042 arcmsr_done4abort_postqueue(acb); 1043 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 1044 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 1045 if (ccb->startdone == ARCMSR_CCB_START) { 1046 ccb->startdone = ARCMSR_CCB_ABORTED; 1047 ccb->pcmd->result = DID_ABORT << 16; 1048 arcmsr_ccb_complete(ccb); 1049 } 1050 } 1051 } 1052 free_irq(pdev->irq, acb); 1053 arcmsr_free_ccb_pool(acb); 1054 arcmsr_free_hbb_mu(acb); 1055 arcmsr_unmap_pciregion(acb); 1056 pci_release_regions(pdev); 1057 scsi_host_put(host); 1058 pci_disable_device(pdev); 1059 pci_set_drvdata(pdev, NULL); 1060 } 1061 1062 static void arcmsr_shutdown(struct pci_dev *pdev) 1063 { 1064 struct Scsi_Host *host = pci_get_drvdata(pdev); 1065 struct AdapterControlBlock *acb = 1066 (struct AdapterControlBlock *)host->hostdata; 1067 del_timer_sync(&acb->eternal_timer); 1068 arcmsr_disable_outbound_ints(acb); 1069 flush_scheduled_work(); 1070 arcmsr_stop_adapter_bgrb(acb); 1071 arcmsr_flush_adapter_cache(acb); 1072 } 1073 1074 static int arcmsr_module_init(void) 1075 { 1076 int error = 0; 1077 error = pci_register_driver(&arcmsr_pci_driver); 1078 return error; 1079 } 1080 1081 static void arcmsr_module_exit(void) 1082 { 1083 pci_unregister_driver(&arcmsr_pci_driver); 1084 } 1085 module_init(arcmsr_module_init); 1086 module_exit(arcmsr_module_exit); 1087 1088 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb, 1089 u32 intmask_org) 1090 { 1091 u32 mask; 1092 switch (acb->adapter_type) { 1093 1094 case ACB_ADAPTER_TYPE_A: { 1095 struct MessageUnit_A __iomem *reg = acb->pmuA; 1096 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE | 1097 ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE| 1098 ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE); 1099 writel(mask, ®->outbound_intmask); 1100 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff; 1101 } 1102 break; 1103 1104 case ACB_ADAPTER_TYPE_B: { 1105 struct MessageUnit_B *reg = acb->pmuB; 1106 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK | 1107 ARCMSR_IOP2DRV_DATA_READ_OK | 1108 ARCMSR_IOP2DRV_CDB_DONE | 1109 ARCMSR_IOP2DRV_MESSAGE_CMD_DONE); 1110 writel(mask, reg->iop2drv_doorbell_mask); 1111 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f; 1112 } 1113 break; 1114 case ACB_ADAPTER_TYPE_C: { 1115 struct MessageUnit_C *reg = acb->pmuC; 1116 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK); 1117 writel(intmask_org & mask, ®->host_int_mask); 1118 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f; 1119 } 1120 } 1121 } 1122 1123 static int arcmsr_build_ccb(struct AdapterControlBlock *acb, 1124 struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd) 1125 { 1126 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1127 int8_t *psge = (int8_t *)&arcmsr_cdb->u; 1128 __le32 address_lo, address_hi; 1129 int arccdbsize = 0x30; 1130 __le32 length = 0; 1131 int i; 1132 struct scatterlist *sg; 1133 int nseg; 1134 ccb->pcmd = pcmd; 1135 memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB)); 1136 arcmsr_cdb->TargetID = pcmd->device->id; 1137 arcmsr_cdb->LUN = pcmd->device->lun; 1138 arcmsr_cdb->Function = 1; 1139 arcmsr_cdb->Context = 0; 1140 memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len); 1141 1142 nseg = scsi_dma_map(pcmd); 1143 if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0)) 1144 return FAILED; 1145 scsi_for_each_sg(pcmd, sg, nseg, i) { 1146 /* Get the physical address of the current data pointer */ 1147 length = cpu_to_le32(sg_dma_len(sg)); 1148 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg))); 1149 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg))); 1150 if (address_hi == 0) { 1151 struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge; 1152 1153 pdma_sg->address = address_lo; 1154 pdma_sg->length = length; 1155 psge += sizeof (struct SG32ENTRY); 1156 arccdbsize += sizeof (struct SG32ENTRY); 1157 } else { 1158 struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge; 1159 1160 pdma_sg->addresshigh = address_hi; 1161 pdma_sg->address = address_lo; 1162 pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR); 1163 psge += sizeof (struct SG64ENTRY); 1164 arccdbsize += sizeof (struct SG64ENTRY); 1165 } 1166 } 1167 arcmsr_cdb->sgcount = (uint8_t)nseg; 1168 arcmsr_cdb->DataLength = scsi_bufflen(pcmd); 1169 arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0); 1170 if ( arccdbsize > 256) 1171 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE; 1172 if (pcmd->sc_data_direction == DMA_TO_DEVICE) 1173 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE; 1174 ccb->arc_cdb_size = arccdbsize; 1175 return SUCCESS; 1176 } 1177 1178 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb) 1179 { 1180 uint32_t cdb_phyaddr_pattern = ccb->cdb_phyaddr_pattern; 1181 struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb; 1182 atomic_inc(&acb->ccboutstandingcount); 1183 ccb->startdone = ARCMSR_CCB_START; 1184 switch (acb->adapter_type) { 1185 case ACB_ADAPTER_TYPE_A: { 1186 struct MessageUnit_A __iomem *reg = acb->pmuA; 1187 1188 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) 1189 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE, 1190 ®->inbound_queueport); 1191 else { 1192 writel(cdb_phyaddr_pattern, ®->inbound_queueport); 1193 } 1194 } 1195 break; 1196 1197 case ACB_ADAPTER_TYPE_B: { 1198 struct MessageUnit_B *reg = acb->pmuB; 1199 uint32_t ending_index, index = reg->postq_index; 1200 1201 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE); 1202 writel(0, ®->post_qbuffer[ending_index]); 1203 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) { 1204 writel(cdb_phyaddr_pattern | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,\ 1205 ®->post_qbuffer[index]); 1206 } else { 1207 writel(cdb_phyaddr_pattern, ®->post_qbuffer[index]); 1208 } 1209 index++; 1210 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */ 1211 reg->postq_index = index; 1212 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell); 1213 } 1214 break; 1215 case ACB_ADAPTER_TYPE_C: { 1216 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1217 uint32_t ccb_post_stamp, arc_cdb_size; 1218 1219 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size; 1220 ccb_post_stamp = (cdb_phyaddr_pattern | ((arc_cdb_size - 1) >> 6) | 1); 1221 if (acb->cdb_phyaddr_hi32) { 1222 writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high); 1223 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1224 } else { 1225 writel(ccb_post_stamp, &phbcmu->inbound_queueport_low); 1226 } 1227 } 1228 } 1229 } 1230 1231 static void arcmsr_stop_hba_bgrb(struct AdapterControlBlock *acb) 1232 { 1233 struct MessageUnit_A __iomem *reg = acb->pmuA; 1234 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1235 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1236 if (!arcmsr_hba_wait_msgint_ready(acb)) { 1237 printk(KERN_NOTICE 1238 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1239 , acb->host->host_no); 1240 } 1241 } 1242 1243 static void arcmsr_stop_hbb_bgrb(struct AdapterControlBlock *acb) 1244 { 1245 struct MessageUnit_B *reg = acb->pmuB; 1246 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1247 writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell); 1248 1249 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 1250 printk(KERN_NOTICE 1251 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1252 , acb->host->host_no); 1253 } 1254 } 1255 1256 static void arcmsr_stop_hbc_bgrb(struct AdapterControlBlock *pACB) 1257 { 1258 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1259 pACB->acb_flags &= ~ACB_F_MSG_START_BGRB; 1260 writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, ®->inbound_msgaddr0); 1261 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 1262 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 1263 printk(KERN_NOTICE 1264 "arcmsr%d: wait 'stop adapter background rebulid' timeout \n" 1265 , pACB->host->host_no); 1266 } 1267 return; 1268 } 1269 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb) 1270 { 1271 switch (acb->adapter_type) { 1272 case ACB_ADAPTER_TYPE_A: { 1273 arcmsr_stop_hba_bgrb(acb); 1274 } 1275 break; 1276 1277 case ACB_ADAPTER_TYPE_B: { 1278 arcmsr_stop_hbb_bgrb(acb); 1279 } 1280 break; 1281 case ACB_ADAPTER_TYPE_C: { 1282 arcmsr_stop_hbc_bgrb(acb); 1283 } 1284 } 1285 } 1286 1287 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb) 1288 { 1289 dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle); 1290 } 1291 1292 void arcmsr_iop_message_read(struct AdapterControlBlock *acb) 1293 { 1294 switch (acb->adapter_type) { 1295 case ACB_ADAPTER_TYPE_A: { 1296 struct MessageUnit_A __iomem *reg = acb->pmuA; 1297 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 1298 } 1299 break; 1300 1301 case ACB_ADAPTER_TYPE_B: { 1302 struct MessageUnit_B *reg = acb->pmuB; 1303 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 1304 } 1305 break; 1306 case ACB_ADAPTER_TYPE_C: { 1307 struct MessageUnit_C __iomem *reg = acb->pmuC; 1308 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 1309 } 1310 } 1311 } 1312 1313 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb) 1314 { 1315 switch (acb->adapter_type) { 1316 case ACB_ADAPTER_TYPE_A: { 1317 struct MessageUnit_A __iomem *reg = acb->pmuA; 1318 /* 1319 ** push inbound doorbell tell iop, driver data write ok 1320 ** and wait reply on next hwinterrupt for next Qbuffer post 1321 */ 1322 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, ®->inbound_doorbell); 1323 } 1324 break; 1325 1326 case ACB_ADAPTER_TYPE_B: { 1327 struct MessageUnit_B *reg = acb->pmuB; 1328 /* 1329 ** push inbound doorbell tell iop, driver data write ok 1330 ** and wait reply on next hwinterrupt for next Qbuffer post 1331 */ 1332 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell); 1333 } 1334 break; 1335 case ACB_ADAPTER_TYPE_C: { 1336 struct MessageUnit_C __iomem *reg = acb->pmuC; 1337 /* 1338 ** push inbound doorbell tell iop, driver data write ok 1339 ** and wait reply on next hwinterrupt for next Qbuffer post 1340 */ 1341 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, ®->inbound_doorbell); 1342 } 1343 break; 1344 } 1345 } 1346 1347 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb) 1348 { 1349 struct QBUFFER __iomem *qbuffer = NULL; 1350 switch (acb->adapter_type) { 1351 1352 case ACB_ADAPTER_TYPE_A: { 1353 struct MessageUnit_A __iomem *reg = acb->pmuA; 1354 qbuffer = (struct QBUFFER __iomem *)®->message_rbuffer; 1355 } 1356 break; 1357 1358 case ACB_ADAPTER_TYPE_B: { 1359 struct MessageUnit_B *reg = acb->pmuB; 1360 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer; 1361 } 1362 break; 1363 case ACB_ADAPTER_TYPE_C: { 1364 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)acb->pmuC; 1365 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer; 1366 } 1367 } 1368 return qbuffer; 1369 } 1370 1371 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb) 1372 { 1373 struct QBUFFER __iomem *pqbuffer = NULL; 1374 switch (acb->adapter_type) { 1375 1376 case ACB_ADAPTER_TYPE_A: { 1377 struct MessageUnit_A __iomem *reg = acb->pmuA; 1378 pqbuffer = (struct QBUFFER __iomem *) ®->message_wbuffer; 1379 } 1380 break; 1381 1382 case ACB_ADAPTER_TYPE_B: { 1383 struct MessageUnit_B *reg = acb->pmuB; 1384 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer; 1385 } 1386 break; 1387 case ACB_ADAPTER_TYPE_C: { 1388 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 1389 pqbuffer = (struct QBUFFER __iomem *)®->message_wbuffer; 1390 } 1391 1392 } 1393 return pqbuffer; 1394 } 1395 1396 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb) 1397 { 1398 struct QBUFFER __iomem *prbuffer; 1399 struct QBUFFER *pQbuffer; 1400 uint8_t __iomem *iop_data; 1401 int32_t my_empty_len, iop_len, rqbuf_firstindex, rqbuf_lastindex; 1402 rqbuf_lastindex = acb->rqbuf_lastindex; 1403 rqbuf_firstindex = acb->rqbuf_firstindex; 1404 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1405 iop_data = (uint8_t __iomem *)prbuffer->data; 1406 iop_len = prbuffer->data_len; 1407 my_empty_len = (rqbuf_firstindex - rqbuf_lastindex - 1) & (ARCMSR_MAX_QBUFFER - 1); 1408 1409 if (my_empty_len >= iop_len) 1410 { 1411 while (iop_len > 0) { 1412 pQbuffer = (struct QBUFFER *)&acb->rqbuffer[rqbuf_lastindex]; 1413 memcpy(pQbuffer, iop_data, 1); 1414 rqbuf_lastindex++; 1415 rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1416 iop_data++; 1417 iop_len--; 1418 } 1419 acb->rqbuf_lastindex = rqbuf_lastindex; 1420 arcmsr_iop_message_read(acb); 1421 } 1422 1423 else { 1424 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW; 1425 } 1426 } 1427 1428 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb) 1429 { 1430 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED; 1431 if (acb->wqbuf_firstindex != acb->wqbuf_lastindex) { 1432 uint8_t *pQbuffer; 1433 struct QBUFFER __iomem *pwbuffer; 1434 uint8_t __iomem *iop_data; 1435 int32_t allxfer_len = 0; 1436 1437 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1438 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1439 iop_data = (uint8_t __iomem *)pwbuffer->data; 1440 1441 while ((acb->wqbuf_firstindex != acb->wqbuf_lastindex) && \ 1442 (allxfer_len < 124)) { 1443 pQbuffer = &acb->wqbuffer[acb->wqbuf_firstindex]; 1444 memcpy(iop_data, pQbuffer, 1); 1445 acb->wqbuf_firstindex++; 1446 acb->wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1447 iop_data++; 1448 allxfer_len++; 1449 } 1450 pwbuffer->data_len = allxfer_len; 1451 1452 arcmsr_iop_message_wrote(acb); 1453 } 1454 1455 if (acb->wqbuf_firstindex == acb->wqbuf_lastindex) { 1456 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED; 1457 } 1458 } 1459 1460 static void arcmsr_hba_doorbell_isr(struct AdapterControlBlock *acb) 1461 { 1462 uint32_t outbound_doorbell; 1463 struct MessageUnit_A __iomem *reg = acb->pmuA; 1464 outbound_doorbell = readl(®->outbound_doorbell); 1465 writel(outbound_doorbell, ®->outbound_doorbell); 1466 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK) { 1467 arcmsr_iop2drv_data_wrote_handle(acb); 1468 } 1469 1470 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK) { 1471 arcmsr_iop2drv_data_read_handle(acb); 1472 } 1473 } 1474 static void arcmsr_hbc_doorbell_isr(struct AdapterControlBlock *pACB) 1475 { 1476 uint32_t outbound_doorbell; 1477 struct MessageUnit_C *reg = (struct MessageUnit_C *)pACB->pmuC; 1478 /* 1479 ******************************************************************* 1480 ** Maybe here we need to check wrqbuffer_lock is lock or not 1481 ** DOORBELL: din! don! 1482 ** check if there are any mail need to pack from firmware 1483 ******************************************************************* 1484 */ 1485 outbound_doorbell = readl(®->outbound_doorbell); 1486 writel(outbound_doorbell, ®->outbound_doorbell_clear);/*clear interrupt*/ 1487 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) { 1488 arcmsr_iop2drv_data_wrote_handle(pACB); 1489 } 1490 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK) { 1491 arcmsr_iop2drv_data_read_handle(pACB); 1492 } 1493 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 1494 arcmsr_hbc_message_isr(pACB); /* messenger of "driver to iop commands" */ 1495 } 1496 return; 1497 } 1498 static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) 1499 { 1500 uint32_t flag_ccb; 1501 struct MessageUnit_A __iomem *reg = acb->pmuA; 1502 struct ARCMSR_CDB *pARCMSR_CDB; 1503 struct CommandControlBlock *pCCB; 1504 bool error; 1505 while ((flag_ccb = readl(®->outbound_queueport)) != 0xFFFFFFFF) { 1506 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1507 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1508 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1509 arcmsr_drain_donequeue(acb, pCCB, error); 1510 } 1511 } 1512 static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) 1513 { 1514 uint32_t index; 1515 uint32_t flag_ccb; 1516 struct MessageUnit_B *reg = acb->pmuB; 1517 struct ARCMSR_CDB *pARCMSR_CDB; 1518 struct CommandControlBlock *pCCB; 1519 bool error; 1520 index = reg->doneq_index; 1521 while ((flag_ccb = readl(®->done_qbuffer[index])) != 0) { 1522 writel(0, ®->done_qbuffer[index]); 1523 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/ 1524 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb); 1525 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 1526 arcmsr_drain_donequeue(acb, pCCB, error); 1527 index++; 1528 index %= ARCMSR_MAX_HBB_POSTQUEUE; 1529 reg->doneq_index = index; 1530 } 1531 } 1532 1533 static void arcmsr_hbc_postqueue_isr(struct AdapterControlBlock *acb) 1534 { 1535 struct MessageUnit_C *phbcmu; 1536 struct ARCMSR_CDB *arcmsr_cdb; 1537 struct CommandControlBlock *ccb; 1538 uint32_t flag_ccb, ccb_cdb_phy, throttling = 0; 1539 int error; 1540 1541 phbcmu = (struct MessageUnit_C *)acb->pmuC; 1542 /* areca cdb command done */ 1543 /* Use correct offset and size for syncing */ 1544 1545 while (readl(&phbcmu->host_int_status) & 1546 ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR){ 1547 /* check if command done with no error*/ 1548 flag_ccb = readl(&phbcmu->outbound_queueport_low); 1549 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);/*frame must be 32 bytes aligned*/ 1550 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy); 1551 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 1552 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 1553 /* check if command done with no error */ 1554 arcmsr_drain_donequeue(acb, ccb, error); 1555 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) { 1556 writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING, &phbcmu->inbound_doorbell); 1557 break; 1558 } 1559 throttling++; 1560 } 1561 } 1562 /* 1563 ********************************************************************************** 1564 ** Handle a message interrupt 1565 ** 1566 ** The only message interrupt we expect is in response to a query for the current adapter config. 1567 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1568 ********************************************************************************** 1569 */ 1570 static void arcmsr_hba_message_isr(struct AdapterControlBlock *acb) 1571 { 1572 struct MessageUnit_A *reg = acb->pmuA; 1573 /*clear interrupt and message state*/ 1574 writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, ®->outbound_intstatus); 1575 schedule_work(&acb->arcmsr_do_message_isr_bh); 1576 } 1577 static void arcmsr_hbb_message_isr(struct AdapterControlBlock *acb) 1578 { 1579 struct MessageUnit_B *reg = acb->pmuB; 1580 1581 /*clear interrupt and message state*/ 1582 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 1583 schedule_work(&acb->arcmsr_do_message_isr_bh); 1584 } 1585 /* 1586 ********************************************************************************** 1587 ** Handle a message interrupt 1588 ** 1589 ** The only message interrupt we expect is in response to a query for the 1590 ** current adapter config. 1591 ** We want this in order to compare the drivemap so that we can detect newly-attached drives. 1592 ********************************************************************************** 1593 */ 1594 static void arcmsr_hbc_message_isr(struct AdapterControlBlock *acb) 1595 { 1596 struct MessageUnit_C *reg = acb->pmuC; 1597 /*clear interrupt and message state*/ 1598 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear); 1599 schedule_work(&acb->arcmsr_do_message_isr_bh); 1600 } 1601 1602 static int arcmsr_handle_hba_isr(struct AdapterControlBlock *acb) 1603 { 1604 uint32_t outbound_intstatus; 1605 struct MessageUnit_A __iomem *reg = acb->pmuA; 1606 outbound_intstatus = readl(®->outbound_intstatus) & 1607 acb->outbound_int_enable; 1608 if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT)) { 1609 return 1; 1610 } 1611 writel(outbound_intstatus, ®->outbound_intstatus); 1612 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT) { 1613 arcmsr_hba_doorbell_isr(acb); 1614 } 1615 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT) { 1616 arcmsr_hba_postqueue_isr(acb); 1617 } 1618 if(outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT) { 1619 /* messenger of "driver to iop commands" */ 1620 arcmsr_hba_message_isr(acb); 1621 } 1622 return 0; 1623 } 1624 1625 static int arcmsr_handle_hbb_isr(struct AdapterControlBlock *acb) 1626 { 1627 uint32_t outbound_doorbell; 1628 struct MessageUnit_B *reg = acb->pmuB; 1629 outbound_doorbell = readl(reg->iop2drv_doorbell) & 1630 acb->outbound_int_enable; 1631 if (!outbound_doorbell) 1632 return 1; 1633 1634 writel(~outbound_doorbell, reg->iop2drv_doorbell); 1635 /*in case the last action of doorbell interrupt clearance is cached, 1636 this action can push HW to write down the clear bit*/ 1637 readl(reg->iop2drv_doorbell); 1638 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 1639 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK) { 1640 arcmsr_iop2drv_data_wrote_handle(acb); 1641 } 1642 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK) { 1643 arcmsr_iop2drv_data_read_handle(acb); 1644 } 1645 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE) { 1646 arcmsr_hbb_postqueue_isr(acb); 1647 } 1648 if(outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) { 1649 /* messenger of "driver to iop commands" */ 1650 arcmsr_hbb_message_isr(acb); 1651 } 1652 return 0; 1653 } 1654 1655 static int arcmsr_handle_hbc_isr(struct AdapterControlBlock *pACB) 1656 { 1657 uint32_t host_interrupt_status; 1658 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 1659 /* 1660 ********************************************* 1661 ** check outbound intstatus 1662 ********************************************* 1663 */ 1664 host_interrupt_status = readl(&phbcmu->host_int_status); 1665 if (!host_interrupt_status) { 1666 /*it must be share irq*/ 1667 return 1; 1668 } 1669 /* MU ioctl transfer doorbell interrupts*/ 1670 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR) { 1671 arcmsr_hbc_doorbell_isr(pACB); /* messenger of "ioctl message read write" */ 1672 } 1673 /* MU post queue interrupts*/ 1674 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) { 1675 arcmsr_hbc_postqueue_isr(pACB); /* messenger of "scsi commands" */ 1676 } 1677 return 0; 1678 } 1679 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb) 1680 { 1681 switch (acb->adapter_type) { 1682 case ACB_ADAPTER_TYPE_A: { 1683 if (arcmsr_handle_hba_isr(acb)) { 1684 return IRQ_NONE; 1685 } 1686 } 1687 break; 1688 1689 case ACB_ADAPTER_TYPE_B: { 1690 if (arcmsr_handle_hbb_isr(acb)) { 1691 return IRQ_NONE; 1692 } 1693 } 1694 break; 1695 case ACB_ADAPTER_TYPE_C: { 1696 if (arcmsr_handle_hbc_isr(acb)) { 1697 return IRQ_NONE; 1698 } 1699 } 1700 } 1701 return IRQ_HANDLED; 1702 } 1703 1704 static void arcmsr_iop_parking(struct AdapterControlBlock *acb) 1705 { 1706 if (acb) { 1707 /* stop adapter background rebuild */ 1708 if (acb->acb_flags & ACB_F_MSG_START_BGRB) { 1709 uint32_t intmask_org; 1710 acb->acb_flags &= ~ACB_F_MSG_START_BGRB; 1711 intmask_org = arcmsr_disable_outbound_ints(acb); 1712 arcmsr_stop_adapter_bgrb(acb); 1713 arcmsr_flush_adapter_cache(acb); 1714 arcmsr_enable_outbound_ints(acb, intmask_org); 1715 } 1716 } 1717 } 1718 1719 void arcmsr_post_ioctldata2iop(struct AdapterControlBlock *acb) 1720 { 1721 int32_t wqbuf_firstindex, wqbuf_lastindex; 1722 uint8_t *pQbuffer; 1723 struct QBUFFER __iomem *pwbuffer; 1724 uint8_t __iomem *iop_data; 1725 int32_t allxfer_len = 0; 1726 pwbuffer = arcmsr_get_iop_wqbuffer(acb); 1727 iop_data = (uint8_t __iomem *)pwbuffer->data; 1728 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) { 1729 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED); 1730 wqbuf_firstindex = acb->wqbuf_firstindex; 1731 wqbuf_lastindex = acb->wqbuf_lastindex; 1732 while ((wqbuf_firstindex != wqbuf_lastindex) && (allxfer_len < 124)) { 1733 pQbuffer = &acb->wqbuffer[wqbuf_firstindex]; 1734 memcpy(iop_data, pQbuffer, 1); 1735 wqbuf_firstindex++; 1736 wqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1737 iop_data++; 1738 allxfer_len++; 1739 } 1740 acb->wqbuf_firstindex = wqbuf_firstindex; 1741 pwbuffer->data_len = allxfer_len; 1742 arcmsr_iop_message_wrote(acb); 1743 } 1744 } 1745 1746 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, 1747 struct scsi_cmnd *cmd) 1748 { 1749 struct CMD_MESSAGE_FIELD *pcmdmessagefld; 1750 int retvalue = 0, transfer_len = 0; 1751 char *buffer; 1752 struct scatterlist *sg; 1753 uint32_t controlcode = (uint32_t ) cmd->cmnd[5] << 24 | 1754 (uint32_t ) cmd->cmnd[6] << 16 | 1755 (uint32_t ) cmd->cmnd[7] << 8 | 1756 (uint32_t ) cmd->cmnd[8]; 1757 /* 4 bytes: Areca io control code */ 1758 sg = scsi_sglist(cmd); 1759 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 1760 if (scsi_sg_count(cmd) > 1) { 1761 retvalue = ARCMSR_MESSAGE_FAIL; 1762 goto message_out; 1763 } 1764 transfer_len += sg->length; 1765 1766 if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) { 1767 retvalue = ARCMSR_MESSAGE_FAIL; 1768 goto message_out; 1769 } 1770 pcmdmessagefld = (struct CMD_MESSAGE_FIELD *) buffer; 1771 switch(controlcode) { 1772 1773 case ARCMSR_MESSAGE_READ_RQBUFFER: { 1774 unsigned char *ver_addr; 1775 uint8_t *pQbuffer, *ptmpQbuffer; 1776 int32_t allxfer_len = 0; 1777 1778 ver_addr = kmalloc(1032, GFP_ATOMIC); 1779 if (!ver_addr) { 1780 retvalue = ARCMSR_MESSAGE_FAIL; 1781 goto message_out; 1782 } 1783 1784 ptmpQbuffer = ver_addr; 1785 while ((acb->rqbuf_firstindex != acb->rqbuf_lastindex) 1786 && (allxfer_len < 1031)) { 1787 pQbuffer = &acb->rqbuffer[acb->rqbuf_firstindex]; 1788 memcpy(ptmpQbuffer, pQbuffer, 1); 1789 acb->rqbuf_firstindex++; 1790 acb->rqbuf_firstindex %= ARCMSR_MAX_QBUFFER; 1791 ptmpQbuffer++; 1792 allxfer_len++; 1793 } 1794 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1795 1796 struct QBUFFER __iomem *prbuffer; 1797 uint8_t __iomem *iop_data; 1798 int32_t iop_len; 1799 1800 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1801 prbuffer = arcmsr_get_iop_rqbuffer(acb); 1802 iop_data = prbuffer->data; 1803 iop_len = readl(&prbuffer->data_len); 1804 while (iop_len > 0) { 1805 acb->rqbuffer[acb->rqbuf_lastindex] = readb(iop_data); 1806 acb->rqbuf_lastindex++; 1807 acb->rqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1808 iop_data++; 1809 iop_len--; 1810 } 1811 arcmsr_iop_message_read(acb); 1812 } 1813 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr, allxfer_len); 1814 pcmdmessagefld->cmdmessage.Length = allxfer_len; 1815 if(acb->fw_flag == FW_DEADLOCK) { 1816 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1817 }else{ 1818 pcmdmessagefld->cmdmessage.ReturnCode = ARCMSR_MESSAGE_RETURNCODE_OK; 1819 } 1820 kfree(ver_addr); 1821 } 1822 break; 1823 1824 case ARCMSR_MESSAGE_WRITE_WQBUFFER: { 1825 unsigned char *ver_addr; 1826 int32_t my_empty_len, user_len, wqbuf_firstindex, wqbuf_lastindex; 1827 uint8_t *pQbuffer, *ptmpuserbuffer; 1828 1829 ver_addr = kmalloc(1032, GFP_ATOMIC); 1830 if (!ver_addr) { 1831 retvalue = ARCMSR_MESSAGE_FAIL; 1832 goto message_out; 1833 } 1834 if(acb->fw_flag == FW_DEADLOCK) { 1835 pcmdmessagefld->cmdmessage.ReturnCode = 1836 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1837 }else{ 1838 pcmdmessagefld->cmdmessage.ReturnCode = 1839 ARCMSR_MESSAGE_RETURNCODE_OK; 1840 } 1841 ptmpuserbuffer = ver_addr; 1842 user_len = pcmdmessagefld->cmdmessage.Length; 1843 memcpy(ptmpuserbuffer, pcmdmessagefld->messagedatabuffer, user_len); 1844 wqbuf_lastindex = acb->wqbuf_lastindex; 1845 wqbuf_firstindex = acb->wqbuf_firstindex; 1846 if (wqbuf_lastindex != wqbuf_firstindex) { 1847 struct SENSE_DATA *sensebuffer = 1848 (struct SENSE_DATA *)cmd->sense_buffer; 1849 arcmsr_post_ioctldata2iop(acb); 1850 /* has error report sensedata */ 1851 sensebuffer->ErrorCode = 0x70; 1852 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1853 sensebuffer->AdditionalSenseLength = 0x0A; 1854 sensebuffer->AdditionalSenseCode = 0x20; 1855 sensebuffer->Valid = 1; 1856 retvalue = ARCMSR_MESSAGE_FAIL; 1857 } else { 1858 my_empty_len = (wqbuf_firstindex-wqbuf_lastindex - 1) 1859 &(ARCMSR_MAX_QBUFFER - 1); 1860 if (my_empty_len >= user_len) { 1861 while (user_len > 0) { 1862 pQbuffer = 1863 &acb->wqbuffer[acb->wqbuf_lastindex]; 1864 memcpy(pQbuffer, ptmpuserbuffer, 1); 1865 acb->wqbuf_lastindex++; 1866 acb->wqbuf_lastindex %= ARCMSR_MAX_QBUFFER; 1867 ptmpuserbuffer++; 1868 user_len--; 1869 } 1870 if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) { 1871 acb->acb_flags &= 1872 ~ACB_F_MESSAGE_WQBUFFER_CLEARED; 1873 arcmsr_post_ioctldata2iop(acb); 1874 } 1875 } else { 1876 /* has error report sensedata */ 1877 struct SENSE_DATA *sensebuffer = 1878 (struct SENSE_DATA *)cmd->sense_buffer; 1879 sensebuffer->ErrorCode = 0x70; 1880 sensebuffer->SenseKey = ILLEGAL_REQUEST; 1881 sensebuffer->AdditionalSenseLength = 0x0A; 1882 sensebuffer->AdditionalSenseCode = 0x20; 1883 sensebuffer->Valid = 1; 1884 retvalue = ARCMSR_MESSAGE_FAIL; 1885 } 1886 } 1887 kfree(ver_addr); 1888 } 1889 break; 1890 1891 case ARCMSR_MESSAGE_CLEAR_RQBUFFER: { 1892 uint8_t *pQbuffer = acb->rqbuffer; 1893 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1894 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1895 arcmsr_iop_message_read(acb); 1896 } 1897 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED; 1898 acb->rqbuf_firstindex = 0; 1899 acb->rqbuf_lastindex = 0; 1900 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1901 if(acb->fw_flag == FW_DEADLOCK) { 1902 pcmdmessagefld->cmdmessage.ReturnCode = 1903 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1904 }else{ 1905 pcmdmessagefld->cmdmessage.ReturnCode = 1906 ARCMSR_MESSAGE_RETURNCODE_OK; 1907 } 1908 } 1909 break; 1910 1911 case ARCMSR_MESSAGE_CLEAR_WQBUFFER: { 1912 uint8_t *pQbuffer = acb->wqbuffer; 1913 if(acb->fw_flag == FW_DEADLOCK) { 1914 pcmdmessagefld->cmdmessage.ReturnCode = 1915 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1916 }else{ 1917 pcmdmessagefld->cmdmessage.ReturnCode = 1918 ARCMSR_MESSAGE_RETURNCODE_OK; 1919 } 1920 1921 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1922 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1923 arcmsr_iop_message_read(acb); 1924 } 1925 acb->acb_flags |= 1926 (ACB_F_MESSAGE_WQBUFFER_CLEARED | 1927 ACB_F_MESSAGE_WQBUFFER_READED); 1928 acb->wqbuf_firstindex = 0; 1929 acb->wqbuf_lastindex = 0; 1930 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER); 1931 } 1932 break; 1933 1934 case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: { 1935 uint8_t *pQbuffer; 1936 1937 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) { 1938 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW; 1939 arcmsr_iop_message_read(acb); 1940 } 1941 acb->acb_flags |= 1942 (ACB_F_MESSAGE_WQBUFFER_CLEARED 1943 | ACB_F_MESSAGE_RQBUFFER_CLEARED 1944 | ACB_F_MESSAGE_WQBUFFER_READED); 1945 acb->rqbuf_firstindex = 0; 1946 acb->rqbuf_lastindex = 0; 1947 acb->wqbuf_firstindex = 0; 1948 acb->wqbuf_lastindex = 0; 1949 pQbuffer = acb->rqbuffer; 1950 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1951 pQbuffer = acb->wqbuffer; 1952 memset(pQbuffer, 0, sizeof(struct QBUFFER)); 1953 if(acb->fw_flag == FW_DEADLOCK) { 1954 pcmdmessagefld->cmdmessage.ReturnCode = 1955 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1956 }else{ 1957 pcmdmessagefld->cmdmessage.ReturnCode = 1958 ARCMSR_MESSAGE_RETURNCODE_OK; 1959 } 1960 } 1961 break; 1962 1963 case ARCMSR_MESSAGE_RETURN_CODE_3F: { 1964 if(acb->fw_flag == FW_DEADLOCK) { 1965 pcmdmessagefld->cmdmessage.ReturnCode = 1966 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1967 }else{ 1968 pcmdmessagefld->cmdmessage.ReturnCode = 1969 ARCMSR_MESSAGE_RETURNCODE_3F; 1970 } 1971 break; 1972 } 1973 case ARCMSR_MESSAGE_SAY_HELLO: { 1974 int8_t *hello_string = "Hello! I am ARCMSR"; 1975 if(acb->fw_flag == FW_DEADLOCK) { 1976 pcmdmessagefld->cmdmessage.ReturnCode = 1977 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1978 }else{ 1979 pcmdmessagefld->cmdmessage.ReturnCode = 1980 ARCMSR_MESSAGE_RETURNCODE_OK; 1981 } 1982 memcpy(pcmdmessagefld->messagedatabuffer, hello_string 1983 , (int16_t)strlen(hello_string)); 1984 } 1985 break; 1986 1987 case ARCMSR_MESSAGE_SAY_GOODBYE: 1988 if(acb->fw_flag == FW_DEADLOCK) { 1989 pcmdmessagefld->cmdmessage.ReturnCode = 1990 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1991 } 1992 arcmsr_iop_parking(acb); 1993 break; 1994 1995 case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: 1996 if(acb->fw_flag == FW_DEADLOCK) { 1997 pcmdmessagefld->cmdmessage.ReturnCode = 1998 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON; 1999 } 2000 arcmsr_flush_adapter_cache(acb); 2001 break; 2002 2003 default: 2004 retvalue = ARCMSR_MESSAGE_FAIL; 2005 } 2006 message_out: 2007 sg = scsi_sglist(cmd); 2008 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2009 return retvalue; 2010 } 2011 2012 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb) 2013 { 2014 struct list_head *head = &acb->ccb_free_list; 2015 struct CommandControlBlock *ccb = NULL; 2016 unsigned long flags; 2017 spin_lock_irqsave(&acb->ccblist_lock, flags); 2018 if (!list_empty(head)) { 2019 ccb = list_entry(head->next, struct CommandControlBlock, list); 2020 list_del_init(&ccb->list); 2021 }else{ 2022 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2023 return 0; 2024 } 2025 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2026 return ccb; 2027 } 2028 2029 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb, 2030 struct scsi_cmnd *cmd) 2031 { 2032 switch (cmd->cmnd[0]) { 2033 case INQUIRY: { 2034 unsigned char inqdata[36]; 2035 char *buffer; 2036 struct scatterlist *sg; 2037 2038 if (cmd->device->lun) { 2039 cmd->result = (DID_TIME_OUT << 16); 2040 cmd->scsi_done(cmd); 2041 return; 2042 } 2043 inqdata[0] = TYPE_PROCESSOR; 2044 /* Periph Qualifier & Periph Dev Type */ 2045 inqdata[1] = 0; 2046 /* rem media bit & Dev Type Modifier */ 2047 inqdata[2] = 0; 2048 /* ISO, ECMA, & ANSI versions */ 2049 inqdata[4] = 31; 2050 /* length of additional data */ 2051 strncpy(&inqdata[8], "Areca ", 8); 2052 /* Vendor Identification */ 2053 strncpy(&inqdata[16], "RAID controller ", 16); 2054 /* Product Identification */ 2055 strncpy(&inqdata[32], "R001", 4); /* Product Revision */ 2056 2057 sg = scsi_sglist(cmd); 2058 buffer = kmap_atomic(sg_page(sg), KM_IRQ0) + sg->offset; 2059 2060 memcpy(buffer, inqdata, sizeof(inqdata)); 2061 sg = scsi_sglist(cmd); 2062 kunmap_atomic(buffer - sg->offset, KM_IRQ0); 2063 2064 cmd->scsi_done(cmd); 2065 } 2066 break; 2067 case WRITE_BUFFER: 2068 case READ_BUFFER: { 2069 if (arcmsr_iop_message_xfer(acb, cmd)) 2070 cmd->result = (DID_ERROR << 16); 2071 cmd->scsi_done(cmd); 2072 } 2073 break; 2074 default: 2075 cmd->scsi_done(cmd); 2076 } 2077 } 2078 2079 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, 2080 void (* done)(struct scsi_cmnd *)) 2081 { 2082 struct Scsi_Host *host = cmd->device->host; 2083 struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata; 2084 struct CommandControlBlock *ccb; 2085 int target = cmd->device->id; 2086 int lun = cmd->device->lun; 2087 uint8_t scsicmd = cmd->cmnd[0]; 2088 cmd->scsi_done = done; 2089 cmd->host_scribble = NULL; 2090 cmd->result = 0; 2091 if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){ 2092 if(acb->devstate[target][lun] == ARECA_RAID_GONE) { 2093 cmd->result = (DID_NO_CONNECT << 16); 2094 } 2095 cmd->scsi_done(cmd); 2096 return 0; 2097 } 2098 if (target == 16) { 2099 /* virtual device for iop message transfer */ 2100 arcmsr_handle_virtual_command(acb, cmd); 2101 return 0; 2102 } 2103 if (atomic_read(&acb->ccboutstandingcount) >= 2104 ARCMSR_MAX_OUTSTANDING_CMD) 2105 return SCSI_MLQUEUE_HOST_BUSY; 2106 ccb = arcmsr_get_freeccb(acb); 2107 if (!ccb) 2108 return SCSI_MLQUEUE_HOST_BUSY; 2109 if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) { 2110 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1); 2111 cmd->scsi_done(cmd); 2112 return 0; 2113 } 2114 arcmsr_post_ccb(acb, ccb); 2115 return 0; 2116 } 2117 2118 static DEF_SCSI_QCMD(arcmsr_queue_command) 2119 2120 static bool arcmsr_get_hba_config(struct AdapterControlBlock *acb) 2121 { 2122 struct MessageUnit_A __iomem *reg = acb->pmuA; 2123 char *acb_firm_model = acb->firm_model; 2124 char *acb_firm_version = acb->firm_version; 2125 char *acb_device_map = acb->device_map; 2126 char __iomem *iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); 2127 char __iomem *iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); 2128 char __iomem *iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); 2129 int count; 2130 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2131 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2132 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2133 miscellaneous data' timeout \n", acb->host->host_no); 2134 return false; 2135 } 2136 count = 8; 2137 while (count){ 2138 *acb_firm_model = readb(iop_firm_model); 2139 acb_firm_model++; 2140 iop_firm_model++; 2141 count--; 2142 } 2143 2144 count = 16; 2145 while (count){ 2146 *acb_firm_version = readb(iop_firm_version); 2147 acb_firm_version++; 2148 iop_firm_version++; 2149 count--; 2150 } 2151 2152 count=16; 2153 while(count){ 2154 *acb_device_map = readb(iop_device_map); 2155 acb_device_map++; 2156 iop_device_map++; 2157 count--; 2158 } 2159 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2160 acb->host->host_no, 2161 acb->firm_version, 2162 acb->firm_model); 2163 acb->signature = readl(®->message_rwbuffer[0]); 2164 acb->firm_request_len = readl(®->message_rwbuffer[1]); 2165 acb->firm_numbers_queue = readl(®->message_rwbuffer[2]); 2166 acb->firm_sdram_size = readl(®->message_rwbuffer[3]); 2167 acb->firm_hd_channels = readl(®->message_rwbuffer[4]); 2168 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2169 return true; 2170 } 2171 static bool arcmsr_get_hbb_config(struct AdapterControlBlock *acb) 2172 { 2173 struct MessageUnit_B *reg = acb->pmuB; 2174 struct pci_dev *pdev = acb->pdev; 2175 void *dma_coherent; 2176 dma_addr_t dma_coherent_handle; 2177 char *acb_firm_model = acb->firm_model; 2178 char *acb_firm_version = acb->firm_version; 2179 char *acb_device_map = acb->device_map; 2180 char __iomem *iop_firm_model; 2181 /*firm_model,15,60-67*/ 2182 char __iomem *iop_firm_version; 2183 /*firm_version,17,68-83*/ 2184 char __iomem *iop_device_map; 2185 /*firm_version,21,84-99*/ 2186 int count; 2187 dma_coherent = dma_alloc_coherent(&pdev->dev, sizeof(struct MessageUnit_B), &dma_coherent_handle, GFP_KERNEL); 2188 if (!dma_coherent){ 2189 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error for hbb mu\n", acb->host->host_no); 2190 return false; 2191 } 2192 acb->dma_coherent_handle_hbb_mu = dma_coherent_handle; 2193 reg = (struct MessageUnit_B *)dma_coherent; 2194 acb->pmuB = reg; 2195 reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL); 2196 reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK); 2197 reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL); 2198 reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK); 2199 reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER); 2200 reg->message_rbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER); 2201 reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER); 2202 iop_firm_model = (char __iomem *)(®->message_rwbuffer[15]); /*firm_model,15,60-67*/ 2203 iop_firm_version = (char __iomem *)(®->message_rwbuffer[17]); /*firm_version,17,68-83*/ 2204 iop_device_map = (char __iomem *)(®->message_rwbuffer[21]); /*firm_version,21,84-99*/ 2205 2206 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2207 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2208 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2209 miscellaneous data' timeout \n", acb->host->host_no); 2210 return false; 2211 } 2212 count = 8; 2213 while (count){ 2214 *acb_firm_model = readb(iop_firm_model); 2215 acb_firm_model++; 2216 iop_firm_model++; 2217 count--; 2218 } 2219 count = 16; 2220 while (count){ 2221 *acb_firm_version = readb(iop_firm_version); 2222 acb_firm_version++; 2223 iop_firm_version++; 2224 count--; 2225 } 2226 2227 count = 16; 2228 while(count){ 2229 *acb_device_map = readb(iop_device_map); 2230 acb_device_map++; 2231 iop_device_map++; 2232 count--; 2233 } 2234 2235 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2236 acb->host->host_no, 2237 acb->firm_version, 2238 acb->firm_model); 2239 2240 acb->signature = readl(®->message_rwbuffer[1]); 2241 /*firm_signature,1,00-03*/ 2242 acb->firm_request_len = readl(®->message_rwbuffer[2]); 2243 /*firm_request_len,1,04-07*/ 2244 acb->firm_numbers_queue = readl(®->message_rwbuffer[3]); 2245 /*firm_numbers_queue,2,08-11*/ 2246 acb->firm_sdram_size = readl(®->message_rwbuffer[4]); 2247 /*firm_sdram_size,3,12-15*/ 2248 acb->firm_hd_channels = readl(®->message_rwbuffer[5]); 2249 /*firm_ide_channels,4,16-19*/ 2250 acb->firm_cfg_version = readl(®->message_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2251 /*firm_ide_channels,4,16-19*/ 2252 return true; 2253 } 2254 2255 static bool arcmsr_get_hbc_config(struct AdapterControlBlock *pACB) 2256 { 2257 uint32_t intmask_org, Index, firmware_state = 0; 2258 struct MessageUnit_C *reg = pACB->pmuC; 2259 char *acb_firm_model = pACB->firm_model; 2260 char *acb_firm_version = pACB->firm_version; 2261 char *iop_firm_model = (char *)(®->msgcode_rwbuffer[15]); /*firm_model,15,60-67*/ 2262 char *iop_firm_version = (char *)(®->msgcode_rwbuffer[17]); /*firm_version,17,68-83*/ 2263 int count; 2264 /* disable all outbound interrupt */ 2265 intmask_org = readl(®->host_int_mask); /* disable outbound message0 int */ 2266 writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, ®->host_int_mask); 2267 /* wait firmware ready */ 2268 do { 2269 firmware_state = readl(®->outbound_msgaddr1); 2270 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2271 /* post "get config" instruction */ 2272 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2273 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2274 /* wait message ready */ 2275 for (Index = 0; Index < 2000; Index++) { 2276 if (readl(®->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) { 2277 writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, ®->outbound_doorbell_clear);/*clear interrupt*/ 2278 break; 2279 } 2280 udelay(10); 2281 } /*max 1 seconds*/ 2282 if (Index >= 2000) { 2283 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \ 2284 miscellaneous data' timeout \n", pACB->host->host_no); 2285 return false; 2286 } 2287 count = 8; 2288 while (count) { 2289 *acb_firm_model = readb(iop_firm_model); 2290 acb_firm_model++; 2291 iop_firm_model++; 2292 count--; 2293 } 2294 count = 16; 2295 while (count) { 2296 *acb_firm_version = readb(iop_firm_version); 2297 acb_firm_version++; 2298 iop_firm_version++; 2299 count--; 2300 } 2301 printk(KERN_NOTICE "Areca RAID Controller%d: F/W %s & Model %s\n", 2302 pACB->host->host_no, 2303 pACB->firm_version, 2304 pACB->firm_model); 2305 pACB->firm_request_len = readl(®->msgcode_rwbuffer[1]); /*firm_request_len,1,04-07*/ 2306 pACB->firm_numbers_queue = readl(®->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/ 2307 pACB->firm_sdram_size = readl(®->msgcode_rwbuffer[3]); /*firm_sdram_size,3,12-15*/ 2308 pACB->firm_hd_channels = readl(®->msgcode_rwbuffer[4]); /*firm_ide_channels,4,16-19*/ 2309 pACB->firm_cfg_version = readl(®->msgcode_rwbuffer[25]); /*firm_cfg_version,25,100-103*/ 2310 /*all interrupt service will be enable at arcmsr_iop_init*/ 2311 return true; 2312 } 2313 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb) 2314 { 2315 if (acb->adapter_type == ACB_ADAPTER_TYPE_A) 2316 return arcmsr_get_hba_config(acb); 2317 else if (acb->adapter_type == ACB_ADAPTER_TYPE_B) 2318 return arcmsr_get_hbb_config(acb); 2319 else 2320 return arcmsr_get_hbc_config(acb); 2321 } 2322 2323 static int arcmsr_polling_hba_ccbdone(struct AdapterControlBlock *acb, 2324 struct CommandControlBlock *poll_ccb) 2325 { 2326 struct MessageUnit_A __iomem *reg = acb->pmuA; 2327 struct CommandControlBlock *ccb; 2328 struct ARCMSR_CDB *arcmsr_cdb; 2329 uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0; 2330 int rtn; 2331 bool error; 2332 polling_hba_ccb_retry: 2333 poll_count++; 2334 outbound_intstatus = readl(®->outbound_intstatus) & acb->outbound_int_enable; 2335 writel(outbound_intstatus, ®->outbound_intstatus);/*clear interrupt*/ 2336 while (1) { 2337 if ((flag_ccb = readl(®->outbound_queueport)) == 0xFFFFFFFF) { 2338 if (poll_ccb_done){ 2339 rtn = SUCCESS; 2340 break; 2341 }else { 2342 msleep(25); 2343 if (poll_count > 100){ 2344 rtn = FAILED; 2345 break; 2346 } 2347 goto polling_hba_ccb_retry; 2348 } 2349 } 2350 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2351 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2352 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2353 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2354 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2355 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2356 " poll command abort successfully \n" 2357 , acb->host->host_no 2358 , ccb->pcmd->device->id 2359 , ccb->pcmd->device->lun 2360 , ccb); 2361 ccb->pcmd->result = DID_ABORT << 16; 2362 arcmsr_ccb_complete(ccb); 2363 continue; 2364 } 2365 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2366 " command done ccb = '0x%p'" 2367 "ccboutstandingcount = %d \n" 2368 , acb->host->host_no 2369 , ccb 2370 , atomic_read(&acb->ccboutstandingcount)); 2371 continue; 2372 } 2373 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2374 arcmsr_report_ccb_state(acb, ccb, error); 2375 } 2376 return rtn; 2377 } 2378 2379 static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, 2380 struct CommandControlBlock *poll_ccb) 2381 { 2382 struct MessageUnit_B *reg = acb->pmuB; 2383 struct ARCMSR_CDB *arcmsr_cdb; 2384 struct CommandControlBlock *ccb; 2385 uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0; 2386 int index, rtn; 2387 bool error; 2388 polling_hbb_ccb_retry: 2389 2390 poll_count++; 2391 /* clear doorbell interrupt */ 2392 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2393 while(1){ 2394 index = reg->doneq_index; 2395 if ((flag_ccb = readl(®->done_qbuffer[index])) == 0) { 2396 if (poll_ccb_done){ 2397 rtn = SUCCESS; 2398 break; 2399 }else { 2400 msleep(25); 2401 if (poll_count > 100){ 2402 rtn = FAILED; 2403 break; 2404 } 2405 goto polling_hbb_ccb_retry; 2406 } 2407 } 2408 writel(0, ®->done_qbuffer[index]); 2409 index++; 2410 /*if last index number set it to 0 */ 2411 index %= ARCMSR_MAX_HBB_POSTQUEUE; 2412 reg->doneq_index = index; 2413 /* check if command done with no error*/ 2414 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5)); 2415 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2416 poll_ccb_done = (ccb == poll_ccb) ? 1:0; 2417 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) { 2418 if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) { 2419 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2420 " poll command abort successfully \n" 2421 ,acb->host->host_no 2422 ,ccb->pcmd->device->id 2423 ,ccb->pcmd->device->lun 2424 ,ccb); 2425 ccb->pcmd->result = DID_ABORT << 16; 2426 arcmsr_ccb_complete(ccb); 2427 continue; 2428 } 2429 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2430 " command done ccb = '0x%p'" 2431 "ccboutstandingcount = %d \n" 2432 , acb->host->host_no 2433 , ccb 2434 , atomic_read(&acb->ccboutstandingcount)); 2435 continue; 2436 } 2437 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false; 2438 arcmsr_report_ccb_state(acb, ccb, error); 2439 } 2440 return rtn; 2441 } 2442 2443 static int arcmsr_polling_hbc_ccbdone(struct AdapterControlBlock *acb, struct CommandControlBlock *poll_ccb) 2444 { 2445 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2446 uint32_t flag_ccb, ccb_cdb_phy; 2447 struct ARCMSR_CDB *arcmsr_cdb; 2448 bool error; 2449 struct CommandControlBlock *pCCB; 2450 uint32_t poll_ccb_done = 0, poll_count = 0; 2451 int rtn; 2452 polling_hbc_ccb_retry: 2453 poll_count++; 2454 while (1) { 2455 if ((readl(®->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) { 2456 if (poll_ccb_done) { 2457 rtn = SUCCESS; 2458 break; 2459 } else { 2460 msleep(25); 2461 if (poll_count > 100) { 2462 rtn = FAILED; 2463 break; 2464 } 2465 goto polling_hbc_ccb_retry; 2466 } 2467 } 2468 flag_ccb = readl(®->outbound_queueport_low); 2469 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0); 2470 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/ 2471 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb); 2472 poll_ccb_done = (pCCB == poll_ccb) ? 1 : 0; 2473 /* check ifcommand done with no error*/ 2474 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { 2475 if (pCCB->startdone == ARCMSR_CCB_ABORTED) { 2476 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'" 2477 " poll command abort successfully \n" 2478 , acb->host->host_no 2479 , pCCB->pcmd->device->id 2480 , pCCB->pcmd->device->lun 2481 , pCCB); 2482 pCCB->pcmd->result = DID_ABORT << 16; 2483 arcmsr_ccb_complete(pCCB); 2484 continue; 2485 } 2486 printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb" 2487 " command done ccb = '0x%p'" 2488 "ccboutstandingcount = %d \n" 2489 , acb->host->host_no 2490 , pCCB 2491 , atomic_read(&acb->ccboutstandingcount)); 2492 continue; 2493 } 2494 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false; 2495 arcmsr_report_ccb_state(acb, pCCB, error); 2496 } 2497 return rtn; 2498 } 2499 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb, 2500 struct CommandControlBlock *poll_ccb) 2501 { 2502 int rtn = 0; 2503 switch (acb->adapter_type) { 2504 2505 case ACB_ADAPTER_TYPE_A: { 2506 rtn = arcmsr_polling_hba_ccbdone(acb, poll_ccb); 2507 } 2508 break; 2509 2510 case ACB_ADAPTER_TYPE_B: { 2511 rtn = arcmsr_polling_hbb_ccbdone(acb, poll_ccb); 2512 } 2513 break; 2514 case ACB_ADAPTER_TYPE_C: { 2515 rtn = arcmsr_polling_hbc_ccbdone(acb, poll_ccb); 2516 } 2517 } 2518 return rtn; 2519 } 2520 2521 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb) 2522 { 2523 uint32_t cdb_phyaddr, cdb_phyaddr_hi32; 2524 dma_addr_t dma_coherent_handle; 2525 /* 2526 ******************************************************************** 2527 ** here we need to tell iop 331 our freeccb.HighPart 2528 ** if freeccb.HighPart is not zero 2529 ******************************************************************** 2530 */ 2531 dma_coherent_handle = acb->dma_coherent_handle; 2532 cdb_phyaddr = (uint32_t)(dma_coherent_handle); 2533 cdb_phyaddr_hi32 = (uint32_t)((cdb_phyaddr >> 16) >> 16); 2534 acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32; 2535 /* 2536 *********************************************************************** 2537 ** if adapter type B, set window of "post command Q" 2538 *********************************************************************** 2539 */ 2540 switch (acb->adapter_type) { 2541 2542 case ACB_ADAPTER_TYPE_A: { 2543 if (cdb_phyaddr_hi32 != 0) { 2544 struct MessageUnit_A __iomem *reg = acb->pmuA; 2545 uint32_t intmask_org; 2546 intmask_org = arcmsr_disable_outbound_ints(acb); 2547 writel(ARCMSR_SIGNATURE_SET_CONFIG, \ 2548 ®->message_rwbuffer[0]); 2549 writel(cdb_phyaddr_hi32, ®->message_rwbuffer[1]); 2550 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \ 2551 ®->inbound_msgaddr0); 2552 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2553 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \ 2554 part physical address timeout\n", 2555 acb->host->host_no); 2556 return 1; 2557 } 2558 arcmsr_enable_outbound_ints(acb, intmask_org); 2559 } 2560 } 2561 break; 2562 2563 case ACB_ADAPTER_TYPE_B: { 2564 unsigned long post_queue_phyaddr; 2565 uint32_t __iomem *rwbuffer; 2566 2567 struct MessageUnit_B *reg = acb->pmuB; 2568 uint32_t intmask_org; 2569 intmask_org = arcmsr_disable_outbound_ints(acb); 2570 reg->postq_index = 0; 2571 reg->doneq_index = 0; 2572 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell); 2573 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2574 printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \ 2575 acb->host->host_no); 2576 return 1; 2577 } 2578 post_queue_phyaddr = acb->dma_coherent_handle_hbb_mu; 2579 rwbuffer = reg->message_rwbuffer; 2580 /* driver "set config" signature */ 2581 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++); 2582 /* normal should be zero */ 2583 writel(cdb_phyaddr_hi32, rwbuffer++); 2584 /* postQ size (256 + 8)*4 */ 2585 writel(post_queue_phyaddr, rwbuffer++); 2586 /* doneQ size (256 + 8)*4 */ 2587 writel(post_queue_phyaddr + 1056, rwbuffer++); 2588 /* ccb maxQ size must be --> [(256 + 8)*4]*/ 2589 writel(1056, rwbuffer); 2590 2591 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell); 2592 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2593 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2594 timeout \n",acb->host->host_no); 2595 return 1; 2596 } 2597 arcmsr_hbb_enable_driver_mode(acb); 2598 arcmsr_enable_outbound_ints(acb, intmask_org); 2599 } 2600 break; 2601 case ACB_ADAPTER_TYPE_C: { 2602 if (cdb_phyaddr_hi32 != 0) { 2603 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2604 2605 if (cdb_phyaddr_hi32 != 0) { 2606 unsigned char Retries = 0x00; 2607 do { 2608 printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x \n", acb->adapter_index, cdb_phyaddr_hi32); 2609 } while (Retries++ < 100); 2610 } 2611 writel(ARCMSR_SIGNATURE_SET_CONFIG, ®->msgcode_rwbuffer[0]); 2612 writel(cdb_phyaddr_hi32, ®->msgcode_rwbuffer[1]); 2613 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, ®->inbound_msgaddr0); 2614 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2615 if (!arcmsr_hbc_wait_msgint_ready(acb)) { 2616 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \ 2617 timeout \n", acb->host->host_no); 2618 return 1; 2619 } 2620 } 2621 } 2622 } 2623 return 0; 2624 } 2625 2626 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb) 2627 { 2628 uint32_t firmware_state = 0; 2629 switch (acb->adapter_type) { 2630 2631 case ACB_ADAPTER_TYPE_A: { 2632 struct MessageUnit_A __iomem *reg = acb->pmuA; 2633 do { 2634 firmware_state = readl(®->outbound_msgaddr1); 2635 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0); 2636 } 2637 break; 2638 2639 case ACB_ADAPTER_TYPE_B: { 2640 struct MessageUnit_B *reg = acb->pmuB; 2641 do { 2642 firmware_state = readl(reg->iop2drv_doorbell); 2643 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0); 2644 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell); 2645 } 2646 break; 2647 case ACB_ADAPTER_TYPE_C: { 2648 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2649 do { 2650 firmware_state = readl(®->outbound_msgaddr1); 2651 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0); 2652 } 2653 } 2654 } 2655 2656 static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) 2657 { 2658 struct MessageUnit_A __iomem *reg = acb->pmuA; 2659 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2660 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2661 return; 2662 } else { 2663 acb->fw_flag = FW_NORMAL; 2664 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){ 2665 atomic_set(&acb->rq_map_token, 16); 2666 } 2667 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2668 if (atomic_dec_and_test(&acb->rq_map_token)) { 2669 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2670 return; 2671 } 2672 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2673 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2674 } 2675 return; 2676 } 2677 2678 static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) 2679 { 2680 struct MessageUnit_B __iomem *reg = acb->pmuB; 2681 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ 2682 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2683 return; 2684 } else { 2685 acb->fw_flag = FW_NORMAL; 2686 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2687 atomic_set(&acb->rq_map_token, 16); 2688 } 2689 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2690 if (atomic_dec_and_test(&acb->rq_map_token)) { 2691 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2692 return; 2693 } 2694 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); 2695 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2696 } 2697 return; 2698 } 2699 2700 static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) 2701 { 2702 struct MessageUnit_C __iomem *reg = acb->pmuC; 2703 if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { 2704 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2705 return; 2706 } else { 2707 acb->fw_flag = FW_NORMAL; 2708 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { 2709 atomic_set(&acb->rq_map_token, 16); 2710 } 2711 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); 2712 if (atomic_dec_and_test(&acb->rq_map_token)) { 2713 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2714 return; 2715 } 2716 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); 2717 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); 2718 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2719 } 2720 return; 2721 } 2722 2723 static void arcmsr_request_device_map(unsigned long pacb) 2724 { 2725 struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb; 2726 switch (acb->adapter_type) { 2727 case ACB_ADAPTER_TYPE_A: { 2728 arcmsr_request_hba_device_map(acb); 2729 } 2730 break; 2731 case ACB_ADAPTER_TYPE_B: { 2732 arcmsr_request_hbb_device_map(acb); 2733 } 2734 break; 2735 case ACB_ADAPTER_TYPE_C: { 2736 arcmsr_request_hbc_device_map(acb); 2737 } 2738 } 2739 } 2740 2741 static void arcmsr_start_hba_bgrb(struct AdapterControlBlock *acb) 2742 { 2743 struct MessageUnit_A __iomem *reg = acb->pmuA; 2744 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2745 writel(ARCMSR_INBOUND_MESG0_START_BGRB, ®->inbound_msgaddr0); 2746 if (!arcmsr_hba_wait_msgint_ready(acb)) { 2747 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2748 rebulid' timeout \n", acb->host->host_no); 2749 } 2750 } 2751 2752 static void arcmsr_start_hbb_bgrb(struct AdapterControlBlock *acb) 2753 { 2754 struct MessageUnit_B *reg = acb->pmuB; 2755 acb->acb_flags |= ACB_F_MSG_START_BGRB; 2756 writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell); 2757 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2758 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2759 rebulid' timeout \n",acb->host->host_no); 2760 } 2761 } 2762 2763 static void arcmsr_start_hbc_bgrb(struct AdapterControlBlock *pACB) 2764 { 2765 struct MessageUnit_C *phbcmu = (struct MessageUnit_C *)pACB->pmuC; 2766 pACB->acb_flags |= ACB_F_MSG_START_BGRB; 2767 writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0); 2768 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell); 2769 if (!arcmsr_hbc_wait_msgint_ready(pACB)) { 2770 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \ 2771 rebulid' timeout \n", pACB->host->host_no); 2772 } 2773 return; 2774 } 2775 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb) 2776 { 2777 switch (acb->adapter_type) { 2778 case ACB_ADAPTER_TYPE_A: 2779 arcmsr_start_hba_bgrb(acb); 2780 break; 2781 case ACB_ADAPTER_TYPE_B: 2782 arcmsr_start_hbb_bgrb(acb); 2783 break; 2784 case ACB_ADAPTER_TYPE_C: 2785 arcmsr_start_hbc_bgrb(acb); 2786 } 2787 } 2788 2789 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb) 2790 { 2791 switch (acb->adapter_type) { 2792 case ACB_ADAPTER_TYPE_A: { 2793 struct MessageUnit_A __iomem *reg = acb->pmuA; 2794 uint32_t outbound_doorbell; 2795 /* empty doorbell Qbuffer if door bell ringed */ 2796 outbound_doorbell = readl(®->outbound_doorbell); 2797 /*clear doorbell interrupt */ 2798 writel(outbound_doorbell, ®->outbound_doorbell); 2799 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2800 } 2801 break; 2802 2803 case ACB_ADAPTER_TYPE_B: { 2804 struct MessageUnit_B *reg = acb->pmuB; 2805 /*clear interrupt and message state*/ 2806 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); 2807 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell); 2808 /* let IOP know data has been read */ 2809 } 2810 break; 2811 case ACB_ADAPTER_TYPE_C: { 2812 struct MessageUnit_C *reg = (struct MessageUnit_C *)acb->pmuC; 2813 uint32_t outbound_doorbell; 2814 /* empty doorbell Qbuffer if door bell ringed */ 2815 outbound_doorbell = readl(®->outbound_doorbell); 2816 writel(outbound_doorbell, ®->outbound_doorbell_clear); 2817 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 2818 } 2819 } 2820 } 2821 2822 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb) 2823 { 2824 switch (acb->adapter_type) { 2825 case ACB_ADAPTER_TYPE_A: 2826 return; 2827 case ACB_ADAPTER_TYPE_B: 2828 { 2829 struct MessageUnit_B *reg = acb->pmuB; 2830 writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell); 2831 if (!arcmsr_hbb_wait_msgint_ready(acb)) { 2832 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT"); 2833 return; 2834 } 2835 } 2836 break; 2837 case ACB_ADAPTER_TYPE_C: 2838 return; 2839 } 2840 return; 2841 } 2842 2843 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb) 2844 { 2845 uint8_t value[64]; 2846 int i, count = 0; 2847 struct MessageUnit_A __iomem *pmuA = acb->pmuA; 2848 struct MessageUnit_C __iomem *pmuC = acb->pmuC; 2849 u32 temp = 0; 2850 /* backup pci config data */ 2851 printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no); 2852 for (i = 0; i < 64; i++) { 2853 pci_read_config_byte(acb->pdev, i, &value[i]); 2854 } 2855 /* hardware reset signal */ 2856 if ((acb->dev_id == 0x1680)) { 2857 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]); 2858 } else if ((acb->dev_id == 0x1880)) { 2859 do { 2860 count++; 2861 writel(0xF, &pmuC->write_sequence); 2862 writel(0x4, &pmuC->write_sequence); 2863 writel(0xB, &pmuC->write_sequence); 2864 writel(0x2, &pmuC->write_sequence); 2865 writel(0x7, &pmuC->write_sequence); 2866 writel(0xD, &pmuC->write_sequence); 2867 } while ((((temp = readl(&pmuC->host_diagnostic)) | ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5)); 2868 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic); 2869 } else { 2870 pci_write_config_byte(acb->pdev, 0x84, 0x20); 2871 } 2872 msleep(2000); 2873 /* write back pci config data */ 2874 for (i = 0; i < 64; i++) { 2875 pci_write_config_byte(acb->pdev, i, value[i]); 2876 } 2877 msleep(1000); 2878 return; 2879 } 2880 static void arcmsr_iop_init(struct AdapterControlBlock *acb) 2881 { 2882 uint32_t intmask_org; 2883 /* disable all outbound interrupt */ 2884 intmask_org = arcmsr_disable_outbound_ints(acb); 2885 arcmsr_wait_firmware_ready(acb); 2886 arcmsr_iop_confirm(acb); 2887 /*start background rebuild*/ 2888 arcmsr_start_adapter_bgrb(acb); 2889 /* empty doorbell Qbuffer if door bell ringed */ 2890 arcmsr_clear_doorbell_queue_buffer(acb); 2891 arcmsr_enable_eoi_mode(acb); 2892 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2893 arcmsr_enable_outbound_ints(acb, intmask_org); 2894 acb->acb_flags |= ACB_F_IOP_INITED; 2895 } 2896 2897 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) 2898 { 2899 struct CommandControlBlock *ccb; 2900 uint32_t intmask_org; 2901 uint8_t rtnval = 0x00; 2902 int i = 0; 2903 unsigned long flags; 2904 2905 if (atomic_read(&acb->ccboutstandingcount) != 0) { 2906 /* disable all outbound interrupt */ 2907 intmask_org = arcmsr_disable_outbound_ints(acb); 2908 /* talk to iop 331 outstanding command aborted */ 2909 rtnval = arcmsr_abort_allcmd(acb); 2910 /* clear all outbound posted Q */ 2911 arcmsr_done4abort_postqueue(acb); 2912 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 2913 ccb = acb->pccb_pool[i]; 2914 if (ccb->startdone == ARCMSR_CCB_START) { 2915 scsi_dma_unmap(ccb->pcmd); 2916 ccb->startdone = ARCMSR_CCB_DONE; 2917 ccb->ccb_flags = 0; 2918 spin_lock_irqsave(&acb->ccblist_lock, flags); 2919 list_add_tail(&ccb->list, &acb->ccb_free_list); 2920 spin_unlock_irqrestore(&acb->ccblist_lock, flags); 2921 } 2922 } 2923 atomic_set(&acb->ccboutstandingcount, 0); 2924 /* enable all outbound interrupt */ 2925 arcmsr_enable_outbound_ints(acb, intmask_org); 2926 return rtnval; 2927 } 2928 return rtnval; 2929 } 2930 2931 static int arcmsr_bus_reset(struct scsi_cmnd *cmd) 2932 { 2933 struct AdapterControlBlock *acb; 2934 uint32_t intmask_org, outbound_doorbell; 2935 int retry_count = 0; 2936 int rtn = FAILED; 2937 acb = (struct AdapterControlBlock *) cmd->device->host->hostdata; 2938 printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts); 2939 acb->num_resets++; 2940 2941 switch(acb->adapter_type){ 2942 case ACB_ADAPTER_TYPE_A:{ 2943 if (acb->acb_flags & ACB_F_BUS_RESET){ 2944 long timeout; 2945 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 2946 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 2947 if (timeout) { 2948 return SUCCESS; 2949 } 2950 } 2951 acb->acb_flags |= ACB_F_BUS_RESET; 2952 if (!arcmsr_iop_reset(acb)) { 2953 struct MessageUnit_A __iomem *reg; 2954 reg = acb->pmuA; 2955 arcmsr_hardware_reset(acb); 2956 acb->acb_flags &= ~ACB_F_IOP_INITED; 2957 sleep_again: 2958 arcmsr_sleep_for_bus_reset(cmd); 2959 if ((readl(®->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) { 2960 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 2961 if (retry_count > retrycount) { 2962 acb->fw_flag = FW_DEADLOCK; 2963 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 2964 return FAILED; 2965 } 2966 retry_count++; 2967 goto sleep_again; 2968 } 2969 acb->acb_flags |= ACB_F_IOP_INITED; 2970 /* disable all outbound interrupt */ 2971 intmask_org = arcmsr_disable_outbound_ints(acb); 2972 arcmsr_get_firmware_spec(acb); 2973 arcmsr_start_adapter_bgrb(acb); 2974 /* clear Qbuffer if door bell ringed */ 2975 outbound_doorbell = readl(®->outbound_doorbell); 2976 writel(outbound_doorbell, ®->outbound_doorbell); /*clear interrupt */ 2977 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, ®->inbound_doorbell); 2978 /* enable outbound Post Queue,outbound doorbell Interrupt */ 2979 arcmsr_enable_outbound_ints(acb, intmask_org); 2980 atomic_set(&acb->rq_map_token, 16); 2981 atomic_set(&acb->ante_token_value, 16); 2982 acb->fw_flag = FW_NORMAL; 2983 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 2984 acb->acb_flags &= ~ACB_F_BUS_RESET; 2985 rtn = SUCCESS; 2986 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 2987 } else { 2988 acb->acb_flags &= ~ACB_F_BUS_RESET; 2989 atomic_set(&acb->rq_map_token, 16); 2990 atomic_set(&acb->ante_token_value, 16); 2991 acb->fw_flag = FW_NORMAL; 2992 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 2993 rtn = SUCCESS; 2994 } 2995 break; 2996 } 2997 case ACB_ADAPTER_TYPE_B:{ 2998 acb->acb_flags |= ACB_F_BUS_RESET; 2999 if (!arcmsr_iop_reset(acb)) { 3000 acb->acb_flags &= ~ACB_F_BUS_RESET; 3001 rtn = FAILED; 3002 } else { 3003 acb->acb_flags &= ~ACB_F_BUS_RESET; 3004 atomic_set(&acb->rq_map_token, 16); 3005 atomic_set(&acb->ante_token_value, 16); 3006 acb->fw_flag = FW_NORMAL; 3007 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3008 rtn = SUCCESS; 3009 } 3010 break; 3011 } 3012 case ACB_ADAPTER_TYPE_C:{ 3013 if (acb->acb_flags & ACB_F_BUS_RESET) { 3014 long timeout; 3015 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n"); 3016 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ); 3017 if (timeout) { 3018 return SUCCESS; 3019 } 3020 } 3021 acb->acb_flags |= ACB_F_BUS_RESET; 3022 if (!arcmsr_iop_reset(acb)) { 3023 struct MessageUnit_C __iomem *reg; 3024 reg = acb->pmuC; 3025 arcmsr_hardware_reset(acb); 3026 acb->acb_flags &= ~ACB_F_IOP_INITED; 3027 sleep: 3028 arcmsr_sleep_for_bus_reset(cmd); 3029 if ((readl(®->host_diagnostic) & 0x04) != 0) { 3030 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d \n", acb->host->host_no, retry_count); 3031 if (retry_count > retrycount) { 3032 acb->fw_flag = FW_DEADLOCK; 3033 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!! \n", acb->host->host_no); 3034 return FAILED; 3035 } 3036 retry_count++; 3037 goto sleep; 3038 } 3039 acb->acb_flags |= ACB_F_IOP_INITED; 3040 /* disable all outbound interrupt */ 3041 intmask_org = arcmsr_disable_outbound_ints(acb); 3042 arcmsr_get_firmware_spec(acb); 3043 arcmsr_start_adapter_bgrb(acb); 3044 /* clear Qbuffer if door bell ringed */ 3045 outbound_doorbell = readl(®->outbound_doorbell); 3046 writel(outbound_doorbell, ®->outbound_doorbell_clear); /*clear interrupt */ 3047 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, ®->inbound_doorbell); 3048 /* enable outbound Post Queue,outbound doorbell Interrupt */ 3049 arcmsr_enable_outbound_ints(acb, intmask_org); 3050 atomic_set(&acb->rq_map_token, 16); 3051 atomic_set(&acb->ante_token_value, 16); 3052 acb->fw_flag = FW_NORMAL; 3053 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); 3054 acb->acb_flags &= ~ACB_F_BUS_RESET; 3055 rtn = SUCCESS; 3056 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); 3057 } else { 3058 acb->acb_flags &= ~ACB_F_BUS_RESET; 3059 atomic_set(&acb->rq_map_token, 16); 3060 atomic_set(&acb->ante_token_value, 16); 3061 acb->fw_flag = FW_NORMAL; 3062 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); 3063 rtn = SUCCESS; 3064 } 3065 break; 3066 } 3067 } 3068 return rtn; 3069 } 3070 3071 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb, 3072 struct CommandControlBlock *ccb) 3073 { 3074 int rtn; 3075 rtn = arcmsr_polling_ccbdone(acb, ccb); 3076 return rtn; 3077 } 3078 3079 static int arcmsr_abort(struct scsi_cmnd *cmd) 3080 { 3081 struct AdapterControlBlock *acb = 3082 (struct AdapterControlBlock *)cmd->device->host->hostdata; 3083 int i = 0; 3084 int rtn = FAILED; 3085 printk(KERN_NOTICE 3086 "arcmsr%d: abort device command of scsi id = %d lun = %d \n", 3087 acb->host->host_no, cmd->device->id, cmd->device->lun); 3088 acb->acb_flags |= ACB_F_ABORT; 3089 acb->num_aborts++; 3090 /* 3091 ************************************************ 3092 ** the all interrupt service routine is locked 3093 ** we need to handle it as soon as possible and exit 3094 ************************************************ 3095 */ 3096 if (!atomic_read(&acb->ccboutstandingcount)) 3097 return rtn; 3098 3099 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { 3100 struct CommandControlBlock *ccb = acb->pccb_pool[i]; 3101 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) { 3102 ccb->startdone = ARCMSR_CCB_ABORTED; 3103 rtn = arcmsr_abort_one_cmd(acb, ccb); 3104 break; 3105 } 3106 } 3107 acb->acb_flags &= ~ACB_F_ABORT; 3108 return rtn; 3109 } 3110 3111 static const char *arcmsr_info(struct Scsi_Host *host) 3112 { 3113 struct AdapterControlBlock *acb = 3114 (struct AdapterControlBlock *) host->hostdata; 3115 static char buf[256]; 3116 char *type; 3117 int raid6 = 1; 3118 switch (acb->pdev->device) { 3119 case PCI_DEVICE_ID_ARECA_1110: 3120 case PCI_DEVICE_ID_ARECA_1200: 3121 case PCI_DEVICE_ID_ARECA_1202: 3122 case PCI_DEVICE_ID_ARECA_1210: 3123 raid6 = 0; 3124 /*FALLTHRU*/ 3125 case PCI_DEVICE_ID_ARECA_1120: 3126 case PCI_DEVICE_ID_ARECA_1130: 3127 case PCI_DEVICE_ID_ARECA_1160: 3128 case PCI_DEVICE_ID_ARECA_1170: 3129 case PCI_DEVICE_ID_ARECA_1201: 3130 case PCI_DEVICE_ID_ARECA_1220: 3131 case PCI_DEVICE_ID_ARECA_1230: 3132 case PCI_DEVICE_ID_ARECA_1260: 3133 case PCI_DEVICE_ID_ARECA_1270: 3134 case PCI_DEVICE_ID_ARECA_1280: 3135 type = "SATA"; 3136 break; 3137 case PCI_DEVICE_ID_ARECA_1380: 3138 case PCI_DEVICE_ID_ARECA_1381: 3139 case PCI_DEVICE_ID_ARECA_1680: 3140 case PCI_DEVICE_ID_ARECA_1681: 3141 case PCI_DEVICE_ID_ARECA_1880: 3142 type = "SAS"; 3143 break; 3144 default: 3145 type = "X-TYPE"; 3146 break; 3147 } 3148 sprintf(buf, "Areca %s Host Adapter RAID Controller%s\n %s", 3149 type, raid6 ? "( RAID6 capable)" : "", 3150 ARCMSR_DRIVER_VERSION); 3151 return buf; 3152 } 3153