1 /* 2 * Adaptec AIC7xxx device driver for Linux. 3 * 4 * Copyright (c) 1994 John Aycock 5 * The University of Calgary Department of Computer Science. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * Copyright (c) 2000-2003 Adaptec Inc. 22 * All rights reserved. 23 * 24 * Redistribution and use in source and binary forms, with or without 25 * modification, are permitted provided that the following conditions 26 * are met: 27 * 1. Redistributions of source code must retain the above copyright 28 * notice, this list of conditions, and the following disclaimer, 29 * without modification. 30 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 31 * substantially similar to the "NO WARRANTY" disclaimer below 32 * ("Disclaimer") and any redistribution must be conditioned upon 33 * including a substantially similar Disclaimer requirement for further 34 * binary redistribution. 35 * 3. Neither the names of the above-listed copyright holders nor the names 36 * of any contributors may be used to endorse or promote products derived 37 * from this software without specific prior written permission. 38 * 39 * Alternatively, this software may be distributed under the terms of the 40 * GNU General Public License ("GPL") version 2 as published by the Free 41 * Software Foundation. 42 * 43 * NO WARRANTY 44 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 45 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 46 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR 47 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 48 * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 49 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 50 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 51 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 52 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING 53 * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 54 * POSSIBILITY OF SUCH DAMAGES. 55 * 56 * $Id: //depot/aic7xxx/linux/drivers/scsi/aic7xxx/aic7xxx_osm.h#151 $ 57 * 58 */ 59 #ifndef _AIC7XXX_LINUX_H_ 60 #define _AIC7XXX_LINUX_H_ 61 62 #include <linux/types.h> 63 #include <linux/blkdev.h> 64 #include <linux/delay.h> 65 #include <linux/ioport.h> 66 #include <linux/pci.h> 67 #include <linux/interrupt.h> 68 #include <linux/module.h> 69 #include <linux/slab.h> 70 #include <asm/byteorder.h> 71 #include <asm/io.h> 72 73 #include <scsi/scsi.h> 74 #include <scsi/scsi_cmnd.h> 75 #include <scsi/scsi_eh.h> 76 #include <scsi/scsi_device.h> 77 #include <scsi/scsi_host.h> 78 #include <scsi/scsi_tcq.h> 79 #include <scsi/scsi_transport.h> 80 #include <scsi/scsi_transport_spi.h> 81 82 /* Core SCSI definitions */ 83 #define AIC_LIB_PREFIX ahc 84 85 /* Name space conflict with BSD queue macros */ 86 #ifdef LIST_HEAD 87 #undef LIST_HEAD 88 #endif 89 90 #include "cam.h" 91 #include "queue.h" 92 #include "scsi_message.h" 93 #include "aiclib.h" 94 95 /*********************************** Debugging ********************************/ 96 #ifdef CONFIG_AIC7XXX_DEBUG_ENABLE 97 #ifdef CONFIG_AIC7XXX_DEBUG_MASK 98 #define AHC_DEBUG 1 99 #define AHC_DEBUG_OPTS CONFIG_AIC7XXX_DEBUG_MASK 100 #else 101 /* 102 * Compile in debugging code, but do not enable any printfs. 103 */ 104 #define AHC_DEBUG 1 105 #endif 106 /* No debugging code. */ 107 #endif 108 109 /************************* Forward Declarations *******************************/ 110 struct ahc_softc; 111 typedef struct pci_dev *ahc_dev_softc_t; 112 typedef struct scsi_cmnd *ahc_io_ctx_t; 113 114 /******************************* Byte Order ***********************************/ 115 #define ahc_htobe16(x) cpu_to_be16(x) 116 #define ahc_htobe32(x) cpu_to_be32(x) 117 #define ahc_htobe64(x) cpu_to_be64(x) 118 #define ahc_htole16(x) cpu_to_le16(x) 119 #define ahc_htole32(x) cpu_to_le32(x) 120 #define ahc_htole64(x) cpu_to_le64(x) 121 122 #define ahc_be16toh(x) be16_to_cpu(x) 123 #define ahc_be32toh(x) be32_to_cpu(x) 124 #define ahc_be64toh(x) be64_to_cpu(x) 125 #define ahc_le16toh(x) le16_to_cpu(x) 126 #define ahc_le32toh(x) le32_to_cpu(x) 127 #define ahc_le64toh(x) le64_to_cpu(x) 128 129 /************************* Configuration Data *********************************/ 130 extern u_int aic7xxx_no_probe; 131 extern u_int aic7xxx_allow_memio; 132 extern struct scsi_host_template aic7xxx_driver_template; 133 134 /***************************** Bus Space/DMA **********************************/ 135 136 typedef uint32_t bus_size_t; 137 138 typedef enum { 139 BUS_SPACE_MEMIO, 140 BUS_SPACE_PIO 141 } bus_space_tag_t; 142 143 typedef union { 144 u_long ioport; 145 volatile uint8_t __iomem *maddr; 146 } bus_space_handle_t; 147 148 typedef struct bus_dma_segment 149 { 150 dma_addr_t ds_addr; 151 bus_size_t ds_len; 152 } bus_dma_segment_t; 153 154 struct ahc_linux_dma_tag 155 { 156 bus_size_t alignment; 157 bus_size_t boundary; 158 bus_size_t maxsize; 159 }; 160 typedef struct ahc_linux_dma_tag* bus_dma_tag_t; 161 162 typedef dma_addr_t bus_dmamap_t; 163 164 typedef int bus_dma_filter_t(void*, dma_addr_t); 165 typedef void bus_dmamap_callback_t(void *, bus_dma_segment_t *, int, int); 166 167 #define BUS_DMA_WAITOK 0x0 168 #define BUS_DMA_NOWAIT 0x1 169 #define BUS_DMA_ALLOCNOW 0x2 170 #define BUS_DMA_LOAD_SEGS 0x4 /* 171 * Argument is an S/G list not 172 * a single buffer. 173 */ 174 175 #define BUS_SPACE_MAXADDR 0xFFFFFFFF 176 #define BUS_SPACE_MAXADDR_32BIT 0xFFFFFFFF 177 #define BUS_SPACE_MAXSIZE_32BIT 0xFFFFFFFF 178 179 int ahc_dma_tag_create(struct ahc_softc *, bus_dma_tag_t /*parent*/, 180 bus_size_t /*alignment*/, bus_size_t /*boundary*/, 181 dma_addr_t /*lowaddr*/, dma_addr_t /*highaddr*/, 182 bus_dma_filter_t*/*filter*/, void */*filterarg*/, 183 bus_size_t /*maxsize*/, int /*nsegments*/, 184 bus_size_t /*maxsegsz*/, int /*flags*/, 185 bus_dma_tag_t */*dma_tagp*/); 186 187 void ahc_dma_tag_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/); 188 189 int ahc_dmamem_alloc(struct ahc_softc *, bus_dma_tag_t /*dmat*/, 190 void** /*vaddr*/, int /*flags*/, 191 bus_dmamap_t* /*mapp*/); 192 193 void ahc_dmamem_free(struct ahc_softc *, bus_dma_tag_t /*dmat*/, 194 void* /*vaddr*/, bus_dmamap_t /*map*/); 195 196 void ahc_dmamap_destroy(struct ahc_softc *, bus_dma_tag_t /*tag*/, 197 bus_dmamap_t /*map*/); 198 199 int ahc_dmamap_load(struct ahc_softc *ahc, bus_dma_tag_t /*dmat*/, 200 bus_dmamap_t /*map*/, void * /*buf*/, 201 bus_size_t /*buflen*/, bus_dmamap_callback_t *, 202 void */*callback_arg*/, int /*flags*/); 203 204 int ahc_dmamap_unload(struct ahc_softc *, bus_dma_tag_t, bus_dmamap_t); 205 206 /* 207 * Operations performed by ahc_dmamap_sync(). 208 */ 209 #define BUS_DMASYNC_PREREAD 0x01 /* pre-read synchronization */ 210 #define BUS_DMASYNC_POSTREAD 0x02 /* post-read synchronization */ 211 #define BUS_DMASYNC_PREWRITE 0x04 /* pre-write synchronization */ 212 #define BUS_DMASYNC_POSTWRITE 0x08 /* post-write synchronization */ 213 214 /* 215 * XXX 216 * ahc_dmamap_sync is only used on buffers allocated with 217 * the pci_alloc_consistent() API. Although I'm not sure how 218 * this works on architectures with a write buffer, Linux does 219 * not have an API to sync "coherent" memory. Perhaps we need 220 * to do an mb()? 221 */ 222 #define ahc_dmamap_sync(ahc, dma_tag, dmamap, offset, len, op) 223 224 /********************************** Includes **********************************/ 225 #ifdef CONFIG_AIC7XXX_REG_PRETTY_PRINT 226 #define AIC_DEBUG_REGISTERS 1 227 #else 228 #define AIC_DEBUG_REGISTERS 0 229 #endif 230 #include "aic7xxx.h" 231 232 /***************************** Timer Facilities *******************************/ 233 static __inline void 234 ahc_scb_timer_reset(struct scb *scb, u_int usec) 235 { 236 } 237 238 /***************************** SMP support ************************************/ 239 #include <linux/spinlock.h> 240 241 #define AIC7XXX_DRIVER_VERSION "7.0" 242 243 /*************************** Device Data Structures ***************************/ 244 /* 245 * A per probed device structure used to deal with some error recovery 246 * scenarios that the Linux mid-layer code just doesn't know how to 247 * handle. The structure allocated for a device only becomes persistent 248 * after a successfully completed inquiry command to the target when 249 * that inquiry data indicates a lun is present. 250 */ 251 typedef enum { 252 AHC_DEV_FREEZE_TIL_EMPTY = 0x02, /* Freeze queue until active == 0 */ 253 AHC_DEV_Q_BASIC = 0x10, /* Allow basic device queuing */ 254 AHC_DEV_Q_TAGGED = 0x20, /* Allow full SCSI2 command queueing */ 255 AHC_DEV_PERIODIC_OTAG = 0x40, /* Send OTAG to prevent starvation */ 256 } ahc_linux_dev_flags; 257 258 struct ahc_linux_device { 259 /* 260 * The number of transactions currently 261 * queued to the device. 262 */ 263 int active; 264 265 /* 266 * The currently allowed number of 267 * transactions that can be queued to 268 * the device. Must be signed for 269 * conversion from tagged to untagged 270 * mode where the device may have more 271 * than one outstanding active transaction. 272 */ 273 int openings; 274 275 /* 276 * A positive count indicates that this 277 * device's queue is halted. 278 */ 279 u_int qfrozen; 280 281 /* 282 * Cumulative command counter. 283 */ 284 u_long commands_issued; 285 286 /* 287 * The number of tagged transactions when 288 * running at our current opening level 289 * that have been successfully received by 290 * this device since the last QUEUE FULL. 291 */ 292 u_int tag_success_count; 293 #define AHC_TAG_SUCCESS_INTERVAL 50 294 295 ahc_linux_dev_flags flags; 296 297 /* 298 * The high limit for the tags variable. 299 */ 300 u_int maxtags; 301 302 /* 303 * The computed number of tags outstanding 304 * at the time of the last QUEUE FULL event. 305 */ 306 u_int tags_on_last_queuefull; 307 308 /* 309 * How many times we have seen a queue full 310 * with the same number of tags. This is used 311 * to stop our adaptive queue depth algorithm 312 * on devices with a fixed number of tags. 313 */ 314 u_int last_queuefull_same_count; 315 #define AHC_LOCK_TAGS_COUNT 50 316 317 /* 318 * How many transactions have been queued 319 * without the device going idle. We use 320 * this statistic to determine when to issue 321 * an ordered tag to prevent transaction 322 * starvation. This statistic is only updated 323 * if the AHC_DEV_PERIODIC_OTAG flag is set 324 * on this device. 325 */ 326 u_int commands_since_idle_or_otag; 327 #define AHC_OTAG_THRESH 500 328 }; 329 330 /********************* Definitions Required by the Core ***********************/ 331 /* 332 * Number of SG segments we require. So long as the S/G segments for 333 * a particular transaction are allocated in a physically contiguous 334 * manner and are allocated below 4GB, the number of S/G segments is 335 * unrestricted. 336 */ 337 #define AHC_NSEG 128 338 339 /* 340 * Per-SCB OSM storage. 341 */ 342 struct scb_platform_data { 343 struct ahc_linux_device *dev; 344 dma_addr_t buf_busaddr; 345 uint32_t xfer_len; 346 uint32_t sense_resid; /* Auto-Sense residual */ 347 }; 348 349 /* 350 * Define a structure used for each host adapter. All members are 351 * aligned on a boundary >= the size of the member to honor the 352 * alignment restrictions of the various platforms supported by 353 * this driver. 354 */ 355 struct ahc_platform_data { 356 /* 357 * Fields accessed from interrupt context. 358 */ 359 struct scsi_target *starget[AHC_NUM_TARGETS]; 360 361 spinlock_t spin_lock; 362 u_int qfrozen; 363 struct completion *eh_done; 364 struct Scsi_Host *host; /* pointer to scsi host */ 365 #define AHC_LINUX_NOIRQ ((uint32_t)~0) 366 uint32_t irq; /* IRQ for this adapter */ 367 uint32_t bios_address; 368 uint32_t mem_busaddr; /* Mem Base Addr */ 369 }; 370 371 /************************** OS Utility Wrappers *******************************/ 372 #define printf printk 373 #define M_NOWAIT GFP_ATOMIC 374 #define M_WAITOK 0 375 #define malloc(size, type, flags) kmalloc(size, flags) 376 #define free(ptr, type) kfree(ptr) 377 378 static __inline void ahc_delay(long); 379 static __inline void 380 ahc_delay(long usec) 381 { 382 /* 383 * udelay on Linux can have problems for 384 * multi-millisecond waits. Wait at most 385 * 1024us per call. 386 */ 387 while (usec > 0) { 388 udelay(usec % 1024); 389 usec -= 1024; 390 } 391 } 392 393 394 /***************************** Low Level I/O **********************************/ 395 static __inline uint8_t ahc_inb(struct ahc_softc * ahc, long port); 396 static __inline void ahc_outb(struct ahc_softc * ahc, long port, uint8_t val); 397 static __inline void ahc_outsb(struct ahc_softc * ahc, long port, 398 uint8_t *, int count); 399 static __inline void ahc_insb(struct ahc_softc * ahc, long port, 400 uint8_t *, int count); 401 402 static __inline uint8_t 403 ahc_inb(struct ahc_softc * ahc, long port) 404 { 405 uint8_t x; 406 407 if (ahc->tag == BUS_SPACE_MEMIO) { 408 x = readb(ahc->bsh.maddr + port); 409 } else { 410 x = inb(ahc->bsh.ioport + port); 411 } 412 mb(); 413 return (x); 414 } 415 416 static __inline void 417 ahc_outb(struct ahc_softc * ahc, long port, uint8_t val) 418 { 419 if (ahc->tag == BUS_SPACE_MEMIO) { 420 writeb(val, ahc->bsh.maddr + port); 421 } else { 422 outb(val, ahc->bsh.ioport + port); 423 } 424 mb(); 425 } 426 427 static __inline void 428 ahc_outsb(struct ahc_softc * ahc, long port, uint8_t *array, int count) 429 { 430 int i; 431 432 /* 433 * There is probably a more efficient way to do this on Linux 434 * but we don't use this for anything speed critical and this 435 * should work. 436 */ 437 for (i = 0; i < count; i++) 438 ahc_outb(ahc, port, *array++); 439 } 440 441 static __inline void 442 ahc_insb(struct ahc_softc * ahc, long port, uint8_t *array, int count) 443 { 444 int i; 445 446 /* 447 * There is probably a more efficient way to do this on Linux 448 * but we don't use this for anything speed critical and this 449 * should work. 450 */ 451 for (i = 0; i < count; i++) 452 *array++ = ahc_inb(ahc, port); 453 } 454 455 /**************************** Initialization **********************************/ 456 int ahc_linux_register_host(struct ahc_softc *, 457 struct scsi_host_template *); 458 459 /*************************** Pretty Printing **********************************/ 460 struct info_str { 461 char *buffer; 462 int length; 463 off_t offset; 464 int pos; 465 }; 466 467 void ahc_format_transinfo(struct info_str *info, 468 struct ahc_transinfo *tinfo); 469 470 /******************************** Locking *************************************/ 471 /* Lock protecting internal data structures */ 472 473 static __inline void 474 ahc_lockinit(struct ahc_softc *ahc) 475 { 476 spin_lock_init(&ahc->platform_data->spin_lock); 477 } 478 479 static __inline void 480 ahc_lock(struct ahc_softc *ahc, unsigned long *flags) 481 { 482 spin_lock_irqsave(&ahc->platform_data->spin_lock, *flags); 483 } 484 485 static __inline void 486 ahc_unlock(struct ahc_softc *ahc, unsigned long *flags) 487 { 488 spin_unlock_irqrestore(&ahc->platform_data->spin_lock, *flags); 489 } 490 491 /******************************* PCI Definitions ******************************/ 492 /* 493 * PCIM_xxx: mask to locate subfield in register 494 * PCIR_xxx: config register offset 495 * PCIC_xxx: device class 496 * PCIS_xxx: device subclass 497 * PCIP_xxx: device programming interface 498 * PCIV_xxx: PCI vendor ID (only required to fixup ancient devices) 499 * PCID_xxx: device ID 500 */ 501 #define PCIR_DEVVENDOR 0x00 502 #define PCIR_VENDOR 0x00 503 #define PCIR_DEVICE 0x02 504 #define PCIR_COMMAND 0x04 505 #define PCIM_CMD_PORTEN 0x0001 506 #define PCIM_CMD_MEMEN 0x0002 507 #define PCIM_CMD_BUSMASTEREN 0x0004 508 #define PCIM_CMD_MWRICEN 0x0010 509 #define PCIM_CMD_PERRESPEN 0x0040 510 #define PCIM_CMD_SERRESPEN 0x0100 511 #define PCIR_STATUS 0x06 512 #define PCIR_REVID 0x08 513 #define PCIR_PROGIF 0x09 514 #define PCIR_SUBCLASS 0x0a 515 #define PCIR_CLASS 0x0b 516 #define PCIR_CACHELNSZ 0x0c 517 #define PCIR_LATTIMER 0x0d 518 #define PCIR_HEADERTYPE 0x0e 519 #define PCIM_MFDEV 0x80 520 #define PCIR_BIST 0x0f 521 #define PCIR_CAP_PTR 0x34 522 523 /* config registers for header type 0 devices */ 524 #define PCIR_MAPS 0x10 525 #define PCIR_SUBVEND_0 0x2c 526 #define PCIR_SUBDEV_0 0x2e 527 528 typedef enum 529 { 530 AHC_POWER_STATE_D0, 531 AHC_POWER_STATE_D1, 532 AHC_POWER_STATE_D2, 533 AHC_POWER_STATE_D3 534 } ahc_power_state; 535 536 /**************************** VL/EISA Routines ********************************/ 537 #ifdef CONFIG_EISA 538 int ahc_linux_eisa_init(void); 539 void ahc_linux_eisa_exit(void); 540 int aic7770_map_registers(struct ahc_softc *ahc, 541 u_int port); 542 int aic7770_map_int(struct ahc_softc *ahc, u_int irq); 543 #else 544 static inline int ahc_linux_eisa_init(void) { 545 return -ENODEV; 546 } 547 static inline void ahc_linux_eisa_exit(void) { 548 } 549 #endif 550 551 /******************************* PCI Routines *********************************/ 552 #ifdef CONFIG_PCI 553 int ahc_linux_pci_init(void); 554 void ahc_linux_pci_exit(void); 555 int ahc_pci_map_registers(struct ahc_softc *ahc); 556 int ahc_pci_map_int(struct ahc_softc *ahc); 557 558 static __inline uint32_t ahc_pci_read_config(ahc_dev_softc_t pci, 559 int reg, int width); 560 561 static __inline uint32_t 562 ahc_pci_read_config(ahc_dev_softc_t pci, int reg, int width) 563 { 564 switch (width) { 565 case 1: 566 { 567 uint8_t retval; 568 569 pci_read_config_byte(pci, reg, &retval); 570 return (retval); 571 } 572 case 2: 573 { 574 uint16_t retval; 575 pci_read_config_word(pci, reg, &retval); 576 return (retval); 577 } 578 case 4: 579 { 580 uint32_t retval; 581 pci_read_config_dword(pci, reg, &retval); 582 return (retval); 583 } 584 default: 585 panic("ahc_pci_read_config: Read size too big"); 586 /* NOTREACHED */ 587 return (0); 588 } 589 } 590 591 static __inline void ahc_pci_write_config(ahc_dev_softc_t pci, 592 int reg, uint32_t value, 593 int width); 594 595 static __inline void 596 ahc_pci_write_config(ahc_dev_softc_t pci, int reg, uint32_t value, int width) 597 { 598 switch (width) { 599 case 1: 600 pci_write_config_byte(pci, reg, value); 601 break; 602 case 2: 603 pci_write_config_word(pci, reg, value); 604 break; 605 case 4: 606 pci_write_config_dword(pci, reg, value); 607 break; 608 default: 609 panic("ahc_pci_write_config: Write size too big"); 610 /* NOTREACHED */ 611 } 612 } 613 614 static __inline int ahc_get_pci_function(ahc_dev_softc_t); 615 static __inline int 616 ahc_get_pci_function(ahc_dev_softc_t pci) 617 { 618 return (PCI_FUNC(pci->devfn)); 619 } 620 621 static __inline int ahc_get_pci_slot(ahc_dev_softc_t); 622 static __inline int 623 ahc_get_pci_slot(ahc_dev_softc_t pci) 624 { 625 return (PCI_SLOT(pci->devfn)); 626 } 627 628 static __inline int ahc_get_pci_bus(ahc_dev_softc_t); 629 static __inline int 630 ahc_get_pci_bus(ahc_dev_softc_t pci) 631 { 632 return (pci->bus->number); 633 } 634 #else 635 static inline int ahc_linux_pci_init(void) { 636 return 0; 637 } 638 static inline void ahc_linux_pci_exit(void) { 639 } 640 #endif 641 642 static __inline void ahc_flush_device_writes(struct ahc_softc *); 643 static __inline void 644 ahc_flush_device_writes(struct ahc_softc *ahc) 645 { 646 /* XXX Is this sufficient for all architectures??? */ 647 ahc_inb(ahc, INTSTAT); 648 } 649 650 /**************************** Proc FS Support *********************************/ 651 int ahc_linux_proc_info(struct Scsi_Host *, char *, char **, 652 off_t, int, int); 653 654 /*************************** Domain Validation ********************************/ 655 /*********************** Transaction Access Wrappers *************************/ 656 static __inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t); 657 static __inline void ahc_set_transaction_status(struct scb *, uint32_t); 658 static __inline void ahc_cmd_set_scsi_status(struct scsi_cmnd *, uint32_t); 659 static __inline void ahc_set_scsi_status(struct scb *, uint32_t); 660 static __inline uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd); 661 static __inline uint32_t ahc_get_transaction_status(struct scb *); 662 static __inline uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd); 663 static __inline uint32_t ahc_get_scsi_status(struct scb *); 664 static __inline void ahc_set_transaction_tag(struct scb *, int, u_int); 665 static __inline u_long ahc_get_transfer_length(struct scb *); 666 static __inline int ahc_get_transfer_dir(struct scb *); 667 static __inline void ahc_set_residual(struct scb *, u_long); 668 static __inline void ahc_set_sense_residual(struct scb *scb, u_long resid); 669 static __inline u_long ahc_get_residual(struct scb *); 670 static __inline u_long ahc_get_sense_residual(struct scb *); 671 static __inline int ahc_perform_autosense(struct scb *); 672 static __inline uint32_t ahc_get_sense_bufsize(struct ahc_softc *, 673 struct scb *); 674 static __inline void ahc_notify_xfer_settings_change(struct ahc_softc *, 675 struct ahc_devinfo *); 676 static __inline void ahc_platform_scb_free(struct ahc_softc *ahc, 677 struct scb *scb); 678 static __inline void ahc_freeze_scb(struct scb *scb); 679 680 static __inline 681 void ahc_cmd_set_transaction_status(struct scsi_cmnd *cmd, uint32_t status) 682 { 683 cmd->result &= ~(CAM_STATUS_MASK << 16); 684 cmd->result |= status << 16; 685 } 686 687 static __inline 688 void ahc_set_transaction_status(struct scb *scb, uint32_t status) 689 { 690 ahc_cmd_set_transaction_status(scb->io_ctx,status); 691 } 692 693 static __inline 694 void ahc_cmd_set_scsi_status(struct scsi_cmnd *cmd, uint32_t status) 695 { 696 cmd->result &= ~0xFFFF; 697 cmd->result |= status; 698 } 699 700 static __inline 701 void ahc_set_scsi_status(struct scb *scb, uint32_t status) 702 { 703 ahc_cmd_set_scsi_status(scb->io_ctx, status); 704 } 705 706 static __inline 707 uint32_t ahc_cmd_get_transaction_status(struct scsi_cmnd *cmd) 708 { 709 return ((cmd->result >> 16) & CAM_STATUS_MASK); 710 } 711 712 static __inline 713 uint32_t ahc_get_transaction_status(struct scb *scb) 714 { 715 return (ahc_cmd_get_transaction_status(scb->io_ctx)); 716 } 717 718 static __inline 719 uint32_t ahc_cmd_get_scsi_status(struct scsi_cmnd *cmd) 720 { 721 return (cmd->result & 0xFFFF); 722 } 723 724 static __inline 725 uint32_t ahc_get_scsi_status(struct scb *scb) 726 { 727 return (ahc_cmd_get_scsi_status(scb->io_ctx)); 728 } 729 730 static __inline 731 void ahc_set_transaction_tag(struct scb *scb, int enabled, u_int type) 732 { 733 /* 734 * Nothing to do for linux as the incoming transaction 735 * has no concept of tag/non tagged, etc. 736 */ 737 } 738 739 static __inline 740 u_long ahc_get_transfer_length(struct scb *scb) 741 { 742 return (scb->platform_data->xfer_len); 743 } 744 745 static __inline 746 int ahc_get_transfer_dir(struct scb *scb) 747 { 748 return (scb->io_ctx->sc_data_direction); 749 } 750 751 static __inline 752 void ahc_set_residual(struct scb *scb, u_long resid) 753 { 754 scb->io_ctx->resid = resid; 755 } 756 757 static __inline 758 void ahc_set_sense_residual(struct scb *scb, u_long resid) 759 { 760 scb->platform_data->sense_resid = resid; 761 } 762 763 static __inline 764 u_long ahc_get_residual(struct scb *scb) 765 { 766 return (scb->io_ctx->resid); 767 } 768 769 static __inline 770 u_long ahc_get_sense_residual(struct scb *scb) 771 { 772 return (scb->platform_data->sense_resid); 773 } 774 775 static __inline 776 int ahc_perform_autosense(struct scb *scb) 777 { 778 /* 779 * We always perform autosense in Linux. 780 * On other platforms this is set on a 781 * per-transaction basis. 782 */ 783 return (1); 784 } 785 786 static __inline uint32_t 787 ahc_get_sense_bufsize(struct ahc_softc *ahc, struct scb *scb) 788 { 789 return (sizeof(struct scsi_sense_data)); 790 } 791 792 static __inline void 793 ahc_notify_xfer_settings_change(struct ahc_softc *ahc, 794 struct ahc_devinfo *devinfo) 795 { 796 /* Nothing to do here for linux */ 797 } 798 799 static __inline void 800 ahc_platform_scb_free(struct ahc_softc *ahc, struct scb *scb) 801 { 802 } 803 804 int ahc_platform_alloc(struct ahc_softc *ahc, void *platform_arg); 805 void ahc_platform_free(struct ahc_softc *ahc); 806 void ahc_platform_freeze_devq(struct ahc_softc *ahc, struct scb *scb); 807 808 static __inline void 809 ahc_freeze_scb(struct scb *scb) 810 { 811 if ((scb->io_ctx->result & (CAM_DEV_QFRZN << 16)) == 0) { 812 scb->io_ctx->result |= CAM_DEV_QFRZN << 16; 813 scb->platform_data->dev->qfrozen++; 814 } 815 } 816 817 void ahc_platform_set_tags(struct ahc_softc *ahc, struct scsi_device *sdev, 818 struct ahc_devinfo *devinfo, ahc_queue_alg); 819 int ahc_platform_abort_scbs(struct ahc_softc *ahc, int target, 820 char channel, int lun, u_int tag, 821 role_t role, uint32_t status); 822 irqreturn_t 823 ahc_linux_isr(int irq, void *dev_id); 824 void ahc_platform_flushwork(struct ahc_softc *ahc); 825 void ahc_done(struct ahc_softc*, struct scb*); 826 void ahc_send_async(struct ahc_softc *, char channel, 827 u_int target, u_int lun, ac_code); 828 void ahc_print_path(struct ahc_softc *, struct scb *); 829 void ahc_platform_dump_card_state(struct ahc_softc *ahc); 830 831 #ifdef CONFIG_PCI 832 #define AHC_PCI_CONFIG 1 833 #else 834 #define AHC_PCI_CONFIG 0 835 #endif 836 #define bootverbose aic7xxx_verbose 837 extern u_int aic7xxx_verbose; 838 #endif /* _AIC7XXX_LINUX_H_ */ 839