1 /* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Module Name: 27 * src.c 28 * 29 * Abstract: Hardware Device Interface for PMC SRC based controllers 30 * 31 */ 32 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/types.h> 36 #include <linux/pci.h> 37 #include <linux/spinlock.h> 38 #include <linux/slab.h> 39 #include <linux/blkdev.h> 40 #include <linux/delay.h> 41 #include <linux/completion.h> 42 #include <linux/time.h> 43 #include <linux/interrupt.h> 44 #include <scsi/scsi_host.h> 45 46 #include "aacraid.h" 47 48 static int aac_src_get_sync_status(struct aac_dev *dev); 49 50 static irqreturn_t aac_src_intr_message(int irq, void *dev_id) 51 { 52 struct aac_msix_ctx *ctx; 53 struct aac_dev *dev; 54 unsigned long bellbits, bellbits_shifted; 55 int vector_no; 56 int isFastResponse, mode; 57 u32 index, handle; 58 59 ctx = (struct aac_msix_ctx *)dev_id; 60 dev = ctx->dev; 61 vector_no = ctx->vector_no; 62 63 if (dev->msi_enabled) { 64 mode = AAC_INT_MODE_MSI; 65 if (vector_no == 0) { 66 bellbits = src_readl(dev, MUnit.ODR_MSI); 67 if (bellbits & 0x40000) 68 mode |= AAC_INT_MODE_AIF; 69 if (bellbits & 0x1000) 70 mode |= AAC_INT_MODE_SYNC; 71 } 72 } else { 73 mode = AAC_INT_MODE_INTX; 74 bellbits = src_readl(dev, MUnit.ODR_R); 75 if (bellbits & PmDoorBellResponseSent) { 76 bellbits = PmDoorBellResponseSent; 77 src_writel(dev, MUnit.ODR_C, bellbits); 78 src_readl(dev, MUnit.ODR_C); 79 } else { 80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); 81 src_writel(dev, MUnit.ODR_C, bellbits); 82 src_readl(dev, MUnit.ODR_C); 83 84 if (bellbits_shifted & DoorBellAifPending) 85 mode |= AAC_INT_MODE_AIF; 86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0) 87 mode |= AAC_INT_MODE_SYNC; 88 } 89 } 90 91 if (mode & AAC_INT_MODE_SYNC) { 92 unsigned long sflags; 93 struct list_head *entry; 94 int send_it = 0; 95 extern int aac_sync_mode; 96 97 if (!aac_sync_mode && !dev->msi_enabled) { 98 src_writel(dev, MUnit.ODR_C, bellbits); 99 src_readl(dev, MUnit.ODR_C); 100 } 101 102 if (dev->sync_fib) { 103 if (dev->sync_fib->callback) 104 dev->sync_fib->callback(dev->sync_fib->callback_data, 105 dev->sync_fib); 106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); 107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { 108 dev->management_fib_count--; 109 up(&dev->sync_fib->event_wait); 110 } 111 spin_unlock_irqrestore(&dev->sync_fib->event_lock, 112 sflags); 113 spin_lock_irqsave(&dev->sync_lock, sflags); 114 if (!list_empty(&dev->sync_fib_list)) { 115 entry = dev->sync_fib_list.next; 116 dev->sync_fib = list_entry(entry, 117 struct fib, 118 fiblink); 119 list_del(entry); 120 send_it = 1; 121 } else { 122 dev->sync_fib = NULL; 123 } 124 spin_unlock_irqrestore(&dev->sync_lock, sflags); 125 if (send_it) { 126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, 127 (u32)dev->sync_fib->hw_fib_pa, 128 0, 0, 0, 0, 0, 129 NULL, NULL, NULL, NULL, NULL); 130 } 131 } 132 if (!dev->msi_enabled) 133 mode = 0; 134 135 } 136 137 if (mode & AAC_INT_MODE_AIF) { 138 /* handle AIF */ 139 if (dev->sa_firmware) { 140 u32 events = src_readl(dev, MUnit.SCR0); 141 142 aac_intr_normal(dev, events, 1, 0, NULL); 143 writel(events, &dev->IndexRegs->Mailbox[0]); 144 src_writel(dev, MUnit.IDR, 1 << 23); 145 } else { 146 if (dev->aif_thread && dev->fsa_dev) 147 aac_intr_normal(dev, 0, 2, 0, NULL); 148 } 149 if (dev->msi_enabled) 150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT); 151 mode = 0; 152 } 153 154 if (mode) { 155 index = dev->host_rrq_idx[vector_no]; 156 157 for (;;) { 158 isFastResponse = 0; 159 /* remove toggle bit (31) */ 160 handle = le32_to_cpu((dev->host_rrq[index]) 161 & 0x7fffffff); 162 /* check fast response bits (30, 1) */ 163 if (handle & 0x40000000) 164 isFastResponse = 1; 165 handle &= 0x0000ffff; 166 if (handle == 0) 167 break; 168 handle >>= 2; 169 if (dev->msi_enabled && dev->max_msix > 1) 170 atomic_dec(&dev->rrq_outstanding[vector_no]); 171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL); 172 dev->host_rrq[index++] = 0; 173 if (index == (vector_no + 1) * dev->vector_cap) 174 index = vector_no * dev->vector_cap; 175 dev->host_rrq_idx[vector_no] = index; 176 } 177 mode = 0; 178 } 179 180 return IRQ_HANDLED; 181 } 182 183 /** 184 * aac_src_disable_interrupt - Disable interrupts 185 * @dev: Adapter 186 */ 187 188 static void aac_src_disable_interrupt(struct aac_dev *dev) 189 { 190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 191 } 192 193 /** 194 * aac_src_enable_interrupt_message - Enable interrupts 195 * @dev: Adapter 196 */ 197 198 static void aac_src_enable_interrupt_message(struct aac_dev *dev) 199 { 200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT); 201 } 202 203 /** 204 * src_sync_cmd - send a command and wait 205 * @dev: Adapter 206 * @command: Command to execute 207 * @p1: first parameter 208 * @ret: adapter status 209 * 210 * This routine will send a synchronous command to the adapter and wait 211 * for its completion. 212 */ 213 214 static int src_sync_cmd(struct aac_dev *dev, u32 command, 215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, 216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) 217 { 218 unsigned long start; 219 unsigned long delay; 220 int ok; 221 222 /* 223 * Write the command into Mailbox 0 224 */ 225 writel(command, &dev->IndexRegs->Mailbox[0]); 226 /* 227 * Write the parameters into Mailboxes 1 - 6 228 */ 229 writel(p1, &dev->IndexRegs->Mailbox[1]); 230 writel(p2, &dev->IndexRegs->Mailbox[2]); 231 writel(p3, &dev->IndexRegs->Mailbox[3]); 232 writel(p4, &dev->IndexRegs->Mailbox[4]); 233 234 /* 235 * Clear the synch command doorbell to start on a clean slate. 236 */ 237 if (!dev->msi_enabled) 238 src_writel(dev, 239 MUnit.ODR_C, 240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 241 242 /* 243 * Disable doorbell interrupts 244 */ 245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 246 247 /* 248 * Force the completion of the mask register write before issuing 249 * the interrupt. 250 */ 251 src_readl(dev, MUnit.OIMR); 252 253 /* 254 * Signal that there is a new synch command 255 */ 256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); 257 258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) { 259 ok = 0; 260 start = jiffies; 261 262 if (command == IOP_RESET_ALWAYS) { 263 /* Wait up to 10 sec */ 264 delay = 10*HZ; 265 } else { 266 /* Wait up to 5 minutes */ 267 delay = 300*HZ; 268 } 269 while (time_before(jiffies, start+delay)) { 270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ 271 /* 272 * Mon960 will set doorbell0 bit when it has completed the command. 273 */ 274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) { 275 /* 276 * Clear the doorbell. 277 */ 278 if (dev->msi_enabled) 279 aac_src_access_devreg(dev, 280 AAC_CLEAR_SYNC_BIT); 281 else 282 src_writel(dev, 283 MUnit.ODR_C, 284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 285 ok = 1; 286 break; 287 } 288 /* 289 * Yield the processor in case we are slow 290 */ 291 msleep(1); 292 } 293 if (unlikely(ok != 1)) { 294 /* 295 * Restore interrupt mask even though we timed out 296 */ 297 aac_adapter_enable_int(dev); 298 return -ETIMEDOUT; 299 } 300 /* 301 * Pull the synch status from Mailbox 0. 302 */ 303 if (status) 304 *status = readl(&dev->IndexRegs->Mailbox[0]); 305 if (r1) 306 *r1 = readl(&dev->IndexRegs->Mailbox[1]); 307 if (r2) 308 *r2 = readl(&dev->IndexRegs->Mailbox[2]); 309 if (r3) 310 *r3 = readl(&dev->IndexRegs->Mailbox[3]); 311 if (r4) 312 *r4 = readl(&dev->IndexRegs->Mailbox[4]); 313 if (command == GET_COMM_PREFERRED_SETTINGS) 314 dev->max_msix = 315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF; 316 /* 317 * Clear the synch command doorbell. 318 */ 319 if (!dev->msi_enabled) 320 src_writel(dev, 321 MUnit.ODR_C, 322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 323 } 324 325 /* 326 * Restore interrupt mask 327 */ 328 aac_adapter_enable_int(dev); 329 return 0; 330 } 331 332 /** 333 * aac_src_interrupt_adapter - interrupt adapter 334 * @dev: Adapter 335 * 336 * Send an interrupt to the i960 and breakpoint it. 337 */ 338 339 static void aac_src_interrupt_adapter(struct aac_dev *dev) 340 { 341 src_sync_cmd(dev, BREAKPOINT_REQUEST, 342 0, 0, 0, 0, 0, 0, 343 NULL, NULL, NULL, NULL, NULL); 344 } 345 346 /** 347 * aac_src_notify_adapter - send an event to the adapter 348 * @dev: Adapter 349 * @event: Event to send 350 * 351 * Notify the i960 that something it probably cares about has 352 * happened. 353 */ 354 355 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event) 356 { 357 switch (event) { 358 359 case AdapNormCmdQue: 360 src_writel(dev, MUnit.ODR_C, 361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT); 362 break; 363 case HostNormRespNotFull: 364 src_writel(dev, MUnit.ODR_C, 365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT); 366 break; 367 case AdapNormRespQue: 368 src_writel(dev, MUnit.ODR_C, 369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT); 370 break; 371 case HostNormCmdNotFull: 372 src_writel(dev, MUnit.ODR_C, 373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT); 374 break; 375 case FastIo: 376 src_writel(dev, MUnit.ODR_C, 377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT); 378 break; 379 case AdapPrintfDone: 380 src_writel(dev, MUnit.ODR_C, 381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT); 382 break; 383 default: 384 BUG(); 385 break; 386 } 387 } 388 389 /** 390 * aac_src_start_adapter - activate adapter 391 * @dev: Adapter 392 * 393 * Start up processing on an i960 based AAC adapter 394 */ 395 396 static void aac_src_start_adapter(struct aac_dev *dev) 397 { 398 union aac_init *init; 399 int i; 400 401 /* reset host_rrq_idx first */ 402 for (i = 0; i < dev->max_msix; i++) { 403 dev->host_rrq_idx[i] = i * dev->vector_cap; 404 atomic_set(&dev->rrq_outstanding[i], 0); 405 } 406 atomic_set(&dev->msix_counter, 0); 407 dev->fibs_pushed_no = 0; 408 409 init = dev->init; 410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds()); 412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 413 lower_32_bits(dev->init_pa), 414 upper_32_bits(dev->init_pa), 415 sizeof(struct _r8) + 416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq), 417 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 418 } else { 419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds()); 420 // We can only use a 32 bit address here 421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0, 423 NULL, NULL, NULL, NULL, NULL); 424 } 425 426 } 427 428 /** 429 * aac_src_check_health 430 * @dev: device to check if healthy 431 * 432 * Will attempt to determine if the specified adapter is alive and 433 * capable of handling requests, returning 0 if alive. 434 */ 435 static int aac_src_check_health(struct aac_dev *dev) 436 { 437 u32 status = src_readl(dev, MUnit.OMR); 438 439 /* 440 * Check to see if the board panic'd. 441 */ 442 if (unlikely(status & KERNEL_PANIC)) 443 goto err_blink; 444 445 /* 446 * Check to see if the board failed any self tests. 447 */ 448 if (unlikely(status & SELF_TEST_FAILED)) 449 goto err_out; 450 451 /* 452 * Check to see if the board failed any self tests. 453 */ 454 if (unlikely(status & MONITOR_PANIC)) 455 goto err_out; 456 457 /* 458 * Wait for the adapter to be up and running. 459 */ 460 if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) 461 return -3; 462 /* 463 * Everything is OK 464 */ 465 return 0; 466 467 err_out: 468 return -1; 469 470 err_blink: 471 return (status >> 16) & 0xFF; 472 } 473 474 static inline u32 aac_get_vector(struct aac_dev *dev) 475 { 476 return atomic_inc_return(&dev->msix_counter)%dev->max_msix; 477 } 478 479 /** 480 * aac_src_deliver_message 481 * @fib: fib to issue 482 * 483 * Will send a fib, returning 0 if successful. 484 */ 485 static int aac_src_deliver_message(struct fib *fib) 486 { 487 struct aac_dev *dev = fib->dev; 488 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 489 u32 fibsize; 490 dma_addr_t address; 491 struct aac_fib_xporthdr *pFibX; 492 int native_hba; 493 #if !defined(writeq) 494 unsigned long flags; 495 #endif 496 497 u16 vector_no; 498 499 atomic_inc(&q->numpending); 500 501 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0; 502 503 504 if (dev->msi_enabled && dev->max_msix > 1 && 505 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) { 506 507 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) 508 && dev->sa_firmware) 509 vector_no = aac_get_vector(dev); 510 else 511 vector_no = fib->vector_no; 512 513 if (native_hba) { 514 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) { 515 struct aac_hba_tm_req *tm_req; 516 517 tm_req = (struct aac_hba_tm_req *) 518 fib->hw_fib_va; 519 if (tm_req->iu_type == 520 HBA_IU_TYPE_SCSI_TM_REQ) { 521 ((struct aac_hba_tm_req *) 522 fib->hw_fib_va)->reply_qid 523 = vector_no; 524 ((struct aac_hba_tm_req *) 525 fib->hw_fib_va)->request_id 526 += (vector_no << 16); 527 } else { 528 ((struct aac_hba_reset_req *) 529 fib->hw_fib_va)->reply_qid 530 = vector_no; 531 ((struct aac_hba_reset_req *) 532 fib->hw_fib_va)->request_id 533 += (vector_no << 16); 534 } 535 } else { 536 ((struct aac_hba_cmd_req *) 537 fib->hw_fib_va)->reply_qid 538 = vector_no; 539 ((struct aac_hba_cmd_req *) 540 fib->hw_fib_va)->request_id 541 += (vector_no << 16); 542 } 543 } else { 544 fib->hw_fib_va->header.Handle += (vector_no << 16); 545 } 546 } else { 547 vector_no = 0; 548 } 549 550 atomic_inc(&dev->rrq_outstanding[vector_no]); 551 552 if (native_hba) { 553 address = fib->hw_fib_pa; 554 fibsize = (fib->hbacmd_size + 127) / 128 - 1; 555 if (fibsize > 31) 556 fibsize = 31; 557 address |= fibsize; 558 #if defined(writeq) 559 src_writeq(dev, MUnit.IQN_L, (u64)address); 560 #else 561 spin_lock_irqsave(&fib->dev->iq_lock, flags); 562 src_writel(dev, MUnit.IQN_H, 563 upper_32_bits(address) & 0xffffffff); 564 src_writel(dev, MUnit.IQN_L, address & 0xffffffff); 565 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 566 #endif 567 } else { 568 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || 569 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 570 /* Calculate the amount to the fibsize bits */ 571 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size) 572 + 127) / 128 - 1; 573 /* New FIB header, 32-bit */ 574 address = fib->hw_fib_pa; 575 fib->hw_fib_va->header.StructType = FIB_MAGIC2; 576 fib->hw_fib_va->header.SenderFibAddress = 577 cpu_to_le32((u32)address); 578 fib->hw_fib_va->header.u.TimeStamp = 0; 579 WARN_ON(upper_32_bits(address) != 0L); 580 } else { 581 /* Calculate the amount to the fibsize bits */ 582 fibsize = (sizeof(struct aac_fib_xporthdr) + 583 le16_to_cpu(fib->hw_fib_va->header.Size) 584 + 127) / 128 - 1; 585 /* Fill XPORT header */ 586 pFibX = (struct aac_fib_xporthdr *) 587 ((unsigned char *)fib->hw_fib_va - 588 sizeof(struct aac_fib_xporthdr)); 589 pFibX->Handle = fib->hw_fib_va->header.Handle; 590 pFibX->HostAddress = 591 cpu_to_le64((u64)fib->hw_fib_pa); 592 pFibX->Size = cpu_to_le32( 593 le16_to_cpu(fib->hw_fib_va->header.Size)); 594 address = fib->hw_fib_pa - 595 (u64)sizeof(struct aac_fib_xporthdr); 596 } 597 if (fibsize > 31) 598 fibsize = 31; 599 address |= fibsize; 600 601 #if defined(writeq) 602 src_writeq(dev, MUnit.IQ_L, (u64)address); 603 #else 604 spin_lock_irqsave(&fib->dev->iq_lock, flags); 605 src_writel(dev, MUnit.IQ_H, 606 upper_32_bits(address) & 0xffffffff); 607 src_writel(dev, MUnit.IQ_L, address & 0xffffffff); 608 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 609 #endif 610 } 611 return 0; 612 } 613 614 /** 615 * aac_src_ioremap 616 * @size: mapping resize request 617 * 618 */ 619 static int aac_src_ioremap(struct aac_dev *dev, u32 size) 620 { 621 if (!size) { 622 iounmap(dev->regs.src.bar1); 623 dev->regs.src.bar1 = NULL; 624 iounmap(dev->regs.src.bar0); 625 dev->base = dev->regs.src.bar0 = NULL; 626 return 0; 627 } 628 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), 629 AAC_MIN_SRC_BAR1_SIZE); 630 dev->base = NULL; 631 if (dev->regs.src.bar1 == NULL) 632 return -1; 633 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 634 if (dev->base == NULL) { 635 iounmap(dev->regs.src.bar1); 636 dev->regs.src.bar1 = NULL; 637 return -1; 638 } 639 dev->IndexRegs = &((struct src_registers __iomem *) 640 dev->base)->u.tupelo.IndexRegs; 641 return 0; 642 } 643 644 /** 645 * aac_srcv_ioremap 646 * @size: mapping resize request 647 * 648 */ 649 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size) 650 { 651 if (!size) { 652 iounmap(dev->regs.src.bar0); 653 dev->base = dev->regs.src.bar0 = NULL; 654 return 0; 655 } 656 657 dev->regs.src.bar1 = 658 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE); 659 dev->base = NULL; 660 if (dev->regs.src.bar1 == NULL) 661 return -1; 662 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 663 if (dev->base == NULL) { 664 iounmap(dev->regs.src.bar1); 665 dev->regs.src.bar1 = NULL; 666 return -1; 667 } 668 dev->IndexRegs = &((struct src_registers __iomem *) 669 dev->base)->u.denali.IndexRegs; 670 return 0; 671 } 672 673 void aac_set_intx_mode(struct aac_dev *dev) 674 { 675 if (dev->msi_enabled) { 676 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 677 dev->msi_enabled = 0; 678 msleep(5000); /* Delay 5 seconds */ 679 } 680 } 681 682 static void aac_dump_fw_fib_iop_reset(struct aac_dev *dev) 683 { 684 __le32 supported_options3; 685 686 if (!aac_fib_dump) 687 return; 688 689 supported_options3 = dev->supplement_adapter_info.supported_options3; 690 if (!(supported_options3 & AAC_OPTION_SUPPORTED3_IOP_RESET_FIB_DUMP)) 691 return; 692 693 aac_adapter_sync_cmd(dev, IOP_RESET_FW_FIB_DUMP, 694 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 695 } 696 697 static bool aac_is_ctrl_up_and_running(struct aac_dev *dev) 698 { 699 bool ctrl_up = true; 700 unsigned long status, start; 701 bool is_up = false; 702 703 start = jiffies; 704 do { 705 schedule(); 706 status = src_readl(dev, MUnit.OMR); 707 708 if (status == 0xffffffff) 709 status = 0; 710 711 if (status & KERNEL_BOOTING) { 712 start = jiffies; 713 continue; 714 } 715 716 if (time_after(jiffies, start+HZ*SOFT_RESET_TIME)) { 717 ctrl_up = false; 718 break; 719 } 720 721 is_up = status & KERNEL_UP_AND_RUNNING; 722 723 } while (!is_up); 724 725 return ctrl_up; 726 } 727 728 static void aac_notify_fw_of_iop_reset(struct aac_dev *dev) 729 { 730 aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, 0, 0, 0, 0, 0, 0, NULL, 731 NULL, NULL, NULL, NULL); 732 } 733 734 static void aac_send_iop_reset(struct aac_dev *dev) 735 { 736 aac_dump_fw_fib_iop_reset(dev); 737 738 aac_notify_fw_of_iop_reset(dev); 739 740 aac_set_intx_mode(dev); 741 742 src_writel(dev, MUnit.IDR, IOP_SRC_RESET_MASK); 743 } 744 745 static void aac_send_hardware_soft_reset(struct aac_dev *dev) 746 { 747 u_int32_t val; 748 749 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET)); 750 val |= 0x01; 751 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET)); 752 msleep_interruptible(20000); 753 } 754 755 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type) 756 { 757 bool is_ctrl_up; 758 int ret = 0; 759 760 if (bled < 0) 761 goto invalid_out; 762 763 if (bled) 764 dev_err(&dev->pdev->dev, "adapter kernel panic'd %x.\n", bled); 765 766 /* 767 * When there is a BlinkLED, IOP_RESET has not effect 768 */ 769 if (bled >= 2 && dev->sa_firmware && reset_type & HW_IOP_RESET) 770 reset_type &= ~HW_IOP_RESET; 771 772 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 773 774 dev_err(&dev->pdev->dev, "Controller reset type is %d\n", reset_type); 775 776 if (reset_type & HW_IOP_RESET) { 777 dev_info(&dev->pdev->dev, "Issuing IOP reset\n"); 778 aac_send_iop_reset(dev); 779 780 /* 781 * Creates a delay or wait till up and running comes thru 782 */ 783 is_ctrl_up = aac_is_ctrl_up_and_running(dev); 784 if (!is_ctrl_up) 785 dev_err(&dev->pdev->dev, "IOP reset failed\n"); 786 else { 787 dev_info(&dev->pdev->dev, "IOP reset succeded\n"); 788 goto set_startup; 789 } 790 } 791 792 if (!dev->sa_firmware) { 793 dev_err(&dev->pdev->dev, "ARC Reset attempt failed\n"); 794 ret = -ENODEV; 795 goto out; 796 } 797 798 if (reset_type & HW_SOFT_RESET) { 799 dev_info(&dev->pdev->dev, "Issuing SOFT reset\n"); 800 aac_send_hardware_soft_reset(dev); 801 dev->msi_enabled = 0; 802 803 is_ctrl_up = aac_is_ctrl_up_and_running(dev); 804 if (!is_ctrl_up) { 805 dev_err(&dev->pdev->dev, "SOFT reset failed\n"); 806 ret = -ENODEV; 807 goto out; 808 } else 809 dev_info(&dev->pdev->dev, "SOFT reset succeded\n"); 810 } 811 812 set_startup: 813 if (startup_timeout < 300) 814 startup_timeout = 300; 815 816 out: 817 return ret; 818 819 invalid_out: 820 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) 821 ret = -ENODEV; 822 goto out; 823 } 824 825 /** 826 * aac_src_select_comm - Select communications method 827 * @dev: Adapter 828 * @comm: communications method 829 */ 830 static int aac_src_select_comm(struct aac_dev *dev, int comm) 831 { 832 switch (comm) { 833 case AAC_COMM_MESSAGE: 834 dev->a_ops.adapter_intr = aac_src_intr_message; 835 dev->a_ops.adapter_deliver = aac_src_deliver_message; 836 break; 837 default: 838 return 1; 839 } 840 return 0; 841 } 842 843 /** 844 * aac_src_init - initialize an Cardinal Frey Bar card 845 * @dev: device to configure 846 * 847 */ 848 849 int aac_src_init(struct aac_dev *dev) 850 { 851 unsigned long start; 852 unsigned long status; 853 int restart = 0; 854 int instance = dev->id; 855 const char *name = dev->name; 856 857 dev->a_ops.adapter_ioremap = aac_src_ioremap; 858 dev->a_ops.adapter_comm = aac_src_select_comm; 859 860 dev->base_size = AAC_MIN_SRC_BAR0_SIZE; 861 if (aac_adapter_ioremap(dev, dev->base_size)) { 862 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 863 goto error_iounmap; 864 } 865 866 /* Failure to reset here is an option ... */ 867 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 868 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 869 if ((aac_reset_devices || reset_devices) && 870 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 871 ++restart; 872 /* 873 * Check to see if the board panic'd while booting. 874 */ 875 status = src_readl(dev, MUnit.OMR); 876 if (status & KERNEL_PANIC) { 877 if (aac_src_restart_adapter(dev, 878 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 879 goto error_iounmap; 880 ++restart; 881 } 882 /* 883 * Check to see if the board failed any self tests. 884 */ 885 status = src_readl(dev, MUnit.OMR); 886 if (status & SELF_TEST_FAILED) { 887 printk(KERN_ERR "%s%d: adapter self-test failed.\n", 888 dev->name, instance); 889 goto error_iounmap; 890 } 891 /* 892 * Check to see if the monitor panic'd while booting. 893 */ 894 if (status & MONITOR_PANIC) { 895 printk(KERN_ERR "%s%d: adapter monitor panic.\n", 896 dev->name, instance); 897 goto error_iounmap; 898 } 899 start = jiffies; 900 /* 901 * Wait for the adapter to be up and running. Wait up to 3 minutes 902 */ 903 while (!((status = src_readl(dev, MUnit.OMR)) & 904 KERNEL_UP_AND_RUNNING)) { 905 if ((restart && 906 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 907 time_after(jiffies, start+HZ*startup_timeout)) { 908 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 909 dev->name, instance, status); 910 goto error_iounmap; 911 } 912 if (!restart && 913 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 914 time_after(jiffies, start + HZ * 915 ((startup_timeout > 60) 916 ? (startup_timeout - 60) 917 : (startup_timeout / 2))))) { 918 if (likely(!aac_src_restart_adapter(dev, 919 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 920 start = jiffies; 921 ++restart; 922 } 923 msleep(1); 924 } 925 if (restart && aac_commit) 926 aac_commit = 1; 927 /* 928 * Fill in the common function dispatch table. 929 */ 930 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 931 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 932 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 933 dev->a_ops.adapter_notify = aac_src_notify_adapter; 934 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 935 dev->a_ops.adapter_check_health = aac_src_check_health; 936 dev->a_ops.adapter_restart = aac_src_restart_adapter; 937 dev->a_ops.adapter_start = aac_src_start_adapter; 938 939 /* 940 * First clear out all interrupts. Then enable the one's that we 941 * can handle. 942 */ 943 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 944 aac_adapter_disable_int(dev); 945 src_writel(dev, MUnit.ODR_C, 0xffffffff); 946 aac_adapter_enable_int(dev); 947 948 if (aac_init_adapter(dev) == NULL) 949 goto error_iounmap; 950 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) 951 goto error_iounmap; 952 953 dev->msi = !pci_enable_msi(dev->pdev); 954 955 dev->aac_msix[0].vector_no = 0; 956 dev->aac_msix[0].dev = dev; 957 958 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 959 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) { 960 961 if (dev->msi) 962 pci_disable_msi(dev->pdev); 963 964 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 965 name, instance); 966 goto error_iounmap; 967 } 968 dev->dbg_base = pci_resource_start(dev->pdev, 2); 969 dev->dbg_base_mapped = dev->regs.src.bar1; 970 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; 971 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 972 973 aac_adapter_enable_int(dev); 974 975 if (!dev->sync_mode) { 976 /* 977 * Tell the adapter that all is configured, and it can 978 * start accepting requests 979 */ 980 aac_src_start_adapter(dev); 981 } 982 return 0; 983 984 error_iounmap: 985 986 return -1; 987 } 988 989 /** 990 * aac_srcv_init - initialize an SRCv card 991 * @dev: device to configure 992 * 993 */ 994 995 int aac_srcv_init(struct aac_dev *dev) 996 { 997 unsigned long start; 998 unsigned long status; 999 int restart = 0; 1000 int instance = dev->id; 1001 const char *name = dev->name; 1002 1003 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; 1004 dev->a_ops.adapter_comm = aac_src_select_comm; 1005 1006 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; 1007 if (aac_adapter_ioremap(dev, dev->base_size)) { 1008 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 1009 goto error_iounmap; 1010 } 1011 1012 /* Failure to reset here is an option ... */ 1013 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 1014 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 1015 if ((aac_reset_devices || reset_devices) && 1016 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 1017 ++restart; 1018 /* 1019 * Check to see if flash update is running. 1020 * Wait for the adapter to be up and running. Wait up to 5 minutes 1021 */ 1022 status = src_readl(dev, MUnit.OMR); 1023 if (status & FLASH_UPD_PENDING) { 1024 start = jiffies; 1025 do { 1026 status = src_readl(dev, MUnit.OMR); 1027 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) { 1028 printk(KERN_ERR "%s%d: adapter flash update failed.\n", 1029 dev->name, instance); 1030 goto error_iounmap; 1031 } 1032 } while (!(status & FLASH_UPD_SUCCESS) && 1033 !(status & FLASH_UPD_FAILED)); 1034 /* Delay 10 seconds. 1035 * Because right now FW is doing a soft reset, 1036 * do not read scratch pad register at this time 1037 */ 1038 ssleep(10); 1039 } 1040 /* 1041 * Check to see if the board panic'd while booting. 1042 */ 1043 status = src_readl(dev, MUnit.OMR); 1044 if (status & KERNEL_PANIC) { 1045 if (aac_src_restart_adapter(dev, 1046 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 1047 goto error_iounmap; 1048 ++restart; 1049 } 1050 /* 1051 * Check to see if the board failed any self tests. 1052 */ 1053 status = src_readl(dev, MUnit.OMR); 1054 if (status & SELF_TEST_FAILED) { 1055 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); 1056 goto error_iounmap; 1057 } 1058 /* 1059 * Check to see if the monitor panic'd while booting. 1060 */ 1061 if (status & MONITOR_PANIC) { 1062 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); 1063 goto error_iounmap; 1064 } 1065 start = jiffies; 1066 /* 1067 * Wait for the adapter to be up and running. Wait up to 3 minutes 1068 */ 1069 while (!((status = src_readl(dev, MUnit.OMR)) & 1070 KERNEL_UP_AND_RUNNING) || 1071 status == 0xffffffff) { 1072 if ((restart && 1073 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 1074 time_after(jiffies, start+HZ*startup_timeout)) { 1075 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 1076 dev->name, instance, status); 1077 goto error_iounmap; 1078 } 1079 if (!restart && 1080 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 1081 time_after(jiffies, start + HZ * 1082 ((startup_timeout > 60) 1083 ? (startup_timeout - 60) 1084 : (startup_timeout / 2))))) { 1085 if (likely(!aac_src_restart_adapter(dev, 1086 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 1087 start = jiffies; 1088 ++restart; 1089 } 1090 msleep(1); 1091 } 1092 if (restart && aac_commit) 1093 aac_commit = 1; 1094 /* 1095 * Fill in the common function dispatch table. 1096 */ 1097 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 1098 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 1099 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 1100 dev->a_ops.adapter_notify = aac_src_notify_adapter; 1101 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 1102 dev->a_ops.adapter_check_health = aac_src_check_health; 1103 dev->a_ops.adapter_restart = aac_src_restart_adapter; 1104 dev->a_ops.adapter_start = aac_src_start_adapter; 1105 1106 /* 1107 * First clear out all interrupts. Then enable the one's that we 1108 * can handle. 1109 */ 1110 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 1111 aac_adapter_disable_int(dev); 1112 src_writel(dev, MUnit.ODR_C, 0xffffffff); 1113 aac_adapter_enable_int(dev); 1114 1115 if (aac_init_adapter(dev) == NULL) 1116 goto error_iounmap; 1117 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) && 1118 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)) 1119 goto error_iounmap; 1120 if (dev->msi_enabled) 1121 aac_src_access_devreg(dev, AAC_ENABLE_MSIX); 1122 1123 if (aac_acquire_irq(dev)) 1124 goto error_iounmap; 1125 1126 dev->dbg_base = pci_resource_start(dev->pdev, 2); 1127 dev->dbg_base_mapped = dev->regs.src.bar1; 1128 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE; 1129 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 1130 1131 aac_adapter_enable_int(dev); 1132 1133 if (!dev->sync_mode) { 1134 /* 1135 * Tell the adapter that all is configured, and it can 1136 * start accepting requests 1137 */ 1138 aac_src_start_adapter(dev); 1139 } 1140 return 0; 1141 1142 error_iounmap: 1143 1144 return -1; 1145 } 1146 1147 void aac_src_access_devreg(struct aac_dev *dev, int mode) 1148 { 1149 u_int32_t val; 1150 1151 switch (mode) { 1152 case AAC_ENABLE_INTERRUPT: 1153 src_writel(dev, 1154 MUnit.OIMR, 1155 dev->OIMR = (dev->msi_enabled ? 1156 AAC_INT_ENABLE_TYPE1_MSIX : 1157 AAC_INT_ENABLE_TYPE1_INTX)); 1158 break; 1159 1160 case AAC_DISABLE_INTERRUPT: 1161 src_writel(dev, 1162 MUnit.OIMR, 1163 dev->OIMR = AAC_INT_DISABLE_ALL); 1164 break; 1165 1166 case AAC_ENABLE_MSIX: 1167 /* set bit 6 */ 1168 val = src_readl(dev, MUnit.IDR); 1169 val |= 0x40; 1170 src_writel(dev, MUnit.IDR, val); 1171 src_readl(dev, MUnit.IDR); 1172 /* unmask int. */ 1173 val = PMC_ALL_INTERRUPT_BITS; 1174 src_writel(dev, MUnit.IOAR, val); 1175 val = src_readl(dev, MUnit.OIMR); 1176 src_writel(dev, 1177 MUnit.OIMR, 1178 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0))); 1179 break; 1180 1181 case AAC_DISABLE_MSIX: 1182 /* reset bit 6 */ 1183 val = src_readl(dev, MUnit.IDR); 1184 val &= ~0x40; 1185 src_writel(dev, MUnit.IDR, val); 1186 src_readl(dev, MUnit.IDR); 1187 break; 1188 1189 case AAC_CLEAR_AIF_BIT: 1190 /* set bit 5 */ 1191 val = src_readl(dev, MUnit.IDR); 1192 val |= 0x20; 1193 src_writel(dev, MUnit.IDR, val); 1194 src_readl(dev, MUnit.IDR); 1195 break; 1196 1197 case AAC_CLEAR_SYNC_BIT: 1198 /* set bit 4 */ 1199 val = src_readl(dev, MUnit.IDR); 1200 val |= 0x10; 1201 src_writel(dev, MUnit.IDR, val); 1202 src_readl(dev, MUnit.IDR); 1203 break; 1204 1205 case AAC_ENABLE_INTX: 1206 /* set bit 7 */ 1207 val = src_readl(dev, MUnit.IDR); 1208 val |= 0x80; 1209 src_writel(dev, MUnit.IDR, val); 1210 src_readl(dev, MUnit.IDR); 1211 /* unmask int. */ 1212 val = PMC_ALL_INTERRUPT_BITS; 1213 src_writel(dev, MUnit.IOAR, val); 1214 src_readl(dev, MUnit.IOAR); 1215 val = src_readl(dev, MUnit.OIMR); 1216 src_writel(dev, MUnit.OIMR, 1217 val & (~(PMC_GLOBAL_INT_BIT2))); 1218 break; 1219 1220 default: 1221 break; 1222 } 1223 } 1224 1225 static int aac_src_get_sync_status(struct aac_dev *dev) 1226 { 1227 1228 int val; 1229 1230 if (dev->msi_enabled) 1231 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0; 1232 else 1233 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT; 1234 1235 return val; 1236 } 1237