1 /* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Module Name: 27 * src.c 28 * 29 * Abstract: Hardware Device Interface for PMC SRC based controllers 30 * 31 */ 32 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/types.h> 36 #include <linux/pci.h> 37 #include <linux/spinlock.h> 38 #include <linux/slab.h> 39 #include <linux/blkdev.h> 40 #include <linux/delay.h> 41 #include <linux/completion.h> 42 #include <linux/time.h> 43 #include <linux/interrupt.h> 44 #include <scsi/scsi_host.h> 45 46 #include "aacraid.h" 47 48 static int aac_src_get_sync_status(struct aac_dev *dev); 49 50 static irqreturn_t aac_src_intr_message(int irq, void *dev_id) 51 { 52 struct aac_msix_ctx *ctx; 53 struct aac_dev *dev; 54 unsigned long bellbits, bellbits_shifted; 55 int vector_no; 56 int isFastResponse, mode; 57 u32 index, handle; 58 59 ctx = (struct aac_msix_ctx *)dev_id; 60 dev = ctx->dev; 61 vector_no = ctx->vector_no; 62 63 if (dev->msi_enabled) { 64 mode = AAC_INT_MODE_MSI; 65 if (vector_no == 0) { 66 bellbits = src_readl(dev, MUnit.ODR_MSI); 67 if (bellbits & 0x40000) 68 mode |= AAC_INT_MODE_AIF; 69 if (bellbits & 0x1000) 70 mode |= AAC_INT_MODE_SYNC; 71 } 72 } else { 73 mode = AAC_INT_MODE_INTX; 74 bellbits = src_readl(dev, MUnit.ODR_R); 75 if (bellbits & PmDoorBellResponseSent) { 76 bellbits = PmDoorBellResponseSent; 77 src_writel(dev, MUnit.ODR_C, bellbits); 78 src_readl(dev, MUnit.ODR_C); 79 } else { 80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); 81 src_writel(dev, MUnit.ODR_C, bellbits); 82 src_readl(dev, MUnit.ODR_C); 83 84 if (bellbits_shifted & DoorBellAifPending) 85 mode |= AAC_INT_MODE_AIF; 86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0) 87 mode |= AAC_INT_MODE_SYNC; 88 } 89 } 90 91 if (mode & AAC_INT_MODE_SYNC) { 92 unsigned long sflags; 93 struct list_head *entry; 94 int send_it = 0; 95 extern int aac_sync_mode; 96 97 if (!aac_sync_mode && !dev->msi_enabled) { 98 src_writel(dev, MUnit.ODR_C, bellbits); 99 src_readl(dev, MUnit.ODR_C); 100 } 101 102 if (dev->sync_fib) { 103 if (dev->sync_fib->callback) 104 dev->sync_fib->callback(dev->sync_fib->callback_data, 105 dev->sync_fib); 106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); 107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { 108 dev->management_fib_count--; 109 up(&dev->sync_fib->event_wait); 110 } 111 spin_unlock_irqrestore(&dev->sync_fib->event_lock, 112 sflags); 113 spin_lock_irqsave(&dev->sync_lock, sflags); 114 if (!list_empty(&dev->sync_fib_list)) { 115 entry = dev->sync_fib_list.next; 116 dev->sync_fib = list_entry(entry, 117 struct fib, 118 fiblink); 119 list_del(entry); 120 send_it = 1; 121 } else { 122 dev->sync_fib = NULL; 123 } 124 spin_unlock_irqrestore(&dev->sync_lock, sflags); 125 if (send_it) { 126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, 127 (u32)dev->sync_fib->hw_fib_pa, 128 0, 0, 0, 0, 0, 129 NULL, NULL, NULL, NULL, NULL); 130 } 131 } 132 if (!dev->msi_enabled) 133 mode = 0; 134 135 } 136 137 if (mode & AAC_INT_MODE_AIF) { 138 /* handle AIF */ 139 if (dev->sa_firmware) { 140 u32 events = src_readl(dev, MUnit.SCR0); 141 142 aac_intr_normal(dev, events, 1, 0, NULL); 143 writel(events, &dev->IndexRegs->Mailbox[0]); 144 src_writel(dev, MUnit.IDR, 1 << 23); 145 } else { 146 if (dev->aif_thread && dev->fsa_dev) 147 aac_intr_normal(dev, 0, 2, 0, NULL); 148 } 149 if (dev->msi_enabled) 150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT); 151 mode = 0; 152 } 153 154 if (mode) { 155 index = dev->host_rrq_idx[vector_no]; 156 157 for (;;) { 158 isFastResponse = 0; 159 /* remove toggle bit (31) */ 160 handle = le32_to_cpu((dev->host_rrq[index]) 161 & 0x7fffffff); 162 /* check fast response bits (30, 1) */ 163 if (handle & 0x40000000) 164 isFastResponse = 1; 165 handle &= 0x0000ffff; 166 if (handle == 0) 167 break; 168 handle >>= 2; 169 if (dev->msi_enabled && dev->max_msix > 1) 170 atomic_dec(&dev->rrq_outstanding[vector_no]); 171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL); 172 dev->host_rrq[index++] = 0; 173 if (index == (vector_no + 1) * dev->vector_cap) 174 index = vector_no * dev->vector_cap; 175 dev->host_rrq_idx[vector_no] = index; 176 } 177 mode = 0; 178 } 179 180 return IRQ_HANDLED; 181 } 182 183 /** 184 * aac_src_disable_interrupt - Disable interrupts 185 * @dev: Adapter 186 */ 187 188 static void aac_src_disable_interrupt(struct aac_dev *dev) 189 { 190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 191 } 192 193 /** 194 * aac_src_enable_interrupt_message - Enable interrupts 195 * @dev: Adapter 196 */ 197 198 static void aac_src_enable_interrupt_message(struct aac_dev *dev) 199 { 200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT); 201 } 202 203 /** 204 * src_sync_cmd - send a command and wait 205 * @dev: Adapter 206 * @command: Command to execute 207 * @p1: first parameter 208 * @ret: adapter status 209 * 210 * This routine will send a synchronous command to the adapter and wait 211 * for its completion. 212 */ 213 214 static int src_sync_cmd(struct aac_dev *dev, u32 command, 215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, 216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) 217 { 218 unsigned long start; 219 unsigned long delay; 220 int ok; 221 222 /* 223 * Write the command into Mailbox 0 224 */ 225 writel(command, &dev->IndexRegs->Mailbox[0]); 226 /* 227 * Write the parameters into Mailboxes 1 - 6 228 */ 229 writel(p1, &dev->IndexRegs->Mailbox[1]); 230 writel(p2, &dev->IndexRegs->Mailbox[2]); 231 writel(p3, &dev->IndexRegs->Mailbox[3]); 232 writel(p4, &dev->IndexRegs->Mailbox[4]); 233 234 /* 235 * Clear the synch command doorbell to start on a clean slate. 236 */ 237 if (!dev->msi_enabled) 238 src_writel(dev, 239 MUnit.ODR_C, 240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 241 242 /* 243 * Disable doorbell interrupts 244 */ 245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 246 247 /* 248 * Force the completion of the mask register write before issuing 249 * the interrupt. 250 */ 251 src_readl(dev, MUnit.OIMR); 252 253 /* 254 * Signal that there is a new synch command 255 */ 256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); 257 258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) { 259 ok = 0; 260 start = jiffies; 261 262 if (command == IOP_RESET_ALWAYS) { 263 /* Wait up to 10 sec */ 264 delay = 10*HZ; 265 } else { 266 /* Wait up to 5 minutes */ 267 delay = 300*HZ; 268 } 269 while (time_before(jiffies, start+delay)) { 270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ 271 /* 272 * Mon960 will set doorbell0 bit when it has completed the command. 273 */ 274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) { 275 /* 276 * Clear the doorbell. 277 */ 278 if (dev->msi_enabled) 279 aac_src_access_devreg(dev, 280 AAC_CLEAR_SYNC_BIT); 281 else 282 src_writel(dev, 283 MUnit.ODR_C, 284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 285 ok = 1; 286 break; 287 } 288 /* 289 * Yield the processor in case we are slow 290 */ 291 msleep(1); 292 } 293 if (unlikely(ok != 1)) { 294 /* 295 * Restore interrupt mask even though we timed out 296 */ 297 aac_adapter_enable_int(dev); 298 return -ETIMEDOUT; 299 } 300 /* 301 * Pull the synch status from Mailbox 0. 302 */ 303 if (status) 304 *status = readl(&dev->IndexRegs->Mailbox[0]); 305 if (r1) 306 *r1 = readl(&dev->IndexRegs->Mailbox[1]); 307 if (r2) 308 *r2 = readl(&dev->IndexRegs->Mailbox[2]); 309 if (r3) 310 *r3 = readl(&dev->IndexRegs->Mailbox[3]); 311 if (r4) 312 *r4 = readl(&dev->IndexRegs->Mailbox[4]); 313 if (command == GET_COMM_PREFERRED_SETTINGS) 314 dev->max_msix = 315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF; 316 /* 317 * Clear the synch command doorbell. 318 */ 319 if (!dev->msi_enabled) 320 src_writel(dev, 321 MUnit.ODR_C, 322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 323 } 324 325 /* 326 * Restore interrupt mask 327 */ 328 aac_adapter_enable_int(dev); 329 return 0; 330 } 331 332 /** 333 * aac_src_interrupt_adapter - interrupt adapter 334 * @dev: Adapter 335 * 336 * Send an interrupt to the i960 and breakpoint it. 337 */ 338 339 static void aac_src_interrupt_adapter(struct aac_dev *dev) 340 { 341 src_sync_cmd(dev, BREAKPOINT_REQUEST, 342 0, 0, 0, 0, 0, 0, 343 NULL, NULL, NULL, NULL, NULL); 344 } 345 346 /** 347 * aac_src_notify_adapter - send an event to the adapter 348 * @dev: Adapter 349 * @event: Event to send 350 * 351 * Notify the i960 that something it probably cares about has 352 * happened. 353 */ 354 355 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event) 356 { 357 switch (event) { 358 359 case AdapNormCmdQue: 360 src_writel(dev, MUnit.ODR_C, 361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT); 362 break; 363 case HostNormRespNotFull: 364 src_writel(dev, MUnit.ODR_C, 365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT); 366 break; 367 case AdapNormRespQue: 368 src_writel(dev, MUnit.ODR_C, 369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT); 370 break; 371 case HostNormCmdNotFull: 372 src_writel(dev, MUnit.ODR_C, 373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT); 374 break; 375 case FastIo: 376 src_writel(dev, MUnit.ODR_C, 377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT); 378 break; 379 case AdapPrintfDone: 380 src_writel(dev, MUnit.ODR_C, 381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT); 382 break; 383 default: 384 BUG(); 385 break; 386 } 387 } 388 389 /** 390 * aac_src_start_adapter - activate adapter 391 * @dev: Adapter 392 * 393 * Start up processing on an i960 based AAC adapter 394 */ 395 396 static void aac_src_start_adapter(struct aac_dev *dev) 397 { 398 union aac_init *init; 399 int i; 400 401 /* reset host_rrq_idx first */ 402 for (i = 0; i < dev->max_msix; i++) { 403 dev->host_rrq_idx[i] = i * dev->vector_cap; 404 atomic_set(&dev->rrq_outstanding[i], 0); 405 } 406 atomic_set(&dev->msix_counter, 0); 407 dev->fibs_pushed_no = 0; 408 409 init = dev->init; 410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds()); 412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 413 lower_32_bits(dev->init_pa), 414 upper_32_bits(dev->init_pa), 415 sizeof(struct _r8) + 416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq), 417 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 418 } else { 419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds()); 420 // We can only use a 32 bit address here 421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0, 423 NULL, NULL, NULL, NULL, NULL); 424 } 425 426 } 427 428 /** 429 * aac_src_check_health 430 * @dev: device to check if healthy 431 * 432 * Will attempt to determine if the specified adapter is alive and 433 * capable of handling requests, returning 0 if alive. 434 */ 435 static int aac_src_check_health(struct aac_dev *dev) 436 { 437 u32 status = src_readl(dev, MUnit.OMR); 438 439 /* 440 * Check to see if the board failed any self tests. 441 */ 442 if (unlikely(status & SELF_TEST_FAILED)) 443 return -1; 444 445 /* 446 * Check to see if the board panic'd. 447 */ 448 if (unlikely(status & KERNEL_PANIC)) 449 return (status >> 16) & 0xFF; 450 /* 451 * Wait for the adapter to be up and running. 452 */ 453 if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) 454 return -3; 455 /* 456 * Everything is OK 457 */ 458 return 0; 459 } 460 461 static inline u32 aac_get_vector(struct aac_dev *dev) 462 { 463 return atomic_inc_return(&dev->msix_counter)%dev->max_msix; 464 } 465 466 /** 467 * aac_src_deliver_message 468 * @fib: fib to issue 469 * 470 * Will send a fib, returning 0 if successful. 471 */ 472 static int aac_src_deliver_message(struct fib *fib) 473 { 474 struct aac_dev *dev = fib->dev; 475 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 476 u32 fibsize; 477 dma_addr_t address; 478 struct aac_fib_xporthdr *pFibX; 479 int native_hba; 480 #if !defined(writeq) 481 unsigned long flags; 482 #endif 483 484 u16 vector_no; 485 486 atomic_inc(&q->numpending); 487 488 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0; 489 490 491 if (dev->msi_enabled && dev->max_msix > 1 && 492 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) { 493 494 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) 495 && dev->sa_firmware) 496 vector_no = aac_get_vector(dev); 497 else 498 vector_no = fib->vector_no; 499 500 if (native_hba) { 501 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) { 502 struct aac_hba_tm_req *tm_req; 503 504 tm_req = (struct aac_hba_tm_req *) 505 fib->hw_fib_va; 506 if (tm_req->iu_type == 507 HBA_IU_TYPE_SCSI_TM_REQ) { 508 ((struct aac_hba_tm_req *) 509 fib->hw_fib_va)->reply_qid 510 = vector_no; 511 ((struct aac_hba_tm_req *) 512 fib->hw_fib_va)->request_id 513 += (vector_no << 16); 514 } else { 515 ((struct aac_hba_reset_req *) 516 fib->hw_fib_va)->reply_qid 517 = vector_no; 518 ((struct aac_hba_reset_req *) 519 fib->hw_fib_va)->request_id 520 += (vector_no << 16); 521 } 522 } else { 523 ((struct aac_hba_cmd_req *) 524 fib->hw_fib_va)->reply_qid 525 = vector_no; 526 ((struct aac_hba_cmd_req *) 527 fib->hw_fib_va)->request_id 528 += (vector_no << 16); 529 } 530 } else { 531 fib->hw_fib_va->header.Handle += (vector_no << 16); 532 } 533 } else { 534 vector_no = 0; 535 } 536 537 atomic_inc(&dev->rrq_outstanding[vector_no]); 538 539 if (native_hba) { 540 address = fib->hw_fib_pa; 541 fibsize = (fib->hbacmd_size + 127) / 128 - 1; 542 if (fibsize > 31) 543 fibsize = 31; 544 address |= fibsize; 545 #if defined(writeq) 546 src_writeq(dev, MUnit.IQN_L, (u64)address); 547 #else 548 spin_lock_irqsave(&fib->dev->iq_lock, flags); 549 src_writel(dev, MUnit.IQN_H, 550 upper_32_bits(address) & 0xffffffff); 551 src_writel(dev, MUnit.IQN_L, address & 0xffffffff); 552 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 553 #endif 554 } else { 555 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || 556 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 557 /* Calculate the amount to the fibsize bits */ 558 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size) 559 + 127) / 128 - 1; 560 /* New FIB header, 32-bit */ 561 address = fib->hw_fib_pa; 562 fib->hw_fib_va->header.StructType = FIB_MAGIC2; 563 fib->hw_fib_va->header.SenderFibAddress = 564 cpu_to_le32((u32)address); 565 fib->hw_fib_va->header.u.TimeStamp = 0; 566 WARN_ON(upper_32_bits(address) != 0L); 567 } else { 568 /* Calculate the amount to the fibsize bits */ 569 fibsize = (sizeof(struct aac_fib_xporthdr) + 570 le16_to_cpu(fib->hw_fib_va->header.Size) 571 + 127) / 128 - 1; 572 /* Fill XPORT header */ 573 pFibX = (struct aac_fib_xporthdr *) 574 ((unsigned char *)fib->hw_fib_va - 575 sizeof(struct aac_fib_xporthdr)); 576 pFibX->Handle = fib->hw_fib_va->header.Handle; 577 pFibX->HostAddress = 578 cpu_to_le64((u64)fib->hw_fib_pa); 579 pFibX->Size = cpu_to_le32( 580 le16_to_cpu(fib->hw_fib_va->header.Size)); 581 address = fib->hw_fib_pa - 582 (u64)sizeof(struct aac_fib_xporthdr); 583 } 584 if (fibsize > 31) 585 fibsize = 31; 586 address |= fibsize; 587 588 #if defined(writeq) 589 src_writeq(dev, MUnit.IQ_L, (u64)address); 590 #else 591 spin_lock_irqsave(&fib->dev->iq_lock, flags); 592 src_writel(dev, MUnit.IQ_H, 593 upper_32_bits(address) & 0xffffffff); 594 src_writel(dev, MUnit.IQ_L, address & 0xffffffff); 595 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 596 #endif 597 } 598 return 0; 599 } 600 601 /** 602 * aac_src_ioremap 603 * @size: mapping resize request 604 * 605 */ 606 static int aac_src_ioremap(struct aac_dev *dev, u32 size) 607 { 608 if (!size) { 609 iounmap(dev->regs.src.bar1); 610 dev->regs.src.bar1 = NULL; 611 iounmap(dev->regs.src.bar0); 612 dev->base = dev->regs.src.bar0 = NULL; 613 return 0; 614 } 615 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), 616 AAC_MIN_SRC_BAR1_SIZE); 617 dev->base = NULL; 618 if (dev->regs.src.bar1 == NULL) 619 return -1; 620 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 621 if (dev->base == NULL) { 622 iounmap(dev->regs.src.bar1); 623 dev->regs.src.bar1 = NULL; 624 return -1; 625 } 626 dev->IndexRegs = &((struct src_registers __iomem *) 627 dev->base)->u.tupelo.IndexRegs; 628 return 0; 629 } 630 631 /** 632 * aac_srcv_ioremap 633 * @size: mapping resize request 634 * 635 */ 636 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size) 637 { 638 if (!size) { 639 iounmap(dev->regs.src.bar0); 640 dev->base = dev->regs.src.bar0 = NULL; 641 return 0; 642 } 643 644 dev->regs.src.bar1 = 645 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE); 646 dev->base = NULL; 647 if (dev->regs.src.bar1 == NULL) 648 return -1; 649 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 650 if (dev->base == NULL) { 651 iounmap(dev->regs.src.bar1); 652 dev->regs.src.bar1 = NULL; 653 return -1; 654 } 655 dev->IndexRegs = &((struct src_registers __iomem *) 656 dev->base)->u.denali.IndexRegs; 657 return 0; 658 } 659 660 static void aac_set_intx_mode(struct aac_dev *dev) 661 { 662 if (dev->msi_enabled) { 663 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 664 dev->msi_enabled = 0; 665 msleep(5000); /* Delay 5 seconds */ 666 } 667 } 668 669 static void aac_send_iop_reset(struct aac_dev *dev, int bled) 670 { 671 u32 var, reset_mask; 672 673 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, 674 0, 0, 0, 0, 0, 0, &var, 675 &reset_mask, NULL, NULL, NULL); 676 677 if ((bled || var != 0x00000001) && !dev->doorbell_mask) 678 bled = -EINVAL; 679 else if (dev->doorbell_mask) { 680 reset_mask = dev->doorbell_mask; 681 bled = 0; 682 var = 0x00000001; 683 } 684 685 aac_set_intx_mode(dev); 686 687 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 & 688 AAC_OPTION_DOORBELL_RESET)) { 689 src_writel(dev, MUnit.IDR, reset_mask); 690 } else { 691 src_writel(dev, MUnit.IDR, 0x100); 692 } 693 msleep(30000); 694 } 695 696 static void aac_send_hardware_soft_reset(struct aac_dev *dev) 697 { 698 u_int32_t val; 699 700 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET)); 701 val |= 0x01; 702 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET)); 703 msleep_interruptible(20000); 704 } 705 706 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type) 707 { 708 unsigned long status, start; 709 710 if (bled < 0) 711 goto invalid_out; 712 713 if (bled) 714 pr_err("%s%d: adapter kernel panic'd %x.\n", 715 dev->name, dev->id, bled); 716 717 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 718 719 switch (reset_type) { 720 case IOP_HWSOFT_RESET: 721 aac_send_iop_reset(dev, bled); 722 /* 723 * Check to see if KERNEL_UP_AND_RUNNING 724 * Wait for the adapter to be up and running. 725 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset 726 */ 727 status = src_readl(dev, MUnit.OMR); 728 if (dev->sa_firmware 729 && !(status & KERNEL_UP_AND_RUNNING)) { 730 start = jiffies; 731 do { 732 status = src_readl(dev, MUnit.OMR); 733 if (time_after(jiffies, 734 start+HZ*SOFT_RESET_TIME)) { 735 aac_send_hardware_soft_reset(dev); 736 start = jiffies; 737 } 738 } while (!(status & KERNEL_UP_AND_RUNNING)); 739 } 740 break; 741 case HW_SOFT_RESET: 742 if (dev->sa_firmware) { 743 aac_send_hardware_soft_reset(dev); 744 aac_set_intx_mode(dev); 745 } 746 break; 747 default: 748 aac_send_iop_reset(dev, bled); 749 break; 750 } 751 752 invalid_out: 753 754 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) 755 return -ENODEV; 756 757 if (startup_timeout < 300) 758 startup_timeout = 300; 759 760 return 0; 761 } 762 763 /** 764 * aac_src_select_comm - Select communications method 765 * @dev: Adapter 766 * @comm: communications method 767 */ 768 static int aac_src_select_comm(struct aac_dev *dev, int comm) 769 { 770 switch (comm) { 771 case AAC_COMM_MESSAGE: 772 dev->a_ops.adapter_intr = aac_src_intr_message; 773 dev->a_ops.adapter_deliver = aac_src_deliver_message; 774 break; 775 default: 776 return 1; 777 } 778 return 0; 779 } 780 781 /** 782 * aac_src_init - initialize an Cardinal Frey Bar card 783 * @dev: device to configure 784 * 785 */ 786 787 int aac_src_init(struct aac_dev *dev) 788 { 789 unsigned long start; 790 unsigned long status; 791 int restart = 0; 792 int instance = dev->id; 793 const char *name = dev->name; 794 795 dev->a_ops.adapter_ioremap = aac_src_ioremap; 796 dev->a_ops.adapter_comm = aac_src_select_comm; 797 798 dev->base_size = AAC_MIN_SRC_BAR0_SIZE; 799 if (aac_adapter_ioremap(dev, dev->base_size)) { 800 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 801 goto error_iounmap; 802 } 803 804 /* Failure to reset here is an option ... */ 805 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 806 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 807 if ((aac_reset_devices || reset_devices) && 808 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 809 ++restart; 810 /* 811 * Check to see if the board panic'd while booting. 812 */ 813 status = src_readl(dev, MUnit.OMR); 814 if (status & KERNEL_PANIC) { 815 if (aac_src_restart_adapter(dev, 816 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 817 goto error_iounmap; 818 ++restart; 819 } 820 /* 821 * Check to see if the board failed any self tests. 822 */ 823 status = src_readl(dev, MUnit.OMR); 824 if (status & SELF_TEST_FAILED) { 825 printk(KERN_ERR "%s%d: adapter self-test failed.\n", 826 dev->name, instance); 827 goto error_iounmap; 828 } 829 /* 830 * Check to see if the monitor panic'd while booting. 831 */ 832 if (status & MONITOR_PANIC) { 833 printk(KERN_ERR "%s%d: adapter monitor panic.\n", 834 dev->name, instance); 835 goto error_iounmap; 836 } 837 start = jiffies; 838 /* 839 * Wait for the adapter to be up and running. Wait up to 3 minutes 840 */ 841 while (!((status = src_readl(dev, MUnit.OMR)) & 842 KERNEL_UP_AND_RUNNING)) { 843 if ((restart && 844 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 845 time_after(jiffies, start+HZ*startup_timeout)) { 846 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 847 dev->name, instance, status); 848 goto error_iounmap; 849 } 850 if (!restart && 851 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 852 time_after(jiffies, start + HZ * 853 ((startup_timeout > 60) 854 ? (startup_timeout - 60) 855 : (startup_timeout / 2))))) { 856 if (likely(!aac_src_restart_adapter(dev, 857 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 858 start = jiffies; 859 ++restart; 860 } 861 msleep(1); 862 } 863 if (restart && aac_commit) 864 aac_commit = 1; 865 /* 866 * Fill in the common function dispatch table. 867 */ 868 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 869 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 870 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 871 dev->a_ops.adapter_notify = aac_src_notify_adapter; 872 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 873 dev->a_ops.adapter_check_health = aac_src_check_health; 874 dev->a_ops.adapter_restart = aac_src_restart_adapter; 875 dev->a_ops.adapter_start = aac_src_start_adapter; 876 877 /* 878 * First clear out all interrupts. Then enable the one's that we 879 * can handle. 880 */ 881 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 882 aac_adapter_disable_int(dev); 883 src_writel(dev, MUnit.ODR_C, 0xffffffff); 884 aac_adapter_enable_int(dev); 885 886 if (aac_init_adapter(dev) == NULL) 887 goto error_iounmap; 888 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) 889 goto error_iounmap; 890 891 dev->msi = !pci_enable_msi(dev->pdev); 892 893 dev->aac_msix[0].vector_no = 0; 894 dev->aac_msix[0].dev = dev; 895 896 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 897 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) { 898 899 if (dev->msi) 900 pci_disable_msi(dev->pdev); 901 902 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 903 name, instance); 904 goto error_iounmap; 905 } 906 dev->dbg_base = pci_resource_start(dev->pdev, 2); 907 dev->dbg_base_mapped = dev->regs.src.bar1; 908 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; 909 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 910 911 aac_adapter_enable_int(dev); 912 913 if (!dev->sync_mode) { 914 /* 915 * Tell the adapter that all is configured, and it can 916 * start accepting requests 917 */ 918 aac_src_start_adapter(dev); 919 } 920 return 0; 921 922 error_iounmap: 923 924 return -1; 925 } 926 927 /** 928 * aac_srcv_init - initialize an SRCv card 929 * @dev: device to configure 930 * 931 */ 932 933 int aac_srcv_init(struct aac_dev *dev) 934 { 935 unsigned long start; 936 unsigned long status; 937 int restart = 0; 938 int instance = dev->id; 939 const char *name = dev->name; 940 941 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; 942 dev->a_ops.adapter_comm = aac_src_select_comm; 943 944 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; 945 if (aac_adapter_ioremap(dev, dev->base_size)) { 946 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 947 goto error_iounmap; 948 } 949 950 /* Failure to reset here is an option ... */ 951 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 952 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 953 if ((aac_reset_devices || reset_devices) && 954 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 955 ++restart; 956 /* 957 * Check to see if flash update is running. 958 * Wait for the adapter to be up and running. Wait up to 5 minutes 959 */ 960 status = src_readl(dev, MUnit.OMR); 961 if (status & FLASH_UPD_PENDING) { 962 start = jiffies; 963 do { 964 status = src_readl(dev, MUnit.OMR); 965 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) { 966 printk(KERN_ERR "%s%d: adapter flash update failed.\n", 967 dev->name, instance); 968 goto error_iounmap; 969 } 970 } while (!(status & FLASH_UPD_SUCCESS) && 971 !(status & FLASH_UPD_FAILED)); 972 /* Delay 10 seconds. 973 * Because right now FW is doing a soft reset, 974 * do not read scratch pad register at this time 975 */ 976 ssleep(10); 977 } 978 /* 979 * Check to see if the board panic'd while booting. 980 */ 981 status = src_readl(dev, MUnit.OMR); 982 if (status & KERNEL_PANIC) { 983 if (aac_src_restart_adapter(dev, 984 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 985 goto error_iounmap; 986 ++restart; 987 } 988 /* 989 * Check to see if the board failed any self tests. 990 */ 991 status = src_readl(dev, MUnit.OMR); 992 if (status & SELF_TEST_FAILED) { 993 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); 994 goto error_iounmap; 995 } 996 /* 997 * Check to see if the monitor panic'd while booting. 998 */ 999 if (status & MONITOR_PANIC) { 1000 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); 1001 goto error_iounmap; 1002 } 1003 start = jiffies; 1004 /* 1005 * Wait for the adapter to be up and running. Wait up to 3 minutes 1006 */ 1007 while (!((status = src_readl(dev, MUnit.OMR)) & 1008 KERNEL_UP_AND_RUNNING) || 1009 status == 0xffffffff) { 1010 if ((restart && 1011 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 1012 time_after(jiffies, start+HZ*startup_timeout)) { 1013 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 1014 dev->name, instance, status); 1015 goto error_iounmap; 1016 } 1017 if (!restart && 1018 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 1019 time_after(jiffies, start + HZ * 1020 ((startup_timeout > 60) 1021 ? (startup_timeout - 60) 1022 : (startup_timeout / 2))))) { 1023 if (likely(!aac_src_restart_adapter(dev, 1024 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 1025 start = jiffies; 1026 ++restart; 1027 } 1028 msleep(1); 1029 } 1030 if (restart && aac_commit) 1031 aac_commit = 1; 1032 /* 1033 * Fill in the common function dispatch table. 1034 */ 1035 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 1036 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 1037 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 1038 dev->a_ops.adapter_notify = aac_src_notify_adapter; 1039 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 1040 dev->a_ops.adapter_check_health = aac_src_check_health; 1041 dev->a_ops.adapter_restart = aac_src_restart_adapter; 1042 dev->a_ops.adapter_start = aac_src_start_adapter; 1043 1044 /* 1045 * First clear out all interrupts. Then enable the one's that we 1046 * can handle. 1047 */ 1048 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 1049 aac_adapter_disable_int(dev); 1050 src_writel(dev, MUnit.ODR_C, 0xffffffff); 1051 aac_adapter_enable_int(dev); 1052 1053 if (aac_init_adapter(dev) == NULL) 1054 goto error_iounmap; 1055 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) && 1056 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)) 1057 goto error_iounmap; 1058 if (dev->msi_enabled) 1059 aac_src_access_devreg(dev, AAC_ENABLE_MSIX); 1060 1061 if (aac_acquire_irq(dev)) 1062 goto error_iounmap; 1063 1064 dev->dbg_base = pci_resource_start(dev->pdev, 2); 1065 dev->dbg_base_mapped = dev->regs.src.bar1; 1066 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE; 1067 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 1068 1069 aac_adapter_enable_int(dev); 1070 1071 if (!dev->sync_mode) { 1072 /* 1073 * Tell the adapter that all is configured, and it can 1074 * start accepting requests 1075 */ 1076 aac_src_start_adapter(dev); 1077 } 1078 return 0; 1079 1080 error_iounmap: 1081 1082 return -1; 1083 } 1084 1085 void aac_src_access_devreg(struct aac_dev *dev, int mode) 1086 { 1087 u_int32_t val; 1088 1089 switch (mode) { 1090 case AAC_ENABLE_INTERRUPT: 1091 src_writel(dev, 1092 MUnit.OIMR, 1093 dev->OIMR = (dev->msi_enabled ? 1094 AAC_INT_ENABLE_TYPE1_MSIX : 1095 AAC_INT_ENABLE_TYPE1_INTX)); 1096 break; 1097 1098 case AAC_DISABLE_INTERRUPT: 1099 src_writel(dev, 1100 MUnit.OIMR, 1101 dev->OIMR = AAC_INT_DISABLE_ALL); 1102 break; 1103 1104 case AAC_ENABLE_MSIX: 1105 /* set bit 6 */ 1106 val = src_readl(dev, MUnit.IDR); 1107 val |= 0x40; 1108 src_writel(dev, MUnit.IDR, val); 1109 src_readl(dev, MUnit.IDR); 1110 /* unmask int. */ 1111 val = PMC_ALL_INTERRUPT_BITS; 1112 src_writel(dev, MUnit.IOAR, val); 1113 val = src_readl(dev, MUnit.OIMR); 1114 src_writel(dev, 1115 MUnit.OIMR, 1116 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0))); 1117 break; 1118 1119 case AAC_DISABLE_MSIX: 1120 /* reset bit 6 */ 1121 val = src_readl(dev, MUnit.IDR); 1122 val &= ~0x40; 1123 src_writel(dev, MUnit.IDR, val); 1124 src_readl(dev, MUnit.IDR); 1125 break; 1126 1127 case AAC_CLEAR_AIF_BIT: 1128 /* set bit 5 */ 1129 val = src_readl(dev, MUnit.IDR); 1130 val |= 0x20; 1131 src_writel(dev, MUnit.IDR, val); 1132 src_readl(dev, MUnit.IDR); 1133 break; 1134 1135 case AAC_CLEAR_SYNC_BIT: 1136 /* set bit 4 */ 1137 val = src_readl(dev, MUnit.IDR); 1138 val |= 0x10; 1139 src_writel(dev, MUnit.IDR, val); 1140 src_readl(dev, MUnit.IDR); 1141 break; 1142 1143 case AAC_ENABLE_INTX: 1144 /* set bit 7 */ 1145 val = src_readl(dev, MUnit.IDR); 1146 val |= 0x80; 1147 src_writel(dev, MUnit.IDR, val); 1148 src_readl(dev, MUnit.IDR); 1149 /* unmask int. */ 1150 val = PMC_ALL_INTERRUPT_BITS; 1151 src_writel(dev, MUnit.IOAR, val); 1152 src_readl(dev, MUnit.IOAR); 1153 val = src_readl(dev, MUnit.OIMR); 1154 src_writel(dev, MUnit.OIMR, 1155 val & (~(PMC_GLOBAL_INT_BIT2))); 1156 break; 1157 1158 default: 1159 break; 1160 } 1161 } 1162 1163 static int aac_src_get_sync_status(struct aac_dev *dev) 1164 { 1165 1166 int val; 1167 1168 if (dev->msi_enabled) 1169 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0; 1170 else 1171 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT; 1172 1173 return val; 1174 } 1175