1 /* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Module Name: 27 * src.c 28 * 29 * Abstract: Hardware Device Interface for PMC SRC based controllers 30 * 31 */ 32 33 #include <linux/kernel.h> 34 #include <linux/init.h> 35 #include <linux/types.h> 36 #include <linux/pci.h> 37 #include <linux/spinlock.h> 38 #include <linux/slab.h> 39 #include <linux/blkdev.h> 40 #include <linux/delay.h> 41 #include <linux/completion.h> 42 #include <linux/time.h> 43 #include <linux/interrupt.h> 44 #include <scsi/scsi_host.h> 45 46 #include "aacraid.h" 47 48 static int aac_src_get_sync_status(struct aac_dev *dev); 49 50 static irqreturn_t aac_src_intr_message(int irq, void *dev_id) 51 { 52 struct aac_msix_ctx *ctx; 53 struct aac_dev *dev; 54 unsigned long bellbits, bellbits_shifted; 55 int vector_no; 56 int isFastResponse, mode; 57 u32 index, handle; 58 59 ctx = (struct aac_msix_ctx *)dev_id; 60 dev = ctx->dev; 61 vector_no = ctx->vector_no; 62 63 if (dev->msi_enabled) { 64 mode = AAC_INT_MODE_MSI; 65 if (vector_no == 0) { 66 bellbits = src_readl(dev, MUnit.ODR_MSI); 67 if (bellbits & 0x40000) 68 mode |= AAC_INT_MODE_AIF; 69 if (bellbits & 0x1000) 70 mode |= AAC_INT_MODE_SYNC; 71 } 72 } else { 73 mode = AAC_INT_MODE_INTX; 74 bellbits = src_readl(dev, MUnit.ODR_R); 75 if (bellbits & PmDoorBellResponseSent) { 76 bellbits = PmDoorBellResponseSent; 77 src_writel(dev, MUnit.ODR_C, bellbits); 78 src_readl(dev, MUnit.ODR_C); 79 } else { 80 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); 81 src_writel(dev, MUnit.ODR_C, bellbits); 82 src_readl(dev, MUnit.ODR_C); 83 84 if (bellbits_shifted & DoorBellAifPending) 85 mode |= AAC_INT_MODE_AIF; 86 else if (bellbits_shifted & OUTBOUNDDOORBELL_0) 87 mode |= AAC_INT_MODE_SYNC; 88 } 89 } 90 91 if (mode & AAC_INT_MODE_SYNC) { 92 unsigned long sflags; 93 struct list_head *entry; 94 int send_it = 0; 95 extern int aac_sync_mode; 96 97 if (!aac_sync_mode && !dev->msi_enabled) { 98 src_writel(dev, MUnit.ODR_C, bellbits); 99 src_readl(dev, MUnit.ODR_C); 100 } 101 102 if (dev->sync_fib) { 103 if (dev->sync_fib->callback) 104 dev->sync_fib->callback(dev->sync_fib->callback_data, 105 dev->sync_fib); 106 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); 107 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { 108 dev->management_fib_count--; 109 up(&dev->sync_fib->event_wait); 110 } 111 spin_unlock_irqrestore(&dev->sync_fib->event_lock, 112 sflags); 113 spin_lock_irqsave(&dev->sync_lock, sflags); 114 if (!list_empty(&dev->sync_fib_list)) { 115 entry = dev->sync_fib_list.next; 116 dev->sync_fib = list_entry(entry, 117 struct fib, 118 fiblink); 119 list_del(entry); 120 send_it = 1; 121 } else { 122 dev->sync_fib = NULL; 123 } 124 spin_unlock_irqrestore(&dev->sync_lock, sflags); 125 if (send_it) { 126 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, 127 (u32)dev->sync_fib->hw_fib_pa, 128 0, 0, 0, 0, 0, 129 NULL, NULL, NULL, NULL, NULL); 130 } 131 } 132 if (!dev->msi_enabled) 133 mode = 0; 134 135 } 136 137 if (mode & AAC_INT_MODE_AIF) { 138 /* handle AIF */ 139 if (dev->sa_firmware) { 140 u32 events = src_readl(dev, MUnit.SCR0); 141 142 aac_intr_normal(dev, events, 1, 0, NULL); 143 writel(events, &dev->IndexRegs->Mailbox[0]); 144 src_writel(dev, MUnit.IDR, 1 << 23); 145 } else { 146 if (dev->aif_thread && dev->fsa_dev) 147 aac_intr_normal(dev, 0, 2, 0, NULL); 148 } 149 if (dev->msi_enabled) 150 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT); 151 mode = 0; 152 } 153 154 if (mode) { 155 index = dev->host_rrq_idx[vector_no]; 156 157 for (;;) { 158 isFastResponse = 0; 159 /* remove toggle bit (31) */ 160 handle = le32_to_cpu((dev->host_rrq[index]) 161 & 0x7fffffff); 162 /* check fast response bits (30, 1) */ 163 if (handle & 0x40000000) 164 isFastResponse = 1; 165 handle &= 0x0000ffff; 166 if (handle == 0) 167 break; 168 handle >>= 2; 169 if (dev->msi_enabled && dev->max_msix > 1) 170 atomic_dec(&dev->rrq_outstanding[vector_no]); 171 aac_intr_normal(dev, handle, 0, isFastResponse, NULL); 172 dev->host_rrq[index++] = 0; 173 if (index == (vector_no + 1) * dev->vector_cap) 174 index = vector_no * dev->vector_cap; 175 dev->host_rrq_idx[vector_no] = index; 176 } 177 mode = 0; 178 } 179 180 return IRQ_HANDLED; 181 } 182 183 /** 184 * aac_src_disable_interrupt - Disable interrupts 185 * @dev: Adapter 186 */ 187 188 static void aac_src_disable_interrupt(struct aac_dev *dev) 189 { 190 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 191 } 192 193 /** 194 * aac_src_enable_interrupt_message - Enable interrupts 195 * @dev: Adapter 196 */ 197 198 static void aac_src_enable_interrupt_message(struct aac_dev *dev) 199 { 200 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT); 201 } 202 203 /** 204 * src_sync_cmd - send a command and wait 205 * @dev: Adapter 206 * @command: Command to execute 207 * @p1: first parameter 208 * @ret: adapter status 209 * 210 * This routine will send a synchronous command to the adapter and wait 211 * for its completion. 212 */ 213 214 static int src_sync_cmd(struct aac_dev *dev, u32 command, 215 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, 216 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) 217 { 218 unsigned long start; 219 unsigned long delay; 220 int ok; 221 222 /* 223 * Write the command into Mailbox 0 224 */ 225 writel(command, &dev->IndexRegs->Mailbox[0]); 226 /* 227 * Write the parameters into Mailboxes 1 - 6 228 */ 229 writel(p1, &dev->IndexRegs->Mailbox[1]); 230 writel(p2, &dev->IndexRegs->Mailbox[2]); 231 writel(p3, &dev->IndexRegs->Mailbox[3]); 232 writel(p4, &dev->IndexRegs->Mailbox[4]); 233 234 /* 235 * Clear the synch command doorbell to start on a clean slate. 236 */ 237 if (!dev->msi_enabled) 238 src_writel(dev, 239 MUnit.ODR_C, 240 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 241 242 /* 243 * Disable doorbell interrupts 244 */ 245 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 246 247 /* 248 * Force the completion of the mask register write before issuing 249 * the interrupt. 250 */ 251 src_readl(dev, MUnit.OIMR); 252 253 /* 254 * Signal that there is a new synch command 255 */ 256 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); 257 258 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) { 259 ok = 0; 260 start = jiffies; 261 262 if (command == IOP_RESET_ALWAYS) { 263 /* Wait up to 10 sec */ 264 delay = 10*HZ; 265 } else { 266 /* Wait up to 5 minutes */ 267 delay = 300*HZ; 268 } 269 while (time_before(jiffies, start+delay)) { 270 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ 271 /* 272 * Mon960 will set doorbell0 bit when it has completed the command. 273 */ 274 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) { 275 /* 276 * Clear the doorbell. 277 */ 278 if (dev->msi_enabled) 279 aac_src_access_devreg(dev, 280 AAC_CLEAR_SYNC_BIT); 281 else 282 src_writel(dev, 283 MUnit.ODR_C, 284 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 285 ok = 1; 286 break; 287 } 288 /* 289 * Yield the processor in case we are slow 290 */ 291 msleep(1); 292 } 293 if (unlikely(ok != 1)) { 294 /* 295 * Restore interrupt mask even though we timed out 296 */ 297 aac_adapter_enable_int(dev); 298 return -ETIMEDOUT; 299 } 300 /* 301 * Pull the synch status from Mailbox 0. 302 */ 303 if (status) 304 *status = readl(&dev->IndexRegs->Mailbox[0]); 305 if (r1) 306 *r1 = readl(&dev->IndexRegs->Mailbox[1]); 307 if (r2) 308 *r2 = readl(&dev->IndexRegs->Mailbox[2]); 309 if (r3) 310 *r3 = readl(&dev->IndexRegs->Mailbox[3]); 311 if (r4) 312 *r4 = readl(&dev->IndexRegs->Mailbox[4]); 313 if (command == GET_COMM_PREFERRED_SETTINGS) 314 dev->max_msix = 315 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF; 316 /* 317 * Clear the synch command doorbell. 318 */ 319 if (!dev->msi_enabled) 320 src_writel(dev, 321 MUnit.ODR_C, 322 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 323 } 324 325 /* 326 * Restore interrupt mask 327 */ 328 aac_adapter_enable_int(dev); 329 return 0; 330 } 331 332 /** 333 * aac_src_interrupt_adapter - interrupt adapter 334 * @dev: Adapter 335 * 336 * Send an interrupt to the i960 and breakpoint it. 337 */ 338 339 static void aac_src_interrupt_adapter(struct aac_dev *dev) 340 { 341 src_sync_cmd(dev, BREAKPOINT_REQUEST, 342 0, 0, 0, 0, 0, 0, 343 NULL, NULL, NULL, NULL, NULL); 344 } 345 346 /** 347 * aac_src_notify_adapter - send an event to the adapter 348 * @dev: Adapter 349 * @event: Event to send 350 * 351 * Notify the i960 that something it probably cares about has 352 * happened. 353 */ 354 355 static void aac_src_notify_adapter(struct aac_dev *dev, u32 event) 356 { 357 switch (event) { 358 359 case AdapNormCmdQue: 360 src_writel(dev, MUnit.ODR_C, 361 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT); 362 break; 363 case HostNormRespNotFull: 364 src_writel(dev, MUnit.ODR_C, 365 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT); 366 break; 367 case AdapNormRespQue: 368 src_writel(dev, MUnit.ODR_C, 369 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT); 370 break; 371 case HostNormCmdNotFull: 372 src_writel(dev, MUnit.ODR_C, 373 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT); 374 break; 375 case FastIo: 376 src_writel(dev, MUnit.ODR_C, 377 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT); 378 break; 379 case AdapPrintfDone: 380 src_writel(dev, MUnit.ODR_C, 381 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT); 382 break; 383 default: 384 BUG(); 385 break; 386 } 387 } 388 389 /** 390 * aac_src_start_adapter - activate adapter 391 * @dev: Adapter 392 * 393 * Start up processing on an i960 based AAC adapter 394 */ 395 396 static void aac_src_start_adapter(struct aac_dev *dev) 397 { 398 union aac_init *init; 399 int i; 400 401 /* reset host_rrq_idx first */ 402 for (i = 0; i < dev->max_msix; i++) { 403 dev->host_rrq_idx[i] = i * dev->vector_cap; 404 atomic_set(&dev->rrq_outstanding[i], 0); 405 } 406 atomic_set(&dev->msix_counter, 0); 407 dev->fibs_pushed_no = 0; 408 409 init = dev->init; 410 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 411 init->r8.host_elapsed_seconds = cpu_to_le32(get_seconds()); 412 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 413 lower_32_bits(dev->init_pa), 414 upper_32_bits(dev->init_pa), 415 sizeof(struct _r8) + 416 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq), 417 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 418 } else { 419 init->r7.host_elapsed_seconds = cpu_to_le32(get_seconds()); 420 // We can only use a 32 bit address here 421 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, 422 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0, 423 NULL, NULL, NULL, NULL, NULL); 424 } 425 426 } 427 428 /** 429 * aac_src_check_health 430 * @dev: device to check if healthy 431 * 432 * Will attempt to determine if the specified adapter is alive and 433 * capable of handling requests, returning 0 if alive. 434 */ 435 static int aac_src_check_health(struct aac_dev *dev) 436 { 437 u32 status = src_readl(dev, MUnit.OMR); 438 439 /* 440 * Check to see if the board panic'd. 441 */ 442 if (unlikely(status & KERNEL_PANIC)) 443 goto err_blink; 444 445 /* 446 * Check to see if the board failed any self tests. 447 */ 448 if (unlikely(status & SELF_TEST_FAILED)) 449 goto err_out; 450 451 /* 452 * Check to see if the board failed any self tests. 453 */ 454 if (unlikely(status & MONITOR_PANIC)) 455 goto err_out; 456 457 /* 458 * Wait for the adapter to be up and running. 459 */ 460 if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) 461 return -3; 462 /* 463 * Everything is OK 464 */ 465 return 0; 466 467 err_out: 468 return -1; 469 470 err_blink: 471 return (status >> 16) & 0xFF; 472 } 473 474 static inline u32 aac_get_vector(struct aac_dev *dev) 475 { 476 return atomic_inc_return(&dev->msix_counter)%dev->max_msix; 477 } 478 479 /** 480 * aac_src_deliver_message 481 * @fib: fib to issue 482 * 483 * Will send a fib, returning 0 if successful. 484 */ 485 static int aac_src_deliver_message(struct fib *fib) 486 { 487 struct aac_dev *dev = fib->dev; 488 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 489 u32 fibsize; 490 dma_addr_t address; 491 struct aac_fib_xporthdr *pFibX; 492 int native_hba; 493 #if !defined(writeq) 494 unsigned long flags; 495 #endif 496 497 u16 vector_no; 498 499 atomic_inc(&q->numpending); 500 501 native_hba = (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA) ? 1 : 0; 502 503 504 if (dev->msi_enabled && dev->max_msix > 1 && 505 (native_hba || fib->hw_fib_va->header.Command != AifRequest)) { 506 507 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) 508 && dev->sa_firmware) 509 vector_no = aac_get_vector(dev); 510 else 511 vector_no = fib->vector_no; 512 513 if (native_hba) { 514 if (fib->flags & FIB_CONTEXT_FLAG_NATIVE_HBA_TMF) { 515 struct aac_hba_tm_req *tm_req; 516 517 tm_req = (struct aac_hba_tm_req *) 518 fib->hw_fib_va; 519 if (tm_req->iu_type == 520 HBA_IU_TYPE_SCSI_TM_REQ) { 521 ((struct aac_hba_tm_req *) 522 fib->hw_fib_va)->reply_qid 523 = vector_no; 524 ((struct aac_hba_tm_req *) 525 fib->hw_fib_va)->request_id 526 += (vector_no << 16); 527 } else { 528 ((struct aac_hba_reset_req *) 529 fib->hw_fib_va)->reply_qid 530 = vector_no; 531 ((struct aac_hba_reset_req *) 532 fib->hw_fib_va)->request_id 533 += (vector_no << 16); 534 } 535 } else { 536 ((struct aac_hba_cmd_req *) 537 fib->hw_fib_va)->reply_qid 538 = vector_no; 539 ((struct aac_hba_cmd_req *) 540 fib->hw_fib_va)->request_id 541 += (vector_no << 16); 542 } 543 } else { 544 fib->hw_fib_va->header.Handle += (vector_no << 16); 545 } 546 } else { 547 vector_no = 0; 548 } 549 550 atomic_inc(&dev->rrq_outstanding[vector_no]); 551 552 if (native_hba) { 553 address = fib->hw_fib_pa; 554 fibsize = (fib->hbacmd_size + 127) / 128 - 1; 555 if (fibsize > 31) 556 fibsize = 31; 557 address |= fibsize; 558 #if defined(writeq) 559 src_writeq(dev, MUnit.IQN_L, (u64)address); 560 #else 561 spin_lock_irqsave(&fib->dev->iq_lock, flags); 562 src_writel(dev, MUnit.IQN_H, 563 upper_32_bits(address) & 0xffffffff); 564 src_writel(dev, MUnit.IQN_L, address & 0xffffffff); 565 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 566 #endif 567 } else { 568 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2 || 569 dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 570 /* Calculate the amount to the fibsize bits */ 571 fibsize = (le16_to_cpu(fib->hw_fib_va->header.Size) 572 + 127) / 128 - 1; 573 /* New FIB header, 32-bit */ 574 address = fib->hw_fib_pa; 575 fib->hw_fib_va->header.StructType = FIB_MAGIC2; 576 fib->hw_fib_va->header.SenderFibAddress = 577 cpu_to_le32((u32)address); 578 fib->hw_fib_va->header.u.TimeStamp = 0; 579 WARN_ON(upper_32_bits(address) != 0L); 580 } else { 581 /* Calculate the amount to the fibsize bits */ 582 fibsize = (sizeof(struct aac_fib_xporthdr) + 583 le16_to_cpu(fib->hw_fib_va->header.Size) 584 + 127) / 128 - 1; 585 /* Fill XPORT header */ 586 pFibX = (struct aac_fib_xporthdr *) 587 ((unsigned char *)fib->hw_fib_va - 588 sizeof(struct aac_fib_xporthdr)); 589 pFibX->Handle = fib->hw_fib_va->header.Handle; 590 pFibX->HostAddress = 591 cpu_to_le64((u64)fib->hw_fib_pa); 592 pFibX->Size = cpu_to_le32( 593 le16_to_cpu(fib->hw_fib_va->header.Size)); 594 address = fib->hw_fib_pa - 595 (u64)sizeof(struct aac_fib_xporthdr); 596 } 597 if (fibsize > 31) 598 fibsize = 31; 599 address |= fibsize; 600 601 #if defined(writeq) 602 src_writeq(dev, MUnit.IQ_L, (u64)address); 603 #else 604 spin_lock_irqsave(&fib->dev->iq_lock, flags); 605 src_writel(dev, MUnit.IQ_H, 606 upper_32_bits(address) & 0xffffffff); 607 src_writel(dev, MUnit.IQ_L, address & 0xffffffff); 608 spin_unlock_irqrestore(&fib->dev->iq_lock, flags); 609 #endif 610 } 611 return 0; 612 } 613 614 /** 615 * aac_src_ioremap 616 * @size: mapping resize request 617 * 618 */ 619 static int aac_src_ioremap(struct aac_dev *dev, u32 size) 620 { 621 if (!size) { 622 iounmap(dev->regs.src.bar1); 623 dev->regs.src.bar1 = NULL; 624 iounmap(dev->regs.src.bar0); 625 dev->base = dev->regs.src.bar0 = NULL; 626 return 0; 627 } 628 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), 629 AAC_MIN_SRC_BAR1_SIZE); 630 dev->base = NULL; 631 if (dev->regs.src.bar1 == NULL) 632 return -1; 633 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 634 if (dev->base == NULL) { 635 iounmap(dev->regs.src.bar1); 636 dev->regs.src.bar1 = NULL; 637 return -1; 638 } 639 dev->IndexRegs = &((struct src_registers __iomem *) 640 dev->base)->u.tupelo.IndexRegs; 641 return 0; 642 } 643 644 /** 645 * aac_srcv_ioremap 646 * @size: mapping resize request 647 * 648 */ 649 static int aac_srcv_ioremap(struct aac_dev *dev, u32 size) 650 { 651 if (!size) { 652 iounmap(dev->regs.src.bar0); 653 dev->base = dev->regs.src.bar0 = NULL; 654 return 0; 655 } 656 657 dev->regs.src.bar1 = 658 ioremap(pci_resource_start(dev->pdev, 2), AAC_MIN_SRCV_BAR1_SIZE); 659 dev->base = NULL; 660 if (dev->regs.src.bar1 == NULL) 661 return -1; 662 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 663 if (dev->base == NULL) { 664 iounmap(dev->regs.src.bar1); 665 dev->regs.src.bar1 = NULL; 666 return -1; 667 } 668 dev->IndexRegs = &((struct src_registers __iomem *) 669 dev->base)->u.denali.IndexRegs; 670 return 0; 671 } 672 673 void aac_set_intx_mode(struct aac_dev *dev) 674 { 675 if (dev->msi_enabled) { 676 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 677 dev->msi_enabled = 0; 678 msleep(5000); /* Delay 5 seconds */ 679 } 680 } 681 682 static void aac_dump_fw_fib_iop_reset(struct aac_dev *dev) 683 { 684 __le32 supported_options3; 685 686 if (!aac_fib_dump) 687 return; 688 689 supported_options3 = dev->supplement_adapter_info.supported_options3; 690 if (!(supported_options3 & AAC_OPTION_SUPPORTED3_IOP_RESET_FIB_DUMP)) 691 return; 692 693 aac_adapter_sync_cmd(dev, IOP_RESET_FW_FIB_DUMP, 694 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 695 } 696 697 static void aac_send_iop_reset(struct aac_dev *dev, int bled) 698 { 699 u32 var, reset_mask; 700 701 aac_dump_fw_fib_iop_reset(dev); 702 703 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, 704 0, 0, 0, 0, 0, 0, &var, 705 &reset_mask, NULL, NULL, NULL); 706 707 if ((bled || var != 0x00000001) && !dev->doorbell_mask) 708 bled = -EINVAL; 709 else if (dev->doorbell_mask) { 710 reset_mask = dev->doorbell_mask; 711 bled = 0; 712 var = 0x00000001; 713 } 714 715 aac_set_intx_mode(dev); 716 717 if (!bled && (dev->supplement_adapter_info.supported_options2 & 718 AAC_OPTION_DOORBELL_RESET)) { 719 src_writel(dev, MUnit.IDR, reset_mask); 720 } else { 721 src_writel(dev, MUnit.IDR, 0x100); 722 } 723 msleep(30000); 724 } 725 726 static void aac_send_hardware_soft_reset(struct aac_dev *dev) 727 { 728 u_int32_t val; 729 730 val = readl(((char *)(dev->base) + IBW_SWR_OFFSET)); 731 val |= 0x01; 732 writel(val, ((char *)(dev->base) + IBW_SWR_OFFSET)); 733 msleep_interruptible(20000); 734 } 735 736 static int aac_src_restart_adapter(struct aac_dev *dev, int bled, u8 reset_type) 737 { 738 unsigned long status, start; 739 740 if (bled < 0) 741 goto invalid_out; 742 743 if (bled) 744 pr_err("%s%d: adapter kernel panic'd %x.\n", 745 dev->name, dev->id, bled); 746 747 /* 748 * When there is a BlinkLED, IOP_RESET has not effect 749 */ 750 if (bled >= 2 && dev->sa_firmware && reset_type & HW_IOP_RESET) 751 reset_type &= ~HW_IOP_RESET; 752 753 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 754 755 switch (reset_type) { 756 case IOP_HWSOFT_RESET: 757 aac_send_iop_reset(dev, bled); 758 /* 759 * Check to see if KERNEL_UP_AND_RUNNING 760 * Wait for the adapter to be up and running. 761 * If !KERNEL_UP_AND_RUNNING issue HW Soft Reset 762 */ 763 status = src_readl(dev, MUnit.OMR); 764 if (dev->sa_firmware 765 && !(status & KERNEL_UP_AND_RUNNING)) { 766 start = jiffies; 767 do { 768 status = src_readl(dev, MUnit.OMR); 769 if (time_after(jiffies, 770 start+HZ*SOFT_RESET_TIME)) { 771 aac_send_hardware_soft_reset(dev); 772 start = jiffies; 773 } 774 } while (!(status & KERNEL_UP_AND_RUNNING)); 775 } 776 break; 777 case HW_SOFT_RESET: 778 if (dev->sa_firmware) { 779 aac_send_hardware_soft_reset(dev); 780 aac_set_intx_mode(dev); 781 } 782 break; 783 default: 784 aac_send_iop_reset(dev, bled); 785 break; 786 } 787 788 invalid_out: 789 790 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) 791 return -ENODEV; 792 793 if (startup_timeout < 300) 794 startup_timeout = 300; 795 796 return 0; 797 } 798 799 /** 800 * aac_src_select_comm - Select communications method 801 * @dev: Adapter 802 * @comm: communications method 803 */ 804 static int aac_src_select_comm(struct aac_dev *dev, int comm) 805 { 806 switch (comm) { 807 case AAC_COMM_MESSAGE: 808 dev->a_ops.adapter_intr = aac_src_intr_message; 809 dev->a_ops.adapter_deliver = aac_src_deliver_message; 810 break; 811 default: 812 return 1; 813 } 814 return 0; 815 } 816 817 /** 818 * aac_src_init - initialize an Cardinal Frey Bar card 819 * @dev: device to configure 820 * 821 */ 822 823 int aac_src_init(struct aac_dev *dev) 824 { 825 unsigned long start; 826 unsigned long status; 827 int restart = 0; 828 int instance = dev->id; 829 const char *name = dev->name; 830 831 dev->a_ops.adapter_ioremap = aac_src_ioremap; 832 dev->a_ops.adapter_comm = aac_src_select_comm; 833 834 dev->base_size = AAC_MIN_SRC_BAR0_SIZE; 835 if (aac_adapter_ioremap(dev, dev->base_size)) { 836 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 837 goto error_iounmap; 838 } 839 840 /* Failure to reset here is an option ... */ 841 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 842 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 843 if ((aac_reset_devices || reset_devices) && 844 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 845 ++restart; 846 /* 847 * Check to see if the board panic'd while booting. 848 */ 849 status = src_readl(dev, MUnit.OMR); 850 if (status & KERNEL_PANIC) { 851 if (aac_src_restart_adapter(dev, 852 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 853 goto error_iounmap; 854 ++restart; 855 } 856 /* 857 * Check to see if the board failed any self tests. 858 */ 859 status = src_readl(dev, MUnit.OMR); 860 if (status & SELF_TEST_FAILED) { 861 printk(KERN_ERR "%s%d: adapter self-test failed.\n", 862 dev->name, instance); 863 goto error_iounmap; 864 } 865 /* 866 * Check to see if the monitor panic'd while booting. 867 */ 868 if (status & MONITOR_PANIC) { 869 printk(KERN_ERR "%s%d: adapter monitor panic.\n", 870 dev->name, instance); 871 goto error_iounmap; 872 } 873 start = jiffies; 874 /* 875 * Wait for the adapter to be up and running. Wait up to 3 minutes 876 */ 877 while (!((status = src_readl(dev, MUnit.OMR)) & 878 KERNEL_UP_AND_RUNNING)) { 879 if ((restart && 880 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 881 time_after(jiffies, start+HZ*startup_timeout)) { 882 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 883 dev->name, instance, status); 884 goto error_iounmap; 885 } 886 if (!restart && 887 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 888 time_after(jiffies, start + HZ * 889 ((startup_timeout > 60) 890 ? (startup_timeout - 60) 891 : (startup_timeout / 2))))) { 892 if (likely(!aac_src_restart_adapter(dev, 893 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 894 start = jiffies; 895 ++restart; 896 } 897 msleep(1); 898 } 899 if (restart && aac_commit) 900 aac_commit = 1; 901 /* 902 * Fill in the common function dispatch table. 903 */ 904 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 905 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 906 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 907 dev->a_ops.adapter_notify = aac_src_notify_adapter; 908 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 909 dev->a_ops.adapter_check_health = aac_src_check_health; 910 dev->a_ops.adapter_restart = aac_src_restart_adapter; 911 dev->a_ops.adapter_start = aac_src_start_adapter; 912 913 /* 914 * First clear out all interrupts. Then enable the one's that we 915 * can handle. 916 */ 917 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 918 aac_adapter_disable_int(dev); 919 src_writel(dev, MUnit.ODR_C, 0xffffffff); 920 aac_adapter_enable_int(dev); 921 922 if (aac_init_adapter(dev) == NULL) 923 goto error_iounmap; 924 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) 925 goto error_iounmap; 926 927 dev->msi = !pci_enable_msi(dev->pdev); 928 929 dev->aac_msix[0].vector_no = 0; 930 dev->aac_msix[0].dev = dev; 931 932 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 933 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) { 934 935 if (dev->msi) 936 pci_disable_msi(dev->pdev); 937 938 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 939 name, instance); 940 goto error_iounmap; 941 } 942 dev->dbg_base = pci_resource_start(dev->pdev, 2); 943 dev->dbg_base_mapped = dev->regs.src.bar1; 944 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; 945 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 946 947 aac_adapter_enable_int(dev); 948 949 if (!dev->sync_mode) { 950 /* 951 * Tell the adapter that all is configured, and it can 952 * start accepting requests 953 */ 954 aac_src_start_adapter(dev); 955 } 956 return 0; 957 958 error_iounmap: 959 960 return -1; 961 } 962 963 /** 964 * aac_srcv_init - initialize an SRCv card 965 * @dev: device to configure 966 * 967 */ 968 969 int aac_srcv_init(struct aac_dev *dev) 970 { 971 unsigned long start; 972 unsigned long status; 973 int restart = 0; 974 int instance = dev->id; 975 const char *name = dev->name; 976 977 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; 978 dev->a_ops.adapter_comm = aac_src_select_comm; 979 980 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; 981 if (aac_adapter_ioremap(dev, dev->base_size)) { 982 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 983 goto error_iounmap; 984 } 985 986 /* Failure to reset here is an option ... */ 987 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 988 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 989 if ((aac_reset_devices || reset_devices) && 990 !aac_src_restart_adapter(dev, 0, IOP_HWSOFT_RESET)) 991 ++restart; 992 /* 993 * Check to see if flash update is running. 994 * Wait for the adapter to be up and running. Wait up to 5 minutes 995 */ 996 status = src_readl(dev, MUnit.OMR); 997 if (status & FLASH_UPD_PENDING) { 998 start = jiffies; 999 do { 1000 status = src_readl(dev, MUnit.OMR); 1001 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) { 1002 printk(KERN_ERR "%s%d: adapter flash update failed.\n", 1003 dev->name, instance); 1004 goto error_iounmap; 1005 } 1006 } while (!(status & FLASH_UPD_SUCCESS) && 1007 !(status & FLASH_UPD_FAILED)); 1008 /* Delay 10 seconds. 1009 * Because right now FW is doing a soft reset, 1010 * do not read scratch pad register at this time 1011 */ 1012 ssleep(10); 1013 } 1014 /* 1015 * Check to see if the board panic'd while booting. 1016 */ 1017 status = src_readl(dev, MUnit.OMR); 1018 if (status & KERNEL_PANIC) { 1019 if (aac_src_restart_adapter(dev, 1020 aac_src_check_health(dev), IOP_HWSOFT_RESET)) 1021 goto error_iounmap; 1022 ++restart; 1023 } 1024 /* 1025 * Check to see if the board failed any self tests. 1026 */ 1027 status = src_readl(dev, MUnit.OMR); 1028 if (status & SELF_TEST_FAILED) { 1029 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); 1030 goto error_iounmap; 1031 } 1032 /* 1033 * Check to see if the monitor panic'd while booting. 1034 */ 1035 if (status & MONITOR_PANIC) { 1036 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); 1037 goto error_iounmap; 1038 } 1039 start = jiffies; 1040 /* 1041 * Wait for the adapter to be up and running. Wait up to 3 minutes 1042 */ 1043 while (!((status = src_readl(dev, MUnit.OMR)) & 1044 KERNEL_UP_AND_RUNNING) || 1045 status == 0xffffffff) { 1046 if ((restart && 1047 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 1048 time_after(jiffies, start+HZ*startup_timeout)) { 1049 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 1050 dev->name, instance, status); 1051 goto error_iounmap; 1052 } 1053 if (!restart && 1054 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 1055 time_after(jiffies, start + HZ * 1056 ((startup_timeout > 60) 1057 ? (startup_timeout - 60) 1058 : (startup_timeout / 2))))) { 1059 if (likely(!aac_src_restart_adapter(dev, 1060 aac_src_check_health(dev), IOP_HWSOFT_RESET))) 1061 start = jiffies; 1062 ++restart; 1063 } 1064 msleep(1); 1065 } 1066 if (restart && aac_commit) 1067 aac_commit = 1; 1068 /* 1069 * Fill in the common function dispatch table. 1070 */ 1071 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 1072 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 1073 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 1074 dev->a_ops.adapter_notify = aac_src_notify_adapter; 1075 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 1076 dev->a_ops.adapter_check_health = aac_src_check_health; 1077 dev->a_ops.adapter_restart = aac_src_restart_adapter; 1078 dev->a_ops.adapter_start = aac_src_start_adapter; 1079 1080 /* 1081 * First clear out all interrupts. Then enable the one's that we 1082 * can handle. 1083 */ 1084 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 1085 aac_adapter_disable_int(dev); 1086 src_writel(dev, MUnit.ODR_C, 0xffffffff); 1087 aac_adapter_enable_int(dev); 1088 1089 if (aac_init_adapter(dev) == NULL) 1090 goto error_iounmap; 1091 if ((dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) && 1092 (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3)) 1093 goto error_iounmap; 1094 if (dev->msi_enabled) 1095 aac_src_access_devreg(dev, AAC_ENABLE_MSIX); 1096 1097 if (aac_acquire_irq(dev)) 1098 goto error_iounmap; 1099 1100 dev->dbg_base = pci_resource_start(dev->pdev, 2); 1101 dev->dbg_base_mapped = dev->regs.src.bar1; 1102 dev->dbg_size = AAC_MIN_SRCV_BAR1_SIZE; 1103 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 1104 1105 aac_adapter_enable_int(dev); 1106 1107 if (!dev->sync_mode) { 1108 /* 1109 * Tell the adapter that all is configured, and it can 1110 * start accepting requests 1111 */ 1112 aac_src_start_adapter(dev); 1113 } 1114 return 0; 1115 1116 error_iounmap: 1117 1118 return -1; 1119 } 1120 1121 void aac_src_access_devreg(struct aac_dev *dev, int mode) 1122 { 1123 u_int32_t val; 1124 1125 switch (mode) { 1126 case AAC_ENABLE_INTERRUPT: 1127 src_writel(dev, 1128 MUnit.OIMR, 1129 dev->OIMR = (dev->msi_enabled ? 1130 AAC_INT_ENABLE_TYPE1_MSIX : 1131 AAC_INT_ENABLE_TYPE1_INTX)); 1132 break; 1133 1134 case AAC_DISABLE_INTERRUPT: 1135 src_writel(dev, 1136 MUnit.OIMR, 1137 dev->OIMR = AAC_INT_DISABLE_ALL); 1138 break; 1139 1140 case AAC_ENABLE_MSIX: 1141 /* set bit 6 */ 1142 val = src_readl(dev, MUnit.IDR); 1143 val |= 0x40; 1144 src_writel(dev, MUnit.IDR, val); 1145 src_readl(dev, MUnit.IDR); 1146 /* unmask int. */ 1147 val = PMC_ALL_INTERRUPT_BITS; 1148 src_writel(dev, MUnit.IOAR, val); 1149 val = src_readl(dev, MUnit.OIMR); 1150 src_writel(dev, 1151 MUnit.OIMR, 1152 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0))); 1153 break; 1154 1155 case AAC_DISABLE_MSIX: 1156 /* reset bit 6 */ 1157 val = src_readl(dev, MUnit.IDR); 1158 val &= ~0x40; 1159 src_writel(dev, MUnit.IDR, val); 1160 src_readl(dev, MUnit.IDR); 1161 break; 1162 1163 case AAC_CLEAR_AIF_BIT: 1164 /* set bit 5 */ 1165 val = src_readl(dev, MUnit.IDR); 1166 val |= 0x20; 1167 src_writel(dev, MUnit.IDR, val); 1168 src_readl(dev, MUnit.IDR); 1169 break; 1170 1171 case AAC_CLEAR_SYNC_BIT: 1172 /* set bit 4 */ 1173 val = src_readl(dev, MUnit.IDR); 1174 val |= 0x10; 1175 src_writel(dev, MUnit.IDR, val); 1176 src_readl(dev, MUnit.IDR); 1177 break; 1178 1179 case AAC_ENABLE_INTX: 1180 /* set bit 7 */ 1181 val = src_readl(dev, MUnit.IDR); 1182 val |= 0x80; 1183 src_writel(dev, MUnit.IDR, val); 1184 src_readl(dev, MUnit.IDR); 1185 /* unmask int. */ 1186 val = PMC_ALL_INTERRUPT_BITS; 1187 src_writel(dev, MUnit.IOAR, val); 1188 src_readl(dev, MUnit.IOAR); 1189 val = src_readl(dev, MUnit.OIMR); 1190 src_writel(dev, MUnit.OIMR, 1191 val & (~(PMC_GLOBAL_INT_BIT2))); 1192 break; 1193 1194 default: 1195 break; 1196 } 1197 } 1198 1199 static int aac_src_get_sync_status(struct aac_dev *dev) 1200 { 1201 1202 int val; 1203 1204 if (dev->msi_enabled) 1205 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0; 1206 else 1207 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT; 1208 1209 return val; 1210 } 1211