1 /* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com) 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2, or (at your option) 15 * any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; see the file COPYING. If not, write to 24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 25 * 26 * Module Name: 27 * comminit.c 28 * 29 * Abstract: This supports the initialization of the host adapter commuication interface. 30 * This is a platform dependent module for the pci cyclone board. 31 * 32 */ 33 34 #include <linux/kernel.h> 35 #include <linux/init.h> 36 #include <linux/types.h> 37 #include <linux/pci.h> 38 #include <linux/spinlock.h> 39 #include <linux/slab.h> 40 #include <linux/blkdev.h> 41 #include <linux/delay.h> 42 #include <linux/completion.h> 43 #include <linux/mm.h> 44 #include <scsi/scsi_host.h> 45 46 #include "aacraid.h" 47 48 struct aac_common aac_config = { 49 .irq_mod = 1 50 }; 51 52 static inline int aac_is_msix_mode(struct aac_dev *dev) 53 { 54 u32 status = 0; 55 56 if (aac_is_src(dev)) 57 status = src_readl(dev, MUnit.OMR); 58 return (status & AAC_INT_MODE_MSIX); 59 } 60 61 static inline void aac_change_to_intx(struct aac_dev *dev) 62 { 63 aac_src_access_devreg(dev, AAC_DISABLE_MSIX); 64 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 65 } 66 67 static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign) 68 { 69 unsigned char *base; 70 unsigned long size, align; 71 const unsigned long fibsize = dev->max_fib_size; 72 const unsigned long printfbufsiz = 256; 73 unsigned long host_rrq_size, aac_init_size; 74 union aac_init *init; 75 dma_addr_t phys; 76 unsigned long aac_max_hostphysmempages; 77 78 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || 79 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || 80 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && 81 !dev->sa_firmware)) { 82 host_rrq_size = 83 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) 84 * sizeof(u32); 85 aac_init_size = sizeof(union aac_init); 86 } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && 87 dev->sa_firmware) { 88 host_rrq_size = (dev->scsi_host_ptr->can_queue 89 + AAC_NUM_MGT_FIB) * sizeof(u32) * AAC_MAX_MSIX; 90 aac_init_size = sizeof(union aac_init) + 91 (AAC_MAX_HRRQ - 1) * sizeof(struct _rrq); 92 } else { 93 host_rrq_size = 0; 94 aac_init_size = sizeof(union aac_init); 95 } 96 size = fibsize + aac_init_size + commsize + commalign + 97 printfbufsiz + host_rrq_size; 98 99 base = dma_alloc_coherent(&dev->pdev->dev, size, &phys, GFP_KERNEL); 100 if (base == NULL) { 101 printk(KERN_ERR "aacraid: unable to create mapping.\n"); 102 return 0; 103 } 104 105 dev->comm_addr = (void *)base; 106 dev->comm_phys = phys; 107 dev->comm_size = size; 108 109 if ((dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) || 110 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) || 111 (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3)) { 112 dev->host_rrq = (u32 *)(base + fibsize); 113 dev->host_rrq_pa = phys + fibsize; 114 memset(dev->host_rrq, 0, host_rrq_size); 115 } 116 117 dev->init = (union aac_init *)(base + fibsize + host_rrq_size); 118 dev->init_pa = phys + fibsize + host_rrq_size; 119 120 init = dev->init; 121 122 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3) { 123 int i; 124 u64 addr; 125 126 init->r8.init_struct_revision = 127 cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_8); 128 init->r8.init_flags = cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | 129 INITFLAGS_DRIVER_USES_UTC_TIME | 130 INITFLAGS_DRIVER_SUPPORTS_PM); 131 init->r8.init_flags |= 132 cpu_to_le32(INITFLAGS_DRIVER_SUPPORTS_HBA_MODE); 133 init->r8.rr_queue_count = cpu_to_le32(dev->max_msix); 134 init->r8.max_io_size = 135 cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9); 136 init->r8.max_num_aif = init->r8.reserved1 = 137 init->r8.reserved2 = 0; 138 139 for (i = 0; i < dev->max_msix; i++) { 140 addr = (u64)dev->host_rrq_pa + dev->vector_cap * i * 141 sizeof(u32); 142 init->r8.rrq[i].host_addr_high = cpu_to_le32( 143 upper_32_bits(addr)); 144 init->r8.rrq[i].host_addr_low = cpu_to_le32( 145 lower_32_bits(addr)); 146 init->r8.rrq[i].msix_id = i; 147 init->r8.rrq[i].element_count = cpu_to_le16( 148 (u16)dev->vector_cap); 149 init->r8.rrq[i].comp_thresh = 150 init->r8.rrq[i].unused = 0; 151 } 152 153 pr_warn("aacraid: Comm Interface type3 enabled\n"); 154 } else { 155 init->r7.init_struct_revision = 156 cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION); 157 if (dev->max_fib_size != sizeof(struct hw_fib)) 158 init->r7.init_struct_revision = 159 cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4); 160 init->r7.no_of_msix_vectors = cpu_to_le32(SA_MINIPORT_REVISION); 161 init->r7.fsrev = cpu_to_le32(dev->fsrev); 162 163 /* 164 * Adapter Fibs are the first thing allocated so that they 165 * start page aligned 166 */ 167 dev->aif_base_va = (struct hw_fib *)base; 168 169 init->r7.adapter_fibs_virtual_address = 0; 170 init->r7.adapter_fibs_physical_address = cpu_to_le32((u32)phys); 171 init->r7.adapter_fibs_size = cpu_to_le32(fibsize); 172 init->r7.adapter_fib_align = cpu_to_le32(sizeof(struct hw_fib)); 173 174 /* 175 * number of 4k pages of host physical memory. The aacraid fw 176 * needs this number to be less than 4gb worth of pages. New 177 * firmware doesn't have any issues with the mapping system, but 178 * older Firmware did, and had *troubles* dealing with the math 179 * overloading past 32 bits, thus we must limit this field. 180 */ 181 aac_max_hostphysmempages = 182 dma_get_required_mask(&dev->pdev->dev) >> 12; 183 if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES) 184 init->r7.host_phys_mem_pages = 185 cpu_to_le32(aac_max_hostphysmempages); 186 else 187 init->r7.host_phys_mem_pages = 188 cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES); 189 190 init->r7.init_flags = 191 cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME | 192 INITFLAGS_DRIVER_SUPPORTS_PM); 193 init->r7.max_io_commands = 194 cpu_to_le32(dev->scsi_host_ptr->can_queue + 195 AAC_NUM_MGT_FIB); 196 init->r7.max_io_size = 197 cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9); 198 init->r7.max_fib_size = cpu_to_le32(dev->max_fib_size); 199 init->r7.max_num_aif = cpu_to_le32(dev->max_num_aif); 200 201 if (dev->comm_interface == AAC_COMM_MESSAGE) { 202 init->r7.init_flags |= 203 cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED); 204 pr_warn("aacraid: Comm Interface enabled\n"); 205 } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) { 206 init->r7.init_struct_revision = 207 cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6); 208 init->r7.init_flags |= 209 cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | 210 INITFLAGS_NEW_COMM_TYPE1_SUPPORTED | 211 INITFLAGS_FAST_JBOD_SUPPORTED); 212 init->r7.host_rrq_addr_high = 213 cpu_to_le32(upper_32_bits(dev->host_rrq_pa)); 214 init->r7.host_rrq_addr_low = 215 cpu_to_le32(lower_32_bits(dev->host_rrq_pa)); 216 pr_warn("aacraid: Comm Interface type1 enabled\n"); 217 } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { 218 init->r7.init_struct_revision = 219 cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7); 220 init->r7.init_flags |= 221 cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | 222 INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | 223 INITFLAGS_FAST_JBOD_SUPPORTED); 224 init->r7.host_rrq_addr_high = 225 cpu_to_le32(upper_32_bits(dev->host_rrq_pa)); 226 init->r7.host_rrq_addr_low = 227 cpu_to_le32(lower_32_bits(dev->host_rrq_pa)); 228 init->r7.no_of_msix_vectors = 229 cpu_to_le32(dev->max_msix); 230 /* must be the COMM_PREFERRED_SETTINGS values */ 231 pr_warn("aacraid: Comm Interface type2 enabled\n"); 232 } 233 } 234 235 /* 236 * Increment the base address by the amount already used 237 */ 238 base = base + fibsize + host_rrq_size + aac_init_size; 239 phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size + 240 aac_init_size); 241 242 /* 243 * Align the beginning of Headers to commalign 244 */ 245 align = (commalign - ((uintptr_t)(base) & (commalign - 1))); 246 base = base + align; 247 phys = phys + align; 248 /* 249 * Fill in addresses of the Comm Area Headers and Queues 250 */ 251 *commaddr = base; 252 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) 253 init->r7.comm_header_address = cpu_to_le32((u32)phys); 254 /* 255 * Increment the base address by the size of the CommArea 256 */ 257 base = base + commsize; 258 phys = phys + commsize; 259 /* 260 * Place the Printf buffer area after the Fast I/O comm area. 261 */ 262 dev->printfbuf = (void *)base; 263 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE3) { 264 init->r7.printfbuf = cpu_to_le32(phys); 265 init->r7.printfbufsiz = cpu_to_le32(printfbufsiz); 266 } 267 memset(base, 0, printfbufsiz); 268 return 1; 269 } 270 271 static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize) 272 { 273 atomic_set(&q->numpending, 0); 274 q->dev = dev; 275 init_waitqueue_head(&q->cmdready); 276 INIT_LIST_HEAD(&q->cmdq); 277 init_waitqueue_head(&q->qfull); 278 spin_lock_init(&q->lockdata); 279 q->lock = &q->lockdata; 280 q->headers.producer = (__le32 *)mem; 281 q->headers.consumer = (__le32 *)(mem+1); 282 *(q->headers.producer) = cpu_to_le32(qsize); 283 *(q->headers.consumer) = cpu_to_le32(qsize); 284 q->entries = qsize; 285 } 286 287 /** 288 * aac_send_shutdown - shutdown an adapter 289 * @dev: Adapter to shutdown 290 * 291 * This routine will send a VM_CloseAll (shutdown) request to the adapter. 292 */ 293 294 int aac_send_shutdown(struct aac_dev * dev) 295 { 296 struct fib * fibctx; 297 struct aac_close *cmd; 298 int status; 299 300 fibctx = aac_fib_alloc(dev); 301 if (!fibctx) 302 return -ENOMEM; 303 aac_fib_init(fibctx); 304 305 if (!dev->adapter_shutdown) { 306 mutex_lock(&dev->ioctl_mutex); 307 dev->adapter_shutdown = 1; 308 mutex_unlock(&dev->ioctl_mutex); 309 } 310 311 cmd = (struct aac_close *) fib_data(fibctx); 312 cmd->command = cpu_to_le32(VM_CloseAll); 313 cmd->cid = cpu_to_le32(0xfffffffe); 314 315 status = aac_fib_send(ContainerCommand, 316 fibctx, 317 sizeof(struct aac_close), 318 FsaNormal, 319 -2 /* Timeout silently */, 1, 320 NULL, NULL); 321 322 if (status >= 0) 323 aac_fib_complete(fibctx); 324 /* FIB should be freed only after getting the response from the F/W */ 325 if (status != -ERESTARTSYS) 326 aac_fib_free(fibctx); 327 if (aac_is_src(dev) && 328 dev->msi_enabled) 329 aac_set_intx_mode(dev); 330 return status; 331 } 332 333 /** 334 * aac_comm_init - Initialise FSA data structures 335 * @dev: Adapter to initialise 336 * 337 * Initializes the data structures that are required for the FSA commuication 338 * interface to operate. 339 * Returns 340 * 1 - if we were able to init the commuication interface. 341 * 0 - If there were errors initing. This is a fatal error. 342 */ 343 344 static int aac_comm_init(struct aac_dev * dev) 345 { 346 unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2; 347 unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES; 348 u32 *headers; 349 struct aac_entry * queues; 350 unsigned long size; 351 struct aac_queue_block * comm = dev->queues; 352 /* 353 * Now allocate and initialize the zone structures used as our 354 * pool of FIB context records. The size of the zone is based 355 * on the system memory size. We also initialize the mutex used 356 * to protect the zone. 357 */ 358 spin_lock_init(&dev->fib_lock); 359 360 /* 361 * Allocate the physically contiguous space for the commuication 362 * queue headers. 363 */ 364 365 size = hdrsize + queuesize; 366 367 if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT)) 368 return -ENOMEM; 369 370 queues = (struct aac_entry *)(((ulong)headers) + hdrsize); 371 372 /* Adapter to Host normal priority Command queue */ 373 comm->queue[HostNormCmdQueue].base = queues; 374 aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES); 375 queues += HOST_NORM_CMD_ENTRIES; 376 headers += 2; 377 378 /* Adapter to Host high priority command queue */ 379 comm->queue[HostHighCmdQueue].base = queues; 380 aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES); 381 382 queues += HOST_HIGH_CMD_ENTRIES; 383 headers +=2; 384 385 /* Host to adapter normal priority command queue */ 386 comm->queue[AdapNormCmdQueue].base = queues; 387 aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES); 388 389 queues += ADAP_NORM_CMD_ENTRIES; 390 headers += 2; 391 392 /* host to adapter high priority command queue */ 393 comm->queue[AdapHighCmdQueue].base = queues; 394 aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES); 395 396 queues += ADAP_HIGH_CMD_ENTRIES; 397 headers += 2; 398 399 /* adapter to host normal priority response queue */ 400 comm->queue[HostNormRespQueue].base = queues; 401 aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES); 402 queues += HOST_NORM_RESP_ENTRIES; 403 headers += 2; 404 405 /* adapter to host high priority response queue */ 406 comm->queue[HostHighRespQueue].base = queues; 407 aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES); 408 409 queues += HOST_HIGH_RESP_ENTRIES; 410 headers += 2; 411 412 /* host to adapter normal priority response queue */ 413 comm->queue[AdapNormRespQueue].base = queues; 414 aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES); 415 416 queues += ADAP_NORM_RESP_ENTRIES; 417 headers += 2; 418 419 /* host to adapter high priority response queue */ 420 comm->queue[AdapHighRespQueue].base = queues; 421 aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES); 422 423 comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock; 424 comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock; 425 comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock; 426 comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock; 427 428 return 0; 429 } 430 431 void aac_define_int_mode(struct aac_dev *dev) 432 { 433 int i, msi_count, min_msix; 434 435 msi_count = i = 0; 436 /* max. vectors from GET_COMM_PREFERRED_SETTINGS */ 437 if (dev->max_msix == 0 || 438 dev->pdev->device == PMC_DEVICE_S6 || 439 dev->sync_mode) { 440 dev->max_msix = 1; 441 dev->vector_cap = 442 dev->scsi_host_ptr->can_queue + 443 AAC_NUM_MGT_FIB; 444 return; 445 } 446 447 /* Don't bother allocating more MSI-X vectors than cpus */ 448 msi_count = min(dev->max_msix, 449 (unsigned int)num_online_cpus()); 450 451 dev->max_msix = msi_count; 452 453 if (msi_count > AAC_MAX_MSIX) 454 msi_count = AAC_MAX_MSIX; 455 456 if (msi_count > 1 && 457 pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) { 458 min_msix = 2; 459 i = pci_alloc_irq_vectors(dev->pdev, 460 min_msix, msi_count, 461 PCI_IRQ_MSIX | PCI_IRQ_AFFINITY); 462 if (i > 0) { 463 dev->msi_enabled = 1; 464 msi_count = i; 465 } else { 466 dev->msi_enabled = 0; 467 dev_err(&dev->pdev->dev, 468 "MSIX not supported!! Will try INTX 0x%x.\n", i); 469 } 470 } 471 472 if (!dev->msi_enabled) 473 dev->max_msix = msi_count = 1; 474 else { 475 if (dev->max_msix > msi_count) 476 dev->max_msix = msi_count; 477 } 478 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE3 && dev->sa_firmware) 479 dev->vector_cap = dev->scsi_host_ptr->can_queue + 480 AAC_NUM_MGT_FIB; 481 else 482 dev->vector_cap = (dev->scsi_host_ptr->can_queue + 483 AAC_NUM_MGT_FIB) / msi_count; 484 485 } 486 struct aac_dev *aac_init_adapter(struct aac_dev *dev) 487 { 488 u32 status[5]; 489 struct Scsi_Host * host = dev->scsi_host_ptr; 490 extern int aac_sync_mode; 491 492 /* 493 * Check the preferred comm settings, defaults from template. 494 */ 495 dev->management_fib_count = 0; 496 spin_lock_init(&dev->manage_lock); 497 spin_lock_init(&dev->sync_lock); 498 spin_lock_init(&dev->iq_lock); 499 dev->max_fib_size = sizeof(struct hw_fib); 500 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size 501 - sizeof(struct aac_fibhdr) 502 - sizeof(struct aac_write) + sizeof(struct sgentry)) 503 / sizeof(struct sgentry); 504 dev->comm_interface = AAC_COMM_PRODUCER; 505 dev->raw_io_interface = dev->raw_io_64 = 0; 506 507 508 /* 509 * Enable INTX mode, if not done already Enabled 510 */ 511 if (aac_is_msix_mode(dev)) { 512 aac_change_to_intx(dev); 513 dev_info(&dev->pdev->dev, "Changed firmware to INTX mode"); 514 } 515 516 if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES, 517 0, 0, 0, 0, 0, 0, 518 status+0, status+1, status+2, status+3, status+4)) && 519 (status[0] == 0x00000001)) { 520 dev->doorbell_mask = status[3]; 521 if (status[1] & AAC_OPT_NEW_COMM_64) 522 dev->raw_io_64 = 1; 523 dev->sync_mode = aac_sync_mode; 524 if (dev->a_ops.adapter_comm && 525 (status[1] & AAC_OPT_NEW_COMM)) { 526 dev->comm_interface = AAC_COMM_MESSAGE; 527 dev->raw_io_interface = 1; 528 if ((status[1] & AAC_OPT_NEW_COMM_TYPE1)) { 529 /* driver supports TYPE1 (Tupelo) */ 530 dev->comm_interface = AAC_COMM_MESSAGE_TYPE1; 531 } else if (status[1] & AAC_OPT_NEW_COMM_TYPE2) { 532 /* driver supports TYPE2 (Denali, Yosemite) */ 533 dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; 534 } else if (status[1] & AAC_OPT_NEW_COMM_TYPE3) { 535 /* driver supports TYPE3 (Yosemite, Thor) */ 536 dev->comm_interface = AAC_COMM_MESSAGE_TYPE3; 537 } else if (status[1] & AAC_OPT_NEW_COMM_TYPE4) { 538 /* not supported TYPE - switch to sync. mode */ 539 dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; 540 dev->sync_mode = 1; 541 } 542 } 543 if ((status[1] & le32_to_cpu(AAC_OPT_EXTENDED)) && 544 (status[4] & le32_to_cpu(AAC_EXTOPT_SA_FIRMWARE))) 545 dev->sa_firmware = 1; 546 else 547 dev->sa_firmware = 0; 548 549 if ((dev->comm_interface == AAC_COMM_MESSAGE) && 550 (status[2] > dev->base_size)) { 551 aac_adapter_ioremap(dev, 0); 552 dev->base_size = status[2]; 553 if (aac_adapter_ioremap(dev, status[2])) { 554 /* remap failed, go back ... */ 555 dev->comm_interface = AAC_COMM_PRODUCER; 556 if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) { 557 printk(KERN_WARNING 558 "aacraid: unable to map adapter.\n"); 559 return NULL; 560 } 561 } 562 } 563 } 564 dev->max_msix = 0; 565 dev->msi_enabled = 0; 566 dev->adapter_shutdown = 0; 567 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS, 568 0, 0, 0, 0, 0, 0, 569 status+0, status+1, status+2, status+3, status+4)) 570 && (status[0] == 0x00000001)) { 571 /* 572 * status[1] >> 16 maximum command size in KB 573 * status[1] & 0xFFFF maximum FIB size 574 * status[2] >> 16 maximum SG elements to driver 575 * status[2] & 0xFFFF maximum SG elements from driver 576 * status[3] & 0xFFFF maximum number FIBs outstanding 577 */ 578 host->max_sectors = (status[1] >> 16) << 1; 579 /* Multiple of 32 for PMC */ 580 dev->max_fib_size = status[1] & 0xFFE0; 581 host->sg_tablesize = status[2] >> 16; 582 dev->sg_tablesize = status[2] & 0xFFFF; 583 if (aac_is_src(dev)) { 584 if (host->can_queue > (status[3] >> 16) - 585 AAC_NUM_MGT_FIB) 586 host->can_queue = (status[3] >> 16) - 587 AAC_NUM_MGT_FIB; 588 } else if (host->can_queue > (status[3] & 0xFFFF) - 589 AAC_NUM_MGT_FIB) 590 host->can_queue = (status[3] & 0xFFFF) - 591 AAC_NUM_MGT_FIB; 592 593 dev->max_num_aif = status[4] & 0xFFFF; 594 } 595 if (numacb > 0) { 596 if (numacb < host->can_queue) 597 host->can_queue = numacb; 598 else 599 pr_warn("numacb=%d ignored\n", numacb); 600 } 601 602 if (aac_is_src(dev)) 603 aac_define_int_mode(dev); 604 /* 605 * Ok now init the communication subsystem 606 */ 607 608 dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL); 609 if (dev->queues == NULL) { 610 printk(KERN_ERR "Error could not allocate comm region.\n"); 611 return NULL; 612 } 613 614 if (aac_comm_init(dev)<0){ 615 kfree(dev->queues); 616 return NULL; 617 } 618 /* 619 * Initialize the list of fibs 620 */ 621 if (aac_fib_setup(dev) < 0) { 622 kfree(dev->queues); 623 return NULL; 624 } 625 626 INIT_LIST_HEAD(&dev->fib_list); 627 INIT_LIST_HEAD(&dev->sync_fib_list); 628 629 return dev; 630 } 631 632