xref: /openbmc/linux/drivers/scsi/aacraid/comminit.c (revision 110e6f26)
1 /*
2  *	Adaptec AAC series RAID controller driver
3  *	(c) Copyright 2001 Red Hat Inc.
4  *
5  * based on the old aacraid driver that is..
6  * Adaptec aacraid device driver for Linux.
7  *
8  * Copyright (c) 2000-2010 Adaptec, Inc.
9  *               2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2, or (at your option)
14  * any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; see the file COPYING.  If not, write to
23  * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
24  *
25  * Module Name:
26  *  comminit.c
27  *
28  * Abstract: This supports the initialization of the host adapter commuication interface.
29  *    This is a platform dependent module for the pci cyclone board.
30  *
31  */
32 
33 #include <linux/kernel.h>
34 #include <linux/init.h>
35 #include <linux/types.h>
36 #include <linux/pci.h>
37 #include <linux/spinlock.h>
38 #include <linux/slab.h>
39 #include <linux/blkdev.h>
40 #include <linux/completion.h>
41 #include <linux/mm.h>
42 #include <scsi/scsi_host.h>
43 
44 #include "aacraid.h"
45 
46 struct aac_common aac_config = {
47 	.irq_mod = 1
48 };
49 
50 static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign)
51 {
52 	unsigned char *base;
53 	unsigned long size, align;
54 	const unsigned long fibsize = dev->max_fib_size;
55 	const unsigned long printfbufsiz = 256;
56 	unsigned long host_rrq_size = 0;
57 	struct aac_init *init;
58 	dma_addr_t phys;
59 	unsigned long aac_max_hostphysmempages;
60 
61 	if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
62 	    dev->comm_interface == AAC_COMM_MESSAGE_TYPE2)
63 		host_rrq_size = (dev->scsi_host_ptr->can_queue
64 			+ AAC_NUM_MGT_FIB) * sizeof(u32);
65 	size = fibsize + sizeof(struct aac_init) + commsize +
66 			commalign + printfbufsiz + host_rrq_size;
67 
68 	base = pci_alloc_consistent(dev->pdev, size, &phys);
69 
70 	if(base == NULL)
71 	{
72 		printk(KERN_ERR "aacraid: unable to create mapping.\n");
73 		return 0;
74 	}
75 	dev->comm_addr = (void *)base;
76 	dev->comm_phys = phys;
77 	dev->comm_size = size;
78 
79 	if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 ||
80 	    dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
81 		dev->host_rrq = (u32 *)(base + fibsize);
82 		dev->host_rrq_pa = phys + fibsize;
83 		memset(dev->host_rrq, 0, host_rrq_size);
84 	}
85 
86 	dev->init = (struct aac_init *)(base + fibsize + host_rrq_size);
87 	dev->init_pa = phys + fibsize + host_rrq_size;
88 
89 	init = dev->init;
90 
91 	init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION);
92 	if (dev->max_fib_size != sizeof(struct hw_fib))
93 		init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4);
94 	init->Sa_MSIXVectors = cpu_to_le32(Sa_MINIPORT_REVISION);
95 	init->fsrev = cpu_to_le32(dev->fsrev);
96 
97 	/*
98 	 *	Adapter Fibs are the first thing allocated so that they
99 	 *	start page aligned
100 	 */
101 	dev->aif_base_va = (struct hw_fib *)base;
102 
103 	init->AdapterFibsVirtualAddress = 0;
104 	init->AdapterFibsPhysicalAddress = cpu_to_le32((u32)phys);
105 	init->AdapterFibsSize = cpu_to_le32(fibsize);
106 	init->AdapterFibAlign = cpu_to_le32(sizeof(struct hw_fib));
107 	/*
108 	 * number of 4k pages of host physical memory. The aacraid fw needs
109 	 * this number to be less than 4gb worth of pages. New firmware doesn't
110 	 * have any issues with the mapping system, but older Firmware did, and
111 	 * had *troubles* dealing with the math overloading past 32 bits, thus
112 	 * we must limit this field.
113 	 */
114 	aac_max_hostphysmempages = dma_get_required_mask(&dev->pdev->dev) >> 12;
115 	if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES)
116 		init->HostPhysMemPages = cpu_to_le32(aac_max_hostphysmempages);
117 	else
118 		init->HostPhysMemPages = cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES);
119 
120 	init->InitFlags = cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME |
121 		INITFLAGS_DRIVER_SUPPORTS_PM);
122 	init->MaxIoCommands = cpu_to_le32(dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB);
123 	init->MaxIoSize = cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9);
124 	init->MaxFibSize = cpu_to_le32(dev->max_fib_size);
125 	init->MaxNumAif = cpu_to_le32(dev->max_num_aif);
126 
127 	if (dev->comm_interface == AAC_COMM_MESSAGE) {
128 		init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED);
129 		dprintk((KERN_WARNING"aacraid: New Comm Interface enabled\n"));
130 	} else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) {
131 		init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6);
132 		init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
133 			INITFLAGS_NEW_COMM_TYPE1_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED);
134 		init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32));
135 		init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff));
136 		dprintk((KERN_WARNING"aacraid: New Comm Interface type1 enabled\n"));
137 	} else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) {
138 		init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7);
139 		init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED |
140 			INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED);
141 		init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32));
142 		init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff));
143 		/* number of MSI-X */
144 		init->Sa_MSIXVectors = cpu_to_le32(dev->max_msix);
145 		dprintk((KERN_WARNING"aacraid: New Comm Interface type2 enabled\n"));
146 	}
147 
148 	/*
149 	 * Increment the base address by the amount already used
150 	 */
151 	base = base + fibsize + host_rrq_size + sizeof(struct aac_init);
152 	phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size +
153 		sizeof(struct aac_init));
154 
155 	/*
156 	 *	Align the beginning of Headers to commalign
157 	 */
158 	align = (commalign - ((uintptr_t)(base) & (commalign - 1)));
159 	base = base + align;
160 	phys = phys + align;
161 	/*
162 	 *	Fill in addresses of the Comm Area Headers and Queues
163 	 */
164 	*commaddr = base;
165 	init->CommHeaderAddress = cpu_to_le32((u32)phys);
166 	/*
167 	 *	Increment the base address by the size of the CommArea
168 	 */
169 	base = base + commsize;
170 	phys = phys + commsize;
171 	/*
172 	 *	 Place the Printf buffer area after the Fast I/O comm area.
173 	 */
174 	dev->printfbuf = (void *)base;
175 	init->printfbuf = cpu_to_le32(phys);
176 	init->printfbufsiz = cpu_to_le32(printfbufsiz);
177 	memset(base, 0, printfbufsiz);
178 	return 1;
179 }
180 
181 static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize)
182 {
183 	atomic_set(&q->numpending, 0);
184 	q->dev = dev;
185 	init_waitqueue_head(&q->cmdready);
186 	INIT_LIST_HEAD(&q->cmdq);
187 	init_waitqueue_head(&q->qfull);
188 	spin_lock_init(&q->lockdata);
189 	q->lock = &q->lockdata;
190 	q->headers.producer = (__le32 *)mem;
191 	q->headers.consumer = (__le32 *)(mem+1);
192 	*(q->headers.producer) = cpu_to_le32(qsize);
193 	*(q->headers.consumer) = cpu_to_le32(qsize);
194 	q->entries = qsize;
195 }
196 
197 /**
198  *	aac_send_shutdown		-	shutdown an adapter
199  *	@dev: Adapter to shutdown
200  *
201  *	This routine will send a VM_CloseAll (shutdown) request to the adapter.
202  */
203 
204 int aac_send_shutdown(struct aac_dev * dev)
205 {
206 	struct fib * fibctx;
207 	struct aac_close *cmd;
208 	int status;
209 
210 	fibctx = aac_fib_alloc(dev);
211 	if (!fibctx)
212 		return -ENOMEM;
213 	aac_fib_init(fibctx);
214 
215 	mutex_lock(&dev->ioctl_mutex);
216 	dev->adapter_shutdown = 1;
217 	mutex_unlock(&dev->ioctl_mutex);
218 
219 	cmd = (struct aac_close *) fib_data(fibctx);
220 	cmd->command = cpu_to_le32(VM_CloseAll);
221 	cmd->cid = cpu_to_le32(0xfffffffe);
222 
223 	status = aac_fib_send(ContainerCommand,
224 			  fibctx,
225 			  sizeof(struct aac_close),
226 			  FsaNormal,
227 			  -2 /* Timeout silently */, 1,
228 			  NULL, NULL);
229 
230 	if (status >= 0)
231 		aac_fib_complete(fibctx);
232 	/* FIB should be freed only after getting the response from the F/W */
233 	if (status != -ERESTARTSYS)
234 		aac_fib_free(fibctx);
235 	if ((dev->pdev->device == PMC_DEVICE_S7 ||
236 	     dev->pdev->device == PMC_DEVICE_S8 ||
237 	     dev->pdev->device == PMC_DEVICE_S9) &&
238 	     dev->msi_enabled)
239 		aac_src_access_devreg(dev, AAC_ENABLE_INTX);
240 	return status;
241 }
242 
243 /**
244  *	aac_comm_init	-	Initialise FSA data structures
245  *	@dev:	Adapter to initialise
246  *
247  *	Initializes the data structures that are required for the FSA commuication
248  *	interface to operate.
249  *	Returns
250  *		1 - if we were able to init the commuication interface.
251  *		0 - If there were errors initing. This is a fatal error.
252  */
253 
254 static int aac_comm_init(struct aac_dev * dev)
255 {
256 	unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2;
257 	unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES;
258 	u32 *headers;
259 	struct aac_entry * queues;
260 	unsigned long size;
261 	struct aac_queue_block * comm = dev->queues;
262 	/*
263 	 *	Now allocate and initialize the zone structures used as our
264 	 *	pool of FIB context records.  The size of the zone is based
265 	 *	on the system memory size.  We also initialize the mutex used
266 	 *	to protect the zone.
267 	 */
268 	spin_lock_init(&dev->fib_lock);
269 
270 	/*
271 	 *	Allocate the physically contiguous space for the commuication
272 	 *	queue headers.
273 	 */
274 
275 	size = hdrsize + queuesize;
276 
277 	if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT))
278 		return -ENOMEM;
279 
280 	queues = (struct aac_entry *)(((ulong)headers) + hdrsize);
281 
282 	/* Adapter to Host normal priority Command queue */
283 	comm->queue[HostNormCmdQueue].base = queues;
284 	aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES);
285 	queues += HOST_NORM_CMD_ENTRIES;
286 	headers += 2;
287 
288 	/* Adapter to Host high priority command queue */
289 	comm->queue[HostHighCmdQueue].base = queues;
290 	aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES);
291 
292 	queues += HOST_HIGH_CMD_ENTRIES;
293 	headers +=2;
294 
295 	/* Host to adapter normal priority command queue */
296 	comm->queue[AdapNormCmdQueue].base = queues;
297 	aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES);
298 
299 	queues += ADAP_NORM_CMD_ENTRIES;
300 	headers += 2;
301 
302 	/* host to adapter high priority command queue */
303 	comm->queue[AdapHighCmdQueue].base = queues;
304 	aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES);
305 
306 	queues += ADAP_HIGH_CMD_ENTRIES;
307 	headers += 2;
308 
309 	/* adapter to host normal priority response queue */
310 	comm->queue[HostNormRespQueue].base = queues;
311 	aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES);
312 	queues += HOST_NORM_RESP_ENTRIES;
313 	headers += 2;
314 
315 	/* adapter to host high priority response queue */
316 	comm->queue[HostHighRespQueue].base = queues;
317 	aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES);
318 
319 	queues += HOST_HIGH_RESP_ENTRIES;
320 	headers += 2;
321 
322 	/* host to adapter normal priority response queue */
323 	comm->queue[AdapNormRespQueue].base = queues;
324 	aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES);
325 
326 	queues += ADAP_NORM_RESP_ENTRIES;
327 	headers += 2;
328 
329 	/* host to adapter high priority response queue */
330 	comm->queue[AdapHighRespQueue].base = queues;
331 	aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES);
332 
333 	comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock;
334 	comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock;
335 	comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock;
336 	comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock;
337 
338 	return 0;
339 }
340 
341 void aac_define_int_mode(struct aac_dev *dev)
342 {
343 	int i, msi_count, min_msix;
344 
345 	msi_count = i = 0;
346 	/* max. vectors from GET_COMM_PREFERRED_SETTINGS */
347 	if (dev->max_msix == 0 ||
348 	    dev->pdev->device == PMC_DEVICE_S6 ||
349 	    dev->sync_mode) {
350 		dev->max_msix = 1;
351 		dev->vector_cap =
352 			dev->scsi_host_ptr->can_queue +
353 			AAC_NUM_MGT_FIB;
354 		return;
355 	}
356 
357 	/* Don't bother allocating more MSI-X vectors than cpus */
358 	msi_count = min(dev->max_msix,
359 		(unsigned int)num_online_cpus());
360 
361 	dev->max_msix = msi_count;
362 
363 	if (msi_count > AAC_MAX_MSIX)
364 		msi_count = AAC_MAX_MSIX;
365 
366 	for (i = 0; i < msi_count; i++)
367 		dev->msixentry[i].entry = i;
368 
369 	if (msi_count > 1 &&
370 	    pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) {
371 		min_msix = 2;
372 		i = pci_enable_msix_range(dev->pdev,
373 				    dev->msixentry,
374 				    min_msix,
375 				    msi_count);
376 		if (i > 0) {
377 			dev->msi_enabled = 1;
378 			msi_count = i;
379 		} else {
380 			dev->msi_enabled = 0;
381 			printk(KERN_ERR "%s%d: MSIX not supported!! Will try MSI 0x%x.\n",
382 					dev->name, dev->id, i);
383 		}
384 	}
385 
386 	if (!dev->msi_enabled) {
387 		msi_count = 1;
388 		i = pci_enable_msi(dev->pdev);
389 
390 		if (!i) {
391 			dev->msi_enabled = 1;
392 			dev->msi = 1;
393 		} else {
394 			printk(KERN_ERR "%s%d: MSI not supported!! Will try INTx 0x%x.\n",
395 					dev->name, dev->id, i);
396 		}
397 	}
398 
399 	if (!dev->msi_enabled)
400 		dev->max_msix = msi_count = 1;
401 	else {
402 		if (dev->max_msix > msi_count)
403 			dev->max_msix = msi_count;
404 	}
405 	dev->vector_cap =
406 		(dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) /
407 		msi_count;
408 }
409 struct aac_dev *aac_init_adapter(struct aac_dev *dev)
410 {
411 	u32 status[5];
412 	struct Scsi_Host * host = dev->scsi_host_ptr;
413 	extern int aac_sync_mode;
414 
415 	/*
416 	 *	Check the preferred comm settings, defaults from template.
417 	 */
418 	dev->management_fib_count = 0;
419 	spin_lock_init(&dev->manage_lock);
420 	spin_lock_init(&dev->sync_lock);
421 	spin_lock_init(&dev->iq_lock);
422 	dev->max_fib_size = sizeof(struct hw_fib);
423 	dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size
424 		- sizeof(struct aac_fibhdr)
425 		- sizeof(struct aac_write) + sizeof(struct sgentry))
426 			/ sizeof(struct sgentry);
427 	dev->comm_interface = AAC_COMM_PRODUCER;
428 	dev->raw_io_interface = dev->raw_io_64 = 0;
429 
430 	if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES,
431 		0, 0, 0, 0, 0, 0,
432 		status+0, status+1, status+2, status+3, NULL)) &&
433 	 		(status[0] == 0x00000001)) {
434 		dev->doorbell_mask = status[3];
435 		if (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_64))
436 			dev->raw_io_64 = 1;
437 		dev->sync_mode = aac_sync_mode;
438 		if (dev->a_ops.adapter_comm &&
439 			(status[1] & le32_to_cpu(AAC_OPT_NEW_COMM))) {
440 				dev->comm_interface = AAC_COMM_MESSAGE;
441 				dev->raw_io_interface = 1;
442 			if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE1))) {
443 				/* driver supports TYPE1 (Tupelo) */
444 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE1;
445 			} else if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE2))) {
446 				/* driver supports TYPE2 (Denali) */
447 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
448 			} else if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE4)) ||
449 				  (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE3))) {
450 				/* driver doesn't TYPE3 and TYPE4 */
451 				/* switch to sync. mode */
452 				dev->comm_interface = AAC_COMM_MESSAGE_TYPE2;
453 				dev->sync_mode = 1;
454 			}
455 		}
456 		if ((dev->comm_interface == AAC_COMM_MESSAGE) &&
457 		    (status[2] > dev->base_size)) {
458 			aac_adapter_ioremap(dev, 0);
459 			dev->base_size = status[2];
460 			if (aac_adapter_ioremap(dev, status[2])) {
461 				/* remap failed, go back ... */
462 				dev->comm_interface = AAC_COMM_PRODUCER;
463 				if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) {
464 					printk(KERN_WARNING
465 					  "aacraid: unable to map adapter.\n");
466 					return NULL;
467 				}
468 			}
469 		}
470 	}
471 	dev->max_msix = 0;
472 	dev->msi_enabled = 0;
473 	dev->adapter_shutdown = 0;
474 	if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS,
475 	  0, 0, 0, 0, 0, 0,
476 	  status+0, status+1, status+2, status+3, status+4))
477 	 && (status[0] == 0x00000001)) {
478 		/*
479 		 *	status[1] >> 16		maximum command size in KB
480 		 *	status[1] & 0xFFFF	maximum FIB size
481 		 *	status[2] >> 16		maximum SG elements to driver
482 		 *	status[2] & 0xFFFF	maximum SG elements from driver
483 		 *	status[3] & 0xFFFF	maximum number FIBs outstanding
484 		 */
485 		host->max_sectors = (status[1] >> 16) << 1;
486 		/* Multiple of 32 for PMC */
487 		dev->max_fib_size = status[1] & 0xFFE0;
488 		host->sg_tablesize = status[2] >> 16;
489 		dev->sg_tablesize = status[2] & 0xFFFF;
490 		if (dev->pdev->device == PMC_DEVICE_S7 ||
491 		    dev->pdev->device == PMC_DEVICE_S8 ||
492 		    dev->pdev->device == PMC_DEVICE_S9)
493 			host->can_queue = ((status[3] >> 16) ? (status[3] >> 16) :
494 				(status[3] & 0xFFFF)) - AAC_NUM_MGT_FIB;
495 		else
496 			host->can_queue = (status[3] & 0xFFFF) - AAC_NUM_MGT_FIB;
497 		dev->max_num_aif = status[4] & 0xFFFF;
498 		/*
499 		 *	NOTE:
500 		 *	All these overrides are based on a fixed internal
501 		 *	knowledge and understanding of existing adapters,
502 		 *	acbsize should be set with caution.
503 		 */
504 		if (acbsize == 512) {
505 			host->max_sectors = AAC_MAX_32BIT_SGBCOUNT;
506 			dev->max_fib_size = 512;
507 			dev->sg_tablesize = host->sg_tablesize
508 			  = (512 - sizeof(struct aac_fibhdr)
509 			    - sizeof(struct aac_write) + sizeof(struct sgentry))
510 			     / sizeof(struct sgentry);
511 			host->can_queue = AAC_NUM_IO_FIB;
512 		} else if (acbsize == 2048) {
513 			host->max_sectors = 512;
514 			dev->max_fib_size = 2048;
515 			host->sg_tablesize = 65;
516 			dev->sg_tablesize = 81;
517 			host->can_queue = 512 - AAC_NUM_MGT_FIB;
518 		} else if (acbsize == 4096) {
519 			host->max_sectors = 1024;
520 			dev->max_fib_size = 4096;
521 			host->sg_tablesize = 129;
522 			dev->sg_tablesize = 166;
523 			host->can_queue = 256 - AAC_NUM_MGT_FIB;
524 		} else if (acbsize == 8192) {
525 			host->max_sectors = 2048;
526 			dev->max_fib_size = 8192;
527 			host->sg_tablesize = 257;
528 			dev->sg_tablesize = 337;
529 			host->can_queue = 128 - AAC_NUM_MGT_FIB;
530 		} else if (acbsize > 0) {
531 			printk("Illegal acbsize=%d ignored\n", acbsize);
532 		}
533 	}
534 	{
535 
536 		if (numacb > 0) {
537 			if (numacb < host->can_queue)
538 				host->can_queue = numacb;
539 			else
540 				printk("numacb=%d ignored\n", numacb);
541 		}
542 	}
543 
544 	if (host->can_queue > AAC_NUM_IO_FIB)
545 		host->can_queue = AAC_NUM_IO_FIB;
546 
547 	if (dev->pdev->device == PMC_DEVICE_S6 ||
548 	    dev->pdev->device == PMC_DEVICE_S7 ||
549 	    dev->pdev->device == PMC_DEVICE_S8 ||
550 	    dev->pdev->device == PMC_DEVICE_S9)
551 		aac_define_int_mode(dev);
552 	/*
553 	 *	Ok now init the communication subsystem
554 	 */
555 
556 	dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL);
557 	if (dev->queues == NULL) {
558 		printk(KERN_ERR "Error could not allocate comm region.\n");
559 		return NULL;
560 	}
561 
562 	if (aac_comm_init(dev)<0){
563 		kfree(dev->queues);
564 		return NULL;
565 	}
566 	/*
567 	 *	Initialize the list of fibs
568 	 */
569 	if (aac_fib_setup(dev) < 0) {
570 		kfree(dev->queues);
571 		return NULL;
572 	}
573 
574 	INIT_LIST_HEAD(&dev->fib_list);
575 	INIT_LIST_HEAD(&dev->sync_fib_list);
576 
577 	return dev;
578 }
579 
580