1 #ifndef dprintk 2 # define dprintk(x) 3 #endif 4 /* eg: if (nblank(dprintk(x))) */ 5 #define _nblank(x) #x 6 #define nblank(x) _nblank(x)[0] 7 8 #include <linux/interrupt.h> 9 #include <linux/pci.h> 10 11 /*------------------------------------------------------------------------------ 12 * D E F I N E S 13 *----------------------------------------------------------------------------*/ 14 15 #define AAC_MAX_MSIX 32 /* vectors */ 16 #define AAC_PCI_MSI_ENABLE 0x8000 17 18 enum { 19 AAC_ENABLE_INTERRUPT = 0x0, 20 AAC_DISABLE_INTERRUPT, 21 AAC_ENABLE_MSIX, 22 AAC_DISABLE_MSIX, 23 AAC_CLEAR_AIF_BIT, 24 AAC_CLEAR_SYNC_BIT, 25 AAC_ENABLE_INTX 26 }; 27 28 #define AAC_INT_MODE_INTX (1<<0) 29 #define AAC_INT_MODE_MSI (1<<1) 30 #define AAC_INT_MODE_AIF (1<<2) 31 #define AAC_INT_MODE_SYNC (1<<3) 32 33 #define AAC_INT_ENABLE_TYPE1_INTX 0xfffffffb 34 #define AAC_INT_ENABLE_TYPE1_MSIX 0xfffffffa 35 #define AAC_INT_DISABLE_ALL 0xffffffff 36 37 /* Bit definitions in IOA->Host Interrupt Register */ 38 #define PMC_TRANSITION_TO_OPERATIONAL (1<<31) 39 #define PMC_IOARCB_TRANSFER_FAILED (1<<28) 40 #define PMC_IOA_UNIT_CHECK (1<<27) 41 #define PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE (1<<26) 42 #define PMC_CRITICAL_IOA_OP_IN_PROGRESS (1<<25) 43 #define PMC_IOARRIN_LOST (1<<4) 44 #define PMC_SYSTEM_BUS_MMIO_ERROR (1<<3) 45 #define PMC_IOA_PROCESSOR_IN_ERROR_STATE (1<<2) 46 #define PMC_HOST_RRQ_VALID (1<<1) 47 #define PMC_OPERATIONAL_STATUS (1<<31) 48 #define PMC_ALLOW_MSIX_VECTOR0 (1<<0) 49 50 #define PMC_IOA_ERROR_INTERRUPTS (PMC_IOARCB_TRANSFER_FAILED | \ 51 PMC_IOA_UNIT_CHECK | \ 52 PMC_NO_HOST_RRQ_FOR_CMD_RESPONSE | \ 53 PMC_IOARRIN_LOST | \ 54 PMC_SYSTEM_BUS_MMIO_ERROR | \ 55 PMC_IOA_PROCESSOR_IN_ERROR_STATE) 56 57 #define PMC_ALL_INTERRUPT_BITS (PMC_IOA_ERROR_INTERRUPTS | \ 58 PMC_HOST_RRQ_VALID | \ 59 PMC_TRANSITION_TO_OPERATIONAL | \ 60 PMC_ALLOW_MSIX_VECTOR0) 61 #define PMC_GLOBAL_INT_BIT2 0x00000004 62 #define PMC_GLOBAL_INT_BIT0 0x00000001 63 64 #ifndef AAC_DRIVER_BUILD 65 # define AAC_DRIVER_BUILD 41052 66 # define AAC_DRIVER_BRANCH "-ms" 67 #endif 68 #define MAXIMUM_NUM_CONTAINERS 32 69 70 #define AAC_NUM_MGT_FIB 8 71 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB) 72 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB) 73 74 #define AAC_MAX_LUN (8) 75 76 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff) 77 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256) 78 79 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE 80 81 /* 82 * These macros convert from physical channels to virtual channels 83 */ 84 #define CONTAINER_CHANNEL (0) 85 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL) 86 #define CONTAINER_TO_ID(cont) (cont) 87 #define CONTAINER_TO_LUN(cont) (0) 88 89 #define PMC_DEVICE_S6 0x28b 90 #define PMC_DEVICE_S7 0x28c 91 #define PMC_DEVICE_S8 0x28d 92 #define PMC_DEVICE_S9 0x28f 93 94 #define aac_phys_to_logical(x) ((x)+1) 95 #define aac_logical_to_phys(x) ((x)?(x)-1:0) 96 97 /* 98 * These macros are for keeping track of 99 * character device state. 100 */ 101 #define AAC_CHARDEV_UNREGISTERED (-1) 102 #define AAC_CHARDEV_NEEDS_REINIT (-2) 103 104 /* #define AAC_DETAILED_STATUS_INFO */ 105 106 struct diskparm 107 { 108 int heads; 109 int sectors; 110 int cylinders; 111 }; 112 113 114 /* 115 * Firmware constants 116 */ 117 118 #define CT_NONE 0 119 #define CT_OK 218 120 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */ 121 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */ 122 123 /* 124 * Host side memory scatter gather list 125 * Used by the adapter for read, write, and readdirplus operations 126 * We have separate 32 and 64 bit version because even 127 * on 64 bit systems not all cards support the 64 bit version 128 */ 129 struct sgentry { 130 __le32 addr; /* 32-bit address. */ 131 __le32 count; /* Length. */ 132 }; 133 134 struct user_sgentry { 135 u32 addr; /* 32-bit address. */ 136 u32 count; /* Length. */ 137 }; 138 139 struct sgentry64 { 140 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 141 __le32 count; /* Length. */ 142 }; 143 144 struct user_sgentry64 { 145 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 146 u32 count; /* Length. */ 147 }; 148 149 struct sgentryraw { 150 __le32 next; /* reserved for F/W use */ 151 __le32 prev; /* reserved for F/W use */ 152 __le32 addr[2]; 153 __le32 count; 154 __le32 flags; /* reserved for F/W use */ 155 }; 156 157 struct user_sgentryraw { 158 u32 next; /* reserved for F/W use */ 159 u32 prev; /* reserved for F/W use */ 160 u32 addr[2]; 161 u32 count; 162 u32 flags; /* reserved for F/W use */ 163 }; 164 165 struct sge_ieee1212 { 166 u32 addrLow; 167 u32 addrHigh; 168 u32 length; 169 u32 flags; 170 }; 171 172 /* 173 * SGMAP 174 * 175 * This is the SGMAP structure for all commands that use 176 * 32-bit addressing. 177 */ 178 179 struct sgmap { 180 __le32 count; 181 struct sgentry sg[1]; 182 }; 183 184 struct user_sgmap { 185 u32 count; 186 struct user_sgentry sg[1]; 187 }; 188 189 struct sgmap64 { 190 __le32 count; 191 struct sgentry64 sg[1]; 192 }; 193 194 struct user_sgmap64 { 195 u32 count; 196 struct user_sgentry64 sg[1]; 197 }; 198 199 struct sgmapraw { 200 __le32 count; 201 struct sgentryraw sg[1]; 202 }; 203 204 struct user_sgmapraw { 205 u32 count; 206 struct user_sgentryraw sg[1]; 207 }; 208 209 struct creation_info 210 { 211 u8 buildnum; /* e.g., 588 */ 212 u8 usec; /* e.g., 588 */ 213 u8 via; /* e.g., 1 = FSU, 214 * 2 = API 215 */ 216 u8 year; /* e.g., 1997 = 97 */ 217 __le32 date; /* 218 * unsigned Month :4; // 1 - 12 219 * unsigned Day :6; // 1 - 32 220 * unsigned Hour :6; // 0 - 23 221 * unsigned Minute :6; // 0 - 60 222 * unsigned Second :6; // 0 - 60 223 */ 224 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */ 225 }; 226 227 228 /* 229 * Define all the constants needed for the communication interface 230 */ 231 232 /* 233 * Define how many queue entries each queue will have and the total 234 * number of entries for the entire communication interface. Also define 235 * how many queues we support. 236 * 237 * This has to match the controller 238 */ 239 240 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response 241 #define HOST_HIGH_CMD_ENTRIES 4 242 #define HOST_NORM_CMD_ENTRIES 8 243 #define ADAP_HIGH_CMD_ENTRIES 4 244 #define ADAP_NORM_CMD_ENTRIES 512 245 #define HOST_HIGH_RESP_ENTRIES 4 246 #define HOST_NORM_RESP_ENTRIES 512 247 #define ADAP_HIGH_RESP_ENTRIES 4 248 #define ADAP_NORM_RESP_ENTRIES 8 249 250 #define TOTAL_QUEUE_ENTRIES \ 251 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \ 252 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES) 253 254 255 /* 256 * Set the queues on a 16 byte alignment 257 */ 258 259 #define QUEUE_ALIGNMENT 16 260 261 /* 262 * The queue headers define the Communication Region queues. These 263 * are physically contiguous and accessible by both the adapter and the 264 * host. Even though all queue headers are in the same contiguous block 265 * they will be represented as individual units in the data structures. 266 */ 267 268 struct aac_entry { 269 __le32 size; /* Size in bytes of Fib which this QE points to */ 270 __le32 addr; /* Receiver address of the FIB */ 271 }; 272 273 /* 274 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped 275 * adjacently and in that order. 276 */ 277 278 struct aac_qhdr { 279 __le64 header_addr;/* Address to hand the adapter to access 280 to this queue head */ 281 __le32 *producer; /* The producer index for this queue (host address) */ 282 __le32 *consumer; /* The consumer index for this queue (host address) */ 283 }; 284 285 /* 286 * Define all the events which the adapter would like to notify 287 * the host of. 288 */ 289 290 #define HostNormCmdQue 1 /* Change in host normal priority command queue */ 291 #define HostHighCmdQue 2 /* Change in host high priority command queue */ 292 #define HostNormRespQue 3 /* Change in host normal priority response queue */ 293 #define HostHighRespQue 4 /* Change in host high priority response queue */ 294 #define AdapNormRespNotFull 5 295 #define AdapHighRespNotFull 6 296 #define AdapNormCmdNotFull 7 297 #define AdapHighCmdNotFull 8 298 #define SynchCommandComplete 9 299 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */ 300 301 /* 302 * Define all the events the host wishes to notify the 303 * adapter of. The first four values much match the Qid the 304 * corresponding queue. 305 */ 306 307 #define AdapNormCmdQue 2 308 #define AdapHighCmdQue 3 309 #define AdapNormRespQue 6 310 #define AdapHighRespQue 7 311 #define HostShutdown 8 312 #define HostPowerFail 9 313 #define FatalCommError 10 314 #define HostNormRespNotFull 11 315 #define HostHighRespNotFull 12 316 #define HostNormCmdNotFull 13 317 #define HostHighCmdNotFull 14 318 #define FastIo 15 319 #define AdapPrintfDone 16 320 321 /* 322 * Define all the queues that the adapter and host use to communicate 323 * Number them to match the physical queue layout. 324 */ 325 326 enum aac_queue_types { 327 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */ 328 HostHighCmdQueue, /* Adapter to host high priority command traffic */ 329 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */ 330 AdapHighCmdQueue, /* Host to adapter high priority command traffic */ 331 HostNormRespQueue, /* Adapter to host normal priority response traffic */ 332 HostHighRespQueue, /* Adapter to host high priority response traffic */ 333 AdapNormRespQueue, /* Host to adapter normal priority response traffic */ 334 AdapHighRespQueue /* Host to adapter high priority response traffic */ 335 }; 336 337 /* 338 * Assign type values to the FSA communication data structures 339 */ 340 341 #define FIB_MAGIC 0x0001 342 #define FIB_MAGIC2 0x0004 343 #define FIB_MAGIC2_64 0x0005 344 345 /* 346 * Define the priority levels the FSA communication routines support. 347 */ 348 349 #define FsaNormal 1 350 351 /* transport FIB header (PMC) */ 352 struct aac_fib_xporthdr { 353 u64 HostAddress; /* FIB host address w/o xport header */ 354 u32 Size; /* FIB size excluding xport header */ 355 u32 Handle; /* driver handle to reference the FIB */ 356 u64 Reserved[2]; 357 }; 358 359 #define ALIGN32 32 360 361 /* 362 * Define the FIB. The FIB is the where all the requested data and 363 * command information are put to the application on the FSA adapter. 364 */ 365 366 struct aac_fibhdr { 367 __le32 XferState; /* Current transfer state for this CCB */ 368 __le16 Command; /* Routing information for the destination */ 369 u8 StructType; /* Type FIB */ 370 u8 Unused; /* Unused */ 371 __le16 Size; /* Size of this FIB in bytes */ 372 __le16 SenderSize; /* Size of the FIB in the sender 373 (for response sizing) */ 374 __le32 SenderFibAddress; /* Host defined data in the FIB */ 375 union { 376 __le32 ReceiverFibAddress;/* Logical address of this FIB for 377 the adapter (old) */ 378 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */ 379 __le32 TimeStamp; /* otherwise timestamp for FW internal use */ 380 } u; 381 u32 Handle; /* FIB handle used for MSGU commnunication */ 382 u32 Previous; /* FW internal use */ 383 u32 Next; /* FW internal use */ 384 }; 385 386 struct hw_fib { 387 struct aac_fibhdr header; 388 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data 389 }; 390 391 /* 392 * FIB commands 393 */ 394 395 #define TestCommandResponse 1 396 #define TestAdapterCommand 2 397 /* 398 * Lowlevel and comm commands 399 */ 400 #define LastTestCommand 100 401 #define ReinitHostNormCommandQueue 101 402 #define ReinitHostHighCommandQueue 102 403 #define ReinitHostHighRespQueue 103 404 #define ReinitHostNormRespQueue 104 405 #define ReinitAdapNormCommandQueue 105 406 #define ReinitAdapHighCommandQueue 107 407 #define ReinitAdapHighRespQueue 108 408 #define ReinitAdapNormRespQueue 109 409 #define InterfaceShutdown 110 410 #define DmaCommandFib 120 411 #define StartProfile 121 412 #define TermProfile 122 413 #define SpeedTest 123 414 #define TakeABreakPt 124 415 #define RequestPerfData 125 416 #define SetInterruptDefTimer 126 417 #define SetInterruptDefCount 127 418 #define GetInterruptDefStatus 128 419 #define LastCommCommand 129 420 /* 421 * Filesystem commands 422 */ 423 #define NuFileSystem 300 424 #define UFS 301 425 #define HostFileSystem 302 426 #define LastFileSystemCommand 303 427 /* 428 * Container Commands 429 */ 430 #define ContainerCommand 500 431 #define ContainerCommand64 501 432 #define ContainerRawIo 502 433 #define ContainerRawIo2 503 434 /* 435 * Scsi Port commands (scsi passthrough) 436 */ 437 #define ScsiPortCommand 600 438 #define ScsiPortCommand64 601 439 /* 440 * Misc house keeping and generic adapter initiated commands 441 */ 442 #define AifRequest 700 443 #define CheckRevision 701 444 #define FsaHostShutdown 702 445 #define RequestAdapterInfo 703 446 #define IsAdapterPaused 704 447 #define SendHostTime 705 448 #define RequestSupplementAdapterInfo 706 449 #define LastMiscCommand 707 450 451 /* 452 * Commands that will target the failover level on the FSA adapter 453 */ 454 455 enum fib_xfer_state { 456 HostOwned = (1<<0), 457 AdapterOwned = (1<<1), 458 FibInitialized = (1<<2), 459 FibEmpty = (1<<3), 460 AllocatedFromPool = (1<<4), 461 SentFromHost = (1<<5), 462 SentFromAdapter = (1<<6), 463 ResponseExpected = (1<<7), 464 NoResponseExpected = (1<<8), 465 AdapterProcessed = (1<<9), 466 HostProcessed = (1<<10), 467 HighPriority = (1<<11), 468 NormalPriority = (1<<12), 469 Async = (1<<13), 470 AsyncIo = (1<<13), // rpbfix: remove with new regime 471 PageFileIo = (1<<14), // rpbfix: remove with new regime 472 ShutdownRequest = (1<<15), 473 LazyWrite = (1<<16), // rpbfix: remove with new regime 474 AdapterMicroFib = (1<<17), 475 BIOSFibPath = (1<<18), 476 FastResponseCapable = (1<<19), 477 ApiFib = (1<<20), /* Its an API Fib */ 478 /* PMC NEW COMM: There is no more AIF data pending */ 479 NoMoreAifDataAvailable = (1<<21) 480 }; 481 482 /* 483 * The following defines needs to be updated any time there is an 484 * incompatible change made to the aac_init structure. 485 */ 486 487 #define ADAPTER_INIT_STRUCT_REVISION 3 488 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science 489 #define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */ 490 #define ADAPTER_INIT_STRUCT_REVISION_7 7 /* Denali */ 491 492 struct aac_init 493 { 494 __le32 InitStructRevision; 495 __le32 Sa_MSIXVectors; 496 __le32 fsrev; 497 __le32 CommHeaderAddress; 498 __le32 FastIoCommAreaAddress; 499 __le32 AdapterFibsPhysicalAddress; 500 __le32 AdapterFibsVirtualAddress; 501 __le32 AdapterFibsSize; 502 __le32 AdapterFibAlign; 503 __le32 printfbuf; 504 __le32 printfbufsiz; 505 __le32 HostPhysMemPages; /* number of 4k pages of host 506 physical memory */ 507 __le32 HostElapsedSeconds; /* number of seconds since 1970. */ 508 /* 509 * ADAPTER_INIT_STRUCT_REVISION_4 begins here 510 */ 511 __le32 InitFlags; /* flags for supported features */ 512 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001 513 #define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010 514 #define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020 515 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000040 516 #define INITFLAGS_FAST_JBOD_SUPPORTED 0x00000080 517 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED 0x00000100 518 __le32 MaxIoCommands; /* max outstanding commands */ 519 __le32 MaxIoSize; /* largest I/O command */ 520 __le32 MaxFibSize; /* largest FIB to adapter */ 521 /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */ 522 __le32 MaxNumAif; /* max number of aif */ 523 /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */ 524 __le32 HostRRQ_AddrLow; 525 __le32 HostRRQ_AddrHigh; /* Host RRQ (response queue) for SRC */ 526 }; 527 528 enum aac_log_level { 529 LOG_AAC_INIT = 10, 530 LOG_AAC_INFORMATIONAL = 20, 531 LOG_AAC_WARNING = 30, 532 LOG_AAC_LOW_ERROR = 40, 533 LOG_AAC_MEDIUM_ERROR = 50, 534 LOG_AAC_HIGH_ERROR = 60, 535 LOG_AAC_PANIC = 70, 536 LOG_AAC_DEBUG = 80, 537 LOG_AAC_WINDBG_PRINT = 90 538 }; 539 540 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b 541 #define FSAFS_NTC_FIB_CONTEXT 0x030c 542 543 struct aac_dev; 544 struct fib; 545 struct scsi_cmnd; 546 547 struct adapter_ops 548 { 549 /* Low level operations */ 550 void (*adapter_interrupt)(struct aac_dev *dev); 551 void (*adapter_notify)(struct aac_dev *dev, u32 event); 552 void (*adapter_disable_int)(struct aac_dev *dev); 553 void (*adapter_enable_int)(struct aac_dev *dev); 554 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4); 555 int (*adapter_check_health)(struct aac_dev *dev); 556 int (*adapter_restart)(struct aac_dev *dev, int bled); 557 void (*adapter_start)(struct aac_dev *dev); 558 /* Transport operations */ 559 int (*adapter_ioremap)(struct aac_dev * dev, u32 size); 560 irq_handler_t adapter_intr; 561 /* Packet operations */ 562 int (*adapter_deliver)(struct fib * fib); 563 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba); 564 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count); 565 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua); 566 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd); 567 /* Administrative operations */ 568 int (*adapter_comm)(struct aac_dev * dev, int comm); 569 }; 570 571 /* 572 * Define which interrupt handler needs to be installed 573 */ 574 575 struct aac_driver_ident 576 { 577 int (*init)(struct aac_dev *dev); 578 char * name; 579 char * vname; 580 char * model; 581 u16 channels; 582 int quirks; 583 }; 584 /* 585 * Some adapter firmware needs communication memory 586 * below 2gig. This tells the init function to set the 587 * dma mask such that fib memory will be allocated where the 588 * adapter firmware can get to it. 589 */ 590 #define AAC_QUIRK_31BIT 0x0001 591 592 /* 593 * Some adapter firmware, when the raid card's cache is turned off, can not 594 * split up scatter gathers in order to deal with the limits of the 595 * underlying CHIM. This limit is 34 scatter gather elements. 596 */ 597 #define AAC_QUIRK_34SG 0x0002 598 599 /* 600 * This adapter is a slave (no Firmware) 601 */ 602 #define AAC_QUIRK_SLAVE 0x0004 603 604 /* 605 * This adapter is a master. 606 */ 607 #define AAC_QUIRK_MASTER 0x0008 608 609 /* 610 * Some adapter firmware perform poorly when it must split up scatter gathers 611 * in order to deal with the limits of the underlying CHIM. This limit in this 612 * class of adapters is 17 scatter gather elements. 613 */ 614 #define AAC_QUIRK_17SG 0x0010 615 616 /* 617 * Some adapter firmware does not support 64 bit scsi passthrough 618 * commands. 619 */ 620 #define AAC_QUIRK_SCSI_32 0x0020 621 622 /* 623 * The adapter interface specs all queues to be located in the same 624 * physically contiguous block. The host structure that defines the 625 * commuication queues will assume they are each a separate physically 626 * contiguous memory region that will support them all being one big 627 * contiguous block. 628 * There is a command and response queue for each level and direction of 629 * commuication. These regions are accessed by both the host and adapter. 630 */ 631 632 struct aac_queue { 633 u64 logical; /*address we give the adapter */ 634 struct aac_entry *base; /*system virtual address */ 635 struct aac_qhdr headers; /*producer,consumer q headers*/ 636 u32 entries; /*Number of queue entries */ 637 wait_queue_head_t qfull; /*Event to wait on if q full */ 638 wait_queue_head_t cmdready; /*Cmd ready from the adapter */ 639 /* This is only valid for adapter to host command queues. */ 640 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ 641 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 642 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 643 /* only valid for command queues which receive entries from the adapter. */ 644 /* Number of entries on outstanding queue. */ 645 atomic_t numpending; 646 struct aac_dev * dev; /* Back pointer to adapter structure */ 647 }; 648 649 /* 650 * Message queues. The order here is important, see also the 651 * queue type ordering 652 */ 653 654 struct aac_queue_block 655 { 656 struct aac_queue queue[8]; 657 }; 658 659 /* 660 * SaP1 Message Unit Registers 661 */ 662 663 struct sa_drawbridge_CSR { 664 /* Offset | Name */ 665 __le32 reserved[10]; /* 00h-27h | Reserved */ 666 u8 LUT_Offset; /* 28h | Lookup Table Offset */ 667 u8 reserved1[3]; /* 29h-2bh | Reserved */ 668 __le32 LUT_Data; /* 2ch | Looup Table Data */ 669 __le32 reserved2[26]; /* 30h-97h | Reserved */ 670 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */ 671 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */ 672 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */ 673 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */ 674 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */ 675 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */ 676 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */ 677 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */ 678 __le32 MAILBOX0; /* a8h | Scratchpad 0 */ 679 __le32 MAILBOX1; /* ach | Scratchpad 1 */ 680 __le32 MAILBOX2; /* b0h | Scratchpad 2 */ 681 __le32 MAILBOX3; /* b4h | Scratchpad 3 */ 682 __le32 MAILBOX4; /* b8h | Scratchpad 4 */ 683 __le32 MAILBOX5; /* bch | Scratchpad 5 */ 684 __le32 MAILBOX6; /* c0h | Scratchpad 6 */ 685 __le32 MAILBOX7; /* c4h | Scratchpad 7 */ 686 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */ 687 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */ 688 __le32 reserved3[12]; /* d0h-ffh | reserved */ 689 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */ 690 }; 691 692 #define Mailbox0 SaDbCSR.MAILBOX0 693 #define Mailbox1 SaDbCSR.MAILBOX1 694 #define Mailbox2 SaDbCSR.MAILBOX2 695 #define Mailbox3 SaDbCSR.MAILBOX3 696 #define Mailbox4 SaDbCSR.MAILBOX4 697 #define Mailbox5 SaDbCSR.MAILBOX5 698 #define Mailbox6 SaDbCSR.MAILBOX6 699 #define Mailbox7 SaDbCSR.MAILBOX7 700 701 #define DoorbellReg_p SaDbCSR.PRISETIRQ 702 #define DoorbellReg_s SaDbCSR.SECSETIRQ 703 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ 704 705 706 #define DOORBELL_0 0x0001 707 #define DOORBELL_1 0x0002 708 #define DOORBELL_2 0x0004 709 #define DOORBELL_3 0x0008 710 #define DOORBELL_4 0x0010 711 #define DOORBELL_5 0x0020 712 #define DOORBELL_6 0x0040 713 714 715 #define PrintfReady DOORBELL_5 716 #define PrintfDone DOORBELL_5 717 718 struct sa_registers { 719 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */ 720 }; 721 722 723 #define SA_INIT_NUM_MSIXVECTORS 1 724 725 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 726 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 727 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) 728 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) 729 730 /* 731 * Rx Message Unit Registers 732 */ 733 734 struct rx_mu_registers { 735 /* Local | PCI*| Name */ 736 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */ 737 __le32 reserved0; /* 1304h | 04h | Reserved */ 738 __le32 AWR; /* 1308h | 08h | APIC Window Register */ 739 __le32 reserved1; /* 130Ch | 0Ch | Reserved */ 740 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */ 741 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */ 742 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */ 743 __le32 IISR; /* 1324h | 24h | Inbound Interrupt 744 Status Register */ 745 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt 746 Mask Register */ 747 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */ 748 __le32 OISR; /* 1330h | 30h | Outbound Interrupt 749 Status Register */ 750 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt 751 Mask Register */ 752 __le32 reserved2; /* 1338h | 38h | Reserved */ 753 __le32 reserved3; /* 133Ch | 3Ch | Reserved */ 754 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */ 755 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */ 756 /* * Must access through ATU Inbound 757 Translation Window */ 758 }; 759 760 struct rx_inbound { 761 __le32 Mailbox[8]; 762 }; 763 764 #define INBOUNDDOORBELL_0 0x00000001 765 #define INBOUNDDOORBELL_1 0x00000002 766 #define INBOUNDDOORBELL_2 0x00000004 767 #define INBOUNDDOORBELL_3 0x00000008 768 #define INBOUNDDOORBELL_4 0x00000010 769 #define INBOUNDDOORBELL_5 0x00000020 770 #define INBOUNDDOORBELL_6 0x00000040 771 772 #define OUTBOUNDDOORBELL_0 0x00000001 773 #define OUTBOUNDDOORBELL_1 0x00000002 774 #define OUTBOUNDDOORBELL_2 0x00000004 775 #define OUTBOUNDDOORBELL_3 0x00000008 776 #define OUTBOUNDDOORBELL_4 0x00000010 777 778 #define InboundDoorbellReg MUnit.IDR 779 #define OutboundDoorbellReg MUnit.ODR 780 781 struct rx_registers { 782 struct rx_mu_registers MUnit; /* 1300h - 1347h */ 783 __le32 reserved1[2]; /* 1348h - 134ch */ 784 struct rx_inbound IndexRegs; 785 }; 786 787 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) 788 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) 789 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) 790 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) 791 792 /* 793 * Rkt Message Unit Registers (same as Rx, except a larger reserve region) 794 */ 795 796 #define rkt_mu_registers rx_mu_registers 797 #define rkt_inbound rx_inbound 798 799 struct rkt_registers { 800 struct rkt_mu_registers MUnit; /* 1300h - 1347h */ 801 __le32 reserved1[1006]; /* 1348h - 22fch */ 802 struct rkt_inbound IndexRegs; /* 2300h - */ 803 }; 804 805 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) 806 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) 807 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR)) 808 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR)) 809 810 /* 811 * PMC SRC message unit registers 812 */ 813 814 #define src_inbound rx_inbound 815 816 struct src_mu_registers { 817 /* PCI*| Name */ 818 __le32 reserved0[6]; /* 00h | Reserved */ 819 __le32 IOAR[2]; /* 18h | IOA->host interrupt register */ 820 __le32 IDR; /* 20h | Inbound Doorbell Register */ 821 __le32 IISR; /* 24h | Inbound Int. Status Register */ 822 __le32 reserved1[3]; /* 28h | Reserved */ 823 __le32 OIMR; /* 34h | Outbound Int. Mask Register */ 824 __le32 reserved2[25]; /* 38h | Reserved */ 825 __le32 ODR_R; /* 9ch | Outbound Doorbell Read */ 826 __le32 ODR_C; /* a0h | Outbound Doorbell Clear */ 827 __le32 reserved3[6]; /* a4h | Reserved */ 828 __le32 OMR; /* bch | Outbound Message Register */ 829 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */ 830 __le32 IQ_H; /* c4h | Inbound Queue (High address) */ 831 __le32 ODR_MSI; /* c8h | MSI register for sync./AIF */ 832 }; 833 834 struct src_registers { 835 struct src_mu_registers MUnit; /* 00h - cbh */ 836 union { 837 struct { 838 __le32 reserved1[130789]; /* cch - 7fc5fh */ 839 struct src_inbound IndexRegs; /* 7fc60h */ 840 } tupelo; 841 struct { 842 __le32 reserved1[973]; /* cch - fffh */ 843 struct src_inbound IndexRegs; /* 1000h */ 844 } denali; 845 } u; 846 }; 847 848 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR)) 849 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR)) 850 #define src_writeb(AEP, CSR, value) writeb(value, \ 851 &((AEP)->regs.src.bar0->CSR)) 852 #define src_writel(AEP, CSR, value) writel(value, \ 853 &((AEP)->regs.src.bar0->CSR)) 854 #if defined(writeq) 855 #define src_writeq(AEP, CSR, value) writeq(value, \ 856 &((AEP)->regs.src.bar0->CSR)) 857 #endif 858 859 #define SRC_ODR_SHIFT 12 860 #define SRC_IDR_SHIFT 9 861 862 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx); 863 864 struct aac_fib_context { 865 s16 type; // used for verification of structure 866 s16 size; 867 u32 unique; // unique value representing this context 868 ulong jiffies; // used for cleanup - dmb changed to ulong 869 struct list_head next; // used to link context's into a linked list 870 struct semaphore wait_sem; // this is used to wait for the next fib to arrive. 871 int wait; // Set to true when thread is in WaitForSingleObject 872 unsigned long count; // total number of FIBs on FibList 873 struct list_head fib_list; // this holds fibs and their attachd hw_fibs 874 }; 875 876 struct sense_data { 877 u8 error_code; /* 70h (current errors), 71h(deferred errors) */ 878 u8 valid:1; /* A valid bit of one indicates that the information */ 879 /* field contains valid information as defined in the 880 * SCSI-2 Standard. 881 */ 882 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */ 883 u8 sense_key:4; /* Sense Key */ 884 u8 reserved:1; 885 u8 ILI:1; /* Incorrect Length Indicator */ 886 u8 EOM:1; /* End Of Medium - reserved for random access devices */ 887 u8 filemark:1; /* Filemark - reserved for random access devices */ 888 889 u8 information[4]; /* for direct-access devices, contains the unsigned 890 * logical block address or residue associated with 891 * the sense key 892 */ 893 u8 add_sense_len; /* number of additional sense bytes to follow this field */ 894 u8 cmnd_info[4]; /* not used */ 895 u8 ASC; /* Additional Sense Code */ 896 u8 ASCQ; /* Additional Sense Code Qualifier */ 897 u8 FRUC; /* Field Replaceable Unit Code - not used */ 898 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data 899 * was in error 900 */ 901 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that 902 * the bit_ptr field has valid value 903 */ 904 u8 reserved2:2; 905 u8 CD:1; /* command data bit: 1- illegal parameter in CDB. 906 * 0- illegal parameter in data. 907 */ 908 u8 SKSV:1; 909 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */ 910 }; 911 912 struct fsa_dev_info { 913 u64 last; 914 u64 size; 915 u32 type; 916 u32 config_waiting_on; 917 unsigned long config_waiting_stamp; 918 u16 queue_depth; 919 u8 config_needed; 920 u8 valid; 921 u8 ro; 922 u8 locked; 923 u8 deleted; 924 char devname[8]; 925 struct sense_data sense_data; 926 u32 block_size; 927 }; 928 929 struct fib { 930 void *next; /* this is used by the allocator */ 931 s16 type; 932 s16 size; 933 /* 934 * The Adapter that this I/O is destined for. 935 */ 936 struct aac_dev *dev; 937 /* 938 * This is the event the sendfib routine will wait on if the 939 * caller did not pass one and this is synch io. 940 */ 941 struct semaphore event_wait; 942 spinlock_t event_lock; 943 944 u32 done; /* gets set to 1 when fib is complete */ 945 fib_callback callback; 946 void *callback_data; 947 u32 flags; // u32 dmb was ulong 948 /* 949 * And for the internal issue/reply queues (we may be able 950 * to merge these two) 951 */ 952 struct list_head fiblink; 953 void *data; 954 u32 vector_no; 955 struct hw_fib *hw_fib_va; /* Actual shared object */ 956 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/ 957 }; 958 959 /* 960 * Adapter Information Block 961 * 962 * This is returned by the RequestAdapterInfo block 963 */ 964 965 struct aac_adapter_info 966 { 967 __le32 platform; 968 __le32 cpu; 969 __le32 subcpu; 970 __le32 clock; 971 __le32 execmem; 972 __le32 buffermem; 973 __le32 totalmem; 974 __le32 kernelrev; 975 __le32 kernelbuild; 976 __le32 monitorrev; 977 __le32 monitorbuild; 978 __le32 hwrev; 979 __le32 hwbuild; 980 __le32 biosrev; 981 __le32 biosbuild; 982 __le32 cluster; 983 __le32 clusterchannelmask; 984 __le32 serial[2]; 985 __le32 battery; 986 __le32 options; 987 __le32 OEM; 988 }; 989 990 struct aac_supplement_adapter_info 991 { 992 u8 AdapterTypeText[17+1]; 993 u8 Pad[2]; 994 __le32 FlashMemoryByteSize; 995 __le32 FlashImageId; 996 __le32 MaxNumberPorts; 997 __le32 Version; 998 __le32 FeatureBits; 999 u8 SlotNumber; 1000 u8 ReservedPad0[3]; 1001 u8 BuildDate[12]; 1002 __le32 CurrentNumberPorts; 1003 struct { 1004 u8 AssemblyPn[8]; 1005 u8 FruPn[8]; 1006 u8 BatteryFruPn[8]; 1007 u8 EcVersionString[8]; 1008 u8 Tsid[12]; 1009 } VpdInfo; 1010 __le32 FlashFirmwareRevision; 1011 __le32 FlashFirmwareBuild; 1012 __le32 RaidTypeMorphOptions; 1013 __le32 FlashFirmwareBootRevision; 1014 __le32 FlashFirmwareBootBuild; 1015 u8 MfgPcbaSerialNo[12]; 1016 u8 MfgWWNName[8]; 1017 __le32 SupportedOptions2; 1018 __le32 StructExpansion; 1019 /* StructExpansion == 1 */ 1020 __le32 FeatureBits3; 1021 __le32 SupportedPerformanceModes; 1022 __le32 ReservedForFutureGrowth[80]; 1023 }; 1024 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010) 1025 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000) 1026 /* SupportedOptions2 */ 1027 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001) 1028 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002) 1029 #define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004) 1030 #define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000) 1031 /* 4KB sector size */ 1032 #define AAC_OPTION_VARIABLE_BLOCK_SIZE cpu_to_le32(0x00040000) 1033 /* 240 simple volume support */ 1034 #define AAC_OPTION_SUPPORTED_240_VOLUMES cpu_to_le32(0x10000000) 1035 #define AAC_SIS_VERSION_V3 3 1036 #define AAC_SIS_SLOT_UNKNOWN 0xFF 1037 1038 #define GetBusInfo 0x00000009 1039 struct aac_bus_info { 1040 __le32 Command; /* VM_Ioctl */ 1041 __le32 ObjType; /* FT_DRIVE */ 1042 __le32 MethodId; /* 1 = SCSI Layer */ 1043 __le32 ObjectId; /* Handle */ 1044 __le32 CtlCmd; /* GetBusInfo */ 1045 }; 1046 1047 struct aac_bus_info_response { 1048 __le32 Status; /* ST_OK */ 1049 __le32 ObjType; 1050 __le32 MethodId; /* unused */ 1051 __le32 ObjectId; /* unused */ 1052 __le32 CtlCmd; /* unused */ 1053 __le32 ProbeComplete; 1054 __le32 BusCount; 1055 __le32 TargetsPerBus; 1056 u8 InitiatorBusId[10]; 1057 u8 BusValid[10]; 1058 }; 1059 1060 /* 1061 * Battery platforms 1062 */ 1063 #define AAC_BAT_REQ_PRESENT (1) 1064 #define AAC_BAT_REQ_NOTPRESENT (2) 1065 #define AAC_BAT_OPT_PRESENT (3) 1066 #define AAC_BAT_OPT_NOTPRESENT (4) 1067 #define AAC_BAT_NOT_SUPPORTED (5) 1068 /* 1069 * cpu types 1070 */ 1071 #define AAC_CPU_SIMULATOR (1) 1072 #define AAC_CPU_I960 (2) 1073 #define AAC_CPU_STRONGARM (3) 1074 1075 /* 1076 * Supported Options 1077 */ 1078 #define AAC_OPT_SNAPSHOT cpu_to_le32(1) 1079 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1) 1080 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2) 1081 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3) 1082 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4) 1083 #define AAC_OPT_RAID50 cpu_to_le32(1<<5) 1084 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6) 1085 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7) 1086 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8) 1087 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9) 1088 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10) 1089 #define AAC_OPT_ALARM cpu_to_le32(1<<11) 1090 #define AAC_OPT_NONDASD cpu_to_le32(1<<12) 1091 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13) 1092 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14) 1093 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16) 1094 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17) 1095 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18) 1096 #define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28) 1097 #define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29) 1098 #define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30) 1099 #define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31) 1100 1101 /* MSIX context */ 1102 struct aac_msix_ctx { 1103 int vector_no; 1104 struct aac_dev *dev; 1105 }; 1106 1107 struct aac_dev 1108 { 1109 struct list_head entry; 1110 const char *name; 1111 int id; 1112 1113 /* 1114 * negotiated FIB settings 1115 */ 1116 unsigned max_fib_size; 1117 unsigned sg_tablesize; 1118 unsigned max_num_aif; 1119 1120 /* 1121 * Map for 128 fib objects (64k) 1122 */ 1123 dma_addr_t hw_fib_pa; 1124 struct hw_fib *hw_fib_va; 1125 struct hw_fib *aif_base_va; 1126 /* 1127 * Fib Headers 1128 */ 1129 struct fib *fibs; 1130 1131 struct fib *free_fib; 1132 spinlock_t fib_lock; 1133 1134 struct mutex ioctl_mutex; 1135 struct aac_queue_block *queues; 1136 /* 1137 * The user API will use an IOCTL to register itself to receive 1138 * FIBs from the adapter. The following list is used to keep 1139 * track of all the threads that have requested these FIBs. The 1140 * mutex is used to synchronize access to all data associated 1141 * with the adapter fibs. 1142 */ 1143 struct list_head fib_list; 1144 1145 struct adapter_ops a_ops; 1146 unsigned long fsrev; /* Main driver's revision number */ 1147 1148 resource_size_t base_start; /* main IO base */ 1149 resource_size_t dbg_base; /* address of UART 1150 * debug buffer */ 1151 1152 resource_size_t base_size, dbg_size; /* Size of 1153 * mapped in region */ 1154 1155 struct aac_init *init; /* Holds initialization info to communicate with adapter */ 1156 dma_addr_t init_pa; /* Holds physical address of the init struct */ 1157 1158 u32 *host_rrq; /* response queue 1159 * if AAC_COMM_MESSAGE_TYPE1 */ 1160 1161 dma_addr_t host_rrq_pa; /* phys. address */ 1162 /* index into rrq buffer */ 1163 u32 host_rrq_idx[AAC_MAX_MSIX]; 1164 atomic_t rrq_outstanding[AAC_MAX_MSIX]; 1165 u32 fibs_pushed_no; 1166 struct pci_dev *pdev; /* Our PCI interface */ 1167 void * printfbuf; /* pointer to buffer used for printf's from the adapter */ 1168 void * comm_addr; /* Base address of Comm area */ 1169 dma_addr_t comm_phys; /* Physical Address of Comm area */ 1170 size_t comm_size; 1171 1172 struct Scsi_Host *scsi_host_ptr; 1173 int maximum_num_containers; 1174 int maximum_num_physicals; 1175 int maximum_num_channels; 1176 struct fsa_dev_info *fsa_dev; 1177 struct task_struct *thread; 1178 int cardtype; 1179 /* 1180 *This lock will protect the two 32-bit 1181 *writes to the Inbound Queue 1182 */ 1183 spinlock_t iq_lock; 1184 1185 /* 1186 * The following is the device specific extension. 1187 */ 1188 #ifndef AAC_MIN_FOOTPRINT_SIZE 1189 # define AAC_MIN_FOOTPRINT_SIZE 8192 1190 # define AAC_MIN_SRC_BAR0_SIZE 0x400000 1191 # define AAC_MIN_SRC_BAR1_SIZE 0x800 1192 # define AAC_MIN_SRCV_BAR0_SIZE 0x100000 1193 # define AAC_MIN_SRCV_BAR1_SIZE 0x400 1194 #endif 1195 union 1196 { 1197 struct sa_registers __iomem *sa; 1198 struct rx_registers __iomem *rx; 1199 struct rkt_registers __iomem *rkt; 1200 struct { 1201 struct src_registers __iomem *bar0; 1202 char __iomem *bar1; 1203 } src; 1204 } regs; 1205 volatile void __iomem *base, *dbg_base_mapped; 1206 volatile struct rx_inbound __iomem *IndexRegs; 1207 u32 OIMR; /* Mask Register Cache */ 1208 /* 1209 * AIF thread states 1210 */ 1211 u32 aif_thread; 1212 struct aac_adapter_info adapter_info; 1213 struct aac_supplement_adapter_info supplement_adapter_info; 1214 /* These are in adapter info but they are in the io flow so 1215 * lets break them out so we don't have to do an AND to check them 1216 */ 1217 u8 nondasd_support; 1218 u8 jbod; 1219 u8 cache_protected; 1220 u8 dac_support; 1221 u8 needs_dac; 1222 u8 raid_scsi_mode; 1223 u8 comm_interface; 1224 # define AAC_COMM_PRODUCER 0 1225 # define AAC_COMM_MESSAGE 1 1226 # define AAC_COMM_MESSAGE_TYPE1 3 1227 # define AAC_COMM_MESSAGE_TYPE2 4 1228 u8 raw_io_interface; 1229 u8 raw_io_64; 1230 u8 printf_enabled; 1231 u8 in_reset; 1232 u8 msi; 1233 int management_fib_count; 1234 spinlock_t manage_lock; 1235 spinlock_t sync_lock; 1236 int sync_mode; 1237 struct fib *sync_fib; 1238 struct list_head sync_fib_list; 1239 u32 doorbell_mask; 1240 u32 max_msix; /* max. MSI-X vectors */ 1241 u32 vector_cap; /* MSI-X vector capab.*/ 1242 int msi_enabled; /* MSI/MSI-X enabled */ 1243 struct msix_entry msixentry[AAC_MAX_MSIX]; 1244 struct aac_msix_ctx aac_msix[AAC_MAX_MSIX]; /* context */ 1245 u8 adapter_shutdown; 1246 u32 handle_pci_error; 1247 }; 1248 1249 #define aac_adapter_interrupt(dev) \ 1250 (dev)->a_ops.adapter_interrupt(dev) 1251 1252 #define aac_adapter_notify(dev, event) \ 1253 (dev)->a_ops.adapter_notify(dev, event) 1254 1255 #define aac_adapter_disable_int(dev) \ 1256 (dev)->a_ops.adapter_disable_int(dev) 1257 1258 #define aac_adapter_enable_int(dev) \ 1259 (dev)->a_ops.adapter_enable_int(dev) 1260 1261 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ 1262 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) 1263 1264 #define aac_adapter_check_health(dev) \ 1265 (dev)->a_ops.adapter_check_health(dev) 1266 1267 #define aac_adapter_restart(dev,bled) \ 1268 (dev)->a_ops.adapter_restart(dev,bled) 1269 1270 #define aac_adapter_start(dev) \ 1271 ((dev)->a_ops.adapter_start(dev)) 1272 1273 #define aac_adapter_ioremap(dev, size) \ 1274 (dev)->a_ops.adapter_ioremap(dev, size) 1275 1276 #define aac_adapter_deliver(fib) \ 1277 ((fib)->dev)->a_ops.adapter_deliver(fib) 1278 1279 #define aac_adapter_bounds(dev,cmd,lba) \ 1280 dev->a_ops.adapter_bounds(dev,cmd,lba) 1281 1282 #define aac_adapter_read(fib,cmd,lba,count) \ 1283 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count) 1284 1285 #define aac_adapter_write(fib,cmd,lba,count,fua) \ 1286 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua) 1287 1288 #define aac_adapter_scsi(fib,cmd) \ 1289 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd) 1290 1291 #define aac_adapter_comm(dev,comm) \ 1292 (dev)->a_ops.adapter_comm(dev, comm) 1293 1294 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) 1295 #define FIB_CONTEXT_FLAG (0x00000002) 1296 #define FIB_CONTEXT_FLAG_WAIT (0x00000004) 1297 #define FIB_CONTEXT_FLAG_FASTRESP (0x00000008) 1298 1299 /* 1300 * Define the command values 1301 */ 1302 1303 #define Null 0 1304 #define GetAttributes 1 1305 #define SetAttributes 2 1306 #define Lookup 3 1307 #define ReadLink 4 1308 #define Read 5 1309 #define Write 6 1310 #define Create 7 1311 #define MakeDirectory 8 1312 #define SymbolicLink 9 1313 #define MakeNode 10 1314 #define Removex 11 1315 #define RemoveDirectoryx 12 1316 #define Rename 13 1317 #define Link 14 1318 #define ReadDirectory 15 1319 #define ReadDirectoryPlus 16 1320 #define FileSystemStatus 17 1321 #define FileSystemInfo 18 1322 #define PathConfigure 19 1323 #define Commit 20 1324 #define Mount 21 1325 #define UnMount 22 1326 #define Newfs 23 1327 #define FsCheck 24 1328 #define FsSync 25 1329 #define SimReadWrite 26 1330 #define SetFileSystemStatus 27 1331 #define BlockRead 28 1332 #define BlockWrite 29 1333 #define NvramIoctl 30 1334 #define FsSyncWait 31 1335 #define ClearArchiveBit 32 1336 #define SetAcl 33 1337 #define GetAcl 34 1338 #define AssignAcl 35 1339 #define FaultInsertion 36 /* Fault Insertion Command */ 1340 #define CrazyCache 37 /* Crazycache */ 1341 1342 #define MAX_FSACOMMAND_NUM 38 1343 1344 1345 /* 1346 * Define the status returns. These are very unixlike although 1347 * most are not in fact used 1348 */ 1349 1350 #define ST_OK 0 1351 #define ST_PERM 1 1352 #define ST_NOENT 2 1353 #define ST_IO 5 1354 #define ST_NXIO 6 1355 #define ST_E2BIG 7 1356 #define ST_ACCES 13 1357 #define ST_EXIST 17 1358 #define ST_XDEV 18 1359 #define ST_NODEV 19 1360 #define ST_NOTDIR 20 1361 #define ST_ISDIR 21 1362 #define ST_INVAL 22 1363 #define ST_FBIG 27 1364 #define ST_NOSPC 28 1365 #define ST_ROFS 30 1366 #define ST_MLINK 31 1367 #define ST_WOULDBLOCK 35 1368 #define ST_NAMETOOLONG 63 1369 #define ST_NOTEMPTY 66 1370 #define ST_DQUOT 69 1371 #define ST_STALE 70 1372 #define ST_REMOTE 71 1373 #define ST_NOT_READY 72 1374 #define ST_BADHANDLE 10001 1375 #define ST_NOT_SYNC 10002 1376 #define ST_BAD_COOKIE 10003 1377 #define ST_NOTSUPP 10004 1378 #define ST_TOOSMALL 10005 1379 #define ST_SERVERFAULT 10006 1380 #define ST_BADTYPE 10007 1381 #define ST_JUKEBOX 10008 1382 #define ST_NOTMOUNTED 10009 1383 #define ST_MAINTMODE 10010 1384 #define ST_STALEACL 10011 1385 1386 /* 1387 * On writes how does the client want the data written. 1388 */ 1389 1390 #define CACHE_CSTABLE 1 1391 #define CACHE_UNSTABLE 2 1392 1393 /* 1394 * Lets the client know at which level the data was committed on 1395 * a write request 1396 */ 1397 1398 #define CMFILE_SYNCH_NVRAM 1 1399 #define CMDATA_SYNCH_NVRAM 2 1400 #define CMFILE_SYNCH 3 1401 #define CMDATA_SYNCH 4 1402 #define CMUNSTABLE 5 1403 1404 #define RIO_TYPE_WRITE 0x0000 1405 #define RIO_TYPE_READ 0x0001 1406 #define RIO_SUREWRITE 0x0008 1407 1408 #define RIO2_IO_TYPE 0x0003 1409 #define RIO2_IO_TYPE_WRITE 0x0000 1410 #define RIO2_IO_TYPE_READ 0x0001 1411 #define RIO2_IO_TYPE_VERIFY 0x0002 1412 #define RIO2_IO_ERROR 0x0004 1413 #define RIO2_IO_SUREWRITE 0x0008 1414 #define RIO2_SGL_CONFORMANT 0x0010 1415 #define RIO2_SG_FORMAT 0xF000 1416 #define RIO2_SG_FORMAT_ARC 0x0000 1417 #define RIO2_SG_FORMAT_SRL 0x1000 1418 #define RIO2_SG_FORMAT_IEEE1212 0x2000 1419 1420 struct aac_read 1421 { 1422 __le32 command; 1423 __le32 cid; 1424 __le32 block; 1425 __le32 count; 1426 struct sgmap sg; // Must be last in struct because it is variable 1427 }; 1428 1429 struct aac_read64 1430 { 1431 __le32 command; 1432 __le16 cid; 1433 __le16 sector_count; 1434 __le32 block; 1435 __le16 pad; 1436 __le16 flags; 1437 struct sgmap64 sg; // Must be last in struct because it is variable 1438 }; 1439 1440 struct aac_read_reply 1441 { 1442 __le32 status; 1443 __le32 count; 1444 }; 1445 1446 struct aac_write 1447 { 1448 __le32 command; 1449 __le32 cid; 1450 __le32 block; 1451 __le32 count; 1452 __le32 stable; // Not used 1453 struct sgmap sg; // Must be last in struct because it is variable 1454 }; 1455 1456 struct aac_write64 1457 { 1458 __le32 command; 1459 __le16 cid; 1460 __le16 sector_count; 1461 __le32 block; 1462 __le16 pad; 1463 __le16 flags; 1464 struct sgmap64 sg; // Must be last in struct because it is variable 1465 }; 1466 struct aac_write_reply 1467 { 1468 __le32 status; 1469 __le32 count; 1470 __le32 committed; 1471 }; 1472 1473 struct aac_raw_io 1474 { 1475 __le32 block[2]; 1476 __le32 count; 1477 __le16 cid; 1478 __le16 flags; /* 00 W, 01 R */ 1479 __le16 bpTotal; /* reserved for F/W use */ 1480 __le16 bpComplete; /* reserved for F/W use */ 1481 struct sgmapraw sg; 1482 }; 1483 1484 struct aac_raw_io2 { 1485 __le32 blockLow; 1486 __le32 blockHigh; 1487 __le32 byteCount; 1488 __le16 cid; 1489 __le16 flags; /* RIO2 flags */ 1490 __le32 sgeFirstSize; /* size of first sge el. */ 1491 __le32 sgeNominalSize; /* size of 2nd sge el. (if conformant) */ 1492 u8 sgeCnt; /* only 8 bits required */ 1493 u8 bpTotal; /* reserved for F/W use */ 1494 u8 bpComplete; /* reserved for F/W use */ 1495 u8 sgeFirstIndex; /* reserved for F/W use */ 1496 u8 unused[4]; 1497 struct sge_ieee1212 sge[1]; 1498 }; 1499 1500 #define CT_FLUSH_CACHE 129 1501 struct aac_synchronize { 1502 __le32 command; /* VM_ContainerConfig */ 1503 __le32 type; /* CT_FLUSH_CACHE */ 1504 __le32 cid; 1505 __le32 parm1; 1506 __le32 parm2; 1507 __le32 parm3; 1508 __le32 parm4; 1509 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */ 1510 }; 1511 1512 struct aac_synchronize_reply { 1513 __le32 dummy0; 1514 __le32 dummy1; 1515 __le32 status; /* CT_OK */ 1516 __le32 parm1; 1517 __le32 parm2; 1518 __le32 parm3; 1519 __le32 parm4; 1520 __le32 parm5; 1521 u8 data[16]; 1522 }; 1523 1524 #define CT_POWER_MANAGEMENT 245 1525 #define CT_PM_START_UNIT 2 1526 #define CT_PM_STOP_UNIT 3 1527 #define CT_PM_UNIT_IMMEDIATE 1 1528 struct aac_power_management { 1529 __le32 command; /* VM_ContainerConfig */ 1530 __le32 type; /* CT_POWER_MANAGEMENT */ 1531 __le32 sub; /* CT_PM_* */ 1532 __le32 cid; 1533 __le32 parm; /* CT_PM_sub_* */ 1534 }; 1535 1536 #define CT_PAUSE_IO 65 1537 #define CT_RELEASE_IO 66 1538 struct aac_pause { 1539 __le32 command; /* VM_ContainerConfig */ 1540 __le32 type; /* CT_PAUSE_IO */ 1541 __le32 timeout; /* 10ms ticks */ 1542 __le32 min; 1543 __le32 noRescan; 1544 __le32 parm3; 1545 __le32 parm4; 1546 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */ 1547 }; 1548 1549 struct aac_srb 1550 { 1551 __le32 function; 1552 __le32 channel; 1553 __le32 id; 1554 __le32 lun; 1555 __le32 timeout; 1556 __le32 flags; 1557 __le32 count; // Data xfer size 1558 __le32 retry_limit; 1559 __le32 cdb_size; 1560 u8 cdb[16]; 1561 struct sgmap sg; 1562 }; 1563 1564 /* 1565 * This and associated data structs are used by the 1566 * ioctl caller and are in cpu order. 1567 */ 1568 struct user_aac_srb 1569 { 1570 u32 function; 1571 u32 channel; 1572 u32 id; 1573 u32 lun; 1574 u32 timeout; 1575 u32 flags; 1576 u32 count; // Data xfer size 1577 u32 retry_limit; 1578 u32 cdb_size; 1579 u8 cdb[16]; 1580 struct user_sgmap sg; 1581 }; 1582 1583 #define AAC_SENSE_BUFFERSIZE 30 1584 1585 struct aac_srb_reply 1586 { 1587 __le32 status; 1588 __le32 srb_status; 1589 __le32 scsi_status; 1590 __le32 data_xfer_length; 1591 __le32 sense_data_size; 1592 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE 1593 }; 1594 /* 1595 * SRB Flags 1596 */ 1597 #define SRB_NoDataXfer 0x0000 1598 #define SRB_DisableDisconnect 0x0004 1599 #define SRB_DisableSynchTransfer 0x0008 1600 #define SRB_BypassFrozenQueue 0x0010 1601 #define SRB_DisableAutosense 0x0020 1602 #define SRB_DataIn 0x0040 1603 #define SRB_DataOut 0x0080 1604 1605 /* 1606 * SRB Functions - set in aac_srb->function 1607 */ 1608 #define SRBF_ExecuteScsi 0x0000 1609 #define SRBF_ClaimDevice 0x0001 1610 #define SRBF_IO_Control 0x0002 1611 #define SRBF_ReceiveEvent 0x0003 1612 #define SRBF_ReleaseQueue 0x0004 1613 #define SRBF_AttachDevice 0x0005 1614 #define SRBF_ReleaseDevice 0x0006 1615 #define SRBF_Shutdown 0x0007 1616 #define SRBF_Flush 0x0008 1617 #define SRBF_AbortCommand 0x0010 1618 #define SRBF_ReleaseRecovery 0x0011 1619 #define SRBF_ResetBus 0x0012 1620 #define SRBF_ResetDevice 0x0013 1621 #define SRBF_TerminateIO 0x0014 1622 #define SRBF_FlushQueue 0x0015 1623 #define SRBF_RemoveDevice 0x0016 1624 #define SRBF_DomainValidation 0x0017 1625 1626 /* 1627 * SRB SCSI Status - set in aac_srb->scsi_status 1628 */ 1629 #define SRB_STATUS_PENDING 0x00 1630 #define SRB_STATUS_SUCCESS 0x01 1631 #define SRB_STATUS_ABORTED 0x02 1632 #define SRB_STATUS_ABORT_FAILED 0x03 1633 #define SRB_STATUS_ERROR 0x04 1634 #define SRB_STATUS_BUSY 0x05 1635 #define SRB_STATUS_INVALID_REQUEST 0x06 1636 #define SRB_STATUS_INVALID_PATH_ID 0x07 1637 #define SRB_STATUS_NO_DEVICE 0x08 1638 #define SRB_STATUS_TIMEOUT 0x09 1639 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A 1640 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B 1641 #define SRB_STATUS_MESSAGE_REJECTED 0x0D 1642 #define SRB_STATUS_BUS_RESET 0x0E 1643 #define SRB_STATUS_PARITY_ERROR 0x0F 1644 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10 1645 #define SRB_STATUS_NO_HBA 0x11 1646 #define SRB_STATUS_DATA_OVERRUN 0x12 1647 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13 1648 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14 1649 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15 1650 #define SRB_STATUS_REQUEST_FLUSHED 0x16 1651 #define SRB_STATUS_DELAYED_RETRY 0x17 1652 #define SRB_STATUS_INVALID_LUN 0x20 1653 #define SRB_STATUS_INVALID_TARGET_ID 0x21 1654 #define SRB_STATUS_BAD_FUNCTION 0x22 1655 #define SRB_STATUS_ERROR_RECOVERY 0x23 1656 #define SRB_STATUS_NOT_STARTED 0x24 1657 #define SRB_STATUS_NOT_IN_USE 0x30 1658 #define SRB_STATUS_FORCE_ABORT 0x31 1659 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32 1660 1661 /* 1662 * Object-Server / Volume-Manager Dispatch Classes 1663 */ 1664 1665 #define VM_Null 0 1666 #define VM_NameServe 1 1667 #define VM_ContainerConfig 2 1668 #define VM_Ioctl 3 1669 #define VM_FilesystemIoctl 4 1670 #define VM_CloseAll 5 1671 #define VM_CtBlockRead 6 1672 #define VM_CtBlockWrite 7 1673 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */ 1674 #define VM_SliceBlockWrite 9 1675 #define VM_DriveBlockRead 10 /* raw access to physical devices */ 1676 #define VM_DriveBlockWrite 11 1677 #define VM_EnclosureMgt 12 /* enclosure management */ 1678 #define VM_Unused 13 /* used to be diskset management */ 1679 #define VM_CtBlockVerify 14 1680 #define VM_CtPerf 15 /* performance test */ 1681 #define VM_CtBlockRead64 16 1682 #define VM_CtBlockWrite64 17 1683 #define VM_CtBlockVerify64 18 1684 #define VM_CtHostRead64 19 1685 #define VM_CtHostWrite64 20 1686 #define VM_DrvErrTblLog 21 1687 #define VM_NameServe64 22 1688 #define VM_NameServeAllBlk 30 1689 1690 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */ 1691 1692 /* 1693 * Descriptive information (eg, vital stats) 1694 * that a content manager might report. The 1695 * FileArray filesystem component is one example 1696 * of a content manager. Raw mode might be 1697 * another. 1698 */ 1699 1700 struct aac_fsinfo { 1701 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */ 1702 __le32 fsBlockSize; 1703 __le32 fsFragSize; 1704 __le32 fsMaxExtendSize; 1705 __le32 fsSpaceUnits; 1706 __le32 fsMaxNumFiles; 1707 __le32 fsNumFreeFiles; 1708 __le32 fsInodeDensity; 1709 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1710 1711 struct aac_blockdevinfo { 1712 __le32 block_size; 1713 }; 1714 1715 union aac_contentinfo { 1716 struct aac_fsinfo filesys; 1717 struct aac_blockdevinfo bdevinfo; 1718 }; 1719 1720 /* 1721 * Query for Container Configuration Status 1722 */ 1723 1724 #define CT_GET_CONFIG_STATUS 147 1725 struct aac_get_config_status { 1726 __le32 command; /* VM_ContainerConfig */ 1727 __le32 type; /* CT_GET_CONFIG_STATUS */ 1728 __le32 parm1; 1729 __le32 parm2; 1730 __le32 parm3; 1731 __le32 parm4; 1732 __le32 parm5; 1733 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */ 1734 }; 1735 1736 #define CFACT_CONTINUE 0 1737 #define CFACT_PAUSE 1 1738 #define CFACT_ABORT 2 1739 struct aac_get_config_status_resp { 1740 __le32 response; /* ST_OK */ 1741 __le32 dummy0; 1742 __le32 status; /* CT_OK */ 1743 __le32 parm1; 1744 __le32 parm2; 1745 __le32 parm3; 1746 __le32 parm4; 1747 __le32 parm5; 1748 struct { 1749 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */ 1750 __le16 flags; 1751 __le16 count; 1752 } data; 1753 }; 1754 1755 /* 1756 * Accept the configuration as-is 1757 */ 1758 1759 #define CT_COMMIT_CONFIG 152 1760 1761 struct aac_commit_config { 1762 __le32 command; /* VM_ContainerConfig */ 1763 __le32 type; /* CT_COMMIT_CONFIG */ 1764 }; 1765 1766 /* 1767 * Query for Container Configuration Status 1768 */ 1769 1770 #define CT_GET_CONTAINER_COUNT 4 1771 struct aac_get_container_count { 1772 __le32 command; /* VM_ContainerConfig */ 1773 __le32 type; /* CT_GET_CONTAINER_COUNT */ 1774 }; 1775 1776 struct aac_get_container_count_resp { 1777 __le32 response; /* ST_OK */ 1778 __le32 dummy0; 1779 __le32 MaxContainers; 1780 __le32 ContainerSwitchEntries; 1781 __le32 MaxPartitions; 1782 __le32 MaxSimpleVolumes; 1783 }; 1784 1785 1786 /* 1787 * Query for "mountable" objects, ie, objects that are typically 1788 * associated with a drive letter on the client (host) side. 1789 */ 1790 1791 struct aac_mntent { 1792 __le32 oid; 1793 u8 name[16]; /* if applicable */ 1794 struct creation_info create_info; /* if applicable */ 1795 __le32 capacity; 1796 __le32 vol; /* substrate structure */ 1797 __le32 obj; /* FT_FILESYS, etc. */ 1798 __le32 state; /* unready for mounting, 1799 readonly, etc. */ 1800 union aac_contentinfo fileinfo; /* Info specific to content 1801 manager (eg, filesystem) */ 1802 __le32 altoid; /* != oid <==> snapshot or 1803 broken mirror exists */ 1804 __le32 capacityhigh; 1805 }; 1806 1807 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */ 1808 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */ 1809 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */ 1810 #define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */ 1811 1812 struct aac_query_mount { 1813 __le32 command; 1814 __le32 type; 1815 __le32 count; 1816 }; 1817 1818 struct aac_mount { 1819 __le32 status; 1820 __le32 type; /* should be same as that requested */ 1821 __le32 count; 1822 struct aac_mntent mnt[1]; 1823 }; 1824 1825 #define CT_READ_NAME 130 1826 struct aac_get_name { 1827 __le32 command; /* VM_ContainerConfig */ 1828 __le32 type; /* CT_READ_NAME */ 1829 __le32 cid; 1830 __le32 parm1; 1831 __le32 parm2; 1832 __le32 parm3; 1833 __le32 parm4; 1834 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */ 1835 }; 1836 1837 struct aac_get_name_resp { 1838 __le32 dummy0; 1839 __le32 dummy1; 1840 __le32 status; /* CT_OK */ 1841 __le32 parm1; 1842 __le32 parm2; 1843 __le32 parm3; 1844 __le32 parm4; 1845 __le32 parm5; 1846 u8 data[16]; 1847 }; 1848 1849 #define CT_CID_TO_32BITS_UID 165 1850 struct aac_get_serial { 1851 __le32 command; /* VM_ContainerConfig */ 1852 __le32 type; /* CT_CID_TO_32BITS_UID */ 1853 __le32 cid; 1854 }; 1855 1856 struct aac_get_serial_resp { 1857 __le32 dummy0; 1858 __le32 dummy1; 1859 __le32 status; /* CT_OK */ 1860 __le32 uid; 1861 }; 1862 1863 /* 1864 * The following command is sent to shut down each container. 1865 */ 1866 1867 struct aac_close { 1868 __le32 command; 1869 __le32 cid; 1870 }; 1871 1872 struct aac_query_disk 1873 { 1874 s32 cnum; 1875 s32 bus; 1876 s32 id; 1877 s32 lun; 1878 u32 valid; 1879 u32 locked; 1880 u32 deleted; 1881 s32 instance; 1882 s8 name[10]; 1883 u32 unmapped; 1884 }; 1885 1886 struct aac_delete_disk { 1887 u32 disknum; 1888 u32 cnum; 1889 }; 1890 1891 struct fib_ioctl 1892 { 1893 u32 fibctx; 1894 s32 wait; 1895 char __user *fib; 1896 }; 1897 1898 struct revision 1899 { 1900 u32 compat; 1901 __le32 version; 1902 __le32 build; 1903 }; 1904 1905 1906 /* 1907 * Ugly - non Linux like ioctl coding for back compat. 1908 */ 1909 1910 #define CTL_CODE(function, method) ( \ 1911 (4<< 16) | ((function) << 2) | (method) \ 1912 ) 1913 1914 /* 1915 * Define the method codes for how buffers are passed for I/O and FS 1916 * controls 1917 */ 1918 1919 #define METHOD_BUFFERED 0 1920 #define METHOD_NEITHER 3 1921 1922 /* 1923 * Filesystem ioctls 1924 */ 1925 1926 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED) 1927 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED) 1928 #define FSACTL_DELETE_DISK 0x163 1929 #define FSACTL_QUERY_DISK 0x173 1930 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED) 1931 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED) 1932 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED) 1933 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED) 1934 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED) 1935 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER) 1936 #define FSACTL_GET_CONTAINERS 2131 1937 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED) 1938 1939 1940 struct aac_common 1941 { 1942 /* 1943 * If this value is set to 1 then interrupt moderation will occur 1944 * in the base commuication support. 1945 */ 1946 u32 irq_mod; 1947 u32 peak_fibs; 1948 u32 zero_fibs; 1949 u32 fib_timeouts; 1950 /* 1951 * Statistical counters in debug mode 1952 */ 1953 #ifdef DBG 1954 u32 FibsSent; 1955 u32 FibRecved; 1956 u32 NoResponseSent; 1957 u32 NoResponseRecved; 1958 u32 AsyncSent; 1959 u32 AsyncRecved; 1960 u32 NormalSent; 1961 u32 NormalRecved; 1962 #endif 1963 }; 1964 1965 extern struct aac_common aac_config; 1966 1967 1968 /* 1969 * The following macro is used when sending and receiving FIBs. It is 1970 * only used for debugging. 1971 */ 1972 1973 #ifdef DBG 1974 #define FIB_COUNTER_INCREMENT(counter) (counter)++ 1975 #else 1976 #define FIB_COUNTER_INCREMENT(counter) 1977 #endif 1978 1979 /* 1980 * Adapter direct commands 1981 * Monitor/Kernel API 1982 */ 1983 1984 #define BREAKPOINT_REQUEST 0x00000004 1985 #define INIT_STRUCT_BASE_ADDRESS 0x00000005 1986 #define READ_PERMANENT_PARAMETERS 0x0000000a 1987 #define WRITE_PERMANENT_PARAMETERS 0x0000000b 1988 #define HOST_CRASHING 0x0000000d 1989 #define SEND_SYNCHRONOUS_FIB 0x0000000c 1990 #define COMMAND_POST_RESULTS 0x00000014 1991 #define GET_ADAPTER_PROPERTIES 0x00000019 1992 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023 1993 #define RCV_TEMP_READINGS 0x00000025 1994 #define GET_COMM_PREFERRED_SETTINGS 0x00000026 1995 #define IOP_RESET 0x00001000 1996 #define IOP_RESET_ALWAYS 0x00001001 1997 #define RE_INIT_ADAPTER 0x000000ee 1998 1999 /* 2000 * Adapter Status Register 2001 * 2002 * Phase Staus mailbox is 32bits: 2003 * <31:16> = Phase Status 2004 * <15:0> = Phase 2005 * 2006 * The adapter reports is present state through the phase. Only 2007 * a single phase should be ever be set. Each phase can have multiple 2008 * phase status bits to provide more detailed information about the 2009 * state of the board. Care should be taken to ensure that any phase 2010 * status bits that are set when changing the phase are also valid 2011 * for the new phase or be cleared out. Adapter software (monitor, 2012 * iflash, kernel) is responsible for properly maintining the phase 2013 * status mailbox when it is running. 2014 * 2015 * MONKER_API Phases 2016 * 2017 * Phases are bit oriented. It is NOT valid to have multiple bits set 2018 */ 2019 2020 #define SELF_TEST_FAILED 0x00000004 2021 #define MONITOR_PANIC 0x00000020 2022 #define KERNEL_UP_AND_RUNNING 0x00000080 2023 #define KERNEL_PANIC 0x00000100 2024 #define FLASH_UPD_PENDING 0x00002000 2025 #define FLASH_UPD_SUCCESS 0x00004000 2026 #define FLASH_UPD_FAILED 0x00008000 2027 #define FWUPD_TIMEOUT (5 * 60) 2028 2029 /* 2030 * Doorbell bit defines 2031 */ 2032 2033 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */ 2034 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */ 2035 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */ 2036 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */ 2037 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */ 2038 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */ 2039 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */ 2040 #define DoorBellAifPending (1<<6) /* Adapter -> Host */ 2041 2042 /* PMC specific outbound doorbell bits */ 2043 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */ 2044 2045 /* 2046 * For FIB communication, we need all of the following things 2047 * to send back to the user. 2048 */ 2049 2050 #define AifCmdEventNotify 1 /* Notify of event */ 2051 #define AifEnConfigChange 3 /* Adapter configuration change */ 2052 #define AifEnContainerChange 4 /* Container configuration change */ 2053 #define AifEnDeviceFailure 5 /* SCSI device failed */ 2054 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */ 2055 #define EM_DRIVE_INSERTION 31 2056 #define EM_DRIVE_REMOVAL 32 2057 #define EM_SES_DRIVE_INSERTION 33 2058 #define EM_SES_DRIVE_REMOVAL 26 2059 #define AifEnBatteryEvent 14 /* Change in Battery State */ 2060 #define AifEnAddContainer 15 /* A new array was created */ 2061 #define AifEnDeleteContainer 16 /* A container was deleted */ 2062 #define AifEnExpEvent 23 /* Firmware Event Log */ 2063 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */ 2064 #define AifHighPriority 3 /* Highest Priority Event */ 2065 #define AifEnAddJBOD 30 /* JBOD created */ 2066 #define AifEnDeleteJBOD 31 /* JBOD deleted */ 2067 2068 #define AifBuManagerEvent 42 /* Bu management*/ 2069 #define AifBuCacheDataLoss 10 2070 #define AifBuCacheDataRecover 11 2071 2072 #define AifCmdJobProgress 2 /* Progress report */ 2073 #define AifJobCtrZero 101 /* Array Zero progress */ 2074 #define AifJobStsSuccess 1 /* Job completes */ 2075 #define AifJobStsRunning 102 /* Job running */ 2076 #define AifCmdAPIReport 3 /* Report from other user of API */ 2077 #define AifCmdDriverNotify 4 /* Notify host driver of event */ 2078 #define AifDenMorphComplete 200 /* A morph operation completed */ 2079 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */ 2080 #define AifReqJobList 100 /* Gets back complete job list */ 2081 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */ 2082 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */ 2083 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */ 2084 #define AifReqTerminateJob 104 /* Terminates job */ 2085 #define AifReqSuspendJob 105 /* Suspends a job */ 2086 #define AifReqResumeJob 106 /* Resumes a job */ 2087 #define AifReqSendAPIReport 107 /* API generic report requests */ 2088 #define AifReqAPIJobStart 108 /* Start a job from the API */ 2089 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */ 2090 #define AifReqAPIJobFinish 110 /* Finish a job from the API */ 2091 2092 /* PMC NEW COMM: Request the event data */ 2093 #define AifReqEvent 200 2094 2095 /* RAW device deleted */ 2096 #define AifRawDeviceRemove 203 2097 2098 /* 2099 * Adapter Initiated FIB command structures. Start with the adapter 2100 * initiated FIBs that really come from the adapter, and get responded 2101 * to by the host. 2102 */ 2103 2104 struct aac_aifcmd { 2105 __le32 command; /* Tell host what type of notify this is */ 2106 __le32 seqnum; /* To allow ordering of reports (if necessary) */ 2107 u8 data[1]; /* Undefined length (from kernel viewpoint) */ 2108 }; 2109 2110 /** 2111 * Convert capacity to cylinders 2112 * accounting for the fact capacity could be a 64 bit value 2113 * 2114 */ 2115 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) 2116 { 2117 sector_div(capacity, divisor); 2118 return capacity; 2119 } 2120 2121 /* SCp.phase values */ 2122 #define AAC_OWNER_MIDLEVEL 0x101 2123 #define AAC_OWNER_LOWLEVEL 0x102 2124 #define AAC_OWNER_ERROR_HANDLER 0x103 2125 #define AAC_OWNER_FIRMWARE 0x106 2126 2127 int aac_acquire_irq(struct aac_dev *dev); 2128 void aac_free_irq(struct aac_dev *dev); 2129 const char *aac_driverinfo(struct Scsi_Host *); 2130 void aac_fib_vector_assign(struct aac_dev *dev); 2131 struct fib *aac_fib_alloc(struct aac_dev *dev); 2132 struct fib *aac_fib_alloc_tag(struct aac_dev *dev, struct scsi_cmnd *scmd); 2133 int aac_fib_setup(struct aac_dev *dev); 2134 void aac_fib_map_free(struct aac_dev *dev); 2135 void aac_fib_free(struct fib * context); 2136 void aac_fib_init(struct fib * context); 2137 void aac_printf(struct aac_dev *dev, u32 val); 2138 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt); 2139 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry); 2140 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum); 2141 int aac_fib_complete(struct fib * context); 2142 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data) 2143 struct aac_dev *aac_init_adapter(struct aac_dev *dev); 2144 void aac_src_access_devreg(struct aac_dev *dev, int mode); 2145 int aac_get_config_status(struct aac_dev *dev, int commit_flag); 2146 int aac_get_containers(struct aac_dev *dev); 2147 int aac_scsi_cmd(struct scsi_cmnd *cmd); 2148 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg); 2149 #ifndef shost_to_class 2150 #define shost_to_class(shost) &shost->shost_dev 2151 #endif 2152 ssize_t aac_get_serial_number(struct device *dev, char *buf); 2153 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg); 2154 int aac_rx_init(struct aac_dev *dev); 2155 int aac_rkt_init(struct aac_dev *dev); 2156 int aac_nark_init(struct aac_dev *dev); 2157 int aac_sa_init(struct aac_dev *dev); 2158 int aac_src_init(struct aac_dev *dev); 2159 int aac_srcv_init(struct aac_dev *dev); 2160 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify); 2161 void aac_define_int_mode(struct aac_dev *dev); 2162 unsigned int aac_response_normal(struct aac_queue * q); 2163 unsigned int aac_command_normal(struct aac_queue * q); 2164 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index, 2165 int isAif, int isFastResponse, 2166 struct hw_fib *aif_fib); 2167 int aac_reset_adapter(struct aac_dev * dev, int forced); 2168 int aac_check_health(struct aac_dev * dev); 2169 int aac_command_thread(void *data); 2170 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx); 2171 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size); 2172 struct aac_driver_ident* aac_get_driver_ident(int devtype); 2173 int aac_get_adapter_info(struct aac_dev* dev); 2174 int aac_send_shutdown(struct aac_dev *dev); 2175 int aac_probe_container(struct aac_dev *dev, int cid); 2176 int _aac_rx_init(struct aac_dev *dev); 2177 int aac_rx_select_comm(struct aac_dev *dev, int comm); 2178 int aac_rx_deliver_producer(struct fib * fib); 2179 char * get_container_type(unsigned type); 2180 extern int numacb; 2181 extern int acbsize; 2182 extern char aac_driver_version[]; 2183 extern int startup_timeout; 2184 extern int aif_timeout; 2185 extern int expose_physicals; 2186 extern int aac_reset_devices; 2187 extern int aac_msi; 2188 extern int aac_commit; 2189 extern int update_interval; 2190 extern int check_interval; 2191 extern int aac_check_reset; 2192