1 #ifndef dprintk 2 # define dprintk(x) 3 #endif 4 /* eg: if (nblank(dprintk(x))) */ 5 #define _nblank(x) #x 6 #define nblank(x) _nblank(x)[0] 7 8 #include <linux/interrupt.h> 9 10 /*------------------------------------------------------------------------------ 11 * D E F I N E S 12 *----------------------------------------------------------------------------*/ 13 14 #ifndef AAC_DRIVER_BUILD 15 # define AAC_DRIVER_BUILD 28900 16 # define AAC_DRIVER_BRANCH "-ms" 17 #endif 18 #define MAXIMUM_NUM_CONTAINERS 32 19 20 #define AAC_NUM_MGT_FIB 8 21 #define AAC_NUM_IO_FIB (512 - AAC_NUM_MGT_FIB) 22 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB) 23 24 #define AAC_MAX_LUN (8) 25 26 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff) 27 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256) 28 29 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE 30 31 /* 32 * These macros convert from physical channels to virtual channels 33 */ 34 #define CONTAINER_CHANNEL (0) 35 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL) 36 #define CONTAINER_TO_ID(cont) (cont) 37 #define CONTAINER_TO_LUN(cont) (0) 38 39 #define aac_phys_to_logical(x) ((x)+1) 40 #define aac_logical_to_phys(x) ((x)?(x)-1:0) 41 42 /* #define AAC_DETAILED_STATUS_INFO */ 43 44 struct diskparm 45 { 46 int heads; 47 int sectors; 48 int cylinders; 49 }; 50 51 52 /* 53 * Firmware constants 54 */ 55 56 #define CT_NONE 0 57 #define CT_OK 218 58 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */ 59 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */ 60 61 /* 62 * Host side memory scatter gather list 63 * Used by the adapter for read, write, and readdirplus operations 64 * We have separate 32 and 64 bit version because even 65 * on 64 bit systems not all cards support the 64 bit version 66 */ 67 struct sgentry { 68 __le32 addr; /* 32-bit address. */ 69 __le32 count; /* Length. */ 70 }; 71 72 struct user_sgentry { 73 u32 addr; /* 32-bit address. */ 74 u32 count; /* Length. */ 75 }; 76 77 struct sgentry64 { 78 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 79 __le32 count; /* Length. */ 80 }; 81 82 struct user_sgentry64 { 83 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 84 u32 count; /* Length. */ 85 }; 86 87 struct sgentryraw { 88 __le32 next; /* reserved for F/W use */ 89 __le32 prev; /* reserved for F/W use */ 90 __le32 addr[2]; 91 __le32 count; 92 __le32 flags; /* reserved for F/W use */ 93 }; 94 95 struct user_sgentryraw { 96 u32 next; /* reserved for F/W use */ 97 u32 prev; /* reserved for F/W use */ 98 u32 addr[2]; 99 u32 count; 100 u32 flags; /* reserved for F/W use */ 101 }; 102 103 /* 104 * SGMAP 105 * 106 * This is the SGMAP structure for all commands that use 107 * 32-bit addressing. 108 */ 109 110 struct sgmap { 111 __le32 count; 112 struct sgentry sg[1]; 113 }; 114 115 struct user_sgmap { 116 u32 count; 117 struct user_sgentry sg[1]; 118 }; 119 120 struct sgmap64 { 121 __le32 count; 122 struct sgentry64 sg[1]; 123 }; 124 125 struct user_sgmap64 { 126 u32 count; 127 struct user_sgentry64 sg[1]; 128 }; 129 130 struct sgmapraw { 131 __le32 count; 132 struct sgentryraw sg[1]; 133 }; 134 135 struct user_sgmapraw { 136 u32 count; 137 struct user_sgentryraw sg[1]; 138 }; 139 140 struct creation_info 141 { 142 u8 buildnum; /* e.g., 588 */ 143 u8 usec; /* e.g., 588 */ 144 u8 via; /* e.g., 1 = FSU, 145 * 2 = API 146 */ 147 u8 year; /* e.g., 1997 = 97 */ 148 __le32 date; /* 149 * unsigned Month :4; // 1 - 12 150 * unsigned Day :6; // 1 - 32 151 * unsigned Hour :6; // 0 - 23 152 * unsigned Minute :6; // 0 - 60 153 * unsigned Second :6; // 0 - 60 154 */ 155 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */ 156 }; 157 158 159 /* 160 * Define all the constants needed for the communication interface 161 */ 162 163 /* 164 * Define how many queue entries each queue will have and the total 165 * number of entries for the entire communication interface. Also define 166 * how many queues we support. 167 * 168 * This has to match the controller 169 */ 170 171 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response 172 #define HOST_HIGH_CMD_ENTRIES 4 173 #define HOST_NORM_CMD_ENTRIES 8 174 #define ADAP_HIGH_CMD_ENTRIES 4 175 #define ADAP_NORM_CMD_ENTRIES 512 176 #define HOST_HIGH_RESP_ENTRIES 4 177 #define HOST_NORM_RESP_ENTRIES 512 178 #define ADAP_HIGH_RESP_ENTRIES 4 179 #define ADAP_NORM_RESP_ENTRIES 8 180 181 #define TOTAL_QUEUE_ENTRIES \ 182 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \ 183 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES) 184 185 186 /* 187 * Set the queues on a 16 byte alignment 188 */ 189 190 #define QUEUE_ALIGNMENT 16 191 192 /* 193 * The queue headers define the Communication Region queues. These 194 * are physically contiguous and accessible by both the adapter and the 195 * host. Even though all queue headers are in the same contiguous block 196 * they will be represented as individual units in the data structures. 197 */ 198 199 struct aac_entry { 200 __le32 size; /* Size in bytes of Fib which this QE points to */ 201 __le32 addr; /* Receiver address of the FIB */ 202 }; 203 204 /* 205 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped 206 * adjacently and in that order. 207 */ 208 209 struct aac_qhdr { 210 __le64 header_addr;/* Address to hand the adapter to access 211 to this queue head */ 212 __le32 *producer; /* The producer index for this queue (host address) */ 213 __le32 *consumer; /* The consumer index for this queue (host address) */ 214 }; 215 216 /* 217 * Define all the events which the adapter would like to notify 218 * the host of. 219 */ 220 221 #define HostNormCmdQue 1 /* Change in host normal priority command queue */ 222 #define HostHighCmdQue 2 /* Change in host high priority command queue */ 223 #define HostNormRespQue 3 /* Change in host normal priority response queue */ 224 #define HostHighRespQue 4 /* Change in host high priority response queue */ 225 #define AdapNormRespNotFull 5 226 #define AdapHighRespNotFull 6 227 #define AdapNormCmdNotFull 7 228 #define AdapHighCmdNotFull 8 229 #define SynchCommandComplete 9 230 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */ 231 232 /* 233 * Define all the events the host wishes to notify the 234 * adapter of. The first four values much match the Qid the 235 * corresponding queue. 236 */ 237 238 #define AdapNormCmdQue 2 239 #define AdapHighCmdQue 3 240 #define AdapNormRespQue 6 241 #define AdapHighRespQue 7 242 #define HostShutdown 8 243 #define HostPowerFail 9 244 #define FatalCommError 10 245 #define HostNormRespNotFull 11 246 #define HostHighRespNotFull 12 247 #define HostNormCmdNotFull 13 248 #define HostHighCmdNotFull 14 249 #define FastIo 15 250 #define AdapPrintfDone 16 251 252 /* 253 * Define all the queues that the adapter and host use to communicate 254 * Number them to match the physical queue layout. 255 */ 256 257 enum aac_queue_types { 258 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */ 259 HostHighCmdQueue, /* Adapter to host high priority command traffic */ 260 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */ 261 AdapHighCmdQueue, /* Host to adapter high priority command traffic */ 262 HostNormRespQueue, /* Adapter to host normal priority response traffic */ 263 HostHighRespQueue, /* Adapter to host high priority response traffic */ 264 AdapNormRespQueue, /* Host to adapter normal priority response traffic */ 265 AdapHighRespQueue /* Host to adapter high priority response traffic */ 266 }; 267 268 /* 269 * Assign type values to the FSA communication data structures 270 */ 271 272 #define FIB_MAGIC 0x0001 273 274 /* 275 * Define the priority levels the FSA communication routines support. 276 */ 277 278 #define FsaNormal 1 279 280 /* transport FIB header (PMC) */ 281 struct aac_fib_xporthdr { 282 u64 HostAddress; /* FIB host address w/o xport header */ 283 u32 Size; /* FIB size excluding xport header */ 284 u32 Handle; /* driver handle to reference the FIB */ 285 u64 Reserved[2]; 286 }; 287 288 #define ALIGN32 32 289 290 /* 291 * Define the FIB. The FIB is the where all the requested data and 292 * command information are put to the application on the FSA adapter. 293 */ 294 295 struct aac_fibhdr { 296 __le32 XferState; /* Current transfer state for this CCB */ 297 __le16 Command; /* Routing information for the destination */ 298 u8 StructType; /* Type FIB */ 299 u8 Flags; /* Flags for FIB */ 300 __le16 Size; /* Size of this FIB in bytes */ 301 __le16 SenderSize; /* Size of the FIB in the sender 302 (for response sizing) */ 303 __le32 SenderFibAddress; /* Host defined data in the FIB */ 304 __le32 ReceiverFibAddress;/* Logical address of this FIB for 305 the adapter */ 306 u32 SenderData; /* Place holder for the sender to store data */ 307 union { 308 struct { 309 __le32 _ReceiverTimeStart; /* Timestamp for 310 receipt of fib */ 311 __le32 _ReceiverTimeDone; /* Timestamp for 312 completion of fib */ 313 } _s; 314 } _u; 315 }; 316 317 struct hw_fib { 318 struct aac_fibhdr header; 319 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data 320 }; 321 322 /* 323 * FIB commands 324 */ 325 326 #define TestCommandResponse 1 327 #define TestAdapterCommand 2 328 /* 329 * Lowlevel and comm commands 330 */ 331 #define LastTestCommand 100 332 #define ReinitHostNormCommandQueue 101 333 #define ReinitHostHighCommandQueue 102 334 #define ReinitHostHighRespQueue 103 335 #define ReinitHostNormRespQueue 104 336 #define ReinitAdapNormCommandQueue 105 337 #define ReinitAdapHighCommandQueue 107 338 #define ReinitAdapHighRespQueue 108 339 #define ReinitAdapNormRespQueue 109 340 #define InterfaceShutdown 110 341 #define DmaCommandFib 120 342 #define StartProfile 121 343 #define TermProfile 122 344 #define SpeedTest 123 345 #define TakeABreakPt 124 346 #define RequestPerfData 125 347 #define SetInterruptDefTimer 126 348 #define SetInterruptDefCount 127 349 #define GetInterruptDefStatus 128 350 #define LastCommCommand 129 351 /* 352 * Filesystem commands 353 */ 354 #define NuFileSystem 300 355 #define UFS 301 356 #define HostFileSystem 302 357 #define LastFileSystemCommand 303 358 /* 359 * Container Commands 360 */ 361 #define ContainerCommand 500 362 #define ContainerCommand64 501 363 #define ContainerRawIo 502 364 /* 365 * Scsi Port commands (scsi passthrough) 366 */ 367 #define ScsiPortCommand 600 368 #define ScsiPortCommand64 601 369 /* 370 * Misc house keeping and generic adapter initiated commands 371 */ 372 #define AifRequest 700 373 #define CheckRevision 701 374 #define FsaHostShutdown 702 375 #define RequestAdapterInfo 703 376 #define IsAdapterPaused 704 377 #define SendHostTime 705 378 #define RequestSupplementAdapterInfo 706 379 #define LastMiscCommand 707 380 381 /* 382 * Commands that will target the failover level on the FSA adapter 383 */ 384 385 enum fib_xfer_state { 386 HostOwned = (1<<0), 387 AdapterOwned = (1<<1), 388 FibInitialized = (1<<2), 389 FibEmpty = (1<<3), 390 AllocatedFromPool = (1<<4), 391 SentFromHost = (1<<5), 392 SentFromAdapter = (1<<6), 393 ResponseExpected = (1<<7), 394 NoResponseExpected = (1<<8), 395 AdapterProcessed = (1<<9), 396 HostProcessed = (1<<10), 397 HighPriority = (1<<11), 398 NormalPriority = (1<<12), 399 Async = (1<<13), 400 AsyncIo = (1<<13), // rpbfix: remove with new regime 401 PageFileIo = (1<<14), // rpbfix: remove with new regime 402 ShutdownRequest = (1<<15), 403 LazyWrite = (1<<16), // rpbfix: remove with new regime 404 AdapterMicroFib = (1<<17), 405 BIOSFibPath = (1<<18), 406 FastResponseCapable = (1<<19), 407 ApiFib = (1<<20), /* Its an API Fib */ 408 /* PMC NEW COMM: There is no more AIF data pending */ 409 NoMoreAifDataAvailable = (1<<21) 410 }; 411 412 /* 413 * The following defines needs to be updated any time there is an 414 * incompatible change made to the aac_init structure. 415 */ 416 417 #define ADAPTER_INIT_STRUCT_REVISION 3 418 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science 419 #define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */ 420 421 struct aac_init 422 { 423 __le32 InitStructRevision; 424 __le32 MiniPortRevision; 425 __le32 fsrev; 426 __le32 CommHeaderAddress; 427 __le32 FastIoCommAreaAddress; 428 __le32 AdapterFibsPhysicalAddress; 429 __le32 AdapterFibsVirtualAddress; 430 __le32 AdapterFibsSize; 431 __le32 AdapterFibAlign; 432 __le32 printfbuf; 433 __le32 printfbufsiz; 434 __le32 HostPhysMemPages; /* number of 4k pages of host 435 physical memory */ 436 __le32 HostElapsedSeconds; /* number of seconds since 1970. */ 437 /* 438 * ADAPTER_INIT_STRUCT_REVISION_4 begins here 439 */ 440 __le32 InitFlags; /* flags for supported features */ 441 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001 442 #define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010 443 #define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020 444 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000041 445 __le32 MaxIoCommands; /* max outstanding commands */ 446 __le32 MaxIoSize; /* largest I/O command */ 447 __le32 MaxFibSize; /* largest FIB to adapter */ 448 /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */ 449 __le32 MaxNumAif; /* max number of aif */ 450 /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */ 451 __le32 HostRRQ_AddrLow; 452 __le32 HostRRQ_AddrHigh; /* Host RRQ (response queue) for SRC */ 453 }; 454 455 enum aac_log_level { 456 LOG_AAC_INIT = 10, 457 LOG_AAC_INFORMATIONAL = 20, 458 LOG_AAC_WARNING = 30, 459 LOG_AAC_LOW_ERROR = 40, 460 LOG_AAC_MEDIUM_ERROR = 50, 461 LOG_AAC_HIGH_ERROR = 60, 462 LOG_AAC_PANIC = 70, 463 LOG_AAC_DEBUG = 80, 464 LOG_AAC_WINDBG_PRINT = 90 465 }; 466 467 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b 468 #define FSAFS_NTC_FIB_CONTEXT 0x030c 469 470 struct aac_dev; 471 struct fib; 472 struct scsi_cmnd; 473 474 struct adapter_ops 475 { 476 /* Low level operations */ 477 void (*adapter_interrupt)(struct aac_dev *dev); 478 void (*adapter_notify)(struct aac_dev *dev, u32 event); 479 void (*adapter_disable_int)(struct aac_dev *dev); 480 void (*adapter_enable_int)(struct aac_dev *dev); 481 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4); 482 int (*adapter_check_health)(struct aac_dev *dev); 483 int (*adapter_restart)(struct aac_dev *dev, int bled); 484 /* Transport operations */ 485 int (*adapter_ioremap)(struct aac_dev * dev, u32 size); 486 irq_handler_t adapter_intr; 487 /* Packet operations */ 488 int (*adapter_deliver)(struct fib * fib); 489 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba); 490 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count); 491 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua); 492 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd); 493 /* Administrative operations */ 494 int (*adapter_comm)(struct aac_dev * dev, int comm); 495 }; 496 497 /* 498 * Define which interrupt handler needs to be installed 499 */ 500 501 struct aac_driver_ident 502 { 503 int (*init)(struct aac_dev *dev); 504 char * name; 505 char * vname; 506 char * model; 507 u16 channels; 508 int quirks; 509 }; 510 /* 511 * Some adapter firmware needs communication memory 512 * below 2gig. This tells the init function to set the 513 * dma mask such that fib memory will be allocated where the 514 * adapter firmware can get to it. 515 */ 516 #define AAC_QUIRK_31BIT 0x0001 517 518 /* 519 * Some adapter firmware, when the raid card's cache is turned off, can not 520 * split up scatter gathers in order to deal with the limits of the 521 * underlying CHIM. This limit is 34 scatter gather elements. 522 */ 523 #define AAC_QUIRK_34SG 0x0002 524 525 /* 526 * This adapter is a slave (no Firmware) 527 */ 528 #define AAC_QUIRK_SLAVE 0x0004 529 530 /* 531 * This adapter is a master. 532 */ 533 #define AAC_QUIRK_MASTER 0x0008 534 535 /* 536 * Some adapter firmware perform poorly when it must split up scatter gathers 537 * in order to deal with the limits of the underlying CHIM. This limit in this 538 * class of adapters is 17 scatter gather elements. 539 */ 540 #define AAC_QUIRK_17SG 0x0010 541 542 /* 543 * Some adapter firmware does not support 64 bit scsi passthrough 544 * commands. 545 */ 546 #define AAC_QUIRK_SCSI_32 0x0020 547 548 /* 549 * The adapter interface specs all queues to be located in the same 550 * physically contiguous block. The host structure that defines the 551 * commuication queues will assume they are each a separate physically 552 * contiguous memory region that will support them all being one big 553 * contiguous block. 554 * There is a command and response queue for each level and direction of 555 * commuication. These regions are accessed by both the host and adapter. 556 */ 557 558 struct aac_queue { 559 u64 logical; /*address we give the adapter */ 560 struct aac_entry *base; /*system virtual address */ 561 struct aac_qhdr headers; /*producer,consumer q headers*/ 562 u32 entries; /*Number of queue entries */ 563 wait_queue_head_t qfull; /*Event to wait on if q full */ 564 wait_queue_head_t cmdready; /*Cmd ready from the adapter */ 565 /* This is only valid for adapter to host command queues. */ 566 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ 567 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 568 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 569 /* only valid for command queues which receive entries from the adapter. */ 570 u32 numpending; /* Number of entries on outstanding queue. */ 571 struct aac_dev * dev; /* Back pointer to adapter structure */ 572 }; 573 574 /* 575 * Message queues. The order here is important, see also the 576 * queue type ordering 577 */ 578 579 struct aac_queue_block 580 { 581 struct aac_queue queue[8]; 582 }; 583 584 /* 585 * SaP1 Message Unit Registers 586 */ 587 588 struct sa_drawbridge_CSR { 589 /* Offset | Name */ 590 __le32 reserved[10]; /* 00h-27h | Reserved */ 591 u8 LUT_Offset; /* 28h | Lookup Table Offset */ 592 u8 reserved1[3]; /* 29h-2bh | Reserved */ 593 __le32 LUT_Data; /* 2ch | Looup Table Data */ 594 __le32 reserved2[26]; /* 30h-97h | Reserved */ 595 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */ 596 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */ 597 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */ 598 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */ 599 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */ 600 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */ 601 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */ 602 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */ 603 __le32 MAILBOX0; /* a8h | Scratchpad 0 */ 604 __le32 MAILBOX1; /* ach | Scratchpad 1 */ 605 __le32 MAILBOX2; /* b0h | Scratchpad 2 */ 606 __le32 MAILBOX3; /* b4h | Scratchpad 3 */ 607 __le32 MAILBOX4; /* b8h | Scratchpad 4 */ 608 __le32 MAILBOX5; /* bch | Scratchpad 5 */ 609 __le32 MAILBOX6; /* c0h | Scratchpad 6 */ 610 __le32 MAILBOX7; /* c4h | Scratchpad 7 */ 611 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */ 612 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */ 613 __le32 reserved3[12]; /* d0h-ffh | reserved */ 614 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */ 615 }; 616 617 #define Mailbox0 SaDbCSR.MAILBOX0 618 #define Mailbox1 SaDbCSR.MAILBOX1 619 #define Mailbox2 SaDbCSR.MAILBOX2 620 #define Mailbox3 SaDbCSR.MAILBOX3 621 #define Mailbox4 SaDbCSR.MAILBOX4 622 #define Mailbox5 SaDbCSR.MAILBOX5 623 #define Mailbox6 SaDbCSR.MAILBOX6 624 #define Mailbox7 SaDbCSR.MAILBOX7 625 626 #define DoorbellReg_p SaDbCSR.PRISETIRQ 627 #define DoorbellReg_s SaDbCSR.SECSETIRQ 628 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ 629 630 631 #define DOORBELL_0 0x0001 632 #define DOORBELL_1 0x0002 633 #define DOORBELL_2 0x0004 634 #define DOORBELL_3 0x0008 635 #define DOORBELL_4 0x0010 636 #define DOORBELL_5 0x0020 637 #define DOORBELL_6 0x0040 638 639 640 #define PrintfReady DOORBELL_5 641 #define PrintfDone DOORBELL_5 642 643 struct sa_registers { 644 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */ 645 }; 646 647 648 #define Sa_MINIPORT_REVISION 1 649 650 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 651 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 652 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) 653 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) 654 655 /* 656 * Rx Message Unit Registers 657 */ 658 659 struct rx_mu_registers { 660 /* Local | PCI*| Name */ 661 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */ 662 __le32 reserved0; /* 1304h | 04h | Reserved */ 663 __le32 AWR; /* 1308h | 08h | APIC Window Register */ 664 __le32 reserved1; /* 130Ch | 0Ch | Reserved */ 665 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */ 666 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */ 667 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */ 668 __le32 IISR; /* 1324h | 24h | Inbound Interrupt 669 Status Register */ 670 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt 671 Mask Register */ 672 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */ 673 __le32 OISR; /* 1330h | 30h | Outbound Interrupt 674 Status Register */ 675 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt 676 Mask Register */ 677 __le32 reserved2; /* 1338h | 38h | Reserved */ 678 __le32 reserved3; /* 133Ch | 3Ch | Reserved */ 679 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */ 680 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */ 681 /* * Must access through ATU Inbound 682 Translation Window */ 683 }; 684 685 struct rx_inbound { 686 __le32 Mailbox[8]; 687 }; 688 689 #define INBOUNDDOORBELL_0 0x00000001 690 #define INBOUNDDOORBELL_1 0x00000002 691 #define INBOUNDDOORBELL_2 0x00000004 692 #define INBOUNDDOORBELL_3 0x00000008 693 #define INBOUNDDOORBELL_4 0x00000010 694 #define INBOUNDDOORBELL_5 0x00000020 695 #define INBOUNDDOORBELL_6 0x00000040 696 697 #define OUTBOUNDDOORBELL_0 0x00000001 698 #define OUTBOUNDDOORBELL_1 0x00000002 699 #define OUTBOUNDDOORBELL_2 0x00000004 700 #define OUTBOUNDDOORBELL_3 0x00000008 701 #define OUTBOUNDDOORBELL_4 0x00000010 702 703 #define InboundDoorbellReg MUnit.IDR 704 #define OutboundDoorbellReg MUnit.ODR 705 706 struct rx_registers { 707 struct rx_mu_registers MUnit; /* 1300h - 1347h */ 708 __le32 reserved1[2]; /* 1348h - 134ch */ 709 struct rx_inbound IndexRegs; 710 }; 711 712 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) 713 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) 714 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) 715 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) 716 717 /* 718 * Rkt Message Unit Registers (same as Rx, except a larger reserve region) 719 */ 720 721 #define rkt_mu_registers rx_mu_registers 722 #define rkt_inbound rx_inbound 723 724 struct rkt_registers { 725 struct rkt_mu_registers MUnit; /* 1300h - 1347h */ 726 __le32 reserved1[1006]; /* 1348h - 22fch */ 727 struct rkt_inbound IndexRegs; /* 2300h - */ 728 }; 729 730 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) 731 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) 732 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR)) 733 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR)) 734 735 /* 736 * PMC SRC message unit registers 737 */ 738 739 #define src_inbound rx_inbound 740 741 struct src_mu_registers { 742 /* PCI*| Name */ 743 __le32 reserved0[8]; /* 00h | Reserved */ 744 __le32 IDR; /* 20h | Inbound Doorbell Register */ 745 __le32 IISR; /* 24h | Inbound Int. Status Register */ 746 __le32 reserved1[3]; /* 28h | Reserved */ 747 __le32 OIMR; /* 34h | Outbound Int. Mask Register */ 748 __le32 reserved2[25]; /* 38h | Reserved */ 749 __le32 ODR_R; /* 9ch | Outbound Doorbell Read */ 750 __le32 ODR_C; /* a0h | Outbound Doorbell Clear */ 751 __le32 reserved3[6]; /* a4h | Reserved */ 752 __le32 OMR; /* bch | Outbound Message Register */ 753 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */ 754 __le32 IQ_H; /* c4h | Inbound Queue (High address) */ 755 }; 756 757 struct src_registers { 758 struct src_mu_registers MUnit; /* 00h - c7h */ 759 union { 760 struct { 761 __le32 reserved1[130790]; /* c8h - 7fc5fh */ 762 struct src_inbound IndexRegs; /* 7fc60h */ 763 } tupelo; 764 struct { 765 __le32 reserved1[974]; /* c8h - fffh */ 766 struct src_inbound IndexRegs; /* 1000h */ 767 } denali; 768 } u; 769 }; 770 771 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR)) 772 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR)) 773 #define src_writeb(AEP, CSR, value) writeb(value, \ 774 &((AEP)->regs.src.bar0->CSR)) 775 #define src_writel(AEP, CSR, value) writel(value, \ 776 &((AEP)->regs.src.bar0->CSR)) 777 778 #define SRC_ODR_SHIFT 12 779 #define SRC_IDR_SHIFT 9 780 781 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx); 782 783 struct aac_fib_context { 784 s16 type; // used for verification of structure 785 s16 size; 786 u32 unique; // unique value representing this context 787 ulong jiffies; // used for cleanup - dmb changed to ulong 788 struct list_head next; // used to link context's into a linked list 789 struct semaphore wait_sem; // this is used to wait for the next fib to arrive. 790 int wait; // Set to true when thread is in WaitForSingleObject 791 unsigned long count; // total number of FIBs on FibList 792 struct list_head fib_list; // this holds fibs and their attachd hw_fibs 793 }; 794 795 struct sense_data { 796 u8 error_code; /* 70h (current errors), 71h(deferred errors) */ 797 u8 valid:1; /* A valid bit of one indicates that the information */ 798 /* field contains valid information as defined in the 799 * SCSI-2 Standard. 800 */ 801 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */ 802 u8 sense_key:4; /* Sense Key */ 803 u8 reserved:1; 804 u8 ILI:1; /* Incorrect Length Indicator */ 805 u8 EOM:1; /* End Of Medium - reserved for random access devices */ 806 u8 filemark:1; /* Filemark - reserved for random access devices */ 807 808 u8 information[4]; /* for direct-access devices, contains the unsigned 809 * logical block address or residue associated with 810 * the sense key 811 */ 812 u8 add_sense_len; /* number of additional sense bytes to follow this field */ 813 u8 cmnd_info[4]; /* not used */ 814 u8 ASC; /* Additional Sense Code */ 815 u8 ASCQ; /* Additional Sense Code Qualifier */ 816 u8 FRUC; /* Field Replaceable Unit Code - not used */ 817 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data 818 * was in error 819 */ 820 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that 821 * the bit_ptr field has valid value 822 */ 823 u8 reserved2:2; 824 u8 CD:1; /* command data bit: 1- illegal parameter in CDB. 825 * 0- illegal parameter in data. 826 */ 827 u8 SKSV:1; 828 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */ 829 }; 830 831 struct fsa_dev_info { 832 u64 last; 833 u64 size; 834 u32 type; 835 u32 config_waiting_on; 836 unsigned long config_waiting_stamp; 837 u16 queue_depth; 838 u8 config_needed; 839 u8 valid; 840 u8 ro; 841 u8 locked; 842 u8 deleted; 843 char devname[8]; 844 struct sense_data sense_data; 845 }; 846 847 struct fib { 848 void *next; /* this is used by the allocator */ 849 s16 type; 850 s16 size; 851 /* 852 * The Adapter that this I/O is destined for. 853 */ 854 struct aac_dev *dev; 855 /* 856 * This is the event the sendfib routine will wait on if the 857 * caller did not pass one and this is synch io. 858 */ 859 struct semaphore event_wait; 860 spinlock_t event_lock; 861 862 u32 done; /* gets set to 1 when fib is complete */ 863 fib_callback callback; 864 void *callback_data; 865 u32 flags; // u32 dmb was ulong 866 /* 867 * And for the internal issue/reply queues (we may be able 868 * to merge these two) 869 */ 870 struct list_head fiblink; 871 void *data; 872 struct hw_fib *hw_fib_va; /* Actual shared object */ 873 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/ 874 }; 875 876 /* 877 * Adapter Information Block 878 * 879 * This is returned by the RequestAdapterInfo block 880 */ 881 882 struct aac_adapter_info 883 { 884 __le32 platform; 885 __le32 cpu; 886 __le32 subcpu; 887 __le32 clock; 888 __le32 execmem; 889 __le32 buffermem; 890 __le32 totalmem; 891 __le32 kernelrev; 892 __le32 kernelbuild; 893 __le32 monitorrev; 894 __le32 monitorbuild; 895 __le32 hwrev; 896 __le32 hwbuild; 897 __le32 biosrev; 898 __le32 biosbuild; 899 __le32 cluster; 900 __le32 clusterchannelmask; 901 __le32 serial[2]; 902 __le32 battery; 903 __le32 options; 904 __le32 OEM; 905 }; 906 907 struct aac_supplement_adapter_info 908 { 909 u8 AdapterTypeText[17+1]; 910 u8 Pad[2]; 911 __le32 FlashMemoryByteSize; 912 __le32 FlashImageId; 913 __le32 MaxNumberPorts; 914 __le32 Version; 915 __le32 FeatureBits; 916 u8 SlotNumber; 917 u8 ReservedPad0[3]; 918 u8 BuildDate[12]; 919 __le32 CurrentNumberPorts; 920 struct { 921 u8 AssemblyPn[8]; 922 u8 FruPn[8]; 923 u8 BatteryFruPn[8]; 924 u8 EcVersionString[8]; 925 u8 Tsid[12]; 926 } VpdInfo; 927 __le32 FlashFirmwareRevision; 928 __le32 FlashFirmwareBuild; 929 __le32 RaidTypeMorphOptions; 930 __le32 FlashFirmwareBootRevision; 931 __le32 FlashFirmwareBootBuild; 932 u8 MfgPcbaSerialNo[12]; 933 u8 MfgWWNName[8]; 934 __le32 SupportedOptions2; 935 __le32 StructExpansion; 936 /* StructExpansion == 1 */ 937 __le32 FeatureBits3; 938 __le32 SupportedPerformanceModes; 939 __le32 ReservedForFutureGrowth[80]; 940 }; 941 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010) 942 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000) 943 /* SupportedOptions2 */ 944 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001) 945 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002) 946 #define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004) 947 #define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000) 948 #define AAC_SIS_VERSION_V3 3 949 #define AAC_SIS_SLOT_UNKNOWN 0xFF 950 951 #define GetBusInfo 0x00000009 952 struct aac_bus_info { 953 __le32 Command; /* VM_Ioctl */ 954 __le32 ObjType; /* FT_DRIVE */ 955 __le32 MethodId; /* 1 = SCSI Layer */ 956 __le32 ObjectId; /* Handle */ 957 __le32 CtlCmd; /* GetBusInfo */ 958 }; 959 960 struct aac_bus_info_response { 961 __le32 Status; /* ST_OK */ 962 __le32 ObjType; 963 __le32 MethodId; /* unused */ 964 __le32 ObjectId; /* unused */ 965 __le32 CtlCmd; /* unused */ 966 __le32 ProbeComplete; 967 __le32 BusCount; 968 __le32 TargetsPerBus; 969 u8 InitiatorBusId[10]; 970 u8 BusValid[10]; 971 }; 972 973 /* 974 * Battery platforms 975 */ 976 #define AAC_BAT_REQ_PRESENT (1) 977 #define AAC_BAT_REQ_NOTPRESENT (2) 978 #define AAC_BAT_OPT_PRESENT (3) 979 #define AAC_BAT_OPT_NOTPRESENT (4) 980 #define AAC_BAT_NOT_SUPPORTED (5) 981 /* 982 * cpu types 983 */ 984 #define AAC_CPU_SIMULATOR (1) 985 #define AAC_CPU_I960 (2) 986 #define AAC_CPU_STRONGARM (3) 987 988 /* 989 * Supported Options 990 */ 991 #define AAC_OPT_SNAPSHOT cpu_to_le32(1) 992 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1) 993 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2) 994 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3) 995 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4) 996 #define AAC_OPT_RAID50 cpu_to_le32(1<<5) 997 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6) 998 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7) 999 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8) 1000 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9) 1001 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10) 1002 #define AAC_OPT_ALARM cpu_to_le32(1<<11) 1003 #define AAC_OPT_NONDASD cpu_to_le32(1<<12) 1004 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13) 1005 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14) 1006 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16) 1007 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17) 1008 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18) 1009 #define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28) 1010 #define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29) 1011 #define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30) 1012 #define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31) 1013 1014 1015 struct aac_dev 1016 { 1017 struct list_head entry; 1018 const char *name; 1019 int id; 1020 1021 /* 1022 * negotiated FIB settings 1023 */ 1024 unsigned max_fib_size; 1025 unsigned sg_tablesize; 1026 unsigned max_num_aif; 1027 1028 /* 1029 * Map for 128 fib objects (64k) 1030 */ 1031 dma_addr_t hw_fib_pa; 1032 struct hw_fib *hw_fib_va; 1033 struct hw_fib *aif_base_va; 1034 /* 1035 * Fib Headers 1036 */ 1037 struct fib *fibs; 1038 1039 struct fib *free_fib; 1040 spinlock_t fib_lock; 1041 1042 struct aac_queue_block *queues; 1043 /* 1044 * The user API will use an IOCTL to register itself to receive 1045 * FIBs from the adapter. The following list is used to keep 1046 * track of all the threads that have requested these FIBs. The 1047 * mutex is used to synchronize access to all data associated 1048 * with the adapter fibs. 1049 */ 1050 struct list_head fib_list; 1051 1052 struct adapter_ops a_ops; 1053 unsigned long fsrev; /* Main driver's revision number */ 1054 1055 unsigned long dbg_base; /* address of UART 1056 * debug buffer */ 1057 1058 unsigned base_size, dbg_size; /* Size of 1059 * mapped in region */ 1060 1061 struct aac_init *init; /* Holds initialization info to communicate with adapter */ 1062 dma_addr_t init_pa; /* Holds physical address of the init struct */ 1063 1064 u32 *host_rrq; /* response queue 1065 * if AAC_COMM_MESSAGE_TYPE1 */ 1066 1067 dma_addr_t host_rrq_pa; /* phys. address */ 1068 u32 host_rrq_idx; /* index into rrq buffer */ 1069 1070 struct pci_dev *pdev; /* Our PCI interface */ 1071 void * printfbuf; /* pointer to buffer used for printf's from the adapter */ 1072 void * comm_addr; /* Base address of Comm area */ 1073 dma_addr_t comm_phys; /* Physical Address of Comm area */ 1074 size_t comm_size; 1075 1076 struct Scsi_Host *scsi_host_ptr; 1077 int maximum_num_containers; 1078 int maximum_num_physicals; 1079 int maximum_num_channels; 1080 struct fsa_dev_info *fsa_dev; 1081 struct task_struct *thread; 1082 int cardtype; 1083 1084 /* 1085 * The following is the device specific extension. 1086 */ 1087 #ifndef AAC_MIN_FOOTPRINT_SIZE 1088 # define AAC_MIN_FOOTPRINT_SIZE 8192 1089 # define AAC_MIN_SRC_BAR0_SIZE 0x400000 1090 # define AAC_MIN_SRC_BAR1_SIZE 0x800 1091 # define AAC_MIN_SRCV_BAR0_SIZE 0x100000 1092 # define AAC_MIN_SRCV_BAR1_SIZE 0x400 1093 #endif 1094 union 1095 { 1096 struct sa_registers __iomem *sa; 1097 struct rx_registers __iomem *rx; 1098 struct rkt_registers __iomem *rkt; 1099 struct { 1100 struct src_registers __iomem *bar0; 1101 char __iomem *bar1; 1102 } src; 1103 } regs; 1104 volatile void __iomem *base, *dbg_base_mapped; 1105 volatile struct rx_inbound __iomem *IndexRegs; 1106 u32 OIMR; /* Mask Register Cache */ 1107 /* 1108 * AIF thread states 1109 */ 1110 u32 aif_thread; 1111 struct aac_adapter_info adapter_info; 1112 struct aac_supplement_adapter_info supplement_adapter_info; 1113 /* These are in adapter info but they are in the io flow so 1114 * lets break them out so we don't have to do an AND to check them 1115 */ 1116 u8 nondasd_support; 1117 u8 jbod; 1118 u8 cache_protected; 1119 u8 dac_support; 1120 u8 needs_dac; 1121 u8 raid_scsi_mode; 1122 u8 comm_interface; 1123 # define AAC_COMM_PRODUCER 0 1124 # define AAC_COMM_MESSAGE 1 1125 # define AAC_COMM_MESSAGE_TYPE1 3 1126 u8 raw_io_interface; 1127 u8 raw_io_64; 1128 u8 printf_enabled; 1129 u8 in_reset; 1130 u8 msi; 1131 int management_fib_count; 1132 spinlock_t manage_lock; 1133 spinlock_t sync_lock; 1134 int sync_mode; 1135 struct fib *sync_fib; 1136 struct list_head sync_fib_list; 1137 }; 1138 1139 #define aac_adapter_interrupt(dev) \ 1140 (dev)->a_ops.adapter_interrupt(dev) 1141 1142 #define aac_adapter_notify(dev, event) \ 1143 (dev)->a_ops.adapter_notify(dev, event) 1144 1145 #define aac_adapter_disable_int(dev) \ 1146 (dev)->a_ops.adapter_disable_int(dev) 1147 1148 #define aac_adapter_enable_int(dev) \ 1149 (dev)->a_ops.adapter_enable_int(dev) 1150 1151 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ 1152 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) 1153 1154 #define aac_adapter_check_health(dev) \ 1155 (dev)->a_ops.adapter_check_health(dev) 1156 1157 #define aac_adapter_restart(dev,bled) \ 1158 (dev)->a_ops.adapter_restart(dev,bled) 1159 1160 #define aac_adapter_ioremap(dev, size) \ 1161 (dev)->a_ops.adapter_ioremap(dev, size) 1162 1163 #define aac_adapter_deliver(fib) \ 1164 ((fib)->dev)->a_ops.adapter_deliver(fib) 1165 1166 #define aac_adapter_bounds(dev,cmd,lba) \ 1167 dev->a_ops.adapter_bounds(dev,cmd,lba) 1168 1169 #define aac_adapter_read(fib,cmd,lba,count) \ 1170 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count) 1171 1172 #define aac_adapter_write(fib,cmd,lba,count,fua) \ 1173 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua) 1174 1175 #define aac_adapter_scsi(fib,cmd) \ 1176 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd) 1177 1178 #define aac_adapter_comm(dev,comm) \ 1179 (dev)->a_ops.adapter_comm(dev, comm) 1180 1181 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) 1182 #define FIB_CONTEXT_FLAG (0x00000002) 1183 #define FIB_CONTEXT_FLAG_WAIT (0x00000004) 1184 1185 /* 1186 * Define the command values 1187 */ 1188 1189 #define Null 0 1190 #define GetAttributes 1 1191 #define SetAttributes 2 1192 #define Lookup 3 1193 #define ReadLink 4 1194 #define Read 5 1195 #define Write 6 1196 #define Create 7 1197 #define MakeDirectory 8 1198 #define SymbolicLink 9 1199 #define MakeNode 10 1200 #define Removex 11 1201 #define RemoveDirectoryx 12 1202 #define Rename 13 1203 #define Link 14 1204 #define ReadDirectory 15 1205 #define ReadDirectoryPlus 16 1206 #define FileSystemStatus 17 1207 #define FileSystemInfo 18 1208 #define PathConfigure 19 1209 #define Commit 20 1210 #define Mount 21 1211 #define UnMount 22 1212 #define Newfs 23 1213 #define FsCheck 24 1214 #define FsSync 25 1215 #define SimReadWrite 26 1216 #define SetFileSystemStatus 27 1217 #define BlockRead 28 1218 #define BlockWrite 29 1219 #define NvramIoctl 30 1220 #define FsSyncWait 31 1221 #define ClearArchiveBit 32 1222 #define SetAcl 33 1223 #define GetAcl 34 1224 #define AssignAcl 35 1225 #define FaultInsertion 36 /* Fault Insertion Command */ 1226 #define CrazyCache 37 /* Crazycache */ 1227 1228 #define MAX_FSACOMMAND_NUM 38 1229 1230 1231 /* 1232 * Define the status returns. These are very unixlike although 1233 * most are not in fact used 1234 */ 1235 1236 #define ST_OK 0 1237 #define ST_PERM 1 1238 #define ST_NOENT 2 1239 #define ST_IO 5 1240 #define ST_NXIO 6 1241 #define ST_E2BIG 7 1242 #define ST_ACCES 13 1243 #define ST_EXIST 17 1244 #define ST_XDEV 18 1245 #define ST_NODEV 19 1246 #define ST_NOTDIR 20 1247 #define ST_ISDIR 21 1248 #define ST_INVAL 22 1249 #define ST_FBIG 27 1250 #define ST_NOSPC 28 1251 #define ST_ROFS 30 1252 #define ST_MLINK 31 1253 #define ST_WOULDBLOCK 35 1254 #define ST_NAMETOOLONG 63 1255 #define ST_NOTEMPTY 66 1256 #define ST_DQUOT 69 1257 #define ST_STALE 70 1258 #define ST_REMOTE 71 1259 #define ST_NOT_READY 72 1260 #define ST_BADHANDLE 10001 1261 #define ST_NOT_SYNC 10002 1262 #define ST_BAD_COOKIE 10003 1263 #define ST_NOTSUPP 10004 1264 #define ST_TOOSMALL 10005 1265 #define ST_SERVERFAULT 10006 1266 #define ST_BADTYPE 10007 1267 #define ST_JUKEBOX 10008 1268 #define ST_NOTMOUNTED 10009 1269 #define ST_MAINTMODE 10010 1270 #define ST_STALEACL 10011 1271 1272 /* 1273 * On writes how does the client want the data written. 1274 */ 1275 1276 #define CACHE_CSTABLE 1 1277 #define CACHE_UNSTABLE 2 1278 1279 /* 1280 * Lets the client know at which level the data was committed on 1281 * a write request 1282 */ 1283 1284 #define CMFILE_SYNCH_NVRAM 1 1285 #define CMDATA_SYNCH_NVRAM 2 1286 #define CMFILE_SYNCH 3 1287 #define CMDATA_SYNCH 4 1288 #define CMUNSTABLE 5 1289 1290 struct aac_read 1291 { 1292 __le32 command; 1293 __le32 cid; 1294 __le32 block; 1295 __le32 count; 1296 struct sgmap sg; // Must be last in struct because it is variable 1297 }; 1298 1299 struct aac_read64 1300 { 1301 __le32 command; 1302 __le16 cid; 1303 __le16 sector_count; 1304 __le32 block; 1305 __le16 pad; 1306 __le16 flags; 1307 struct sgmap64 sg; // Must be last in struct because it is variable 1308 }; 1309 1310 struct aac_read_reply 1311 { 1312 __le32 status; 1313 __le32 count; 1314 }; 1315 1316 struct aac_write 1317 { 1318 __le32 command; 1319 __le32 cid; 1320 __le32 block; 1321 __le32 count; 1322 __le32 stable; // Not used 1323 struct sgmap sg; // Must be last in struct because it is variable 1324 }; 1325 1326 struct aac_write64 1327 { 1328 __le32 command; 1329 __le16 cid; 1330 __le16 sector_count; 1331 __le32 block; 1332 __le16 pad; 1333 __le16 flags; 1334 #define IO_TYPE_WRITE 0x00000000 1335 #define IO_TYPE_READ 0x00000001 1336 #define IO_SUREWRITE 0x00000008 1337 struct sgmap64 sg; // Must be last in struct because it is variable 1338 }; 1339 struct aac_write_reply 1340 { 1341 __le32 status; 1342 __le32 count; 1343 __le32 committed; 1344 }; 1345 1346 struct aac_raw_io 1347 { 1348 __le32 block[2]; 1349 __le32 count; 1350 __le16 cid; 1351 __le16 flags; /* 00 W, 01 R */ 1352 __le16 bpTotal; /* reserved for F/W use */ 1353 __le16 bpComplete; /* reserved for F/W use */ 1354 struct sgmapraw sg; 1355 }; 1356 1357 #define CT_FLUSH_CACHE 129 1358 struct aac_synchronize { 1359 __le32 command; /* VM_ContainerConfig */ 1360 __le32 type; /* CT_FLUSH_CACHE */ 1361 __le32 cid; 1362 __le32 parm1; 1363 __le32 parm2; 1364 __le32 parm3; 1365 __le32 parm4; 1366 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */ 1367 }; 1368 1369 struct aac_synchronize_reply { 1370 __le32 dummy0; 1371 __le32 dummy1; 1372 __le32 status; /* CT_OK */ 1373 __le32 parm1; 1374 __le32 parm2; 1375 __le32 parm3; 1376 __le32 parm4; 1377 __le32 parm5; 1378 u8 data[16]; 1379 }; 1380 1381 #define CT_POWER_MANAGEMENT 245 1382 #define CT_PM_START_UNIT 2 1383 #define CT_PM_STOP_UNIT 3 1384 #define CT_PM_UNIT_IMMEDIATE 1 1385 struct aac_power_management { 1386 __le32 command; /* VM_ContainerConfig */ 1387 __le32 type; /* CT_POWER_MANAGEMENT */ 1388 __le32 sub; /* CT_PM_* */ 1389 __le32 cid; 1390 __le32 parm; /* CT_PM_sub_* */ 1391 }; 1392 1393 #define CT_PAUSE_IO 65 1394 #define CT_RELEASE_IO 66 1395 struct aac_pause { 1396 __le32 command; /* VM_ContainerConfig */ 1397 __le32 type; /* CT_PAUSE_IO */ 1398 __le32 timeout; /* 10ms ticks */ 1399 __le32 min; 1400 __le32 noRescan; 1401 __le32 parm3; 1402 __le32 parm4; 1403 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */ 1404 }; 1405 1406 struct aac_srb 1407 { 1408 __le32 function; 1409 __le32 channel; 1410 __le32 id; 1411 __le32 lun; 1412 __le32 timeout; 1413 __le32 flags; 1414 __le32 count; // Data xfer size 1415 __le32 retry_limit; 1416 __le32 cdb_size; 1417 u8 cdb[16]; 1418 struct sgmap sg; 1419 }; 1420 1421 /* 1422 * This and associated data structs are used by the 1423 * ioctl caller and are in cpu order. 1424 */ 1425 struct user_aac_srb 1426 { 1427 u32 function; 1428 u32 channel; 1429 u32 id; 1430 u32 lun; 1431 u32 timeout; 1432 u32 flags; 1433 u32 count; // Data xfer size 1434 u32 retry_limit; 1435 u32 cdb_size; 1436 u8 cdb[16]; 1437 struct user_sgmap sg; 1438 }; 1439 1440 #define AAC_SENSE_BUFFERSIZE 30 1441 1442 struct aac_srb_reply 1443 { 1444 __le32 status; 1445 __le32 srb_status; 1446 __le32 scsi_status; 1447 __le32 data_xfer_length; 1448 __le32 sense_data_size; 1449 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE 1450 }; 1451 /* 1452 * SRB Flags 1453 */ 1454 #define SRB_NoDataXfer 0x0000 1455 #define SRB_DisableDisconnect 0x0004 1456 #define SRB_DisableSynchTransfer 0x0008 1457 #define SRB_BypassFrozenQueue 0x0010 1458 #define SRB_DisableAutosense 0x0020 1459 #define SRB_DataIn 0x0040 1460 #define SRB_DataOut 0x0080 1461 1462 /* 1463 * SRB Functions - set in aac_srb->function 1464 */ 1465 #define SRBF_ExecuteScsi 0x0000 1466 #define SRBF_ClaimDevice 0x0001 1467 #define SRBF_IO_Control 0x0002 1468 #define SRBF_ReceiveEvent 0x0003 1469 #define SRBF_ReleaseQueue 0x0004 1470 #define SRBF_AttachDevice 0x0005 1471 #define SRBF_ReleaseDevice 0x0006 1472 #define SRBF_Shutdown 0x0007 1473 #define SRBF_Flush 0x0008 1474 #define SRBF_AbortCommand 0x0010 1475 #define SRBF_ReleaseRecovery 0x0011 1476 #define SRBF_ResetBus 0x0012 1477 #define SRBF_ResetDevice 0x0013 1478 #define SRBF_TerminateIO 0x0014 1479 #define SRBF_FlushQueue 0x0015 1480 #define SRBF_RemoveDevice 0x0016 1481 #define SRBF_DomainValidation 0x0017 1482 1483 /* 1484 * SRB SCSI Status - set in aac_srb->scsi_status 1485 */ 1486 #define SRB_STATUS_PENDING 0x00 1487 #define SRB_STATUS_SUCCESS 0x01 1488 #define SRB_STATUS_ABORTED 0x02 1489 #define SRB_STATUS_ABORT_FAILED 0x03 1490 #define SRB_STATUS_ERROR 0x04 1491 #define SRB_STATUS_BUSY 0x05 1492 #define SRB_STATUS_INVALID_REQUEST 0x06 1493 #define SRB_STATUS_INVALID_PATH_ID 0x07 1494 #define SRB_STATUS_NO_DEVICE 0x08 1495 #define SRB_STATUS_TIMEOUT 0x09 1496 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A 1497 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B 1498 #define SRB_STATUS_MESSAGE_REJECTED 0x0D 1499 #define SRB_STATUS_BUS_RESET 0x0E 1500 #define SRB_STATUS_PARITY_ERROR 0x0F 1501 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10 1502 #define SRB_STATUS_NO_HBA 0x11 1503 #define SRB_STATUS_DATA_OVERRUN 0x12 1504 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13 1505 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14 1506 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15 1507 #define SRB_STATUS_REQUEST_FLUSHED 0x16 1508 #define SRB_STATUS_DELAYED_RETRY 0x17 1509 #define SRB_STATUS_INVALID_LUN 0x20 1510 #define SRB_STATUS_INVALID_TARGET_ID 0x21 1511 #define SRB_STATUS_BAD_FUNCTION 0x22 1512 #define SRB_STATUS_ERROR_RECOVERY 0x23 1513 #define SRB_STATUS_NOT_STARTED 0x24 1514 #define SRB_STATUS_NOT_IN_USE 0x30 1515 #define SRB_STATUS_FORCE_ABORT 0x31 1516 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32 1517 1518 /* 1519 * Object-Server / Volume-Manager Dispatch Classes 1520 */ 1521 1522 #define VM_Null 0 1523 #define VM_NameServe 1 1524 #define VM_ContainerConfig 2 1525 #define VM_Ioctl 3 1526 #define VM_FilesystemIoctl 4 1527 #define VM_CloseAll 5 1528 #define VM_CtBlockRead 6 1529 #define VM_CtBlockWrite 7 1530 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */ 1531 #define VM_SliceBlockWrite 9 1532 #define VM_DriveBlockRead 10 /* raw access to physical devices */ 1533 #define VM_DriveBlockWrite 11 1534 #define VM_EnclosureMgt 12 /* enclosure management */ 1535 #define VM_Unused 13 /* used to be diskset management */ 1536 #define VM_CtBlockVerify 14 1537 #define VM_CtPerf 15 /* performance test */ 1538 #define VM_CtBlockRead64 16 1539 #define VM_CtBlockWrite64 17 1540 #define VM_CtBlockVerify64 18 1541 #define VM_CtHostRead64 19 1542 #define VM_CtHostWrite64 20 1543 #define VM_DrvErrTblLog 21 1544 #define VM_NameServe64 22 1545 1546 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */ 1547 1548 /* 1549 * Descriptive information (eg, vital stats) 1550 * that a content manager might report. The 1551 * FileArray filesystem component is one example 1552 * of a content manager. Raw mode might be 1553 * another. 1554 */ 1555 1556 struct aac_fsinfo { 1557 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */ 1558 __le32 fsBlockSize; 1559 __le32 fsFragSize; 1560 __le32 fsMaxExtendSize; 1561 __le32 fsSpaceUnits; 1562 __le32 fsMaxNumFiles; 1563 __le32 fsNumFreeFiles; 1564 __le32 fsInodeDensity; 1565 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1566 1567 union aac_contentinfo { 1568 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1569 }; 1570 1571 /* 1572 * Query for Container Configuration Status 1573 */ 1574 1575 #define CT_GET_CONFIG_STATUS 147 1576 struct aac_get_config_status { 1577 __le32 command; /* VM_ContainerConfig */ 1578 __le32 type; /* CT_GET_CONFIG_STATUS */ 1579 __le32 parm1; 1580 __le32 parm2; 1581 __le32 parm3; 1582 __le32 parm4; 1583 __le32 parm5; 1584 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */ 1585 }; 1586 1587 #define CFACT_CONTINUE 0 1588 #define CFACT_PAUSE 1 1589 #define CFACT_ABORT 2 1590 struct aac_get_config_status_resp { 1591 __le32 response; /* ST_OK */ 1592 __le32 dummy0; 1593 __le32 status; /* CT_OK */ 1594 __le32 parm1; 1595 __le32 parm2; 1596 __le32 parm3; 1597 __le32 parm4; 1598 __le32 parm5; 1599 struct { 1600 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */ 1601 __le16 flags; 1602 __le16 count; 1603 } data; 1604 }; 1605 1606 /* 1607 * Accept the configuration as-is 1608 */ 1609 1610 #define CT_COMMIT_CONFIG 152 1611 1612 struct aac_commit_config { 1613 __le32 command; /* VM_ContainerConfig */ 1614 __le32 type; /* CT_COMMIT_CONFIG */ 1615 }; 1616 1617 /* 1618 * Query for Container Configuration Status 1619 */ 1620 1621 #define CT_GET_CONTAINER_COUNT 4 1622 struct aac_get_container_count { 1623 __le32 command; /* VM_ContainerConfig */ 1624 __le32 type; /* CT_GET_CONTAINER_COUNT */ 1625 }; 1626 1627 struct aac_get_container_count_resp { 1628 __le32 response; /* ST_OK */ 1629 __le32 dummy0; 1630 __le32 MaxContainers; 1631 __le32 ContainerSwitchEntries; 1632 __le32 MaxPartitions; 1633 }; 1634 1635 1636 /* 1637 * Query for "mountable" objects, ie, objects that are typically 1638 * associated with a drive letter on the client (host) side. 1639 */ 1640 1641 struct aac_mntent { 1642 __le32 oid; 1643 u8 name[16]; /* if applicable */ 1644 struct creation_info create_info; /* if applicable */ 1645 __le32 capacity; 1646 __le32 vol; /* substrate structure */ 1647 __le32 obj; /* FT_FILESYS, etc. */ 1648 __le32 state; /* unready for mounting, 1649 readonly, etc. */ 1650 union aac_contentinfo fileinfo; /* Info specific to content 1651 manager (eg, filesystem) */ 1652 __le32 altoid; /* != oid <==> snapshot or 1653 broken mirror exists */ 1654 __le32 capacityhigh; 1655 }; 1656 1657 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */ 1658 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */ 1659 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */ 1660 #define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */ 1661 1662 struct aac_query_mount { 1663 __le32 command; 1664 __le32 type; 1665 __le32 count; 1666 }; 1667 1668 struct aac_mount { 1669 __le32 status; 1670 __le32 type; /* should be same as that requested */ 1671 __le32 count; 1672 struct aac_mntent mnt[1]; 1673 }; 1674 1675 #define CT_READ_NAME 130 1676 struct aac_get_name { 1677 __le32 command; /* VM_ContainerConfig */ 1678 __le32 type; /* CT_READ_NAME */ 1679 __le32 cid; 1680 __le32 parm1; 1681 __le32 parm2; 1682 __le32 parm3; 1683 __le32 parm4; 1684 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */ 1685 }; 1686 1687 struct aac_get_name_resp { 1688 __le32 dummy0; 1689 __le32 dummy1; 1690 __le32 status; /* CT_OK */ 1691 __le32 parm1; 1692 __le32 parm2; 1693 __le32 parm3; 1694 __le32 parm4; 1695 __le32 parm5; 1696 u8 data[16]; 1697 }; 1698 1699 #define CT_CID_TO_32BITS_UID 165 1700 struct aac_get_serial { 1701 __le32 command; /* VM_ContainerConfig */ 1702 __le32 type; /* CT_CID_TO_32BITS_UID */ 1703 __le32 cid; 1704 }; 1705 1706 struct aac_get_serial_resp { 1707 __le32 dummy0; 1708 __le32 dummy1; 1709 __le32 status; /* CT_OK */ 1710 __le32 uid; 1711 }; 1712 1713 /* 1714 * The following command is sent to shut down each container. 1715 */ 1716 1717 struct aac_close { 1718 __le32 command; 1719 __le32 cid; 1720 }; 1721 1722 struct aac_query_disk 1723 { 1724 s32 cnum; 1725 s32 bus; 1726 s32 id; 1727 s32 lun; 1728 u32 valid; 1729 u32 locked; 1730 u32 deleted; 1731 s32 instance; 1732 s8 name[10]; 1733 u32 unmapped; 1734 }; 1735 1736 struct aac_delete_disk { 1737 u32 disknum; 1738 u32 cnum; 1739 }; 1740 1741 struct fib_ioctl 1742 { 1743 u32 fibctx; 1744 s32 wait; 1745 char __user *fib; 1746 }; 1747 1748 struct revision 1749 { 1750 u32 compat; 1751 __le32 version; 1752 __le32 build; 1753 }; 1754 1755 1756 /* 1757 * Ugly - non Linux like ioctl coding for back compat. 1758 */ 1759 1760 #define CTL_CODE(function, method) ( \ 1761 (4<< 16) | ((function) << 2) | (method) \ 1762 ) 1763 1764 /* 1765 * Define the method codes for how buffers are passed for I/O and FS 1766 * controls 1767 */ 1768 1769 #define METHOD_BUFFERED 0 1770 #define METHOD_NEITHER 3 1771 1772 /* 1773 * Filesystem ioctls 1774 */ 1775 1776 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED) 1777 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED) 1778 #define FSACTL_DELETE_DISK 0x163 1779 #define FSACTL_QUERY_DISK 0x173 1780 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED) 1781 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED) 1782 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED) 1783 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED) 1784 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED) 1785 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER) 1786 #define FSACTL_GET_CONTAINERS 2131 1787 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED) 1788 1789 1790 struct aac_common 1791 { 1792 /* 1793 * If this value is set to 1 then interrupt moderation will occur 1794 * in the base commuication support. 1795 */ 1796 u32 irq_mod; 1797 u32 peak_fibs; 1798 u32 zero_fibs; 1799 u32 fib_timeouts; 1800 /* 1801 * Statistical counters in debug mode 1802 */ 1803 #ifdef DBG 1804 u32 FibsSent; 1805 u32 FibRecved; 1806 u32 NoResponseSent; 1807 u32 NoResponseRecved; 1808 u32 AsyncSent; 1809 u32 AsyncRecved; 1810 u32 NormalSent; 1811 u32 NormalRecved; 1812 #endif 1813 }; 1814 1815 extern struct aac_common aac_config; 1816 1817 1818 /* 1819 * The following macro is used when sending and receiving FIBs. It is 1820 * only used for debugging. 1821 */ 1822 1823 #ifdef DBG 1824 #define FIB_COUNTER_INCREMENT(counter) (counter)++ 1825 #else 1826 #define FIB_COUNTER_INCREMENT(counter) 1827 #endif 1828 1829 /* 1830 * Adapter direct commands 1831 * Monitor/Kernel API 1832 */ 1833 1834 #define BREAKPOINT_REQUEST 0x00000004 1835 #define INIT_STRUCT_BASE_ADDRESS 0x00000005 1836 #define READ_PERMANENT_PARAMETERS 0x0000000a 1837 #define WRITE_PERMANENT_PARAMETERS 0x0000000b 1838 #define HOST_CRASHING 0x0000000d 1839 #define SEND_SYNCHRONOUS_FIB 0x0000000c 1840 #define COMMAND_POST_RESULTS 0x00000014 1841 #define GET_ADAPTER_PROPERTIES 0x00000019 1842 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023 1843 #define RCV_TEMP_READINGS 0x00000025 1844 #define GET_COMM_PREFERRED_SETTINGS 0x00000026 1845 #define IOP_RESET 0x00001000 1846 #define IOP_RESET_ALWAYS 0x00001001 1847 #define RE_INIT_ADAPTER 0x000000ee 1848 1849 /* 1850 * Adapter Status Register 1851 * 1852 * Phase Staus mailbox is 32bits: 1853 * <31:16> = Phase Status 1854 * <15:0> = Phase 1855 * 1856 * The adapter reports is present state through the phase. Only 1857 * a single phase should be ever be set. Each phase can have multiple 1858 * phase status bits to provide more detailed information about the 1859 * state of the board. Care should be taken to ensure that any phase 1860 * status bits that are set when changing the phase are also valid 1861 * for the new phase or be cleared out. Adapter software (monitor, 1862 * iflash, kernel) is responsible for properly maintining the phase 1863 * status mailbox when it is running. 1864 * 1865 * MONKER_API Phases 1866 * 1867 * Phases are bit oriented. It is NOT valid to have multiple bits set 1868 */ 1869 1870 #define SELF_TEST_FAILED 0x00000004 1871 #define MONITOR_PANIC 0x00000020 1872 #define KERNEL_UP_AND_RUNNING 0x00000080 1873 #define KERNEL_PANIC 0x00000100 1874 1875 /* 1876 * Doorbell bit defines 1877 */ 1878 1879 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */ 1880 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */ 1881 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */ 1882 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */ 1883 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */ 1884 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */ 1885 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */ 1886 #define DoorBellAifPending (1<<6) /* Adapter -> Host */ 1887 1888 /* PMC specific outbound doorbell bits */ 1889 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */ 1890 1891 /* 1892 * For FIB communication, we need all of the following things 1893 * to send back to the user. 1894 */ 1895 1896 #define AifCmdEventNotify 1 /* Notify of event */ 1897 #define AifEnConfigChange 3 /* Adapter configuration change */ 1898 #define AifEnContainerChange 4 /* Container configuration change */ 1899 #define AifEnDeviceFailure 5 /* SCSI device failed */ 1900 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */ 1901 #define EM_DRIVE_INSERTION 31 1902 #define EM_DRIVE_REMOVAL 32 1903 #define AifEnBatteryEvent 14 /* Change in Battery State */ 1904 #define AifEnAddContainer 15 /* A new array was created */ 1905 #define AifEnDeleteContainer 16 /* A container was deleted */ 1906 #define AifEnExpEvent 23 /* Firmware Event Log */ 1907 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */ 1908 #define AifHighPriority 3 /* Highest Priority Event */ 1909 #define AifEnAddJBOD 30 /* JBOD created */ 1910 #define AifEnDeleteJBOD 31 /* JBOD deleted */ 1911 1912 #define AifCmdJobProgress 2 /* Progress report */ 1913 #define AifJobCtrZero 101 /* Array Zero progress */ 1914 #define AifJobStsSuccess 1 /* Job completes */ 1915 #define AifJobStsRunning 102 /* Job running */ 1916 #define AifCmdAPIReport 3 /* Report from other user of API */ 1917 #define AifCmdDriverNotify 4 /* Notify host driver of event */ 1918 #define AifDenMorphComplete 200 /* A morph operation completed */ 1919 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */ 1920 #define AifReqJobList 100 /* Gets back complete job list */ 1921 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */ 1922 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */ 1923 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */ 1924 #define AifReqTerminateJob 104 /* Terminates job */ 1925 #define AifReqSuspendJob 105 /* Suspends a job */ 1926 #define AifReqResumeJob 106 /* Resumes a job */ 1927 #define AifReqSendAPIReport 107 /* API generic report requests */ 1928 #define AifReqAPIJobStart 108 /* Start a job from the API */ 1929 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */ 1930 #define AifReqAPIJobFinish 110 /* Finish a job from the API */ 1931 1932 /* PMC NEW COMM: Request the event data */ 1933 #define AifReqEvent 200 1934 1935 /* 1936 * Adapter Initiated FIB command structures. Start with the adapter 1937 * initiated FIBs that really come from the adapter, and get responded 1938 * to by the host. 1939 */ 1940 1941 struct aac_aifcmd { 1942 __le32 command; /* Tell host what type of notify this is */ 1943 __le32 seqnum; /* To allow ordering of reports (if necessary) */ 1944 u8 data[1]; /* Undefined length (from kernel viewpoint) */ 1945 }; 1946 1947 /** 1948 * Convert capacity to cylinders 1949 * accounting for the fact capacity could be a 64 bit value 1950 * 1951 */ 1952 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) 1953 { 1954 sector_div(capacity, divisor); 1955 return capacity; 1956 } 1957 1958 /* SCp.phase values */ 1959 #define AAC_OWNER_MIDLEVEL 0x101 1960 #define AAC_OWNER_LOWLEVEL 0x102 1961 #define AAC_OWNER_ERROR_HANDLER 0x103 1962 #define AAC_OWNER_FIRMWARE 0x106 1963 1964 const char *aac_driverinfo(struct Scsi_Host *); 1965 struct fib *aac_fib_alloc(struct aac_dev *dev); 1966 int aac_fib_setup(struct aac_dev *dev); 1967 void aac_fib_map_free(struct aac_dev *dev); 1968 void aac_fib_free(struct fib * context); 1969 void aac_fib_init(struct fib * context); 1970 void aac_printf(struct aac_dev *dev, u32 val); 1971 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt); 1972 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry); 1973 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum); 1974 int aac_fib_complete(struct fib * context); 1975 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data) 1976 struct aac_dev *aac_init_adapter(struct aac_dev *dev); 1977 int aac_get_config_status(struct aac_dev *dev, int commit_flag); 1978 int aac_get_containers(struct aac_dev *dev); 1979 int aac_scsi_cmd(struct scsi_cmnd *cmd); 1980 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg); 1981 #ifndef shost_to_class 1982 #define shost_to_class(shost) &shost->shost_dev 1983 #endif 1984 ssize_t aac_get_serial_number(struct device *dev, char *buf); 1985 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg); 1986 int aac_rx_init(struct aac_dev *dev); 1987 int aac_rkt_init(struct aac_dev *dev); 1988 int aac_nark_init(struct aac_dev *dev); 1989 int aac_sa_init(struct aac_dev *dev); 1990 int aac_src_init(struct aac_dev *dev); 1991 int aac_srcv_init(struct aac_dev *dev); 1992 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify); 1993 unsigned int aac_response_normal(struct aac_queue * q); 1994 unsigned int aac_command_normal(struct aac_queue * q); 1995 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index, 1996 int isAif, int isFastResponse, 1997 struct hw_fib *aif_fib); 1998 int aac_reset_adapter(struct aac_dev * dev, int forced); 1999 int aac_check_health(struct aac_dev * dev); 2000 int aac_command_thread(void *data); 2001 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx); 2002 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size); 2003 struct aac_driver_ident* aac_get_driver_ident(int devtype); 2004 int aac_get_adapter_info(struct aac_dev* dev); 2005 int aac_send_shutdown(struct aac_dev *dev); 2006 int aac_probe_container(struct aac_dev *dev, int cid); 2007 int _aac_rx_init(struct aac_dev *dev); 2008 int aac_rx_select_comm(struct aac_dev *dev, int comm); 2009 int aac_rx_deliver_producer(struct fib * fib); 2010 char * get_container_type(unsigned type); 2011 extern int numacb; 2012 extern int acbsize; 2013 extern char aac_driver_version[]; 2014 extern int startup_timeout; 2015 extern int aif_timeout; 2016 extern int expose_physicals; 2017 extern int aac_reset_devices; 2018 extern int aac_msi; 2019 extern int aac_commit; 2020 extern int update_interval; 2021 extern int check_interval; 2022 extern int aac_check_reset; 2023