1 #ifndef dprintk 2 # define dprintk(x) 3 #endif 4 /* eg: if (nblank(dprintk(x))) */ 5 #define _nblank(x) #x 6 #define nblank(x) _nblank(x)[0] 7 8 #include <linux/interrupt.h> 9 10 /*------------------------------------------------------------------------------ 11 * D E F I N E S 12 *----------------------------------------------------------------------------*/ 13 14 #ifndef AAC_DRIVER_BUILD 15 # define AAC_DRIVER_BUILD 30200 16 # define AAC_DRIVER_BRANCH "-ms" 17 #endif 18 #define MAXIMUM_NUM_CONTAINERS 32 19 20 #define AAC_NUM_MGT_FIB 8 21 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB) 22 #define AAC_NUM_FIB (AAC_NUM_IO_FIB + AAC_NUM_MGT_FIB) 23 24 #define AAC_MAX_LUN (8) 25 26 #define AAC_MAX_HOSTPHYSMEMPAGES (0xfffff) 27 #define AAC_MAX_32BIT_SGBCOUNT ((unsigned short)256) 28 29 #define AAC_DEBUG_INSTRUMENT_AIF_DELETE 30 31 /* 32 * These macros convert from physical channels to virtual channels 33 */ 34 #define CONTAINER_CHANNEL (0) 35 #define CONTAINER_TO_CHANNEL(cont) (CONTAINER_CHANNEL) 36 #define CONTAINER_TO_ID(cont) (cont) 37 #define CONTAINER_TO_LUN(cont) (0) 38 39 #define PMC_DEVICE_S7 0x28c 40 #define PMC_DEVICE_S8 0x28d 41 #define PMC_DEVICE_S9 0x28f 42 43 #define aac_phys_to_logical(x) ((x)+1) 44 #define aac_logical_to_phys(x) ((x)?(x)-1:0) 45 46 /* #define AAC_DETAILED_STATUS_INFO */ 47 48 struct diskparm 49 { 50 int heads; 51 int sectors; 52 int cylinders; 53 }; 54 55 56 /* 57 * Firmware constants 58 */ 59 60 #define CT_NONE 0 61 #define CT_OK 218 62 #define FT_FILESYS 8 /* ADAPTEC's "FSA"(tm) filesystem */ 63 #define FT_DRIVE 9 /* physical disk - addressable in scsi by bus/id/lun */ 64 65 /* 66 * Host side memory scatter gather list 67 * Used by the adapter for read, write, and readdirplus operations 68 * We have separate 32 and 64 bit version because even 69 * on 64 bit systems not all cards support the 64 bit version 70 */ 71 struct sgentry { 72 __le32 addr; /* 32-bit address. */ 73 __le32 count; /* Length. */ 74 }; 75 76 struct user_sgentry { 77 u32 addr; /* 32-bit address. */ 78 u32 count; /* Length. */ 79 }; 80 81 struct sgentry64 { 82 __le32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 83 __le32 count; /* Length. */ 84 }; 85 86 struct user_sgentry64 { 87 u32 addr[2]; /* 64-bit addr. 2 pieces for data alignment */ 88 u32 count; /* Length. */ 89 }; 90 91 struct sgentryraw { 92 __le32 next; /* reserved for F/W use */ 93 __le32 prev; /* reserved for F/W use */ 94 __le32 addr[2]; 95 __le32 count; 96 __le32 flags; /* reserved for F/W use */ 97 }; 98 99 struct user_sgentryraw { 100 u32 next; /* reserved for F/W use */ 101 u32 prev; /* reserved for F/W use */ 102 u32 addr[2]; 103 u32 count; 104 u32 flags; /* reserved for F/W use */ 105 }; 106 107 struct sge_ieee1212 { 108 u32 addrLow; 109 u32 addrHigh; 110 u32 length; 111 u32 flags; 112 }; 113 114 /* 115 * SGMAP 116 * 117 * This is the SGMAP structure for all commands that use 118 * 32-bit addressing. 119 */ 120 121 struct sgmap { 122 __le32 count; 123 struct sgentry sg[1]; 124 }; 125 126 struct user_sgmap { 127 u32 count; 128 struct user_sgentry sg[1]; 129 }; 130 131 struct sgmap64 { 132 __le32 count; 133 struct sgentry64 sg[1]; 134 }; 135 136 struct user_sgmap64 { 137 u32 count; 138 struct user_sgentry64 sg[1]; 139 }; 140 141 struct sgmapraw { 142 __le32 count; 143 struct sgentryraw sg[1]; 144 }; 145 146 struct user_sgmapraw { 147 u32 count; 148 struct user_sgentryraw sg[1]; 149 }; 150 151 struct creation_info 152 { 153 u8 buildnum; /* e.g., 588 */ 154 u8 usec; /* e.g., 588 */ 155 u8 via; /* e.g., 1 = FSU, 156 * 2 = API 157 */ 158 u8 year; /* e.g., 1997 = 97 */ 159 __le32 date; /* 160 * unsigned Month :4; // 1 - 12 161 * unsigned Day :6; // 1 - 32 162 * unsigned Hour :6; // 0 - 23 163 * unsigned Minute :6; // 0 - 60 164 * unsigned Second :6; // 0 - 60 165 */ 166 __le32 serial[2]; /* e.g., 0x1DEADB0BFAFAF001 */ 167 }; 168 169 170 /* 171 * Define all the constants needed for the communication interface 172 */ 173 174 /* 175 * Define how many queue entries each queue will have and the total 176 * number of entries for the entire communication interface. Also define 177 * how many queues we support. 178 * 179 * This has to match the controller 180 */ 181 182 #define NUMBER_OF_COMM_QUEUES 8 // 4 command; 4 response 183 #define HOST_HIGH_CMD_ENTRIES 4 184 #define HOST_NORM_CMD_ENTRIES 8 185 #define ADAP_HIGH_CMD_ENTRIES 4 186 #define ADAP_NORM_CMD_ENTRIES 512 187 #define HOST_HIGH_RESP_ENTRIES 4 188 #define HOST_NORM_RESP_ENTRIES 512 189 #define ADAP_HIGH_RESP_ENTRIES 4 190 #define ADAP_NORM_RESP_ENTRIES 8 191 192 #define TOTAL_QUEUE_ENTRIES \ 193 (HOST_NORM_CMD_ENTRIES + HOST_HIGH_CMD_ENTRIES + ADAP_NORM_CMD_ENTRIES + ADAP_HIGH_CMD_ENTRIES + \ 194 HOST_NORM_RESP_ENTRIES + HOST_HIGH_RESP_ENTRIES + ADAP_NORM_RESP_ENTRIES + ADAP_HIGH_RESP_ENTRIES) 195 196 197 /* 198 * Set the queues on a 16 byte alignment 199 */ 200 201 #define QUEUE_ALIGNMENT 16 202 203 /* 204 * The queue headers define the Communication Region queues. These 205 * are physically contiguous and accessible by both the adapter and the 206 * host. Even though all queue headers are in the same contiguous block 207 * they will be represented as individual units in the data structures. 208 */ 209 210 struct aac_entry { 211 __le32 size; /* Size in bytes of Fib which this QE points to */ 212 __le32 addr; /* Receiver address of the FIB */ 213 }; 214 215 /* 216 * The adapter assumes the ProducerIndex and ConsumerIndex are grouped 217 * adjacently and in that order. 218 */ 219 220 struct aac_qhdr { 221 __le64 header_addr;/* Address to hand the adapter to access 222 to this queue head */ 223 __le32 *producer; /* The producer index for this queue (host address) */ 224 __le32 *consumer; /* The consumer index for this queue (host address) */ 225 }; 226 227 /* 228 * Define all the events which the adapter would like to notify 229 * the host of. 230 */ 231 232 #define HostNormCmdQue 1 /* Change in host normal priority command queue */ 233 #define HostHighCmdQue 2 /* Change in host high priority command queue */ 234 #define HostNormRespQue 3 /* Change in host normal priority response queue */ 235 #define HostHighRespQue 4 /* Change in host high priority response queue */ 236 #define AdapNormRespNotFull 5 237 #define AdapHighRespNotFull 6 238 #define AdapNormCmdNotFull 7 239 #define AdapHighCmdNotFull 8 240 #define SynchCommandComplete 9 241 #define AdapInternalError 0xfe /* The adapter detected an internal error shutting down */ 242 243 /* 244 * Define all the events the host wishes to notify the 245 * adapter of. The first four values much match the Qid the 246 * corresponding queue. 247 */ 248 249 #define AdapNormCmdQue 2 250 #define AdapHighCmdQue 3 251 #define AdapNormRespQue 6 252 #define AdapHighRespQue 7 253 #define HostShutdown 8 254 #define HostPowerFail 9 255 #define FatalCommError 10 256 #define HostNormRespNotFull 11 257 #define HostHighRespNotFull 12 258 #define HostNormCmdNotFull 13 259 #define HostHighCmdNotFull 14 260 #define FastIo 15 261 #define AdapPrintfDone 16 262 263 /* 264 * Define all the queues that the adapter and host use to communicate 265 * Number them to match the physical queue layout. 266 */ 267 268 enum aac_queue_types { 269 HostNormCmdQueue = 0, /* Adapter to host normal priority command traffic */ 270 HostHighCmdQueue, /* Adapter to host high priority command traffic */ 271 AdapNormCmdQueue, /* Host to adapter normal priority command traffic */ 272 AdapHighCmdQueue, /* Host to adapter high priority command traffic */ 273 HostNormRespQueue, /* Adapter to host normal priority response traffic */ 274 HostHighRespQueue, /* Adapter to host high priority response traffic */ 275 AdapNormRespQueue, /* Host to adapter normal priority response traffic */ 276 AdapHighRespQueue /* Host to adapter high priority response traffic */ 277 }; 278 279 /* 280 * Assign type values to the FSA communication data structures 281 */ 282 283 #define FIB_MAGIC 0x0001 284 #define FIB_MAGIC2 0x0004 285 #define FIB_MAGIC2_64 0x0005 286 287 /* 288 * Define the priority levels the FSA communication routines support. 289 */ 290 291 #define FsaNormal 1 292 293 /* transport FIB header (PMC) */ 294 struct aac_fib_xporthdr { 295 u64 HostAddress; /* FIB host address w/o xport header */ 296 u32 Size; /* FIB size excluding xport header */ 297 u32 Handle; /* driver handle to reference the FIB */ 298 u64 Reserved[2]; 299 }; 300 301 #define ALIGN32 32 302 303 /* 304 * Define the FIB. The FIB is the where all the requested data and 305 * command information are put to the application on the FSA adapter. 306 */ 307 308 struct aac_fibhdr { 309 __le32 XferState; /* Current transfer state for this CCB */ 310 __le16 Command; /* Routing information for the destination */ 311 u8 StructType; /* Type FIB */ 312 u8 Unused; /* Unused */ 313 __le16 Size; /* Size of this FIB in bytes */ 314 __le16 SenderSize; /* Size of the FIB in the sender 315 (for response sizing) */ 316 __le32 SenderFibAddress; /* Host defined data in the FIB */ 317 union { 318 __le32 ReceiverFibAddress;/* Logical address of this FIB for 319 the adapter (old) */ 320 __le32 SenderFibAddressHigh;/* upper 32bit of phys. FIB address */ 321 __le32 TimeStamp; /* otherwise timestamp for FW internal use */ 322 } u; 323 u32 Handle; /* FIB handle used for MSGU commnunication */ 324 u32 Previous; /* FW internal use */ 325 u32 Next; /* FW internal use */ 326 }; 327 328 struct hw_fib { 329 struct aac_fibhdr header; 330 u8 data[512-sizeof(struct aac_fibhdr)]; // Command specific data 331 }; 332 333 /* 334 * FIB commands 335 */ 336 337 #define TestCommandResponse 1 338 #define TestAdapterCommand 2 339 /* 340 * Lowlevel and comm commands 341 */ 342 #define LastTestCommand 100 343 #define ReinitHostNormCommandQueue 101 344 #define ReinitHostHighCommandQueue 102 345 #define ReinitHostHighRespQueue 103 346 #define ReinitHostNormRespQueue 104 347 #define ReinitAdapNormCommandQueue 105 348 #define ReinitAdapHighCommandQueue 107 349 #define ReinitAdapHighRespQueue 108 350 #define ReinitAdapNormRespQueue 109 351 #define InterfaceShutdown 110 352 #define DmaCommandFib 120 353 #define StartProfile 121 354 #define TermProfile 122 355 #define SpeedTest 123 356 #define TakeABreakPt 124 357 #define RequestPerfData 125 358 #define SetInterruptDefTimer 126 359 #define SetInterruptDefCount 127 360 #define GetInterruptDefStatus 128 361 #define LastCommCommand 129 362 /* 363 * Filesystem commands 364 */ 365 #define NuFileSystem 300 366 #define UFS 301 367 #define HostFileSystem 302 368 #define LastFileSystemCommand 303 369 /* 370 * Container Commands 371 */ 372 #define ContainerCommand 500 373 #define ContainerCommand64 501 374 #define ContainerRawIo 502 375 #define ContainerRawIo2 503 376 /* 377 * Scsi Port commands (scsi passthrough) 378 */ 379 #define ScsiPortCommand 600 380 #define ScsiPortCommand64 601 381 /* 382 * Misc house keeping and generic adapter initiated commands 383 */ 384 #define AifRequest 700 385 #define CheckRevision 701 386 #define FsaHostShutdown 702 387 #define RequestAdapterInfo 703 388 #define IsAdapterPaused 704 389 #define SendHostTime 705 390 #define RequestSupplementAdapterInfo 706 391 #define LastMiscCommand 707 392 393 /* 394 * Commands that will target the failover level on the FSA adapter 395 */ 396 397 enum fib_xfer_state { 398 HostOwned = (1<<0), 399 AdapterOwned = (1<<1), 400 FibInitialized = (1<<2), 401 FibEmpty = (1<<3), 402 AllocatedFromPool = (1<<4), 403 SentFromHost = (1<<5), 404 SentFromAdapter = (1<<6), 405 ResponseExpected = (1<<7), 406 NoResponseExpected = (1<<8), 407 AdapterProcessed = (1<<9), 408 HostProcessed = (1<<10), 409 HighPriority = (1<<11), 410 NormalPriority = (1<<12), 411 Async = (1<<13), 412 AsyncIo = (1<<13), // rpbfix: remove with new regime 413 PageFileIo = (1<<14), // rpbfix: remove with new regime 414 ShutdownRequest = (1<<15), 415 LazyWrite = (1<<16), // rpbfix: remove with new regime 416 AdapterMicroFib = (1<<17), 417 BIOSFibPath = (1<<18), 418 FastResponseCapable = (1<<19), 419 ApiFib = (1<<20), /* Its an API Fib */ 420 /* PMC NEW COMM: There is no more AIF data pending */ 421 NoMoreAifDataAvailable = (1<<21) 422 }; 423 424 /* 425 * The following defines needs to be updated any time there is an 426 * incompatible change made to the aac_init structure. 427 */ 428 429 #define ADAPTER_INIT_STRUCT_REVISION 3 430 #define ADAPTER_INIT_STRUCT_REVISION_4 4 // rocket science 431 #define ADAPTER_INIT_STRUCT_REVISION_6 6 /* PMC src */ 432 #define ADAPTER_INIT_STRUCT_REVISION_7 7 /* Denali */ 433 434 struct aac_init 435 { 436 __le32 InitStructRevision; 437 __le32 MiniPortRevision; 438 __le32 fsrev; 439 __le32 CommHeaderAddress; 440 __le32 FastIoCommAreaAddress; 441 __le32 AdapterFibsPhysicalAddress; 442 __le32 AdapterFibsVirtualAddress; 443 __le32 AdapterFibsSize; 444 __le32 AdapterFibAlign; 445 __le32 printfbuf; 446 __le32 printfbufsiz; 447 __le32 HostPhysMemPages; /* number of 4k pages of host 448 physical memory */ 449 __le32 HostElapsedSeconds; /* number of seconds since 1970. */ 450 /* 451 * ADAPTER_INIT_STRUCT_REVISION_4 begins here 452 */ 453 __le32 InitFlags; /* flags for supported features */ 454 #define INITFLAGS_NEW_COMM_SUPPORTED 0x00000001 455 #define INITFLAGS_DRIVER_USES_UTC_TIME 0x00000010 456 #define INITFLAGS_DRIVER_SUPPORTS_PM 0x00000020 457 #define INITFLAGS_NEW_COMM_TYPE1_SUPPORTED 0x00000040 458 #define INITFLAGS_FAST_JBOD_SUPPORTED 0x00000080 459 #define INITFLAGS_NEW_COMM_TYPE2_SUPPORTED 0x00000100 460 __le32 MaxIoCommands; /* max outstanding commands */ 461 __le32 MaxIoSize; /* largest I/O command */ 462 __le32 MaxFibSize; /* largest FIB to adapter */ 463 /* ADAPTER_INIT_STRUCT_REVISION_5 begins here */ 464 __le32 MaxNumAif; /* max number of aif */ 465 /* ADAPTER_INIT_STRUCT_REVISION_6 begins here */ 466 __le32 HostRRQ_AddrLow; 467 __le32 HostRRQ_AddrHigh; /* Host RRQ (response queue) for SRC */ 468 }; 469 470 enum aac_log_level { 471 LOG_AAC_INIT = 10, 472 LOG_AAC_INFORMATIONAL = 20, 473 LOG_AAC_WARNING = 30, 474 LOG_AAC_LOW_ERROR = 40, 475 LOG_AAC_MEDIUM_ERROR = 50, 476 LOG_AAC_HIGH_ERROR = 60, 477 LOG_AAC_PANIC = 70, 478 LOG_AAC_DEBUG = 80, 479 LOG_AAC_WINDBG_PRINT = 90 480 }; 481 482 #define FSAFS_NTC_GET_ADAPTER_FIB_CONTEXT 0x030b 483 #define FSAFS_NTC_FIB_CONTEXT 0x030c 484 485 struct aac_dev; 486 struct fib; 487 struct scsi_cmnd; 488 489 struct adapter_ops 490 { 491 /* Low level operations */ 492 void (*adapter_interrupt)(struct aac_dev *dev); 493 void (*adapter_notify)(struct aac_dev *dev, u32 event); 494 void (*adapter_disable_int)(struct aac_dev *dev); 495 void (*adapter_enable_int)(struct aac_dev *dev); 496 int (*adapter_sync_cmd)(struct aac_dev *dev, u32 command, u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, u32 *status, u32 *r1, u32 *r2, u32 *r3, u32 *r4); 497 int (*adapter_check_health)(struct aac_dev *dev); 498 int (*adapter_restart)(struct aac_dev *dev, int bled); 499 /* Transport operations */ 500 int (*adapter_ioremap)(struct aac_dev * dev, u32 size); 501 irq_handler_t adapter_intr; 502 /* Packet operations */ 503 int (*adapter_deliver)(struct fib * fib); 504 int (*adapter_bounds)(struct aac_dev * dev, struct scsi_cmnd * cmd, u64 lba); 505 int (*adapter_read)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count); 506 int (*adapter_write)(struct fib * fib, struct scsi_cmnd * cmd, u64 lba, u32 count, int fua); 507 int (*adapter_scsi)(struct fib * fib, struct scsi_cmnd * cmd); 508 /* Administrative operations */ 509 int (*adapter_comm)(struct aac_dev * dev, int comm); 510 }; 511 512 /* 513 * Define which interrupt handler needs to be installed 514 */ 515 516 struct aac_driver_ident 517 { 518 int (*init)(struct aac_dev *dev); 519 char * name; 520 char * vname; 521 char * model; 522 u16 channels; 523 int quirks; 524 }; 525 /* 526 * Some adapter firmware needs communication memory 527 * below 2gig. This tells the init function to set the 528 * dma mask such that fib memory will be allocated where the 529 * adapter firmware can get to it. 530 */ 531 #define AAC_QUIRK_31BIT 0x0001 532 533 /* 534 * Some adapter firmware, when the raid card's cache is turned off, can not 535 * split up scatter gathers in order to deal with the limits of the 536 * underlying CHIM. This limit is 34 scatter gather elements. 537 */ 538 #define AAC_QUIRK_34SG 0x0002 539 540 /* 541 * This adapter is a slave (no Firmware) 542 */ 543 #define AAC_QUIRK_SLAVE 0x0004 544 545 /* 546 * This adapter is a master. 547 */ 548 #define AAC_QUIRK_MASTER 0x0008 549 550 /* 551 * Some adapter firmware perform poorly when it must split up scatter gathers 552 * in order to deal with the limits of the underlying CHIM. This limit in this 553 * class of adapters is 17 scatter gather elements. 554 */ 555 #define AAC_QUIRK_17SG 0x0010 556 557 /* 558 * Some adapter firmware does not support 64 bit scsi passthrough 559 * commands. 560 */ 561 #define AAC_QUIRK_SCSI_32 0x0020 562 563 /* 564 * The adapter interface specs all queues to be located in the same 565 * physically contiguous block. The host structure that defines the 566 * commuication queues will assume they are each a separate physically 567 * contiguous memory region that will support them all being one big 568 * contiguous block. 569 * There is a command and response queue for each level and direction of 570 * commuication. These regions are accessed by both the host and adapter. 571 */ 572 573 struct aac_queue { 574 u64 logical; /*address we give the adapter */ 575 struct aac_entry *base; /*system virtual address */ 576 struct aac_qhdr headers; /*producer,consumer q headers*/ 577 u32 entries; /*Number of queue entries */ 578 wait_queue_head_t qfull; /*Event to wait on if q full */ 579 wait_queue_head_t cmdready; /*Cmd ready from the adapter */ 580 /* This is only valid for adapter to host command queues. */ 581 spinlock_t *lock; /* Spinlock for this queue must take this lock before accessing the lock */ 582 spinlock_t lockdata; /* Actual lock (used only on one side of the lock) */ 583 struct list_head cmdq; /* A queue of FIBs which need to be prcessed by the FS thread. This is */ 584 /* only valid for command queues which receive entries from the adapter. */ 585 u32 numpending; /* Number of entries on outstanding queue. */ 586 struct aac_dev * dev; /* Back pointer to adapter structure */ 587 }; 588 589 /* 590 * Message queues. The order here is important, see also the 591 * queue type ordering 592 */ 593 594 struct aac_queue_block 595 { 596 struct aac_queue queue[8]; 597 }; 598 599 /* 600 * SaP1 Message Unit Registers 601 */ 602 603 struct sa_drawbridge_CSR { 604 /* Offset | Name */ 605 __le32 reserved[10]; /* 00h-27h | Reserved */ 606 u8 LUT_Offset; /* 28h | Lookup Table Offset */ 607 u8 reserved1[3]; /* 29h-2bh | Reserved */ 608 __le32 LUT_Data; /* 2ch | Looup Table Data */ 609 __le32 reserved2[26]; /* 30h-97h | Reserved */ 610 __le16 PRICLEARIRQ; /* 98h | Primary Clear Irq */ 611 __le16 SECCLEARIRQ; /* 9ah | Secondary Clear Irq */ 612 __le16 PRISETIRQ; /* 9ch | Primary Set Irq */ 613 __le16 SECSETIRQ; /* 9eh | Secondary Set Irq */ 614 __le16 PRICLEARIRQMASK;/* a0h | Primary Clear Irq Mask */ 615 __le16 SECCLEARIRQMASK;/* a2h | Secondary Clear Irq Mask */ 616 __le16 PRISETIRQMASK; /* a4h | Primary Set Irq Mask */ 617 __le16 SECSETIRQMASK; /* a6h | Secondary Set Irq Mask */ 618 __le32 MAILBOX0; /* a8h | Scratchpad 0 */ 619 __le32 MAILBOX1; /* ach | Scratchpad 1 */ 620 __le32 MAILBOX2; /* b0h | Scratchpad 2 */ 621 __le32 MAILBOX3; /* b4h | Scratchpad 3 */ 622 __le32 MAILBOX4; /* b8h | Scratchpad 4 */ 623 __le32 MAILBOX5; /* bch | Scratchpad 5 */ 624 __le32 MAILBOX6; /* c0h | Scratchpad 6 */ 625 __le32 MAILBOX7; /* c4h | Scratchpad 7 */ 626 __le32 ROM_Setup_Data; /* c8h | Rom Setup and Data */ 627 __le32 ROM_Control_Addr;/* cch | Rom Control and Address */ 628 __le32 reserved3[12]; /* d0h-ffh | reserved */ 629 __le32 LUT[64]; /* 100h-1ffh | Lookup Table Entries */ 630 }; 631 632 #define Mailbox0 SaDbCSR.MAILBOX0 633 #define Mailbox1 SaDbCSR.MAILBOX1 634 #define Mailbox2 SaDbCSR.MAILBOX2 635 #define Mailbox3 SaDbCSR.MAILBOX3 636 #define Mailbox4 SaDbCSR.MAILBOX4 637 #define Mailbox5 SaDbCSR.MAILBOX5 638 #define Mailbox6 SaDbCSR.MAILBOX6 639 #define Mailbox7 SaDbCSR.MAILBOX7 640 641 #define DoorbellReg_p SaDbCSR.PRISETIRQ 642 #define DoorbellReg_s SaDbCSR.SECSETIRQ 643 #define DoorbellClrReg_p SaDbCSR.PRICLEARIRQ 644 645 646 #define DOORBELL_0 0x0001 647 #define DOORBELL_1 0x0002 648 #define DOORBELL_2 0x0004 649 #define DOORBELL_3 0x0008 650 #define DOORBELL_4 0x0010 651 #define DOORBELL_5 0x0020 652 #define DOORBELL_6 0x0040 653 654 655 #define PrintfReady DOORBELL_5 656 #define PrintfDone DOORBELL_5 657 658 struct sa_registers { 659 struct sa_drawbridge_CSR SaDbCSR; /* 98h - c4h */ 660 }; 661 662 663 #define Sa_MINIPORT_REVISION 1 664 665 #define sa_readw(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 666 #define sa_readl(AEP, CSR) readl(&((AEP)->regs.sa->CSR)) 667 #define sa_writew(AEP, CSR, value) writew(value, &((AEP)->regs.sa->CSR)) 668 #define sa_writel(AEP, CSR, value) writel(value, &((AEP)->regs.sa->CSR)) 669 670 /* 671 * Rx Message Unit Registers 672 */ 673 674 struct rx_mu_registers { 675 /* Local | PCI*| Name */ 676 __le32 ARSR; /* 1300h | 00h | APIC Register Select Register */ 677 __le32 reserved0; /* 1304h | 04h | Reserved */ 678 __le32 AWR; /* 1308h | 08h | APIC Window Register */ 679 __le32 reserved1; /* 130Ch | 0Ch | Reserved */ 680 __le32 IMRx[2]; /* 1310h | 10h | Inbound Message Registers */ 681 __le32 OMRx[2]; /* 1318h | 18h | Outbound Message Registers */ 682 __le32 IDR; /* 1320h | 20h | Inbound Doorbell Register */ 683 __le32 IISR; /* 1324h | 24h | Inbound Interrupt 684 Status Register */ 685 __le32 IIMR; /* 1328h | 28h | Inbound Interrupt 686 Mask Register */ 687 __le32 ODR; /* 132Ch | 2Ch | Outbound Doorbell Register */ 688 __le32 OISR; /* 1330h | 30h | Outbound Interrupt 689 Status Register */ 690 __le32 OIMR; /* 1334h | 34h | Outbound Interrupt 691 Mask Register */ 692 __le32 reserved2; /* 1338h | 38h | Reserved */ 693 __le32 reserved3; /* 133Ch | 3Ch | Reserved */ 694 __le32 InboundQueue;/* 1340h | 40h | Inbound Queue Port relative to firmware */ 695 __le32 OutboundQueue;/*1344h | 44h | Outbound Queue Port relative to firmware */ 696 /* * Must access through ATU Inbound 697 Translation Window */ 698 }; 699 700 struct rx_inbound { 701 __le32 Mailbox[8]; 702 }; 703 704 #define INBOUNDDOORBELL_0 0x00000001 705 #define INBOUNDDOORBELL_1 0x00000002 706 #define INBOUNDDOORBELL_2 0x00000004 707 #define INBOUNDDOORBELL_3 0x00000008 708 #define INBOUNDDOORBELL_4 0x00000010 709 #define INBOUNDDOORBELL_5 0x00000020 710 #define INBOUNDDOORBELL_6 0x00000040 711 712 #define OUTBOUNDDOORBELL_0 0x00000001 713 #define OUTBOUNDDOORBELL_1 0x00000002 714 #define OUTBOUNDDOORBELL_2 0x00000004 715 #define OUTBOUNDDOORBELL_3 0x00000008 716 #define OUTBOUNDDOORBELL_4 0x00000010 717 718 #define InboundDoorbellReg MUnit.IDR 719 #define OutboundDoorbellReg MUnit.ODR 720 721 struct rx_registers { 722 struct rx_mu_registers MUnit; /* 1300h - 1347h */ 723 __le32 reserved1[2]; /* 1348h - 134ch */ 724 struct rx_inbound IndexRegs; 725 }; 726 727 #define rx_readb(AEP, CSR) readb(&((AEP)->regs.rx->CSR)) 728 #define rx_readl(AEP, CSR) readl(&((AEP)->regs.rx->CSR)) 729 #define rx_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rx->CSR)) 730 #define rx_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rx->CSR)) 731 732 /* 733 * Rkt Message Unit Registers (same as Rx, except a larger reserve region) 734 */ 735 736 #define rkt_mu_registers rx_mu_registers 737 #define rkt_inbound rx_inbound 738 739 struct rkt_registers { 740 struct rkt_mu_registers MUnit; /* 1300h - 1347h */ 741 __le32 reserved1[1006]; /* 1348h - 22fch */ 742 struct rkt_inbound IndexRegs; /* 2300h - */ 743 }; 744 745 #define rkt_readb(AEP, CSR) readb(&((AEP)->regs.rkt->CSR)) 746 #define rkt_readl(AEP, CSR) readl(&((AEP)->regs.rkt->CSR)) 747 #define rkt_writeb(AEP, CSR, value) writeb(value, &((AEP)->regs.rkt->CSR)) 748 #define rkt_writel(AEP, CSR, value) writel(value, &((AEP)->regs.rkt->CSR)) 749 750 /* 751 * PMC SRC message unit registers 752 */ 753 754 #define src_inbound rx_inbound 755 756 struct src_mu_registers { 757 /* PCI*| Name */ 758 __le32 reserved0[8]; /* 00h | Reserved */ 759 __le32 IDR; /* 20h | Inbound Doorbell Register */ 760 __le32 IISR; /* 24h | Inbound Int. Status Register */ 761 __le32 reserved1[3]; /* 28h | Reserved */ 762 __le32 OIMR; /* 34h | Outbound Int. Mask Register */ 763 __le32 reserved2[25]; /* 38h | Reserved */ 764 __le32 ODR_R; /* 9ch | Outbound Doorbell Read */ 765 __le32 ODR_C; /* a0h | Outbound Doorbell Clear */ 766 __le32 reserved3[6]; /* a4h | Reserved */ 767 __le32 OMR; /* bch | Outbound Message Register */ 768 __le32 IQ_L; /* c0h | Inbound Queue (Low address) */ 769 __le32 IQ_H; /* c4h | Inbound Queue (High address) */ 770 }; 771 772 struct src_registers { 773 struct src_mu_registers MUnit; /* 00h - c7h */ 774 union { 775 struct { 776 __le32 reserved1[130790]; /* c8h - 7fc5fh */ 777 struct src_inbound IndexRegs; /* 7fc60h */ 778 } tupelo; 779 struct { 780 __le32 reserved1[974]; /* c8h - fffh */ 781 struct src_inbound IndexRegs; /* 1000h */ 782 } denali; 783 } u; 784 }; 785 786 #define src_readb(AEP, CSR) readb(&((AEP)->regs.src.bar0->CSR)) 787 #define src_readl(AEP, CSR) readl(&((AEP)->regs.src.bar0->CSR)) 788 #define src_writeb(AEP, CSR, value) writeb(value, \ 789 &((AEP)->regs.src.bar0->CSR)) 790 #define src_writel(AEP, CSR, value) writel(value, \ 791 &((AEP)->regs.src.bar0->CSR)) 792 793 #define SRC_ODR_SHIFT 12 794 #define SRC_IDR_SHIFT 9 795 796 typedef void (*fib_callback)(void *ctxt, struct fib *fibctx); 797 798 struct aac_fib_context { 799 s16 type; // used for verification of structure 800 s16 size; 801 u32 unique; // unique value representing this context 802 ulong jiffies; // used for cleanup - dmb changed to ulong 803 struct list_head next; // used to link context's into a linked list 804 struct semaphore wait_sem; // this is used to wait for the next fib to arrive. 805 int wait; // Set to true when thread is in WaitForSingleObject 806 unsigned long count; // total number of FIBs on FibList 807 struct list_head fib_list; // this holds fibs and their attachd hw_fibs 808 }; 809 810 struct sense_data { 811 u8 error_code; /* 70h (current errors), 71h(deferred errors) */ 812 u8 valid:1; /* A valid bit of one indicates that the information */ 813 /* field contains valid information as defined in the 814 * SCSI-2 Standard. 815 */ 816 u8 segment_number; /* Only used for COPY, COMPARE, or COPY AND VERIFY Commands */ 817 u8 sense_key:4; /* Sense Key */ 818 u8 reserved:1; 819 u8 ILI:1; /* Incorrect Length Indicator */ 820 u8 EOM:1; /* End Of Medium - reserved for random access devices */ 821 u8 filemark:1; /* Filemark - reserved for random access devices */ 822 823 u8 information[4]; /* for direct-access devices, contains the unsigned 824 * logical block address or residue associated with 825 * the sense key 826 */ 827 u8 add_sense_len; /* number of additional sense bytes to follow this field */ 828 u8 cmnd_info[4]; /* not used */ 829 u8 ASC; /* Additional Sense Code */ 830 u8 ASCQ; /* Additional Sense Code Qualifier */ 831 u8 FRUC; /* Field Replaceable Unit Code - not used */ 832 u8 bit_ptr:3; /* indicates which byte of the CDB or parameter data 833 * was in error 834 */ 835 u8 BPV:1; /* bit pointer valid (BPV): 1- indicates that 836 * the bit_ptr field has valid value 837 */ 838 u8 reserved2:2; 839 u8 CD:1; /* command data bit: 1- illegal parameter in CDB. 840 * 0- illegal parameter in data. 841 */ 842 u8 SKSV:1; 843 u8 field_ptr[2]; /* byte of the CDB or parameter data in error */ 844 }; 845 846 struct fsa_dev_info { 847 u64 last; 848 u64 size; 849 u32 type; 850 u32 config_waiting_on; 851 unsigned long config_waiting_stamp; 852 u16 queue_depth; 853 u8 config_needed; 854 u8 valid; 855 u8 ro; 856 u8 locked; 857 u8 deleted; 858 char devname[8]; 859 struct sense_data sense_data; 860 }; 861 862 struct fib { 863 void *next; /* this is used by the allocator */ 864 s16 type; 865 s16 size; 866 /* 867 * The Adapter that this I/O is destined for. 868 */ 869 struct aac_dev *dev; 870 /* 871 * This is the event the sendfib routine will wait on if the 872 * caller did not pass one and this is synch io. 873 */ 874 struct semaphore event_wait; 875 spinlock_t event_lock; 876 877 u32 done; /* gets set to 1 when fib is complete */ 878 fib_callback callback; 879 void *callback_data; 880 u32 flags; // u32 dmb was ulong 881 /* 882 * And for the internal issue/reply queues (we may be able 883 * to merge these two) 884 */ 885 struct list_head fiblink; 886 void *data; 887 struct hw_fib *hw_fib_va; /* Actual shared object */ 888 dma_addr_t hw_fib_pa; /* physical address of hw_fib*/ 889 }; 890 891 /* 892 * Adapter Information Block 893 * 894 * This is returned by the RequestAdapterInfo block 895 */ 896 897 struct aac_adapter_info 898 { 899 __le32 platform; 900 __le32 cpu; 901 __le32 subcpu; 902 __le32 clock; 903 __le32 execmem; 904 __le32 buffermem; 905 __le32 totalmem; 906 __le32 kernelrev; 907 __le32 kernelbuild; 908 __le32 monitorrev; 909 __le32 monitorbuild; 910 __le32 hwrev; 911 __le32 hwbuild; 912 __le32 biosrev; 913 __le32 biosbuild; 914 __le32 cluster; 915 __le32 clusterchannelmask; 916 __le32 serial[2]; 917 __le32 battery; 918 __le32 options; 919 __le32 OEM; 920 }; 921 922 struct aac_supplement_adapter_info 923 { 924 u8 AdapterTypeText[17+1]; 925 u8 Pad[2]; 926 __le32 FlashMemoryByteSize; 927 __le32 FlashImageId; 928 __le32 MaxNumberPorts; 929 __le32 Version; 930 __le32 FeatureBits; 931 u8 SlotNumber; 932 u8 ReservedPad0[3]; 933 u8 BuildDate[12]; 934 __le32 CurrentNumberPorts; 935 struct { 936 u8 AssemblyPn[8]; 937 u8 FruPn[8]; 938 u8 BatteryFruPn[8]; 939 u8 EcVersionString[8]; 940 u8 Tsid[12]; 941 } VpdInfo; 942 __le32 FlashFirmwareRevision; 943 __le32 FlashFirmwareBuild; 944 __le32 RaidTypeMorphOptions; 945 __le32 FlashFirmwareBootRevision; 946 __le32 FlashFirmwareBootBuild; 947 u8 MfgPcbaSerialNo[12]; 948 u8 MfgWWNName[8]; 949 __le32 SupportedOptions2; 950 __le32 StructExpansion; 951 /* StructExpansion == 1 */ 952 __le32 FeatureBits3; 953 __le32 SupportedPerformanceModes; 954 __le32 ReservedForFutureGrowth[80]; 955 }; 956 #define AAC_FEATURE_FALCON cpu_to_le32(0x00000010) 957 #define AAC_FEATURE_JBOD cpu_to_le32(0x08000000) 958 /* SupportedOptions2 */ 959 #define AAC_OPTION_MU_RESET cpu_to_le32(0x00000001) 960 #define AAC_OPTION_IGNORE_RESET cpu_to_le32(0x00000002) 961 #define AAC_OPTION_POWER_MANAGEMENT cpu_to_le32(0x00000004) 962 #define AAC_OPTION_DOORBELL_RESET cpu_to_le32(0x00004000) 963 #define AAC_SIS_VERSION_V3 3 964 #define AAC_SIS_SLOT_UNKNOWN 0xFF 965 966 #define GetBusInfo 0x00000009 967 struct aac_bus_info { 968 __le32 Command; /* VM_Ioctl */ 969 __le32 ObjType; /* FT_DRIVE */ 970 __le32 MethodId; /* 1 = SCSI Layer */ 971 __le32 ObjectId; /* Handle */ 972 __le32 CtlCmd; /* GetBusInfo */ 973 }; 974 975 struct aac_bus_info_response { 976 __le32 Status; /* ST_OK */ 977 __le32 ObjType; 978 __le32 MethodId; /* unused */ 979 __le32 ObjectId; /* unused */ 980 __le32 CtlCmd; /* unused */ 981 __le32 ProbeComplete; 982 __le32 BusCount; 983 __le32 TargetsPerBus; 984 u8 InitiatorBusId[10]; 985 u8 BusValid[10]; 986 }; 987 988 /* 989 * Battery platforms 990 */ 991 #define AAC_BAT_REQ_PRESENT (1) 992 #define AAC_BAT_REQ_NOTPRESENT (2) 993 #define AAC_BAT_OPT_PRESENT (3) 994 #define AAC_BAT_OPT_NOTPRESENT (4) 995 #define AAC_BAT_NOT_SUPPORTED (5) 996 /* 997 * cpu types 998 */ 999 #define AAC_CPU_SIMULATOR (1) 1000 #define AAC_CPU_I960 (2) 1001 #define AAC_CPU_STRONGARM (3) 1002 1003 /* 1004 * Supported Options 1005 */ 1006 #define AAC_OPT_SNAPSHOT cpu_to_le32(1) 1007 #define AAC_OPT_CLUSTERS cpu_to_le32(1<<1) 1008 #define AAC_OPT_WRITE_CACHE cpu_to_le32(1<<2) 1009 #define AAC_OPT_64BIT_DATA cpu_to_le32(1<<3) 1010 #define AAC_OPT_HOST_TIME_FIB cpu_to_le32(1<<4) 1011 #define AAC_OPT_RAID50 cpu_to_le32(1<<5) 1012 #define AAC_OPT_4GB_WINDOW cpu_to_le32(1<<6) 1013 #define AAC_OPT_SCSI_UPGRADEABLE cpu_to_le32(1<<7) 1014 #define AAC_OPT_SOFT_ERR_REPORT cpu_to_le32(1<<8) 1015 #define AAC_OPT_SUPPORTED_RECONDITION cpu_to_le32(1<<9) 1016 #define AAC_OPT_SGMAP_HOST64 cpu_to_le32(1<<10) 1017 #define AAC_OPT_ALARM cpu_to_le32(1<<11) 1018 #define AAC_OPT_NONDASD cpu_to_le32(1<<12) 1019 #define AAC_OPT_SCSI_MANAGED cpu_to_le32(1<<13) 1020 #define AAC_OPT_RAID_SCSI_MODE cpu_to_le32(1<<14) 1021 #define AAC_OPT_SUPPLEMENT_ADAPTER_INFO cpu_to_le32(1<<16) 1022 #define AAC_OPT_NEW_COMM cpu_to_le32(1<<17) 1023 #define AAC_OPT_NEW_COMM_64 cpu_to_le32(1<<18) 1024 #define AAC_OPT_NEW_COMM_TYPE1 cpu_to_le32(1<<28) 1025 #define AAC_OPT_NEW_COMM_TYPE2 cpu_to_le32(1<<29) 1026 #define AAC_OPT_NEW_COMM_TYPE3 cpu_to_le32(1<<30) 1027 #define AAC_OPT_NEW_COMM_TYPE4 cpu_to_le32(1<<31) 1028 1029 1030 struct aac_dev 1031 { 1032 struct list_head entry; 1033 const char *name; 1034 int id; 1035 1036 /* 1037 * negotiated FIB settings 1038 */ 1039 unsigned max_fib_size; 1040 unsigned sg_tablesize; 1041 unsigned max_num_aif; 1042 1043 /* 1044 * Map for 128 fib objects (64k) 1045 */ 1046 dma_addr_t hw_fib_pa; 1047 struct hw_fib *hw_fib_va; 1048 struct hw_fib *aif_base_va; 1049 /* 1050 * Fib Headers 1051 */ 1052 struct fib *fibs; 1053 1054 struct fib *free_fib; 1055 spinlock_t fib_lock; 1056 1057 struct aac_queue_block *queues; 1058 /* 1059 * The user API will use an IOCTL to register itself to receive 1060 * FIBs from the adapter. The following list is used to keep 1061 * track of all the threads that have requested these FIBs. The 1062 * mutex is used to synchronize access to all data associated 1063 * with the adapter fibs. 1064 */ 1065 struct list_head fib_list; 1066 1067 struct adapter_ops a_ops; 1068 unsigned long fsrev; /* Main driver's revision number */ 1069 1070 resource_size_t base_start; /* main IO base */ 1071 resource_size_t dbg_base; /* address of UART 1072 * debug buffer */ 1073 1074 resource_size_t base_size, dbg_size; /* Size of 1075 * mapped in region */ 1076 1077 struct aac_init *init; /* Holds initialization info to communicate with adapter */ 1078 dma_addr_t init_pa; /* Holds physical address of the init struct */ 1079 1080 u32 *host_rrq; /* response queue 1081 * if AAC_COMM_MESSAGE_TYPE1 */ 1082 1083 dma_addr_t host_rrq_pa; /* phys. address */ 1084 u32 host_rrq_idx; /* index into rrq buffer */ 1085 1086 struct pci_dev *pdev; /* Our PCI interface */ 1087 void * printfbuf; /* pointer to buffer used for printf's from the adapter */ 1088 void * comm_addr; /* Base address of Comm area */ 1089 dma_addr_t comm_phys; /* Physical Address of Comm area */ 1090 size_t comm_size; 1091 1092 struct Scsi_Host *scsi_host_ptr; 1093 int maximum_num_containers; 1094 int maximum_num_physicals; 1095 int maximum_num_channels; 1096 struct fsa_dev_info *fsa_dev; 1097 struct task_struct *thread; 1098 int cardtype; 1099 1100 /* 1101 * The following is the device specific extension. 1102 */ 1103 #ifndef AAC_MIN_FOOTPRINT_SIZE 1104 # define AAC_MIN_FOOTPRINT_SIZE 8192 1105 # define AAC_MIN_SRC_BAR0_SIZE 0x400000 1106 # define AAC_MIN_SRC_BAR1_SIZE 0x800 1107 # define AAC_MIN_SRCV_BAR0_SIZE 0x100000 1108 # define AAC_MIN_SRCV_BAR1_SIZE 0x400 1109 #endif 1110 union 1111 { 1112 struct sa_registers __iomem *sa; 1113 struct rx_registers __iomem *rx; 1114 struct rkt_registers __iomem *rkt; 1115 struct { 1116 struct src_registers __iomem *bar0; 1117 char __iomem *bar1; 1118 } src; 1119 } regs; 1120 volatile void __iomem *base, *dbg_base_mapped; 1121 volatile struct rx_inbound __iomem *IndexRegs; 1122 u32 OIMR; /* Mask Register Cache */ 1123 /* 1124 * AIF thread states 1125 */ 1126 u32 aif_thread; 1127 struct aac_adapter_info adapter_info; 1128 struct aac_supplement_adapter_info supplement_adapter_info; 1129 /* These are in adapter info but they are in the io flow so 1130 * lets break them out so we don't have to do an AND to check them 1131 */ 1132 u8 nondasd_support; 1133 u8 jbod; 1134 u8 cache_protected; 1135 u8 dac_support; 1136 u8 needs_dac; 1137 u8 raid_scsi_mode; 1138 u8 comm_interface; 1139 # define AAC_COMM_PRODUCER 0 1140 # define AAC_COMM_MESSAGE 1 1141 # define AAC_COMM_MESSAGE_TYPE1 3 1142 # define AAC_COMM_MESSAGE_TYPE2 4 1143 u8 raw_io_interface; 1144 u8 raw_io_64; 1145 u8 printf_enabled; 1146 u8 in_reset; 1147 u8 msi; 1148 int management_fib_count; 1149 spinlock_t manage_lock; 1150 spinlock_t sync_lock; 1151 int sync_mode; 1152 struct fib *sync_fib; 1153 struct list_head sync_fib_list; 1154 }; 1155 1156 #define aac_adapter_interrupt(dev) \ 1157 (dev)->a_ops.adapter_interrupt(dev) 1158 1159 #define aac_adapter_notify(dev, event) \ 1160 (dev)->a_ops.adapter_notify(dev, event) 1161 1162 #define aac_adapter_disable_int(dev) \ 1163 (dev)->a_ops.adapter_disable_int(dev) 1164 1165 #define aac_adapter_enable_int(dev) \ 1166 (dev)->a_ops.adapter_enable_int(dev) 1167 1168 #define aac_adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) \ 1169 (dev)->a_ops.adapter_sync_cmd(dev, command, p1, p2, p3, p4, p5, p6, status, r1, r2, r3, r4) 1170 1171 #define aac_adapter_check_health(dev) \ 1172 (dev)->a_ops.adapter_check_health(dev) 1173 1174 #define aac_adapter_restart(dev,bled) \ 1175 (dev)->a_ops.adapter_restart(dev,bled) 1176 1177 #define aac_adapter_ioremap(dev, size) \ 1178 (dev)->a_ops.adapter_ioremap(dev, size) 1179 1180 #define aac_adapter_deliver(fib) \ 1181 ((fib)->dev)->a_ops.adapter_deliver(fib) 1182 1183 #define aac_adapter_bounds(dev,cmd,lba) \ 1184 dev->a_ops.adapter_bounds(dev,cmd,lba) 1185 1186 #define aac_adapter_read(fib,cmd,lba,count) \ 1187 ((fib)->dev)->a_ops.adapter_read(fib,cmd,lba,count) 1188 1189 #define aac_adapter_write(fib,cmd,lba,count,fua) \ 1190 ((fib)->dev)->a_ops.adapter_write(fib,cmd,lba,count,fua) 1191 1192 #define aac_adapter_scsi(fib,cmd) \ 1193 ((fib)->dev)->a_ops.adapter_scsi(fib,cmd) 1194 1195 #define aac_adapter_comm(dev,comm) \ 1196 (dev)->a_ops.adapter_comm(dev, comm) 1197 1198 #define FIB_CONTEXT_FLAG_TIMED_OUT (0x00000001) 1199 #define FIB_CONTEXT_FLAG (0x00000002) 1200 #define FIB_CONTEXT_FLAG_WAIT (0x00000004) 1201 #define FIB_CONTEXT_FLAG_FASTRESP (0x00000008) 1202 1203 /* 1204 * Define the command values 1205 */ 1206 1207 #define Null 0 1208 #define GetAttributes 1 1209 #define SetAttributes 2 1210 #define Lookup 3 1211 #define ReadLink 4 1212 #define Read 5 1213 #define Write 6 1214 #define Create 7 1215 #define MakeDirectory 8 1216 #define SymbolicLink 9 1217 #define MakeNode 10 1218 #define Removex 11 1219 #define RemoveDirectoryx 12 1220 #define Rename 13 1221 #define Link 14 1222 #define ReadDirectory 15 1223 #define ReadDirectoryPlus 16 1224 #define FileSystemStatus 17 1225 #define FileSystemInfo 18 1226 #define PathConfigure 19 1227 #define Commit 20 1228 #define Mount 21 1229 #define UnMount 22 1230 #define Newfs 23 1231 #define FsCheck 24 1232 #define FsSync 25 1233 #define SimReadWrite 26 1234 #define SetFileSystemStatus 27 1235 #define BlockRead 28 1236 #define BlockWrite 29 1237 #define NvramIoctl 30 1238 #define FsSyncWait 31 1239 #define ClearArchiveBit 32 1240 #define SetAcl 33 1241 #define GetAcl 34 1242 #define AssignAcl 35 1243 #define FaultInsertion 36 /* Fault Insertion Command */ 1244 #define CrazyCache 37 /* Crazycache */ 1245 1246 #define MAX_FSACOMMAND_NUM 38 1247 1248 1249 /* 1250 * Define the status returns. These are very unixlike although 1251 * most are not in fact used 1252 */ 1253 1254 #define ST_OK 0 1255 #define ST_PERM 1 1256 #define ST_NOENT 2 1257 #define ST_IO 5 1258 #define ST_NXIO 6 1259 #define ST_E2BIG 7 1260 #define ST_ACCES 13 1261 #define ST_EXIST 17 1262 #define ST_XDEV 18 1263 #define ST_NODEV 19 1264 #define ST_NOTDIR 20 1265 #define ST_ISDIR 21 1266 #define ST_INVAL 22 1267 #define ST_FBIG 27 1268 #define ST_NOSPC 28 1269 #define ST_ROFS 30 1270 #define ST_MLINK 31 1271 #define ST_WOULDBLOCK 35 1272 #define ST_NAMETOOLONG 63 1273 #define ST_NOTEMPTY 66 1274 #define ST_DQUOT 69 1275 #define ST_STALE 70 1276 #define ST_REMOTE 71 1277 #define ST_NOT_READY 72 1278 #define ST_BADHANDLE 10001 1279 #define ST_NOT_SYNC 10002 1280 #define ST_BAD_COOKIE 10003 1281 #define ST_NOTSUPP 10004 1282 #define ST_TOOSMALL 10005 1283 #define ST_SERVERFAULT 10006 1284 #define ST_BADTYPE 10007 1285 #define ST_JUKEBOX 10008 1286 #define ST_NOTMOUNTED 10009 1287 #define ST_MAINTMODE 10010 1288 #define ST_STALEACL 10011 1289 1290 /* 1291 * On writes how does the client want the data written. 1292 */ 1293 1294 #define CACHE_CSTABLE 1 1295 #define CACHE_UNSTABLE 2 1296 1297 /* 1298 * Lets the client know at which level the data was committed on 1299 * a write request 1300 */ 1301 1302 #define CMFILE_SYNCH_NVRAM 1 1303 #define CMDATA_SYNCH_NVRAM 2 1304 #define CMFILE_SYNCH 3 1305 #define CMDATA_SYNCH 4 1306 #define CMUNSTABLE 5 1307 1308 #define RIO_TYPE_WRITE 0x0000 1309 #define RIO_TYPE_READ 0x0001 1310 #define RIO_SUREWRITE 0x0008 1311 1312 #define RIO2_IO_TYPE 0x0003 1313 #define RIO2_IO_TYPE_WRITE 0x0000 1314 #define RIO2_IO_TYPE_READ 0x0001 1315 #define RIO2_IO_TYPE_VERIFY 0x0002 1316 #define RIO2_IO_ERROR 0x0004 1317 #define RIO2_IO_SUREWRITE 0x0008 1318 #define RIO2_SGL_CONFORMANT 0x0010 1319 #define RIO2_SG_FORMAT 0xF000 1320 #define RIO2_SG_FORMAT_ARC 0x0000 1321 #define RIO2_SG_FORMAT_SRL 0x1000 1322 #define RIO2_SG_FORMAT_IEEE1212 0x2000 1323 1324 struct aac_read 1325 { 1326 __le32 command; 1327 __le32 cid; 1328 __le32 block; 1329 __le32 count; 1330 struct sgmap sg; // Must be last in struct because it is variable 1331 }; 1332 1333 struct aac_read64 1334 { 1335 __le32 command; 1336 __le16 cid; 1337 __le16 sector_count; 1338 __le32 block; 1339 __le16 pad; 1340 __le16 flags; 1341 struct sgmap64 sg; // Must be last in struct because it is variable 1342 }; 1343 1344 struct aac_read_reply 1345 { 1346 __le32 status; 1347 __le32 count; 1348 }; 1349 1350 struct aac_write 1351 { 1352 __le32 command; 1353 __le32 cid; 1354 __le32 block; 1355 __le32 count; 1356 __le32 stable; // Not used 1357 struct sgmap sg; // Must be last in struct because it is variable 1358 }; 1359 1360 struct aac_write64 1361 { 1362 __le32 command; 1363 __le16 cid; 1364 __le16 sector_count; 1365 __le32 block; 1366 __le16 pad; 1367 __le16 flags; 1368 struct sgmap64 sg; // Must be last in struct because it is variable 1369 }; 1370 struct aac_write_reply 1371 { 1372 __le32 status; 1373 __le32 count; 1374 __le32 committed; 1375 }; 1376 1377 struct aac_raw_io 1378 { 1379 __le32 block[2]; 1380 __le32 count; 1381 __le16 cid; 1382 __le16 flags; /* 00 W, 01 R */ 1383 __le16 bpTotal; /* reserved for F/W use */ 1384 __le16 bpComplete; /* reserved for F/W use */ 1385 struct sgmapraw sg; 1386 }; 1387 1388 struct aac_raw_io2 { 1389 __le32 blockLow; 1390 __le32 blockHigh; 1391 __le32 byteCount; 1392 __le16 cid; 1393 __le16 flags; /* RIO2 flags */ 1394 __le32 sgeFirstSize; /* size of first sge el. */ 1395 __le32 sgeNominalSize; /* size of 2nd sge el. (if conformant) */ 1396 u8 sgeCnt; /* only 8 bits required */ 1397 u8 bpTotal; /* reserved for F/W use */ 1398 u8 bpComplete; /* reserved for F/W use */ 1399 u8 sgeFirstIndex; /* reserved for F/W use */ 1400 u8 unused[4]; 1401 struct sge_ieee1212 sge[1]; 1402 }; 1403 1404 #define CT_FLUSH_CACHE 129 1405 struct aac_synchronize { 1406 __le32 command; /* VM_ContainerConfig */ 1407 __le32 type; /* CT_FLUSH_CACHE */ 1408 __le32 cid; 1409 __le32 parm1; 1410 __le32 parm2; 1411 __le32 parm3; 1412 __le32 parm4; 1413 __le32 count; /* sizeof(((struct aac_synchronize_reply *)NULL)->data) */ 1414 }; 1415 1416 struct aac_synchronize_reply { 1417 __le32 dummy0; 1418 __le32 dummy1; 1419 __le32 status; /* CT_OK */ 1420 __le32 parm1; 1421 __le32 parm2; 1422 __le32 parm3; 1423 __le32 parm4; 1424 __le32 parm5; 1425 u8 data[16]; 1426 }; 1427 1428 #define CT_POWER_MANAGEMENT 245 1429 #define CT_PM_START_UNIT 2 1430 #define CT_PM_STOP_UNIT 3 1431 #define CT_PM_UNIT_IMMEDIATE 1 1432 struct aac_power_management { 1433 __le32 command; /* VM_ContainerConfig */ 1434 __le32 type; /* CT_POWER_MANAGEMENT */ 1435 __le32 sub; /* CT_PM_* */ 1436 __le32 cid; 1437 __le32 parm; /* CT_PM_sub_* */ 1438 }; 1439 1440 #define CT_PAUSE_IO 65 1441 #define CT_RELEASE_IO 66 1442 struct aac_pause { 1443 __le32 command; /* VM_ContainerConfig */ 1444 __le32 type; /* CT_PAUSE_IO */ 1445 __le32 timeout; /* 10ms ticks */ 1446 __le32 min; 1447 __le32 noRescan; 1448 __le32 parm3; 1449 __le32 parm4; 1450 __le32 count; /* sizeof(((struct aac_pause_reply *)NULL)->data) */ 1451 }; 1452 1453 struct aac_srb 1454 { 1455 __le32 function; 1456 __le32 channel; 1457 __le32 id; 1458 __le32 lun; 1459 __le32 timeout; 1460 __le32 flags; 1461 __le32 count; // Data xfer size 1462 __le32 retry_limit; 1463 __le32 cdb_size; 1464 u8 cdb[16]; 1465 struct sgmap sg; 1466 }; 1467 1468 /* 1469 * This and associated data structs are used by the 1470 * ioctl caller and are in cpu order. 1471 */ 1472 struct user_aac_srb 1473 { 1474 u32 function; 1475 u32 channel; 1476 u32 id; 1477 u32 lun; 1478 u32 timeout; 1479 u32 flags; 1480 u32 count; // Data xfer size 1481 u32 retry_limit; 1482 u32 cdb_size; 1483 u8 cdb[16]; 1484 struct user_sgmap sg; 1485 }; 1486 1487 #define AAC_SENSE_BUFFERSIZE 30 1488 1489 struct aac_srb_reply 1490 { 1491 __le32 status; 1492 __le32 srb_status; 1493 __le32 scsi_status; 1494 __le32 data_xfer_length; 1495 __le32 sense_data_size; 1496 u8 sense_data[AAC_SENSE_BUFFERSIZE]; // Can this be SCSI_SENSE_BUFFERSIZE 1497 }; 1498 /* 1499 * SRB Flags 1500 */ 1501 #define SRB_NoDataXfer 0x0000 1502 #define SRB_DisableDisconnect 0x0004 1503 #define SRB_DisableSynchTransfer 0x0008 1504 #define SRB_BypassFrozenQueue 0x0010 1505 #define SRB_DisableAutosense 0x0020 1506 #define SRB_DataIn 0x0040 1507 #define SRB_DataOut 0x0080 1508 1509 /* 1510 * SRB Functions - set in aac_srb->function 1511 */ 1512 #define SRBF_ExecuteScsi 0x0000 1513 #define SRBF_ClaimDevice 0x0001 1514 #define SRBF_IO_Control 0x0002 1515 #define SRBF_ReceiveEvent 0x0003 1516 #define SRBF_ReleaseQueue 0x0004 1517 #define SRBF_AttachDevice 0x0005 1518 #define SRBF_ReleaseDevice 0x0006 1519 #define SRBF_Shutdown 0x0007 1520 #define SRBF_Flush 0x0008 1521 #define SRBF_AbortCommand 0x0010 1522 #define SRBF_ReleaseRecovery 0x0011 1523 #define SRBF_ResetBus 0x0012 1524 #define SRBF_ResetDevice 0x0013 1525 #define SRBF_TerminateIO 0x0014 1526 #define SRBF_FlushQueue 0x0015 1527 #define SRBF_RemoveDevice 0x0016 1528 #define SRBF_DomainValidation 0x0017 1529 1530 /* 1531 * SRB SCSI Status - set in aac_srb->scsi_status 1532 */ 1533 #define SRB_STATUS_PENDING 0x00 1534 #define SRB_STATUS_SUCCESS 0x01 1535 #define SRB_STATUS_ABORTED 0x02 1536 #define SRB_STATUS_ABORT_FAILED 0x03 1537 #define SRB_STATUS_ERROR 0x04 1538 #define SRB_STATUS_BUSY 0x05 1539 #define SRB_STATUS_INVALID_REQUEST 0x06 1540 #define SRB_STATUS_INVALID_PATH_ID 0x07 1541 #define SRB_STATUS_NO_DEVICE 0x08 1542 #define SRB_STATUS_TIMEOUT 0x09 1543 #define SRB_STATUS_SELECTION_TIMEOUT 0x0A 1544 #define SRB_STATUS_COMMAND_TIMEOUT 0x0B 1545 #define SRB_STATUS_MESSAGE_REJECTED 0x0D 1546 #define SRB_STATUS_BUS_RESET 0x0E 1547 #define SRB_STATUS_PARITY_ERROR 0x0F 1548 #define SRB_STATUS_REQUEST_SENSE_FAILED 0x10 1549 #define SRB_STATUS_NO_HBA 0x11 1550 #define SRB_STATUS_DATA_OVERRUN 0x12 1551 #define SRB_STATUS_UNEXPECTED_BUS_FREE 0x13 1552 #define SRB_STATUS_PHASE_SEQUENCE_FAILURE 0x14 1553 #define SRB_STATUS_BAD_SRB_BLOCK_LENGTH 0x15 1554 #define SRB_STATUS_REQUEST_FLUSHED 0x16 1555 #define SRB_STATUS_DELAYED_RETRY 0x17 1556 #define SRB_STATUS_INVALID_LUN 0x20 1557 #define SRB_STATUS_INVALID_TARGET_ID 0x21 1558 #define SRB_STATUS_BAD_FUNCTION 0x22 1559 #define SRB_STATUS_ERROR_RECOVERY 0x23 1560 #define SRB_STATUS_NOT_STARTED 0x24 1561 #define SRB_STATUS_NOT_IN_USE 0x30 1562 #define SRB_STATUS_FORCE_ABORT 0x31 1563 #define SRB_STATUS_DOMAIN_VALIDATION_FAIL 0x32 1564 1565 /* 1566 * Object-Server / Volume-Manager Dispatch Classes 1567 */ 1568 1569 #define VM_Null 0 1570 #define VM_NameServe 1 1571 #define VM_ContainerConfig 2 1572 #define VM_Ioctl 3 1573 #define VM_FilesystemIoctl 4 1574 #define VM_CloseAll 5 1575 #define VM_CtBlockRead 6 1576 #define VM_CtBlockWrite 7 1577 #define VM_SliceBlockRead 8 /* raw access to configured "storage objects" */ 1578 #define VM_SliceBlockWrite 9 1579 #define VM_DriveBlockRead 10 /* raw access to physical devices */ 1580 #define VM_DriveBlockWrite 11 1581 #define VM_EnclosureMgt 12 /* enclosure management */ 1582 #define VM_Unused 13 /* used to be diskset management */ 1583 #define VM_CtBlockVerify 14 1584 #define VM_CtPerf 15 /* performance test */ 1585 #define VM_CtBlockRead64 16 1586 #define VM_CtBlockWrite64 17 1587 #define VM_CtBlockVerify64 18 1588 #define VM_CtHostRead64 19 1589 #define VM_CtHostWrite64 20 1590 #define VM_DrvErrTblLog 21 1591 #define VM_NameServe64 22 1592 1593 #define MAX_VMCOMMAND_NUM 23 /* used for sizing stats array - leave last */ 1594 1595 /* 1596 * Descriptive information (eg, vital stats) 1597 * that a content manager might report. The 1598 * FileArray filesystem component is one example 1599 * of a content manager. Raw mode might be 1600 * another. 1601 */ 1602 1603 struct aac_fsinfo { 1604 __le32 fsTotalSize; /* Consumed by fs, incl. metadata */ 1605 __le32 fsBlockSize; 1606 __le32 fsFragSize; 1607 __le32 fsMaxExtendSize; 1608 __le32 fsSpaceUnits; 1609 __le32 fsMaxNumFiles; 1610 __le32 fsNumFreeFiles; 1611 __le32 fsInodeDensity; 1612 }; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1613 1614 union aac_contentinfo { 1615 struct aac_fsinfo filesys; /* valid iff ObjType == FT_FILESYS && !(ContentState & FSCS_NOTCLEAN) */ 1616 }; 1617 1618 /* 1619 * Query for Container Configuration Status 1620 */ 1621 1622 #define CT_GET_CONFIG_STATUS 147 1623 struct aac_get_config_status { 1624 __le32 command; /* VM_ContainerConfig */ 1625 __le32 type; /* CT_GET_CONFIG_STATUS */ 1626 __le32 parm1; 1627 __le32 parm2; 1628 __le32 parm3; 1629 __le32 parm4; 1630 __le32 parm5; 1631 __le32 count; /* sizeof(((struct aac_get_config_status_resp *)NULL)->data) */ 1632 }; 1633 1634 #define CFACT_CONTINUE 0 1635 #define CFACT_PAUSE 1 1636 #define CFACT_ABORT 2 1637 struct aac_get_config_status_resp { 1638 __le32 response; /* ST_OK */ 1639 __le32 dummy0; 1640 __le32 status; /* CT_OK */ 1641 __le32 parm1; 1642 __le32 parm2; 1643 __le32 parm3; 1644 __le32 parm4; 1645 __le32 parm5; 1646 struct { 1647 __le32 action; /* CFACT_CONTINUE, CFACT_PAUSE or CFACT_ABORT */ 1648 __le16 flags; 1649 __le16 count; 1650 } data; 1651 }; 1652 1653 /* 1654 * Accept the configuration as-is 1655 */ 1656 1657 #define CT_COMMIT_CONFIG 152 1658 1659 struct aac_commit_config { 1660 __le32 command; /* VM_ContainerConfig */ 1661 __le32 type; /* CT_COMMIT_CONFIG */ 1662 }; 1663 1664 /* 1665 * Query for Container Configuration Status 1666 */ 1667 1668 #define CT_GET_CONTAINER_COUNT 4 1669 struct aac_get_container_count { 1670 __le32 command; /* VM_ContainerConfig */ 1671 __le32 type; /* CT_GET_CONTAINER_COUNT */ 1672 }; 1673 1674 struct aac_get_container_count_resp { 1675 __le32 response; /* ST_OK */ 1676 __le32 dummy0; 1677 __le32 MaxContainers; 1678 __le32 ContainerSwitchEntries; 1679 __le32 MaxPartitions; 1680 }; 1681 1682 1683 /* 1684 * Query for "mountable" objects, ie, objects that are typically 1685 * associated with a drive letter on the client (host) side. 1686 */ 1687 1688 struct aac_mntent { 1689 __le32 oid; 1690 u8 name[16]; /* if applicable */ 1691 struct creation_info create_info; /* if applicable */ 1692 __le32 capacity; 1693 __le32 vol; /* substrate structure */ 1694 __le32 obj; /* FT_FILESYS, etc. */ 1695 __le32 state; /* unready for mounting, 1696 readonly, etc. */ 1697 union aac_contentinfo fileinfo; /* Info specific to content 1698 manager (eg, filesystem) */ 1699 __le32 altoid; /* != oid <==> snapshot or 1700 broken mirror exists */ 1701 __le32 capacityhigh; 1702 }; 1703 1704 #define FSCS_NOTCLEAN 0x0001 /* fsck is necessary before mounting */ 1705 #define FSCS_READONLY 0x0002 /* possible result of broken mirror */ 1706 #define FSCS_HIDDEN 0x0004 /* should be ignored - set during a clear */ 1707 #define FSCS_NOT_READY 0x0008 /* Array spinning up to fulfil request */ 1708 1709 struct aac_query_mount { 1710 __le32 command; 1711 __le32 type; 1712 __le32 count; 1713 }; 1714 1715 struct aac_mount { 1716 __le32 status; 1717 __le32 type; /* should be same as that requested */ 1718 __le32 count; 1719 struct aac_mntent mnt[1]; 1720 }; 1721 1722 #define CT_READ_NAME 130 1723 struct aac_get_name { 1724 __le32 command; /* VM_ContainerConfig */ 1725 __le32 type; /* CT_READ_NAME */ 1726 __le32 cid; 1727 __le32 parm1; 1728 __le32 parm2; 1729 __le32 parm3; 1730 __le32 parm4; 1731 __le32 count; /* sizeof(((struct aac_get_name_resp *)NULL)->data) */ 1732 }; 1733 1734 struct aac_get_name_resp { 1735 __le32 dummy0; 1736 __le32 dummy1; 1737 __le32 status; /* CT_OK */ 1738 __le32 parm1; 1739 __le32 parm2; 1740 __le32 parm3; 1741 __le32 parm4; 1742 __le32 parm5; 1743 u8 data[16]; 1744 }; 1745 1746 #define CT_CID_TO_32BITS_UID 165 1747 struct aac_get_serial { 1748 __le32 command; /* VM_ContainerConfig */ 1749 __le32 type; /* CT_CID_TO_32BITS_UID */ 1750 __le32 cid; 1751 }; 1752 1753 struct aac_get_serial_resp { 1754 __le32 dummy0; 1755 __le32 dummy1; 1756 __le32 status; /* CT_OK */ 1757 __le32 uid; 1758 }; 1759 1760 /* 1761 * The following command is sent to shut down each container. 1762 */ 1763 1764 struct aac_close { 1765 __le32 command; 1766 __le32 cid; 1767 }; 1768 1769 struct aac_query_disk 1770 { 1771 s32 cnum; 1772 s32 bus; 1773 s32 id; 1774 s32 lun; 1775 u32 valid; 1776 u32 locked; 1777 u32 deleted; 1778 s32 instance; 1779 s8 name[10]; 1780 u32 unmapped; 1781 }; 1782 1783 struct aac_delete_disk { 1784 u32 disknum; 1785 u32 cnum; 1786 }; 1787 1788 struct fib_ioctl 1789 { 1790 u32 fibctx; 1791 s32 wait; 1792 char __user *fib; 1793 }; 1794 1795 struct revision 1796 { 1797 u32 compat; 1798 __le32 version; 1799 __le32 build; 1800 }; 1801 1802 1803 /* 1804 * Ugly - non Linux like ioctl coding for back compat. 1805 */ 1806 1807 #define CTL_CODE(function, method) ( \ 1808 (4<< 16) | ((function) << 2) | (method) \ 1809 ) 1810 1811 /* 1812 * Define the method codes for how buffers are passed for I/O and FS 1813 * controls 1814 */ 1815 1816 #define METHOD_BUFFERED 0 1817 #define METHOD_NEITHER 3 1818 1819 /* 1820 * Filesystem ioctls 1821 */ 1822 1823 #define FSACTL_SENDFIB CTL_CODE(2050, METHOD_BUFFERED) 1824 #define FSACTL_SEND_RAW_SRB CTL_CODE(2067, METHOD_BUFFERED) 1825 #define FSACTL_DELETE_DISK 0x163 1826 #define FSACTL_QUERY_DISK 0x173 1827 #define FSACTL_OPEN_GET_ADAPTER_FIB CTL_CODE(2100, METHOD_BUFFERED) 1828 #define FSACTL_GET_NEXT_ADAPTER_FIB CTL_CODE(2101, METHOD_BUFFERED) 1829 #define FSACTL_CLOSE_GET_ADAPTER_FIB CTL_CODE(2102, METHOD_BUFFERED) 1830 #define FSACTL_MINIPORT_REV_CHECK CTL_CODE(2107, METHOD_BUFFERED) 1831 #define FSACTL_GET_PCI_INFO CTL_CODE(2119, METHOD_BUFFERED) 1832 #define FSACTL_FORCE_DELETE_DISK CTL_CODE(2120, METHOD_NEITHER) 1833 #define FSACTL_GET_CONTAINERS 2131 1834 #define FSACTL_SEND_LARGE_FIB CTL_CODE(2138, METHOD_BUFFERED) 1835 1836 1837 struct aac_common 1838 { 1839 /* 1840 * If this value is set to 1 then interrupt moderation will occur 1841 * in the base commuication support. 1842 */ 1843 u32 irq_mod; 1844 u32 peak_fibs; 1845 u32 zero_fibs; 1846 u32 fib_timeouts; 1847 /* 1848 * Statistical counters in debug mode 1849 */ 1850 #ifdef DBG 1851 u32 FibsSent; 1852 u32 FibRecved; 1853 u32 NoResponseSent; 1854 u32 NoResponseRecved; 1855 u32 AsyncSent; 1856 u32 AsyncRecved; 1857 u32 NormalSent; 1858 u32 NormalRecved; 1859 #endif 1860 }; 1861 1862 extern struct aac_common aac_config; 1863 1864 1865 /* 1866 * The following macro is used when sending and receiving FIBs. It is 1867 * only used for debugging. 1868 */ 1869 1870 #ifdef DBG 1871 #define FIB_COUNTER_INCREMENT(counter) (counter)++ 1872 #else 1873 #define FIB_COUNTER_INCREMENT(counter) 1874 #endif 1875 1876 /* 1877 * Adapter direct commands 1878 * Monitor/Kernel API 1879 */ 1880 1881 #define BREAKPOINT_REQUEST 0x00000004 1882 #define INIT_STRUCT_BASE_ADDRESS 0x00000005 1883 #define READ_PERMANENT_PARAMETERS 0x0000000a 1884 #define WRITE_PERMANENT_PARAMETERS 0x0000000b 1885 #define HOST_CRASHING 0x0000000d 1886 #define SEND_SYNCHRONOUS_FIB 0x0000000c 1887 #define COMMAND_POST_RESULTS 0x00000014 1888 #define GET_ADAPTER_PROPERTIES 0x00000019 1889 #define GET_DRIVER_BUFFER_PROPERTIES 0x00000023 1890 #define RCV_TEMP_READINGS 0x00000025 1891 #define GET_COMM_PREFERRED_SETTINGS 0x00000026 1892 #define IOP_RESET 0x00001000 1893 #define IOP_RESET_ALWAYS 0x00001001 1894 #define RE_INIT_ADAPTER 0x000000ee 1895 1896 /* 1897 * Adapter Status Register 1898 * 1899 * Phase Staus mailbox is 32bits: 1900 * <31:16> = Phase Status 1901 * <15:0> = Phase 1902 * 1903 * The adapter reports is present state through the phase. Only 1904 * a single phase should be ever be set. Each phase can have multiple 1905 * phase status bits to provide more detailed information about the 1906 * state of the board. Care should be taken to ensure that any phase 1907 * status bits that are set when changing the phase are also valid 1908 * for the new phase or be cleared out. Adapter software (monitor, 1909 * iflash, kernel) is responsible for properly maintining the phase 1910 * status mailbox when it is running. 1911 * 1912 * MONKER_API Phases 1913 * 1914 * Phases are bit oriented. It is NOT valid to have multiple bits set 1915 */ 1916 1917 #define SELF_TEST_FAILED 0x00000004 1918 #define MONITOR_PANIC 0x00000020 1919 #define KERNEL_UP_AND_RUNNING 0x00000080 1920 #define KERNEL_PANIC 0x00000100 1921 #define FLASH_UPD_PENDING 0x00002000 1922 #define FLASH_UPD_SUCCESS 0x00004000 1923 #define FLASH_UPD_FAILED 0x00008000 1924 #define FWUPD_TIMEOUT (5 * 60) 1925 1926 /* 1927 * Doorbell bit defines 1928 */ 1929 1930 #define DoorBellSyncCmdAvailable (1<<0) /* Host -> Adapter */ 1931 #define DoorBellPrintfDone (1<<5) /* Host -> Adapter */ 1932 #define DoorBellAdapterNormCmdReady (1<<1) /* Adapter -> Host */ 1933 #define DoorBellAdapterNormRespReady (1<<2) /* Adapter -> Host */ 1934 #define DoorBellAdapterNormCmdNotFull (1<<3) /* Adapter -> Host */ 1935 #define DoorBellAdapterNormRespNotFull (1<<4) /* Adapter -> Host */ 1936 #define DoorBellPrintfReady (1<<5) /* Adapter -> Host */ 1937 #define DoorBellAifPending (1<<6) /* Adapter -> Host */ 1938 1939 /* PMC specific outbound doorbell bits */ 1940 #define PmDoorBellResponseSent (1<<1) /* Adapter -> Host */ 1941 1942 /* 1943 * For FIB communication, we need all of the following things 1944 * to send back to the user. 1945 */ 1946 1947 #define AifCmdEventNotify 1 /* Notify of event */ 1948 #define AifEnConfigChange 3 /* Adapter configuration change */ 1949 #define AifEnContainerChange 4 /* Container configuration change */ 1950 #define AifEnDeviceFailure 5 /* SCSI device failed */ 1951 #define AifEnEnclosureManagement 13 /* EM_DRIVE_* */ 1952 #define EM_DRIVE_INSERTION 31 1953 #define EM_DRIVE_REMOVAL 32 1954 #define AifEnBatteryEvent 14 /* Change in Battery State */ 1955 #define AifEnAddContainer 15 /* A new array was created */ 1956 #define AifEnDeleteContainer 16 /* A container was deleted */ 1957 #define AifEnExpEvent 23 /* Firmware Event Log */ 1958 #define AifExeFirmwarePanic 3 /* Firmware Event Panic */ 1959 #define AifHighPriority 3 /* Highest Priority Event */ 1960 #define AifEnAddJBOD 30 /* JBOD created */ 1961 #define AifEnDeleteJBOD 31 /* JBOD deleted */ 1962 1963 #define AifCmdJobProgress 2 /* Progress report */ 1964 #define AifJobCtrZero 101 /* Array Zero progress */ 1965 #define AifJobStsSuccess 1 /* Job completes */ 1966 #define AifJobStsRunning 102 /* Job running */ 1967 #define AifCmdAPIReport 3 /* Report from other user of API */ 1968 #define AifCmdDriverNotify 4 /* Notify host driver of event */ 1969 #define AifDenMorphComplete 200 /* A morph operation completed */ 1970 #define AifDenVolumeExtendComplete 201 /* A volume extend completed */ 1971 #define AifReqJobList 100 /* Gets back complete job list */ 1972 #define AifReqJobsForCtr 101 /* Gets back jobs for specific container */ 1973 #define AifReqJobsForScsi 102 /* Gets back jobs for specific SCSI device */ 1974 #define AifReqJobReport 103 /* Gets back a specific job report or list of them */ 1975 #define AifReqTerminateJob 104 /* Terminates job */ 1976 #define AifReqSuspendJob 105 /* Suspends a job */ 1977 #define AifReqResumeJob 106 /* Resumes a job */ 1978 #define AifReqSendAPIReport 107 /* API generic report requests */ 1979 #define AifReqAPIJobStart 108 /* Start a job from the API */ 1980 #define AifReqAPIJobUpdate 109 /* Update a job report from the API */ 1981 #define AifReqAPIJobFinish 110 /* Finish a job from the API */ 1982 1983 /* PMC NEW COMM: Request the event data */ 1984 #define AifReqEvent 200 1985 1986 /* 1987 * Adapter Initiated FIB command structures. Start with the adapter 1988 * initiated FIBs that really come from the adapter, and get responded 1989 * to by the host. 1990 */ 1991 1992 struct aac_aifcmd { 1993 __le32 command; /* Tell host what type of notify this is */ 1994 __le32 seqnum; /* To allow ordering of reports (if necessary) */ 1995 u8 data[1]; /* Undefined length (from kernel viewpoint) */ 1996 }; 1997 1998 /** 1999 * Convert capacity to cylinders 2000 * accounting for the fact capacity could be a 64 bit value 2001 * 2002 */ 2003 static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor) 2004 { 2005 sector_div(capacity, divisor); 2006 return capacity; 2007 } 2008 2009 /* SCp.phase values */ 2010 #define AAC_OWNER_MIDLEVEL 0x101 2011 #define AAC_OWNER_LOWLEVEL 0x102 2012 #define AAC_OWNER_ERROR_HANDLER 0x103 2013 #define AAC_OWNER_FIRMWARE 0x106 2014 2015 const char *aac_driverinfo(struct Scsi_Host *); 2016 struct fib *aac_fib_alloc(struct aac_dev *dev); 2017 int aac_fib_setup(struct aac_dev *dev); 2018 void aac_fib_map_free(struct aac_dev *dev); 2019 void aac_fib_free(struct fib * context); 2020 void aac_fib_init(struct fib * context); 2021 void aac_printf(struct aac_dev *dev, u32 val); 2022 int aac_fib_send(u16 command, struct fib * context, unsigned long size, int priority, int wait, int reply, fib_callback callback, void *ctxt); 2023 int aac_consumer_get(struct aac_dev * dev, struct aac_queue * q, struct aac_entry **entry); 2024 void aac_consumer_free(struct aac_dev * dev, struct aac_queue * q, u32 qnum); 2025 int aac_fib_complete(struct fib * context); 2026 #define fib_data(fibctx) ((void *)(fibctx)->hw_fib_va->data) 2027 struct aac_dev *aac_init_adapter(struct aac_dev *dev); 2028 int aac_get_config_status(struct aac_dev *dev, int commit_flag); 2029 int aac_get_containers(struct aac_dev *dev); 2030 int aac_scsi_cmd(struct scsi_cmnd *cmd); 2031 int aac_dev_ioctl(struct aac_dev *dev, int cmd, void __user *arg); 2032 #ifndef shost_to_class 2033 #define shost_to_class(shost) &shost->shost_dev 2034 #endif 2035 ssize_t aac_get_serial_number(struct device *dev, char *buf); 2036 int aac_do_ioctl(struct aac_dev * dev, int cmd, void __user *arg); 2037 int aac_rx_init(struct aac_dev *dev); 2038 int aac_rkt_init(struct aac_dev *dev); 2039 int aac_nark_init(struct aac_dev *dev); 2040 int aac_sa_init(struct aac_dev *dev); 2041 int aac_src_init(struct aac_dev *dev); 2042 int aac_srcv_init(struct aac_dev *dev); 2043 int aac_queue_get(struct aac_dev * dev, u32 * index, u32 qid, struct hw_fib * hw_fib, int wait, struct fib * fibptr, unsigned long *nonotify); 2044 unsigned int aac_response_normal(struct aac_queue * q); 2045 unsigned int aac_command_normal(struct aac_queue * q); 2046 unsigned int aac_intr_normal(struct aac_dev *dev, u32 Index, 2047 int isAif, int isFastResponse, 2048 struct hw_fib *aif_fib); 2049 int aac_reset_adapter(struct aac_dev * dev, int forced); 2050 int aac_check_health(struct aac_dev * dev); 2051 int aac_command_thread(void *data); 2052 int aac_close_fib_context(struct aac_dev * dev, struct aac_fib_context *fibctx); 2053 int aac_fib_adapter_complete(struct fib * fibptr, unsigned short size); 2054 struct aac_driver_ident* aac_get_driver_ident(int devtype); 2055 int aac_get_adapter_info(struct aac_dev* dev); 2056 int aac_send_shutdown(struct aac_dev *dev); 2057 int aac_probe_container(struct aac_dev *dev, int cid); 2058 int _aac_rx_init(struct aac_dev *dev); 2059 int aac_rx_select_comm(struct aac_dev *dev, int comm); 2060 int aac_rx_deliver_producer(struct fib * fib); 2061 char * get_container_type(unsigned type); 2062 extern int numacb; 2063 extern int acbsize; 2064 extern char aac_driver_version[]; 2065 extern int startup_timeout; 2066 extern int aif_timeout; 2067 extern int expose_physicals; 2068 extern int aac_reset_devices; 2069 extern int aac_msi; 2070 extern int aac_commit; 2071 extern int update_interval; 2072 extern int check_interval; 2073 extern int aac_check_reset; 2074