1 /* 2 * Initio A100 device driver for Linux. 3 * 4 * Copyright (c) 1994-1998 Initio Corporation 5 * All rights reserved. 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2, or (at your option) 10 * any later version. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 * 17 * You should have received a copy of the GNU General Public License 18 * along with this program; see the file COPYING. If not, write to 19 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 20 * 21 * -------------------------------------------------------------------------- 22 * 23 * Redistribution and use in source and binary forms, with or without 24 * modification, are permitted provided that the following conditions 25 * are met: 26 * 1. Redistributions of source code must retain the above copyright 27 * notice, this list of conditions, and the following disclaimer, 28 * without modification, immediately at the beginning of the file. 29 * 2. Redistributions in binary form must reproduce the above copyright 30 * notice, this list of conditions and the following disclaimer in the 31 * documentation and/or other materials provided with the distribution. 32 * 3. The name of the author may not be used to endorse or promote products 33 * derived from this software without specific prior written permission. 34 * 35 * Where this Software is combined with software released under the terms of 36 * the GNU General Public License ("GPL") and the terms of the GPL would require the 37 * combined work to also be released under the terms of the GPL, the terms 38 * and conditions of this License will apply in addition to those of the 39 * GPL with the exception of any terms or conditions of this License that 40 * conflict with, or are expressly prohibited by, the GPL. 41 * 42 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 43 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 44 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 45 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 46 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 47 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 48 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 49 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 50 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 51 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 52 * SUCH DAMAGE. 53 */ 54 55 /* 56 * Revision History: 57 * 06/18/98 HL, Initial production Version 1.02 58 * 12/19/98 bv, Use spinlocks for 2.1.95 and up 59 * 06/25/02 Doug Ledford <dledford@redhat.com> 60 * - This and the i60uscsi.h file are almost identical, 61 * merged them into a single header used by both .c files. 62 */ 63 64 #define inia100_REVID "Initio INI-A100U2W SCSI device driver; Revision: 1.02d" 65 66 #define ULONG unsigned long 67 #define USHORT unsigned short 68 #define UCHAR unsigned char 69 #define BYTE unsigned char 70 #define WORD unsigned short 71 #define DWORD unsigned long 72 #define UBYTE unsigned char 73 #define UWORD unsigned short 74 #define UDWORD unsigned long 75 #define U32 u32 76 77 #if 1 78 #define ORC_MAXQUEUE 245 79 #define ORC_MAXTAGS 64 80 #else 81 #define ORC_MAXQUEUE 25 82 #define ORC_MAXTAGS 8 83 #endif 84 85 #define TOTAL_SG_ENTRY 32 86 #define MAX_TARGETS 16 87 #define IMAX_CDB 15 88 #define SENSE_SIZE 14 89 90 /************************************************************************/ 91 /* Scatter-Gather Element Structure */ 92 /************************************************************************/ 93 typedef struct ORC_SG_Struc { 94 U32 SG_Ptr; /* Data Pointer */ 95 U32 SG_Len; /* Data Length */ 96 } ORC_SG; 97 98 /* SCSI related definition */ 99 #define DISC_NOT_ALLOW 0x80 /* Disconnect is not allowed */ 100 #define DISC_ALLOW 0xC0 /* Disconnect is allowed */ 101 102 103 #define ORC_OFFSET_SCB 16 104 #define ORC_MAX_SCBS 250 105 #define MAX_CHANNELS 2 106 #define MAX_ESCB_ELE 64 107 #define TCF_DRV_255_63 0x0400 108 109 /********************************************************/ 110 /* Orchid Host Command Set */ 111 /********************************************************/ 112 #define ORC_CMD_NOP 0x00 /* Host command - NOP */ 113 #define ORC_CMD_VERSION 0x01 /* Host command - Get F/W version */ 114 #define ORC_CMD_ECHO 0x02 /* Host command - ECHO */ 115 #define ORC_CMD_SET_NVM 0x03 /* Host command - Set NVRAM */ 116 #define ORC_CMD_GET_NVM 0x04 /* Host command - Get NVRAM */ 117 #define ORC_CMD_GET_BUS_STATUS 0x05 /* Host command - Get SCSI bus status */ 118 #define ORC_CMD_ABORT_SCB 0x06 /* Host command - Abort SCB */ 119 #define ORC_CMD_ISSUE_SCB 0x07 /* Host command - Issue SCB */ 120 121 /********************************************************/ 122 /* Orchid Register Set */ 123 /********************************************************/ 124 #define ORC_GINTS 0xA0 /* Global Interrupt Status */ 125 #define QINT 0x04 /* Reply Queue Interrupt */ 126 #define ORC_GIMSK 0xA1 /* Global Interrupt MASK */ 127 #define MQINT 0x04 /* Mask Reply Queue Interrupt */ 128 #define ORC_GCFG 0xA2 /* Global Configure */ 129 #define EEPRG 0x01 /* Enable EEPROM programming */ 130 #define ORC_GSTAT 0xA3 /* Global status */ 131 #define WIDEBUS 0x10 /* Wide SCSI Devices connected */ 132 #define ORC_HDATA 0xA4 /* Host Data */ 133 #define ORC_HCTRL 0xA5 /* Host Control */ 134 #define SCSIRST 0x80 /* SCSI bus reset */ 135 #define HDO 0x40 /* Host data out */ 136 #define HOSTSTOP 0x02 /* Host stop RISC engine */ 137 #define DEVRST 0x01 /* Device reset */ 138 #define ORC_HSTUS 0xA6 /* Host Status */ 139 #define HDI 0x02 /* Host data in */ 140 #define RREADY 0x01 /* RISC engine is ready to receive */ 141 #define ORC_NVRAM 0xA7 /* Nvram port address */ 142 #define SE2CS 0x008 143 #define SE2CLK 0x004 144 #define SE2DO 0x002 145 #define SE2DI 0x001 146 #define ORC_PQUEUE 0xA8 /* Posting queue FIFO */ 147 #define ORC_PQCNT 0xA9 /* Posting queue FIFO Cnt */ 148 #define ORC_RQUEUE 0xAA /* Reply queue FIFO */ 149 #define ORC_RQUEUECNT 0xAB /* Reply queue FIFO Cnt */ 150 #define ORC_FWBASEADR 0xAC /* Firmware base address */ 151 152 #define ORC_EBIOSADR0 0xB0 /* External Bios address */ 153 #define ORC_EBIOSADR1 0xB1 /* External Bios address */ 154 #define ORC_EBIOSADR2 0xB2 /* External Bios address */ 155 #define ORC_EBIOSDATA 0xB3 /* External Bios address */ 156 157 #define ORC_SCBSIZE 0xB7 /* SCB size register */ 158 #define ORC_SCBBASE0 0xB8 /* SCB base address 0 */ 159 #define ORC_SCBBASE1 0xBC /* SCB base address 1 */ 160 161 #define ORC_RISCCTL 0xE0 /* RISC Control */ 162 #define PRGMRST 0x002 163 #define DOWNLOAD 0x001 164 #define ORC_PRGMCTR0 0xE2 /* RISC program counter */ 165 #define ORC_PRGMCTR1 0xE3 /* RISC program counter */ 166 #define ORC_RISCRAM 0xEC /* RISC RAM data port 4 bytes */ 167 168 typedef struct orc_extended_scb { /* Extended SCB */ 169 ORC_SG ESCB_SGList[TOTAL_SG_ENTRY]; /*0 Start of SG list */ 170 struct scsi_cmnd *SCB_Srb; /*50 SRB Pointer */ 171 } ESCB; 172 173 /*********************************************************************** 174 SCSI Control Block 175 ************************************************************************/ 176 typedef struct orc_scb { /* Scsi_Ctrl_Blk */ 177 UBYTE SCB_Opcode; /*00 SCB command code&residual */ 178 UBYTE SCB_Flags; /*01 SCB Flags */ 179 UBYTE SCB_Target; /*02 Target Id */ 180 UBYTE SCB_Lun; /*03 Lun */ 181 U32 SCB_Reserved0; /*04 Reserved for ORCHID must 0 */ 182 U32 SCB_XferLen; /*08 Data Transfer Length */ 183 U32 SCB_Reserved1; /*0C Reserved for ORCHID must 0 */ 184 U32 SCB_SGLen; /*10 SG list # * 8 */ 185 U32 SCB_SGPAddr; /*14 SG List Buf physical Addr */ 186 U32 SCB_SGPAddrHigh; /*18 SG Buffer high physical Addr */ 187 UBYTE SCB_HaStat; /*1C Host Status */ 188 UBYTE SCB_TaStat; /*1D Target Status */ 189 UBYTE SCB_Status; /*1E SCB status */ 190 UBYTE SCB_Link; /*1F Link pointer, default 0xFF */ 191 UBYTE SCB_SenseLen; /*20 Sense Allocation Length */ 192 UBYTE SCB_CDBLen; /*21 CDB Length */ 193 UBYTE SCB_Ident; /*22 Identify */ 194 UBYTE SCB_TagMsg; /*23 Tag Message */ 195 UBYTE SCB_CDB[IMAX_CDB]; /*24 SCSI CDBs */ 196 UBYTE SCB_ScbIdx; /*3C Index for this ORCSCB */ 197 U32 SCB_SensePAddr; /*34 Sense Buffer physical Addr */ 198 199 ESCB *SCB_EScb; /*38 Extended SCB Pointer */ 200 #ifndef ALPHA 201 UBYTE SCB_Reserved2[4]; /*3E Reserved for Driver use */ 202 #endif 203 } ORC_SCB; 204 205 /* Opcodes of ORCSCB_Opcode */ 206 #define ORC_EXECSCSI 0x00 /* SCSI initiator command with residual */ 207 #define ORC_BUSDEVRST 0x01 /* SCSI Bus Device Reset */ 208 209 /* Status of ORCSCB_Status */ 210 #define ORCSCB_COMPLETE 0x00 /* SCB request completed */ 211 #define ORCSCB_POST 0x01 /* SCB is posted by the HOST */ 212 213 /* Bit Definition for ORCSCB_Flags */ 214 #define SCF_DISINT 0x01 /* Disable HOST interrupt */ 215 #define SCF_DIR 0x18 /* Direction bits */ 216 #define SCF_NO_DCHK 0x00 /* Direction determined by SCSI */ 217 #define SCF_DIN 0x08 /* From Target to Initiator */ 218 #define SCF_DOUT 0x10 /* From Initiator to Target */ 219 #define SCF_NO_XF 0x18 /* No data transfer */ 220 #define SCF_POLL 0x40 221 222 /* Error Codes for ORCSCB_HaStat */ 223 #define HOST_SEL_TOUT 0x11 224 #define HOST_DO_DU 0x12 225 #define HOST_BUS_FREE 0x13 226 #define HOST_BAD_PHAS 0x14 227 #define HOST_INV_CMD 0x16 228 #define HOST_SCSI_RST 0x1B 229 #define HOST_DEV_RST 0x1C 230 231 232 /* Error Codes for ORCSCB_TaStat */ 233 #define TARGET_CHK_COND 0x02 234 #define TARGET_BUSY 0x08 235 #define TARGET_TAG_FULL 0x28 236 237 238 /*********************************************************************** 239 Target Device Control Structure 240 **********************************************************************/ 241 242 typedef struct ORC_Tar_Ctrl_Struc { 243 UBYTE TCS_DrvDASD; /* 6 */ 244 UBYTE TCS_DrvSCSI; /* 7 */ 245 UBYTE TCS_DrvHead; /* 8 */ 246 UWORD TCS_DrvFlags; /* 4 */ 247 UBYTE TCS_DrvSector; /* 7 */ 248 } ORC_TCS; 249 250 /* Bit Definition for TCF_DrvFlags */ 251 #define TCS_DF_NODASD_SUPT 0x20 /* Suppress OS/2 DASD Mgr support */ 252 #define TCS_DF_NOSCSI_SUPT 0x40 /* Suppress OS/2 SCSI Mgr support */ 253 254 255 /*********************************************************************** 256 Host Adapter Control Structure 257 ************************************************************************/ 258 typedef struct ORC_Ha_Ctrl_Struc { 259 USHORT HCS_Base; /* 00 */ 260 UBYTE HCS_Index; /* 02 */ 261 UBYTE HCS_Intr; /* 04 */ 262 UBYTE HCS_SCSI_ID; /* 06 H/A SCSI ID */ 263 UBYTE HCS_BIOS; /* 07 BIOS configuration */ 264 265 UBYTE HCS_Flags; /* 0B */ 266 UBYTE HCS_HAConfig1; /* 1B SCSI0MAXTags */ 267 UBYTE HCS_MaxTar; /* 1B SCSI0MAXTags */ 268 269 USHORT HCS_Units; /* Number of units this adapter */ 270 USHORT HCS_AFlags; /* Adapter info. defined flags */ 271 ULONG HCS_Timeout; /* Adapter timeout value */ 272 ORC_SCB *HCS_virScbArray; /* 28 Virtual Pointer to SCB array */ 273 dma_addr_t HCS_physScbArray; /* Scb Physical address */ 274 ESCB *HCS_virEscbArray; /* Virtual pointer to ESCB Scatter list */ 275 dma_addr_t HCS_physEscbArray; /* scatter list Physical address */ 276 UBYTE TargetFlag[16]; /* 30 target configuration, TCF_EN_TAG */ 277 UBYTE MaximumTags[16]; /* 40 ORC_MAX_SCBS */ 278 UBYTE ActiveTags[16][16]; /* 50 */ 279 ORC_TCS HCS_Tcs[16]; /* 28 */ 280 U32 BitAllocFlag[MAX_CHANNELS][8]; /* Max STB is 256, So 256/32 */ 281 spinlock_t BitAllocFlagLock; 282 struct pci_dev *pdev; 283 } ORC_HCS; 284 285 /* Bit Definition for HCS_Flags */ 286 287 #define HCF_SCSI_RESET 0x01 /* SCSI BUS RESET */ 288 #define HCF_PARITY 0x02 /* parity card */ 289 #define HCF_LVDS 0x10 /* parity card */ 290 291 /* Bit Definition for TargetFlag */ 292 293 #define TCF_EN_255 0x08 294 #define TCF_EN_TAG 0x10 295 #define TCF_BUSY 0x20 296 #define TCF_DISCONNECT 0x40 297 #define TCF_SPIN_UP 0x80 298 299 /* Bit Definition for HCS_AFlags */ 300 #define HCS_AF_IGNORE 0x01 /* Adapter ignore */ 301 #define HCS_AF_DISABLE_RESET 0x10 /* Adapter disable reset */ 302 #define HCS_AF_DISABLE_ADPT 0x80 /* Adapter disable */ 303 304 typedef struct _NVRAM { 305 /*----------header ---------------*/ 306 UCHAR SubVendorID0; /* 00 - Sub Vendor ID */ 307 UCHAR SubVendorID1; /* 00 - Sub Vendor ID */ 308 UCHAR SubSysID0; /* 02 - Sub System ID */ 309 UCHAR SubSysID1; /* 02 - Sub System ID */ 310 UCHAR SubClass; /* 04 - Sub Class */ 311 UCHAR VendorID0; /* 05 - Vendor ID */ 312 UCHAR VendorID1; /* 05 - Vendor ID */ 313 UCHAR DeviceID0; /* 07 - Device ID */ 314 UCHAR DeviceID1; /* 07 - Device ID */ 315 UCHAR Reserved0[2]; /* 09 - Reserved */ 316 UCHAR Revision; /* 0B - Revision of data structure */ 317 /* ----Host Adapter Structure ---- */ 318 UCHAR NumOfCh; /* 0C - Number of SCSI channel */ 319 UCHAR BIOSConfig1; /* 0D - BIOS configuration 1 */ 320 UCHAR BIOSConfig2; /* 0E - BIOS boot channel&target ID */ 321 UCHAR BIOSConfig3; /* 0F - BIOS configuration 3 */ 322 /* ----SCSI channel Structure ---- */ 323 /* from "CTRL-I SCSI Host Adapter SetUp menu " */ 324 UCHAR SCSI0Id; /* 10 - Channel 0 SCSI ID */ 325 UCHAR SCSI0Config; /* 11 - Channel 0 SCSI configuration */ 326 UCHAR SCSI0MaxTags; /* 12 - Channel 0 Maximum tags */ 327 UCHAR SCSI0ResetTime; /* 13 - Channel 0 Reset recovering time */ 328 UCHAR ReservedforChannel0[2]; /* 14 - Reserved */ 329 330 /* ----SCSI target Structure ---- */ 331 /* from "CTRL-I SCSI device SetUp menu " */ 332 UCHAR Target00Config; /* 16 - Channel 0 Target 0 config */ 333 UCHAR Target01Config; /* 17 - Channel 0 Target 1 config */ 334 UCHAR Target02Config; /* 18 - Channel 0 Target 2 config */ 335 UCHAR Target03Config; /* 19 - Channel 0 Target 3 config */ 336 UCHAR Target04Config; /* 1A - Channel 0 Target 4 config */ 337 UCHAR Target05Config; /* 1B - Channel 0 Target 5 config */ 338 UCHAR Target06Config; /* 1C - Channel 0 Target 6 config */ 339 UCHAR Target07Config; /* 1D - Channel 0 Target 7 config */ 340 UCHAR Target08Config; /* 1E - Channel 0 Target 8 config */ 341 UCHAR Target09Config; /* 1F - Channel 0 Target 9 config */ 342 UCHAR Target0AConfig; /* 20 - Channel 0 Target A config */ 343 UCHAR Target0BConfig; /* 21 - Channel 0 Target B config */ 344 UCHAR Target0CConfig; /* 22 - Channel 0 Target C config */ 345 UCHAR Target0DConfig; /* 23 - Channel 0 Target D config */ 346 UCHAR Target0EConfig; /* 24 - Channel 0 Target E config */ 347 UCHAR Target0FConfig; /* 25 - Channel 0 Target F config */ 348 349 UCHAR SCSI1Id; /* 26 - Channel 1 SCSI ID */ 350 UCHAR SCSI1Config; /* 27 - Channel 1 SCSI configuration */ 351 UCHAR SCSI1MaxTags; /* 28 - Channel 1 Maximum tags */ 352 UCHAR SCSI1ResetTime; /* 29 - Channel 1 Reset recovering time */ 353 UCHAR ReservedforChannel1[2]; /* 2A - Reserved */ 354 355 /* ----SCSI target Structure ---- */ 356 /* from "CTRL-I SCSI device SetUp menu " */ 357 UCHAR Target10Config; /* 2C - Channel 1 Target 0 config */ 358 UCHAR Target11Config; /* 2D - Channel 1 Target 1 config */ 359 UCHAR Target12Config; /* 2E - Channel 1 Target 2 config */ 360 UCHAR Target13Config; /* 2F - Channel 1 Target 3 config */ 361 UCHAR Target14Config; /* 30 - Channel 1 Target 4 config */ 362 UCHAR Target15Config; /* 31 - Channel 1 Target 5 config */ 363 UCHAR Target16Config; /* 32 - Channel 1 Target 6 config */ 364 UCHAR Target17Config; /* 33 - Channel 1 Target 7 config */ 365 UCHAR Target18Config; /* 34 - Channel 1 Target 8 config */ 366 UCHAR Target19Config; /* 35 - Channel 1 Target 9 config */ 367 UCHAR Target1AConfig; /* 36 - Channel 1 Target A config */ 368 UCHAR Target1BConfig; /* 37 - Channel 1 Target B config */ 369 UCHAR Target1CConfig; /* 38 - Channel 1 Target C config */ 370 UCHAR Target1DConfig; /* 39 - Channel 1 Target D config */ 371 UCHAR Target1EConfig; /* 3A - Channel 1 Target E config */ 372 UCHAR Target1FConfig; /* 3B - Channel 1 Target F config */ 373 UCHAR reserved[3]; /* 3C - Reserved */ 374 /* ---------- CheckSum ---------- */ 375 UCHAR CheckSum; /* 3F - Checksum of NVRam */ 376 } NVRAM, *PNVRAM; 377 378 /* Bios Configuration for nvram->BIOSConfig1 */ 379 #define NBC_BIOSENABLE 0x01 /* BIOS enable */ 380 #define NBC_CDROM 0x02 /* Support bootable CDROM */ 381 #define NBC_REMOVABLE 0x04 /* Support removable drive */ 382 383 /* Bios Configuration for nvram->BIOSConfig2 */ 384 #define NBB_TARGET_MASK 0x0F /* Boot SCSI target ID number */ 385 #define NBB_CHANL_MASK 0xF0 /* Boot SCSI channel number */ 386 387 /* Bit definition for nvram->SCSIConfig */ 388 #define NCC_BUSRESET 0x01 /* Reset SCSI bus at power up */ 389 #define NCC_PARITYCHK 0x02 /* SCSI parity enable */ 390 #define NCC_LVDS 0x10 /* Enable LVDS */ 391 #define NCC_ACTTERM1 0x20 /* Enable active terminator 1 */ 392 #define NCC_ACTTERM2 0x40 /* Enable active terminator 2 */ 393 #define NCC_AUTOTERM 0x80 /* Enable auto termination */ 394 395 /* Bit definition for nvram->TargetxConfig */ 396 #define NTC_PERIOD 0x07 /* Maximum Sync. Speed */ 397 #define NTC_1GIGA 0x08 /* 255 head / 63 sectors (64/32) */ 398 #define NTC_NO_SYNC 0x10 /* NO SYNC. NEGO */ 399 #define NTC_NO_WIDESYNC 0x20 /* NO WIDE SYNC. NEGO */ 400 #define NTC_DISC_ENABLE 0x40 /* Enable SCSI disconnect */ 401 #define NTC_SPINUP 0x80 /* Start disk drive */ 402 403 /* Default NVRam values */ 404 #define NBC_DEFAULT (NBC_ENABLE) 405 #define NCC_DEFAULT (NCC_BUSRESET | NCC_AUTOTERM | NCC_PARITYCHK) 406 #define NCC_MAX_TAGS 0x20 /* Maximum tags per target */ 407 #define NCC_RESET_TIME 0x0A /* SCSI RESET recovering time */ 408 #define NTC_DEFAULT (NTC_1GIGA | NTC_NO_WIDESYNC | NTC_DISC_ENABLE) 409 410 #define ORC_RD(x,y) (UCHAR)(inb( (int)((ULONG)((ULONG)x+(UCHAR)y)) )) 411 #define ORC_RDWORD(x,y) (short)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) )) 412 #define ORC_RDLONG(x,y) (long)(inl((int)((ULONG)((ULONG)x+(UCHAR)y)) )) 413 414 #define ORC_WR( adr,data) outb( (UCHAR)(data), (int)(adr)) 415 #define ORC_WRSHORT(adr,data) outw( (UWORD)(data), (int)(adr)) 416 #define ORC_WRLONG( adr,data) outl( (ULONG)(data), (int)(adr)) 417