1 /* 2 * NCR 5380 generic driver routines. These should make it *trivial* 3 * to implement 5380 SCSI drivers under Linux with a non-trantor 4 * architecture. 5 * 6 * Note that these routines also work with NR53c400 family chips. 7 * 8 * Copyright 1993, Drew Eckhardt 9 * Visionary Computing 10 * (Unix and Linux consulting and custom programming) 11 * drew@colorado.edu 12 * +1 (303) 666-5836 13 * 14 * For more information, please consult 15 * 16 * NCR 5380 Family 17 * SCSI Protocol Controller 18 * Databook 19 * 20 * NCR Microelectronics 21 * 1635 Aeroplaza Drive 22 * Colorado Springs, CO 80916 23 * 1+ (719) 578-3400 24 * 1+ (800) 334-5454 25 */ 26 27 /* 28 * With contributions from Ray Van Tassle, Ingmar Baumgart, 29 * Ronald van Cuijlenborg, Alan Cox and others. 30 */ 31 32 /* Ported to Atari by Roman Hodek and others. */ 33 34 /* Adapted for the Sun 3 by Sam Creasey. */ 35 36 /* 37 * Design 38 * 39 * This is a generic 5380 driver. To use it on a different platform, 40 * one simply writes appropriate system specific macros (ie, data 41 * transfer - some PC's will use the I/O bus, 68K's must use 42 * memory mapped) and drops this file in their 'C' wrapper. 43 * 44 * As far as command queueing, two queues are maintained for 45 * each 5380 in the system - commands that haven't been issued yet, 46 * and commands that are currently executing. This means that an 47 * unlimited number of commands may be queued, letting 48 * more commands propagate from the higher driver levels giving higher 49 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, 50 * allowing multiple commands to propagate all the way to a SCSI-II device 51 * while a command is already executing. 52 * 53 * 54 * Issues specific to the NCR5380 : 55 * 56 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 57 * piece of hardware that requires you to sit in a loop polling for 58 * the REQ signal as long as you are connected. Some devices are 59 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect 60 * while doing long seek operations. [...] These 61 * broken devices are the exception rather than the rule and I'd rather 62 * spend my time optimizing for the normal case. 63 * 64 * Architecture : 65 * 66 * At the heart of the design is a coroutine, NCR5380_main, 67 * which is started from a workqueue for each NCR5380 host in the 68 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by 69 * removing the commands from the issue queue and calling 70 * NCR5380_select() if a nexus is not established. 71 * 72 * Once a nexus is established, the NCR5380_information_transfer() 73 * phase goes through the various phases as instructed by the target. 74 * if the target goes into MSG IN and sends a DISCONNECT message, 75 * the command structure is placed into the per instance disconnected 76 * queue, and NCR5380_main tries to find more work. If the target is 77 * idle for too long, the system will try to sleep. 78 * 79 * If a command has disconnected, eventually an interrupt will trigger, 80 * calling NCR5380_intr() which will in turn call NCR5380_reselect 81 * to reestablish a nexus. This will run main if necessary. 82 * 83 * On command termination, the done function will be called as 84 * appropriate. 85 * 86 * SCSI pointers are maintained in the SCp field of SCSI command 87 * structures, being initialized after the command is connected 88 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. 89 * Note that in violation of the standard, an implicit SAVE POINTERS operation 90 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. 91 */ 92 93 /* 94 * Using this file : 95 * This file a skeleton Linux SCSI driver for the NCR 5380 series 96 * of chips. To use it, you write an architecture specific functions 97 * and macros and include this file in your driver. 98 * 99 * These macros control options : 100 * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be 101 * defined. 102 * 103 * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically 104 * for commands that return with a CHECK CONDITION status. 105 * 106 * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential 107 * transceivers. 108 * 109 * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases. 110 * 111 * REAL_DMA - if defined, REAL DMA is used during the data transfer phases. 112 * 113 * These macros MUST be defined : 114 * 115 * NCR5380_read(register) - read from the specified register 116 * 117 * NCR5380_write(register, value) - write to the specific register 118 * 119 * NCR5380_implementation_fields - additional fields needed for this 120 * specific implementation of the NCR5380 121 * 122 * Either real DMA *or* pseudo DMA may be implemented 123 * 124 * NCR5380_dma_write_setup(instance, src, count) - initialize 125 * NCR5380_dma_read_setup(instance, dst, count) - initialize 126 * NCR5380_dma_residual(instance); - residual count 127 * 128 * The generic driver is initialized by calling NCR5380_init(instance), 129 * after setting the appropriate host specific fields and ID. If the 130 * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance, 131 * possible) function may be used. 132 */ 133 134 #ifndef NCR5380_io_delay 135 #define NCR5380_io_delay(x) 136 #endif 137 138 #ifndef NCR5380_acquire_dma_irq 139 #define NCR5380_acquire_dma_irq(x) (1) 140 #endif 141 142 #ifndef NCR5380_release_dma_irq 143 #define NCR5380_release_dma_irq(x) 144 #endif 145 146 static int do_abort(struct Scsi_Host *); 147 static void do_reset(struct Scsi_Host *); 148 149 /** 150 * initialize_SCp - init the scsi pointer field 151 * @cmd: command block to set up 152 * 153 * Set up the internal fields in the SCSI command. 154 */ 155 156 static inline void initialize_SCp(struct scsi_cmnd *cmd) 157 { 158 /* 159 * Initialize the Scsi Pointer field so that all of the commands in the 160 * various queues are valid. 161 */ 162 163 if (scsi_bufflen(cmd)) { 164 cmd->SCp.buffer = scsi_sglist(cmd); 165 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; 166 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 167 cmd->SCp.this_residual = cmd->SCp.buffer->length; 168 } else { 169 cmd->SCp.buffer = NULL; 170 cmd->SCp.buffers_residual = 0; 171 cmd->SCp.ptr = NULL; 172 cmd->SCp.this_residual = 0; 173 } 174 175 cmd->SCp.Status = 0; 176 cmd->SCp.Message = 0; 177 } 178 179 /** 180 * NCR5380_poll_politely2 - wait for two chip register values 181 * @instance: controller to poll 182 * @reg1: 5380 register to poll 183 * @bit1: Bitmask to check 184 * @val1: Expected value 185 * @reg2: Second 5380 register to poll 186 * @bit2: Second bitmask to check 187 * @val2: Second expected value 188 * @wait: Time-out in jiffies 189 * 190 * Polls the chip in a reasonably efficient manner waiting for an 191 * event to occur. After a short quick poll we begin to yield the CPU 192 * (if possible). In irq contexts the time-out is arbitrarily limited. 193 * Callers may hold locks as long as they are held in irq mode. 194 * 195 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. 196 */ 197 198 static int NCR5380_poll_politely2(struct Scsi_Host *instance, 199 int reg1, int bit1, int val1, 200 int reg2, int bit2, int val2, int wait) 201 { 202 struct NCR5380_hostdata *hostdata = shost_priv(instance); 203 unsigned long deadline = jiffies + wait; 204 unsigned long n; 205 206 /* Busy-wait for up to 10 ms */ 207 n = min(10000U, jiffies_to_usecs(wait)); 208 n *= hostdata->accesses_per_ms; 209 n /= 2000; 210 do { 211 if ((NCR5380_read(reg1) & bit1) == val1) 212 return 0; 213 if ((NCR5380_read(reg2) & bit2) == val2) 214 return 0; 215 cpu_relax(); 216 } while (n--); 217 218 if (irqs_disabled() || in_interrupt()) 219 return -ETIMEDOUT; 220 221 /* Repeatedly sleep for 1 ms until deadline */ 222 while (time_is_after_jiffies(deadline)) { 223 schedule_timeout_uninterruptible(1); 224 if ((NCR5380_read(reg1) & bit1) == val1) 225 return 0; 226 if ((NCR5380_read(reg2) & bit2) == val2) 227 return 0; 228 } 229 230 return -ETIMEDOUT; 231 } 232 233 static inline int NCR5380_poll_politely(struct Scsi_Host *instance, 234 int reg, int bit, int val, int wait) 235 { 236 return NCR5380_poll_politely2(instance, reg, bit, val, 237 reg, bit, val, wait); 238 } 239 240 #if NDEBUG 241 static struct { 242 unsigned char mask; 243 const char *name; 244 } signals[] = { 245 {SR_DBP, "PARITY"}, 246 {SR_RST, "RST"}, 247 {SR_BSY, "BSY"}, 248 {SR_REQ, "REQ"}, 249 {SR_MSG, "MSG"}, 250 {SR_CD, "CD"}, 251 {SR_IO, "IO"}, 252 {SR_SEL, "SEL"}, 253 {0, NULL} 254 }, 255 basrs[] = { 256 {BASR_END_DMA_TRANSFER, "END OF DMA"}, 257 {BASR_DRQ, "DRQ"}, 258 {BASR_PARITY_ERROR, "PARITY ERROR"}, 259 {BASR_IRQ, "IRQ"}, 260 {BASR_PHASE_MATCH, "PHASE MATCH"}, 261 {BASR_BUSY_ERROR, "BUSY ERROR"}, 262 {BASR_ATN, "ATN"}, 263 {BASR_ACK, "ACK"}, 264 {0, NULL} 265 }, 266 icrs[] = { 267 {ICR_ASSERT_RST, "ASSERT RST"}, 268 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, 269 {ICR_ARBITRATION_LOST, "LOST ARB."}, 270 {ICR_ASSERT_ACK, "ASSERT ACK"}, 271 {ICR_ASSERT_BSY, "ASSERT BSY"}, 272 {ICR_ASSERT_SEL, "ASSERT SEL"}, 273 {ICR_ASSERT_ATN, "ASSERT ATN"}, 274 {ICR_ASSERT_DATA, "ASSERT DATA"}, 275 {0, NULL} 276 }, 277 mrs[] = { 278 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, 279 {MR_TARGET, "TARGET"}, 280 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, 281 {MR_ENABLE_PAR_INTR, "PARITY INTR"}, 282 {MR_ENABLE_EOP_INTR, "EOP INTR"}, 283 {MR_MONITOR_BSY, "MONITOR BSY"}, 284 {MR_DMA_MODE, "DMA MODE"}, 285 {MR_ARBITRATE, "ARBITRATE"}, 286 {0, NULL} 287 }; 288 289 /** 290 * NCR5380_print - print scsi bus signals 291 * @instance: adapter state to dump 292 * 293 * Print the SCSI bus signals for debugging purposes 294 */ 295 296 static void NCR5380_print(struct Scsi_Host *instance) 297 { 298 unsigned char status, data, basr, mr, icr, i; 299 300 data = NCR5380_read(CURRENT_SCSI_DATA_REG); 301 status = NCR5380_read(STATUS_REG); 302 mr = NCR5380_read(MODE_REG); 303 icr = NCR5380_read(INITIATOR_COMMAND_REG); 304 basr = NCR5380_read(BUS_AND_STATUS_REG); 305 306 printk(KERN_DEBUG "SR = 0x%02x : ", status); 307 for (i = 0; signals[i].mask; ++i) 308 if (status & signals[i].mask) 309 printk(KERN_CONT "%s, ", signals[i].name); 310 printk(KERN_CONT "\nBASR = 0x%02x : ", basr); 311 for (i = 0; basrs[i].mask; ++i) 312 if (basr & basrs[i].mask) 313 printk(KERN_CONT "%s, ", basrs[i].name); 314 printk(KERN_CONT "\nICR = 0x%02x : ", icr); 315 for (i = 0; icrs[i].mask; ++i) 316 if (icr & icrs[i].mask) 317 printk(KERN_CONT "%s, ", icrs[i].name); 318 printk(KERN_CONT "\nMR = 0x%02x : ", mr); 319 for (i = 0; mrs[i].mask; ++i) 320 if (mr & mrs[i].mask) 321 printk(KERN_CONT "%s, ", mrs[i].name); 322 printk(KERN_CONT "\n"); 323 } 324 325 static struct { 326 unsigned char value; 327 const char *name; 328 } phases[] = { 329 {PHASE_DATAOUT, "DATAOUT"}, 330 {PHASE_DATAIN, "DATAIN"}, 331 {PHASE_CMDOUT, "CMDOUT"}, 332 {PHASE_STATIN, "STATIN"}, 333 {PHASE_MSGOUT, "MSGOUT"}, 334 {PHASE_MSGIN, "MSGIN"}, 335 {PHASE_UNKNOWN, "UNKNOWN"} 336 }; 337 338 /** 339 * NCR5380_print_phase - show SCSI phase 340 * @instance: adapter to dump 341 * 342 * Print the current SCSI phase for debugging purposes 343 */ 344 345 static void NCR5380_print_phase(struct Scsi_Host *instance) 346 { 347 unsigned char status; 348 int i; 349 350 status = NCR5380_read(STATUS_REG); 351 if (!(status & SR_REQ)) 352 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); 353 else { 354 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && 355 (phases[i].value != (status & PHASE_MASK)); ++i) 356 ; 357 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); 358 } 359 } 360 #endif 361 362 363 static int probe_irq __initdata; 364 365 /** 366 * probe_intr - helper for IRQ autoprobe 367 * @irq: interrupt number 368 * @dev_id: unused 369 * @regs: unused 370 * 371 * Set a flag to indicate the IRQ in question was received. This is 372 * used by the IRQ probe code. 373 */ 374 375 static irqreturn_t __init probe_intr(int irq, void *dev_id) 376 { 377 probe_irq = irq; 378 return IRQ_HANDLED; 379 } 380 381 /** 382 * NCR5380_probe_irq - find the IRQ of an NCR5380 383 * @instance: NCR5380 controller 384 * @possible: bitmask of ISA IRQ lines 385 * 386 * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ 387 * and then looking to see what interrupt actually turned up. 388 */ 389 390 static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance, 391 int possible) 392 { 393 struct NCR5380_hostdata *hostdata = shost_priv(instance); 394 unsigned long timeout; 395 int trying_irqs, i, mask; 396 397 for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1) 398 if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0)) 399 trying_irqs |= mask; 400 401 timeout = jiffies + msecs_to_jiffies(250); 402 probe_irq = NO_IRQ; 403 404 /* 405 * A interrupt is triggered whenever BSY = false, SEL = true 406 * and a bit set in the SELECT_ENABLE_REG is asserted on the 407 * SCSI bus. 408 * 409 * Note that the bus is only driven when the phase control signals 410 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that 411 * to zero. 412 */ 413 414 NCR5380_write(TARGET_COMMAND_REG, 0); 415 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 416 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 417 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL); 418 419 while (probe_irq == NO_IRQ && time_before(jiffies, timeout)) 420 schedule_timeout_uninterruptible(1); 421 422 NCR5380_write(SELECT_ENABLE_REG, 0); 423 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 424 425 for (i = 1, mask = 2; i < 16; ++i, mask <<= 1) 426 if (trying_irqs & mask) 427 free_irq(i, NULL); 428 429 return probe_irq; 430 } 431 432 /** 433 * NCR58380_info - report driver and host information 434 * @instance: relevant scsi host instance 435 * 436 * For use as the host template info() handler. 437 */ 438 439 static const char *NCR5380_info(struct Scsi_Host *instance) 440 { 441 struct NCR5380_hostdata *hostdata = shost_priv(instance); 442 443 return hostdata->info; 444 } 445 446 static void prepare_info(struct Scsi_Host *instance) 447 { 448 struct NCR5380_hostdata *hostdata = shost_priv(instance); 449 450 snprintf(hostdata->info, sizeof(hostdata->info), 451 "%s, io_port 0x%lx, n_io_port %d, " 452 "base 0x%lx, irq %d, " 453 "can_queue %d, cmd_per_lun %d, " 454 "sg_tablesize %d, this_id %d, " 455 "flags { %s%s%s}, " 456 "options { %s} ", 457 instance->hostt->name, instance->io_port, instance->n_io_port, 458 instance->base, instance->irq, 459 instance->can_queue, instance->cmd_per_lun, 460 instance->sg_tablesize, instance->this_id, 461 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", 462 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", 463 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : "", 464 #ifdef DIFFERENTIAL 465 "DIFFERENTIAL " 466 #endif 467 #ifdef PARITY 468 "PARITY " 469 #endif 470 ""); 471 } 472 473 /** 474 * NCR5380_init - initialise an NCR5380 475 * @instance: adapter to configure 476 * @flags: control flags 477 * 478 * Initializes *instance and corresponding 5380 chip, 479 * with flags OR'd into the initial flags value. 480 * 481 * Notes : I assume that the host, hostno, and id bits have been 482 * set correctly. I don't care about the irq and other fields. 483 * 484 * Returns 0 for success 485 */ 486 487 static int NCR5380_init(struct Scsi_Host *instance, int flags) 488 { 489 struct NCR5380_hostdata *hostdata = shost_priv(instance); 490 int i; 491 unsigned long deadline; 492 493 instance->max_lun = 7; 494 495 hostdata->host = instance; 496 hostdata->id_mask = 1 << instance->this_id; 497 hostdata->id_higher_mask = 0; 498 for (i = hostdata->id_mask; i <= 0x80; i <<= 1) 499 if (i > hostdata->id_mask) 500 hostdata->id_higher_mask |= i; 501 for (i = 0; i < 8; ++i) 502 hostdata->busy[i] = 0; 503 hostdata->dma_len = 0; 504 505 spin_lock_init(&hostdata->lock); 506 hostdata->connected = NULL; 507 hostdata->sensing = NULL; 508 INIT_LIST_HEAD(&hostdata->autosense); 509 INIT_LIST_HEAD(&hostdata->unissued); 510 INIT_LIST_HEAD(&hostdata->disconnected); 511 512 hostdata->flags = flags; 513 514 INIT_WORK(&hostdata->main_task, NCR5380_main); 515 hostdata->work_q = alloc_workqueue("ncr5380_%d", 516 WQ_UNBOUND | WQ_MEM_RECLAIM, 517 1, instance->host_no); 518 if (!hostdata->work_q) 519 return -ENOMEM; 520 521 prepare_info(instance); 522 523 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 524 NCR5380_write(MODE_REG, MR_BASE); 525 NCR5380_write(TARGET_COMMAND_REG, 0); 526 NCR5380_write(SELECT_ENABLE_REG, 0); 527 528 /* Calibrate register polling loop */ 529 i = 0; 530 deadline = jiffies + 1; 531 do { 532 cpu_relax(); 533 } while (time_is_after_jiffies(deadline)); 534 deadline += msecs_to_jiffies(256); 535 do { 536 NCR5380_read(STATUS_REG); 537 ++i; 538 cpu_relax(); 539 } while (time_is_after_jiffies(deadline)); 540 hostdata->accesses_per_ms = i / 256; 541 542 return 0; 543 } 544 545 /** 546 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. 547 * @instance: adapter to check 548 * 549 * If the system crashed, it may have crashed with a connected target and 550 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the 551 * currently established nexus, which we know nothing about. Failing that 552 * do a bus reset. 553 * 554 * Note that a bus reset will cause the chip to assert IRQ. 555 * 556 * Returns 0 if successful, otherwise -ENXIO. 557 */ 558 559 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) 560 { 561 struct NCR5380_hostdata *hostdata = shost_priv(instance); 562 int pass; 563 564 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { 565 switch (pass) { 566 case 1: 567 case 3: 568 case 5: 569 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); 570 NCR5380_poll_politely(instance, 571 STATUS_REG, SR_BSY, 0, 5 * HZ); 572 break; 573 case 2: 574 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); 575 do_abort(instance); 576 break; 577 case 4: 578 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); 579 do_reset(instance); 580 /* Wait after a reset; the SCSI standard calls for 581 * 250ms, we wait 500ms to be on the safe side. 582 * But some Toshiba CD-ROMs need ten times that. 583 */ 584 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 585 msleep(2500); 586 else 587 msleep(500); 588 break; 589 case 6: 590 shost_printk(KERN_ERR, instance, "bus locked solid\n"); 591 return -ENXIO; 592 } 593 } 594 return 0; 595 } 596 597 /** 598 * NCR5380_exit - remove an NCR5380 599 * @instance: adapter to remove 600 * 601 * Assumes that no more work can be queued (e.g. by NCR5380_intr). 602 */ 603 604 static void NCR5380_exit(struct Scsi_Host *instance) 605 { 606 struct NCR5380_hostdata *hostdata = shost_priv(instance); 607 608 cancel_work_sync(&hostdata->main_task); 609 destroy_workqueue(hostdata->work_q); 610 } 611 612 /** 613 * complete_cmd - finish processing a command and return it to the SCSI ML 614 * @instance: the host instance 615 * @cmd: command to complete 616 */ 617 618 static void complete_cmd(struct Scsi_Host *instance, 619 struct scsi_cmnd *cmd) 620 { 621 struct NCR5380_hostdata *hostdata = shost_priv(instance); 622 623 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); 624 625 if (hostdata->sensing == cmd) { 626 /* Autosense processing ends here */ 627 if ((cmd->result & 0xff) != SAM_STAT_GOOD) { 628 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 629 set_host_byte(cmd, DID_ERROR); 630 } else 631 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 632 hostdata->sensing = NULL; 633 } 634 635 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 636 637 cmd->scsi_done(cmd); 638 } 639 640 /** 641 * NCR5380_queue_command - queue a command 642 * @instance: the relevant SCSI adapter 643 * @cmd: SCSI command 644 * 645 * cmd is added to the per-instance issue queue, with minor 646 * twiddling done to the host specific fields of cmd. If the 647 * main coroutine is not running, it is restarted. 648 */ 649 650 static int NCR5380_queue_command(struct Scsi_Host *instance, 651 struct scsi_cmnd *cmd) 652 { 653 struct NCR5380_hostdata *hostdata = shost_priv(instance); 654 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 655 unsigned long flags; 656 657 #if (NDEBUG & NDEBUG_NO_WRITE) 658 switch (cmd->cmnd[0]) { 659 case WRITE_6: 660 case WRITE_10: 661 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); 662 cmd->result = (DID_ERROR << 16); 663 cmd->scsi_done(cmd); 664 return 0; 665 } 666 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ 667 668 cmd->result = 0; 669 670 if (!NCR5380_acquire_dma_irq(instance)) 671 return SCSI_MLQUEUE_HOST_BUSY; 672 673 spin_lock_irqsave(&hostdata->lock, flags); 674 675 /* 676 * Insert the cmd into the issue queue. Note that REQUEST SENSE 677 * commands are added to the head of the queue since any command will 678 * clear the contingent allegiance condition that exists and the 679 * sense data is only guaranteed to be valid while the condition exists. 680 */ 681 682 if (cmd->cmnd[0] == REQUEST_SENSE) 683 list_add(&ncmd->list, &hostdata->unissued); 684 else 685 list_add_tail(&ncmd->list, &hostdata->unissued); 686 687 spin_unlock_irqrestore(&hostdata->lock, flags); 688 689 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", 690 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); 691 692 /* Kick off command processing */ 693 queue_work(hostdata->work_q, &hostdata->main_task); 694 return 0; 695 } 696 697 static inline void maybe_release_dma_irq(struct Scsi_Host *instance) 698 { 699 struct NCR5380_hostdata *hostdata = shost_priv(instance); 700 701 /* Caller does the locking needed to set & test these data atomically */ 702 if (list_empty(&hostdata->disconnected) && 703 list_empty(&hostdata->unissued) && 704 list_empty(&hostdata->autosense) && 705 !hostdata->connected && 706 !hostdata->selecting) 707 NCR5380_release_dma_irq(instance); 708 } 709 710 /** 711 * dequeue_next_cmd - dequeue a command for processing 712 * @instance: the scsi host instance 713 * 714 * Priority is given to commands on the autosense queue. These commands 715 * need autosense because of a CHECK CONDITION result. 716 * 717 * Returns a command pointer if a command is found for a target that is 718 * not already busy. Otherwise returns NULL. 719 */ 720 721 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) 722 { 723 struct NCR5380_hostdata *hostdata = shost_priv(instance); 724 struct NCR5380_cmd *ncmd; 725 struct scsi_cmnd *cmd; 726 727 if (hostdata->sensing || list_empty(&hostdata->autosense)) { 728 list_for_each_entry(ncmd, &hostdata->unissued, list) { 729 cmd = NCR5380_to_scmd(ncmd); 730 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", 731 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); 732 733 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { 734 list_del(&ncmd->list); 735 dsprintk(NDEBUG_QUEUES, instance, 736 "dequeue: removed %p from issue queue\n", cmd); 737 return cmd; 738 } 739 } 740 } else { 741 /* Autosense processing begins here */ 742 ncmd = list_first_entry(&hostdata->autosense, 743 struct NCR5380_cmd, list); 744 list_del(&ncmd->list); 745 cmd = NCR5380_to_scmd(ncmd); 746 dsprintk(NDEBUG_QUEUES, instance, 747 "dequeue: removed %p from autosense queue\n", cmd); 748 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); 749 hostdata->sensing = cmd; 750 return cmd; 751 } 752 return NULL; 753 } 754 755 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 756 { 757 struct NCR5380_hostdata *hostdata = shost_priv(instance); 758 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 759 760 if (hostdata->sensing == cmd) { 761 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 762 list_add(&ncmd->list, &hostdata->autosense); 763 hostdata->sensing = NULL; 764 } else 765 list_add(&ncmd->list, &hostdata->unissued); 766 } 767 768 /** 769 * NCR5380_main - NCR state machines 770 * 771 * NCR5380_main is a coroutine that runs as long as more work can 772 * be done on the NCR5380 host adapters in a system. Both 773 * NCR5380_queue_command() and NCR5380_intr() will try to start it 774 * in case it is not running. 775 */ 776 777 static void NCR5380_main(struct work_struct *work) 778 { 779 struct NCR5380_hostdata *hostdata = 780 container_of(work, struct NCR5380_hostdata, main_task); 781 struct Scsi_Host *instance = hostdata->host; 782 int done; 783 784 do { 785 done = 1; 786 787 spin_lock_irq(&hostdata->lock); 788 while (!hostdata->connected && !hostdata->selecting) { 789 struct scsi_cmnd *cmd = dequeue_next_cmd(instance); 790 791 if (!cmd) 792 break; 793 794 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); 795 796 /* 797 * Attempt to establish an I_T_L nexus here. 798 * On success, instance->hostdata->connected is set. 799 * On failure, we must add the command back to the 800 * issue queue so we can keep trying. 801 */ 802 /* 803 * REQUEST SENSE commands are issued without tagged 804 * queueing, even on SCSI-II devices because the 805 * contingent allegiance condition exists for the 806 * entire unit. 807 */ 808 809 if (!NCR5380_select(instance, cmd)) { 810 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); 811 maybe_release_dma_irq(instance); 812 } else { 813 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, 814 "main: select failed, returning %p to queue\n", cmd); 815 requeue_cmd(instance, cmd); 816 } 817 } 818 if (hostdata->connected && !hostdata->dma_len) { 819 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); 820 NCR5380_information_transfer(instance); 821 done = 0; 822 } 823 spin_unlock_irq(&hostdata->lock); 824 if (!done) 825 cond_resched(); 826 } while (!done); 827 } 828 829 /* 830 * NCR5380_dma_complete - finish DMA transfer 831 * @instance: the scsi host instance 832 * 833 * Called by the interrupt handler when DMA finishes or a phase 834 * mismatch occurs (which would end the DMA transfer). 835 */ 836 837 static void NCR5380_dma_complete(struct Scsi_Host *instance) 838 { 839 struct NCR5380_hostdata *hostdata = shost_priv(instance); 840 int transferred; 841 unsigned char **data; 842 int *count; 843 int saved_data = 0, overrun = 0; 844 unsigned char p; 845 846 if (hostdata->read_overruns) { 847 p = hostdata->connected->SCp.phase; 848 if (p & SR_IO) { 849 udelay(10); 850 if ((NCR5380_read(BUS_AND_STATUS_REG) & 851 (BASR_PHASE_MATCH | BASR_ACK)) == 852 (BASR_PHASE_MATCH | BASR_ACK)) { 853 saved_data = NCR5380_read(INPUT_DATA_REG); 854 overrun = 1; 855 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); 856 } 857 } 858 } 859 860 #ifdef CONFIG_SUN3 861 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { 862 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", 863 instance->host_no); 864 BUG(); 865 } 866 867 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == 868 (BASR_PHASE_MATCH | BASR_ACK)) { 869 pr_err("scsi%d: BASR %02x\n", instance->host_no, 870 NCR5380_read(BUS_AND_STATUS_REG)); 871 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", 872 instance->host_no); 873 BUG(); 874 } 875 #endif 876 877 NCR5380_write(MODE_REG, MR_BASE); 878 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 879 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 880 881 transferred = hostdata->dma_len - NCR5380_dma_residual(instance); 882 hostdata->dma_len = 0; 883 884 data = (unsigned char **)&hostdata->connected->SCp.ptr; 885 count = &hostdata->connected->SCp.this_residual; 886 *data += transferred; 887 *count -= transferred; 888 889 if (hostdata->read_overruns) { 890 int cnt, toPIO; 891 892 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { 893 cnt = toPIO = hostdata->read_overruns; 894 if (overrun) { 895 dsprintk(NDEBUG_DMA, instance, 896 "Got an input overrun, using saved byte\n"); 897 *(*data)++ = saved_data; 898 (*count)--; 899 cnt--; 900 toPIO--; 901 } 902 if (toPIO > 0) { 903 dsprintk(NDEBUG_DMA, instance, 904 "Doing %d byte PIO to 0x%p\n", cnt, *data); 905 NCR5380_transfer_pio(instance, &p, &cnt, data); 906 *count -= toPIO - cnt; 907 } 908 } 909 } 910 } 911 912 /** 913 * NCR5380_intr - generic NCR5380 irq handler 914 * @irq: interrupt number 915 * @dev_id: device info 916 * 917 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses 918 * from the disconnected queue, and restarting NCR5380_main() 919 * as required. 920 * 921 * The chip can assert IRQ in any of six different conditions. The IRQ flag 922 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). 923 * Three of these six conditions are latched in the Bus and Status Register: 924 * - End of DMA (cleared by ending DMA Mode) 925 * - Parity error (cleared by reading RPIR) 926 * - Loss of BSY (cleared by reading RPIR) 927 * Two conditions have flag bits that are not latched: 928 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) 929 * - Bus reset (non-maskable) 930 * The remaining condition has no flag bit at all: 931 * - Selection/reselection 932 * 933 * Hence, establishing the cause(s) of any interrupt is partly guesswork. 934 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor 935 * claimed that "the design of the [DP8490] interrupt logic ensures 936 * interrupts will not be lost (they can be on the DP5380)." 937 * The L5380/53C80 datasheet from LOGIC Devices has more details. 938 * 939 * Checking for bus reset by reading RST is futile because of interrupt 940 * latency, but a bus reset will reset chip logic. Checking for parity error 941 * is unnecessary because that interrupt is never enabled. A Loss of BSY 942 * condition will clear DMA Mode. We can tell when this occurs because the 943 * the Busy Monitor interrupt is enabled together with DMA Mode. 944 */ 945 946 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) 947 { 948 struct Scsi_Host *instance = dev_id; 949 struct NCR5380_hostdata *hostdata = shost_priv(instance); 950 int handled = 0; 951 unsigned char basr; 952 unsigned long flags; 953 954 spin_lock_irqsave(&hostdata->lock, flags); 955 956 basr = NCR5380_read(BUS_AND_STATUS_REG); 957 if (basr & BASR_IRQ) { 958 unsigned char mr = NCR5380_read(MODE_REG); 959 unsigned char sr = NCR5380_read(STATUS_REG); 960 961 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", 962 irq, basr, sr, mr); 963 964 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { 965 /* Probably End of DMA, Phase Mismatch or Loss of BSY. 966 * We ack IRQ after clearing Mode Register. Workarounds 967 * for End of DMA errata need to happen in DMA Mode. 968 */ 969 970 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); 971 972 if (hostdata->connected) { 973 NCR5380_dma_complete(instance); 974 queue_work(hostdata->work_q, &hostdata->main_task); 975 } else { 976 NCR5380_write(MODE_REG, MR_BASE); 977 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 978 } 979 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && 980 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { 981 /* Probably reselected */ 982 NCR5380_write(SELECT_ENABLE_REG, 0); 983 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 984 985 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); 986 987 if (!hostdata->connected) { 988 NCR5380_reselect(instance); 989 queue_work(hostdata->work_q, &hostdata->main_task); 990 } 991 if (!hostdata->connected) 992 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 993 } else { 994 /* Probably Bus Reset */ 995 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 996 997 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); 998 #ifdef SUN3_SCSI_VME 999 dregs->csr |= CSR_DMA_ENABLE; 1000 #endif 1001 } 1002 handled = 1; 1003 } else { 1004 shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n"); 1005 #ifdef SUN3_SCSI_VME 1006 dregs->csr |= CSR_DMA_ENABLE; 1007 #endif 1008 } 1009 1010 spin_unlock_irqrestore(&hostdata->lock, flags); 1011 1012 return IRQ_RETVAL(handled); 1013 } 1014 1015 /* 1016 * Function : int NCR5380_select(struct Scsi_Host *instance, 1017 * struct scsi_cmnd *cmd) 1018 * 1019 * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command, 1020 * including ARBITRATION, SELECTION, and initial message out for 1021 * IDENTIFY and queue messages. 1022 * 1023 * Inputs : instance - instantiation of the 5380 driver on which this 1024 * target lives, cmd - SCSI command to execute. 1025 * 1026 * Returns cmd if selection failed but should be retried, 1027 * NULL if selection failed and should not be retried, or 1028 * NULL if selection succeeded (hostdata->connected == cmd). 1029 * 1030 * Side effects : 1031 * If bus busy, arbitration failed, etc, NCR5380_select() will exit 1032 * with registers as they should have been on entry - ie 1033 * SELECT_ENABLE will be set appropriately, the NCR5380 1034 * will cease to drive any SCSI bus signals. 1035 * 1036 * If successful : I_T_L or I_T_L_Q nexus will be established, 1037 * instance->connected will be set to cmd. 1038 * SELECT interrupt will be disabled. 1039 * 1040 * If failed (no target) : cmd->scsi_done() will be called, and the 1041 * cmd->result host byte set to DID_BAD_TARGET. 1042 */ 1043 1044 static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance, 1045 struct scsi_cmnd *cmd) 1046 { 1047 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1048 unsigned char tmp[3], phase; 1049 unsigned char *data; 1050 int len; 1051 int err; 1052 1053 NCR5380_dprint(NDEBUG_ARBITRATION, instance); 1054 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", 1055 instance->this_id); 1056 1057 /* 1058 * Arbitration and selection phases are slow and involve dropping the 1059 * lock, so we have to watch out for EH. An exception handler may 1060 * change 'selecting' to NULL. This function will then return NULL 1061 * so that the caller will forget about 'cmd'. (During information 1062 * transfer phases, EH may change 'connected' to NULL.) 1063 */ 1064 hostdata->selecting = cmd; 1065 1066 /* 1067 * Set the phase bits to 0, otherwise the NCR5380 won't drive the 1068 * data bus during SELECTION. 1069 */ 1070 1071 NCR5380_write(TARGET_COMMAND_REG, 0); 1072 1073 /* 1074 * Start arbitration. 1075 */ 1076 1077 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 1078 NCR5380_write(MODE_REG, MR_ARBITRATE); 1079 1080 /* The chip now waits for BUS FREE phase. Then after the 800 ns 1081 * Bus Free Delay, arbitration will begin. 1082 */ 1083 1084 spin_unlock_irq(&hostdata->lock); 1085 err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0, 1086 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, 1087 ICR_ARBITRATION_PROGRESS, HZ); 1088 spin_lock_irq(&hostdata->lock); 1089 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { 1090 /* Reselection interrupt */ 1091 goto out; 1092 } 1093 if (!hostdata->selecting) { 1094 /* Command was aborted */ 1095 NCR5380_write(MODE_REG, MR_BASE); 1096 goto out; 1097 } 1098 if (err < 0) { 1099 NCR5380_write(MODE_REG, MR_BASE); 1100 shost_printk(KERN_ERR, instance, 1101 "select: arbitration timeout\n"); 1102 goto out; 1103 } 1104 spin_unlock_irq(&hostdata->lock); 1105 1106 /* The SCSI-2 arbitration delay is 2.4 us */ 1107 udelay(3); 1108 1109 /* Check for lost arbitration */ 1110 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || 1111 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || 1112 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { 1113 NCR5380_write(MODE_REG, MR_BASE); 1114 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); 1115 spin_lock_irq(&hostdata->lock); 1116 goto out; 1117 } 1118 1119 /* After/during arbitration, BSY should be asserted. 1120 * IBM DPES-31080 Version S31Q works now 1121 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) 1122 */ 1123 NCR5380_write(INITIATOR_COMMAND_REG, 1124 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); 1125 1126 /* 1127 * Again, bus clear + bus settle time is 1.2us, however, this is 1128 * a minimum so we'll udelay ceil(1.2) 1129 */ 1130 1131 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 1132 udelay(15); 1133 else 1134 udelay(2); 1135 1136 spin_lock_irq(&hostdata->lock); 1137 1138 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ 1139 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) 1140 goto out; 1141 1142 if (!hostdata->selecting) { 1143 NCR5380_write(MODE_REG, MR_BASE); 1144 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1145 goto out; 1146 } 1147 1148 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); 1149 1150 /* 1151 * Now that we have won arbitration, start Selection process, asserting 1152 * the host and target ID's on the SCSI bus. 1153 */ 1154 1155 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); 1156 1157 /* 1158 * Raise ATN while SEL is true before BSY goes false from arbitration, 1159 * since this is the only way to guarantee that we'll get a MESSAGE OUT 1160 * phase immediately after selection. 1161 */ 1162 1163 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | 1164 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1165 NCR5380_write(MODE_REG, MR_BASE); 1166 1167 /* 1168 * Reselect interrupts must be turned off prior to the dropping of BSY, 1169 * otherwise we will trigger an interrupt. 1170 */ 1171 NCR5380_write(SELECT_ENABLE_REG, 0); 1172 1173 spin_unlock_irq(&hostdata->lock); 1174 1175 /* 1176 * The initiator shall then wait at least two deskew delays and release 1177 * the BSY signal. 1178 */ 1179 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ 1180 1181 /* Reset BSY */ 1182 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | 1183 ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1184 1185 /* 1186 * Something weird happens when we cease to drive BSY - looks 1187 * like the board/chip is letting us do another read before the 1188 * appropriate propagation delay has expired, and we're confusing 1189 * a BSY signal from ourselves as the target's response to SELECTION. 1190 * 1191 * A small delay (the 'C++' frontend breaks the pipeline with an 1192 * unnecessary jump, making it work on my 386-33/Trantor T128, the 1193 * tighter 'C' code breaks and requires this) solves the problem - 1194 * the 1 us delay is arbitrary, and only used because this delay will 1195 * be the same on other platforms and since it works here, it should 1196 * work there. 1197 * 1198 * wingel suggests that this could be due to failing to wait 1199 * one deskew delay. 1200 */ 1201 1202 udelay(1); 1203 1204 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); 1205 1206 /* 1207 * The SCSI specification calls for a 250 ms timeout for the actual 1208 * selection. 1209 */ 1210 1211 err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY, 1212 msecs_to_jiffies(250)); 1213 1214 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { 1215 spin_lock_irq(&hostdata->lock); 1216 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1217 NCR5380_reselect(instance); 1218 if (!hostdata->connected) 1219 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1220 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); 1221 goto out; 1222 } 1223 1224 if (err < 0) { 1225 spin_lock_irq(&hostdata->lock); 1226 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1227 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1228 /* Can't touch cmd if it has been reclaimed by the scsi ML */ 1229 if (hostdata->selecting) { 1230 cmd->result = DID_BAD_TARGET << 16; 1231 complete_cmd(instance, cmd); 1232 dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n"); 1233 cmd = NULL; 1234 } 1235 goto out; 1236 } 1237 1238 /* 1239 * No less than two deskew delays after the initiator detects the 1240 * BSY signal is true, it shall release the SEL signal and may 1241 * change the DATA BUS. -wingel 1242 */ 1243 1244 udelay(1); 1245 1246 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1247 1248 /* 1249 * Since we followed the SCSI spec, and raised ATN while SEL 1250 * was true but before BSY was false during selection, the information 1251 * transfer phase should be a MESSAGE OUT phase so that we can send the 1252 * IDENTIFY message. 1253 */ 1254 1255 /* Wait for start of REQ/ACK handshake */ 1256 1257 err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); 1258 spin_lock_irq(&hostdata->lock); 1259 if (err < 0) { 1260 shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); 1261 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1262 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1263 goto out; 1264 } 1265 if (!hostdata->selecting) { 1266 do_abort(instance); 1267 goto out; 1268 } 1269 1270 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", 1271 scmd_id(cmd)); 1272 tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun); 1273 1274 len = 1; 1275 data = tmp; 1276 phase = PHASE_MSGOUT; 1277 NCR5380_transfer_pio(instance, &phase, &len, &data); 1278 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); 1279 /* XXX need to handle errors here */ 1280 1281 hostdata->connected = cmd; 1282 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; 1283 1284 #ifdef SUN3_SCSI_VME 1285 dregs->csr |= CSR_INTR; 1286 #endif 1287 1288 initialize_SCp(cmd); 1289 1290 cmd = NULL; 1291 1292 out: 1293 if (!hostdata->selecting) 1294 return NULL; 1295 hostdata->selecting = NULL; 1296 return cmd; 1297 } 1298 1299 /* 1300 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, 1301 * unsigned char *phase, int *count, unsigned char **data) 1302 * 1303 * Purpose : transfers data in given phase using polled I/O 1304 * 1305 * Inputs : instance - instance of driver, *phase - pointer to 1306 * what phase is expected, *count - pointer to number of 1307 * bytes to transfer, **data - pointer to data pointer. 1308 * 1309 * Returns : -1 when different phase is entered without transferring 1310 * maximum number of bytes, 0 if all bytes are transferred or exit 1311 * is in same phase. 1312 * 1313 * Also, *phase, *count, *data are modified in place. 1314 * 1315 * XXX Note : handling for bus free may be useful. 1316 */ 1317 1318 /* 1319 * Note : this code is not as quick as it could be, however it 1320 * IS 100% reliable, and for the actual data transfer where speed 1321 * counts, we will always do a pseudo DMA or DMA transfer. 1322 */ 1323 1324 static int NCR5380_transfer_pio(struct Scsi_Host *instance, 1325 unsigned char *phase, int *count, 1326 unsigned char **data) 1327 { 1328 unsigned char p = *phase, tmp; 1329 int c = *count; 1330 unsigned char *d = *data; 1331 1332 /* 1333 * The NCR5380 chip will only drive the SCSI bus when the 1334 * phase specified in the appropriate bits of the TARGET COMMAND 1335 * REGISTER match the STATUS REGISTER 1336 */ 1337 1338 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1339 1340 do { 1341 /* 1342 * Wait for assertion of REQ, after which the phase bits will be 1343 * valid 1344 */ 1345 1346 if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) 1347 break; 1348 1349 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); 1350 1351 /* Check for phase mismatch */ 1352 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { 1353 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); 1354 NCR5380_dprint_phase(NDEBUG_PIO, instance); 1355 break; 1356 } 1357 1358 /* Do actual transfer from SCSI bus to / from memory */ 1359 if (!(p & SR_IO)) 1360 NCR5380_write(OUTPUT_DATA_REG, *d); 1361 else 1362 *d = NCR5380_read(CURRENT_SCSI_DATA_REG); 1363 1364 ++d; 1365 1366 /* 1367 * The SCSI standard suggests that in MSGOUT phase, the initiator 1368 * should drop ATN on the last byte of the message phase 1369 * after REQ has been asserted for the handshake but before 1370 * the initiator raises ACK. 1371 */ 1372 1373 if (!(p & SR_IO)) { 1374 if (!((p & SR_MSG) && c > 1)) { 1375 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1376 NCR5380_dprint(NDEBUG_PIO, instance); 1377 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1378 ICR_ASSERT_DATA | ICR_ASSERT_ACK); 1379 } else { 1380 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1381 ICR_ASSERT_DATA | ICR_ASSERT_ATN); 1382 NCR5380_dprint(NDEBUG_PIO, instance); 1383 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1384 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1385 } 1386 } else { 1387 NCR5380_dprint(NDEBUG_PIO, instance); 1388 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 1389 } 1390 1391 if (NCR5380_poll_politely(instance, 1392 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) 1393 break; 1394 1395 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); 1396 1397 /* 1398 * We have several special cases to consider during REQ/ACK handshaking : 1399 * 1. We were in MSGOUT phase, and we are on the last byte of the 1400 * message. ATN must be dropped as ACK is dropped. 1401 * 1402 * 2. We are in a MSGIN phase, and we are on the last byte of the 1403 * message. We must exit with ACK asserted, so that the calling 1404 * code may raise ATN before dropping ACK to reject the message. 1405 * 1406 * 3. ACK and ATN are clear and the target may proceed as normal. 1407 */ 1408 if (!(p == PHASE_MSGIN && c == 1)) { 1409 if (p == PHASE_MSGOUT && c > 1) 1410 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1411 else 1412 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1413 } 1414 } while (--c); 1415 1416 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); 1417 1418 *count = c; 1419 *data = d; 1420 tmp = NCR5380_read(STATUS_REG); 1421 /* The phase read from the bus is valid if either REQ is (already) 1422 * asserted or if ACK hasn't been released yet. The latter applies if 1423 * we're in MSG IN, DATA IN or STATUS and all bytes have been received. 1424 */ 1425 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) 1426 *phase = tmp & PHASE_MASK; 1427 else 1428 *phase = PHASE_UNKNOWN; 1429 1430 if (!c || (*phase == p)) 1431 return 0; 1432 else 1433 return -1; 1434 } 1435 1436 /** 1437 * do_reset - issue a reset command 1438 * @instance: adapter to reset 1439 * 1440 * Issue a reset sequence to the NCR5380 and try and get the bus 1441 * back into sane shape. 1442 * 1443 * This clears the reset interrupt flag because there may be no handler for 1444 * it. When the driver is initialized, the NCR5380_intr() handler has not yet 1445 * been installed. And when in EH we may have released the ST DMA interrupt. 1446 */ 1447 1448 static void do_reset(struct Scsi_Host *instance) 1449 { 1450 unsigned long flags; 1451 1452 local_irq_save(flags); 1453 NCR5380_write(TARGET_COMMAND_REG, 1454 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); 1455 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); 1456 udelay(50); 1457 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1458 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); 1459 local_irq_restore(flags); 1460 } 1461 1462 /** 1463 * do_abort - abort the currently established nexus by going to 1464 * MESSAGE OUT phase and sending an ABORT message. 1465 * @instance: relevant scsi host instance 1466 * 1467 * Returns 0 on success, -1 on failure. 1468 */ 1469 1470 static int do_abort(struct Scsi_Host *instance) 1471 { 1472 unsigned char *msgptr, phase, tmp; 1473 int len; 1474 int rc; 1475 1476 /* Request message out phase */ 1477 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1478 1479 /* 1480 * Wait for the target to indicate a valid phase by asserting 1481 * REQ. Once this happens, we'll have either a MSGOUT phase 1482 * and can immediately send the ABORT message, or we'll have some 1483 * other phase and will have to source/sink data. 1484 * 1485 * We really don't care what value was on the bus or what value 1486 * the target sees, so we just handshake. 1487 */ 1488 1489 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); 1490 if (rc < 0) 1491 goto timeout; 1492 1493 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; 1494 1495 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1496 1497 if (tmp != PHASE_MSGOUT) { 1498 NCR5380_write(INITIATOR_COMMAND_REG, 1499 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1500 rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ); 1501 if (rc < 0) 1502 goto timeout; 1503 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1504 } 1505 1506 tmp = ABORT; 1507 msgptr = &tmp; 1508 len = 1; 1509 phase = PHASE_MSGOUT; 1510 NCR5380_transfer_pio(instance, &phase, &len, &msgptr); 1511 1512 /* 1513 * If we got here, and the command completed successfully, 1514 * we're about to go into bus free state. 1515 */ 1516 1517 return len ? -1 : 0; 1518 1519 timeout: 1520 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1521 return -1; 1522 } 1523 1524 /* 1525 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, 1526 * unsigned char *phase, int *count, unsigned char **data) 1527 * 1528 * Purpose : transfers data in given phase using either real 1529 * or pseudo DMA. 1530 * 1531 * Inputs : instance - instance of driver, *phase - pointer to 1532 * what phase is expected, *count - pointer to number of 1533 * bytes to transfer, **data - pointer to data pointer. 1534 * 1535 * Returns : -1 when different phase is entered without transferring 1536 * maximum number of bytes, 0 if all bytes or transferred or exit 1537 * is in same phase. 1538 * 1539 * Also, *phase, *count, *data are modified in place. 1540 */ 1541 1542 1543 static int NCR5380_transfer_dma(struct Scsi_Host *instance, 1544 unsigned char *phase, int *count, 1545 unsigned char **data) 1546 { 1547 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1548 int c = *count; 1549 unsigned char p = *phase; 1550 unsigned char *d = *data; 1551 unsigned char tmp; 1552 int result = 0; 1553 1554 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { 1555 *phase = tmp; 1556 return -1; 1557 } 1558 1559 hostdata->connected->SCp.phase = p; 1560 1561 if (p & SR_IO) { 1562 if (hostdata->read_overruns) 1563 c -= hostdata->read_overruns; 1564 else if (hostdata->flags & FLAG_DMA_FIXUP) 1565 --c; 1566 } 1567 1568 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", 1569 (p & SR_IO) ? "receive" : "send", c, d); 1570 1571 #ifdef CONFIG_SUN3 1572 /* send start chain */ 1573 sun3scsi_dma_start(c, *data); 1574 #endif 1575 1576 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1577 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | 1578 MR_ENABLE_EOP_INTR); 1579 1580 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { 1581 /* On the Medusa, it is a must to initialize the DMA before 1582 * starting the NCR. This is also the cleaner way for the TT. 1583 */ 1584 if (p & SR_IO) 1585 result = NCR5380_dma_recv_setup(instance, d, c); 1586 else 1587 result = NCR5380_dma_send_setup(instance, d, c); 1588 } 1589 1590 /* 1591 * On the PAS16 at least I/O recovery delays are not needed here. 1592 * Everyone else seems to want them. 1593 */ 1594 1595 if (p & SR_IO) { 1596 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1597 NCR5380_io_delay(1); 1598 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); 1599 } else { 1600 NCR5380_io_delay(1); 1601 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1602 NCR5380_io_delay(1); 1603 NCR5380_write(START_DMA_SEND_REG, 0); 1604 NCR5380_io_delay(1); 1605 } 1606 1607 #ifdef CONFIG_SUN3 1608 #ifdef SUN3_SCSI_VME 1609 dregs->csr |= CSR_DMA_ENABLE; 1610 #endif 1611 sun3_dma_active = 1; 1612 #endif 1613 1614 if (hostdata->flags & FLAG_LATE_DMA_SETUP) { 1615 /* On the Falcon, the DMA setup must be done after the last 1616 * NCR access, else the DMA setup gets trashed! 1617 */ 1618 if (p & SR_IO) 1619 result = NCR5380_dma_recv_setup(instance, d, c); 1620 else 1621 result = NCR5380_dma_send_setup(instance, d, c); 1622 } 1623 1624 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ 1625 if (result < 0) 1626 return result; 1627 1628 /* For real DMA, result is the byte count. DMA interrupt is expected. */ 1629 if (result > 0) { 1630 hostdata->dma_len = result; 1631 return 0; 1632 } 1633 1634 /* The result is zero iff pseudo DMA send/receive was completed. */ 1635 hostdata->dma_len = c; 1636 1637 /* 1638 * A note regarding the DMA errata workarounds for early NMOS silicon. 1639 * 1640 * For DMA sends, we want to wait until the last byte has been 1641 * transferred out over the bus before we turn off DMA mode. Alas, there 1642 * seems to be no terribly good way of doing this on a 5380 under all 1643 * conditions. For non-scatter-gather operations, we can wait until REQ 1644 * and ACK both go false, or until a phase mismatch occurs. Gather-sends 1645 * are nastier, since the device will be expecting more data than we 1646 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we 1647 * could test Last Byte Sent to assure transfer (I imagine this is precisely 1648 * why this signal was added to the newer chips) but on the older 538[01] 1649 * this signal does not exist. The workaround for this lack is a watchdog; 1650 * we bail out of the wait-loop after a modest amount of wait-time if 1651 * the usual exit conditions are not met. Not a terribly clean or 1652 * correct solution :-% 1653 * 1654 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. 1655 * If the chip is in DMA receive mode, it will respond to a target's 1656 * REQ by latching the SCSI data into the INPUT DATA register and asserting 1657 * ACK, even if it has _already_ been notified by the DMA controller that 1658 * the current DMA transfer has completed! If the NCR5380 is then taken 1659 * out of DMA mode, this already-acknowledged byte is lost. This is 1660 * not a problem for "one DMA transfer per READ command", because 1661 * the situation will never arise... either all of the data is DMA'ed 1662 * properly, or the target switches to MESSAGE IN phase to signal a 1663 * disconnection (either operation bringing the DMA to a clean halt). 1664 * However, in order to handle scatter-receive, we must work around the 1665 * problem. The chosen fix is to DMA fewer bytes, then check for the 1666 * condition before taking the NCR5380 out of DMA mode. One or two extra 1667 * bytes are transferred via PIO as necessary to fill out the original 1668 * request. 1669 */ 1670 1671 if (hostdata->flags & FLAG_DMA_FIXUP) { 1672 if (p & SR_IO) { 1673 /* 1674 * The workaround was to transfer fewer bytes than we 1675 * intended to with the pseudo-DMA read function, wait for 1676 * the chip to latch the last byte, read it, and then disable 1677 * pseudo-DMA mode. 1678 * 1679 * After REQ is asserted, the NCR5380 asserts DRQ and ACK. 1680 * REQ is deasserted when ACK is asserted, and not reasserted 1681 * until ACK goes false. Since the NCR5380 won't lower ACK 1682 * until DACK is asserted, which won't happen unless we twiddle 1683 * the DMA port or we take the NCR5380 out of DMA mode, we 1684 * can guarantee that we won't handshake another extra 1685 * byte. 1686 */ 1687 1688 if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, 1689 BASR_DRQ, BASR_DRQ, HZ) < 0) { 1690 result = -1; 1691 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); 1692 } 1693 if (NCR5380_poll_politely(instance, STATUS_REG, 1694 SR_REQ, 0, HZ) < 0) { 1695 result = -1; 1696 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); 1697 } 1698 d[*count - 1] = NCR5380_read(INPUT_DATA_REG); 1699 } else { 1700 /* 1701 * Wait for the last byte to be sent. If REQ is being asserted for 1702 * the byte we're interested, we'll ACK it and it will go false. 1703 */ 1704 if (NCR5380_poll_politely2(instance, 1705 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, 1706 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { 1707 result = -1; 1708 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); 1709 } 1710 } 1711 } 1712 1713 NCR5380_dma_complete(instance); 1714 return result; 1715 } 1716 1717 /* 1718 * Function : NCR5380_information_transfer (struct Scsi_Host *instance) 1719 * 1720 * Purpose : run through the various SCSI phases and do as the target 1721 * directs us to. Operates on the currently connected command, 1722 * instance->connected. 1723 * 1724 * Inputs : instance, instance for which we are doing commands 1725 * 1726 * Side effects : SCSI things happen, the disconnected queue will be 1727 * modified if a command disconnects, *instance->connected will 1728 * change. 1729 * 1730 * XXX Note : we need to watch for bus free or a reset condition here 1731 * to recover from an unexpected bus free condition. 1732 */ 1733 1734 static void NCR5380_information_transfer(struct Scsi_Host *instance) 1735 { 1736 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1737 unsigned char msgout = NOP; 1738 int sink = 0; 1739 int len; 1740 int transfersize; 1741 unsigned char *data; 1742 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; 1743 struct scsi_cmnd *cmd; 1744 1745 #ifdef SUN3_SCSI_VME 1746 dregs->csr |= CSR_INTR; 1747 #endif 1748 1749 while ((cmd = hostdata->connected)) { 1750 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 1751 1752 tmp = NCR5380_read(STATUS_REG); 1753 /* We only have a valid SCSI phase when REQ is asserted */ 1754 if (tmp & SR_REQ) { 1755 phase = (tmp & PHASE_MASK); 1756 if (phase != old_phase) { 1757 old_phase = phase; 1758 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); 1759 } 1760 #ifdef CONFIG_SUN3 1761 if (phase == PHASE_CMDOUT) { 1762 void *d; 1763 unsigned long count; 1764 1765 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1766 count = cmd->SCp.buffer->length; 1767 d = sg_virt(cmd->SCp.buffer); 1768 } else { 1769 count = cmd->SCp.this_residual; 1770 d = cmd->SCp.ptr; 1771 } 1772 1773 if (sun3_dma_setup_done != cmd && 1774 sun3scsi_dma_xfer_len(count, cmd) > 0) { 1775 sun3scsi_dma_setup(instance, d, count, 1776 rq_data_dir(cmd->request)); 1777 sun3_dma_setup_done = cmd; 1778 } 1779 #ifdef SUN3_SCSI_VME 1780 dregs->csr |= CSR_INTR; 1781 #endif 1782 } 1783 #endif /* CONFIG_SUN3 */ 1784 1785 if (sink && (phase != PHASE_MSGOUT)) { 1786 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1787 1788 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 1789 ICR_ASSERT_ACK); 1790 while (NCR5380_read(STATUS_REG) & SR_REQ) 1791 ; 1792 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1793 ICR_ASSERT_ATN); 1794 sink = 0; 1795 continue; 1796 } 1797 1798 switch (phase) { 1799 case PHASE_DATAOUT: 1800 #if (NDEBUG & NDEBUG_NO_DATAOUT) 1801 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); 1802 sink = 1; 1803 do_abort(instance); 1804 cmd->result = DID_ERROR << 16; 1805 complete_cmd(instance, cmd); 1806 hostdata->connected = NULL; 1807 return; 1808 #endif 1809 case PHASE_DATAIN: 1810 /* 1811 * If there is no room left in the current buffer in the 1812 * scatter-gather list, move onto the next one. 1813 */ 1814 1815 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1816 ++cmd->SCp.buffer; 1817 --cmd->SCp.buffers_residual; 1818 cmd->SCp.this_residual = cmd->SCp.buffer->length; 1819 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 1820 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", 1821 cmd->SCp.this_residual, 1822 cmd->SCp.buffers_residual); 1823 } 1824 1825 /* 1826 * The preferred transfer method is going to be 1827 * PSEUDO-DMA for systems that are strictly PIO, 1828 * since we can let the hardware do the handshaking. 1829 * 1830 * For this to work, we need to know the transfersize 1831 * ahead of time, since the pseudo-DMA code will sit 1832 * in an unconditional loop. 1833 */ 1834 1835 transfersize = 0; 1836 if (!cmd->device->borken) 1837 transfersize = NCR5380_dma_xfer_len(instance, cmd, phase); 1838 1839 if (transfersize > 0) { 1840 len = transfersize; 1841 if (NCR5380_transfer_dma(instance, &phase, 1842 &len, (unsigned char **)&cmd->SCp.ptr)) { 1843 /* 1844 * If the watchdog timer fires, all future 1845 * accesses to this device will use the 1846 * polled-IO. 1847 */ 1848 scmd_printk(KERN_INFO, cmd, 1849 "switching to slow handshake\n"); 1850 cmd->device->borken = 1; 1851 sink = 1; 1852 do_abort(instance); 1853 cmd->result = DID_ERROR << 16; 1854 /* XXX - need to source or sink data here, as appropriate */ 1855 } 1856 } else { 1857 /* Break up transfer into 3 ms chunks, 1858 * presuming 6 accesses per handshake. 1859 */ 1860 transfersize = min((unsigned long)cmd->SCp.this_residual, 1861 hostdata->accesses_per_ms / 2); 1862 len = transfersize; 1863 NCR5380_transfer_pio(instance, &phase, &len, 1864 (unsigned char **)&cmd->SCp.ptr); 1865 cmd->SCp.this_residual -= transfersize - len; 1866 } 1867 #ifdef CONFIG_SUN3 1868 if (sun3_dma_setup_done == cmd) 1869 sun3_dma_setup_done = NULL; 1870 #endif 1871 return; 1872 case PHASE_MSGIN: 1873 len = 1; 1874 data = &tmp; 1875 NCR5380_transfer_pio(instance, &phase, &len, &data); 1876 cmd->SCp.Message = tmp; 1877 1878 switch (tmp) { 1879 case ABORT: 1880 case COMMAND_COMPLETE: 1881 /* Accept message by clearing ACK */ 1882 sink = 1; 1883 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1884 dsprintk(NDEBUG_QUEUES, instance, 1885 "COMMAND COMPLETE %p target %d lun %llu\n", 1886 cmd, scmd_id(cmd), cmd->device->lun); 1887 1888 hostdata->connected = NULL; 1889 1890 cmd->result &= ~0xffff; 1891 cmd->result |= cmd->SCp.Status; 1892 cmd->result |= cmd->SCp.Message << 8; 1893 1894 if (cmd->cmnd[0] == REQUEST_SENSE) 1895 complete_cmd(instance, cmd); 1896 else { 1897 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || 1898 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { 1899 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", 1900 cmd); 1901 list_add_tail(&ncmd->list, 1902 &hostdata->autosense); 1903 } else 1904 complete_cmd(instance, cmd); 1905 } 1906 1907 /* 1908 * Restore phase bits to 0 so an interrupted selection, 1909 * arbitration can resume. 1910 */ 1911 NCR5380_write(TARGET_COMMAND_REG, 0); 1912 1913 /* Enable reselect interrupts */ 1914 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1915 1916 maybe_release_dma_irq(instance); 1917 return; 1918 case MESSAGE_REJECT: 1919 /* Accept message by clearing ACK */ 1920 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1921 switch (hostdata->last_message) { 1922 case HEAD_OF_QUEUE_TAG: 1923 case ORDERED_QUEUE_TAG: 1924 case SIMPLE_QUEUE_TAG: 1925 cmd->device->simple_tags = 0; 1926 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); 1927 break; 1928 default: 1929 break; 1930 } 1931 break; 1932 case DISCONNECT: 1933 /* Accept message by clearing ACK */ 1934 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1935 hostdata->connected = NULL; 1936 list_add(&ncmd->list, &hostdata->disconnected); 1937 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, 1938 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", 1939 cmd, scmd_id(cmd), cmd->device->lun); 1940 1941 /* 1942 * Restore phase bits to 0 so an interrupted selection, 1943 * arbitration can resume. 1944 */ 1945 NCR5380_write(TARGET_COMMAND_REG, 0); 1946 1947 /* Enable reselect interrupts */ 1948 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1949 #ifdef SUN3_SCSI_VME 1950 dregs->csr |= CSR_DMA_ENABLE; 1951 #endif 1952 return; 1953 /* 1954 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect 1955 * operation, in violation of the SCSI spec so we can safely 1956 * ignore SAVE/RESTORE pointers calls. 1957 * 1958 * Unfortunately, some disks violate the SCSI spec and 1959 * don't issue the required SAVE_POINTERS message before 1960 * disconnecting, and we have to break spec to remain 1961 * compatible. 1962 */ 1963 case SAVE_POINTERS: 1964 case RESTORE_POINTERS: 1965 /* Accept message by clearing ACK */ 1966 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1967 break; 1968 case EXTENDED_MESSAGE: 1969 /* 1970 * Start the message buffer with the EXTENDED_MESSAGE 1971 * byte, since spi_print_msg() wants the whole thing. 1972 */ 1973 extended_msg[0] = EXTENDED_MESSAGE; 1974 /* Accept first byte by clearing ACK */ 1975 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1976 1977 spin_unlock_irq(&hostdata->lock); 1978 1979 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); 1980 1981 len = 2; 1982 data = extended_msg + 1; 1983 phase = PHASE_MSGIN; 1984 NCR5380_transfer_pio(instance, &phase, &len, &data); 1985 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", 1986 (int)extended_msg[1], 1987 (int)extended_msg[2]); 1988 1989 if (!len && extended_msg[1] > 0 && 1990 extended_msg[1] <= sizeof(extended_msg) - 2) { 1991 /* Accept third byte by clearing ACK */ 1992 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1993 len = extended_msg[1] - 1; 1994 data = extended_msg + 3; 1995 phase = PHASE_MSGIN; 1996 1997 NCR5380_transfer_pio(instance, &phase, &len, &data); 1998 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", 1999 len); 2000 2001 switch (extended_msg[2]) { 2002 case EXTENDED_SDTR: 2003 case EXTENDED_WDTR: 2004 case EXTENDED_MODIFY_DATA_POINTER: 2005 case EXTENDED_EXTENDED_IDENTIFY: 2006 tmp = 0; 2007 } 2008 } else if (len) { 2009 shost_printk(KERN_ERR, instance, "error receiving extended message\n"); 2010 tmp = 0; 2011 } else { 2012 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", 2013 extended_msg[2], extended_msg[1]); 2014 tmp = 0; 2015 } 2016 2017 spin_lock_irq(&hostdata->lock); 2018 if (!hostdata->connected) 2019 return; 2020 2021 /* Fall through to reject message */ 2022 2023 /* 2024 * If we get something weird that we aren't expecting, 2025 * reject it. 2026 */ 2027 default: 2028 if (!tmp) { 2029 shost_printk(KERN_ERR, instance, "rejecting message "); 2030 spi_print_msg(extended_msg); 2031 printk("\n"); 2032 } else if (tmp != EXTENDED_MESSAGE) 2033 scmd_printk(KERN_INFO, cmd, 2034 "rejecting unknown message %02x\n", 2035 tmp); 2036 else 2037 scmd_printk(KERN_INFO, cmd, 2038 "rejecting unknown extended message code %02x, length %d\n", 2039 extended_msg[1], extended_msg[0]); 2040 2041 msgout = MESSAGE_REJECT; 2042 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 2043 break; 2044 } /* switch (tmp) */ 2045 break; 2046 case PHASE_MSGOUT: 2047 len = 1; 2048 data = &msgout; 2049 hostdata->last_message = msgout; 2050 NCR5380_transfer_pio(instance, &phase, &len, &data); 2051 if (msgout == ABORT) { 2052 hostdata->connected = NULL; 2053 cmd->result = DID_ERROR << 16; 2054 complete_cmd(instance, cmd); 2055 maybe_release_dma_irq(instance); 2056 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 2057 return; 2058 } 2059 msgout = NOP; 2060 break; 2061 case PHASE_CMDOUT: 2062 len = cmd->cmd_len; 2063 data = cmd->cmnd; 2064 /* 2065 * XXX for performance reasons, on machines with a 2066 * PSEUDO-DMA architecture we should probably 2067 * use the dma transfer function. 2068 */ 2069 NCR5380_transfer_pio(instance, &phase, &len, &data); 2070 break; 2071 case PHASE_STATIN: 2072 len = 1; 2073 data = &tmp; 2074 NCR5380_transfer_pio(instance, &phase, &len, &data); 2075 cmd->SCp.Status = tmp; 2076 break; 2077 default: 2078 shost_printk(KERN_ERR, instance, "unknown phase\n"); 2079 NCR5380_dprint(NDEBUG_ANY, instance); 2080 } /* switch(phase) */ 2081 } else { 2082 spin_unlock_irq(&hostdata->lock); 2083 NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ); 2084 spin_lock_irq(&hostdata->lock); 2085 } 2086 } 2087 } 2088 2089 /* 2090 * Function : void NCR5380_reselect (struct Scsi_Host *instance) 2091 * 2092 * Purpose : does reselection, initializing the instance->connected 2093 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q 2094 * nexus has been reestablished, 2095 * 2096 * Inputs : instance - this instance of the NCR5380. 2097 */ 2098 2099 static void NCR5380_reselect(struct Scsi_Host *instance) 2100 { 2101 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2102 unsigned char target_mask; 2103 unsigned char lun; 2104 unsigned char msg[3]; 2105 struct NCR5380_cmd *ncmd; 2106 struct scsi_cmnd *tmp; 2107 2108 /* 2109 * Disable arbitration, etc. since the host adapter obviously 2110 * lost, and tell an interrupted NCR5380_select() to restart. 2111 */ 2112 2113 NCR5380_write(MODE_REG, MR_BASE); 2114 2115 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); 2116 2117 dsprintk(NDEBUG_RESELECTION, instance, "reselect\n"); 2118 2119 /* 2120 * At this point, we have detected that our SCSI ID is on the bus, 2121 * SEL is true and BSY was false for at least one bus settle delay 2122 * (400 ns). 2123 * 2124 * We must assert BSY ourselves, until the target drops the SEL 2125 * signal. 2126 */ 2127 2128 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); 2129 if (NCR5380_poll_politely(instance, 2130 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { 2131 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2132 return; 2133 } 2134 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2135 2136 /* 2137 * Wait for target to go into MSGIN. 2138 */ 2139 2140 if (NCR5380_poll_politely(instance, 2141 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { 2142 do_abort(instance); 2143 return; 2144 } 2145 2146 #ifdef CONFIG_SUN3 2147 /* acknowledge toggle to MSGIN */ 2148 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); 2149 2150 /* peek at the byte without really hitting the bus */ 2151 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); 2152 #else 2153 { 2154 int len = 1; 2155 unsigned char *data = msg; 2156 unsigned char phase = PHASE_MSGIN; 2157 2158 NCR5380_transfer_pio(instance, &phase, &len, &data); 2159 2160 if (len) { 2161 do_abort(instance); 2162 return; 2163 } 2164 } 2165 #endif /* CONFIG_SUN3 */ 2166 2167 if (!(msg[0] & 0x80)) { 2168 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); 2169 spi_print_msg(msg); 2170 printk("\n"); 2171 do_abort(instance); 2172 return; 2173 } 2174 lun = msg[0] & 0x07; 2175 2176 /* 2177 * We need to add code for SCSI-II to track which devices have 2178 * I_T_L_Q nexuses established, and which have simple I_T_L 2179 * nexuses so we can chose to do additional data transfer. 2180 */ 2181 2182 /* 2183 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we 2184 * just reestablished, and remove it from the disconnected queue. 2185 */ 2186 2187 tmp = NULL; 2188 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2189 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2190 2191 if (target_mask == (1 << scmd_id(cmd)) && 2192 lun == (u8)cmd->device->lun) { 2193 list_del(&ncmd->list); 2194 tmp = cmd; 2195 break; 2196 } 2197 } 2198 2199 if (tmp) { 2200 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, 2201 "reselect: removed %p from disconnected queue\n", tmp); 2202 } else { 2203 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", 2204 target_mask, lun); 2205 /* 2206 * Since we have an established nexus that we can't do anything 2207 * with, we must abort it. 2208 */ 2209 do_abort(instance); 2210 return; 2211 } 2212 2213 #ifdef CONFIG_SUN3 2214 { 2215 void *d; 2216 unsigned long count; 2217 2218 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { 2219 count = tmp->SCp.buffer->length; 2220 d = sg_virt(tmp->SCp.buffer); 2221 } else { 2222 count = tmp->SCp.this_residual; 2223 d = tmp->SCp.ptr; 2224 } 2225 2226 if (sun3_dma_setup_done != tmp && 2227 sun3scsi_dma_xfer_len(count, tmp) > 0) { 2228 sun3scsi_dma_setup(instance, d, count, 2229 rq_data_dir(tmp->request)); 2230 sun3_dma_setup_done = tmp; 2231 } 2232 } 2233 2234 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 2235 #endif /* CONFIG_SUN3 */ 2236 2237 /* Accept message by clearing ACK */ 2238 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2239 2240 hostdata->connected = tmp; 2241 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", 2242 scmd_id(tmp), tmp->device->lun); 2243 } 2244 2245 /** 2246 * list_find_cmd - test for presence of a command in a linked list 2247 * @haystack: list of commands 2248 * @needle: command to search for 2249 */ 2250 2251 static bool list_find_cmd(struct list_head *haystack, 2252 struct scsi_cmnd *needle) 2253 { 2254 struct NCR5380_cmd *ncmd; 2255 2256 list_for_each_entry(ncmd, haystack, list) 2257 if (NCR5380_to_scmd(ncmd) == needle) 2258 return true; 2259 return false; 2260 } 2261 2262 /** 2263 * list_remove_cmd - remove a command from linked list 2264 * @haystack: list of commands 2265 * @needle: command to remove 2266 */ 2267 2268 static bool list_del_cmd(struct list_head *haystack, 2269 struct scsi_cmnd *needle) 2270 { 2271 if (list_find_cmd(haystack, needle)) { 2272 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); 2273 2274 list_del(&ncmd->list); 2275 return true; 2276 } 2277 return false; 2278 } 2279 2280 /** 2281 * NCR5380_abort - scsi host eh_abort_handler() method 2282 * @cmd: the command to be aborted 2283 * 2284 * Try to abort a given command by removing it from queues and/or sending 2285 * the target an abort message. This may not succeed in causing a target 2286 * to abort the command. Nonetheless, the low-level driver must forget about 2287 * the command because the mid-layer reclaims it and it may be re-issued. 2288 * 2289 * The normal path taken by a command is as follows. For EH we trace this 2290 * same path to locate and abort the command. 2291 * 2292 * unissued -> selecting -> [unissued -> selecting ->]... connected -> 2293 * [disconnected -> connected ->]... 2294 * [autosense -> connected ->] done 2295 * 2296 * If cmd was not found at all then presumably it has already been completed, 2297 * in which case return SUCCESS to try to avoid further EH measures. 2298 * 2299 * If the command has not completed yet, we must not fail to find it. 2300 * We have no option but to forget the aborted command (even if it still 2301 * lacks sense data). The mid-layer may re-issue a command that is in error 2302 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in 2303 * this driver are such that a command can appear on one queue only. 2304 * 2305 * The lock protects driver data structures, but EH handlers also use it 2306 * to serialize their own execution and prevent their own re-entry. 2307 */ 2308 2309 static int NCR5380_abort(struct scsi_cmnd *cmd) 2310 { 2311 struct Scsi_Host *instance = cmd->device->host; 2312 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2313 unsigned long flags; 2314 int result = SUCCESS; 2315 2316 spin_lock_irqsave(&hostdata->lock, flags); 2317 2318 #if (NDEBUG & NDEBUG_ANY) 2319 scmd_printk(KERN_INFO, cmd, __func__); 2320 #endif 2321 NCR5380_dprint(NDEBUG_ANY, instance); 2322 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2323 2324 if (list_del_cmd(&hostdata->unissued, cmd)) { 2325 dsprintk(NDEBUG_ABORT, instance, 2326 "abort: removed %p from issue queue\n", cmd); 2327 cmd->result = DID_ABORT << 16; 2328 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ 2329 goto out; 2330 } 2331 2332 if (hostdata->selecting == cmd) { 2333 dsprintk(NDEBUG_ABORT, instance, 2334 "abort: cmd %p == selecting\n", cmd); 2335 hostdata->selecting = NULL; 2336 cmd->result = DID_ABORT << 16; 2337 complete_cmd(instance, cmd); 2338 goto out; 2339 } 2340 2341 if (list_del_cmd(&hostdata->disconnected, cmd)) { 2342 dsprintk(NDEBUG_ABORT, instance, 2343 "abort: removed %p from disconnected list\n", cmd); 2344 /* Can't call NCR5380_select() and send ABORT because that 2345 * means releasing the lock. Need a bus reset. 2346 */ 2347 set_host_byte(cmd, DID_ERROR); 2348 complete_cmd(instance, cmd); 2349 result = FAILED; 2350 goto out; 2351 } 2352 2353 if (hostdata->connected == cmd) { 2354 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); 2355 hostdata->connected = NULL; 2356 hostdata->dma_len = 0; 2357 if (do_abort(instance)) { 2358 set_host_byte(cmd, DID_ERROR); 2359 complete_cmd(instance, cmd); 2360 result = FAILED; 2361 goto out; 2362 } 2363 set_host_byte(cmd, DID_ABORT); 2364 complete_cmd(instance, cmd); 2365 goto out; 2366 } 2367 2368 if (list_del_cmd(&hostdata->autosense, cmd)) { 2369 dsprintk(NDEBUG_ABORT, instance, 2370 "abort: removed %p from sense queue\n", cmd); 2371 set_host_byte(cmd, DID_ERROR); 2372 complete_cmd(instance, cmd); 2373 } 2374 2375 out: 2376 if (result == FAILED) 2377 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); 2378 else 2379 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); 2380 2381 queue_work(hostdata->work_q, &hostdata->main_task); 2382 maybe_release_dma_irq(instance); 2383 spin_unlock_irqrestore(&hostdata->lock, flags); 2384 2385 return result; 2386 } 2387 2388 2389 /** 2390 * NCR5380_bus_reset - reset the SCSI bus 2391 * @cmd: SCSI command undergoing EH 2392 * 2393 * Returns SUCCESS 2394 */ 2395 2396 static int NCR5380_bus_reset(struct scsi_cmnd *cmd) 2397 { 2398 struct Scsi_Host *instance = cmd->device->host; 2399 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2400 int i; 2401 unsigned long flags; 2402 struct NCR5380_cmd *ncmd; 2403 2404 spin_lock_irqsave(&hostdata->lock, flags); 2405 2406 #if (NDEBUG & NDEBUG_ANY) 2407 scmd_printk(KERN_INFO, cmd, __func__); 2408 #endif 2409 NCR5380_dprint(NDEBUG_ANY, instance); 2410 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2411 2412 do_reset(instance); 2413 2414 /* reset NCR registers */ 2415 NCR5380_write(MODE_REG, MR_BASE); 2416 NCR5380_write(TARGET_COMMAND_REG, 0); 2417 NCR5380_write(SELECT_ENABLE_REG, 0); 2418 2419 /* After the reset, there are no more connected or disconnected commands 2420 * and no busy units; so clear the low-level status here to avoid 2421 * conflicts when the mid-level code tries to wake up the affected 2422 * commands! 2423 */ 2424 2425 if (list_del_cmd(&hostdata->unissued, cmd)) { 2426 cmd->result = DID_RESET << 16; 2427 cmd->scsi_done(cmd); 2428 } 2429 2430 if (hostdata->selecting) { 2431 hostdata->selecting->result = DID_RESET << 16; 2432 complete_cmd(instance, hostdata->selecting); 2433 hostdata->selecting = NULL; 2434 } 2435 2436 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2437 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2438 2439 set_host_byte(cmd, DID_RESET); 2440 complete_cmd(instance, cmd); 2441 } 2442 INIT_LIST_HEAD(&hostdata->disconnected); 2443 2444 list_for_each_entry(ncmd, &hostdata->autosense, list) { 2445 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2446 2447 set_host_byte(cmd, DID_RESET); 2448 cmd->scsi_done(cmd); 2449 } 2450 INIT_LIST_HEAD(&hostdata->autosense); 2451 2452 if (hostdata->connected) { 2453 set_host_byte(hostdata->connected, DID_RESET); 2454 complete_cmd(instance, hostdata->connected); 2455 hostdata->connected = NULL; 2456 } 2457 2458 for (i = 0; i < 8; ++i) 2459 hostdata->busy[i] = 0; 2460 hostdata->dma_len = 0; 2461 2462 queue_work(hostdata->work_q, &hostdata->main_task); 2463 maybe_release_dma_irq(instance); 2464 spin_unlock_irqrestore(&hostdata->lock, flags); 2465 2466 return SUCCESS; 2467 } 2468