1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NCR 5380 generic driver routines. These should make it *trivial* 4 * to implement 5380 SCSI drivers under Linux with a non-trantor 5 * architecture. 6 * 7 * Note that these routines also work with NR53c400 family chips. 8 * 9 * Copyright 1993, Drew Eckhardt 10 * Visionary Computing 11 * (Unix and Linux consulting and custom programming) 12 * drew@colorado.edu 13 * +1 (303) 666-5836 14 * 15 * For more information, please consult 16 * 17 * NCR 5380 Family 18 * SCSI Protocol Controller 19 * Databook 20 * 21 * NCR Microelectronics 22 * 1635 Aeroplaza Drive 23 * Colorado Springs, CO 80916 24 * 1+ (719) 578-3400 25 * 1+ (800) 334-5454 26 */ 27 28 /* 29 * With contributions from Ray Van Tassle, Ingmar Baumgart, 30 * Ronald van Cuijlenborg, Alan Cox and others. 31 */ 32 33 /* Ported to Atari by Roman Hodek and others. */ 34 35 /* Adapted for the Sun 3 by Sam Creasey. */ 36 37 /* 38 * Design 39 * 40 * This is a generic 5380 driver. To use it on a different platform, 41 * one simply writes appropriate system specific macros (ie, data 42 * transfer - some PC's will use the I/O bus, 68K's must use 43 * memory mapped) and drops this file in their 'C' wrapper. 44 * 45 * As far as command queueing, two queues are maintained for 46 * each 5380 in the system - commands that haven't been issued yet, 47 * and commands that are currently executing. This means that an 48 * unlimited number of commands may be queued, letting 49 * more commands propagate from the higher driver levels giving higher 50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, 51 * allowing multiple commands to propagate all the way to a SCSI-II device 52 * while a command is already executing. 53 * 54 * 55 * Issues specific to the NCR5380 : 56 * 57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 58 * piece of hardware that requires you to sit in a loop polling for 59 * the REQ signal as long as you are connected. Some devices are 60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect 61 * while doing long seek operations. [...] These 62 * broken devices are the exception rather than the rule and I'd rather 63 * spend my time optimizing for the normal case. 64 * 65 * Architecture : 66 * 67 * At the heart of the design is a coroutine, NCR5380_main, 68 * which is started from a workqueue for each NCR5380 host in the 69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by 70 * removing the commands from the issue queue and calling 71 * NCR5380_select() if a nexus is not established. 72 * 73 * Once a nexus is established, the NCR5380_information_transfer() 74 * phase goes through the various phases as instructed by the target. 75 * if the target goes into MSG IN and sends a DISCONNECT message, 76 * the command structure is placed into the per instance disconnected 77 * queue, and NCR5380_main tries to find more work. If the target is 78 * idle for too long, the system will try to sleep. 79 * 80 * If a command has disconnected, eventually an interrupt will trigger, 81 * calling NCR5380_intr() which will in turn call NCR5380_reselect 82 * to reestablish a nexus. This will run main if necessary. 83 * 84 * On command termination, the done function will be called as 85 * appropriate. 86 * 87 * SCSI pointers are maintained in the SCp field of SCSI command 88 * structures, being initialized after the command is connected 89 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. 90 * Note that in violation of the standard, an implicit SAVE POINTERS operation 91 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. 92 */ 93 94 /* 95 * Using this file : 96 * This file a skeleton Linux SCSI driver for the NCR 5380 series 97 * of chips. To use it, you write an architecture specific functions 98 * and macros and include this file in your driver. 99 * 100 * These macros MUST be defined : 101 * 102 * NCR5380_read(register) - read from the specified register 103 * 104 * NCR5380_write(register, value) - write to the specific register 105 * 106 * NCR5380_implementation_fields - additional fields needed for this 107 * specific implementation of the NCR5380 108 * 109 * Either real DMA *or* pseudo DMA may be implemented 110 * 111 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer 112 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 113 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory 114 * NCR5380_dma_residual - residual byte count 115 * 116 * The generic driver is initialized by calling NCR5380_init(instance), 117 * after setting the appropriate host specific fields and ID. 118 */ 119 120 #ifndef NCR5380_io_delay 121 #define NCR5380_io_delay(x) 122 #endif 123 124 #ifndef NCR5380_acquire_dma_irq 125 #define NCR5380_acquire_dma_irq(x) (1) 126 #endif 127 128 #ifndef NCR5380_release_dma_irq 129 #define NCR5380_release_dma_irq(x) 130 #endif 131 132 static int do_abort(struct Scsi_Host *); 133 static void do_reset(struct Scsi_Host *); 134 static void bus_reset_cleanup(struct Scsi_Host *); 135 136 /** 137 * initialize_SCp - init the scsi pointer field 138 * @cmd: command block to set up 139 * 140 * Set up the internal fields in the SCSI command. 141 */ 142 143 static inline void initialize_SCp(struct scsi_cmnd *cmd) 144 { 145 /* 146 * Initialize the Scsi Pointer field so that all of the commands in the 147 * various queues are valid. 148 */ 149 150 if (scsi_bufflen(cmd)) { 151 cmd->SCp.buffer = scsi_sglist(cmd); 152 cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1; 153 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 154 cmd->SCp.this_residual = cmd->SCp.buffer->length; 155 } else { 156 cmd->SCp.buffer = NULL; 157 cmd->SCp.buffers_residual = 0; 158 cmd->SCp.ptr = NULL; 159 cmd->SCp.this_residual = 0; 160 } 161 162 cmd->SCp.Status = 0; 163 cmd->SCp.Message = 0; 164 } 165 166 /** 167 * NCR5380_poll_politely2 - wait for two chip register values 168 * @hostdata: host private data 169 * @reg1: 5380 register to poll 170 * @bit1: Bitmask to check 171 * @val1: Expected value 172 * @reg2: Second 5380 register to poll 173 * @bit2: Second bitmask to check 174 * @val2: Second expected value 175 * @wait: Time-out in jiffies 176 * 177 * Polls the chip in a reasonably efficient manner waiting for an 178 * event to occur. After a short quick poll we begin to yield the CPU 179 * (if possible). In irq contexts the time-out is arbitrarily limited. 180 * Callers may hold locks as long as they are held in irq mode. 181 * 182 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. 183 */ 184 185 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, 186 unsigned int reg1, u8 bit1, u8 val1, 187 unsigned int reg2, u8 bit2, u8 val2, 188 unsigned long wait) 189 { 190 unsigned long n = hostdata->poll_loops; 191 unsigned long deadline = jiffies + wait; 192 193 do { 194 if ((NCR5380_read(reg1) & bit1) == val1) 195 return 0; 196 if ((NCR5380_read(reg2) & bit2) == val2) 197 return 0; 198 cpu_relax(); 199 } while (n--); 200 201 if (irqs_disabled() || in_interrupt()) 202 return -ETIMEDOUT; 203 204 /* Repeatedly sleep for 1 ms until deadline */ 205 while (time_is_after_jiffies(deadline)) { 206 schedule_timeout_uninterruptible(1); 207 if ((NCR5380_read(reg1) & bit1) == val1) 208 return 0; 209 if ((NCR5380_read(reg2) & bit2) == val2) 210 return 0; 211 } 212 213 return -ETIMEDOUT; 214 } 215 216 #if NDEBUG 217 static struct { 218 unsigned char mask; 219 const char *name; 220 } signals[] = { 221 {SR_DBP, "PARITY"}, 222 {SR_RST, "RST"}, 223 {SR_BSY, "BSY"}, 224 {SR_REQ, "REQ"}, 225 {SR_MSG, "MSG"}, 226 {SR_CD, "CD"}, 227 {SR_IO, "IO"}, 228 {SR_SEL, "SEL"}, 229 {0, NULL} 230 }, 231 basrs[] = { 232 {BASR_END_DMA_TRANSFER, "END OF DMA"}, 233 {BASR_DRQ, "DRQ"}, 234 {BASR_PARITY_ERROR, "PARITY ERROR"}, 235 {BASR_IRQ, "IRQ"}, 236 {BASR_PHASE_MATCH, "PHASE MATCH"}, 237 {BASR_BUSY_ERROR, "BUSY ERROR"}, 238 {BASR_ATN, "ATN"}, 239 {BASR_ACK, "ACK"}, 240 {0, NULL} 241 }, 242 icrs[] = { 243 {ICR_ASSERT_RST, "ASSERT RST"}, 244 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, 245 {ICR_ARBITRATION_LOST, "LOST ARB."}, 246 {ICR_ASSERT_ACK, "ASSERT ACK"}, 247 {ICR_ASSERT_BSY, "ASSERT BSY"}, 248 {ICR_ASSERT_SEL, "ASSERT SEL"}, 249 {ICR_ASSERT_ATN, "ASSERT ATN"}, 250 {ICR_ASSERT_DATA, "ASSERT DATA"}, 251 {0, NULL} 252 }, 253 mrs[] = { 254 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, 255 {MR_TARGET, "TARGET"}, 256 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, 257 {MR_ENABLE_PAR_INTR, "PARITY INTR"}, 258 {MR_ENABLE_EOP_INTR, "EOP INTR"}, 259 {MR_MONITOR_BSY, "MONITOR BSY"}, 260 {MR_DMA_MODE, "DMA MODE"}, 261 {MR_ARBITRATE, "ARBITRATE"}, 262 {0, NULL} 263 }; 264 265 /** 266 * NCR5380_print - print scsi bus signals 267 * @instance: adapter state to dump 268 * 269 * Print the SCSI bus signals for debugging purposes 270 */ 271 272 static void NCR5380_print(struct Scsi_Host *instance) 273 { 274 struct NCR5380_hostdata *hostdata = shost_priv(instance); 275 unsigned char status, basr, mr, icr, i; 276 277 status = NCR5380_read(STATUS_REG); 278 mr = NCR5380_read(MODE_REG); 279 icr = NCR5380_read(INITIATOR_COMMAND_REG); 280 basr = NCR5380_read(BUS_AND_STATUS_REG); 281 282 printk(KERN_DEBUG "SR = 0x%02x : ", status); 283 for (i = 0; signals[i].mask; ++i) 284 if (status & signals[i].mask) 285 printk(KERN_CONT "%s, ", signals[i].name); 286 printk(KERN_CONT "\nBASR = 0x%02x : ", basr); 287 for (i = 0; basrs[i].mask; ++i) 288 if (basr & basrs[i].mask) 289 printk(KERN_CONT "%s, ", basrs[i].name); 290 printk(KERN_CONT "\nICR = 0x%02x : ", icr); 291 for (i = 0; icrs[i].mask; ++i) 292 if (icr & icrs[i].mask) 293 printk(KERN_CONT "%s, ", icrs[i].name); 294 printk(KERN_CONT "\nMR = 0x%02x : ", mr); 295 for (i = 0; mrs[i].mask; ++i) 296 if (mr & mrs[i].mask) 297 printk(KERN_CONT "%s, ", mrs[i].name); 298 printk(KERN_CONT "\n"); 299 } 300 301 static struct { 302 unsigned char value; 303 const char *name; 304 } phases[] = { 305 {PHASE_DATAOUT, "DATAOUT"}, 306 {PHASE_DATAIN, "DATAIN"}, 307 {PHASE_CMDOUT, "CMDOUT"}, 308 {PHASE_STATIN, "STATIN"}, 309 {PHASE_MSGOUT, "MSGOUT"}, 310 {PHASE_MSGIN, "MSGIN"}, 311 {PHASE_UNKNOWN, "UNKNOWN"} 312 }; 313 314 /** 315 * NCR5380_print_phase - show SCSI phase 316 * @instance: adapter to dump 317 * 318 * Print the current SCSI phase for debugging purposes 319 */ 320 321 static void NCR5380_print_phase(struct Scsi_Host *instance) 322 { 323 struct NCR5380_hostdata *hostdata = shost_priv(instance); 324 unsigned char status; 325 int i; 326 327 status = NCR5380_read(STATUS_REG); 328 if (!(status & SR_REQ)) 329 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); 330 else { 331 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && 332 (phases[i].value != (status & PHASE_MASK)); ++i) 333 ; 334 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); 335 } 336 } 337 #endif 338 339 /** 340 * NCR5380_info - report driver and host information 341 * @instance: relevant scsi host instance 342 * 343 * For use as the host template info() handler. 344 */ 345 346 static const char *NCR5380_info(struct Scsi_Host *instance) 347 { 348 struct NCR5380_hostdata *hostdata = shost_priv(instance); 349 350 return hostdata->info; 351 } 352 353 /** 354 * NCR5380_init - initialise an NCR5380 355 * @instance: adapter to configure 356 * @flags: control flags 357 * 358 * Initializes *instance and corresponding 5380 chip, 359 * with flags OR'd into the initial flags value. 360 * 361 * Notes : I assume that the host, hostno, and id bits have been 362 * set correctly. I don't care about the irq and other fields. 363 * 364 * Returns 0 for success 365 */ 366 367 static int NCR5380_init(struct Scsi_Host *instance, int flags) 368 { 369 struct NCR5380_hostdata *hostdata = shost_priv(instance); 370 int i; 371 unsigned long deadline; 372 unsigned long accesses_per_ms; 373 374 instance->max_lun = 7; 375 376 hostdata->host = instance; 377 hostdata->id_mask = 1 << instance->this_id; 378 hostdata->id_higher_mask = 0; 379 for (i = hostdata->id_mask; i <= 0x80; i <<= 1) 380 if (i > hostdata->id_mask) 381 hostdata->id_higher_mask |= i; 382 for (i = 0; i < 8; ++i) 383 hostdata->busy[i] = 0; 384 hostdata->dma_len = 0; 385 386 spin_lock_init(&hostdata->lock); 387 hostdata->connected = NULL; 388 hostdata->sensing = NULL; 389 INIT_LIST_HEAD(&hostdata->autosense); 390 INIT_LIST_HEAD(&hostdata->unissued); 391 INIT_LIST_HEAD(&hostdata->disconnected); 392 393 hostdata->flags = flags; 394 395 INIT_WORK(&hostdata->main_task, NCR5380_main); 396 hostdata->work_q = alloc_workqueue("ncr5380_%d", 397 WQ_UNBOUND | WQ_MEM_RECLAIM, 398 1, instance->host_no); 399 if (!hostdata->work_q) 400 return -ENOMEM; 401 402 snprintf(hostdata->info, sizeof(hostdata->info), 403 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}", 404 instance->hostt->name, instance->irq, hostdata->io_port, 405 hostdata->base, instance->can_queue, instance->cmd_per_lun, 406 instance->sg_tablesize, instance->this_id, 407 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", 408 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", 409 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : ""); 410 411 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 412 NCR5380_write(MODE_REG, MR_BASE); 413 NCR5380_write(TARGET_COMMAND_REG, 0); 414 NCR5380_write(SELECT_ENABLE_REG, 0); 415 416 /* Calibrate register polling loop */ 417 i = 0; 418 deadline = jiffies + 1; 419 do { 420 cpu_relax(); 421 } while (time_is_after_jiffies(deadline)); 422 deadline += msecs_to_jiffies(256); 423 do { 424 NCR5380_read(STATUS_REG); 425 ++i; 426 cpu_relax(); 427 } while (time_is_after_jiffies(deadline)); 428 accesses_per_ms = i / 256; 429 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; 430 431 return 0; 432 } 433 434 /** 435 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. 436 * @instance: adapter to check 437 * 438 * If the system crashed, it may have crashed with a connected target and 439 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the 440 * currently established nexus, which we know nothing about. Failing that 441 * do a bus reset. 442 * 443 * Note that a bus reset will cause the chip to assert IRQ. 444 * 445 * Returns 0 if successful, otherwise -ENXIO. 446 */ 447 448 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) 449 { 450 struct NCR5380_hostdata *hostdata = shost_priv(instance); 451 int pass; 452 453 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { 454 switch (pass) { 455 case 1: 456 case 3: 457 case 5: 458 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); 459 NCR5380_poll_politely(hostdata, 460 STATUS_REG, SR_BSY, 0, 5 * HZ); 461 break; 462 case 2: 463 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); 464 do_abort(instance); 465 break; 466 case 4: 467 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); 468 do_reset(instance); 469 /* Wait after a reset; the SCSI standard calls for 470 * 250ms, we wait 500ms to be on the safe side. 471 * But some Toshiba CD-ROMs need ten times that. 472 */ 473 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 474 msleep(2500); 475 else 476 msleep(500); 477 break; 478 case 6: 479 shost_printk(KERN_ERR, instance, "bus locked solid\n"); 480 return -ENXIO; 481 } 482 } 483 return 0; 484 } 485 486 /** 487 * NCR5380_exit - remove an NCR5380 488 * @instance: adapter to remove 489 * 490 * Assumes that no more work can be queued (e.g. by NCR5380_intr). 491 */ 492 493 static void NCR5380_exit(struct Scsi_Host *instance) 494 { 495 struct NCR5380_hostdata *hostdata = shost_priv(instance); 496 497 cancel_work_sync(&hostdata->main_task); 498 destroy_workqueue(hostdata->work_q); 499 } 500 501 /** 502 * complete_cmd - finish processing a command and return it to the SCSI ML 503 * @instance: the host instance 504 * @cmd: command to complete 505 */ 506 507 static void complete_cmd(struct Scsi_Host *instance, 508 struct scsi_cmnd *cmd) 509 { 510 struct NCR5380_hostdata *hostdata = shost_priv(instance); 511 512 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); 513 514 if (hostdata->sensing == cmd) { 515 /* Autosense processing ends here */ 516 if (status_byte(cmd->result) != GOOD) { 517 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 518 } else { 519 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 520 set_driver_byte(cmd, DRIVER_SENSE); 521 } 522 hostdata->sensing = NULL; 523 } 524 525 cmd->scsi_done(cmd); 526 } 527 528 /** 529 * NCR5380_queue_command - queue a command 530 * @instance: the relevant SCSI adapter 531 * @cmd: SCSI command 532 * 533 * cmd is added to the per-instance issue queue, with minor 534 * twiddling done to the host specific fields of cmd. If the 535 * main coroutine is not running, it is restarted. 536 */ 537 538 static int NCR5380_queue_command(struct Scsi_Host *instance, 539 struct scsi_cmnd *cmd) 540 { 541 struct NCR5380_hostdata *hostdata = shost_priv(instance); 542 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 543 unsigned long flags; 544 545 #if (NDEBUG & NDEBUG_NO_WRITE) 546 switch (cmd->cmnd[0]) { 547 case WRITE_6: 548 case WRITE_10: 549 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); 550 cmd->result = (DID_ERROR << 16); 551 cmd->scsi_done(cmd); 552 return 0; 553 } 554 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ 555 556 cmd->result = 0; 557 558 if (!NCR5380_acquire_dma_irq(instance)) 559 return SCSI_MLQUEUE_HOST_BUSY; 560 561 spin_lock_irqsave(&hostdata->lock, flags); 562 563 /* 564 * Insert the cmd into the issue queue. Note that REQUEST SENSE 565 * commands are added to the head of the queue since any command will 566 * clear the contingent allegiance condition that exists and the 567 * sense data is only guaranteed to be valid while the condition exists. 568 */ 569 570 if (cmd->cmnd[0] == REQUEST_SENSE) 571 list_add(&ncmd->list, &hostdata->unissued); 572 else 573 list_add_tail(&ncmd->list, &hostdata->unissued); 574 575 spin_unlock_irqrestore(&hostdata->lock, flags); 576 577 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", 578 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); 579 580 /* Kick off command processing */ 581 queue_work(hostdata->work_q, &hostdata->main_task); 582 return 0; 583 } 584 585 static inline void maybe_release_dma_irq(struct Scsi_Host *instance) 586 { 587 struct NCR5380_hostdata *hostdata = shost_priv(instance); 588 589 /* Caller does the locking needed to set & test these data atomically */ 590 if (list_empty(&hostdata->disconnected) && 591 list_empty(&hostdata->unissued) && 592 list_empty(&hostdata->autosense) && 593 !hostdata->connected && 594 !hostdata->selecting) { 595 NCR5380_release_dma_irq(instance); 596 } 597 } 598 599 /** 600 * dequeue_next_cmd - dequeue a command for processing 601 * @instance: the scsi host instance 602 * 603 * Priority is given to commands on the autosense queue. These commands 604 * need autosense because of a CHECK CONDITION result. 605 * 606 * Returns a command pointer if a command is found for a target that is 607 * not already busy. Otherwise returns NULL. 608 */ 609 610 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) 611 { 612 struct NCR5380_hostdata *hostdata = shost_priv(instance); 613 struct NCR5380_cmd *ncmd; 614 struct scsi_cmnd *cmd; 615 616 if (hostdata->sensing || list_empty(&hostdata->autosense)) { 617 list_for_each_entry(ncmd, &hostdata->unissued, list) { 618 cmd = NCR5380_to_scmd(ncmd); 619 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", 620 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); 621 622 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { 623 list_del(&ncmd->list); 624 dsprintk(NDEBUG_QUEUES, instance, 625 "dequeue: removed %p from issue queue\n", cmd); 626 return cmd; 627 } 628 } 629 } else { 630 /* Autosense processing begins here */ 631 ncmd = list_first_entry(&hostdata->autosense, 632 struct NCR5380_cmd, list); 633 list_del(&ncmd->list); 634 cmd = NCR5380_to_scmd(ncmd); 635 dsprintk(NDEBUG_QUEUES, instance, 636 "dequeue: removed %p from autosense queue\n", cmd); 637 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); 638 hostdata->sensing = cmd; 639 return cmd; 640 } 641 return NULL; 642 } 643 644 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 645 { 646 struct NCR5380_hostdata *hostdata = shost_priv(instance); 647 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 648 649 if (hostdata->sensing == cmd) { 650 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 651 list_add(&ncmd->list, &hostdata->autosense); 652 hostdata->sensing = NULL; 653 } else 654 list_add(&ncmd->list, &hostdata->unissued); 655 } 656 657 /** 658 * NCR5380_main - NCR state machines 659 * 660 * NCR5380_main is a coroutine that runs as long as more work can 661 * be done on the NCR5380 host adapters in a system. Both 662 * NCR5380_queue_command() and NCR5380_intr() will try to start it 663 * in case it is not running. 664 */ 665 666 static void NCR5380_main(struct work_struct *work) 667 { 668 struct NCR5380_hostdata *hostdata = 669 container_of(work, struct NCR5380_hostdata, main_task); 670 struct Scsi_Host *instance = hostdata->host; 671 int done; 672 673 do { 674 done = 1; 675 676 spin_lock_irq(&hostdata->lock); 677 while (!hostdata->connected && !hostdata->selecting) { 678 struct scsi_cmnd *cmd = dequeue_next_cmd(instance); 679 680 if (!cmd) 681 break; 682 683 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); 684 685 /* 686 * Attempt to establish an I_T_L nexus here. 687 * On success, instance->hostdata->connected is set. 688 * On failure, we must add the command back to the 689 * issue queue so we can keep trying. 690 */ 691 /* 692 * REQUEST SENSE commands are issued without tagged 693 * queueing, even on SCSI-II devices because the 694 * contingent allegiance condition exists for the 695 * entire unit. 696 */ 697 698 if (!NCR5380_select(instance, cmd)) { 699 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); 700 maybe_release_dma_irq(instance); 701 } else { 702 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, 703 "main: select failed, returning %p to queue\n", cmd); 704 requeue_cmd(instance, cmd); 705 } 706 } 707 if (hostdata->connected && !hostdata->dma_len) { 708 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); 709 NCR5380_information_transfer(instance); 710 done = 0; 711 } 712 spin_unlock_irq(&hostdata->lock); 713 if (!done) 714 cond_resched(); 715 } while (!done); 716 } 717 718 /* 719 * NCR5380_dma_complete - finish DMA transfer 720 * @instance: the scsi host instance 721 * 722 * Called by the interrupt handler when DMA finishes or a phase 723 * mismatch occurs (which would end the DMA transfer). 724 */ 725 726 static void NCR5380_dma_complete(struct Scsi_Host *instance) 727 { 728 struct NCR5380_hostdata *hostdata = shost_priv(instance); 729 int transferred; 730 unsigned char **data; 731 int *count; 732 int saved_data = 0, overrun = 0; 733 unsigned char p; 734 735 if (hostdata->read_overruns) { 736 p = hostdata->connected->SCp.phase; 737 if (p & SR_IO) { 738 udelay(10); 739 if ((NCR5380_read(BUS_AND_STATUS_REG) & 740 (BASR_PHASE_MATCH | BASR_ACK)) == 741 (BASR_PHASE_MATCH | BASR_ACK)) { 742 saved_data = NCR5380_read(INPUT_DATA_REG); 743 overrun = 1; 744 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); 745 } 746 } 747 } 748 749 #ifdef CONFIG_SUN3 750 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { 751 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", 752 instance->host_no); 753 BUG(); 754 } 755 756 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == 757 (BASR_PHASE_MATCH | BASR_ACK)) { 758 pr_err("scsi%d: BASR %02x\n", instance->host_no, 759 NCR5380_read(BUS_AND_STATUS_REG)); 760 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", 761 instance->host_no); 762 BUG(); 763 } 764 #endif 765 766 NCR5380_write(MODE_REG, MR_BASE); 767 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 768 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 769 770 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); 771 hostdata->dma_len = 0; 772 773 data = (unsigned char **)&hostdata->connected->SCp.ptr; 774 count = &hostdata->connected->SCp.this_residual; 775 *data += transferred; 776 *count -= transferred; 777 778 if (hostdata->read_overruns) { 779 int cnt, toPIO; 780 781 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { 782 cnt = toPIO = hostdata->read_overruns; 783 if (overrun) { 784 dsprintk(NDEBUG_DMA, instance, 785 "Got an input overrun, using saved byte\n"); 786 *(*data)++ = saved_data; 787 (*count)--; 788 cnt--; 789 toPIO--; 790 } 791 if (toPIO > 0) { 792 dsprintk(NDEBUG_DMA, instance, 793 "Doing %d byte PIO to 0x%p\n", cnt, *data); 794 NCR5380_transfer_pio(instance, &p, &cnt, data); 795 *count -= toPIO - cnt; 796 } 797 } 798 } 799 } 800 801 /** 802 * NCR5380_intr - generic NCR5380 irq handler 803 * @irq: interrupt number 804 * @dev_id: device info 805 * 806 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses 807 * from the disconnected queue, and restarting NCR5380_main() 808 * as required. 809 * 810 * The chip can assert IRQ in any of six different conditions. The IRQ flag 811 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). 812 * Three of these six conditions are latched in the Bus and Status Register: 813 * - End of DMA (cleared by ending DMA Mode) 814 * - Parity error (cleared by reading RPIR) 815 * - Loss of BSY (cleared by reading RPIR) 816 * Two conditions have flag bits that are not latched: 817 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) 818 * - Bus reset (non-maskable) 819 * The remaining condition has no flag bit at all: 820 * - Selection/reselection 821 * 822 * Hence, establishing the cause(s) of any interrupt is partly guesswork. 823 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor 824 * claimed that "the design of the [DP8490] interrupt logic ensures 825 * interrupts will not be lost (they can be on the DP5380)." 826 * The L5380/53C80 datasheet from LOGIC Devices has more details. 827 * 828 * Checking for bus reset by reading RST is futile because of interrupt 829 * latency, but a bus reset will reset chip logic. Checking for parity error 830 * is unnecessary because that interrupt is never enabled. A Loss of BSY 831 * condition will clear DMA Mode. We can tell when this occurs because the 832 * the Busy Monitor interrupt is enabled together with DMA Mode. 833 */ 834 835 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) 836 { 837 struct Scsi_Host *instance = dev_id; 838 struct NCR5380_hostdata *hostdata = shost_priv(instance); 839 int handled = 0; 840 unsigned char basr; 841 unsigned long flags; 842 843 spin_lock_irqsave(&hostdata->lock, flags); 844 845 basr = NCR5380_read(BUS_AND_STATUS_REG); 846 if (basr & BASR_IRQ) { 847 unsigned char mr = NCR5380_read(MODE_REG); 848 unsigned char sr = NCR5380_read(STATUS_REG); 849 850 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", 851 irq, basr, sr, mr); 852 853 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { 854 /* Probably End of DMA, Phase Mismatch or Loss of BSY. 855 * We ack IRQ after clearing Mode Register. Workarounds 856 * for End of DMA errata need to happen in DMA Mode. 857 */ 858 859 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); 860 861 if (hostdata->connected) { 862 NCR5380_dma_complete(instance); 863 queue_work(hostdata->work_q, &hostdata->main_task); 864 } else { 865 NCR5380_write(MODE_REG, MR_BASE); 866 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 867 } 868 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && 869 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { 870 /* Probably reselected */ 871 NCR5380_write(SELECT_ENABLE_REG, 0); 872 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 873 874 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); 875 876 if (!hostdata->connected) { 877 NCR5380_reselect(instance); 878 queue_work(hostdata->work_q, &hostdata->main_task); 879 } 880 if (!hostdata->connected) 881 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 882 } else { 883 /* Probably Bus Reset */ 884 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 885 886 if (sr & SR_RST) { 887 /* Certainly Bus Reset */ 888 shost_printk(KERN_WARNING, instance, 889 "bus reset interrupt\n"); 890 bus_reset_cleanup(instance); 891 } else { 892 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); 893 } 894 #ifdef SUN3_SCSI_VME 895 dregs->csr |= CSR_DMA_ENABLE; 896 #endif 897 } 898 handled = 1; 899 } else { 900 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); 901 #ifdef SUN3_SCSI_VME 902 dregs->csr |= CSR_DMA_ENABLE; 903 #endif 904 } 905 906 spin_unlock_irqrestore(&hostdata->lock, flags); 907 908 return IRQ_RETVAL(handled); 909 } 910 911 /** 912 * NCR5380_select - attempt arbitration and selection for a given command 913 * @instance: the Scsi_Host instance 914 * @cmd: the scsi_cmnd to execute 915 * 916 * This routine establishes an I_T_L nexus for a SCSI command. This involves 917 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message. 918 * 919 * Returns true if the operation should be retried. 920 * Returns false if it should not be retried. 921 * 922 * Side effects : 923 * If bus busy, arbitration failed, etc, NCR5380_select() will exit 924 * with registers as they should have been on entry - ie 925 * SELECT_ENABLE will be set appropriately, the NCR5380 926 * will cease to drive any SCSI bus signals. 927 * 928 * If successful : the I_T_L nexus will be established, and 929 * hostdata->connected will be set to cmd. 930 * SELECT interrupt will be disabled. 931 * 932 * If failed (no target) : cmd->scsi_done() will be called, and the 933 * cmd->result host byte set to DID_BAD_TARGET. 934 */ 935 936 static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 937 __releases(&hostdata->lock) __acquires(&hostdata->lock) 938 { 939 struct NCR5380_hostdata *hostdata = shost_priv(instance); 940 unsigned char tmp[3], phase; 941 unsigned char *data; 942 int len; 943 int err; 944 bool ret = true; 945 bool can_disconnect = instance->irq != NO_IRQ && 946 cmd->cmnd[0] != REQUEST_SENSE; 947 948 NCR5380_dprint(NDEBUG_ARBITRATION, instance); 949 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", 950 instance->this_id); 951 952 /* 953 * Arbitration and selection phases are slow and involve dropping the 954 * lock, so we have to watch out for EH. An exception handler may 955 * change 'selecting' to NULL. This function will then return false 956 * so that the caller will forget about 'cmd'. (During information 957 * transfer phases, EH may change 'connected' to NULL.) 958 */ 959 hostdata->selecting = cmd; 960 961 /* 962 * Set the phase bits to 0, otherwise the NCR5380 won't drive the 963 * data bus during SELECTION. 964 */ 965 966 NCR5380_write(TARGET_COMMAND_REG, 0); 967 968 /* 969 * Start arbitration. 970 */ 971 972 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 973 NCR5380_write(MODE_REG, MR_ARBITRATE); 974 975 /* The chip now waits for BUS FREE phase. Then after the 800 ns 976 * Bus Free Delay, arbitration will begin. 977 */ 978 979 spin_unlock_irq(&hostdata->lock); 980 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, 981 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, 982 ICR_ARBITRATION_PROGRESS, HZ); 983 spin_lock_irq(&hostdata->lock); 984 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { 985 /* Reselection interrupt */ 986 goto out; 987 } 988 if (!hostdata->selecting) { 989 /* Command was aborted */ 990 NCR5380_write(MODE_REG, MR_BASE); 991 return false; 992 } 993 if (err < 0) { 994 NCR5380_write(MODE_REG, MR_BASE); 995 shost_printk(KERN_ERR, instance, 996 "select: arbitration timeout\n"); 997 goto out; 998 } 999 spin_unlock_irq(&hostdata->lock); 1000 1001 /* The SCSI-2 arbitration delay is 2.4 us */ 1002 udelay(3); 1003 1004 /* Check for lost arbitration */ 1005 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || 1006 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || 1007 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { 1008 NCR5380_write(MODE_REG, MR_BASE); 1009 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); 1010 spin_lock_irq(&hostdata->lock); 1011 goto out; 1012 } 1013 1014 /* After/during arbitration, BSY should be asserted. 1015 * IBM DPES-31080 Version S31Q works now 1016 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) 1017 */ 1018 NCR5380_write(INITIATOR_COMMAND_REG, 1019 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); 1020 1021 /* 1022 * Again, bus clear + bus settle time is 1.2us, however, this is 1023 * a minimum so we'll udelay ceil(1.2) 1024 */ 1025 1026 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 1027 udelay(15); 1028 else 1029 udelay(2); 1030 1031 spin_lock_irq(&hostdata->lock); 1032 1033 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ 1034 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) 1035 goto out; 1036 1037 if (!hostdata->selecting) { 1038 NCR5380_write(MODE_REG, MR_BASE); 1039 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1040 return false; 1041 } 1042 1043 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); 1044 1045 /* 1046 * Now that we have won arbitration, start Selection process, asserting 1047 * the host and target ID's on the SCSI bus. 1048 */ 1049 1050 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); 1051 1052 /* 1053 * Raise ATN while SEL is true before BSY goes false from arbitration, 1054 * since this is the only way to guarantee that we'll get a MESSAGE OUT 1055 * phase immediately after selection. 1056 */ 1057 1058 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | 1059 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1060 NCR5380_write(MODE_REG, MR_BASE); 1061 1062 /* 1063 * Reselect interrupts must be turned off prior to the dropping of BSY, 1064 * otherwise we will trigger an interrupt. 1065 */ 1066 NCR5380_write(SELECT_ENABLE_REG, 0); 1067 1068 spin_unlock_irq(&hostdata->lock); 1069 1070 /* 1071 * The initiator shall then wait at least two deskew delays and release 1072 * the BSY signal. 1073 */ 1074 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ 1075 1076 /* Reset BSY */ 1077 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | 1078 ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1079 1080 /* 1081 * Something weird happens when we cease to drive BSY - looks 1082 * like the board/chip is letting us do another read before the 1083 * appropriate propagation delay has expired, and we're confusing 1084 * a BSY signal from ourselves as the target's response to SELECTION. 1085 * 1086 * A small delay (the 'C++' frontend breaks the pipeline with an 1087 * unnecessary jump, making it work on my 386-33/Trantor T128, the 1088 * tighter 'C' code breaks and requires this) solves the problem - 1089 * the 1 us delay is arbitrary, and only used because this delay will 1090 * be the same on other platforms and since it works here, it should 1091 * work there. 1092 * 1093 * wingel suggests that this could be due to failing to wait 1094 * one deskew delay. 1095 */ 1096 1097 udelay(1); 1098 1099 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); 1100 1101 /* 1102 * The SCSI specification calls for a 250 ms timeout for the actual 1103 * selection. 1104 */ 1105 1106 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, 1107 msecs_to_jiffies(250)); 1108 1109 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { 1110 spin_lock_irq(&hostdata->lock); 1111 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1112 NCR5380_reselect(instance); 1113 if (!hostdata->connected) 1114 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1115 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); 1116 goto out; 1117 } 1118 1119 if (err < 0) { 1120 spin_lock_irq(&hostdata->lock); 1121 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1122 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1123 1124 /* Can't touch cmd if it has been reclaimed by the scsi ML */ 1125 if (!hostdata->selecting) 1126 return false; 1127 1128 cmd->result = DID_BAD_TARGET << 16; 1129 complete_cmd(instance, cmd); 1130 dsprintk(NDEBUG_SELECTION, instance, 1131 "target did not respond within 250ms\n"); 1132 ret = false; 1133 goto out; 1134 } 1135 1136 /* 1137 * No less than two deskew delays after the initiator detects the 1138 * BSY signal is true, it shall release the SEL signal and may 1139 * change the DATA BUS. -wingel 1140 */ 1141 1142 udelay(1); 1143 1144 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1145 1146 /* 1147 * Since we followed the SCSI spec, and raised ATN while SEL 1148 * was true but before BSY was false during selection, the information 1149 * transfer phase should be a MESSAGE OUT phase so that we can send the 1150 * IDENTIFY message. 1151 */ 1152 1153 /* Wait for start of REQ/ACK handshake */ 1154 1155 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 1156 spin_lock_irq(&hostdata->lock); 1157 if (err < 0) { 1158 shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); 1159 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1160 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1161 goto out; 1162 } 1163 if (!hostdata->selecting) { 1164 do_abort(instance); 1165 return false; 1166 } 1167 1168 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", 1169 scmd_id(cmd)); 1170 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun); 1171 1172 len = 1; 1173 data = tmp; 1174 phase = PHASE_MSGOUT; 1175 NCR5380_transfer_pio(instance, &phase, &len, &data); 1176 if (len) { 1177 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1178 cmd->result = DID_ERROR << 16; 1179 complete_cmd(instance, cmd); 1180 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n"); 1181 ret = false; 1182 goto out; 1183 } 1184 1185 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); 1186 1187 hostdata->connected = cmd; 1188 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; 1189 1190 #ifdef SUN3_SCSI_VME 1191 dregs->csr |= CSR_INTR; 1192 #endif 1193 1194 initialize_SCp(cmd); 1195 1196 ret = false; 1197 1198 out: 1199 if (!hostdata->selecting) 1200 return false; 1201 hostdata->selecting = NULL; 1202 return ret; 1203 } 1204 1205 /* 1206 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, 1207 * unsigned char *phase, int *count, unsigned char **data) 1208 * 1209 * Purpose : transfers data in given phase using polled I/O 1210 * 1211 * Inputs : instance - instance of driver, *phase - pointer to 1212 * what phase is expected, *count - pointer to number of 1213 * bytes to transfer, **data - pointer to data pointer. 1214 * 1215 * Returns : -1 when different phase is entered without transferring 1216 * maximum number of bytes, 0 if all bytes are transferred or exit 1217 * is in same phase. 1218 * 1219 * Also, *phase, *count, *data are modified in place. 1220 * 1221 * XXX Note : handling for bus free may be useful. 1222 */ 1223 1224 /* 1225 * Note : this code is not as quick as it could be, however it 1226 * IS 100% reliable, and for the actual data transfer where speed 1227 * counts, we will always do a pseudo DMA or DMA transfer. 1228 */ 1229 1230 static int NCR5380_transfer_pio(struct Scsi_Host *instance, 1231 unsigned char *phase, int *count, 1232 unsigned char **data) 1233 { 1234 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1235 unsigned char p = *phase, tmp; 1236 int c = *count; 1237 unsigned char *d = *data; 1238 1239 /* 1240 * The NCR5380 chip will only drive the SCSI bus when the 1241 * phase specified in the appropriate bits of the TARGET COMMAND 1242 * REGISTER match the STATUS REGISTER 1243 */ 1244 1245 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1246 1247 do { 1248 /* 1249 * Wait for assertion of REQ, after which the phase bits will be 1250 * valid 1251 */ 1252 1253 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) 1254 break; 1255 1256 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); 1257 1258 /* Check for phase mismatch */ 1259 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { 1260 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); 1261 NCR5380_dprint_phase(NDEBUG_PIO, instance); 1262 break; 1263 } 1264 1265 /* Do actual transfer from SCSI bus to / from memory */ 1266 if (!(p & SR_IO)) 1267 NCR5380_write(OUTPUT_DATA_REG, *d); 1268 else 1269 *d = NCR5380_read(CURRENT_SCSI_DATA_REG); 1270 1271 ++d; 1272 1273 /* 1274 * The SCSI standard suggests that in MSGOUT phase, the initiator 1275 * should drop ATN on the last byte of the message phase 1276 * after REQ has been asserted for the handshake but before 1277 * the initiator raises ACK. 1278 */ 1279 1280 if (!(p & SR_IO)) { 1281 if (!((p & SR_MSG) && c > 1)) { 1282 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1283 NCR5380_dprint(NDEBUG_PIO, instance); 1284 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1285 ICR_ASSERT_DATA | ICR_ASSERT_ACK); 1286 } else { 1287 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1288 ICR_ASSERT_DATA | ICR_ASSERT_ATN); 1289 NCR5380_dprint(NDEBUG_PIO, instance); 1290 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1291 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1292 } 1293 } else { 1294 NCR5380_dprint(NDEBUG_PIO, instance); 1295 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 1296 } 1297 1298 if (NCR5380_poll_politely(hostdata, 1299 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) 1300 break; 1301 1302 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); 1303 1304 /* 1305 * We have several special cases to consider during REQ/ACK handshaking : 1306 * 1. We were in MSGOUT phase, and we are on the last byte of the 1307 * message. ATN must be dropped as ACK is dropped. 1308 * 1309 * 2. We are in a MSGIN phase, and we are on the last byte of the 1310 * message. We must exit with ACK asserted, so that the calling 1311 * code may raise ATN before dropping ACK to reject the message. 1312 * 1313 * 3. ACK and ATN are clear and the target may proceed as normal. 1314 */ 1315 if (!(p == PHASE_MSGIN && c == 1)) { 1316 if (p == PHASE_MSGOUT && c > 1) 1317 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1318 else 1319 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1320 } 1321 } while (--c); 1322 1323 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); 1324 1325 *count = c; 1326 *data = d; 1327 tmp = NCR5380_read(STATUS_REG); 1328 /* The phase read from the bus is valid if either REQ is (already) 1329 * asserted or if ACK hasn't been released yet. The latter applies if 1330 * we're in MSG IN, DATA IN or STATUS and all bytes have been received. 1331 */ 1332 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) 1333 *phase = tmp & PHASE_MASK; 1334 else 1335 *phase = PHASE_UNKNOWN; 1336 1337 if (!c || (*phase == p)) 1338 return 0; 1339 else 1340 return -1; 1341 } 1342 1343 /** 1344 * do_reset - issue a reset command 1345 * @instance: adapter to reset 1346 * 1347 * Issue a reset sequence to the NCR5380 and try and get the bus 1348 * back into sane shape. 1349 * 1350 * This clears the reset interrupt flag because there may be no handler for 1351 * it. When the driver is initialized, the NCR5380_intr() handler has not yet 1352 * been installed. And when in EH we may have released the ST DMA interrupt. 1353 */ 1354 1355 static void do_reset(struct Scsi_Host *instance) 1356 { 1357 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); 1358 unsigned long flags; 1359 1360 local_irq_save(flags); 1361 NCR5380_write(TARGET_COMMAND_REG, 1362 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); 1363 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); 1364 udelay(50); 1365 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1366 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); 1367 local_irq_restore(flags); 1368 } 1369 1370 /** 1371 * do_abort - abort the currently established nexus by going to 1372 * MESSAGE OUT phase and sending an ABORT message. 1373 * @instance: relevant scsi host instance 1374 * 1375 * Returns 0 on success, -1 on failure. 1376 */ 1377 1378 static int do_abort(struct Scsi_Host *instance) 1379 { 1380 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1381 unsigned char *msgptr, phase, tmp; 1382 int len; 1383 int rc; 1384 1385 /* Request message out phase */ 1386 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1387 1388 /* 1389 * Wait for the target to indicate a valid phase by asserting 1390 * REQ. Once this happens, we'll have either a MSGOUT phase 1391 * and can immediately send the ABORT message, or we'll have some 1392 * other phase and will have to source/sink data. 1393 * 1394 * We really don't care what value was on the bus or what value 1395 * the target sees, so we just handshake. 1396 */ 1397 1398 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); 1399 if (rc < 0) 1400 goto timeout; 1401 1402 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; 1403 1404 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1405 1406 if (tmp != PHASE_MSGOUT) { 1407 NCR5380_write(INITIATOR_COMMAND_REG, 1408 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1409 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); 1410 if (rc < 0) 1411 goto timeout; 1412 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1413 } 1414 1415 tmp = ABORT; 1416 msgptr = &tmp; 1417 len = 1; 1418 phase = PHASE_MSGOUT; 1419 NCR5380_transfer_pio(instance, &phase, &len, &msgptr); 1420 1421 /* 1422 * If we got here, and the command completed successfully, 1423 * we're about to go into bus free state. 1424 */ 1425 1426 return len ? -1 : 0; 1427 1428 timeout: 1429 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1430 return -1; 1431 } 1432 1433 /* 1434 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, 1435 * unsigned char *phase, int *count, unsigned char **data) 1436 * 1437 * Purpose : transfers data in given phase using either real 1438 * or pseudo DMA. 1439 * 1440 * Inputs : instance - instance of driver, *phase - pointer to 1441 * what phase is expected, *count - pointer to number of 1442 * bytes to transfer, **data - pointer to data pointer. 1443 * 1444 * Returns : -1 when different phase is entered without transferring 1445 * maximum number of bytes, 0 if all bytes or transferred or exit 1446 * is in same phase. 1447 * 1448 * Also, *phase, *count, *data are modified in place. 1449 */ 1450 1451 1452 static int NCR5380_transfer_dma(struct Scsi_Host *instance, 1453 unsigned char *phase, int *count, 1454 unsigned char **data) 1455 { 1456 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1457 int c = *count; 1458 unsigned char p = *phase; 1459 unsigned char *d = *data; 1460 unsigned char tmp; 1461 int result = 0; 1462 1463 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { 1464 *phase = tmp; 1465 return -1; 1466 } 1467 1468 hostdata->connected->SCp.phase = p; 1469 1470 if (p & SR_IO) { 1471 if (hostdata->read_overruns) 1472 c -= hostdata->read_overruns; 1473 else if (hostdata->flags & FLAG_DMA_FIXUP) 1474 --c; 1475 } 1476 1477 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", 1478 (p & SR_IO) ? "receive" : "send", c, d); 1479 1480 #ifdef CONFIG_SUN3 1481 /* send start chain */ 1482 sun3scsi_dma_start(c, *data); 1483 #endif 1484 1485 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1486 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | 1487 MR_ENABLE_EOP_INTR); 1488 1489 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { 1490 /* On the Medusa, it is a must to initialize the DMA before 1491 * starting the NCR. This is also the cleaner way for the TT. 1492 */ 1493 if (p & SR_IO) 1494 result = NCR5380_dma_recv_setup(hostdata, d, c); 1495 else 1496 result = NCR5380_dma_send_setup(hostdata, d, c); 1497 } 1498 1499 /* 1500 * On the PAS16 at least I/O recovery delays are not needed here. 1501 * Everyone else seems to want them. 1502 */ 1503 1504 if (p & SR_IO) { 1505 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1506 NCR5380_io_delay(1); 1507 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); 1508 } else { 1509 NCR5380_io_delay(1); 1510 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1511 NCR5380_io_delay(1); 1512 NCR5380_write(START_DMA_SEND_REG, 0); 1513 NCR5380_io_delay(1); 1514 } 1515 1516 #ifdef CONFIG_SUN3 1517 #ifdef SUN3_SCSI_VME 1518 dregs->csr |= CSR_DMA_ENABLE; 1519 #endif 1520 sun3_dma_active = 1; 1521 #endif 1522 1523 if (hostdata->flags & FLAG_LATE_DMA_SETUP) { 1524 /* On the Falcon, the DMA setup must be done after the last 1525 * NCR access, else the DMA setup gets trashed! 1526 */ 1527 if (p & SR_IO) 1528 result = NCR5380_dma_recv_setup(hostdata, d, c); 1529 else 1530 result = NCR5380_dma_send_setup(hostdata, d, c); 1531 } 1532 1533 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ 1534 if (result < 0) 1535 return result; 1536 1537 /* For real DMA, result is the byte count. DMA interrupt is expected. */ 1538 if (result > 0) { 1539 hostdata->dma_len = result; 1540 return 0; 1541 } 1542 1543 /* The result is zero iff pseudo DMA send/receive was completed. */ 1544 hostdata->dma_len = c; 1545 1546 /* 1547 * A note regarding the DMA errata workarounds for early NMOS silicon. 1548 * 1549 * For DMA sends, we want to wait until the last byte has been 1550 * transferred out over the bus before we turn off DMA mode. Alas, there 1551 * seems to be no terribly good way of doing this on a 5380 under all 1552 * conditions. For non-scatter-gather operations, we can wait until REQ 1553 * and ACK both go false, or until a phase mismatch occurs. Gather-sends 1554 * are nastier, since the device will be expecting more data than we 1555 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we 1556 * could test Last Byte Sent to assure transfer (I imagine this is precisely 1557 * why this signal was added to the newer chips) but on the older 538[01] 1558 * this signal does not exist. The workaround for this lack is a watchdog; 1559 * we bail out of the wait-loop after a modest amount of wait-time if 1560 * the usual exit conditions are not met. Not a terribly clean or 1561 * correct solution :-% 1562 * 1563 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. 1564 * If the chip is in DMA receive mode, it will respond to a target's 1565 * REQ by latching the SCSI data into the INPUT DATA register and asserting 1566 * ACK, even if it has _already_ been notified by the DMA controller that 1567 * the current DMA transfer has completed! If the NCR5380 is then taken 1568 * out of DMA mode, this already-acknowledged byte is lost. This is 1569 * not a problem for "one DMA transfer per READ command", because 1570 * the situation will never arise... either all of the data is DMA'ed 1571 * properly, or the target switches to MESSAGE IN phase to signal a 1572 * disconnection (either operation bringing the DMA to a clean halt). 1573 * However, in order to handle scatter-receive, we must work around the 1574 * problem. The chosen fix is to DMA fewer bytes, then check for the 1575 * condition before taking the NCR5380 out of DMA mode. One or two extra 1576 * bytes are transferred via PIO as necessary to fill out the original 1577 * request. 1578 */ 1579 1580 if (hostdata->flags & FLAG_DMA_FIXUP) { 1581 if (p & SR_IO) { 1582 /* 1583 * The workaround was to transfer fewer bytes than we 1584 * intended to with the pseudo-DMA read function, wait for 1585 * the chip to latch the last byte, read it, and then disable 1586 * pseudo-DMA mode. 1587 * 1588 * After REQ is asserted, the NCR5380 asserts DRQ and ACK. 1589 * REQ is deasserted when ACK is asserted, and not reasserted 1590 * until ACK goes false. Since the NCR5380 won't lower ACK 1591 * until DACK is asserted, which won't happen unless we twiddle 1592 * the DMA port or we take the NCR5380 out of DMA mode, we 1593 * can guarantee that we won't handshake another extra 1594 * byte. 1595 */ 1596 1597 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, 1598 BASR_DRQ, BASR_DRQ, HZ) < 0) { 1599 result = -1; 1600 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); 1601 } 1602 if (NCR5380_poll_politely(hostdata, STATUS_REG, 1603 SR_REQ, 0, HZ) < 0) { 1604 result = -1; 1605 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); 1606 } 1607 d[*count - 1] = NCR5380_read(INPUT_DATA_REG); 1608 } else { 1609 /* 1610 * Wait for the last byte to be sent. If REQ is being asserted for 1611 * the byte we're interested, we'll ACK it and it will go false. 1612 */ 1613 if (NCR5380_poll_politely2(hostdata, 1614 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, 1615 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { 1616 result = -1; 1617 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); 1618 } 1619 } 1620 } 1621 1622 NCR5380_dma_complete(instance); 1623 return result; 1624 } 1625 1626 /* 1627 * Function : NCR5380_information_transfer (struct Scsi_Host *instance) 1628 * 1629 * Purpose : run through the various SCSI phases and do as the target 1630 * directs us to. Operates on the currently connected command, 1631 * instance->connected. 1632 * 1633 * Inputs : instance, instance for which we are doing commands 1634 * 1635 * Side effects : SCSI things happen, the disconnected queue will be 1636 * modified if a command disconnects, *instance->connected will 1637 * change. 1638 * 1639 * XXX Note : we need to watch for bus free or a reset condition here 1640 * to recover from an unexpected bus free condition. 1641 */ 1642 1643 static void NCR5380_information_transfer(struct Scsi_Host *instance) 1644 __releases(&hostdata->lock) __acquires(&hostdata->lock) 1645 { 1646 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1647 unsigned char msgout = NOP; 1648 int sink = 0; 1649 int len; 1650 int transfersize; 1651 unsigned char *data; 1652 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; 1653 struct scsi_cmnd *cmd; 1654 1655 #ifdef SUN3_SCSI_VME 1656 dregs->csr |= CSR_INTR; 1657 #endif 1658 1659 while ((cmd = hostdata->connected)) { 1660 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 1661 1662 tmp = NCR5380_read(STATUS_REG); 1663 /* We only have a valid SCSI phase when REQ is asserted */ 1664 if (tmp & SR_REQ) { 1665 phase = (tmp & PHASE_MASK); 1666 if (phase != old_phase) { 1667 old_phase = phase; 1668 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); 1669 } 1670 #ifdef CONFIG_SUN3 1671 if (phase == PHASE_CMDOUT && 1672 sun3_dma_setup_done != cmd) { 1673 int count; 1674 1675 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1676 ++cmd->SCp.buffer; 1677 --cmd->SCp.buffers_residual; 1678 cmd->SCp.this_residual = cmd->SCp.buffer->length; 1679 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 1680 } 1681 1682 count = sun3scsi_dma_xfer_len(hostdata, cmd); 1683 1684 if (count > 0) { 1685 if (rq_data_dir(cmd->request)) 1686 sun3scsi_dma_send_setup(hostdata, 1687 cmd->SCp.ptr, count); 1688 else 1689 sun3scsi_dma_recv_setup(hostdata, 1690 cmd->SCp.ptr, count); 1691 sun3_dma_setup_done = cmd; 1692 } 1693 #ifdef SUN3_SCSI_VME 1694 dregs->csr |= CSR_INTR; 1695 #endif 1696 } 1697 #endif /* CONFIG_SUN3 */ 1698 1699 if (sink && (phase != PHASE_MSGOUT)) { 1700 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1701 1702 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 1703 ICR_ASSERT_ACK); 1704 while (NCR5380_read(STATUS_REG) & SR_REQ) 1705 ; 1706 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1707 ICR_ASSERT_ATN); 1708 sink = 0; 1709 continue; 1710 } 1711 1712 switch (phase) { 1713 case PHASE_DATAOUT: 1714 #if (NDEBUG & NDEBUG_NO_DATAOUT) 1715 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); 1716 sink = 1; 1717 do_abort(instance); 1718 cmd->result = DID_ERROR << 16; 1719 complete_cmd(instance, cmd); 1720 hostdata->connected = NULL; 1721 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1722 return; 1723 #endif 1724 case PHASE_DATAIN: 1725 /* 1726 * If there is no room left in the current buffer in the 1727 * scatter-gather list, move onto the next one. 1728 */ 1729 1730 if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) { 1731 ++cmd->SCp.buffer; 1732 --cmd->SCp.buffers_residual; 1733 cmd->SCp.this_residual = cmd->SCp.buffer->length; 1734 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 1735 dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n", 1736 cmd->SCp.this_residual, 1737 cmd->SCp.buffers_residual); 1738 } 1739 1740 /* 1741 * The preferred transfer method is going to be 1742 * PSEUDO-DMA for systems that are strictly PIO, 1743 * since we can let the hardware do the handshaking. 1744 * 1745 * For this to work, we need to know the transfersize 1746 * ahead of time, since the pseudo-DMA code will sit 1747 * in an unconditional loop. 1748 */ 1749 1750 transfersize = 0; 1751 if (!cmd->device->borken) 1752 transfersize = NCR5380_dma_xfer_len(hostdata, cmd); 1753 1754 if (transfersize > 0) { 1755 len = transfersize; 1756 if (NCR5380_transfer_dma(instance, &phase, 1757 &len, (unsigned char **)&cmd->SCp.ptr)) { 1758 /* 1759 * If the watchdog timer fires, all future 1760 * accesses to this device will use the 1761 * polled-IO. 1762 */ 1763 scmd_printk(KERN_INFO, cmd, 1764 "switching to slow handshake\n"); 1765 cmd->device->borken = 1; 1766 sink = 1; 1767 do_abort(instance); 1768 cmd->result = DID_ERROR << 16; 1769 /* XXX - need to source or sink data here, as appropriate */ 1770 } 1771 } else { 1772 /* Transfer a small chunk so that the 1773 * irq mode lock is not held too long. 1774 */ 1775 transfersize = min(cmd->SCp.this_residual, 1776 NCR5380_PIO_CHUNK_SIZE); 1777 len = transfersize; 1778 NCR5380_transfer_pio(instance, &phase, &len, 1779 (unsigned char **)&cmd->SCp.ptr); 1780 cmd->SCp.this_residual -= transfersize - len; 1781 } 1782 #ifdef CONFIG_SUN3 1783 if (sun3_dma_setup_done == cmd) 1784 sun3_dma_setup_done = NULL; 1785 #endif 1786 return; 1787 case PHASE_MSGIN: 1788 len = 1; 1789 data = &tmp; 1790 NCR5380_transfer_pio(instance, &phase, &len, &data); 1791 cmd->SCp.Message = tmp; 1792 1793 switch (tmp) { 1794 case ABORT: 1795 case COMMAND_COMPLETE: 1796 /* Accept message by clearing ACK */ 1797 sink = 1; 1798 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1799 dsprintk(NDEBUG_QUEUES, instance, 1800 "COMMAND COMPLETE %p target %d lun %llu\n", 1801 cmd, scmd_id(cmd), cmd->device->lun); 1802 1803 hostdata->connected = NULL; 1804 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1805 1806 cmd->result &= ~0xffff; 1807 cmd->result |= cmd->SCp.Status; 1808 cmd->result |= cmd->SCp.Message << 8; 1809 1810 if (cmd->cmnd[0] == REQUEST_SENSE) 1811 complete_cmd(instance, cmd); 1812 else { 1813 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || 1814 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { 1815 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", 1816 cmd); 1817 list_add_tail(&ncmd->list, 1818 &hostdata->autosense); 1819 } else 1820 complete_cmd(instance, cmd); 1821 } 1822 1823 /* 1824 * Restore phase bits to 0 so an interrupted selection, 1825 * arbitration can resume. 1826 */ 1827 NCR5380_write(TARGET_COMMAND_REG, 0); 1828 1829 /* Enable reselect interrupts */ 1830 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1831 1832 maybe_release_dma_irq(instance); 1833 return; 1834 case MESSAGE_REJECT: 1835 /* Accept message by clearing ACK */ 1836 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1837 switch (hostdata->last_message) { 1838 case HEAD_OF_QUEUE_TAG: 1839 case ORDERED_QUEUE_TAG: 1840 case SIMPLE_QUEUE_TAG: 1841 cmd->device->simple_tags = 0; 1842 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); 1843 break; 1844 default: 1845 break; 1846 } 1847 break; 1848 case DISCONNECT: 1849 /* Accept message by clearing ACK */ 1850 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1851 hostdata->connected = NULL; 1852 list_add(&ncmd->list, &hostdata->disconnected); 1853 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, 1854 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", 1855 cmd, scmd_id(cmd), cmd->device->lun); 1856 1857 /* 1858 * Restore phase bits to 0 so an interrupted selection, 1859 * arbitration can resume. 1860 */ 1861 NCR5380_write(TARGET_COMMAND_REG, 0); 1862 1863 /* Enable reselect interrupts */ 1864 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1865 #ifdef SUN3_SCSI_VME 1866 dregs->csr |= CSR_DMA_ENABLE; 1867 #endif 1868 return; 1869 /* 1870 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect 1871 * operation, in violation of the SCSI spec so we can safely 1872 * ignore SAVE/RESTORE pointers calls. 1873 * 1874 * Unfortunately, some disks violate the SCSI spec and 1875 * don't issue the required SAVE_POINTERS message before 1876 * disconnecting, and we have to break spec to remain 1877 * compatible. 1878 */ 1879 case SAVE_POINTERS: 1880 case RESTORE_POINTERS: 1881 /* Accept message by clearing ACK */ 1882 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1883 break; 1884 case EXTENDED_MESSAGE: 1885 /* 1886 * Start the message buffer with the EXTENDED_MESSAGE 1887 * byte, since spi_print_msg() wants the whole thing. 1888 */ 1889 extended_msg[0] = EXTENDED_MESSAGE; 1890 /* Accept first byte by clearing ACK */ 1891 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1892 1893 spin_unlock_irq(&hostdata->lock); 1894 1895 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); 1896 1897 len = 2; 1898 data = extended_msg + 1; 1899 phase = PHASE_MSGIN; 1900 NCR5380_transfer_pio(instance, &phase, &len, &data); 1901 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", 1902 (int)extended_msg[1], 1903 (int)extended_msg[2]); 1904 1905 if (!len && extended_msg[1] > 0 && 1906 extended_msg[1] <= sizeof(extended_msg) - 2) { 1907 /* Accept third byte by clearing ACK */ 1908 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1909 len = extended_msg[1] - 1; 1910 data = extended_msg + 3; 1911 phase = PHASE_MSGIN; 1912 1913 NCR5380_transfer_pio(instance, &phase, &len, &data); 1914 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", 1915 len); 1916 1917 switch (extended_msg[2]) { 1918 case EXTENDED_SDTR: 1919 case EXTENDED_WDTR: 1920 tmp = 0; 1921 } 1922 } else if (len) { 1923 shost_printk(KERN_ERR, instance, "error receiving extended message\n"); 1924 tmp = 0; 1925 } else { 1926 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", 1927 extended_msg[2], extended_msg[1]); 1928 tmp = 0; 1929 } 1930 1931 spin_lock_irq(&hostdata->lock); 1932 if (!hostdata->connected) 1933 return; 1934 1935 /* Reject message */ 1936 /* Fall through */ 1937 default: 1938 /* 1939 * If we get something weird that we aren't expecting, 1940 * log it. 1941 */ 1942 if (tmp == EXTENDED_MESSAGE) 1943 scmd_printk(KERN_INFO, cmd, 1944 "rejecting unknown extended message code %02x, length %d\n", 1945 extended_msg[2], extended_msg[1]); 1946 else if (tmp) 1947 scmd_printk(KERN_INFO, cmd, 1948 "rejecting unknown message code %02x\n", 1949 tmp); 1950 1951 msgout = MESSAGE_REJECT; 1952 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1953 break; 1954 } /* switch (tmp) */ 1955 break; 1956 case PHASE_MSGOUT: 1957 len = 1; 1958 data = &msgout; 1959 hostdata->last_message = msgout; 1960 NCR5380_transfer_pio(instance, &phase, &len, &data); 1961 if (msgout == ABORT) { 1962 hostdata->connected = NULL; 1963 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1964 cmd->result = DID_ERROR << 16; 1965 complete_cmd(instance, cmd); 1966 maybe_release_dma_irq(instance); 1967 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 1968 return; 1969 } 1970 msgout = NOP; 1971 break; 1972 case PHASE_CMDOUT: 1973 len = cmd->cmd_len; 1974 data = cmd->cmnd; 1975 /* 1976 * XXX for performance reasons, on machines with a 1977 * PSEUDO-DMA architecture we should probably 1978 * use the dma transfer function. 1979 */ 1980 NCR5380_transfer_pio(instance, &phase, &len, &data); 1981 break; 1982 case PHASE_STATIN: 1983 len = 1; 1984 data = &tmp; 1985 NCR5380_transfer_pio(instance, &phase, &len, &data); 1986 cmd->SCp.Status = tmp; 1987 break; 1988 default: 1989 shost_printk(KERN_ERR, instance, "unknown phase\n"); 1990 NCR5380_dprint(NDEBUG_ANY, instance); 1991 } /* switch(phase) */ 1992 } else { 1993 spin_unlock_irq(&hostdata->lock); 1994 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 1995 spin_lock_irq(&hostdata->lock); 1996 } 1997 } 1998 } 1999 2000 /* 2001 * Function : void NCR5380_reselect (struct Scsi_Host *instance) 2002 * 2003 * Purpose : does reselection, initializing the instance->connected 2004 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q 2005 * nexus has been reestablished, 2006 * 2007 * Inputs : instance - this instance of the NCR5380. 2008 */ 2009 2010 static void NCR5380_reselect(struct Scsi_Host *instance) 2011 { 2012 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2013 unsigned char target_mask; 2014 unsigned char lun; 2015 unsigned char msg[3]; 2016 struct NCR5380_cmd *ncmd; 2017 struct scsi_cmnd *tmp; 2018 2019 /* 2020 * Disable arbitration, etc. since the host adapter obviously 2021 * lost, and tell an interrupted NCR5380_select() to restart. 2022 */ 2023 2024 NCR5380_write(MODE_REG, MR_BASE); 2025 2026 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); 2027 if (!target_mask || target_mask & (target_mask - 1)) { 2028 shost_printk(KERN_WARNING, instance, 2029 "reselect: bad target_mask 0x%02x\n", target_mask); 2030 return; 2031 } 2032 2033 /* 2034 * At this point, we have detected that our SCSI ID is on the bus, 2035 * SEL is true and BSY was false for at least one bus settle delay 2036 * (400 ns). 2037 * 2038 * We must assert BSY ourselves, until the target drops the SEL 2039 * signal. 2040 */ 2041 2042 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); 2043 if (NCR5380_poll_politely(hostdata, 2044 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { 2045 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n"); 2046 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2047 return; 2048 } 2049 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2050 2051 /* 2052 * Wait for target to go into MSGIN. 2053 */ 2054 2055 if (NCR5380_poll_politely(hostdata, 2056 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { 2057 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0) 2058 /* BUS FREE phase */ 2059 return; 2060 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n"); 2061 do_abort(instance); 2062 return; 2063 } 2064 2065 #ifdef CONFIG_SUN3 2066 /* acknowledge toggle to MSGIN */ 2067 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); 2068 2069 /* peek at the byte without really hitting the bus */ 2070 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); 2071 #else 2072 { 2073 int len = 1; 2074 unsigned char *data = msg; 2075 unsigned char phase = PHASE_MSGIN; 2076 2077 NCR5380_transfer_pio(instance, &phase, &len, &data); 2078 2079 if (len) { 2080 do_abort(instance); 2081 return; 2082 } 2083 } 2084 #endif /* CONFIG_SUN3 */ 2085 2086 if (!(msg[0] & 0x80)) { 2087 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); 2088 spi_print_msg(msg); 2089 printk("\n"); 2090 do_abort(instance); 2091 return; 2092 } 2093 lun = msg[0] & 0x07; 2094 2095 /* 2096 * We need to add code for SCSI-II to track which devices have 2097 * I_T_L_Q nexuses established, and which have simple I_T_L 2098 * nexuses so we can chose to do additional data transfer. 2099 */ 2100 2101 /* 2102 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we 2103 * just reestablished, and remove it from the disconnected queue. 2104 */ 2105 2106 tmp = NULL; 2107 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2108 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2109 2110 if (target_mask == (1 << scmd_id(cmd)) && 2111 lun == (u8)cmd->device->lun) { 2112 list_del(&ncmd->list); 2113 tmp = cmd; 2114 break; 2115 } 2116 } 2117 2118 if (tmp) { 2119 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, 2120 "reselect: removed %p from disconnected queue\n", tmp); 2121 } else { 2122 int target = ffs(target_mask) - 1; 2123 2124 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", 2125 target_mask, lun); 2126 /* 2127 * Since we have an established nexus that we can't do anything 2128 * with, we must abort it. 2129 */ 2130 if (do_abort(instance) == 0) 2131 hostdata->busy[target] &= ~(1 << lun); 2132 return; 2133 } 2134 2135 #ifdef CONFIG_SUN3 2136 if (sun3_dma_setup_done != tmp) { 2137 int count; 2138 2139 if (!tmp->SCp.this_residual && tmp->SCp.buffers_residual) { 2140 ++tmp->SCp.buffer; 2141 --tmp->SCp.buffers_residual; 2142 tmp->SCp.this_residual = tmp->SCp.buffer->length; 2143 tmp->SCp.ptr = sg_virt(tmp->SCp.buffer); 2144 } 2145 2146 count = sun3scsi_dma_xfer_len(hostdata, tmp); 2147 2148 if (count > 0) { 2149 if (rq_data_dir(tmp->request)) 2150 sun3scsi_dma_send_setup(hostdata, 2151 tmp->SCp.ptr, count); 2152 else 2153 sun3scsi_dma_recv_setup(hostdata, 2154 tmp->SCp.ptr, count); 2155 sun3_dma_setup_done = tmp; 2156 } 2157 } 2158 2159 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 2160 #endif /* CONFIG_SUN3 */ 2161 2162 /* Accept message by clearing ACK */ 2163 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2164 2165 hostdata->connected = tmp; 2166 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", 2167 scmd_id(tmp), tmp->device->lun); 2168 } 2169 2170 /** 2171 * list_find_cmd - test for presence of a command in a linked list 2172 * @haystack: list of commands 2173 * @needle: command to search for 2174 */ 2175 2176 static bool list_find_cmd(struct list_head *haystack, 2177 struct scsi_cmnd *needle) 2178 { 2179 struct NCR5380_cmd *ncmd; 2180 2181 list_for_each_entry(ncmd, haystack, list) 2182 if (NCR5380_to_scmd(ncmd) == needle) 2183 return true; 2184 return false; 2185 } 2186 2187 /** 2188 * list_remove_cmd - remove a command from linked list 2189 * @haystack: list of commands 2190 * @needle: command to remove 2191 */ 2192 2193 static bool list_del_cmd(struct list_head *haystack, 2194 struct scsi_cmnd *needle) 2195 { 2196 if (list_find_cmd(haystack, needle)) { 2197 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); 2198 2199 list_del(&ncmd->list); 2200 return true; 2201 } 2202 return false; 2203 } 2204 2205 /** 2206 * NCR5380_abort - scsi host eh_abort_handler() method 2207 * @cmd: the command to be aborted 2208 * 2209 * Try to abort a given command by removing it from queues and/or sending 2210 * the target an abort message. This may not succeed in causing a target 2211 * to abort the command. Nonetheless, the low-level driver must forget about 2212 * the command because the mid-layer reclaims it and it may be re-issued. 2213 * 2214 * The normal path taken by a command is as follows. For EH we trace this 2215 * same path to locate and abort the command. 2216 * 2217 * unissued -> selecting -> [unissued -> selecting ->]... connected -> 2218 * [disconnected -> connected ->]... 2219 * [autosense -> connected ->] done 2220 * 2221 * If cmd was not found at all then presumably it has already been completed, 2222 * in which case return SUCCESS to try to avoid further EH measures. 2223 * 2224 * If the command has not completed yet, we must not fail to find it. 2225 * We have no option but to forget the aborted command (even if it still 2226 * lacks sense data). The mid-layer may re-issue a command that is in error 2227 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in 2228 * this driver are such that a command can appear on one queue only. 2229 * 2230 * The lock protects driver data structures, but EH handlers also use it 2231 * to serialize their own execution and prevent their own re-entry. 2232 */ 2233 2234 static int NCR5380_abort(struct scsi_cmnd *cmd) 2235 { 2236 struct Scsi_Host *instance = cmd->device->host; 2237 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2238 unsigned long flags; 2239 int result = SUCCESS; 2240 2241 spin_lock_irqsave(&hostdata->lock, flags); 2242 2243 #if (NDEBUG & NDEBUG_ANY) 2244 scmd_printk(KERN_INFO, cmd, __func__); 2245 #endif 2246 NCR5380_dprint(NDEBUG_ANY, instance); 2247 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2248 2249 if (list_del_cmd(&hostdata->unissued, cmd)) { 2250 dsprintk(NDEBUG_ABORT, instance, 2251 "abort: removed %p from issue queue\n", cmd); 2252 cmd->result = DID_ABORT << 16; 2253 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ 2254 goto out; 2255 } 2256 2257 if (hostdata->selecting == cmd) { 2258 dsprintk(NDEBUG_ABORT, instance, 2259 "abort: cmd %p == selecting\n", cmd); 2260 hostdata->selecting = NULL; 2261 cmd->result = DID_ABORT << 16; 2262 complete_cmd(instance, cmd); 2263 goto out; 2264 } 2265 2266 if (list_del_cmd(&hostdata->disconnected, cmd)) { 2267 dsprintk(NDEBUG_ABORT, instance, 2268 "abort: removed %p from disconnected list\n", cmd); 2269 /* Can't call NCR5380_select() and send ABORT because that 2270 * means releasing the lock. Need a bus reset. 2271 */ 2272 set_host_byte(cmd, DID_ERROR); 2273 complete_cmd(instance, cmd); 2274 result = FAILED; 2275 goto out; 2276 } 2277 2278 if (hostdata->connected == cmd) { 2279 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); 2280 hostdata->connected = NULL; 2281 hostdata->dma_len = 0; 2282 if (do_abort(instance)) { 2283 set_host_byte(cmd, DID_ERROR); 2284 complete_cmd(instance, cmd); 2285 result = FAILED; 2286 goto out; 2287 } 2288 set_host_byte(cmd, DID_ABORT); 2289 complete_cmd(instance, cmd); 2290 goto out; 2291 } 2292 2293 if (list_del_cmd(&hostdata->autosense, cmd)) { 2294 dsprintk(NDEBUG_ABORT, instance, 2295 "abort: removed %p from sense queue\n", cmd); 2296 complete_cmd(instance, cmd); 2297 } 2298 2299 out: 2300 if (result == FAILED) 2301 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); 2302 else { 2303 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 2304 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); 2305 } 2306 2307 queue_work(hostdata->work_q, &hostdata->main_task); 2308 maybe_release_dma_irq(instance); 2309 spin_unlock_irqrestore(&hostdata->lock, flags); 2310 2311 return result; 2312 } 2313 2314 2315 static void bus_reset_cleanup(struct Scsi_Host *instance) 2316 { 2317 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2318 int i; 2319 struct NCR5380_cmd *ncmd; 2320 2321 /* reset NCR registers */ 2322 NCR5380_write(MODE_REG, MR_BASE); 2323 NCR5380_write(TARGET_COMMAND_REG, 0); 2324 NCR5380_write(SELECT_ENABLE_REG, 0); 2325 2326 /* After the reset, there are no more connected or disconnected commands 2327 * and no busy units; so clear the low-level status here to avoid 2328 * conflicts when the mid-level code tries to wake up the affected 2329 * commands! 2330 */ 2331 2332 if (hostdata->selecting) { 2333 hostdata->selecting->result = DID_RESET << 16; 2334 complete_cmd(instance, hostdata->selecting); 2335 hostdata->selecting = NULL; 2336 } 2337 2338 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2339 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2340 2341 set_host_byte(cmd, DID_RESET); 2342 complete_cmd(instance, cmd); 2343 } 2344 INIT_LIST_HEAD(&hostdata->disconnected); 2345 2346 list_for_each_entry(ncmd, &hostdata->autosense, list) { 2347 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2348 2349 cmd->scsi_done(cmd); 2350 } 2351 INIT_LIST_HEAD(&hostdata->autosense); 2352 2353 if (hostdata->connected) { 2354 set_host_byte(hostdata->connected, DID_RESET); 2355 complete_cmd(instance, hostdata->connected); 2356 hostdata->connected = NULL; 2357 } 2358 2359 for (i = 0; i < 8; ++i) 2360 hostdata->busy[i] = 0; 2361 hostdata->dma_len = 0; 2362 2363 queue_work(hostdata->work_q, &hostdata->main_task); 2364 maybe_release_dma_irq(instance); 2365 } 2366 2367 /** 2368 * NCR5380_host_reset - reset the SCSI host 2369 * @cmd: SCSI command undergoing EH 2370 * 2371 * Returns SUCCESS 2372 */ 2373 2374 static int NCR5380_host_reset(struct scsi_cmnd *cmd) 2375 { 2376 struct Scsi_Host *instance = cmd->device->host; 2377 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2378 unsigned long flags; 2379 struct NCR5380_cmd *ncmd; 2380 2381 spin_lock_irqsave(&hostdata->lock, flags); 2382 2383 #if (NDEBUG & NDEBUG_ANY) 2384 shost_printk(KERN_INFO, instance, __func__); 2385 #endif 2386 NCR5380_dprint(NDEBUG_ANY, instance); 2387 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2388 2389 list_for_each_entry(ncmd, &hostdata->unissued, list) { 2390 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd); 2391 2392 scmd->result = DID_RESET << 16; 2393 scmd->scsi_done(scmd); 2394 } 2395 INIT_LIST_HEAD(&hostdata->unissued); 2396 2397 do_reset(instance); 2398 bus_reset_cleanup(instance); 2399 2400 spin_unlock_irqrestore(&hostdata->lock, flags); 2401 2402 return SUCCESS; 2403 } 2404