1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * NCR 5380 generic driver routines. These should make it *trivial* 4 * to implement 5380 SCSI drivers under Linux with a non-trantor 5 * architecture. 6 * 7 * Note that these routines also work with NR53c400 family chips. 8 * 9 * Copyright 1993, Drew Eckhardt 10 * Visionary Computing 11 * (Unix and Linux consulting and custom programming) 12 * drew@colorado.edu 13 * +1 (303) 666-5836 14 * 15 * For more information, please consult 16 * 17 * NCR 5380 Family 18 * SCSI Protocol Controller 19 * Databook 20 * 21 * NCR Microelectronics 22 * 1635 Aeroplaza Drive 23 * Colorado Springs, CO 80916 24 * 1+ (719) 578-3400 25 * 1+ (800) 334-5454 26 */ 27 28 /* 29 * With contributions from Ray Van Tassle, Ingmar Baumgart, 30 * Ronald van Cuijlenborg, Alan Cox and others. 31 */ 32 33 /* Ported to Atari by Roman Hodek and others. */ 34 35 /* Adapted for the Sun 3 by Sam Creasey. */ 36 37 /* 38 * Design 39 * 40 * This is a generic 5380 driver. To use it on a different platform, 41 * one simply writes appropriate system specific macros (ie, data 42 * transfer - some PC's will use the I/O bus, 68K's must use 43 * memory mapped) and drops this file in their 'C' wrapper. 44 * 45 * As far as command queueing, two queues are maintained for 46 * each 5380 in the system - commands that haven't been issued yet, 47 * and commands that are currently executing. This means that an 48 * unlimited number of commands may be queued, letting 49 * more commands propagate from the higher driver levels giving higher 50 * throughput. Note that both I_T_L and I_T_L_Q nexuses are supported, 51 * allowing multiple commands to propagate all the way to a SCSI-II device 52 * while a command is already executing. 53 * 54 * 55 * Issues specific to the NCR5380 : 56 * 57 * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead 58 * piece of hardware that requires you to sit in a loop polling for 59 * the REQ signal as long as you are connected. Some devices are 60 * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect 61 * while doing long seek operations. [...] These 62 * broken devices are the exception rather than the rule and I'd rather 63 * spend my time optimizing for the normal case. 64 * 65 * Architecture : 66 * 67 * At the heart of the design is a coroutine, NCR5380_main, 68 * which is started from a workqueue for each NCR5380 host in the 69 * system. It attempts to establish I_T_L or I_T_L_Q nexuses by 70 * removing the commands from the issue queue and calling 71 * NCR5380_select() if a nexus is not established. 72 * 73 * Once a nexus is established, the NCR5380_information_transfer() 74 * phase goes through the various phases as instructed by the target. 75 * if the target goes into MSG IN and sends a DISCONNECT message, 76 * the command structure is placed into the per instance disconnected 77 * queue, and NCR5380_main tries to find more work. If the target is 78 * idle for too long, the system will try to sleep. 79 * 80 * If a command has disconnected, eventually an interrupt will trigger, 81 * calling NCR5380_intr() which will in turn call NCR5380_reselect 82 * to reestablish a nexus. This will run main if necessary. 83 * 84 * On command termination, the done function will be called as 85 * appropriate. 86 * 87 * SCSI pointers are maintained in the SCp field of SCSI command 88 * structures, being initialized after the command is connected 89 * in NCR5380_select, and set as appropriate in NCR5380_information_transfer. 90 * Note that in violation of the standard, an implicit SAVE POINTERS operation 91 * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS. 92 */ 93 94 /* 95 * Using this file : 96 * This file a skeleton Linux SCSI driver for the NCR 5380 series 97 * of chips. To use it, you write an architecture specific functions 98 * and macros and include this file in your driver. 99 * 100 * These macros MUST be defined : 101 * 102 * NCR5380_read(register) - read from the specified register 103 * 104 * NCR5380_write(register, value) - write to the specific register 105 * 106 * NCR5380_implementation_fields - additional fields needed for this 107 * specific implementation of the NCR5380 108 * 109 * Either real DMA *or* pseudo DMA may be implemented 110 * 111 * NCR5380_dma_xfer_len - determine size of DMA/PDMA transfer 112 * NCR5380_dma_send_setup - execute DMA/PDMA from memory to 5380 113 * NCR5380_dma_recv_setup - execute DMA/PDMA from 5380 to memory 114 * NCR5380_dma_residual - residual byte count 115 * 116 * The generic driver is initialized by calling NCR5380_init(instance), 117 * after setting the appropriate host specific fields and ID. 118 */ 119 120 #ifndef NCR5380_io_delay 121 #define NCR5380_io_delay(x) 122 #endif 123 124 #ifndef NCR5380_acquire_dma_irq 125 #define NCR5380_acquire_dma_irq(x) (1) 126 #endif 127 128 #ifndef NCR5380_release_dma_irq 129 #define NCR5380_release_dma_irq(x) 130 #endif 131 132 static unsigned int disconnect_mask = ~0; 133 module_param(disconnect_mask, int, 0444); 134 135 static int do_abort(struct Scsi_Host *); 136 static void do_reset(struct Scsi_Host *); 137 static void bus_reset_cleanup(struct Scsi_Host *); 138 139 /** 140 * initialize_SCp - init the scsi pointer field 141 * @cmd: command block to set up 142 * 143 * Set up the internal fields in the SCSI command. 144 */ 145 146 static inline void initialize_SCp(struct scsi_cmnd *cmd) 147 { 148 /* 149 * Initialize the Scsi Pointer field so that all of the commands in the 150 * various queues are valid. 151 */ 152 153 if (scsi_bufflen(cmd)) { 154 cmd->SCp.buffer = scsi_sglist(cmd); 155 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 156 cmd->SCp.this_residual = cmd->SCp.buffer->length; 157 } else { 158 cmd->SCp.buffer = NULL; 159 cmd->SCp.ptr = NULL; 160 cmd->SCp.this_residual = 0; 161 } 162 163 cmd->SCp.Status = 0; 164 cmd->SCp.Message = 0; 165 } 166 167 static inline void advance_sg_buffer(struct scsi_cmnd *cmd) 168 { 169 struct scatterlist *s = cmd->SCp.buffer; 170 171 if (!cmd->SCp.this_residual && s && !sg_is_last(s)) { 172 cmd->SCp.buffer = sg_next(s); 173 cmd->SCp.ptr = sg_virt(cmd->SCp.buffer); 174 cmd->SCp.this_residual = cmd->SCp.buffer->length; 175 } 176 } 177 178 static inline void set_resid_from_SCp(struct scsi_cmnd *cmd) 179 { 180 int resid = cmd->SCp.this_residual; 181 struct scatterlist *s = cmd->SCp.buffer; 182 183 if (s) 184 while (!sg_is_last(s)) { 185 s = sg_next(s); 186 resid += s->length; 187 } 188 scsi_set_resid(cmd, resid); 189 } 190 191 /** 192 * NCR5380_poll_politely2 - wait for two chip register values 193 * @hostdata: host private data 194 * @reg1: 5380 register to poll 195 * @bit1: Bitmask to check 196 * @val1: Expected value 197 * @reg2: Second 5380 register to poll 198 * @bit2: Second bitmask to check 199 * @val2: Second expected value 200 * @wait: Time-out in jiffies 201 * 202 * Polls the chip in a reasonably efficient manner waiting for an 203 * event to occur. After a short quick poll we begin to yield the CPU 204 * (if possible). In irq contexts the time-out is arbitrarily limited. 205 * Callers may hold locks as long as they are held in irq mode. 206 * 207 * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT. 208 */ 209 210 static int NCR5380_poll_politely2(struct NCR5380_hostdata *hostdata, 211 unsigned int reg1, u8 bit1, u8 val1, 212 unsigned int reg2, u8 bit2, u8 val2, 213 unsigned long wait) 214 { 215 unsigned long n = hostdata->poll_loops; 216 unsigned long deadline = jiffies + wait; 217 218 do { 219 if ((NCR5380_read(reg1) & bit1) == val1) 220 return 0; 221 if ((NCR5380_read(reg2) & bit2) == val2) 222 return 0; 223 cpu_relax(); 224 } while (n--); 225 226 if (irqs_disabled() || in_interrupt()) 227 return -ETIMEDOUT; 228 229 /* Repeatedly sleep for 1 ms until deadline */ 230 while (time_is_after_jiffies(deadline)) { 231 schedule_timeout_uninterruptible(1); 232 if ((NCR5380_read(reg1) & bit1) == val1) 233 return 0; 234 if ((NCR5380_read(reg2) & bit2) == val2) 235 return 0; 236 } 237 238 return -ETIMEDOUT; 239 } 240 241 #if NDEBUG 242 static struct { 243 unsigned char mask; 244 const char *name; 245 } signals[] = { 246 {SR_DBP, "PARITY"}, 247 {SR_RST, "RST"}, 248 {SR_BSY, "BSY"}, 249 {SR_REQ, "REQ"}, 250 {SR_MSG, "MSG"}, 251 {SR_CD, "CD"}, 252 {SR_IO, "IO"}, 253 {SR_SEL, "SEL"}, 254 {0, NULL} 255 }, 256 basrs[] = { 257 {BASR_END_DMA_TRANSFER, "END OF DMA"}, 258 {BASR_DRQ, "DRQ"}, 259 {BASR_PARITY_ERROR, "PARITY ERROR"}, 260 {BASR_IRQ, "IRQ"}, 261 {BASR_PHASE_MATCH, "PHASE MATCH"}, 262 {BASR_BUSY_ERROR, "BUSY ERROR"}, 263 {BASR_ATN, "ATN"}, 264 {BASR_ACK, "ACK"}, 265 {0, NULL} 266 }, 267 icrs[] = { 268 {ICR_ASSERT_RST, "ASSERT RST"}, 269 {ICR_ARBITRATION_PROGRESS, "ARB. IN PROGRESS"}, 270 {ICR_ARBITRATION_LOST, "LOST ARB."}, 271 {ICR_ASSERT_ACK, "ASSERT ACK"}, 272 {ICR_ASSERT_BSY, "ASSERT BSY"}, 273 {ICR_ASSERT_SEL, "ASSERT SEL"}, 274 {ICR_ASSERT_ATN, "ASSERT ATN"}, 275 {ICR_ASSERT_DATA, "ASSERT DATA"}, 276 {0, NULL} 277 }, 278 mrs[] = { 279 {MR_BLOCK_DMA_MODE, "BLOCK DMA MODE"}, 280 {MR_TARGET, "TARGET"}, 281 {MR_ENABLE_PAR_CHECK, "PARITY CHECK"}, 282 {MR_ENABLE_PAR_INTR, "PARITY INTR"}, 283 {MR_ENABLE_EOP_INTR, "EOP INTR"}, 284 {MR_MONITOR_BSY, "MONITOR BSY"}, 285 {MR_DMA_MODE, "DMA MODE"}, 286 {MR_ARBITRATE, "ARBITRATE"}, 287 {0, NULL} 288 }; 289 290 /** 291 * NCR5380_print - print scsi bus signals 292 * @instance: adapter state to dump 293 * 294 * Print the SCSI bus signals for debugging purposes 295 */ 296 297 static void NCR5380_print(struct Scsi_Host *instance) 298 { 299 struct NCR5380_hostdata *hostdata = shost_priv(instance); 300 unsigned char status, basr, mr, icr, i; 301 302 status = NCR5380_read(STATUS_REG); 303 mr = NCR5380_read(MODE_REG); 304 icr = NCR5380_read(INITIATOR_COMMAND_REG); 305 basr = NCR5380_read(BUS_AND_STATUS_REG); 306 307 printk(KERN_DEBUG "SR = 0x%02x : ", status); 308 for (i = 0; signals[i].mask; ++i) 309 if (status & signals[i].mask) 310 printk(KERN_CONT "%s, ", signals[i].name); 311 printk(KERN_CONT "\nBASR = 0x%02x : ", basr); 312 for (i = 0; basrs[i].mask; ++i) 313 if (basr & basrs[i].mask) 314 printk(KERN_CONT "%s, ", basrs[i].name); 315 printk(KERN_CONT "\nICR = 0x%02x : ", icr); 316 for (i = 0; icrs[i].mask; ++i) 317 if (icr & icrs[i].mask) 318 printk(KERN_CONT "%s, ", icrs[i].name); 319 printk(KERN_CONT "\nMR = 0x%02x : ", mr); 320 for (i = 0; mrs[i].mask; ++i) 321 if (mr & mrs[i].mask) 322 printk(KERN_CONT "%s, ", mrs[i].name); 323 printk(KERN_CONT "\n"); 324 } 325 326 static struct { 327 unsigned char value; 328 const char *name; 329 } phases[] = { 330 {PHASE_DATAOUT, "DATAOUT"}, 331 {PHASE_DATAIN, "DATAIN"}, 332 {PHASE_CMDOUT, "CMDOUT"}, 333 {PHASE_STATIN, "STATIN"}, 334 {PHASE_MSGOUT, "MSGOUT"}, 335 {PHASE_MSGIN, "MSGIN"}, 336 {PHASE_UNKNOWN, "UNKNOWN"} 337 }; 338 339 /** 340 * NCR5380_print_phase - show SCSI phase 341 * @instance: adapter to dump 342 * 343 * Print the current SCSI phase for debugging purposes 344 */ 345 346 static void NCR5380_print_phase(struct Scsi_Host *instance) 347 { 348 struct NCR5380_hostdata *hostdata = shost_priv(instance); 349 unsigned char status; 350 int i; 351 352 status = NCR5380_read(STATUS_REG); 353 if (!(status & SR_REQ)) 354 shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n"); 355 else { 356 for (i = 0; (phases[i].value != PHASE_UNKNOWN) && 357 (phases[i].value != (status & PHASE_MASK)); ++i) 358 ; 359 shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name); 360 } 361 } 362 #endif 363 364 /** 365 * NCR5380_info - report driver and host information 366 * @instance: relevant scsi host instance 367 * 368 * For use as the host template info() handler. 369 */ 370 371 static const char *NCR5380_info(struct Scsi_Host *instance) 372 { 373 struct NCR5380_hostdata *hostdata = shost_priv(instance); 374 375 return hostdata->info; 376 } 377 378 /** 379 * NCR5380_init - initialise an NCR5380 380 * @instance: adapter to configure 381 * @flags: control flags 382 * 383 * Initializes *instance and corresponding 5380 chip, 384 * with flags OR'd into the initial flags value. 385 * 386 * Notes : I assume that the host, hostno, and id bits have been 387 * set correctly. I don't care about the irq and other fields. 388 * 389 * Returns 0 for success 390 */ 391 392 static int NCR5380_init(struct Scsi_Host *instance, int flags) 393 { 394 struct NCR5380_hostdata *hostdata = shost_priv(instance); 395 int i; 396 unsigned long deadline; 397 unsigned long accesses_per_ms; 398 399 instance->max_lun = 7; 400 401 hostdata->host = instance; 402 hostdata->id_mask = 1 << instance->this_id; 403 hostdata->id_higher_mask = 0; 404 for (i = hostdata->id_mask; i <= 0x80; i <<= 1) 405 if (i > hostdata->id_mask) 406 hostdata->id_higher_mask |= i; 407 for (i = 0; i < 8; ++i) 408 hostdata->busy[i] = 0; 409 hostdata->dma_len = 0; 410 411 spin_lock_init(&hostdata->lock); 412 hostdata->connected = NULL; 413 hostdata->sensing = NULL; 414 INIT_LIST_HEAD(&hostdata->autosense); 415 INIT_LIST_HEAD(&hostdata->unissued); 416 INIT_LIST_HEAD(&hostdata->disconnected); 417 418 hostdata->flags = flags; 419 420 INIT_WORK(&hostdata->main_task, NCR5380_main); 421 hostdata->work_q = alloc_workqueue("ncr5380_%d", 422 WQ_UNBOUND | WQ_MEM_RECLAIM, 423 1, instance->host_no); 424 if (!hostdata->work_q) 425 return -ENOMEM; 426 427 snprintf(hostdata->info, sizeof(hostdata->info), 428 "%s, irq %d, io_port 0x%lx, base 0x%lx, can_queue %d, cmd_per_lun %d, sg_tablesize %d, this_id %d, flags { %s%s%s}", 429 instance->hostt->name, instance->irq, hostdata->io_port, 430 hostdata->base, instance->can_queue, instance->cmd_per_lun, 431 instance->sg_tablesize, instance->this_id, 432 hostdata->flags & FLAG_DMA_FIXUP ? "DMA_FIXUP " : "", 433 hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "", 434 hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY " : ""); 435 436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 437 NCR5380_write(MODE_REG, MR_BASE); 438 NCR5380_write(TARGET_COMMAND_REG, 0); 439 NCR5380_write(SELECT_ENABLE_REG, 0); 440 441 /* Calibrate register polling loop */ 442 i = 0; 443 deadline = jiffies + 1; 444 do { 445 cpu_relax(); 446 } while (time_is_after_jiffies(deadline)); 447 deadline += msecs_to_jiffies(256); 448 do { 449 NCR5380_read(STATUS_REG); 450 ++i; 451 cpu_relax(); 452 } while (time_is_after_jiffies(deadline)); 453 accesses_per_ms = i / 256; 454 hostdata->poll_loops = NCR5380_REG_POLL_TIME * accesses_per_ms / 2; 455 456 return 0; 457 } 458 459 /** 460 * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems. 461 * @instance: adapter to check 462 * 463 * If the system crashed, it may have crashed with a connected target and 464 * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the 465 * currently established nexus, which we know nothing about. Failing that 466 * do a bus reset. 467 * 468 * Note that a bus reset will cause the chip to assert IRQ. 469 * 470 * Returns 0 if successful, otherwise -ENXIO. 471 */ 472 473 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance) 474 { 475 struct NCR5380_hostdata *hostdata = shost_priv(instance); 476 int pass; 477 478 for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) { 479 switch (pass) { 480 case 1: 481 case 3: 482 case 5: 483 shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n"); 484 NCR5380_poll_politely(hostdata, 485 STATUS_REG, SR_BSY, 0, 5 * HZ); 486 break; 487 case 2: 488 shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n"); 489 do_abort(instance); 490 break; 491 case 4: 492 shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n"); 493 do_reset(instance); 494 /* Wait after a reset; the SCSI standard calls for 495 * 250ms, we wait 500ms to be on the safe side. 496 * But some Toshiba CD-ROMs need ten times that. 497 */ 498 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 499 msleep(2500); 500 else 501 msleep(500); 502 break; 503 case 6: 504 shost_printk(KERN_ERR, instance, "bus locked solid\n"); 505 return -ENXIO; 506 } 507 } 508 return 0; 509 } 510 511 /** 512 * NCR5380_exit - remove an NCR5380 513 * @instance: adapter to remove 514 * 515 * Assumes that no more work can be queued (e.g. by NCR5380_intr). 516 */ 517 518 static void NCR5380_exit(struct Scsi_Host *instance) 519 { 520 struct NCR5380_hostdata *hostdata = shost_priv(instance); 521 522 cancel_work_sync(&hostdata->main_task); 523 destroy_workqueue(hostdata->work_q); 524 } 525 526 /** 527 * complete_cmd - finish processing a command and return it to the SCSI ML 528 * @instance: the host instance 529 * @cmd: command to complete 530 */ 531 532 static void complete_cmd(struct Scsi_Host *instance, 533 struct scsi_cmnd *cmd) 534 { 535 struct NCR5380_hostdata *hostdata = shost_priv(instance); 536 537 dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd); 538 539 if (hostdata->sensing == cmd) { 540 /* Autosense processing ends here */ 541 if (status_byte(cmd->result) != GOOD) { 542 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 543 } else { 544 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 545 set_driver_byte(cmd, DRIVER_SENSE); 546 } 547 hostdata->sensing = NULL; 548 } 549 550 cmd->scsi_done(cmd); 551 } 552 553 /** 554 * NCR5380_queue_command - queue a command 555 * @instance: the relevant SCSI adapter 556 * @cmd: SCSI command 557 * 558 * cmd is added to the per-instance issue queue, with minor 559 * twiddling done to the host specific fields of cmd. If the 560 * main coroutine is not running, it is restarted. 561 */ 562 563 static int NCR5380_queue_command(struct Scsi_Host *instance, 564 struct scsi_cmnd *cmd) 565 { 566 struct NCR5380_hostdata *hostdata = shost_priv(instance); 567 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 568 unsigned long flags; 569 570 #if (NDEBUG & NDEBUG_NO_WRITE) 571 switch (cmd->cmnd[0]) { 572 case WRITE_6: 573 case WRITE_10: 574 shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n"); 575 cmd->result = (DID_ERROR << 16); 576 cmd->scsi_done(cmd); 577 return 0; 578 } 579 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */ 580 581 cmd->result = 0; 582 583 if (!NCR5380_acquire_dma_irq(instance)) 584 return SCSI_MLQUEUE_HOST_BUSY; 585 586 spin_lock_irqsave(&hostdata->lock, flags); 587 588 /* 589 * Insert the cmd into the issue queue. Note that REQUEST SENSE 590 * commands are added to the head of the queue since any command will 591 * clear the contingent allegiance condition that exists and the 592 * sense data is only guaranteed to be valid while the condition exists. 593 */ 594 595 if (cmd->cmnd[0] == REQUEST_SENSE) 596 list_add(&ncmd->list, &hostdata->unissued); 597 else 598 list_add_tail(&ncmd->list, &hostdata->unissued); 599 600 spin_unlock_irqrestore(&hostdata->lock, flags); 601 602 dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n", 603 cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail"); 604 605 /* Kick off command processing */ 606 queue_work(hostdata->work_q, &hostdata->main_task); 607 return 0; 608 } 609 610 static inline void maybe_release_dma_irq(struct Scsi_Host *instance) 611 { 612 struct NCR5380_hostdata *hostdata = shost_priv(instance); 613 614 /* Caller does the locking needed to set & test these data atomically */ 615 if (list_empty(&hostdata->disconnected) && 616 list_empty(&hostdata->unissued) && 617 list_empty(&hostdata->autosense) && 618 !hostdata->connected && 619 !hostdata->selecting) { 620 NCR5380_release_dma_irq(instance); 621 } 622 } 623 624 /** 625 * dequeue_next_cmd - dequeue a command for processing 626 * @instance: the scsi host instance 627 * 628 * Priority is given to commands on the autosense queue. These commands 629 * need autosense because of a CHECK CONDITION result. 630 * 631 * Returns a command pointer if a command is found for a target that is 632 * not already busy. Otherwise returns NULL. 633 */ 634 635 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance) 636 { 637 struct NCR5380_hostdata *hostdata = shost_priv(instance); 638 struct NCR5380_cmd *ncmd; 639 struct scsi_cmnd *cmd; 640 641 if (hostdata->sensing || list_empty(&hostdata->autosense)) { 642 list_for_each_entry(ncmd, &hostdata->unissued, list) { 643 cmd = NCR5380_to_scmd(ncmd); 644 dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n", 645 cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun); 646 647 if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) { 648 list_del(&ncmd->list); 649 dsprintk(NDEBUG_QUEUES, instance, 650 "dequeue: removed %p from issue queue\n", cmd); 651 return cmd; 652 } 653 } 654 } else { 655 /* Autosense processing begins here */ 656 ncmd = list_first_entry(&hostdata->autosense, 657 struct NCR5380_cmd, list); 658 list_del(&ncmd->list); 659 cmd = NCR5380_to_scmd(ncmd); 660 dsprintk(NDEBUG_QUEUES, instance, 661 "dequeue: removed %p from autosense queue\n", cmd); 662 scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0); 663 hostdata->sensing = cmd; 664 return cmd; 665 } 666 return NULL; 667 } 668 669 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 670 { 671 struct NCR5380_hostdata *hostdata = shost_priv(instance); 672 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 673 674 if (hostdata->sensing == cmd) { 675 scsi_eh_restore_cmnd(cmd, &hostdata->ses); 676 list_add(&ncmd->list, &hostdata->autosense); 677 hostdata->sensing = NULL; 678 } else 679 list_add(&ncmd->list, &hostdata->unissued); 680 } 681 682 /** 683 * NCR5380_main - NCR state machines 684 * 685 * NCR5380_main is a coroutine that runs as long as more work can 686 * be done on the NCR5380 host adapters in a system. Both 687 * NCR5380_queue_command() and NCR5380_intr() will try to start it 688 * in case it is not running. 689 */ 690 691 static void NCR5380_main(struct work_struct *work) 692 { 693 struct NCR5380_hostdata *hostdata = 694 container_of(work, struct NCR5380_hostdata, main_task); 695 struct Scsi_Host *instance = hostdata->host; 696 int done; 697 698 do { 699 done = 1; 700 701 spin_lock_irq(&hostdata->lock); 702 while (!hostdata->connected && !hostdata->selecting) { 703 struct scsi_cmnd *cmd = dequeue_next_cmd(instance); 704 705 if (!cmd) 706 break; 707 708 dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd); 709 710 /* 711 * Attempt to establish an I_T_L nexus here. 712 * On success, instance->hostdata->connected is set. 713 * On failure, we must add the command back to the 714 * issue queue so we can keep trying. 715 */ 716 /* 717 * REQUEST SENSE commands are issued without tagged 718 * queueing, even on SCSI-II devices because the 719 * contingent allegiance condition exists for the 720 * entire unit. 721 */ 722 723 if (!NCR5380_select(instance, cmd)) { 724 dsprintk(NDEBUG_MAIN, instance, "main: select complete\n"); 725 maybe_release_dma_irq(instance); 726 } else { 727 dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance, 728 "main: select failed, returning %p to queue\n", cmd); 729 requeue_cmd(instance, cmd); 730 } 731 } 732 if (hostdata->connected && !hostdata->dma_len) { 733 dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n"); 734 NCR5380_information_transfer(instance); 735 done = 0; 736 } 737 if (!hostdata->connected) 738 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 739 spin_unlock_irq(&hostdata->lock); 740 if (!done) 741 cond_resched(); 742 } while (!done); 743 } 744 745 /* 746 * NCR5380_dma_complete - finish DMA transfer 747 * @instance: the scsi host instance 748 * 749 * Called by the interrupt handler when DMA finishes or a phase 750 * mismatch occurs (which would end the DMA transfer). 751 */ 752 753 static void NCR5380_dma_complete(struct Scsi_Host *instance) 754 { 755 struct NCR5380_hostdata *hostdata = shost_priv(instance); 756 int transferred; 757 unsigned char **data; 758 int *count; 759 int saved_data = 0, overrun = 0; 760 unsigned char p; 761 762 if (hostdata->read_overruns) { 763 p = hostdata->connected->SCp.phase; 764 if (p & SR_IO) { 765 udelay(10); 766 if ((NCR5380_read(BUS_AND_STATUS_REG) & 767 (BASR_PHASE_MATCH | BASR_ACK)) == 768 (BASR_PHASE_MATCH | BASR_ACK)) { 769 saved_data = NCR5380_read(INPUT_DATA_REG); 770 overrun = 1; 771 dsprintk(NDEBUG_DMA, instance, "read overrun handled\n"); 772 } 773 } 774 } 775 776 #ifdef CONFIG_SUN3 777 if ((sun3scsi_dma_finish(rq_data_dir(hostdata->connected->request)))) { 778 pr_err("scsi%d: overrun in UDC counter -- not prepared to deal with this!\n", 779 instance->host_no); 780 BUG(); 781 } 782 783 if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) == 784 (BASR_PHASE_MATCH | BASR_ACK)) { 785 pr_err("scsi%d: BASR %02x\n", instance->host_no, 786 NCR5380_read(BUS_AND_STATUS_REG)); 787 pr_err("scsi%d: bus stuck in data phase -- probably a single byte overrun!\n", 788 instance->host_no); 789 BUG(); 790 } 791 #endif 792 793 NCR5380_write(MODE_REG, MR_BASE); 794 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 795 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 796 797 transferred = hostdata->dma_len - NCR5380_dma_residual(hostdata); 798 hostdata->dma_len = 0; 799 800 data = (unsigned char **)&hostdata->connected->SCp.ptr; 801 count = &hostdata->connected->SCp.this_residual; 802 *data += transferred; 803 *count -= transferred; 804 805 if (hostdata->read_overruns) { 806 int cnt, toPIO; 807 808 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) == p && (p & SR_IO)) { 809 cnt = toPIO = hostdata->read_overruns; 810 if (overrun) { 811 dsprintk(NDEBUG_DMA, instance, 812 "Got an input overrun, using saved byte\n"); 813 *(*data)++ = saved_data; 814 (*count)--; 815 cnt--; 816 toPIO--; 817 } 818 if (toPIO > 0) { 819 dsprintk(NDEBUG_DMA, instance, 820 "Doing %d byte PIO to 0x%p\n", cnt, *data); 821 NCR5380_transfer_pio(instance, &p, &cnt, data); 822 *count -= toPIO - cnt; 823 } 824 } 825 } 826 } 827 828 /** 829 * NCR5380_intr - generic NCR5380 irq handler 830 * @irq: interrupt number 831 * @dev_id: device info 832 * 833 * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses 834 * from the disconnected queue, and restarting NCR5380_main() 835 * as required. 836 * 837 * The chip can assert IRQ in any of six different conditions. The IRQ flag 838 * is then cleared by reading the Reset Parity/Interrupt Register (RPIR). 839 * Three of these six conditions are latched in the Bus and Status Register: 840 * - End of DMA (cleared by ending DMA Mode) 841 * - Parity error (cleared by reading RPIR) 842 * - Loss of BSY (cleared by reading RPIR) 843 * Two conditions have flag bits that are not latched: 844 * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode) 845 * - Bus reset (non-maskable) 846 * The remaining condition has no flag bit at all: 847 * - Selection/reselection 848 * 849 * Hence, establishing the cause(s) of any interrupt is partly guesswork. 850 * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor 851 * claimed that "the design of the [DP8490] interrupt logic ensures 852 * interrupts will not be lost (they can be on the DP5380)." 853 * The L5380/53C80 datasheet from LOGIC Devices has more details. 854 * 855 * Checking for bus reset by reading RST is futile because of interrupt 856 * latency, but a bus reset will reset chip logic. Checking for parity error 857 * is unnecessary because that interrupt is never enabled. A Loss of BSY 858 * condition will clear DMA Mode. We can tell when this occurs because the 859 * the Busy Monitor interrupt is enabled together with DMA Mode. 860 */ 861 862 static irqreturn_t __maybe_unused NCR5380_intr(int irq, void *dev_id) 863 { 864 struct Scsi_Host *instance = dev_id; 865 struct NCR5380_hostdata *hostdata = shost_priv(instance); 866 int handled = 0; 867 unsigned char basr; 868 unsigned long flags; 869 870 spin_lock_irqsave(&hostdata->lock, flags); 871 872 basr = NCR5380_read(BUS_AND_STATUS_REG); 873 if (basr & BASR_IRQ) { 874 unsigned char mr = NCR5380_read(MODE_REG); 875 unsigned char sr = NCR5380_read(STATUS_REG); 876 877 dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n", 878 irq, basr, sr, mr); 879 880 if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) { 881 /* Probably End of DMA, Phase Mismatch or Loss of BSY. 882 * We ack IRQ after clearing Mode Register. Workarounds 883 * for End of DMA errata need to happen in DMA Mode. 884 */ 885 886 dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n"); 887 888 if (hostdata->connected) { 889 NCR5380_dma_complete(instance); 890 queue_work(hostdata->work_q, &hostdata->main_task); 891 } else { 892 NCR5380_write(MODE_REG, MR_BASE); 893 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 894 } 895 } else if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) && 896 (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) { 897 /* Probably reselected */ 898 NCR5380_write(SELECT_ENABLE_REG, 0); 899 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 900 901 dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n"); 902 903 if (!hostdata->connected) { 904 NCR5380_reselect(instance); 905 queue_work(hostdata->work_q, &hostdata->main_task); 906 } 907 if (!hostdata->connected) 908 NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask); 909 } else { 910 /* Probably Bus Reset */ 911 NCR5380_read(RESET_PARITY_INTERRUPT_REG); 912 913 if (sr & SR_RST) { 914 /* Certainly Bus Reset */ 915 shost_printk(KERN_WARNING, instance, 916 "bus reset interrupt\n"); 917 bus_reset_cleanup(instance); 918 } else { 919 dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n"); 920 } 921 #ifdef SUN3_SCSI_VME 922 dregs->csr |= CSR_DMA_ENABLE; 923 #endif 924 } 925 handled = 1; 926 } else { 927 dsprintk(NDEBUG_INTR, instance, "interrupt without IRQ bit\n"); 928 #ifdef SUN3_SCSI_VME 929 dregs->csr |= CSR_DMA_ENABLE; 930 #endif 931 } 932 933 spin_unlock_irqrestore(&hostdata->lock, flags); 934 935 return IRQ_RETVAL(handled); 936 } 937 938 /** 939 * NCR5380_select - attempt arbitration and selection for a given command 940 * @instance: the Scsi_Host instance 941 * @cmd: the scsi_cmnd to execute 942 * 943 * This routine establishes an I_T_L nexus for a SCSI command. This involves 944 * ARBITRATION, SELECTION and MESSAGE OUT phases and an IDENTIFY message. 945 * 946 * Returns true if the operation should be retried. 947 * Returns false if it should not be retried. 948 * 949 * Side effects : 950 * If bus busy, arbitration failed, etc, NCR5380_select() will exit 951 * with registers as they should have been on entry - ie 952 * SELECT_ENABLE will be set appropriately, the NCR5380 953 * will cease to drive any SCSI bus signals. 954 * 955 * If successful : the I_T_L nexus will be established, and 956 * hostdata->connected will be set to cmd. 957 * SELECT interrupt will be disabled. 958 * 959 * If failed (no target) : cmd->scsi_done() will be called, and the 960 * cmd->result host byte set to DID_BAD_TARGET. 961 */ 962 963 static bool NCR5380_select(struct Scsi_Host *instance, struct scsi_cmnd *cmd) 964 __releases(&hostdata->lock) __acquires(&hostdata->lock) 965 { 966 struct NCR5380_hostdata *hostdata = shost_priv(instance); 967 unsigned char tmp[3], phase; 968 unsigned char *data; 969 int len; 970 int err; 971 bool ret = true; 972 bool can_disconnect = instance->irq != NO_IRQ && 973 cmd->cmnd[0] != REQUEST_SENSE && 974 (disconnect_mask & BIT(scmd_id(cmd))); 975 976 NCR5380_dprint(NDEBUG_ARBITRATION, instance); 977 dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n", 978 instance->this_id); 979 980 /* 981 * Arbitration and selection phases are slow and involve dropping the 982 * lock, so we have to watch out for EH. An exception handler may 983 * change 'selecting' to NULL. This function will then return false 984 * so that the caller will forget about 'cmd'. (During information 985 * transfer phases, EH may change 'connected' to NULL.) 986 */ 987 hostdata->selecting = cmd; 988 989 /* 990 * Set the phase bits to 0, otherwise the NCR5380 won't drive the 991 * data bus during SELECTION. 992 */ 993 994 NCR5380_write(TARGET_COMMAND_REG, 0); 995 996 /* 997 * Start arbitration. 998 */ 999 1000 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask); 1001 NCR5380_write(MODE_REG, MR_ARBITRATE); 1002 1003 /* The chip now waits for BUS FREE phase. Then after the 800 ns 1004 * Bus Free Delay, arbitration will begin. 1005 */ 1006 1007 spin_unlock_irq(&hostdata->lock); 1008 err = NCR5380_poll_politely2(hostdata, MODE_REG, MR_ARBITRATE, 0, 1009 INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS, 1010 ICR_ARBITRATION_PROGRESS, HZ); 1011 spin_lock_irq(&hostdata->lock); 1012 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) { 1013 /* Reselection interrupt */ 1014 goto out; 1015 } 1016 if (!hostdata->selecting) { 1017 /* Command was aborted */ 1018 NCR5380_write(MODE_REG, MR_BASE); 1019 return false; 1020 } 1021 if (err < 0) { 1022 NCR5380_write(MODE_REG, MR_BASE); 1023 shost_printk(KERN_ERR, instance, 1024 "select: arbitration timeout\n"); 1025 goto out; 1026 } 1027 spin_unlock_irq(&hostdata->lock); 1028 1029 /* The SCSI-2 arbitration delay is 2.4 us */ 1030 udelay(3); 1031 1032 /* Check for lost arbitration */ 1033 if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) || 1034 (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) || 1035 (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) { 1036 NCR5380_write(MODE_REG, MR_BASE); 1037 dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n"); 1038 spin_lock_irq(&hostdata->lock); 1039 goto out; 1040 } 1041 1042 /* After/during arbitration, BSY should be asserted. 1043 * IBM DPES-31080 Version S31Q works now 1044 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman) 1045 */ 1046 NCR5380_write(INITIATOR_COMMAND_REG, 1047 ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY); 1048 1049 /* 1050 * Again, bus clear + bus settle time is 1.2us, however, this is 1051 * a minimum so we'll udelay ceil(1.2) 1052 */ 1053 1054 if (hostdata->flags & FLAG_TOSHIBA_DELAY) 1055 udelay(15); 1056 else 1057 udelay(2); 1058 1059 spin_lock_irq(&hostdata->lock); 1060 1061 /* NCR5380_reselect() clears MODE_REG after a reselection interrupt */ 1062 if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) 1063 goto out; 1064 1065 if (!hostdata->selecting) { 1066 NCR5380_write(MODE_REG, MR_BASE); 1067 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1068 return false; 1069 } 1070 1071 dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n"); 1072 1073 /* 1074 * Now that we have won arbitration, start Selection process, asserting 1075 * the host and target ID's on the SCSI bus. 1076 */ 1077 1078 NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd))); 1079 1080 /* 1081 * Raise ATN while SEL is true before BSY goes false from arbitration, 1082 * since this is the only way to guarantee that we'll get a MESSAGE OUT 1083 * phase immediately after selection. 1084 */ 1085 1086 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY | 1087 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1088 NCR5380_write(MODE_REG, MR_BASE); 1089 1090 /* 1091 * Reselect interrupts must be turned off prior to the dropping of BSY, 1092 * otherwise we will trigger an interrupt. 1093 */ 1094 NCR5380_write(SELECT_ENABLE_REG, 0); 1095 1096 spin_unlock_irq(&hostdata->lock); 1097 1098 /* 1099 * The initiator shall then wait at least two deskew delays and release 1100 * the BSY signal. 1101 */ 1102 udelay(1); /* wingel -- wait two bus deskew delay >2*45ns */ 1103 1104 /* Reset BSY */ 1105 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | 1106 ICR_ASSERT_ATN | ICR_ASSERT_SEL); 1107 1108 /* 1109 * Something weird happens when we cease to drive BSY - looks 1110 * like the board/chip is letting us do another read before the 1111 * appropriate propagation delay has expired, and we're confusing 1112 * a BSY signal from ourselves as the target's response to SELECTION. 1113 * 1114 * A small delay (the 'C++' frontend breaks the pipeline with an 1115 * unnecessary jump, making it work on my 386-33/Trantor T128, the 1116 * tighter 'C' code breaks and requires this) solves the problem - 1117 * the 1 us delay is arbitrary, and only used because this delay will 1118 * be the same on other platforms and since it works here, it should 1119 * work there. 1120 * 1121 * wingel suggests that this could be due to failing to wait 1122 * one deskew delay. 1123 */ 1124 1125 udelay(1); 1126 1127 dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd)); 1128 1129 /* 1130 * The SCSI specification calls for a 250 ms timeout for the actual 1131 * selection. 1132 */ 1133 1134 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_BSY, SR_BSY, 1135 msecs_to_jiffies(250)); 1136 1137 if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) { 1138 spin_lock_irq(&hostdata->lock); 1139 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1140 NCR5380_reselect(instance); 1141 shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n"); 1142 goto out; 1143 } 1144 1145 if (err < 0) { 1146 spin_lock_irq(&hostdata->lock); 1147 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1148 1149 /* Can't touch cmd if it has been reclaimed by the scsi ML */ 1150 if (!hostdata->selecting) 1151 return false; 1152 1153 cmd->result = DID_BAD_TARGET << 16; 1154 complete_cmd(instance, cmd); 1155 dsprintk(NDEBUG_SELECTION, instance, 1156 "target did not respond within 250ms\n"); 1157 ret = false; 1158 goto out; 1159 } 1160 1161 /* 1162 * No less than two deskew delays after the initiator detects the 1163 * BSY signal is true, it shall release the SEL signal and may 1164 * change the DATA BUS. -wingel 1165 */ 1166 1167 udelay(1); 1168 1169 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1170 1171 /* 1172 * Since we followed the SCSI spec, and raised ATN while SEL 1173 * was true but before BSY was false during selection, the information 1174 * transfer phase should be a MESSAGE OUT phase so that we can send the 1175 * IDENTIFY message. 1176 */ 1177 1178 /* Wait for start of REQ/ACK handshake */ 1179 1180 err = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 1181 spin_lock_irq(&hostdata->lock); 1182 if (err < 0) { 1183 shost_printk(KERN_ERR, instance, "select: REQ timeout\n"); 1184 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1185 goto out; 1186 } 1187 if (!hostdata->selecting) { 1188 do_abort(instance); 1189 return false; 1190 } 1191 1192 dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n", 1193 scmd_id(cmd)); 1194 tmp[0] = IDENTIFY(can_disconnect, cmd->device->lun); 1195 1196 len = 1; 1197 data = tmp; 1198 phase = PHASE_MSGOUT; 1199 NCR5380_transfer_pio(instance, &phase, &len, &data); 1200 if (len) { 1201 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1202 cmd->result = DID_ERROR << 16; 1203 complete_cmd(instance, cmd); 1204 dsprintk(NDEBUG_SELECTION, instance, "IDENTIFY message transfer failed\n"); 1205 ret = false; 1206 goto out; 1207 } 1208 1209 dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n"); 1210 1211 hostdata->connected = cmd; 1212 hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun; 1213 1214 #ifdef SUN3_SCSI_VME 1215 dregs->csr |= CSR_INTR; 1216 #endif 1217 1218 initialize_SCp(cmd); 1219 1220 ret = false; 1221 1222 out: 1223 if (!hostdata->selecting) 1224 return false; 1225 hostdata->selecting = NULL; 1226 return ret; 1227 } 1228 1229 /* 1230 * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance, 1231 * unsigned char *phase, int *count, unsigned char **data) 1232 * 1233 * Purpose : transfers data in given phase using polled I/O 1234 * 1235 * Inputs : instance - instance of driver, *phase - pointer to 1236 * what phase is expected, *count - pointer to number of 1237 * bytes to transfer, **data - pointer to data pointer. 1238 * 1239 * Returns : -1 when different phase is entered without transferring 1240 * maximum number of bytes, 0 if all bytes are transferred or exit 1241 * is in same phase. 1242 * 1243 * Also, *phase, *count, *data are modified in place. 1244 * 1245 * XXX Note : handling for bus free may be useful. 1246 */ 1247 1248 /* 1249 * Note : this code is not as quick as it could be, however it 1250 * IS 100% reliable, and for the actual data transfer where speed 1251 * counts, we will always do a pseudo DMA or DMA transfer. 1252 */ 1253 1254 static int NCR5380_transfer_pio(struct Scsi_Host *instance, 1255 unsigned char *phase, int *count, 1256 unsigned char **data) 1257 { 1258 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1259 unsigned char p = *phase, tmp; 1260 int c = *count; 1261 unsigned char *d = *data; 1262 1263 /* 1264 * The NCR5380 chip will only drive the SCSI bus when the 1265 * phase specified in the appropriate bits of the TARGET COMMAND 1266 * REGISTER match the STATUS REGISTER 1267 */ 1268 1269 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1270 1271 do { 1272 /* 1273 * Wait for assertion of REQ, after which the phase bits will be 1274 * valid 1275 */ 1276 1277 if (NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0) 1278 break; 1279 1280 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n"); 1281 1282 /* Check for phase mismatch */ 1283 if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) { 1284 dsprintk(NDEBUG_PIO, instance, "phase mismatch\n"); 1285 NCR5380_dprint_phase(NDEBUG_PIO, instance); 1286 break; 1287 } 1288 1289 /* Do actual transfer from SCSI bus to / from memory */ 1290 if (!(p & SR_IO)) 1291 NCR5380_write(OUTPUT_DATA_REG, *d); 1292 else 1293 *d = NCR5380_read(CURRENT_SCSI_DATA_REG); 1294 1295 ++d; 1296 1297 /* 1298 * The SCSI standard suggests that in MSGOUT phase, the initiator 1299 * should drop ATN on the last byte of the message phase 1300 * after REQ has been asserted for the handshake but before 1301 * the initiator raises ACK. 1302 */ 1303 1304 if (!(p & SR_IO)) { 1305 if (!((p & SR_MSG) && c > 1)) { 1306 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1307 NCR5380_dprint(NDEBUG_PIO, instance); 1308 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1309 ICR_ASSERT_DATA | ICR_ASSERT_ACK); 1310 } else { 1311 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1312 ICR_ASSERT_DATA | ICR_ASSERT_ATN); 1313 NCR5380_dprint(NDEBUG_PIO, instance); 1314 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1315 ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1316 } 1317 } else { 1318 NCR5380_dprint(NDEBUG_PIO, instance); 1319 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 1320 } 1321 1322 if (NCR5380_poll_politely(hostdata, 1323 STATUS_REG, SR_REQ, 0, 5 * HZ) < 0) 1324 break; 1325 1326 dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n"); 1327 1328 /* 1329 * We have several special cases to consider during REQ/ACK handshaking : 1330 * 1. We were in MSGOUT phase, and we are on the last byte of the 1331 * message. ATN must be dropped as ACK is dropped. 1332 * 1333 * 2. We are in a MSGIN phase, and we are on the last byte of the 1334 * message. We must exit with ACK asserted, so that the calling 1335 * code may raise ATN before dropping ACK to reject the message. 1336 * 1337 * 3. ACK and ATN are clear and the target may proceed as normal. 1338 */ 1339 if (!(p == PHASE_MSGIN && c == 1)) { 1340 if (p == PHASE_MSGOUT && c > 1) 1341 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1342 else 1343 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1344 } 1345 } while (--c); 1346 1347 dsprintk(NDEBUG_PIO, instance, "residual %d\n", c); 1348 1349 *count = c; 1350 *data = d; 1351 tmp = NCR5380_read(STATUS_REG); 1352 /* The phase read from the bus is valid if either REQ is (already) 1353 * asserted or if ACK hasn't been released yet. The latter applies if 1354 * we're in MSG IN, DATA IN or STATUS and all bytes have been received. 1355 */ 1356 if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0)) 1357 *phase = tmp & PHASE_MASK; 1358 else 1359 *phase = PHASE_UNKNOWN; 1360 1361 if (!c || (*phase == p)) 1362 return 0; 1363 else 1364 return -1; 1365 } 1366 1367 /** 1368 * do_reset - issue a reset command 1369 * @instance: adapter to reset 1370 * 1371 * Issue a reset sequence to the NCR5380 and try and get the bus 1372 * back into sane shape. 1373 * 1374 * This clears the reset interrupt flag because there may be no handler for 1375 * it. When the driver is initialized, the NCR5380_intr() handler has not yet 1376 * been installed. And when in EH we may have released the ST DMA interrupt. 1377 */ 1378 1379 static void do_reset(struct Scsi_Host *instance) 1380 { 1381 struct NCR5380_hostdata __maybe_unused *hostdata = shost_priv(instance); 1382 unsigned long flags; 1383 1384 local_irq_save(flags); 1385 NCR5380_write(TARGET_COMMAND_REG, 1386 PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK)); 1387 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST); 1388 udelay(50); 1389 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1390 (void)NCR5380_read(RESET_PARITY_INTERRUPT_REG); 1391 local_irq_restore(flags); 1392 } 1393 1394 /** 1395 * do_abort - abort the currently established nexus by going to 1396 * MESSAGE OUT phase and sending an ABORT message. 1397 * @instance: relevant scsi host instance 1398 * 1399 * Returns 0 on success, negative error code on failure. 1400 */ 1401 1402 static int do_abort(struct Scsi_Host *instance) 1403 { 1404 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1405 unsigned char *msgptr, phase, tmp; 1406 int len; 1407 int rc; 1408 1409 /* Request message out phase */ 1410 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1411 1412 /* 1413 * Wait for the target to indicate a valid phase by asserting 1414 * REQ. Once this happens, we'll have either a MSGOUT phase 1415 * and can immediately send the ABORT message, or we'll have some 1416 * other phase and will have to source/sink data. 1417 * 1418 * We really don't care what value was on the bus or what value 1419 * the target sees, so we just handshake. 1420 */ 1421 1422 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ); 1423 if (rc < 0) 1424 goto out; 1425 1426 tmp = NCR5380_read(STATUS_REG) & PHASE_MASK; 1427 1428 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1429 1430 if (tmp != PHASE_MSGOUT) { 1431 NCR5380_write(INITIATOR_COMMAND_REG, 1432 ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK); 1433 rc = NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, 0, 3 * HZ); 1434 if (rc < 0) 1435 goto out; 1436 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1437 } 1438 1439 tmp = ABORT; 1440 msgptr = &tmp; 1441 len = 1; 1442 phase = PHASE_MSGOUT; 1443 NCR5380_transfer_pio(instance, &phase, &len, &msgptr); 1444 if (len) 1445 rc = -ENXIO; 1446 1447 /* 1448 * If we got here, and the command completed successfully, 1449 * we're about to go into bus free state. 1450 */ 1451 1452 out: 1453 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1454 return rc; 1455 } 1456 1457 /* 1458 * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance, 1459 * unsigned char *phase, int *count, unsigned char **data) 1460 * 1461 * Purpose : transfers data in given phase using either real 1462 * or pseudo DMA. 1463 * 1464 * Inputs : instance - instance of driver, *phase - pointer to 1465 * what phase is expected, *count - pointer to number of 1466 * bytes to transfer, **data - pointer to data pointer. 1467 * 1468 * Returns : -1 when different phase is entered without transferring 1469 * maximum number of bytes, 0 if all bytes or transferred or exit 1470 * is in same phase. 1471 * 1472 * Also, *phase, *count, *data are modified in place. 1473 */ 1474 1475 1476 static int NCR5380_transfer_dma(struct Scsi_Host *instance, 1477 unsigned char *phase, int *count, 1478 unsigned char **data) 1479 { 1480 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1481 int c = *count; 1482 unsigned char p = *phase; 1483 unsigned char *d = *data; 1484 unsigned char tmp; 1485 int result = 0; 1486 1487 if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) { 1488 *phase = tmp; 1489 return -1; 1490 } 1491 1492 hostdata->connected->SCp.phase = p; 1493 1494 if (p & SR_IO) { 1495 if (hostdata->read_overruns) 1496 c -= hostdata->read_overruns; 1497 else if (hostdata->flags & FLAG_DMA_FIXUP) 1498 --c; 1499 } 1500 1501 dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n", 1502 (p & SR_IO) ? "receive" : "send", c, d); 1503 1504 #ifdef CONFIG_SUN3 1505 /* send start chain */ 1506 sun3scsi_dma_start(c, *data); 1507 #endif 1508 1509 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p)); 1510 NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY | 1511 MR_ENABLE_EOP_INTR); 1512 1513 if (!(hostdata->flags & FLAG_LATE_DMA_SETUP)) { 1514 /* On the Medusa, it is a must to initialize the DMA before 1515 * starting the NCR. This is also the cleaner way for the TT. 1516 */ 1517 if (p & SR_IO) 1518 result = NCR5380_dma_recv_setup(hostdata, d, c); 1519 else 1520 result = NCR5380_dma_send_setup(hostdata, d, c); 1521 } 1522 1523 /* 1524 * On the PAS16 at least I/O recovery delays are not needed here. 1525 * Everyone else seems to want them. 1526 */ 1527 1528 if (p & SR_IO) { 1529 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1530 NCR5380_io_delay(1); 1531 NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0); 1532 } else { 1533 NCR5380_io_delay(1); 1534 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA); 1535 NCR5380_io_delay(1); 1536 NCR5380_write(START_DMA_SEND_REG, 0); 1537 NCR5380_io_delay(1); 1538 } 1539 1540 #ifdef CONFIG_SUN3 1541 #ifdef SUN3_SCSI_VME 1542 dregs->csr |= CSR_DMA_ENABLE; 1543 #endif 1544 sun3_dma_active = 1; 1545 #endif 1546 1547 if (hostdata->flags & FLAG_LATE_DMA_SETUP) { 1548 /* On the Falcon, the DMA setup must be done after the last 1549 * NCR access, else the DMA setup gets trashed! 1550 */ 1551 if (p & SR_IO) 1552 result = NCR5380_dma_recv_setup(hostdata, d, c); 1553 else 1554 result = NCR5380_dma_send_setup(hostdata, d, c); 1555 } 1556 1557 /* On failure, NCR5380_dma_xxxx_setup() returns a negative int. */ 1558 if (result < 0) 1559 return result; 1560 1561 /* For real DMA, result is the byte count. DMA interrupt is expected. */ 1562 if (result > 0) { 1563 hostdata->dma_len = result; 1564 return 0; 1565 } 1566 1567 /* The result is zero iff pseudo DMA send/receive was completed. */ 1568 hostdata->dma_len = c; 1569 1570 /* 1571 * A note regarding the DMA errata workarounds for early NMOS silicon. 1572 * 1573 * For DMA sends, we want to wait until the last byte has been 1574 * transferred out over the bus before we turn off DMA mode. Alas, there 1575 * seems to be no terribly good way of doing this on a 5380 under all 1576 * conditions. For non-scatter-gather operations, we can wait until REQ 1577 * and ACK both go false, or until a phase mismatch occurs. Gather-sends 1578 * are nastier, since the device will be expecting more data than we 1579 * are prepared to send it, and REQ will remain asserted. On a 53C8[01] we 1580 * could test Last Byte Sent to assure transfer (I imagine this is precisely 1581 * why this signal was added to the newer chips) but on the older 538[01] 1582 * this signal does not exist. The workaround for this lack is a watchdog; 1583 * we bail out of the wait-loop after a modest amount of wait-time if 1584 * the usual exit conditions are not met. Not a terribly clean or 1585 * correct solution :-% 1586 * 1587 * DMA receive is equally tricky due to a nasty characteristic of the NCR5380. 1588 * If the chip is in DMA receive mode, it will respond to a target's 1589 * REQ by latching the SCSI data into the INPUT DATA register and asserting 1590 * ACK, even if it has _already_ been notified by the DMA controller that 1591 * the current DMA transfer has completed! If the NCR5380 is then taken 1592 * out of DMA mode, this already-acknowledged byte is lost. This is 1593 * not a problem for "one DMA transfer per READ command", because 1594 * the situation will never arise... either all of the data is DMA'ed 1595 * properly, or the target switches to MESSAGE IN phase to signal a 1596 * disconnection (either operation bringing the DMA to a clean halt). 1597 * However, in order to handle scatter-receive, we must work around the 1598 * problem. The chosen fix is to DMA fewer bytes, then check for the 1599 * condition before taking the NCR5380 out of DMA mode. One or two extra 1600 * bytes are transferred via PIO as necessary to fill out the original 1601 * request. 1602 */ 1603 1604 if (hostdata->flags & FLAG_DMA_FIXUP) { 1605 if (p & SR_IO) { 1606 /* 1607 * The workaround was to transfer fewer bytes than we 1608 * intended to with the pseudo-DMA read function, wait for 1609 * the chip to latch the last byte, read it, and then disable 1610 * pseudo-DMA mode. 1611 * 1612 * After REQ is asserted, the NCR5380 asserts DRQ and ACK. 1613 * REQ is deasserted when ACK is asserted, and not reasserted 1614 * until ACK goes false. Since the NCR5380 won't lower ACK 1615 * until DACK is asserted, which won't happen unless we twiddle 1616 * the DMA port or we take the NCR5380 out of DMA mode, we 1617 * can guarantee that we won't handshake another extra 1618 * byte. 1619 */ 1620 1621 if (NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, 1622 BASR_DRQ, BASR_DRQ, HZ) < 0) { 1623 result = -1; 1624 shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n"); 1625 } 1626 if (NCR5380_poll_politely(hostdata, STATUS_REG, 1627 SR_REQ, 0, HZ) < 0) { 1628 result = -1; 1629 shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n"); 1630 } 1631 d[*count - 1] = NCR5380_read(INPUT_DATA_REG); 1632 } else { 1633 /* 1634 * Wait for the last byte to be sent. If REQ is being asserted for 1635 * the byte we're interested, we'll ACK it and it will go false. 1636 */ 1637 if (NCR5380_poll_politely2(hostdata, 1638 BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ, 1639 BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) { 1640 result = -1; 1641 shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n"); 1642 } 1643 } 1644 } 1645 1646 NCR5380_dma_complete(instance); 1647 return result; 1648 } 1649 1650 /* 1651 * Function : NCR5380_information_transfer (struct Scsi_Host *instance) 1652 * 1653 * Purpose : run through the various SCSI phases and do as the target 1654 * directs us to. Operates on the currently connected command, 1655 * instance->connected. 1656 * 1657 * Inputs : instance, instance for which we are doing commands 1658 * 1659 * Side effects : SCSI things happen, the disconnected queue will be 1660 * modified if a command disconnects, *instance->connected will 1661 * change. 1662 * 1663 * XXX Note : we need to watch for bus free or a reset condition here 1664 * to recover from an unexpected bus free condition. 1665 */ 1666 1667 static void NCR5380_information_transfer(struct Scsi_Host *instance) 1668 __releases(&hostdata->lock) __acquires(&hostdata->lock) 1669 { 1670 struct NCR5380_hostdata *hostdata = shost_priv(instance); 1671 unsigned char msgout = NOP; 1672 int sink = 0; 1673 int len; 1674 int transfersize; 1675 unsigned char *data; 1676 unsigned char phase, tmp, extended_msg[10], old_phase = 0xff; 1677 struct scsi_cmnd *cmd; 1678 1679 #ifdef SUN3_SCSI_VME 1680 dregs->csr |= CSR_INTR; 1681 #endif 1682 1683 while ((cmd = hostdata->connected)) { 1684 struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd); 1685 1686 tmp = NCR5380_read(STATUS_REG); 1687 /* We only have a valid SCSI phase when REQ is asserted */ 1688 if (tmp & SR_REQ) { 1689 phase = (tmp & PHASE_MASK); 1690 if (phase != old_phase) { 1691 old_phase = phase; 1692 NCR5380_dprint_phase(NDEBUG_INFORMATION, instance); 1693 } 1694 #ifdef CONFIG_SUN3 1695 if (phase == PHASE_CMDOUT && 1696 sun3_dma_setup_done != cmd) { 1697 int count; 1698 1699 advance_sg_buffer(cmd); 1700 1701 count = sun3scsi_dma_xfer_len(hostdata, cmd); 1702 1703 if (count > 0) { 1704 if (rq_data_dir(cmd->request)) 1705 sun3scsi_dma_send_setup(hostdata, 1706 cmd->SCp.ptr, count); 1707 else 1708 sun3scsi_dma_recv_setup(hostdata, 1709 cmd->SCp.ptr, count); 1710 sun3_dma_setup_done = cmd; 1711 } 1712 #ifdef SUN3_SCSI_VME 1713 dregs->csr |= CSR_INTR; 1714 #endif 1715 } 1716 #endif /* CONFIG_SUN3 */ 1717 1718 if (sink && (phase != PHASE_MSGOUT)) { 1719 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp)); 1720 1721 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN | 1722 ICR_ASSERT_ACK); 1723 while (NCR5380_read(STATUS_REG) & SR_REQ) 1724 ; 1725 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | 1726 ICR_ASSERT_ATN); 1727 sink = 0; 1728 continue; 1729 } 1730 1731 switch (phase) { 1732 case PHASE_DATAOUT: 1733 #if (NDEBUG & NDEBUG_NO_DATAOUT) 1734 shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n"); 1735 sink = 1; 1736 do_abort(instance); 1737 cmd->result = DID_ERROR << 16; 1738 complete_cmd(instance, cmd); 1739 hostdata->connected = NULL; 1740 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1741 return; 1742 #endif 1743 case PHASE_DATAIN: 1744 /* 1745 * If there is no room left in the current buffer in the 1746 * scatter-gather list, move onto the next one. 1747 */ 1748 1749 advance_sg_buffer(cmd); 1750 dsprintk(NDEBUG_INFORMATION, instance, 1751 "this residual %d, sg ents %d\n", 1752 cmd->SCp.this_residual, 1753 sg_nents(cmd->SCp.buffer)); 1754 1755 /* 1756 * The preferred transfer method is going to be 1757 * PSEUDO-DMA for systems that are strictly PIO, 1758 * since we can let the hardware do the handshaking. 1759 * 1760 * For this to work, we need to know the transfersize 1761 * ahead of time, since the pseudo-DMA code will sit 1762 * in an unconditional loop. 1763 */ 1764 1765 transfersize = 0; 1766 if (!cmd->device->borken) 1767 transfersize = NCR5380_dma_xfer_len(hostdata, cmd); 1768 1769 if (transfersize > 0) { 1770 len = transfersize; 1771 if (NCR5380_transfer_dma(instance, &phase, 1772 &len, (unsigned char **)&cmd->SCp.ptr)) { 1773 /* 1774 * If the watchdog timer fires, all future 1775 * accesses to this device will use the 1776 * polled-IO. 1777 */ 1778 scmd_printk(KERN_INFO, cmd, 1779 "switching to slow handshake\n"); 1780 cmd->device->borken = 1; 1781 do_reset(instance); 1782 bus_reset_cleanup(instance); 1783 } 1784 } else { 1785 /* Transfer a small chunk so that the 1786 * irq mode lock is not held too long. 1787 */ 1788 transfersize = min(cmd->SCp.this_residual, 1789 NCR5380_PIO_CHUNK_SIZE); 1790 len = transfersize; 1791 NCR5380_transfer_pio(instance, &phase, &len, 1792 (unsigned char **)&cmd->SCp.ptr); 1793 cmd->SCp.this_residual -= transfersize - len; 1794 } 1795 #ifdef CONFIG_SUN3 1796 if (sun3_dma_setup_done == cmd) 1797 sun3_dma_setup_done = NULL; 1798 #endif 1799 return; 1800 case PHASE_MSGIN: 1801 len = 1; 1802 data = &tmp; 1803 NCR5380_transfer_pio(instance, &phase, &len, &data); 1804 cmd->SCp.Message = tmp; 1805 1806 switch (tmp) { 1807 case ABORT: 1808 case COMMAND_COMPLETE: 1809 /* Accept message by clearing ACK */ 1810 sink = 1; 1811 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1812 dsprintk(NDEBUG_QUEUES, instance, 1813 "COMMAND COMPLETE %p target %d lun %llu\n", 1814 cmd, scmd_id(cmd), cmd->device->lun); 1815 1816 hostdata->connected = NULL; 1817 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1818 1819 cmd->result &= ~0xffff; 1820 cmd->result |= cmd->SCp.Status; 1821 cmd->result |= cmd->SCp.Message << 8; 1822 1823 set_resid_from_SCp(cmd); 1824 1825 if (cmd->cmnd[0] == REQUEST_SENSE) 1826 complete_cmd(instance, cmd); 1827 else { 1828 if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION || 1829 cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) { 1830 dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n", 1831 cmd); 1832 list_add_tail(&ncmd->list, 1833 &hostdata->autosense); 1834 } else 1835 complete_cmd(instance, cmd); 1836 } 1837 1838 /* 1839 * Restore phase bits to 0 so an interrupted selection, 1840 * arbitration can resume. 1841 */ 1842 NCR5380_write(TARGET_COMMAND_REG, 0); 1843 1844 maybe_release_dma_irq(instance); 1845 return; 1846 case MESSAGE_REJECT: 1847 /* Accept message by clearing ACK */ 1848 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1849 switch (hostdata->last_message) { 1850 case HEAD_OF_QUEUE_TAG: 1851 case ORDERED_QUEUE_TAG: 1852 case SIMPLE_QUEUE_TAG: 1853 cmd->device->simple_tags = 0; 1854 hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF)); 1855 break; 1856 default: 1857 break; 1858 } 1859 break; 1860 case DISCONNECT: 1861 /* Accept message by clearing ACK */ 1862 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1863 hostdata->connected = NULL; 1864 list_add(&ncmd->list, &hostdata->disconnected); 1865 dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES, 1866 instance, "connected command %p for target %d lun %llu moved to disconnected queue\n", 1867 cmd, scmd_id(cmd), cmd->device->lun); 1868 1869 /* 1870 * Restore phase bits to 0 so an interrupted selection, 1871 * arbitration can resume. 1872 */ 1873 NCR5380_write(TARGET_COMMAND_REG, 0); 1874 1875 #ifdef SUN3_SCSI_VME 1876 dregs->csr |= CSR_DMA_ENABLE; 1877 #endif 1878 return; 1879 /* 1880 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect 1881 * operation, in violation of the SCSI spec so we can safely 1882 * ignore SAVE/RESTORE pointers calls. 1883 * 1884 * Unfortunately, some disks violate the SCSI spec and 1885 * don't issue the required SAVE_POINTERS message before 1886 * disconnecting, and we have to break spec to remain 1887 * compatible. 1888 */ 1889 case SAVE_POINTERS: 1890 case RESTORE_POINTERS: 1891 /* Accept message by clearing ACK */ 1892 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1893 break; 1894 case EXTENDED_MESSAGE: 1895 /* 1896 * Start the message buffer with the EXTENDED_MESSAGE 1897 * byte, since spi_print_msg() wants the whole thing. 1898 */ 1899 extended_msg[0] = EXTENDED_MESSAGE; 1900 /* Accept first byte by clearing ACK */ 1901 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1902 1903 spin_unlock_irq(&hostdata->lock); 1904 1905 dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n"); 1906 1907 len = 2; 1908 data = extended_msg + 1; 1909 phase = PHASE_MSGIN; 1910 NCR5380_transfer_pio(instance, &phase, &len, &data); 1911 dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n", 1912 (int)extended_msg[1], 1913 (int)extended_msg[2]); 1914 1915 if (!len && extended_msg[1] > 0 && 1916 extended_msg[1] <= sizeof(extended_msg) - 2) { 1917 /* Accept third byte by clearing ACK */ 1918 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 1919 len = extended_msg[1] - 1; 1920 data = extended_msg + 3; 1921 phase = PHASE_MSGIN; 1922 1923 NCR5380_transfer_pio(instance, &phase, &len, &data); 1924 dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n", 1925 len); 1926 1927 switch (extended_msg[2]) { 1928 case EXTENDED_SDTR: 1929 case EXTENDED_WDTR: 1930 tmp = 0; 1931 } 1932 } else if (len) { 1933 shost_printk(KERN_ERR, instance, "error receiving extended message\n"); 1934 tmp = 0; 1935 } else { 1936 shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n", 1937 extended_msg[2], extended_msg[1]); 1938 tmp = 0; 1939 } 1940 1941 spin_lock_irq(&hostdata->lock); 1942 if (!hostdata->connected) 1943 return; 1944 1945 /* Reject message */ 1946 /* Fall through */ 1947 default: 1948 /* 1949 * If we get something weird that we aren't expecting, 1950 * log it. 1951 */ 1952 if (tmp == EXTENDED_MESSAGE) 1953 scmd_printk(KERN_INFO, cmd, 1954 "rejecting unknown extended message code %02x, length %d\n", 1955 extended_msg[2], extended_msg[1]); 1956 else if (tmp) 1957 scmd_printk(KERN_INFO, cmd, 1958 "rejecting unknown message code %02x\n", 1959 tmp); 1960 1961 msgout = MESSAGE_REJECT; 1962 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN); 1963 break; 1964 } /* switch (tmp) */ 1965 break; 1966 case PHASE_MSGOUT: 1967 len = 1; 1968 data = &msgout; 1969 hostdata->last_message = msgout; 1970 NCR5380_transfer_pio(instance, &phase, &len, &data); 1971 if (msgout == ABORT) { 1972 hostdata->connected = NULL; 1973 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 1974 cmd->result = DID_ERROR << 16; 1975 complete_cmd(instance, cmd); 1976 maybe_release_dma_irq(instance); 1977 return; 1978 } 1979 msgout = NOP; 1980 break; 1981 case PHASE_CMDOUT: 1982 len = cmd->cmd_len; 1983 data = cmd->cmnd; 1984 /* 1985 * XXX for performance reasons, on machines with a 1986 * PSEUDO-DMA architecture we should probably 1987 * use the dma transfer function. 1988 */ 1989 NCR5380_transfer_pio(instance, &phase, &len, &data); 1990 break; 1991 case PHASE_STATIN: 1992 len = 1; 1993 data = &tmp; 1994 NCR5380_transfer_pio(instance, &phase, &len, &data); 1995 cmd->SCp.Status = tmp; 1996 break; 1997 default: 1998 shost_printk(KERN_ERR, instance, "unknown phase\n"); 1999 NCR5380_dprint(NDEBUG_ANY, instance); 2000 } /* switch(phase) */ 2001 } else { 2002 spin_unlock_irq(&hostdata->lock); 2003 NCR5380_poll_politely(hostdata, STATUS_REG, SR_REQ, SR_REQ, HZ); 2004 spin_lock_irq(&hostdata->lock); 2005 } 2006 } 2007 } 2008 2009 /* 2010 * Function : void NCR5380_reselect (struct Scsi_Host *instance) 2011 * 2012 * Purpose : does reselection, initializing the instance->connected 2013 * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q 2014 * nexus has been reestablished, 2015 * 2016 * Inputs : instance - this instance of the NCR5380. 2017 */ 2018 2019 static void NCR5380_reselect(struct Scsi_Host *instance) 2020 { 2021 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2022 unsigned char target_mask; 2023 unsigned char lun; 2024 unsigned char msg[3]; 2025 struct NCR5380_cmd *ncmd; 2026 struct scsi_cmnd *tmp; 2027 2028 /* 2029 * Disable arbitration, etc. since the host adapter obviously 2030 * lost, and tell an interrupted NCR5380_select() to restart. 2031 */ 2032 2033 NCR5380_write(MODE_REG, MR_BASE); 2034 2035 target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask); 2036 if (!target_mask || target_mask & (target_mask - 1)) { 2037 shost_printk(KERN_WARNING, instance, 2038 "reselect: bad target_mask 0x%02x\n", target_mask); 2039 return; 2040 } 2041 2042 /* 2043 * At this point, we have detected that our SCSI ID is on the bus, 2044 * SEL is true and BSY was false for at least one bus settle delay 2045 * (400 ns). 2046 * 2047 * We must assert BSY ourselves, until the target drops the SEL 2048 * signal. 2049 */ 2050 2051 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY); 2052 if (NCR5380_poll_politely(hostdata, 2053 STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) { 2054 shost_printk(KERN_ERR, instance, "reselect: !SEL timeout\n"); 2055 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2056 return; 2057 } 2058 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2059 2060 /* 2061 * Wait for target to go into MSGIN. 2062 */ 2063 2064 if (NCR5380_poll_politely(hostdata, 2065 STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) { 2066 if ((NCR5380_read(STATUS_REG) & (SR_BSY | SR_SEL)) == 0) 2067 /* BUS FREE phase */ 2068 return; 2069 shost_printk(KERN_ERR, instance, "reselect: REQ timeout\n"); 2070 do_abort(instance); 2071 return; 2072 } 2073 2074 #ifdef CONFIG_SUN3 2075 /* acknowledge toggle to MSGIN */ 2076 NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(PHASE_MSGIN)); 2077 2078 /* peek at the byte without really hitting the bus */ 2079 msg[0] = NCR5380_read(CURRENT_SCSI_DATA_REG); 2080 #else 2081 { 2082 int len = 1; 2083 unsigned char *data = msg; 2084 unsigned char phase = PHASE_MSGIN; 2085 2086 NCR5380_transfer_pio(instance, &phase, &len, &data); 2087 2088 if (len) { 2089 do_abort(instance); 2090 return; 2091 } 2092 } 2093 #endif /* CONFIG_SUN3 */ 2094 2095 if (!(msg[0] & 0x80)) { 2096 shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got "); 2097 spi_print_msg(msg); 2098 printk("\n"); 2099 do_abort(instance); 2100 return; 2101 } 2102 lun = msg[0] & 0x07; 2103 2104 /* 2105 * We need to add code for SCSI-II to track which devices have 2106 * I_T_L_Q nexuses established, and which have simple I_T_L 2107 * nexuses so we can chose to do additional data transfer. 2108 */ 2109 2110 /* 2111 * Find the command corresponding to the I_T_L or I_T_L_Q nexus we 2112 * just reestablished, and remove it from the disconnected queue. 2113 */ 2114 2115 tmp = NULL; 2116 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2117 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2118 2119 if (target_mask == (1 << scmd_id(cmd)) && 2120 lun == (u8)cmd->device->lun) { 2121 list_del(&ncmd->list); 2122 tmp = cmd; 2123 break; 2124 } 2125 } 2126 2127 if (tmp) { 2128 dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance, 2129 "reselect: removed %p from disconnected queue\n", tmp); 2130 } else { 2131 int target = ffs(target_mask) - 1; 2132 2133 shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n", 2134 target_mask, lun); 2135 /* 2136 * Since we have an established nexus that we can't do anything 2137 * with, we must abort it. 2138 */ 2139 if (do_abort(instance) == 0) 2140 hostdata->busy[target] &= ~(1 << lun); 2141 return; 2142 } 2143 2144 #ifdef CONFIG_SUN3 2145 if (sun3_dma_setup_done != tmp) { 2146 int count; 2147 2148 advance_sg_buffer(tmp); 2149 2150 count = sun3scsi_dma_xfer_len(hostdata, tmp); 2151 2152 if (count > 0) { 2153 if (rq_data_dir(tmp->request)) 2154 sun3scsi_dma_send_setup(hostdata, 2155 tmp->SCp.ptr, count); 2156 else 2157 sun3scsi_dma_recv_setup(hostdata, 2158 tmp->SCp.ptr, count); 2159 sun3_dma_setup_done = tmp; 2160 } 2161 } 2162 2163 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK); 2164 #endif /* CONFIG_SUN3 */ 2165 2166 /* Accept message by clearing ACK */ 2167 NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE); 2168 2169 hostdata->connected = tmp; 2170 dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu\n", 2171 scmd_id(tmp), tmp->device->lun); 2172 } 2173 2174 /** 2175 * list_find_cmd - test for presence of a command in a linked list 2176 * @haystack: list of commands 2177 * @needle: command to search for 2178 */ 2179 2180 static bool list_find_cmd(struct list_head *haystack, 2181 struct scsi_cmnd *needle) 2182 { 2183 struct NCR5380_cmd *ncmd; 2184 2185 list_for_each_entry(ncmd, haystack, list) 2186 if (NCR5380_to_scmd(ncmd) == needle) 2187 return true; 2188 return false; 2189 } 2190 2191 /** 2192 * list_remove_cmd - remove a command from linked list 2193 * @haystack: list of commands 2194 * @needle: command to remove 2195 */ 2196 2197 static bool list_del_cmd(struct list_head *haystack, 2198 struct scsi_cmnd *needle) 2199 { 2200 if (list_find_cmd(haystack, needle)) { 2201 struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle); 2202 2203 list_del(&ncmd->list); 2204 return true; 2205 } 2206 return false; 2207 } 2208 2209 /** 2210 * NCR5380_abort - scsi host eh_abort_handler() method 2211 * @cmd: the command to be aborted 2212 * 2213 * Try to abort a given command by removing it from queues and/or sending 2214 * the target an abort message. This may not succeed in causing a target 2215 * to abort the command. Nonetheless, the low-level driver must forget about 2216 * the command because the mid-layer reclaims it and it may be re-issued. 2217 * 2218 * The normal path taken by a command is as follows. For EH we trace this 2219 * same path to locate and abort the command. 2220 * 2221 * unissued -> selecting -> [unissued -> selecting ->]... connected -> 2222 * [disconnected -> connected ->]... 2223 * [autosense -> connected ->] done 2224 * 2225 * If cmd was not found at all then presumably it has already been completed, 2226 * in which case return SUCCESS to try to avoid further EH measures. 2227 * 2228 * If the command has not completed yet, we must not fail to find it. 2229 * We have no option but to forget the aborted command (even if it still 2230 * lacks sense data). The mid-layer may re-issue a command that is in error 2231 * recovery (see scsi_send_eh_cmnd), but the logic and data structures in 2232 * this driver are such that a command can appear on one queue only. 2233 * 2234 * The lock protects driver data structures, but EH handlers also use it 2235 * to serialize their own execution and prevent their own re-entry. 2236 */ 2237 2238 static int NCR5380_abort(struct scsi_cmnd *cmd) 2239 { 2240 struct Scsi_Host *instance = cmd->device->host; 2241 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2242 unsigned long flags; 2243 int result = SUCCESS; 2244 2245 spin_lock_irqsave(&hostdata->lock, flags); 2246 2247 #if (NDEBUG & NDEBUG_ANY) 2248 scmd_printk(KERN_INFO, cmd, __func__); 2249 #endif 2250 NCR5380_dprint(NDEBUG_ANY, instance); 2251 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2252 2253 if (list_del_cmd(&hostdata->unissued, cmd)) { 2254 dsprintk(NDEBUG_ABORT, instance, 2255 "abort: removed %p from issue queue\n", cmd); 2256 cmd->result = DID_ABORT << 16; 2257 cmd->scsi_done(cmd); /* No tag or busy flag to worry about */ 2258 goto out; 2259 } 2260 2261 if (hostdata->selecting == cmd) { 2262 dsprintk(NDEBUG_ABORT, instance, 2263 "abort: cmd %p == selecting\n", cmd); 2264 hostdata->selecting = NULL; 2265 cmd->result = DID_ABORT << 16; 2266 complete_cmd(instance, cmd); 2267 goto out; 2268 } 2269 2270 if (list_del_cmd(&hostdata->disconnected, cmd)) { 2271 dsprintk(NDEBUG_ABORT, instance, 2272 "abort: removed %p from disconnected list\n", cmd); 2273 /* Can't call NCR5380_select() and send ABORT because that 2274 * means releasing the lock. Need a bus reset. 2275 */ 2276 set_host_byte(cmd, DID_ERROR); 2277 complete_cmd(instance, cmd); 2278 result = FAILED; 2279 goto out; 2280 } 2281 2282 if (hostdata->connected == cmd) { 2283 dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd); 2284 hostdata->connected = NULL; 2285 hostdata->dma_len = 0; 2286 if (do_abort(instance) < 0) { 2287 set_host_byte(cmd, DID_ERROR); 2288 complete_cmd(instance, cmd); 2289 result = FAILED; 2290 goto out; 2291 } 2292 set_host_byte(cmd, DID_ABORT); 2293 complete_cmd(instance, cmd); 2294 goto out; 2295 } 2296 2297 if (list_del_cmd(&hostdata->autosense, cmd)) { 2298 dsprintk(NDEBUG_ABORT, instance, 2299 "abort: removed %p from sense queue\n", cmd); 2300 complete_cmd(instance, cmd); 2301 } 2302 2303 out: 2304 if (result == FAILED) 2305 dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd); 2306 else { 2307 hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun); 2308 dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd); 2309 } 2310 2311 queue_work(hostdata->work_q, &hostdata->main_task); 2312 maybe_release_dma_irq(instance); 2313 spin_unlock_irqrestore(&hostdata->lock, flags); 2314 2315 return result; 2316 } 2317 2318 2319 static void bus_reset_cleanup(struct Scsi_Host *instance) 2320 { 2321 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2322 int i; 2323 struct NCR5380_cmd *ncmd; 2324 2325 /* reset NCR registers */ 2326 NCR5380_write(MODE_REG, MR_BASE); 2327 NCR5380_write(TARGET_COMMAND_REG, 0); 2328 NCR5380_write(SELECT_ENABLE_REG, 0); 2329 2330 /* After the reset, there are no more connected or disconnected commands 2331 * and no busy units; so clear the low-level status here to avoid 2332 * conflicts when the mid-level code tries to wake up the affected 2333 * commands! 2334 */ 2335 2336 if (hostdata->selecting) { 2337 hostdata->selecting->result = DID_RESET << 16; 2338 complete_cmd(instance, hostdata->selecting); 2339 hostdata->selecting = NULL; 2340 } 2341 2342 list_for_each_entry(ncmd, &hostdata->disconnected, list) { 2343 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2344 2345 set_host_byte(cmd, DID_RESET); 2346 complete_cmd(instance, cmd); 2347 } 2348 INIT_LIST_HEAD(&hostdata->disconnected); 2349 2350 list_for_each_entry(ncmd, &hostdata->autosense, list) { 2351 struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd); 2352 2353 cmd->scsi_done(cmd); 2354 } 2355 INIT_LIST_HEAD(&hostdata->autosense); 2356 2357 if (hostdata->connected) { 2358 set_host_byte(hostdata->connected, DID_RESET); 2359 complete_cmd(instance, hostdata->connected); 2360 hostdata->connected = NULL; 2361 } 2362 2363 for (i = 0; i < 8; ++i) 2364 hostdata->busy[i] = 0; 2365 hostdata->dma_len = 0; 2366 2367 queue_work(hostdata->work_q, &hostdata->main_task); 2368 maybe_release_dma_irq(instance); 2369 } 2370 2371 /** 2372 * NCR5380_host_reset - reset the SCSI host 2373 * @cmd: SCSI command undergoing EH 2374 * 2375 * Returns SUCCESS 2376 */ 2377 2378 static int NCR5380_host_reset(struct scsi_cmnd *cmd) 2379 { 2380 struct Scsi_Host *instance = cmd->device->host; 2381 struct NCR5380_hostdata *hostdata = shost_priv(instance); 2382 unsigned long flags; 2383 struct NCR5380_cmd *ncmd; 2384 2385 spin_lock_irqsave(&hostdata->lock, flags); 2386 2387 #if (NDEBUG & NDEBUG_ANY) 2388 shost_printk(KERN_INFO, instance, __func__); 2389 #endif 2390 NCR5380_dprint(NDEBUG_ANY, instance); 2391 NCR5380_dprint_phase(NDEBUG_ANY, instance); 2392 2393 list_for_each_entry(ncmd, &hostdata->unissued, list) { 2394 struct scsi_cmnd *scmd = NCR5380_to_scmd(ncmd); 2395 2396 scmd->result = DID_RESET << 16; 2397 scmd->scsi_done(scmd); 2398 } 2399 INIT_LIST_HEAD(&hostdata->unissued); 2400 2401 do_reset(instance); 2402 bus_reset_cleanup(instance); 2403 2404 spin_unlock_irqrestore(&hostdata->lock, flags); 2405 2406 return SUCCESS; 2407 } 2408