xref: /openbmc/linux/drivers/scsi/NCR5380.c (revision 110e6f26)
1 /*
2  * NCR 5380 generic driver routines.  These should make it *trivial*
3  * to implement 5380 SCSI drivers under Linux with a non-trantor
4  * architecture.
5  *
6  * Note that these routines also work with NR53c400 family chips.
7  *
8  * Copyright 1993, Drew Eckhardt
9  * Visionary Computing
10  * (Unix and Linux consulting and custom programming)
11  * drew@colorado.edu
12  * +1 (303) 666-5836
13  *
14  * For more information, please consult
15  *
16  * NCR 5380 Family
17  * SCSI Protocol Controller
18  * Databook
19  *
20  * NCR Microelectronics
21  * 1635 Aeroplaza Drive
22  * Colorado Springs, CO 80916
23  * 1+ (719) 578-3400
24  * 1+ (800) 334-5454
25  */
26 
27 /*
28  * With contributions from Ray Van Tassle, Ingmar Baumgart,
29  * Ronald van Cuijlenborg, Alan Cox and others.
30  */
31 
32 /*
33  * Further development / testing that should be done :
34  * 1.  Cleanup the NCR5380_transfer_dma function and DMA operation complete
35  * code so that everything does the same thing that's done at the
36  * end of a pseudo-DMA read operation.
37  *
38  * 2.  Fix REAL_DMA (interrupt driven, polled works fine) -
39  * basically, transfer size needs to be reduced by one
40  * and the last byte read as is done with PSEUDO_DMA.
41  *
42  * 4.  Test SCSI-II tagged queueing (I have no devices which support
43  * tagged queueing)
44  */
45 
46 #ifndef notyet
47 #undef REAL_DMA
48 #endif
49 
50 #ifdef BOARD_REQUIRES_NO_DELAY
51 #define io_recovery_delay(x)
52 #else
53 #define io_recovery_delay(x)	udelay(x)
54 #endif
55 
56 /*
57  * Design
58  *
59  * This is a generic 5380 driver.  To use it on a different platform,
60  * one simply writes appropriate system specific macros (ie, data
61  * transfer - some PC's will use the I/O bus, 68K's must use
62  * memory mapped) and drops this file in their 'C' wrapper.
63  *
64  * As far as command queueing, two queues are maintained for
65  * each 5380 in the system - commands that haven't been issued yet,
66  * and commands that are currently executing.  This means that an
67  * unlimited number of commands may be queued, letting
68  * more commands propagate from the higher driver levels giving higher
69  * throughput.  Note that both I_T_L and I_T_L_Q nexuses are supported,
70  * allowing multiple commands to propagate all the way to a SCSI-II device
71  * while a command is already executing.
72  *
73  *
74  * Issues specific to the NCR5380 :
75  *
76  * When used in a PIO or pseudo-dma mode, the NCR5380 is a braindead
77  * piece of hardware that requires you to sit in a loop polling for
78  * the REQ signal as long as you are connected.  Some devices are
79  * brain dead (ie, many TEXEL CD ROM drives) and won't disconnect
80  * while doing long seek operations. [...] These
81  * broken devices are the exception rather than the rule and I'd rather
82  * spend my time optimizing for the normal case.
83  *
84  * Architecture :
85  *
86  * At the heart of the design is a coroutine, NCR5380_main,
87  * which is started from a workqueue for each NCR5380 host in the
88  * system.  It attempts to establish I_T_L or I_T_L_Q nexuses by
89  * removing the commands from the issue queue and calling
90  * NCR5380_select() if a nexus is not established.
91  *
92  * Once a nexus is established, the NCR5380_information_transfer()
93  * phase goes through the various phases as instructed by the target.
94  * if the target goes into MSG IN and sends a DISCONNECT message,
95  * the command structure is placed into the per instance disconnected
96  * queue, and NCR5380_main tries to find more work.  If the target is
97  * idle for too long, the system will try to sleep.
98  *
99  * If a command has disconnected, eventually an interrupt will trigger,
100  * calling NCR5380_intr()  which will in turn call NCR5380_reselect
101  * to reestablish a nexus.  This will run main if necessary.
102  *
103  * On command termination, the done function will be called as
104  * appropriate.
105  *
106  * SCSI pointers are maintained in the SCp field of SCSI command
107  * structures, being initialized after the command is connected
108  * in NCR5380_select, and set as appropriate in NCR5380_information_transfer.
109  * Note that in violation of the standard, an implicit SAVE POINTERS operation
110  * is done, since some BROKEN disks fail to issue an explicit SAVE POINTERS.
111  */
112 
113 /*
114  * Using this file :
115  * This file a skeleton Linux SCSI driver for the NCR 5380 series
116  * of chips.  To use it, you write an architecture specific functions
117  * and macros and include this file in your driver.
118  *
119  * These macros control options :
120  * AUTOPROBE_IRQ - if defined, the NCR5380_probe_irq() function will be
121  * defined.
122  *
123  * AUTOSENSE - if defined, REQUEST SENSE will be performed automatically
124  * for commands that return with a CHECK CONDITION status.
125  *
126  * DIFFERENTIAL - if defined, NCR53c81 chips will use external differential
127  * transceivers.
128  *
129  * DONT_USE_INTR - if defined, never use interrupts, even if we probe or
130  * override-configure an IRQ.
131  *
132  * PSEUDO_DMA - if defined, PSEUDO DMA is used during the data transfer phases.
133  *
134  * REAL_DMA - if defined, REAL DMA is used during the data transfer phases.
135  *
136  * REAL_DMA_POLL - if defined, REAL DMA is used but the driver doesn't
137  * rely on phase mismatch and EOP interrupts to determine end
138  * of phase.
139  *
140  * These macros MUST be defined :
141  *
142  * NCR5380_read(register)  - read from the specified register
143  *
144  * NCR5380_write(register, value) - write to the specific register
145  *
146  * NCR5380_implementation_fields  - additional fields needed for this
147  * specific implementation of the NCR5380
148  *
149  * Either real DMA *or* pseudo DMA may be implemented
150  * REAL functions :
151  * NCR5380_REAL_DMA should be defined if real DMA is to be used.
152  * Note that the DMA setup functions should return the number of bytes
153  * that they were able to program the controller for.
154  *
155  * Also note that generic i386/PC versions of these macros are
156  * available as NCR5380_i386_dma_write_setup,
157  * NCR5380_i386_dma_read_setup, and NCR5380_i386_dma_residual.
158  *
159  * NCR5380_dma_write_setup(instance, src, count) - initialize
160  * NCR5380_dma_read_setup(instance, dst, count) - initialize
161  * NCR5380_dma_residual(instance); - residual count
162  *
163  * PSEUDO functions :
164  * NCR5380_pwrite(instance, src, count)
165  * NCR5380_pread(instance, dst, count);
166  *
167  * The generic driver is initialized by calling NCR5380_init(instance),
168  * after setting the appropriate host specific fields and ID.  If the
169  * driver wishes to autoprobe for an IRQ line, the NCR5380_probe_irq(instance,
170  * possible) function may be used.
171  */
172 
173 static int do_abort(struct Scsi_Host *);
174 static void do_reset(struct Scsi_Host *);
175 
176 /**
177  * initialize_SCp - init the scsi pointer field
178  * @cmd: command block to set up
179  *
180  * Set up the internal fields in the SCSI command.
181  */
182 
183 static inline void initialize_SCp(struct scsi_cmnd *cmd)
184 {
185 	/*
186 	 * Initialize the Scsi Pointer field so that all of the commands in the
187 	 * various queues are valid.
188 	 */
189 
190 	if (scsi_bufflen(cmd)) {
191 		cmd->SCp.buffer = scsi_sglist(cmd);
192 		cmd->SCp.buffers_residual = scsi_sg_count(cmd) - 1;
193 		cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
194 		cmd->SCp.this_residual = cmd->SCp.buffer->length;
195 	} else {
196 		cmd->SCp.buffer = NULL;
197 		cmd->SCp.buffers_residual = 0;
198 		cmd->SCp.ptr = NULL;
199 		cmd->SCp.this_residual = 0;
200 	}
201 
202 	cmd->SCp.Status = 0;
203 	cmd->SCp.Message = 0;
204 }
205 
206 /**
207  * NCR5380_poll_politely2 - wait for two chip register values
208  * @instance: controller to poll
209  * @reg1: 5380 register to poll
210  * @bit1: Bitmask to check
211  * @val1: Expected value
212  * @reg2: Second 5380 register to poll
213  * @bit2: Second bitmask to check
214  * @val2: Second expected value
215  * @wait: Time-out in jiffies
216  *
217  * Polls the chip in a reasonably efficient manner waiting for an
218  * event to occur. After a short quick poll we begin to yield the CPU
219  * (if possible). In irq contexts the time-out is arbitrarily limited.
220  * Callers may hold locks as long as they are held in irq mode.
221  *
222  * Returns 0 if either or both event(s) occurred otherwise -ETIMEDOUT.
223  */
224 
225 static int NCR5380_poll_politely2(struct Scsi_Host *instance,
226                                   int reg1, int bit1, int val1,
227                                   int reg2, int bit2, int val2, int wait)
228 {
229 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
230 	unsigned long deadline = jiffies + wait;
231 	unsigned long n;
232 
233 	/* Busy-wait for up to 10 ms */
234 	n = min(10000U, jiffies_to_usecs(wait));
235 	n *= hostdata->accesses_per_ms;
236 	n /= 2000;
237 	do {
238 		if ((NCR5380_read(reg1) & bit1) == val1)
239 			return 0;
240 		if ((NCR5380_read(reg2) & bit2) == val2)
241 			return 0;
242 		cpu_relax();
243 	} while (n--);
244 
245 	if (irqs_disabled() || in_interrupt())
246 		return -ETIMEDOUT;
247 
248 	/* Repeatedly sleep for 1 ms until deadline */
249 	while (time_is_after_jiffies(deadline)) {
250 		schedule_timeout_uninterruptible(1);
251 		if ((NCR5380_read(reg1) & bit1) == val1)
252 			return 0;
253 		if ((NCR5380_read(reg2) & bit2) == val2)
254 			return 0;
255 	}
256 
257 	return -ETIMEDOUT;
258 }
259 
260 static inline int NCR5380_poll_politely(struct Scsi_Host *instance,
261                                         int reg, int bit, int val, int wait)
262 {
263 	return NCR5380_poll_politely2(instance, reg, bit, val,
264 	                                        reg, bit, val, wait);
265 }
266 
267 #if NDEBUG
268 static struct {
269 	unsigned char mask;
270 	const char *name;
271 } signals[] = {
272 	{SR_DBP, "PARITY"},
273 	{SR_RST, "RST"},
274 	{SR_BSY, "BSY"},
275 	{SR_REQ, "REQ"},
276 	{SR_MSG, "MSG"},
277 	{SR_CD, "CD"},
278 	{SR_IO, "IO"},
279 	{SR_SEL, "SEL"},
280 	{0, NULL}
281 },
282 basrs[] = {
283 	{BASR_ATN, "ATN"},
284 	{BASR_ACK, "ACK"},
285 	{0, NULL}
286 },
287 icrs[] = {
288 	{ICR_ASSERT_RST, "ASSERT RST"},
289 	{ICR_ASSERT_ACK, "ASSERT ACK"},
290 	{ICR_ASSERT_BSY, "ASSERT BSY"},
291 	{ICR_ASSERT_SEL, "ASSERT SEL"},
292 	{ICR_ASSERT_ATN, "ASSERT ATN"},
293 	{ICR_ASSERT_DATA, "ASSERT DATA"},
294 	{0, NULL}
295 },
296 mrs[] = {
297 	{MR_BLOCK_DMA_MODE, "MODE BLOCK DMA"},
298 	{MR_TARGET, "MODE TARGET"},
299 	{MR_ENABLE_PAR_CHECK, "MODE PARITY CHECK"},
300 	{MR_ENABLE_PAR_INTR, "MODE PARITY INTR"},
301 	{MR_ENABLE_EOP_INTR, "MODE EOP INTR"},
302 	{MR_MONITOR_BSY, "MODE MONITOR BSY"},
303 	{MR_DMA_MODE, "MODE DMA"},
304 	{MR_ARBITRATE, "MODE ARBITRATION"},
305 	{0, NULL}
306 };
307 
308 /**
309  * NCR5380_print - print scsi bus signals
310  * @instance: adapter state to dump
311  *
312  * Print the SCSI bus signals for debugging purposes
313  */
314 
315 static void NCR5380_print(struct Scsi_Host *instance)
316 {
317 	unsigned char status, data, basr, mr, icr, i;
318 
319 	data = NCR5380_read(CURRENT_SCSI_DATA_REG);
320 	status = NCR5380_read(STATUS_REG);
321 	mr = NCR5380_read(MODE_REG);
322 	icr = NCR5380_read(INITIATOR_COMMAND_REG);
323 	basr = NCR5380_read(BUS_AND_STATUS_REG);
324 
325 	printk("STATUS_REG: %02x ", status);
326 	for (i = 0; signals[i].mask; ++i)
327 		if (status & signals[i].mask)
328 			printk(",%s", signals[i].name);
329 	printk("\nBASR: %02x ", basr);
330 	for (i = 0; basrs[i].mask; ++i)
331 		if (basr & basrs[i].mask)
332 			printk(",%s", basrs[i].name);
333 	printk("\nICR: %02x ", icr);
334 	for (i = 0; icrs[i].mask; ++i)
335 		if (icr & icrs[i].mask)
336 			printk(",%s", icrs[i].name);
337 	printk("\nMODE: %02x ", mr);
338 	for (i = 0; mrs[i].mask; ++i)
339 		if (mr & mrs[i].mask)
340 			printk(",%s", mrs[i].name);
341 	printk("\n");
342 }
343 
344 static struct {
345 	unsigned char value;
346 	const char *name;
347 } phases[] = {
348 	{PHASE_DATAOUT, "DATAOUT"},
349 	{PHASE_DATAIN, "DATAIN"},
350 	{PHASE_CMDOUT, "CMDOUT"},
351 	{PHASE_STATIN, "STATIN"},
352 	{PHASE_MSGOUT, "MSGOUT"},
353 	{PHASE_MSGIN, "MSGIN"},
354 	{PHASE_UNKNOWN, "UNKNOWN"}
355 };
356 
357 /**
358  * NCR5380_print_phase - show SCSI phase
359  * @instance: adapter to dump
360  *
361  * Print the current SCSI phase for debugging purposes
362  */
363 
364 static void NCR5380_print_phase(struct Scsi_Host *instance)
365 {
366 	unsigned char status;
367 	int i;
368 
369 	status = NCR5380_read(STATUS_REG);
370 	if (!(status & SR_REQ))
371 		shost_printk(KERN_DEBUG, instance, "REQ not asserted, phase unknown.\n");
372 	else {
373 		for (i = 0; (phases[i].value != PHASE_UNKNOWN) &&
374 		     (phases[i].value != (status & PHASE_MASK)); ++i)
375 			;
376 		shost_printk(KERN_DEBUG, instance, "phase %s\n", phases[i].name);
377 	}
378 }
379 #endif
380 
381 
382 static int probe_irq __initdata;
383 
384 /**
385  * probe_intr	-	helper for IRQ autoprobe
386  * @irq: interrupt number
387  * @dev_id: unused
388  * @regs: unused
389  *
390  * Set a flag to indicate the IRQ in question was received. This is
391  * used by the IRQ probe code.
392  */
393 
394 static irqreturn_t __init probe_intr(int irq, void *dev_id)
395 {
396 	probe_irq = irq;
397 	return IRQ_HANDLED;
398 }
399 
400 /**
401  * NCR5380_probe_irq	-	find the IRQ of an NCR5380
402  * @instance: NCR5380 controller
403  * @possible: bitmask of ISA IRQ lines
404  *
405  * Autoprobe for the IRQ line used by the NCR5380 by triggering an IRQ
406  * and then looking to see what interrupt actually turned up.
407  */
408 
409 static int __init __maybe_unused NCR5380_probe_irq(struct Scsi_Host *instance,
410 						int possible)
411 {
412 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
413 	unsigned long timeout;
414 	int trying_irqs, i, mask;
415 
416 	for (trying_irqs = 0, i = 1, mask = 2; i < 16; ++i, mask <<= 1)
417 		if ((mask & possible) && (request_irq(i, &probe_intr, 0, "NCR-probe", NULL) == 0))
418 			trying_irqs |= mask;
419 
420 	timeout = jiffies + msecs_to_jiffies(250);
421 	probe_irq = NO_IRQ;
422 
423 	/*
424 	 * A interrupt is triggered whenever BSY = false, SEL = true
425 	 * and a bit set in the SELECT_ENABLE_REG is asserted on the
426 	 * SCSI bus.
427 	 *
428 	 * Note that the bus is only driven when the phase control signals
429 	 * (I/O, C/D, and MSG) match those in the TCR, so we must reset that
430 	 * to zero.
431 	 */
432 
433 	NCR5380_write(TARGET_COMMAND_REG, 0);
434 	NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
435 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
436 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA | ICR_ASSERT_SEL);
437 
438 	while (probe_irq == NO_IRQ && time_before(jiffies, timeout))
439 		schedule_timeout_uninterruptible(1);
440 
441 	NCR5380_write(SELECT_ENABLE_REG, 0);
442 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
443 
444 	for (i = 1, mask = 2; i < 16; ++i, mask <<= 1)
445 		if (trying_irqs & mask)
446 			free_irq(i, NULL);
447 
448 	return probe_irq;
449 }
450 
451 /**
452  * NCR58380_info - report driver and host information
453  * @instance: relevant scsi host instance
454  *
455  * For use as the host template info() handler.
456  */
457 
458 static const char *NCR5380_info(struct Scsi_Host *instance)
459 {
460 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
461 
462 	return hostdata->info;
463 }
464 
465 static void prepare_info(struct Scsi_Host *instance)
466 {
467 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
468 
469 	snprintf(hostdata->info, sizeof(hostdata->info),
470 	         "%s, io_port 0x%lx, n_io_port %d, "
471 	         "base 0x%lx, irq %d, "
472 	         "can_queue %d, cmd_per_lun %d, "
473 	         "sg_tablesize %d, this_id %d, "
474 	         "flags { %s%s%s}, "
475 	         "options { %s} ",
476 	         instance->hostt->name, instance->io_port, instance->n_io_port,
477 	         instance->base, instance->irq,
478 	         instance->can_queue, instance->cmd_per_lun,
479 	         instance->sg_tablesize, instance->this_id,
480 	         hostdata->flags & FLAG_NO_DMA_FIXUP  ? "NO_DMA_FIXUP "  : "",
481 	         hostdata->flags & FLAG_NO_PSEUDO_DMA ? "NO_PSEUDO_DMA " : "",
482 	         hostdata->flags & FLAG_TOSHIBA_DELAY ? "TOSHIBA_DELAY "  : "",
483 #ifdef AUTOPROBE_IRQ
484 	         "AUTOPROBE_IRQ "
485 #endif
486 #ifdef DIFFERENTIAL
487 	         "DIFFERENTIAL "
488 #endif
489 #ifdef REAL_DMA
490 	         "REAL_DMA "
491 #endif
492 #ifdef REAL_DMA_POLL
493 	         "REAL_DMA_POLL "
494 #endif
495 #ifdef PARITY
496 	         "PARITY "
497 #endif
498 #ifdef PSEUDO_DMA
499 	         "PSEUDO_DMA "
500 #endif
501 	         "");
502 }
503 
504 #ifdef PSEUDO_DMA
505 static int __maybe_unused NCR5380_write_info(struct Scsi_Host *instance,
506 	char *buffer, int length)
507 {
508 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
509 
510 	hostdata->spin_max_r = 0;
511 	hostdata->spin_max_w = 0;
512 	return 0;
513 }
514 
515 static int __maybe_unused NCR5380_show_info(struct seq_file *m,
516                                             struct Scsi_Host *instance)
517 {
518 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
519 
520 	seq_printf(m, "Highwater I/O busy spin counts: write %d, read %d\n",
521 	        hostdata->spin_max_w, hostdata->spin_max_r);
522 	return 0;
523 }
524 #endif
525 
526 /**
527  * NCR5380_init - initialise an NCR5380
528  * @instance: adapter to configure
529  * @flags: control flags
530  *
531  * Initializes *instance and corresponding 5380 chip,
532  * with flags OR'd into the initial flags value.
533  *
534  * Notes : I assume that the host, hostno, and id bits have been
535  * set correctly. I don't care about the irq and other fields.
536  *
537  * Returns 0 for success
538  */
539 
540 static int NCR5380_init(struct Scsi_Host *instance, int flags)
541 {
542 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
543 	int i;
544 	unsigned long deadline;
545 
546 	hostdata->host = instance;
547 	hostdata->id_mask = 1 << instance->this_id;
548 	hostdata->id_higher_mask = 0;
549 	for (i = hostdata->id_mask; i <= 0x80; i <<= 1)
550 		if (i > hostdata->id_mask)
551 			hostdata->id_higher_mask |= i;
552 	for (i = 0; i < 8; ++i)
553 		hostdata->busy[i] = 0;
554 #ifdef REAL_DMA
555 	hostdata->dmalen = 0;
556 #endif
557 	spin_lock_init(&hostdata->lock);
558 	hostdata->connected = NULL;
559 	hostdata->sensing = NULL;
560 	INIT_LIST_HEAD(&hostdata->autosense);
561 	INIT_LIST_HEAD(&hostdata->unissued);
562 	INIT_LIST_HEAD(&hostdata->disconnected);
563 
564 	hostdata->flags = flags;
565 
566 	INIT_WORK(&hostdata->main_task, NCR5380_main);
567 	hostdata->work_q = alloc_workqueue("ncr5380_%d",
568 	                        WQ_UNBOUND | WQ_MEM_RECLAIM,
569 	                        1, instance->host_no);
570 	if (!hostdata->work_q)
571 		return -ENOMEM;
572 
573 	prepare_info(instance);
574 
575 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
576 	NCR5380_write(MODE_REG, MR_BASE);
577 	NCR5380_write(TARGET_COMMAND_REG, 0);
578 	NCR5380_write(SELECT_ENABLE_REG, 0);
579 
580 	/* Calibrate register polling loop */
581 	i = 0;
582 	deadline = jiffies + 1;
583 	do {
584 		cpu_relax();
585 	} while (time_is_after_jiffies(deadline));
586 	deadline += msecs_to_jiffies(256);
587 	do {
588 		NCR5380_read(STATUS_REG);
589 		++i;
590 		cpu_relax();
591 	} while (time_is_after_jiffies(deadline));
592 	hostdata->accesses_per_ms = i / 256;
593 
594 	return 0;
595 }
596 
597 /**
598  * NCR5380_maybe_reset_bus - Detect and correct bus wedge problems.
599  * @instance: adapter to check
600  *
601  * If the system crashed, it may have crashed with a connected target and
602  * the SCSI bus busy. Check for BUS FREE phase. If not, try to abort the
603  * currently established nexus, which we know nothing about. Failing that
604  * do a bus reset.
605  *
606  * Note that a bus reset will cause the chip to assert IRQ.
607  *
608  * Returns 0 if successful, otherwise -ENXIO.
609  */
610 
611 static int NCR5380_maybe_reset_bus(struct Scsi_Host *instance)
612 {
613 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
614 	int pass;
615 
616 	for (pass = 1; (NCR5380_read(STATUS_REG) & SR_BSY) && pass <= 6; ++pass) {
617 		switch (pass) {
618 		case 1:
619 		case 3:
620 		case 5:
621 			shost_printk(KERN_ERR, instance, "SCSI bus busy, waiting up to five seconds\n");
622 			NCR5380_poll_politely(instance,
623 			                      STATUS_REG, SR_BSY, 0, 5 * HZ);
624 			break;
625 		case 2:
626 			shost_printk(KERN_ERR, instance, "bus busy, attempting abort\n");
627 			do_abort(instance);
628 			break;
629 		case 4:
630 			shost_printk(KERN_ERR, instance, "bus busy, attempting reset\n");
631 			do_reset(instance);
632 			/* Wait after a reset; the SCSI standard calls for
633 			 * 250ms, we wait 500ms to be on the safe side.
634 			 * But some Toshiba CD-ROMs need ten times that.
635 			 */
636 			if (hostdata->flags & FLAG_TOSHIBA_DELAY)
637 				msleep(2500);
638 			else
639 				msleep(500);
640 			break;
641 		case 6:
642 			shost_printk(KERN_ERR, instance, "bus locked solid\n");
643 			return -ENXIO;
644 		}
645 	}
646 	return 0;
647 }
648 
649 /**
650  * NCR5380_exit - remove an NCR5380
651  * @instance: adapter to remove
652  *
653  * Assumes that no more work can be queued (e.g. by NCR5380_intr).
654  */
655 
656 static void NCR5380_exit(struct Scsi_Host *instance)
657 {
658 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
659 
660 	cancel_work_sync(&hostdata->main_task);
661 	destroy_workqueue(hostdata->work_q);
662 }
663 
664 /**
665  * complete_cmd - finish processing a command and return it to the SCSI ML
666  * @instance: the host instance
667  * @cmd: command to complete
668  */
669 
670 static void complete_cmd(struct Scsi_Host *instance,
671                          struct scsi_cmnd *cmd)
672 {
673 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
674 
675 	dsprintk(NDEBUG_QUEUES, instance, "complete_cmd: cmd %p\n", cmd);
676 
677 	if (hostdata->sensing == cmd) {
678 		/* Autosense processing ends here */
679 		if ((cmd->result & 0xff) != SAM_STAT_GOOD) {
680 			scsi_eh_restore_cmnd(cmd, &hostdata->ses);
681 			set_host_byte(cmd, DID_ERROR);
682 		} else
683 			scsi_eh_restore_cmnd(cmd, &hostdata->ses);
684 		hostdata->sensing = NULL;
685 	}
686 
687 	hostdata->busy[scmd_id(cmd)] &= ~(1 << cmd->device->lun);
688 
689 	cmd->scsi_done(cmd);
690 }
691 
692 /**
693  * NCR5380_queue_command - queue a command
694  * @instance: the relevant SCSI adapter
695  * @cmd: SCSI command
696  *
697  * cmd is added to the per-instance issue queue, with minor
698  * twiddling done to the host specific fields of cmd.  If the
699  * main coroutine is not running, it is restarted.
700  */
701 
702 static int NCR5380_queue_command(struct Scsi_Host *instance,
703                                  struct scsi_cmnd *cmd)
704 {
705 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
706 	struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
707 	unsigned long flags;
708 
709 #if (NDEBUG & NDEBUG_NO_WRITE)
710 	switch (cmd->cmnd[0]) {
711 	case WRITE_6:
712 	case WRITE_10:
713 		shost_printk(KERN_DEBUG, instance, "WRITE attempted with NDEBUG_NO_WRITE set\n");
714 		cmd->result = (DID_ERROR << 16);
715 		cmd->scsi_done(cmd);
716 		return 0;
717 	}
718 #endif /* (NDEBUG & NDEBUG_NO_WRITE) */
719 
720 	cmd->result = 0;
721 
722 	spin_lock_irqsave(&hostdata->lock, flags);
723 
724 	/*
725 	 * Insert the cmd into the issue queue. Note that REQUEST SENSE
726 	 * commands are added to the head of the queue since any command will
727 	 * clear the contingent allegiance condition that exists and the
728 	 * sense data is only guaranteed to be valid while the condition exists.
729 	 */
730 
731 	if (cmd->cmnd[0] == REQUEST_SENSE)
732 		list_add(&ncmd->list, &hostdata->unissued);
733 	else
734 		list_add_tail(&ncmd->list, &hostdata->unissued);
735 
736 	spin_unlock_irqrestore(&hostdata->lock, flags);
737 
738 	dsprintk(NDEBUG_QUEUES, instance, "command %p added to %s of queue\n",
739 	         cmd, (cmd->cmnd[0] == REQUEST_SENSE) ? "head" : "tail");
740 
741 	/* Kick off command processing */
742 	queue_work(hostdata->work_q, &hostdata->main_task);
743 	return 0;
744 }
745 
746 /**
747  * dequeue_next_cmd - dequeue a command for processing
748  * @instance: the scsi host instance
749  *
750  * Priority is given to commands on the autosense queue. These commands
751  * need autosense because of a CHECK CONDITION result.
752  *
753  * Returns a command pointer if a command is found for a target that is
754  * not already busy. Otherwise returns NULL.
755  */
756 
757 static struct scsi_cmnd *dequeue_next_cmd(struct Scsi_Host *instance)
758 {
759 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
760 	struct NCR5380_cmd *ncmd;
761 	struct scsi_cmnd *cmd;
762 
763 	if (hostdata->sensing || list_empty(&hostdata->autosense)) {
764 		list_for_each_entry(ncmd, &hostdata->unissued, list) {
765 			cmd = NCR5380_to_scmd(ncmd);
766 			dsprintk(NDEBUG_QUEUES, instance, "dequeue: cmd=%p target=%d busy=0x%02x lun=%llu\n",
767 			         cmd, scmd_id(cmd), hostdata->busy[scmd_id(cmd)], cmd->device->lun);
768 
769 			if (!(hostdata->busy[scmd_id(cmd)] & (1 << cmd->device->lun))) {
770 				list_del(&ncmd->list);
771 				dsprintk(NDEBUG_QUEUES, instance,
772 				         "dequeue: removed %p from issue queue\n", cmd);
773 				return cmd;
774 			}
775 		}
776 	} else {
777 		/* Autosense processing begins here */
778 		ncmd = list_first_entry(&hostdata->autosense,
779 		                        struct NCR5380_cmd, list);
780 		list_del(&ncmd->list);
781 		cmd = NCR5380_to_scmd(ncmd);
782 		dsprintk(NDEBUG_QUEUES, instance,
783 		         "dequeue: removed %p from autosense queue\n", cmd);
784 		scsi_eh_prep_cmnd(cmd, &hostdata->ses, NULL, 0, ~0);
785 		hostdata->sensing = cmd;
786 		return cmd;
787 	}
788 	return NULL;
789 }
790 
791 static void requeue_cmd(struct Scsi_Host *instance, struct scsi_cmnd *cmd)
792 {
793 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
794 	struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
795 
796 	if (hostdata->sensing == cmd) {
797 		scsi_eh_restore_cmnd(cmd, &hostdata->ses);
798 		list_add(&ncmd->list, &hostdata->autosense);
799 		hostdata->sensing = NULL;
800 	} else
801 		list_add(&ncmd->list, &hostdata->unissued);
802 }
803 
804 /**
805  * NCR5380_main - NCR state machines
806  *
807  * NCR5380_main is a coroutine that runs as long as more work can
808  * be done on the NCR5380 host adapters in a system.  Both
809  * NCR5380_queue_command() and NCR5380_intr() will try to start it
810  * in case it is not running.
811  */
812 
813 static void NCR5380_main(struct work_struct *work)
814 {
815 	struct NCR5380_hostdata *hostdata =
816 		container_of(work, struct NCR5380_hostdata, main_task);
817 	struct Scsi_Host *instance = hostdata->host;
818 	int done;
819 
820 	do {
821 		done = 1;
822 
823 		spin_lock_irq(&hostdata->lock);
824 		while (!hostdata->connected && !hostdata->selecting) {
825 			struct scsi_cmnd *cmd = dequeue_next_cmd(instance);
826 
827 			if (!cmd)
828 				break;
829 
830 			dsprintk(NDEBUG_MAIN, instance, "main: dequeued %p\n", cmd);
831 
832 			/*
833 			 * Attempt to establish an I_T_L nexus here.
834 			 * On success, instance->hostdata->connected is set.
835 			 * On failure, we must add the command back to the
836 			 * issue queue so we can keep trying.
837 			 */
838 			/*
839 			 * REQUEST SENSE commands are issued without tagged
840 			 * queueing, even on SCSI-II devices because the
841 			 * contingent allegiance condition exists for the
842 			 * entire unit.
843 			 */
844 
845 			if (!NCR5380_select(instance, cmd)) {
846 				dsprintk(NDEBUG_MAIN, instance, "main: select complete\n");
847 			} else {
848 				dsprintk(NDEBUG_MAIN | NDEBUG_QUEUES, instance,
849 				         "main: select failed, returning %p to queue\n", cmd);
850 				requeue_cmd(instance, cmd);
851 			}
852 		}
853 		if (hostdata->connected
854 #ifdef REAL_DMA
855 		    && !hostdata->dmalen
856 #endif
857 		    ) {
858 			dsprintk(NDEBUG_MAIN, instance, "main: performing information transfer\n");
859 			NCR5380_information_transfer(instance);
860 			done = 0;
861 		}
862 		spin_unlock_irq(&hostdata->lock);
863 		if (!done)
864 			cond_resched();
865 	} while (!done);
866 }
867 
868 #ifndef DONT_USE_INTR
869 
870 /**
871  * NCR5380_intr - generic NCR5380 irq handler
872  * @irq: interrupt number
873  * @dev_id: device info
874  *
875  * Handle interrupts, reestablishing I_T_L or I_T_L_Q nexuses
876  * from the disconnected queue, and restarting NCR5380_main()
877  * as required.
878  *
879  * The chip can assert IRQ in any of six different conditions. The IRQ flag
880  * is then cleared by reading the Reset Parity/Interrupt Register (RPIR).
881  * Three of these six conditions are latched in the Bus and Status Register:
882  * - End of DMA (cleared by ending DMA Mode)
883  * - Parity error (cleared by reading RPIR)
884  * - Loss of BSY (cleared by reading RPIR)
885  * Two conditions have flag bits that are not latched:
886  * - Bus phase mismatch (non-maskable in DMA Mode, cleared by ending DMA Mode)
887  * - Bus reset (non-maskable)
888  * The remaining condition has no flag bit at all:
889  * - Selection/reselection
890  *
891  * Hence, establishing the cause(s) of any interrupt is partly guesswork.
892  * In "The DP8490 and DP5380 Comparison Guide", National Semiconductor
893  * claimed that "the design of the [DP8490] interrupt logic ensures
894  * interrupts will not be lost (they can be on the DP5380)."
895  * The L5380/53C80 datasheet from LOGIC Devices has more details.
896  *
897  * Checking for bus reset by reading RST is futile because of interrupt
898  * latency, but a bus reset will reset chip logic. Checking for parity error
899  * is unnecessary because that interrupt is never enabled. A Loss of BSY
900  * condition will clear DMA Mode. We can tell when this occurs because the
901  * the Busy Monitor interrupt is enabled together with DMA Mode.
902  */
903 
904 static irqreturn_t NCR5380_intr(int irq, void *dev_id)
905 {
906 	struct Scsi_Host *instance = dev_id;
907 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
908 	int handled = 0;
909 	unsigned char basr;
910 	unsigned long flags;
911 
912 	spin_lock_irqsave(&hostdata->lock, flags);
913 
914 	basr = NCR5380_read(BUS_AND_STATUS_REG);
915 	if (basr & BASR_IRQ) {
916 		unsigned char mr = NCR5380_read(MODE_REG);
917 		unsigned char sr = NCR5380_read(STATUS_REG);
918 
919 		dsprintk(NDEBUG_INTR, instance, "IRQ %d, BASR 0x%02x, SR 0x%02x, MR 0x%02x\n",
920 		         irq, basr, sr, mr);
921 
922 #if defined(REAL_DMA)
923 		if ((mr & MR_DMA_MODE) || (mr & MR_MONITOR_BSY)) {
924 			/* Probably End of DMA, Phase Mismatch or Loss of BSY.
925 			 * We ack IRQ after clearing Mode Register. Workarounds
926 			 * for End of DMA errata need to happen in DMA Mode.
927 			 */
928 
929 			dsprintk(NDEBUG_INTR, instance, "interrupt in DMA mode\n");
930 
931 			int transferred;
932 
933 			if (!hostdata->connected)
934 				panic("scsi%d : DMA interrupt with no connected cmd\n",
935 				      instance->hostno);
936 
937 			transferred = hostdata->dmalen - NCR5380_dma_residual(instance);
938 			hostdata->connected->SCp.this_residual -= transferred;
939 			hostdata->connected->SCp.ptr += transferred;
940 			hostdata->dmalen = 0;
941 
942 			/* FIXME: we need to poll briefly then defer a workqueue task ! */
943 			NCR5380_poll_politely(hostdata, BUS_AND_STATUS_REG, BASR_ACK, 0, 2 * HZ);
944 
945 			NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
946 			NCR5380_write(MODE_REG, MR_BASE);
947 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);
948 		} else
949 #endif /* REAL_DMA */
950 		if ((NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_mask) &&
951 		    (sr & (SR_SEL | SR_IO | SR_BSY | SR_RST)) == (SR_SEL | SR_IO)) {
952 			/* Probably reselected */
953 			NCR5380_write(SELECT_ENABLE_REG, 0);
954 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);
955 
956 			dsprintk(NDEBUG_INTR, instance, "interrupt with SEL and IO\n");
957 
958 			if (!hostdata->connected) {
959 				NCR5380_reselect(instance);
960 				queue_work(hostdata->work_q, &hostdata->main_task);
961 			}
962 			if (!hostdata->connected)
963 				NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
964 		} else {
965 			/* Probably Bus Reset */
966 			NCR5380_read(RESET_PARITY_INTERRUPT_REG);
967 
968 			dsprintk(NDEBUG_INTR, instance, "unknown interrupt\n");
969 		}
970 		handled = 1;
971 	} else {
972 		shost_printk(KERN_NOTICE, instance, "interrupt without IRQ bit\n");
973 	}
974 
975 	spin_unlock_irqrestore(&hostdata->lock, flags);
976 
977 	return IRQ_RETVAL(handled);
978 }
979 
980 #endif
981 
982 /*
983  * Function : int NCR5380_select(struct Scsi_Host *instance,
984  * struct scsi_cmnd *cmd)
985  *
986  * Purpose : establishes I_T_L or I_T_L_Q nexus for new or existing command,
987  * including ARBITRATION, SELECTION, and initial message out for
988  * IDENTIFY and queue messages.
989  *
990  * Inputs : instance - instantiation of the 5380 driver on which this
991  * target lives, cmd - SCSI command to execute.
992  *
993  * Returns cmd if selection failed but should be retried,
994  * NULL if selection failed and should not be retried, or
995  * NULL if selection succeeded (hostdata->connected == cmd).
996  *
997  * Side effects :
998  * If bus busy, arbitration failed, etc, NCR5380_select() will exit
999  * with registers as they should have been on entry - ie
1000  * SELECT_ENABLE will be set appropriately, the NCR5380
1001  * will cease to drive any SCSI bus signals.
1002  *
1003  * If successful : I_T_L or I_T_L_Q nexus will be established,
1004  * instance->connected will be set to cmd.
1005  * SELECT interrupt will be disabled.
1006  *
1007  * If failed (no target) : cmd->scsi_done() will be called, and the
1008  * cmd->result host byte set to DID_BAD_TARGET.
1009  */
1010 
1011 static struct scsi_cmnd *NCR5380_select(struct Scsi_Host *instance,
1012                                         struct scsi_cmnd *cmd)
1013 {
1014 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
1015 	unsigned char tmp[3], phase;
1016 	unsigned char *data;
1017 	int len;
1018 	int err;
1019 
1020 	NCR5380_dprint(NDEBUG_ARBITRATION, instance);
1021 	dsprintk(NDEBUG_ARBITRATION, instance, "starting arbitration, id = %d\n",
1022 	         instance->this_id);
1023 
1024 	/*
1025 	 * Arbitration and selection phases are slow and involve dropping the
1026 	 * lock, so we have to watch out for EH. An exception handler may
1027 	 * change 'selecting' to NULL. This function will then return NULL
1028 	 * so that the caller will forget about 'cmd'. (During information
1029 	 * transfer phases, EH may change 'connected' to NULL.)
1030 	 */
1031 	hostdata->selecting = cmd;
1032 
1033 	/*
1034 	 * Set the phase bits to 0, otherwise the NCR5380 won't drive the
1035 	 * data bus during SELECTION.
1036 	 */
1037 
1038 	NCR5380_write(TARGET_COMMAND_REG, 0);
1039 
1040 	/*
1041 	 * Start arbitration.
1042 	 */
1043 
1044 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask);
1045 	NCR5380_write(MODE_REG, MR_ARBITRATE);
1046 
1047 	/* The chip now waits for BUS FREE phase. Then after the 800 ns
1048 	 * Bus Free Delay, arbitration will begin.
1049 	 */
1050 
1051 	spin_unlock_irq(&hostdata->lock);
1052 	err = NCR5380_poll_politely2(instance, MODE_REG, MR_ARBITRATE, 0,
1053 	                INITIATOR_COMMAND_REG, ICR_ARBITRATION_PROGRESS,
1054 	                                       ICR_ARBITRATION_PROGRESS, HZ);
1055 	spin_lock_irq(&hostdata->lock);
1056 	if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE)) {
1057 		/* Reselection interrupt */
1058 		goto out;
1059 	}
1060 	if (!hostdata->selecting) {
1061 		/* Command was aborted */
1062 		NCR5380_write(MODE_REG, MR_BASE);
1063 		goto out;
1064 	}
1065 	if (err < 0) {
1066 		NCR5380_write(MODE_REG, MR_BASE);
1067 		shost_printk(KERN_ERR, instance,
1068 		             "select: arbitration timeout\n");
1069 		goto out;
1070 	}
1071 	spin_unlock_irq(&hostdata->lock);
1072 
1073 	/* The SCSI-2 arbitration delay is 2.4 us */
1074 	udelay(3);
1075 
1076 	/* Check for lost arbitration */
1077 	if ((NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST) ||
1078 	    (NCR5380_read(CURRENT_SCSI_DATA_REG) & hostdata->id_higher_mask) ||
1079 	    (NCR5380_read(INITIATOR_COMMAND_REG) & ICR_ARBITRATION_LOST)) {
1080 		NCR5380_write(MODE_REG, MR_BASE);
1081 		dsprintk(NDEBUG_ARBITRATION, instance, "lost arbitration, deasserting MR_ARBITRATE\n");
1082 		spin_lock_irq(&hostdata->lock);
1083 		goto out;
1084 	}
1085 
1086 	/* After/during arbitration, BSY should be asserted.
1087 	 * IBM DPES-31080 Version S31Q works now
1088 	 * Tnx to Thomas_Roesch@m2.maus.de for finding this! (Roman)
1089 	 */
1090 	NCR5380_write(INITIATOR_COMMAND_REG,
1091 		      ICR_BASE | ICR_ASSERT_SEL | ICR_ASSERT_BSY);
1092 
1093 	/*
1094 	 * Again, bus clear + bus settle time is 1.2us, however, this is
1095 	 * a minimum so we'll udelay ceil(1.2)
1096 	 */
1097 
1098 	if (hostdata->flags & FLAG_TOSHIBA_DELAY)
1099 		udelay(15);
1100 	else
1101 		udelay(2);
1102 
1103 	spin_lock_irq(&hostdata->lock);
1104 
1105 	/* NCR5380_reselect() clears MODE_REG after a reselection interrupt */
1106 	if (!(NCR5380_read(MODE_REG) & MR_ARBITRATE))
1107 		goto out;
1108 
1109 	if (!hostdata->selecting) {
1110 		NCR5380_write(MODE_REG, MR_BASE);
1111 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1112 		goto out;
1113 	}
1114 
1115 	dsprintk(NDEBUG_ARBITRATION, instance, "won arbitration\n");
1116 
1117 	/*
1118 	 * Now that we have won arbitration, start Selection process, asserting
1119 	 * the host and target ID's on the SCSI bus.
1120 	 */
1121 
1122 	NCR5380_write(OUTPUT_DATA_REG, hostdata->id_mask | (1 << scmd_id(cmd)));
1123 
1124 	/*
1125 	 * Raise ATN while SEL is true before BSY goes false from arbitration,
1126 	 * since this is the only way to guarantee that we'll get a MESSAGE OUT
1127 	 * phase immediately after selection.
1128 	 */
1129 
1130 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY |
1131 	              ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1132 	NCR5380_write(MODE_REG, MR_BASE);
1133 
1134 	/*
1135 	 * Reselect interrupts must be turned off prior to the dropping of BSY,
1136 	 * otherwise we will trigger an interrupt.
1137 	 */
1138 	NCR5380_write(SELECT_ENABLE_REG, 0);
1139 
1140 	spin_unlock_irq(&hostdata->lock);
1141 
1142 	/*
1143 	 * The initiator shall then wait at least two deskew delays and release
1144 	 * the BSY signal.
1145 	 */
1146 	udelay(1);        /* wingel -- wait two bus deskew delay >2*45ns */
1147 
1148 	/* Reset BSY */
1149 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA |
1150 	              ICR_ASSERT_ATN | ICR_ASSERT_SEL);
1151 
1152 	/*
1153 	 * Something weird happens when we cease to drive BSY - looks
1154 	 * like the board/chip is letting us do another read before the
1155 	 * appropriate propagation delay has expired, and we're confusing
1156 	 * a BSY signal from ourselves as the target's response to SELECTION.
1157 	 *
1158 	 * A small delay (the 'C++' frontend breaks the pipeline with an
1159 	 * unnecessary jump, making it work on my 386-33/Trantor T128, the
1160 	 * tighter 'C' code breaks and requires this) solves the problem -
1161 	 * the 1 us delay is arbitrary, and only used because this delay will
1162 	 * be the same on other platforms and since it works here, it should
1163 	 * work there.
1164 	 *
1165 	 * wingel suggests that this could be due to failing to wait
1166 	 * one deskew delay.
1167 	 */
1168 
1169 	udelay(1);
1170 
1171 	dsprintk(NDEBUG_SELECTION, instance, "selecting target %d\n", scmd_id(cmd));
1172 
1173 	/*
1174 	 * The SCSI specification calls for a 250 ms timeout for the actual
1175 	 * selection.
1176 	 */
1177 
1178 	err = NCR5380_poll_politely(instance, STATUS_REG, SR_BSY, SR_BSY,
1179 	                            msecs_to_jiffies(250));
1180 
1181 	if ((NCR5380_read(STATUS_REG) & (SR_SEL | SR_IO)) == (SR_SEL | SR_IO)) {
1182 		spin_lock_irq(&hostdata->lock);
1183 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1184 		NCR5380_reselect(instance);
1185 		if (!hostdata->connected)
1186 			NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1187 		shost_printk(KERN_ERR, instance, "reselection after won arbitration?\n");
1188 		goto out;
1189 	}
1190 
1191 	if (err < 0) {
1192 		spin_lock_irq(&hostdata->lock);
1193 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1194 		NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1195 		/* Can't touch cmd if it has been reclaimed by the scsi ML */
1196 		if (hostdata->selecting) {
1197 			cmd->result = DID_BAD_TARGET << 16;
1198 			complete_cmd(instance, cmd);
1199 			dsprintk(NDEBUG_SELECTION, instance, "target did not respond within 250ms\n");
1200 			cmd = NULL;
1201 		}
1202 		goto out;
1203 	}
1204 
1205 	/*
1206 	 * No less than two deskew delays after the initiator detects the
1207 	 * BSY signal is true, it shall release the SEL signal and may
1208 	 * change the DATA BUS.                                     -wingel
1209 	 */
1210 
1211 	udelay(1);
1212 
1213 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1214 
1215 	/*
1216 	 * Since we followed the SCSI spec, and raised ATN while SEL
1217 	 * was true but before BSY was false during selection, the information
1218 	 * transfer phase should be a MESSAGE OUT phase so that we can send the
1219 	 * IDENTIFY message.
1220 	 *
1221 	 * If SCSI-II tagged queuing is enabled, we also send a SIMPLE_QUEUE_TAG
1222 	 * message (2 bytes) with a tag ID that we increment with every command
1223 	 * until it wraps back to 0.
1224 	 *
1225 	 * XXX - it turns out that there are some broken SCSI-II devices,
1226 	 * which claim to support tagged queuing but fail when more than
1227 	 * some number of commands are issued at once.
1228 	 */
1229 
1230 	/* Wait for start of REQ/ACK handshake */
1231 
1232 	err = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
1233 	spin_lock_irq(&hostdata->lock);
1234 	if (err < 0) {
1235 		shost_printk(KERN_ERR, instance, "select: REQ timeout\n");
1236 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1237 		NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1238 		goto out;
1239 	}
1240 	if (!hostdata->selecting) {
1241 		do_abort(instance);
1242 		goto out;
1243 	}
1244 
1245 	dsprintk(NDEBUG_SELECTION, instance, "target %d selected, going into MESSAGE OUT phase.\n",
1246 	         scmd_id(cmd));
1247 	tmp[0] = IDENTIFY(((instance->irq == NO_IRQ) ? 0 : 1), cmd->device->lun);
1248 
1249 	len = 1;
1250 	cmd->tag = 0;
1251 
1252 	/* Send message(s) */
1253 	data = tmp;
1254 	phase = PHASE_MSGOUT;
1255 	NCR5380_transfer_pio(instance, &phase, &len, &data);
1256 	dsprintk(NDEBUG_SELECTION, instance, "nexus established.\n");
1257 	/* XXX need to handle errors here */
1258 
1259 	hostdata->connected = cmd;
1260 	hostdata->busy[cmd->device->id] |= 1 << cmd->device->lun;
1261 
1262 	initialize_SCp(cmd);
1263 
1264 	cmd = NULL;
1265 
1266 out:
1267 	if (!hostdata->selecting)
1268 		return NULL;
1269 	hostdata->selecting = NULL;
1270 	return cmd;
1271 }
1272 
1273 /*
1274  * Function : int NCR5380_transfer_pio (struct Scsi_Host *instance,
1275  * unsigned char *phase, int *count, unsigned char **data)
1276  *
1277  * Purpose : transfers data in given phase using polled I/O
1278  *
1279  * Inputs : instance - instance of driver, *phase - pointer to
1280  * what phase is expected, *count - pointer to number of
1281  * bytes to transfer, **data - pointer to data pointer.
1282  *
1283  * Returns : -1 when different phase is entered without transferring
1284  * maximum number of bytes, 0 if all bytes are transferred or exit
1285  * is in same phase.
1286  *
1287  * Also, *phase, *count, *data are modified in place.
1288  *
1289  * XXX Note : handling for bus free may be useful.
1290  */
1291 
1292 /*
1293  * Note : this code is not as quick as it could be, however it
1294  * IS 100% reliable, and for the actual data transfer where speed
1295  * counts, we will always do a pseudo DMA or DMA transfer.
1296  */
1297 
1298 static int NCR5380_transfer_pio(struct Scsi_Host *instance,
1299 				unsigned char *phase, int *count,
1300 				unsigned char **data)
1301 {
1302 	unsigned char p = *phase, tmp;
1303 	int c = *count;
1304 	unsigned char *d = *data;
1305 
1306 	/*
1307 	 * The NCR5380 chip will only drive the SCSI bus when the
1308 	 * phase specified in the appropriate bits of the TARGET COMMAND
1309 	 * REGISTER match the STATUS REGISTER
1310 	 */
1311 
1312 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1313 
1314 	do {
1315 		/*
1316 		 * Wait for assertion of REQ, after which the phase bits will be
1317 		 * valid
1318 		 */
1319 
1320 		if (NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ) < 0)
1321 			break;
1322 
1323 		dsprintk(NDEBUG_HANDSHAKE, instance, "REQ asserted\n");
1324 
1325 		/* Check for phase mismatch */
1326 		if ((NCR5380_read(STATUS_REG) & PHASE_MASK) != p) {
1327 			dsprintk(NDEBUG_PIO, instance, "phase mismatch\n");
1328 			NCR5380_dprint_phase(NDEBUG_PIO, instance);
1329 			break;
1330 		}
1331 
1332 		/* Do actual transfer from SCSI bus to / from memory */
1333 		if (!(p & SR_IO))
1334 			NCR5380_write(OUTPUT_DATA_REG, *d);
1335 		else
1336 			*d = NCR5380_read(CURRENT_SCSI_DATA_REG);
1337 
1338 		++d;
1339 
1340 		/*
1341 		 * The SCSI standard suggests that in MSGOUT phase, the initiator
1342 		 * should drop ATN on the last byte of the message phase
1343 		 * after REQ has been asserted for the handshake but before
1344 		 * the initiator raises ACK.
1345 		 */
1346 
1347 		if (!(p & SR_IO)) {
1348 			if (!((p & SR_MSG) && c > 1)) {
1349 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1350 				NCR5380_dprint(NDEBUG_PIO, instance);
1351 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1352 				              ICR_ASSERT_DATA | ICR_ASSERT_ACK);
1353 			} else {
1354 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1355 				              ICR_ASSERT_DATA | ICR_ASSERT_ATN);
1356 				NCR5380_dprint(NDEBUG_PIO, instance);
1357 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1358 				              ICR_ASSERT_DATA | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1359 			}
1360 		} else {
1361 			NCR5380_dprint(NDEBUG_PIO, instance);
1362 			NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ACK);
1363 		}
1364 
1365 		if (NCR5380_poll_politely(instance,
1366 		                          STATUS_REG, SR_REQ, 0, 5 * HZ) < 0)
1367 			break;
1368 
1369 		dsprintk(NDEBUG_HANDSHAKE, instance, "REQ negated, handshake complete\n");
1370 
1371 /*
1372  * We have several special cases to consider during REQ/ACK handshaking :
1373  * 1.  We were in MSGOUT phase, and we are on the last byte of the
1374  * message.  ATN must be dropped as ACK is dropped.
1375  *
1376  * 2.  We are in a MSGIN phase, and we are on the last byte of the
1377  * message.  We must exit with ACK asserted, so that the calling
1378  * code may raise ATN before dropping ACK to reject the message.
1379  *
1380  * 3.  ACK and ATN are clear and the target may proceed as normal.
1381  */
1382 		if (!(p == PHASE_MSGIN && c == 1)) {
1383 			if (p == PHASE_MSGOUT && c > 1)
1384 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1385 			else
1386 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1387 		}
1388 	} while (--c);
1389 
1390 	dsprintk(NDEBUG_PIO, instance, "residual %d\n", c);
1391 
1392 	*count = c;
1393 	*data = d;
1394 	tmp = NCR5380_read(STATUS_REG);
1395 	/* The phase read from the bus is valid if either REQ is (already)
1396 	 * asserted or if ACK hasn't been released yet. The latter applies if
1397 	 * we're in MSG IN, DATA IN or STATUS and all bytes have been received.
1398 	 */
1399 	if ((tmp & SR_REQ) || ((tmp & SR_IO) && c == 0))
1400 		*phase = tmp & PHASE_MASK;
1401 	else
1402 		*phase = PHASE_UNKNOWN;
1403 
1404 	if (!c || (*phase == p))
1405 		return 0;
1406 	else
1407 		return -1;
1408 }
1409 
1410 /**
1411  * do_reset - issue a reset command
1412  * @instance: adapter to reset
1413  *
1414  * Issue a reset sequence to the NCR5380 and try and get the bus
1415  * back into sane shape.
1416  *
1417  * This clears the reset interrupt flag because there may be no handler for
1418  * it. When the driver is initialized, the NCR5380_intr() handler has not yet
1419  * been installed. And when in EH we may have released the ST DMA interrupt.
1420  */
1421 
1422 static void do_reset(struct Scsi_Host *instance)
1423 {
1424 	unsigned long flags;
1425 
1426 	local_irq_save(flags);
1427 	NCR5380_write(TARGET_COMMAND_REG,
1428 	              PHASE_SR_TO_TCR(NCR5380_read(STATUS_REG) & PHASE_MASK));
1429 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST);
1430 	udelay(50);
1431 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1432 	(void)NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1433 	local_irq_restore(flags);
1434 }
1435 
1436 /**
1437  * do_abort - abort the currently established nexus by going to
1438  * MESSAGE OUT phase and sending an ABORT message.
1439  * @instance: relevant scsi host instance
1440  *
1441  * Returns 0 on success, -1 on failure.
1442  */
1443 
1444 static int do_abort(struct Scsi_Host *instance)
1445 {
1446 	unsigned char *msgptr, phase, tmp;
1447 	int len;
1448 	int rc;
1449 
1450 	/* Request message out phase */
1451 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1452 
1453 	/*
1454 	 * Wait for the target to indicate a valid phase by asserting
1455 	 * REQ.  Once this happens, we'll have either a MSGOUT phase
1456 	 * and can immediately send the ABORT message, or we'll have some
1457 	 * other phase and will have to source/sink data.
1458 	 *
1459 	 * We really don't care what value was on the bus or what value
1460 	 * the target sees, so we just handshake.
1461 	 */
1462 
1463 	rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, 10 * HZ);
1464 	if (rc < 0)
1465 		goto timeout;
1466 
1467 	tmp = NCR5380_read(STATUS_REG) & PHASE_MASK;
1468 
1469 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1470 
1471 	if (tmp != PHASE_MSGOUT) {
1472 		NCR5380_write(INITIATOR_COMMAND_REG,
1473 		              ICR_BASE | ICR_ASSERT_ATN | ICR_ASSERT_ACK);
1474 		rc = NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, 0, 3 * HZ);
1475 		if (rc < 0)
1476 			goto timeout;
1477 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
1478 	}
1479 
1480 	tmp = ABORT;
1481 	msgptr = &tmp;
1482 	len = 1;
1483 	phase = PHASE_MSGOUT;
1484 	NCR5380_transfer_pio(instance, &phase, &len, &msgptr);
1485 
1486 	/*
1487 	 * If we got here, and the command completed successfully,
1488 	 * we're about to go into bus free state.
1489 	 */
1490 
1491 	return len ? -1 : 0;
1492 
1493 timeout:
1494 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1495 	return -1;
1496 }
1497 
1498 #if defined(REAL_DMA) || defined(PSEUDO_DMA) || defined (REAL_DMA_POLL)
1499 /*
1500  * Function : int NCR5380_transfer_dma (struct Scsi_Host *instance,
1501  * unsigned char *phase, int *count, unsigned char **data)
1502  *
1503  * Purpose : transfers data in given phase using either real
1504  * or pseudo DMA.
1505  *
1506  * Inputs : instance - instance of driver, *phase - pointer to
1507  * what phase is expected, *count - pointer to number of
1508  * bytes to transfer, **data - pointer to data pointer.
1509  *
1510  * Returns : -1 when different phase is entered without transferring
1511  * maximum number of bytes, 0 if all bytes or transferred or exit
1512  * is in same phase.
1513  *
1514  * Also, *phase, *count, *data are modified in place.
1515  */
1516 
1517 
1518 static int NCR5380_transfer_dma(struct Scsi_Host *instance,
1519 				unsigned char *phase, int *count,
1520 				unsigned char **data)
1521 {
1522 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
1523 	register int c = *count;
1524 	register unsigned char p = *phase;
1525 	register unsigned char *d = *data;
1526 	unsigned char tmp;
1527 	int foo;
1528 #if defined(REAL_DMA_POLL)
1529 	int cnt, toPIO;
1530 	unsigned char saved_data = 0, overrun = 0, residue;
1531 #endif
1532 
1533 	if ((tmp = (NCR5380_read(STATUS_REG) & PHASE_MASK)) != p) {
1534 		*phase = tmp;
1535 		return -1;
1536 	}
1537 #if defined(REAL_DMA) || defined(REAL_DMA_POLL)
1538 	if (p & SR_IO) {
1539 		if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS))
1540 			c -= 2;
1541 	}
1542 	hostdata->dma_len = (p & SR_IO) ? NCR5380_dma_read_setup(instance, d, c) : NCR5380_dma_write_setup(instance, d, c);
1543 
1544 	dsprintk(NDEBUG_DMA, instance, "initializing DMA %s: length %d, address %p\n",
1545 	         (p & SR_IO) ? "receive" : "send", c, *data);
1546 #endif
1547 
1548 	NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(p));
1549 
1550 #ifdef REAL_DMA
1551 	NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1552 	                        MR_ENABLE_EOP_INTR);
1553 #elif defined(REAL_DMA_POLL)
1554 	NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1555 #else
1556 	/*
1557 	 * Note : on my sample board, watch-dog timeouts occurred when interrupts
1558 	 * were not disabled for the duration of a single DMA transfer, from
1559 	 * before the setting of DMA mode to after transfer of the last byte.
1560 	 */
1561 
1562 	if (hostdata->flags & FLAG_NO_DMA_FIXUP)
1563 		NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY |
1564 		                        MR_ENABLE_EOP_INTR);
1565 	else
1566 		NCR5380_write(MODE_REG, MR_BASE | MR_DMA_MODE | MR_MONITOR_BSY);
1567 #endif				/* def REAL_DMA */
1568 
1569 	dprintk(NDEBUG_DMA, "scsi%d : mode reg = 0x%X\n", instance->host_no, NCR5380_read(MODE_REG));
1570 
1571 	/*
1572 	 * On the PAS16 at least I/O recovery delays are not needed here.
1573 	 * Everyone else seems to want them.
1574 	 */
1575 
1576 	if (p & SR_IO) {
1577 		io_recovery_delay(1);
1578 		NCR5380_write(START_DMA_INITIATOR_RECEIVE_REG, 0);
1579 	} else {
1580 		io_recovery_delay(1);
1581 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_DATA);
1582 		io_recovery_delay(1);
1583 		NCR5380_write(START_DMA_SEND_REG, 0);
1584 		io_recovery_delay(1);
1585 	}
1586 
1587 #if defined(REAL_DMA_POLL)
1588 	do {
1589 		tmp = NCR5380_read(BUS_AND_STATUS_REG);
1590 	} while ((tmp & BASR_PHASE_MATCH) && !(tmp & (BASR_BUSY_ERROR | BASR_END_DMA_TRANSFER)));
1591 
1592 /*
1593  * At this point, either we've completed DMA, or we have a phase mismatch,
1594  * or we've unexpectedly lost BUSY (which is a real error).
1595  *
1596  * For DMA sends, we want to wait until the last byte has been
1597  * transferred out over the bus before we turn off DMA mode.  Alas, there
1598  * seems to be no terribly good way of doing this on a 5380 under all
1599  * conditions.  For non-scatter-gather operations, we can wait until REQ
1600  * and ACK both go false, or until a phase mismatch occurs.  Gather-sends
1601  * are nastier, since the device will be expecting more data than we
1602  * are prepared to send it, and REQ will remain asserted.  On a 53C8[01] we
1603  * could test Last Byte Sent to assure transfer (I imagine this is precisely
1604  * why this signal was added to the newer chips) but on the older 538[01]
1605  * this signal does not exist.  The workaround for this lack is a watchdog;
1606  * we bail out of the wait-loop after a modest amount of wait-time if
1607  * the usual exit conditions are not met.  Not a terribly clean or
1608  * correct solution :-%
1609  *
1610  * DMA receive is equally tricky due to a nasty characteristic of the NCR5380.
1611  * If the chip is in DMA receive mode, it will respond to a target's
1612  * REQ by latching the SCSI data into the INPUT DATA register and asserting
1613  * ACK, even if it has _already_ been notified by the DMA controller that
1614  * the current DMA transfer has completed!  If the NCR5380 is then taken
1615  * out of DMA mode, this already-acknowledged byte is lost. This is
1616  * not a problem for "one DMA transfer per READ command", because
1617  * the situation will never arise... either all of the data is DMA'ed
1618  * properly, or the target switches to MESSAGE IN phase to signal a
1619  * disconnection (either operation bringing the DMA to a clean halt).
1620  * However, in order to handle scatter-receive, we must work around the
1621  * problem.  The chosen fix is to DMA N-2 bytes, then check for the
1622  * condition before taking the NCR5380 out of DMA mode.  One or two extra
1623  * bytes are transferred via PIO as necessary to fill out the original
1624  * request.
1625  */
1626 
1627 	if (p & SR_IO) {
1628 		if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS)) {
1629 			udelay(10);
1630 			if ((NCR5380_read(BUS_AND_STATUS_REG) & (BASR_PHASE_MATCH | BASR_ACK)) ==
1631 			    (BASR_PHASE_MATCH | BASR_ACK)) {
1632 				saved_data = NCR5380_read(INPUT_DATA_REGISTER);
1633 				overrun = 1;
1634 			}
1635 		}
1636 	} else {
1637 		int limit = 100;
1638 		while (((tmp = NCR5380_read(BUS_AND_STATUS_REG)) & BASR_ACK) || (NCR5380_read(STATUS_REG) & SR_REQ)) {
1639 			if (!(tmp & BASR_PHASE_MATCH))
1640 				break;
1641 			if (--limit < 0)
1642 				break;
1643 		}
1644 	}
1645 
1646 	dsprintk(NDEBUG_DMA, "polled DMA transfer complete, basr 0x%02x, sr 0x%02x\n",
1647 	         tmp, NCR5380_read(STATUS_REG));
1648 
1649 	NCR5380_write(MODE_REG, MR_BASE);
1650 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1651 
1652 	residue = NCR5380_dma_residual(instance);
1653 	c -= residue;
1654 	*count -= c;
1655 	*data += c;
1656 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1657 
1658 	if (!(hostdata->flags & FLAG_NO_DMA_FIXUPS) &&
1659 	    *phase == p && (p & SR_IO) && residue == 0) {
1660 		if (overrun) {
1661 			dprintk(NDEBUG_DMA, "Got an input overrun, using saved byte\n");
1662 			**data = saved_data;
1663 			*data += 1;
1664 			*count -= 1;
1665 			cnt = toPIO = 1;
1666 		} else {
1667 			printk("No overrun??\n");
1668 			cnt = toPIO = 2;
1669 		}
1670 		dprintk(NDEBUG_DMA, "Doing %d-byte PIO to 0x%X\n", cnt, *data);
1671 		NCR5380_transfer_pio(instance, phase, &cnt, data);
1672 		*count -= toPIO - cnt;
1673 	}
1674 
1675 	dprintk(NDEBUG_DMA, "Return with data ptr = 0x%X, count %d, last 0x%X, next 0x%X\n", *data, *count, *(*data + *count - 1), *(*data + *count));
1676 	return 0;
1677 
1678 #elif defined(REAL_DMA)
1679 	return 0;
1680 #else				/* defined(REAL_DMA_POLL) */
1681 	if (p & SR_IO) {
1682 		foo = NCR5380_pread(instance, d,
1683 			hostdata->flags & FLAG_NO_DMA_FIXUP ? c : c - 1);
1684 		if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1685 			/*
1686 			 * We can't disable DMA mode after successfully transferring
1687 			 * what we plan to be the last byte, since that would open up
1688 			 * a race condition where if the target asserted REQ before
1689 			 * we got the DMA mode reset, the NCR5380 would have latched
1690 			 * an additional byte into the INPUT DATA register and we'd
1691 			 * have dropped it.
1692 			 *
1693 			 * The workaround was to transfer one fewer bytes than we
1694 			 * intended to with the pseudo-DMA read function, wait for
1695 			 * the chip to latch the last byte, read it, and then disable
1696 			 * pseudo-DMA mode.
1697 			 *
1698 			 * After REQ is asserted, the NCR5380 asserts DRQ and ACK.
1699 			 * REQ is deasserted when ACK is asserted, and not reasserted
1700 			 * until ACK goes false.  Since the NCR5380 won't lower ACK
1701 			 * until DACK is asserted, which won't happen unless we twiddle
1702 			 * the DMA port or we take the NCR5380 out of DMA mode, we
1703 			 * can guarantee that we won't handshake another extra
1704 			 * byte.
1705 			 */
1706 
1707 			if (NCR5380_poll_politely(instance, BUS_AND_STATUS_REG,
1708 			                          BASR_DRQ, BASR_DRQ, HZ) < 0) {
1709 				foo = -1;
1710 				shost_printk(KERN_ERR, instance, "PDMA read: DRQ timeout\n");
1711 			}
1712 			if (NCR5380_poll_politely(instance, STATUS_REG,
1713 			                          SR_REQ, 0, HZ) < 0) {
1714 				foo = -1;
1715 				shost_printk(KERN_ERR, instance, "PDMA read: !REQ timeout\n");
1716 			}
1717 			d[c - 1] = NCR5380_read(INPUT_DATA_REG);
1718 		}
1719 	} else {
1720 		foo = NCR5380_pwrite(instance, d, c);
1721 		if (!foo && !(hostdata->flags & FLAG_NO_DMA_FIXUP)) {
1722 			/*
1723 			 * Wait for the last byte to be sent.  If REQ is being asserted for
1724 			 * the byte we're interested, we'll ACK it and it will go false.
1725 			 */
1726 			if (NCR5380_poll_politely2(instance,
1727 			     BUS_AND_STATUS_REG, BASR_DRQ, BASR_DRQ,
1728 			     BUS_AND_STATUS_REG, BASR_PHASE_MATCH, 0, HZ) < 0) {
1729 				foo = -1;
1730 				shost_printk(KERN_ERR, instance, "PDMA write: DRQ and phase timeout\n");
1731 			}
1732 		}
1733 	}
1734 	NCR5380_write(MODE_REG, MR_BASE);
1735 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1736 	NCR5380_read(RESET_PARITY_INTERRUPT_REG);
1737 	*data = d + c;
1738 	*count = 0;
1739 	*phase = NCR5380_read(STATUS_REG) & PHASE_MASK;
1740 	return foo;
1741 #endif				/* def REAL_DMA */
1742 }
1743 #endif				/* defined(REAL_DMA) | defined(PSEUDO_DMA) */
1744 
1745 /*
1746  * Function : NCR5380_information_transfer (struct Scsi_Host *instance)
1747  *
1748  * Purpose : run through the various SCSI phases and do as the target
1749  * directs us to.  Operates on the currently connected command,
1750  * instance->connected.
1751  *
1752  * Inputs : instance, instance for which we are doing commands
1753  *
1754  * Side effects : SCSI things happen, the disconnected queue will be
1755  * modified if a command disconnects, *instance->connected will
1756  * change.
1757  *
1758  * XXX Note : we need to watch for bus free or a reset condition here
1759  * to recover from an unexpected bus free condition.
1760  */
1761 
1762 static void NCR5380_information_transfer(struct Scsi_Host *instance)
1763 {
1764 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
1765 	unsigned char msgout = NOP;
1766 	int sink = 0;
1767 	int len;
1768 	int transfersize;
1769 	unsigned char *data;
1770 	unsigned char phase, tmp, extended_msg[10], old_phase = 0xff;
1771 	struct scsi_cmnd *cmd;
1772 
1773 	while ((cmd = hostdata->connected)) {
1774 		struct NCR5380_cmd *ncmd = scsi_cmd_priv(cmd);
1775 
1776 		tmp = NCR5380_read(STATUS_REG);
1777 		/* We only have a valid SCSI phase when REQ is asserted */
1778 		if (tmp & SR_REQ) {
1779 			phase = (tmp & PHASE_MASK);
1780 			if (phase != old_phase) {
1781 				old_phase = phase;
1782 				NCR5380_dprint_phase(NDEBUG_INFORMATION, instance);
1783 			}
1784 			if (sink && (phase != PHASE_MSGOUT)) {
1785 				NCR5380_write(TARGET_COMMAND_REG, PHASE_SR_TO_TCR(tmp));
1786 
1787 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN |
1788 				              ICR_ASSERT_ACK);
1789 				while (NCR5380_read(STATUS_REG) & SR_REQ)
1790 					;
1791 				NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE |
1792 				              ICR_ASSERT_ATN);
1793 				sink = 0;
1794 				continue;
1795 			}
1796 
1797 			switch (phase) {
1798 			case PHASE_DATAOUT:
1799 #if (NDEBUG & NDEBUG_NO_DATAOUT)
1800 				shost_printk(KERN_DEBUG, instance, "NDEBUG_NO_DATAOUT set, attempted DATAOUT aborted\n");
1801 				sink = 1;
1802 				do_abort(instance);
1803 				cmd->result = DID_ERROR << 16;
1804 				complete_cmd(instance, cmd);
1805 				hostdata->connected = NULL;
1806 				return;
1807 #endif
1808 			case PHASE_DATAIN:
1809 				/*
1810 				 * If there is no room left in the current buffer in the
1811 				 * scatter-gather list, move onto the next one.
1812 				 */
1813 
1814 				if (!cmd->SCp.this_residual && cmd->SCp.buffers_residual) {
1815 					++cmd->SCp.buffer;
1816 					--cmd->SCp.buffers_residual;
1817 					cmd->SCp.this_residual = cmd->SCp.buffer->length;
1818 					cmd->SCp.ptr = sg_virt(cmd->SCp.buffer);
1819 					dsprintk(NDEBUG_INFORMATION, instance, "%d bytes and %d buffers left\n",
1820 					         cmd->SCp.this_residual,
1821 					         cmd->SCp.buffers_residual);
1822 				}
1823 
1824 				/*
1825 				 * The preferred transfer method is going to be
1826 				 * PSEUDO-DMA for systems that are strictly PIO,
1827 				 * since we can let the hardware do the handshaking.
1828 				 *
1829 				 * For this to work, we need to know the transfersize
1830 				 * ahead of time, since the pseudo-DMA code will sit
1831 				 * in an unconditional loop.
1832 				 */
1833 
1834 #if defined(PSEUDO_DMA) || defined(REAL_DMA_POLL)
1835 				transfersize = 0;
1836 				if (!cmd->device->borken &&
1837 				    !(hostdata->flags & FLAG_NO_PSEUDO_DMA))
1838 					transfersize = NCR5380_dma_xfer_len(instance, cmd, phase);
1839 
1840 				if (transfersize) {
1841 					len = transfersize;
1842 					if (NCR5380_transfer_dma(instance, &phase,
1843 					    &len, (unsigned char **)&cmd->SCp.ptr)) {
1844 						/*
1845 						 * If the watchdog timer fires, all future
1846 						 * accesses to this device will use the
1847 						 * polled-IO.
1848 						 */
1849 						scmd_printk(KERN_INFO, cmd,
1850 							"switching to slow handshake\n");
1851 						cmd->device->borken = 1;
1852 						sink = 1;
1853 						do_abort(instance);
1854 						cmd->result = DID_ERROR << 16;
1855 						/* XXX - need to source or sink data here, as appropriate */
1856 					} else
1857 						cmd->SCp.this_residual -= transfersize - len;
1858 				} else
1859 #endif				/* defined(PSEUDO_DMA) || defined(REAL_DMA_POLL) */
1860 				{
1861 					/* Break up transfer into 3 ms chunks,
1862 					 * presuming 6 accesses per handshake.
1863 					 */
1864 					transfersize = min((unsigned long)cmd->SCp.this_residual,
1865 					                   hostdata->accesses_per_ms / 2);
1866 					len = transfersize;
1867 					NCR5380_transfer_pio(instance, &phase, &len,
1868 					                     (unsigned char **)&cmd->SCp.ptr);
1869 					cmd->SCp.this_residual -= transfersize - len;
1870 				}
1871 				return;
1872 			case PHASE_MSGIN:
1873 				len = 1;
1874 				data = &tmp;
1875 				NCR5380_transfer_pio(instance, &phase, &len, &data);
1876 				cmd->SCp.Message = tmp;
1877 
1878 				switch (tmp) {
1879 				case ABORT:
1880 				case COMMAND_COMPLETE:
1881 					/* Accept message by clearing ACK */
1882 					sink = 1;
1883 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1884 					dsprintk(NDEBUG_QUEUES, instance,
1885 					         "COMMAND COMPLETE %p target %d lun %llu\n",
1886 					         cmd, scmd_id(cmd), cmd->device->lun);
1887 
1888 					hostdata->connected = NULL;
1889 
1890 					cmd->result &= ~0xffff;
1891 					cmd->result |= cmd->SCp.Status;
1892 					cmd->result |= cmd->SCp.Message << 8;
1893 
1894 					if (cmd->cmnd[0] == REQUEST_SENSE)
1895 						complete_cmd(instance, cmd);
1896 					else {
1897 						if (cmd->SCp.Status == SAM_STAT_CHECK_CONDITION ||
1898 						    cmd->SCp.Status == SAM_STAT_COMMAND_TERMINATED) {
1899 							dsprintk(NDEBUG_QUEUES, instance, "autosense: adding cmd %p to tail of autosense queue\n",
1900 							         cmd);
1901 							list_add_tail(&ncmd->list,
1902 							              &hostdata->autosense);
1903 						} else
1904 							complete_cmd(instance, cmd);
1905 					}
1906 
1907 					/*
1908 					 * Restore phase bits to 0 so an interrupted selection,
1909 					 * arbitration can resume.
1910 					 */
1911 					NCR5380_write(TARGET_COMMAND_REG, 0);
1912 
1913 					/* Enable reselect interrupts */
1914 					NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1915 					return;
1916 				case MESSAGE_REJECT:
1917 					/* Accept message by clearing ACK */
1918 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1919 					switch (hostdata->last_message) {
1920 					case HEAD_OF_QUEUE_TAG:
1921 					case ORDERED_QUEUE_TAG:
1922 					case SIMPLE_QUEUE_TAG:
1923 						cmd->device->simple_tags = 0;
1924 						hostdata->busy[cmd->device->id] |= (1 << (cmd->device->lun & 0xFF));
1925 						break;
1926 					default:
1927 						break;
1928 					}
1929 					break;
1930 				case DISCONNECT:
1931 					/* Accept message by clearing ACK */
1932 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1933 					hostdata->connected = NULL;
1934 					list_add(&ncmd->list, &hostdata->disconnected);
1935 					dsprintk(NDEBUG_INFORMATION | NDEBUG_QUEUES,
1936 					         instance, "connected command %p for target %d lun %llu moved to disconnected queue\n",
1937 					         cmd, scmd_id(cmd), cmd->device->lun);
1938 
1939 					/*
1940 					 * Restore phase bits to 0 so an interrupted selection,
1941 					 * arbitration can resume.
1942 					 */
1943 					NCR5380_write(TARGET_COMMAND_REG, 0);
1944 
1945 					/* Enable reselect interrupts */
1946 					NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
1947 					return;
1948 					/*
1949 					 * The SCSI data pointer is *IMPLICITLY* saved on a disconnect
1950 					 * operation, in violation of the SCSI spec so we can safely
1951 					 * ignore SAVE/RESTORE pointers calls.
1952 					 *
1953 					 * Unfortunately, some disks violate the SCSI spec and
1954 					 * don't issue the required SAVE_POINTERS message before
1955 					 * disconnecting, and we have to break spec to remain
1956 					 * compatible.
1957 					 */
1958 				case SAVE_POINTERS:
1959 				case RESTORE_POINTERS:
1960 					/* Accept message by clearing ACK */
1961 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1962 					break;
1963 				case EXTENDED_MESSAGE:
1964 					/*
1965 					 * Start the message buffer with the EXTENDED_MESSAGE
1966 					 * byte, since spi_print_msg() wants the whole thing.
1967 					 */
1968 					extended_msg[0] = EXTENDED_MESSAGE;
1969 					/* Accept first byte by clearing ACK */
1970 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1971 
1972 					spin_unlock_irq(&hostdata->lock);
1973 
1974 					dsprintk(NDEBUG_EXTENDED, instance, "receiving extended message\n");
1975 
1976 					len = 2;
1977 					data = extended_msg + 1;
1978 					phase = PHASE_MSGIN;
1979 					NCR5380_transfer_pio(instance, &phase, &len, &data);
1980 					dsprintk(NDEBUG_EXTENDED, instance, "length %d, code 0x%02x\n",
1981 					         (int)extended_msg[1],
1982 					         (int)extended_msg[2]);
1983 
1984 					if (!len && extended_msg[1] > 0 &&
1985 					    extended_msg[1] <= sizeof(extended_msg) - 2) {
1986 						/* Accept third byte by clearing ACK */
1987 						NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
1988 						len = extended_msg[1] - 1;
1989 						data = extended_msg + 3;
1990 						phase = PHASE_MSGIN;
1991 
1992 						NCR5380_transfer_pio(instance, &phase, &len, &data);
1993 						dsprintk(NDEBUG_EXTENDED, instance, "message received, residual %d\n",
1994 						         len);
1995 
1996 						switch (extended_msg[2]) {
1997 						case EXTENDED_SDTR:
1998 						case EXTENDED_WDTR:
1999 						case EXTENDED_MODIFY_DATA_POINTER:
2000 						case EXTENDED_EXTENDED_IDENTIFY:
2001 							tmp = 0;
2002 						}
2003 					} else if (len) {
2004 						shost_printk(KERN_ERR, instance, "error receiving extended message\n");
2005 						tmp = 0;
2006 					} else {
2007 						shost_printk(KERN_NOTICE, instance, "extended message code %02x length %d is too long\n",
2008 						             extended_msg[2], extended_msg[1]);
2009 						tmp = 0;
2010 					}
2011 
2012 					spin_lock_irq(&hostdata->lock);
2013 					if (!hostdata->connected)
2014 						return;
2015 
2016 					/* Fall through to reject message */
2017 
2018 					/*
2019 					 * If we get something weird that we aren't expecting,
2020 					 * reject it.
2021 					 */
2022 				default:
2023 					if (!tmp) {
2024 						shost_printk(KERN_ERR, instance, "rejecting message ");
2025 						spi_print_msg(extended_msg);
2026 						printk("\n");
2027 					} else if (tmp != EXTENDED_MESSAGE)
2028 						scmd_printk(KERN_INFO, cmd,
2029 						            "rejecting unknown message %02x\n",
2030 						            tmp);
2031 					else
2032 						scmd_printk(KERN_INFO, cmd,
2033 						            "rejecting unknown extended message code %02x, length %d\n",
2034 						            extended_msg[1], extended_msg[0]);
2035 
2036 					msgout = MESSAGE_REJECT;
2037 					NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_ATN);
2038 					break;
2039 				} /* switch (tmp) */
2040 				break;
2041 			case PHASE_MSGOUT:
2042 				len = 1;
2043 				data = &msgout;
2044 				hostdata->last_message = msgout;
2045 				NCR5380_transfer_pio(instance, &phase, &len, &data);
2046 				if (msgout == ABORT) {
2047 					hostdata->connected = NULL;
2048 					cmd->result = DID_ERROR << 16;
2049 					complete_cmd(instance, cmd);
2050 					NCR5380_write(SELECT_ENABLE_REG, hostdata->id_mask);
2051 					return;
2052 				}
2053 				msgout = NOP;
2054 				break;
2055 			case PHASE_CMDOUT:
2056 				len = cmd->cmd_len;
2057 				data = cmd->cmnd;
2058 				/*
2059 				 * XXX for performance reasons, on machines with a
2060 				 * PSEUDO-DMA architecture we should probably
2061 				 * use the dma transfer function.
2062 				 */
2063 				NCR5380_transfer_pio(instance, &phase, &len, &data);
2064 				break;
2065 			case PHASE_STATIN:
2066 				len = 1;
2067 				data = &tmp;
2068 				NCR5380_transfer_pio(instance, &phase, &len, &data);
2069 				cmd->SCp.Status = tmp;
2070 				break;
2071 			default:
2072 				shost_printk(KERN_ERR, instance, "unknown phase\n");
2073 				NCR5380_dprint(NDEBUG_ANY, instance);
2074 			} /* switch(phase) */
2075 		} else {
2076 			spin_unlock_irq(&hostdata->lock);
2077 			NCR5380_poll_politely(instance, STATUS_REG, SR_REQ, SR_REQ, HZ);
2078 			spin_lock_irq(&hostdata->lock);
2079 		}
2080 	}
2081 }
2082 
2083 /*
2084  * Function : void NCR5380_reselect (struct Scsi_Host *instance)
2085  *
2086  * Purpose : does reselection, initializing the instance->connected
2087  * field to point to the scsi_cmnd for which the I_T_L or I_T_L_Q
2088  * nexus has been reestablished,
2089  *
2090  * Inputs : instance - this instance of the NCR5380.
2091  */
2092 
2093 static void NCR5380_reselect(struct Scsi_Host *instance)
2094 {
2095 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
2096 	unsigned char target_mask;
2097 	unsigned char lun, phase;
2098 	int len;
2099 	unsigned char msg[3];
2100 	unsigned char *data;
2101 	struct NCR5380_cmd *ncmd;
2102 	struct scsi_cmnd *tmp;
2103 
2104 	/*
2105 	 * Disable arbitration, etc. since the host adapter obviously
2106 	 * lost, and tell an interrupted NCR5380_select() to restart.
2107 	 */
2108 
2109 	NCR5380_write(MODE_REG, MR_BASE);
2110 
2111 	target_mask = NCR5380_read(CURRENT_SCSI_DATA_REG) & ~(hostdata->id_mask);
2112 
2113 	dsprintk(NDEBUG_RESELECTION, instance, "reselect\n");
2114 
2115 	/*
2116 	 * At this point, we have detected that our SCSI ID is on the bus,
2117 	 * SEL is true and BSY was false for at least one bus settle delay
2118 	 * (400 ns).
2119 	 *
2120 	 * We must assert BSY ourselves, until the target drops the SEL
2121 	 * signal.
2122 	 */
2123 
2124 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_BSY);
2125 	if (NCR5380_poll_politely(instance,
2126 	                          STATUS_REG, SR_SEL, 0, 2 * HZ) < 0) {
2127 		NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2128 		return;
2129 	}
2130 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2131 
2132 	/*
2133 	 * Wait for target to go into MSGIN.
2134 	 */
2135 
2136 	if (NCR5380_poll_politely(instance,
2137 	                          STATUS_REG, SR_REQ, SR_REQ, 2 * HZ) < 0) {
2138 		do_abort(instance);
2139 		return;
2140 	}
2141 
2142 	len = 1;
2143 	data = msg;
2144 	phase = PHASE_MSGIN;
2145 	NCR5380_transfer_pio(instance, &phase, &len, &data);
2146 
2147 	if (len) {
2148 		do_abort(instance);
2149 		return;
2150 	}
2151 
2152 	if (!(msg[0] & 0x80)) {
2153 		shost_printk(KERN_ERR, instance, "expecting IDENTIFY message, got ");
2154 		spi_print_msg(msg);
2155 		printk("\n");
2156 		do_abort(instance);
2157 		return;
2158 	}
2159 	lun = msg[0] & 0x07;
2160 
2161 	/*
2162 	 * We need to add code for SCSI-II to track which devices have
2163 	 * I_T_L_Q nexuses established, and which have simple I_T_L
2164 	 * nexuses so we can chose to do additional data transfer.
2165 	 */
2166 
2167 	/*
2168 	 * Find the command corresponding to the I_T_L or I_T_L_Q  nexus we
2169 	 * just reestablished, and remove it from the disconnected queue.
2170 	 */
2171 
2172 	tmp = NULL;
2173 	list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2174 		struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2175 
2176 		if (target_mask == (1 << scmd_id(cmd)) &&
2177 		    lun == (u8)cmd->device->lun) {
2178 			list_del(&ncmd->list);
2179 			tmp = cmd;
2180 			break;
2181 		}
2182 	}
2183 
2184 	if (tmp) {
2185 		dsprintk(NDEBUG_RESELECTION | NDEBUG_QUEUES, instance,
2186 		         "reselect: removed %p from disconnected queue\n", tmp);
2187 	} else {
2188 		shost_printk(KERN_ERR, instance, "target bitmask 0x%02x lun %d not in disconnected queue.\n",
2189 		             target_mask, lun);
2190 		/*
2191 		 * Since we have an established nexus that we can't do anything
2192 		 * with, we must abort it.
2193 		 */
2194 		do_abort(instance);
2195 		return;
2196 	}
2197 
2198 	/* Accept message by clearing ACK */
2199 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2200 
2201 	hostdata->connected = tmp;
2202 	dsprintk(NDEBUG_RESELECTION, instance, "nexus established, target %d, lun %llu, tag %d\n",
2203 	         scmd_id(tmp), tmp->device->lun, tmp->tag);
2204 }
2205 
2206 /*
2207  * Function : void NCR5380_dma_complete (struct Scsi_Host *instance)
2208  *
2209  * Purpose : called by interrupt handler when DMA finishes or a phase
2210  * mismatch occurs (which would finish the DMA transfer).
2211  *
2212  * Inputs : instance - this instance of the NCR5380.
2213  *
2214  * Returns : pointer to the scsi_cmnd structure for which the I_T_L
2215  * nexus has been reestablished, on failure NULL is returned.
2216  */
2217 
2218 #ifdef REAL_DMA
2219 static void NCR5380_dma_complete(NCR5380_instance * instance) {
2220 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
2221 	int transferred;
2222 
2223 	/*
2224 	 * XXX this might not be right.
2225 	 *
2226 	 * Wait for final byte to transfer, ie wait for ACK to go false.
2227 	 *
2228 	 * We should use the Last Byte Sent bit, unfortunately this is
2229 	 * not available on the 5380/5381 (only the various CMOS chips)
2230 	 *
2231 	 * FIXME: timeout, and need to handle long timeout/irq case
2232 	 */
2233 
2234 	NCR5380_poll_politely(instance, BUS_AND_STATUS_REG, BASR_ACK, 0, 5*HZ);
2235 
2236 	NCR5380_write(INITIATOR_COMMAND_REG, ICR_BASE);
2237 
2238 	/*
2239 	 * The only places we should see a phase mismatch and have to send
2240 	 * data from the same set of pointers will be the data transfer
2241 	 * phases.  So, residual, requested length are only important here.
2242 	 */
2243 
2244 	if (!(hostdata->connected->SCp.phase & SR_CD)) {
2245 		transferred = instance->dmalen - NCR5380_dma_residual();
2246 		hostdata->connected->SCp.this_residual -= transferred;
2247 		hostdata->connected->SCp.ptr += transferred;
2248 	}
2249 }
2250 #endif				/* def REAL_DMA */
2251 
2252 /**
2253  * list_find_cmd - test for presence of a command in a linked list
2254  * @haystack: list of commands
2255  * @needle: command to search for
2256  */
2257 
2258 static bool list_find_cmd(struct list_head *haystack,
2259                           struct scsi_cmnd *needle)
2260 {
2261 	struct NCR5380_cmd *ncmd;
2262 
2263 	list_for_each_entry(ncmd, haystack, list)
2264 		if (NCR5380_to_scmd(ncmd) == needle)
2265 			return true;
2266 	return false;
2267 }
2268 
2269 /**
2270  * list_remove_cmd - remove a command from linked list
2271  * @haystack: list of commands
2272  * @needle: command to remove
2273  */
2274 
2275 static bool list_del_cmd(struct list_head *haystack,
2276                          struct scsi_cmnd *needle)
2277 {
2278 	if (list_find_cmd(haystack, needle)) {
2279 		struct NCR5380_cmd *ncmd = scsi_cmd_priv(needle);
2280 
2281 		list_del(&ncmd->list);
2282 		return true;
2283 	}
2284 	return false;
2285 }
2286 
2287 /**
2288  * NCR5380_abort - scsi host eh_abort_handler() method
2289  * @cmd: the command to be aborted
2290  *
2291  * Try to abort a given command by removing it from queues and/or sending
2292  * the target an abort message. This may not succeed in causing a target
2293  * to abort the command. Nonetheless, the low-level driver must forget about
2294  * the command because the mid-layer reclaims it and it may be re-issued.
2295  *
2296  * The normal path taken by a command is as follows. For EH we trace this
2297  * same path to locate and abort the command.
2298  *
2299  * unissued -> selecting -> [unissued -> selecting ->]... connected ->
2300  * [disconnected -> connected ->]...
2301  * [autosense -> connected ->] done
2302  *
2303  * If cmd was not found at all then presumably it has already been completed,
2304  * in which case return SUCCESS to try to avoid further EH measures.
2305  *
2306  * If the command has not completed yet, we must not fail to find it.
2307  * We have no option but to forget the aborted command (even if it still
2308  * lacks sense data). The mid-layer may re-issue a command that is in error
2309  * recovery (see scsi_send_eh_cmnd), but the logic and data structures in
2310  * this driver are such that a command can appear on one queue only.
2311  *
2312  * The lock protects driver data structures, but EH handlers also use it
2313  * to serialize their own execution and prevent their own re-entry.
2314  */
2315 
2316 static int NCR5380_abort(struct scsi_cmnd *cmd)
2317 {
2318 	struct Scsi_Host *instance = cmd->device->host;
2319 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
2320 	unsigned long flags;
2321 	int result = SUCCESS;
2322 
2323 	spin_lock_irqsave(&hostdata->lock, flags);
2324 
2325 #if (NDEBUG & NDEBUG_ANY)
2326 	scmd_printk(KERN_INFO, cmd, __func__);
2327 #endif
2328 	NCR5380_dprint(NDEBUG_ANY, instance);
2329 	NCR5380_dprint_phase(NDEBUG_ANY, instance);
2330 
2331 	if (list_del_cmd(&hostdata->unissued, cmd)) {
2332 		dsprintk(NDEBUG_ABORT, instance,
2333 		         "abort: removed %p from issue queue\n", cmd);
2334 		cmd->result = DID_ABORT << 16;
2335 		cmd->scsi_done(cmd); /* No tag or busy flag to worry about */
2336 		goto out;
2337 	}
2338 
2339 	if (hostdata->selecting == cmd) {
2340 		dsprintk(NDEBUG_ABORT, instance,
2341 		         "abort: cmd %p == selecting\n", cmd);
2342 		hostdata->selecting = NULL;
2343 		cmd->result = DID_ABORT << 16;
2344 		complete_cmd(instance, cmd);
2345 		goto out;
2346 	}
2347 
2348 	if (list_del_cmd(&hostdata->disconnected, cmd)) {
2349 		dsprintk(NDEBUG_ABORT, instance,
2350 		         "abort: removed %p from disconnected list\n", cmd);
2351 		/* Can't call NCR5380_select() and send ABORT because that
2352 		 * means releasing the lock. Need a bus reset.
2353 		 */
2354 		set_host_byte(cmd, DID_ERROR);
2355 		complete_cmd(instance, cmd);
2356 		result = FAILED;
2357 		goto out;
2358 	}
2359 
2360 	if (hostdata->connected == cmd) {
2361 		dsprintk(NDEBUG_ABORT, instance, "abort: cmd %p is connected\n", cmd);
2362 		hostdata->connected = NULL;
2363 #ifdef REAL_DMA
2364 		hostdata->dma_len = 0;
2365 #endif
2366 		if (do_abort(instance)) {
2367 			set_host_byte(cmd, DID_ERROR);
2368 			complete_cmd(instance, cmd);
2369 			result = FAILED;
2370 			goto out;
2371 		}
2372 		set_host_byte(cmd, DID_ABORT);
2373 		complete_cmd(instance, cmd);
2374 		goto out;
2375 	}
2376 
2377 	if (list_del_cmd(&hostdata->autosense, cmd)) {
2378 		dsprintk(NDEBUG_ABORT, instance,
2379 		         "abort: removed %p from sense queue\n", cmd);
2380 		set_host_byte(cmd, DID_ERROR);
2381 		complete_cmd(instance, cmd);
2382 	}
2383 
2384 out:
2385 	if (result == FAILED)
2386 		dsprintk(NDEBUG_ABORT, instance, "abort: failed to abort %p\n", cmd);
2387 	else
2388 		dsprintk(NDEBUG_ABORT, instance, "abort: successfully aborted %p\n", cmd);
2389 
2390 	queue_work(hostdata->work_q, &hostdata->main_task);
2391 	spin_unlock_irqrestore(&hostdata->lock, flags);
2392 
2393 	return result;
2394 }
2395 
2396 
2397 /**
2398  * NCR5380_bus_reset - reset the SCSI bus
2399  * @cmd: SCSI command undergoing EH
2400  *
2401  * Returns SUCCESS
2402  */
2403 
2404 static int NCR5380_bus_reset(struct scsi_cmnd *cmd)
2405 {
2406 	struct Scsi_Host *instance = cmd->device->host;
2407 	struct NCR5380_hostdata *hostdata = shost_priv(instance);
2408 	int i;
2409 	unsigned long flags;
2410 	struct NCR5380_cmd *ncmd;
2411 
2412 	spin_lock_irqsave(&hostdata->lock, flags);
2413 
2414 #if (NDEBUG & NDEBUG_ANY)
2415 	scmd_printk(KERN_INFO, cmd, __func__);
2416 #endif
2417 	NCR5380_dprint(NDEBUG_ANY, instance);
2418 	NCR5380_dprint_phase(NDEBUG_ANY, instance);
2419 
2420 	do_reset(instance);
2421 
2422 	/* reset NCR registers */
2423 	NCR5380_write(MODE_REG, MR_BASE);
2424 	NCR5380_write(TARGET_COMMAND_REG, 0);
2425 	NCR5380_write(SELECT_ENABLE_REG, 0);
2426 
2427 	/* After the reset, there are no more connected or disconnected commands
2428 	 * and no busy units; so clear the low-level status here to avoid
2429 	 * conflicts when the mid-level code tries to wake up the affected
2430 	 * commands!
2431 	 */
2432 
2433 	if (list_del_cmd(&hostdata->unissued, cmd)) {
2434 		cmd->result = DID_RESET << 16;
2435 		cmd->scsi_done(cmd);
2436 	}
2437 
2438 	if (hostdata->selecting) {
2439 		hostdata->selecting->result = DID_RESET << 16;
2440 		complete_cmd(instance, hostdata->selecting);
2441 		hostdata->selecting = NULL;
2442 	}
2443 
2444 	list_for_each_entry(ncmd, &hostdata->disconnected, list) {
2445 		struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2446 
2447 		set_host_byte(cmd, DID_RESET);
2448 		cmd->scsi_done(cmd);
2449 	}
2450 	INIT_LIST_HEAD(&hostdata->disconnected);
2451 
2452 	list_for_each_entry(ncmd, &hostdata->autosense, list) {
2453 		struct scsi_cmnd *cmd = NCR5380_to_scmd(ncmd);
2454 
2455 		set_host_byte(cmd, DID_RESET);
2456 		cmd->scsi_done(cmd);
2457 	}
2458 	INIT_LIST_HEAD(&hostdata->autosense);
2459 
2460 	if (hostdata->connected) {
2461 		set_host_byte(hostdata->connected, DID_RESET);
2462 		complete_cmd(instance, hostdata->connected);
2463 		hostdata->connected = NULL;
2464 	}
2465 
2466 	for (i = 0; i < 8; ++i)
2467 		hostdata->busy[i] = 0;
2468 #ifdef REAL_DMA
2469 	hostdata->dma_len = 0;
2470 #endif
2471 
2472 	queue_work(hostdata->work_q, &hostdata->main_task);
2473 	spin_unlock_irqrestore(&hostdata->lock, flags);
2474 
2475 	return SUCCESS;
2476 }
2477