1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright IBM Corp. 2007, 2009 4 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 5 * Frank Pavlic <fpavlic@de.ibm.com>, 6 * Thomas Spatzier <tspat@de.ibm.com>, 7 * Frank Blaschka <frank.blaschka@de.ibm.com> 8 */ 9 10 #define KMSG_COMPONENT "qeth" 11 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 12 13 #include <linux/module.h> 14 #include <linux/moduleparam.h> 15 #include <linux/string.h> 16 #include <linux/errno.h> 17 #include <linux/kernel.h> 18 #include <linux/ip.h> 19 #include <linux/tcp.h> 20 #include <linux/mii.h> 21 #include <linux/kthread.h> 22 #include <linux/slab.h> 23 #include <net/iucv/af_iucv.h> 24 #include <net/dsfield.h> 25 26 #include <asm/ebcdic.h> 27 #include <asm/chpid.h> 28 #include <asm/io.h> 29 #include <asm/sysinfo.h> 30 #include <asm/compat.h> 31 #include <asm/diag.h> 32 #include <asm/cio.h> 33 #include <asm/ccwdev.h> 34 35 #include "qeth_core.h" 36 37 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 38 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 39 /* N P A M L V H */ 40 [QETH_DBF_SETUP] = {"qeth_setup", 41 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 42 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 43 &debug_sprintf_view, NULL}, 44 [QETH_DBF_CTRL] = {"qeth_control", 45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 46 }; 47 EXPORT_SYMBOL_GPL(qeth_dbf); 48 49 struct qeth_card_list_struct qeth_core_card_list; 50 EXPORT_SYMBOL_GPL(qeth_core_card_list); 51 struct kmem_cache *qeth_core_header_cache; 52 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 53 static struct kmem_cache *qeth_qdio_outbuf_cache; 54 55 static struct device *qeth_core_root_dev; 56 static struct lock_class_key qdio_out_skb_queue_key; 57 static struct mutex qeth_mod_mutex; 58 59 static void qeth_send_control_data_cb(struct qeth_channel *, 60 struct qeth_cmd_buffer *); 61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 63 static void qeth_free_buffer_pool(struct qeth_card *); 64 static int qeth_qdio_establish(struct qeth_card *); 65 static void qeth_free_qdio_buffers(struct qeth_card *); 66 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum iucv_tx_notify notification); 69 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 70 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 71 struct qeth_qdio_out_buffer *buf, 72 enum qeth_qdio_buffer_states newbufstate); 73 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 74 75 struct workqueue_struct *qeth_wq; 76 EXPORT_SYMBOL_GPL(qeth_wq); 77 78 int qeth_card_hw_is_reachable(struct qeth_card *card) 79 { 80 return (card->state == CARD_STATE_SOFTSETUP) || 81 (card->state == CARD_STATE_UP); 82 } 83 EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable); 84 85 static void qeth_close_dev_handler(struct work_struct *work) 86 { 87 struct qeth_card *card; 88 89 card = container_of(work, struct qeth_card, close_dev_work); 90 QETH_CARD_TEXT(card, 2, "cldevhdl"); 91 rtnl_lock(); 92 dev_close(card->dev); 93 rtnl_unlock(); 94 ccwgroup_set_offline(card->gdev); 95 } 96 97 void qeth_close_dev(struct qeth_card *card) 98 { 99 QETH_CARD_TEXT(card, 2, "cldevsubm"); 100 queue_work(qeth_wq, &card->close_dev_work); 101 } 102 EXPORT_SYMBOL_GPL(qeth_close_dev); 103 104 static const char *qeth_get_cardname(struct qeth_card *card) 105 { 106 if (card->info.guestlan) { 107 switch (card->info.type) { 108 case QETH_CARD_TYPE_OSD: 109 return " Virtual NIC QDIO"; 110 case QETH_CARD_TYPE_IQD: 111 return " Virtual NIC Hiper"; 112 case QETH_CARD_TYPE_OSM: 113 return " Virtual NIC QDIO - OSM"; 114 case QETH_CARD_TYPE_OSX: 115 return " Virtual NIC QDIO - OSX"; 116 default: 117 return " unknown"; 118 } 119 } else { 120 switch (card->info.type) { 121 case QETH_CARD_TYPE_OSD: 122 return " OSD Express"; 123 case QETH_CARD_TYPE_IQD: 124 return " HiperSockets"; 125 case QETH_CARD_TYPE_OSN: 126 return " OSN QDIO"; 127 case QETH_CARD_TYPE_OSM: 128 return " OSM QDIO"; 129 case QETH_CARD_TYPE_OSX: 130 return " OSX QDIO"; 131 default: 132 return " unknown"; 133 } 134 } 135 return " n/a"; 136 } 137 138 /* max length to be returned: 14 */ 139 const char *qeth_get_cardname_short(struct qeth_card *card) 140 { 141 if (card->info.guestlan) { 142 switch (card->info.type) { 143 case QETH_CARD_TYPE_OSD: 144 return "Virt.NIC QDIO"; 145 case QETH_CARD_TYPE_IQD: 146 return "Virt.NIC Hiper"; 147 case QETH_CARD_TYPE_OSM: 148 return "Virt.NIC OSM"; 149 case QETH_CARD_TYPE_OSX: 150 return "Virt.NIC OSX"; 151 default: 152 return "unknown"; 153 } 154 } else { 155 switch (card->info.type) { 156 case QETH_CARD_TYPE_OSD: 157 switch (card->info.link_type) { 158 case QETH_LINK_TYPE_FAST_ETH: 159 return "OSD_100"; 160 case QETH_LINK_TYPE_HSTR: 161 return "HSTR"; 162 case QETH_LINK_TYPE_GBIT_ETH: 163 return "OSD_1000"; 164 case QETH_LINK_TYPE_10GBIT_ETH: 165 return "OSD_10GIG"; 166 case QETH_LINK_TYPE_LANE_ETH100: 167 return "OSD_FE_LANE"; 168 case QETH_LINK_TYPE_LANE_TR: 169 return "OSD_TR_LANE"; 170 case QETH_LINK_TYPE_LANE_ETH1000: 171 return "OSD_GbE_LANE"; 172 case QETH_LINK_TYPE_LANE: 173 return "OSD_ATM_LANE"; 174 default: 175 return "OSD_Express"; 176 } 177 case QETH_CARD_TYPE_IQD: 178 return "HiperSockets"; 179 case QETH_CARD_TYPE_OSN: 180 return "OSN"; 181 case QETH_CARD_TYPE_OSM: 182 return "OSM_1000"; 183 case QETH_CARD_TYPE_OSX: 184 return "OSX_10GIG"; 185 default: 186 return "unknown"; 187 } 188 } 189 return "n/a"; 190 } 191 192 void qeth_set_recovery_task(struct qeth_card *card) 193 { 194 card->recovery_task = current; 195 } 196 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 197 198 void qeth_clear_recovery_task(struct qeth_card *card) 199 { 200 card->recovery_task = NULL; 201 } 202 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 203 204 static bool qeth_is_recovery_task(const struct qeth_card *card) 205 { 206 return card->recovery_task == current; 207 } 208 209 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 210 int clear_start_mask) 211 { 212 unsigned long flags; 213 214 spin_lock_irqsave(&card->thread_mask_lock, flags); 215 card->thread_allowed_mask = threads; 216 if (clear_start_mask) 217 card->thread_start_mask &= threads; 218 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 219 wake_up(&card->wait_q); 220 } 221 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 222 223 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 224 { 225 unsigned long flags; 226 int rc = 0; 227 228 spin_lock_irqsave(&card->thread_mask_lock, flags); 229 rc = (card->thread_running_mask & threads); 230 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 231 return rc; 232 } 233 EXPORT_SYMBOL_GPL(qeth_threads_running); 234 235 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 236 { 237 if (qeth_is_recovery_task(card)) 238 return 0; 239 return wait_event_interruptible(card->wait_q, 240 qeth_threads_running(card, threads) == 0); 241 } 242 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 243 244 void qeth_clear_working_pool_list(struct qeth_card *card) 245 { 246 struct qeth_buffer_pool_entry *pool_entry, *tmp; 247 248 QETH_CARD_TEXT(card, 5, "clwrklst"); 249 list_for_each_entry_safe(pool_entry, tmp, 250 &card->qdio.in_buf_pool.entry_list, list){ 251 list_del(&pool_entry->list); 252 } 253 } 254 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 255 256 static int qeth_alloc_buffer_pool(struct qeth_card *card) 257 { 258 struct qeth_buffer_pool_entry *pool_entry; 259 void *ptr; 260 int i, j; 261 262 QETH_CARD_TEXT(card, 5, "alocpool"); 263 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 264 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 265 if (!pool_entry) { 266 qeth_free_buffer_pool(card); 267 return -ENOMEM; 268 } 269 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 270 ptr = (void *) __get_free_page(GFP_KERNEL); 271 if (!ptr) { 272 while (j > 0) 273 free_page((unsigned long) 274 pool_entry->elements[--j]); 275 kfree(pool_entry); 276 qeth_free_buffer_pool(card); 277 return -ENOMEM; 278 } 279 pool_entry->elements[j] = ptr; 280 } 281 list_add(&pool_entry->init_list, 282 &card->qdio.init_pool.entry_list); 283 } 284 return 0; 285 } 286 287 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 288 { 289 QETH_CARD_TEXT(card, 2, "realcbp"); 290 291 if ((card->state != CARD_STATE_DOWN) && 292 (card->state != CARD_STATE_RECOVER)) 293 return -EPERM; 294 295 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 296 qeth_clear_working_pool_list(card); 297 qeth_free_buffer_pool(card); 298 card->qdio.in_buf_pool.buf_count = bufcnt; 299 card->qdio.init_pool.buf_count = bufcnt; 300 return qeth_alloc_buffer_pool(card); 301 } 302 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 303 304 static void qeth_free_qdio_queue(struct qeth_qdio_q *q) 305 { 306 if (!q) 307 return; 308 309 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 310 kfree(q); 311 } 312 313 static struct qeth_qdio_q *qeth_alloc_qdio_queue(void) 314 { 315 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 316 int i; 317 318 if (!q) 319 return NULL; 320 321 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 322 kfree(q); 323 return NULL; 324 } 325 326 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 327 q->bufs[i].buffer = q->qdio_bufs[i]; 328 329 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *)); 330 return q; 331 } 332 333 static int qeth_cq_init(struct qeth_card *card) 334 { 335 int rc; 336 337 if (card->options.cq == QETH_CQ_ENABLED) { 338 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 339 qdio_reset_buffers(card->qdio.c_q->qdio_bufs, 340 QDIO_MAX_BUFFERS_PER_Q); 341 card->qdio.c_q->next_buf_to_init = 127; 342 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 343 card->qdio.no_in_queues - 1, 0, 344 127); 345 if (rc) { 346 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 347 goto out; 348 } 349 } 350 rc = 0; 351 out: 352 return rc; 353 } 354 355 static int qeth_alloc_cq(struct qeth_card *card) 356 { 357 int rc; 358 359 if (card->options.cq == QETH_CQ_ENABLED) { 360 int i; 361 struct qdio_outbuf_state *outbuf_states; 362 363 QETH_DBF_TEXT(SETUP, 2, "cqon"); 364 card->qdio.c_q = qeth_alloc_qdio_queue(); 365 if (!card->qdio.c_q) { 366 rc = -1; 367 goto kmsg_out; 368 } 369 card->qdio.no_in_queues = 2; 370 card->qdio.out_bufstates = 371 kzalloc(card->qdio.no_out_queues * 372 QDIO_MAX_BUFFERS_PER_Q * 373 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 374 outbuf_states = card->qdio.out_bufstates; 375 if (outbuf_states == NULL) { 376 rc = -1; 377 goto free_cq_out; 378 } 379 for (i = 0; i < card->qdio.no_out_queues; ++i) { 380 card->qdio.out_qs[i]->bufstates = outbuf_states; 381 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 382 } 383 } else { 384 QETH_DBF_TEXT(SETUP, 2, "nocq"); 385 card->qdio.c_q = NULL; 386 card->qdio.no_in_queues = 1; 387 } 388 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 389 rc = 0; 390 out: 391 return rc; 392 free_cq_out: 393 qeth_free_qdio_queue(card->qdio.c_q); 394 card->qdio.c_q = NULL; 395 kmsg_out: 396 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 397 goto out; 398 } 399 400 static void qeth_free_cq(struct qeth_card *card) 401 { 402 if (card->qdio.c_q) { 403 --card->qdio.no_in_queues; 404 qeth_free_qdio_queue(card->qdio.c_q); 405 card->qdio.c_q = NULL; 406 } 407 kfree(card->qdio.out_bufstates); 408 card->qdio.out_bufstates = NULL; 409 } 410 411 static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 412 int delayed) 413 { 414 enum iucv_tx_notify n; 415 416 switch (sbalf15) { 417 case 0: 418 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 419 break; 420 case 4: 421 case 16: 422 case 17: 423 case 18: 424 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 425 TX_NOTIFY_UNREACHABLE; 426 break; 427 default: 428 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 429 TX_NOTIFY_GENERALERROR; 430 break; 431 } 432 433 return n; 434 } 435 436 static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx, 437 int forced_cleanup) 438 { 439 if (q->card->options.cq != QETH_CQ_ENABLED) 440 return; 441 442 if (q->bufs[bidx]->next_pending != NULL) { 443 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 444 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 445 446 while (c) { 447 if (forced_cleanup || 448 atomic_read(&c->state) == 449 QETH_QDIO_BUF_HANDLED_DELAYED) { 450 struct qeth_qdio_out_buffer *f = c; 451 QETH_CARD_TEXT(f->q->card, 5, "fp"); 452 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 453 /* release here to avoid interleaving between 454 outbound tasklet and inbound tasklet 455 regarding notifications and lifecycle */ 456 qeth_release_skbs(c); 457 458 c = f->next_pending; 459 WARN_ON_ONCE(head->next_pending != f); 460 head->next_pending = c; 461 kmem_cache_free(qeth_qdio_outbuf_cache, f); 462 } else { 463 head = c; 464 c = c->next_pending; 465 } 466 467 } 468 } 469 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 470 QETH_QDIO_BUF_HANDLED_DELAYED)) { 471 /* for recovery situations */ 472 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 473 qeth_init_qdio_out_buf(q, bidx); 474 QETH_CARD_TEXT(q->card, 2, "clprecov"); 475 } 476 } 477 478 479 static void qeth_qdio_handle_aob(struct qeth_card *card, 480 unsigned long phys_aob_addr) 481 { 482 struct qaob *aob; 483 struct qeth_qdio_out_buffer *buffer; 484 enum iucv_tx_notify notification; 485 486 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 487 QETH_CARD_TEXT(card, 5, "haob"); 488 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 489 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 490 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 491 492 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 493 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 494 notification = TX_NOTIFY_OK; 495 } else { 496 WARN_ON_ONCE(atomic_read(&buffer->state) != 497 QETH_QDIO_BUF_PENDING); 498 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 499 notification = TX_NOTIFY_DELAYED_OK; 500 } 501 502 if (aob->aorc != 0) { 503 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 504 notification = qeth_compute_cq_notification(aob->aorc, 1); 505 } 506 qeth_notify_skbs(buffer->q, buffer, notification); 507 508 buffer->aob = NULL; 509 qeth_clear_output_buffer(buffer->q, buffer, 510 QETH_QDIO_BUF_HANDLED_DELAYED); 511 512 /* from here on: do not touch buffer anymore */ 513 qdio_release_aob(aob); 514 } 515 516 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 517 { 518 return card->options.cq == QETH_CQ_ENABLED && 519 card->qdio.c_q != NULL && 520 queue != 0 && 521 queue == card->qdio.no_in_queues - 1; 522 } 523 524 525 static int qeth_issue_next_read(struct qeth_card *card) 526 { 527 int rc; 528 struct qeth_cmd_buffer *iob; 529 530 QETH_CARD_TEXT(card, 5, "issnxrd"); 531 if (card->read.state != CH_STATE_UP) 532 return -EIO; 533 iob = qeth_get_buffer(&card->read); 534 if (!iob) { 535 dev_warn(&card->gdev->dev, "The qeth device driver " 536 "failed to recover an error on the device\n"); 537 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 538 "available\n", dev_name(&card->gdev->dev)); 539 return -ENOMEM; 540 } 541 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 542 QETH_CARD_TEXT(card, 6, "noirqpnd"); 543 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 544 (addr_t) iob, 0, 0); 545 if (rc) { 546 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 547 "rc=%i\n", dev_name(&card->gdev->dev), rc); 548 atomic_set(&card->read.irq_pending, 0); 549 card->read_or_write_problem = 1; 550 qeth_schedule_recovery(card); 551 wake_up(&card->wait_q); 552 } 553 return rc; 554 } 555 556 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 557 { 558 struct qeth_reply *reply; 559 560 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 561 if (reply) { 562 atomic_set(&reply->refcnt, 1); 563 atomic_set(&reply->received, 0); 564 reply->card = card; 565 } 566 return reply; 567 } 568 569 static void qeth_get_reply(struct qeth_reply *reply) 570 { 571 WARN_ON(atomic_read(&reply->refcnt) <= 0); 572 atomic_inc(&reply->refcnt); 573 } 574 575 static void qeth_put_reply(struct qeth_reply *reply) 576 { 577 WARN_ON(atomic_read(&reply->refcnt) <= 0); 578 if (atomic_dec_and_test(&reply->refcnt)) 579 kfree(reply); 580 } 581 582 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 583 struct qeth_card *card) 584 { 585 char *ipa_name; 586 int com = cmd->hdr.command; 587 ipa_name = qeth_get_ipa_cmd_name(com); 588 if (rc) 589 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 590 "x%X \"%s\"\n", 591 ipa_name, com, dev_name(&card->gdev->dev), 592 QETH_CARD_IFNAME(card), rc, 593 qeth_get_ipa_msg(rc)); 594 else 595 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 596 ipa_name, com, dev_name(&card->gdev->dev), 597 QETH_CARD_IFNAME(card)); 598 } 599 600 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 601 struct qeth_cmd_buffer *iob) 602 { 603 struct qeth_ipa_cmd *cmd = NULL; 604 605 QETH_CARD_TEXT(card, 5, "chkipad"); 606 if (IS_IPA(iob->data)) { 607 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 608 if (IS_IPA_REPLY(cmd)) { 609 if (cmd->hdr.command != IPA_CMD_SETCCID && 610 cmd->hdr.command != IPA_CMD_DELCCID && 611 cmd->hdr.command != IPA_CMD_MODCCID && 612 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 613 qeth_issue_ipa_msg(cmd, 614 cmd->hdr.return_code, card); 615 return cmd; 616 } else { 617 switch (cmd->hdr.command) { 618 case IPA_CMD_STOPLAN: 619 if (cmd->hdr.return_code == 620 IPA_RC_VEPA_TO_VEB_TRANSITION) { 621 dev_err(&card->gdev->dev, 622 "Interface %s is down because the " 623 "adjacent port is no longer in " 624 "reflective relay mode\n", 625 QETH_CARD_IFNAME(card)); 626 qeth_close_dev(card); 627 } else { 628 dev_warn(&card->gdev->dev, 629 "The link for interface %s on CHPID" 630 " 0x%X failed\n", 631 QETH_CARD_IFNAME(card), 632 card->info.chpid); 633 qeth_issue_ipa_msg(cmd, 634 cmd->hdr.return_code, card); 635 } 636 card->lan_online = 0; 637 if (card->dev && netif_carrier_ok(card->dev)) 638 netif_carrier_off(card->dev); 639 return NULL; 640 case IPA_CMD_STARTLAN: 641 dev_info(&card->gdev->dev, 642 "The link for %s on CHPID 0x%X has" 643 " been restored\n", 644 QETH_CARD_IFNAME(card), 645 card->info.chpid); 646 netif_carrier_on(card->dev); 647 card->lan_online = 1; 648 if (card->info.hwtrap) 649 card->info.hwtrap = 2; 650 qeth_schedule_recovery(card); 651 return NULL; 652 case IPA_CMD_SETBRIDGEPORT_IQD: 653 case IPA_CMD_SETBRIDGEPORT_OSA: 654 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 655 if (card->discipline->control_event_handler 656 (card, cmd)) 657 return cmd; 658 else 659 return NULL; 660 case IPA_CMD_MODCCID: 661 return cmd; 662 case IPA_CMD_REGISTER_LOCAL_ADDR: 663 QETH_CARD_TEXT(card, 3, "irla"); 664 break; 665 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 666 QETH_CARD_TEXT(card, 3, "urla"); 667 break; 668 default: 669 QETH_DBF_MESSAGE(2, "Received data is IPA " 670 "but not a reply!\n"); 671 break; 672 } 673 } 674 } 675 return cmd; 676 } 677 678 void qeth_clear_ipacmd_list(struct qeth_card *card) 679 { 680 struct qeth_reply *reply, *r; 681 unsigned long flags; 682 683 QETH_CARD_TEXT(card, 4, "clipalst"); 684 685 spin_lock_irqsave(&card->lock, flags); 686 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 687 qeth_get_reply(reply); 688 reply->rc = -EIO; 689 atomic_inc(&reply->received); 690 list_del_init(&reply->list); 691 wake_up(&reply->wait_q); 692 qeth_put_reply(reply); 693 } 694 spin_unlock_irqrestore(&card->lock, flags); 695 atomic_set(&card->write.irq_pending, 0); 696 } 697 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 698 699 static int qeth_check_idx_response(struct qeth_card *card, 700 unsigned char *buffer) 701 { 702 if (!buffer) 703 return 0; 704 705 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 706 if ((buffer[2] & 0xc0) == 0xc0) { 707 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 708 "with cause code 0x%02x%s\n", 709 buffer[4], 710 ((buffer[4] == 0x22) ? 711 " -- try another portname" : "")); 712 QETH_CARD_TEXT(card, 2, "ckidxres"); 713 QETH_CARD_TEXT(card, 2, " idxterm"); 714 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 715 if (buffer[4] == 0xf6) { 716 dev_err(&card->gdev->dev, 717 "The qeth device is not configured " 718 "for the OSI layer required by z/VM\n"); 719 return -EPERM; 720 } 721 return -EIO; 722 } 723 return 0; 724 } 725 726 static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev) 727 { 728 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *) 729 dev_get_drvdata(&cdev->dev))->dev); 730 return card; 731 } 732 733 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 734 __u32 len) 735 { 736 struct qeth_card *card; 737 738 card = CARD_FROM_CDEV(channel->ccwdev); 739 QETH_CARD_TEXT(card, 4, "setupccw"); 740 if (channel == &card->read) 741 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 742 else 743 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 744 channel->ccw.count = len; 745 channel->ccw.cda = (__u32) __pa(iob); 746 } 747 748 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 749 { 750 __u8 index; 751 752 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 753 index = channel->io_buf_no; 754 do { 755 if (channel->iob[index].state == BUF_STATE_FREE) { 756 channel->iob[index].state = BUF_STATE_LOCKED; 757 channel->io_buf_no = (channel->io_buf_no + 1) % 758 QETH_CMD_BUFFER_NO; 759 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 760 return channel->iob + index; 761 } 762 index = (index + 1) % QETH_CMD_BUFFER_NO; 763 } while (index != channel->io_buf_no); 764 765 return NULL; 766 } 767 768 void qeth_release_buffer(struct qeth_channel *channel, 769 struct qeth_cmd_buffer *iob) 770 { 771 unsigned long flags; 772 773 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 774 spin_lock_irqsave(&channel->iob_lock, flags); 775 memset(iob->data, 0, QETH_BUFSIZE); 776 iob->state = BUF_STATE_FREE; 777 iob->callback = qeth_send_control_data_cb; 778 iob->rc = 0; 779 spin_unlock_irqrestore(&channel->iob_lock, flags); 780 wake_up(&channel->wait_q); 781 } 782 EXPORT_SYMBOL_GPL(qeth_release_buffer); 783 784 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 785 { 786 struct qeth_cmd_buffer *buffer = NULL; 787 unsigned long flags; 788 789 spin_lock_irqsave(&channel->iob_lock, flags); 790 buffer = __qeth_get_buffer(channel); 791 spin_unlock_irqrestore(&channel->iob_lock, flags); 792 return buffer; 793 } 794 795 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 796 { 797 struct qeth_cmd_buffer *buffer; 798 wait_event(channel->wait_q, 799 ((buffer = qeth_get_buffer(channel)) != NULL)); 800 return buffer; 801 } 802 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 803 804 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 805 { 806 int cnt; 807 808 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 809 qeth_release_buffer(channel, &channel->iob[cnt]); 810 channel->buf_no = 0; 811 channel->io_buf_no = 0; 812 } 813 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 814 815 static void qeth_send_control_data_cb(struct qeth_channel *channel, 816 struct qeth_cmd_buffer *iob) 817 { 818 struct qeth_card *card; 819 struct qeth_reply *reply, *r; 820 struct qeth_ipa_cmd *cmd; 821 unsigned long flags; 822 int keep_reply; 823 int rc = 0; 824 825 card = CARD_FROM_CDEV(channel->ccwdev); 826 QETH_CARD_TEXT(card, 4, "sndctlcb"); 827 rc = qeth_check_idx_response(card, iob->data); 828 switch (rc) { 829 case 0: 830 break; 831 case -EIO: 832 qeth_clear_ipacmd_list(card); 833 qeth_schedule_recovery(card); 834 /* fall through */ 835 default: 836 goto out; 837 } 838 839 cmd = qeth_check_ipa_data(card, iob); 840 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 841 goto out; 842 /*in case of OSN : check if cmd is set */ 843 if (card->info.type == QETH_CARD_TYPE_OSN && 844 cmd && 845 cmd->hdr.command != IPA_CMD_STARTLAN && 846 card->osn_info.assist_cb != NULL) { 847 card->osn_info.assist_cb(card->dev, cmd); 848 goto out; 849 } 850 851 spin_lock_irqsave(&card->lock, flags); 852 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 853 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 854 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 855 qeth_get_reply(reply); 856 list_del_init(&reply->list); 857 spin_unlock_irqrestore(&card->lock, flags); 858 keep_reply = 0; 859 if (reply->callback != NULL) { 860 if (cmd) { 861 reply->offset = (__u16)((char *)cmd - 862 (char *)iob->data); 863 keep_reply = reply->callback(card, 864 reply, 865 (unsigned long)cmd); 866 } else 867 keep_reply = reply->callback(card, 868 reply, 869 (unsigned long)iob); 870 } 871 if (cmd) 872 reply->rc = (u16) cmd->hdr.return_code; 873 else if (iob->rc) 874 reply->rc = iob->rc; 875 if (keep_reply) { 876 spin_lock_irqsave(&card->lock, flags); 877 list_add_tail(&reply->list, 878 &card->cmd_waiter_list); 879 spin_unlock_irqrestore(&card->lock, flags); 880 } else { 881 atomic_inc(&reply->received); 882 wake_up(&reply->wait_q); 883 } 884 qeth_put_reply(reply); 885 goto out; 886 } 887 } 888 spin_unlock_irqrestore(&card->lock, flags); 889 out: 890 memcpy(&card->seqno.pdu_hdr_ack, 891 QETH_PDU_HEADER_SEQ_NO(iob->data), 892 QETH_SEQ_NO_LENGTH); 893 qeth_release_buffer(channel, iob); 894 } 895 896 static int qeth_setup_channel(struct qeth_channel *channel) 897 { 898 int cnt; 899 900 QETH_DBF_TEXT(SETUP, 2, "setupch"); 901 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 902 channel->iob[cnt].data = 903 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 904 if (channel->iob[cnt].data == NULL) 905 break; 906 channel->iob[cnt].state = BUF_STATE_FREE; 907 channel->iob[cnt].channel = channel; 908 channel->iob[cnt].callback = qeth_send_control_data_cb; 909 channel->iob[cnt].rc = 0; 910 } 911 if (cnt < QETH_CMD_BUFFER_NO) { 912 while (cnt-- > 0) 913 kfree(channel->iob[cnt].data); 914 return -ENOMEM; 915 } 916 channel->buf_no = 0; 917 channel->io_buf_no = 0; 918 atomic_set(&channel->irq_pending, 0); 919 spin_lock_init(&channel->iob_lock); 920 921 init_waitqueue_head(&channel->wait_q); 922 return 0; 923 } 924 925 static int qeth_set_thread_start_bit(struct qeth_card *card, 926 unsigned long thread) 927 { 928 unsigned long flags; 929 930 spin_lock_irqsave(&card->thread_mask_lock, flags); 931 if (!(card->thread_allowed_mask & thread) || 932 (card->thread_start_mask & thread)) { 933 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 934 return -EPERM; 935 } 936 card->thread_start_mask |= thread; 937 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 938 return 0; 939 } 940 941 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 942 { 943 unsigned long flags; 944 945 spin_lock_irqsave(&card->thread_mask_lock, flags); 946 card->thread_start_mask &= ~thread; 947 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 948 wake_up(&card->wait_q); 949 } 950 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 951 952 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 953 { 954 unsigned long flags; 955 956 spin_lock_irqsave(&card->thread_mask_lock, flags); 957 card->thread_running_mask &= ~thread; 958 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 959 wake_up(&card->wait_q); 960 } 961 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 962 963 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 964 { 965 unsigned long flags; 966 int rc = 0; 967 968 spin_lock_irqsave(&card->thread_mask_lock, flags); 969 if (card->thread_start_mask & thread) { 970 if ((card->thread_allowed_mask & thread) && 971 !(card->thread_running_mask & thread)) { 972 rc = 1; 973 card->thread_start_mask &= ~thread; 974 card->thread_running_mask |= thread; 975 } else 976 rc = -EPERM; 977 } 978 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 979 return rc; 980 } 981 982 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 983 { 984 int rc = 0; 985 986 wait_event(card->wait_q, 987 (rc = __qeth_do_run_thread(card, thread)) >= 0); 988 return rc; 989 } 990 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 991 992 void qeth_schedule_recovery(struct qeth_card *card) 993 { 994 QETH_CARD_TEXT(card, 2, "startrec"); 995 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 996 schedule_work(&card->kernel_thread_starter); 997 } 998 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 999 1000 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 1001 { 1002 int dstat, cstat; 1003 char *sense; 1004 struct qeth_card *card; 1005 1006 sense = (char *) irb->ecw; 1007 cstat = irb->scsw.cmd.cstat; 1008 dstat = irb->scsw.cmd.dstat; 1009 card = CARD_FROM_CDEV(cdev); 1010 1011 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 1012 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 1013 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 1014 QETH_CARD_TEXT(card, 2, "CGENCHK"); 1015 dev_warn(&cdev->dev, "The qeth device driver " 1016 "failed to recover an error on the device\n"); 1017 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 1018 dev_name(&cdev->dev), dstat, cstat); 1019 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 1020 16, 1, irb, 64, 1); 1021 return 1; 1022 } 1023 1024 if (dstat & DEV_STAT_UNIT_CHECK) { 1025 if (sense[SENSE_RESETTING_EVENT_BYTE] & 1026 SENSE_RESETTING_EVENT_FLAG) { 1027 QETH_CARD_TEXT(card, 2, "REVIND"); 1028 return 1; 1029 } 1030 if (sense[SENSE_COMMAND_REJECT_BYTE] & 1031 SENSE_COMMAND_REJECT_FLAG) { 1032 QETH_CARD_TEXT(card, 2, "CMDREJi"); 1033 return 1; 1034 } 1035 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 1036 QETH_CARD_TEXT(card, 2, "AFFE"); 1037 return 1; 1038 } 1039 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1040 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1041 return 0; 1042 } 1043 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1044 return 1; 1045 } 1046 return 0; 1047 } 1048 1049 static long __qeth_check_irb_error(struct ccw_device *cdev, 1050 unsigned long intparm, struct irb *irb) 1051 { 1052 struct qeth_card *card; 1053 1054 card = CARD_FROM_CDEV(cdev); 1055 1056 if (!card || !IS_ERR(irb)) 1057 return 0; 1058 1059 switch (PTR_ERR(irb)) { 1060 case -EIO: 1061 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1062 dev_name(&cdev->dev)); 1063 QETH_CARD_TEXT(card, 2, "ckirberr"); 1064 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1065 break; 1066 case -ETIMEDOUT: 1067 dev_warn(&cdev->dev, "A hardware operation timed out" 1068 " on the device\n"); 1069 QETH_CARD_TEXT(card, 2, "ckirberr"); 1070 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1071 if (intparm == QETH_RCD_PARM) { 1072 if (card->data.ccwdev == cdev) { 1073 card->data.state = CH_STATE_DOWN; 1074 wake_up(&card->wait_q); 1075 } 1076 } 1077 break; 1078 default: 1079 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1080 dev_name(&cdev->dev), PTR_ERR(irb)); 1081 QETH_CARD_TEXT(card, 2, "ckirberr"); 1082 QETH_CARD_TEXT(card, 2, " rc???"); 1083 } 1084 return PTR_ERR(irb); 1085 } 1086 1087 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1088 struct irb *irb) 1089 { 1090 int rc; 1091 int cstat, dstat; 1092 struct qeth_cmd_buffer *buffer; 1093 struct qeth_channel *channel; 1094 struct qeth_card *card; 1095 struct qeth_cmd_buffer *iob; 1096 __u8 index; 1097 1098 if (__qeth_check_irb_error(cdev, intparm, irb)) 1099 return; 1100 cstat = irb->scsw.cmd.cstat; 1101 dstat = irb->scsw.cmd.dstat; 1102 1103 card = CARD_FROM_CDEV(cdev); 1104 if (!card) 1105 return; 1106 1107 QETH_CARD_TEXT(card, 5, "irq"); 1108 1109 if (card->read.ccwdev == cdev) { 1110 channel = &card->read; 1111 QETH_CARD_TEXT(card, 5, "read"); 1112 } else if (card->write.ccwdev == cdev) { 1113 channel = &card->write; 1114 QETH_CARD_TEXT(card, 5, "write"); 1115 } else { 1116 channel = &card->data; 1117 QETH_CARD_TEXT(card, 5, "data"); 1118 } 1119 atomic_set(&channel->irq_pending, 0); 1120 1121 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1122 channel->state = CH_STATE_STOPPED; 1123 1124 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1125 channel->state = CH_STATE_HALTED; 1126 1127 /*let's wake up immediately on data channel*/ 1128 if ((channel == &card->data) && (intparm != 0) && 1129 (intparm != QETH_RCD_PARM)) 1130 goto out; 1131 1132 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1133 QETH_CARD_TEXT(card, 6, "clrchpar"); 1134 /* we don't have to handle this further */ 1135 intparm = 0; 1136 } 1137 if (intparm == QETH_HALT_CHANNEL_PARM) { 1138 QETH_CARD_TEXT(card, 6, "hltchpar"); 1139 /* we don't have to handle this further */ 1140 intparm = 0; 1141 } 1142 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1143 (dstat & DEV_STAT_UNIT_CHECK) || 1144 (cstat)) { 1145 if (irb->esw.esw0.erw.cons) { 1146 dev_warn(&channel->ccwdev->dev, 1147 "The qeth device driver failed to recover " 1148 "an error on the device\n"); 1149 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1150 "0x%X dstat 0x%X\n", 1151 dev_name(&channel->ccwdev->dev), cstat, dstat); 1152 print_hex_dump(KERN_WARNING, "qeth: irb ", 1153 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1154 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1155 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1156 } 1157 if (intparm == QETH_RCD_PARM) { 1158 channel->state = CH_STATE_DOWN; 1159 goto out; 1160 } 1161 rc = qeth_get_problem(cdev, irb); 1162 if (rc) { 1163 qeth_clear_ipacmd_list(card); 1164 qeth_schedule_recovery(card); 1165 goto out; 1166 } 1167 } 1168 1169 if (intparm == QETH_RCD_PARM) { 1170 channel->state = CH_STATE_RCD_DONE; 1171 goto out; 1172 } 1173 if (intparm) { 1174 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1175 buffer->state = BUF_STATE_PROCESSED; 1176 } 1177 if (channel == &card->data) 1178 return; 1179 if (channel == &card->read && 1180 channel->state == CH_STATE_UP) 1181 qeth_issue_next_read(card); 1182 1183 iob = channel->iob; 1184 index = channel->buf_no; 1185 while (iob[index].state == BUF_STATE_PROCESSED) { 1186 if (iob[index].callback != NULL) 1187 iob[index].callback(channel, iob + index); 1188 1189 index = (index + 1) % QETH_CMD_BUFFER_NO; 1190 } 1191 channel->buf_no = index; 1192 out: 1193 wake_up(&card->wait_q); 1194 return; 1195 } 1196 1197 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1198 struct qeth_qdio_out_buffer *buf, 1199 enum iucv_tx_notify notification) 1200 { 1201 struct sk_buff *skb; 1202 1203 if (skb_queue_empty(&buf->skb_list)) 1204 goto out; 1205 skb = skb_peek(&buf->skb_list); 1206 while (skb) { 1207 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1208 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1209 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) { 1210 if (skb->sk) { 1211 struct iucv_sock *iucv = iucv_sk(skb->sk); 1212 iucv->sk_txnotify(skb, notification); 1213 } 1214 } 1215 if (skb_queue_is_last(&buf->skb_list, skb)) 1216 skb = NULL; 1217 else 1218 skb = skb_queue_next(&buf->skb_list, skb); 1219 } 1220 out: 1221 return; 1222 } 1223 1224 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1225 { 1226 struct sk_buff *skb; 1227 struct iucv_sock *iucv; 1228 int notify_general_error = 0; 1229 1230 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1231 notify_general_error = 1; 1232 1233 /* release may never happen from within CQ tasklet scope */ 1234 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1235 1236 skb = skb_dequeue(&buf->skb_list); 1237 while (skb) { 1238 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1239 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1240 if (notify_general_error && 1241 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) { 1242 if (skb->sk) { 1243 iucv = iucv_sk(skb->sk); 1244 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1245 } 1246 } 1247 refcount_dec(&skb->users); 1248 dev_kfree_skb_any(skb); 1249 skb = skb_dequeue(&buf->skb_list); 1250 } 1251 } 1252 1253 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1254 struct qeth_qdio_out_buffer *buf, 1255 enum qeth_qdio_buffer_states newbufstate) 1256 { 1257 int i; 1258 1259 /* is PCI flag set on buffer? */ 1260 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1261 atomic_dec(&queue->set_pci_flags_count); 1262 1263 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1264 qeth_release_skbs(buf); 1265 } 1266 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1267 if (buf->buffer->element[i].addr && buf->is_header[i]) 1268 kmem_cache_free(qeth_core_header_cache, 1269 buf->buffer->element[i].addr); 1270 buf->is_header[i] = 0; 1271 buf->buffer->element[i].length = 0; 1272 buf->buffer->element[i].addr = NULL; 1273 buf->buffer->element[i].eflags = 0; 1274 buf->buffer->element[i].sflags = 0; 1275 } 1276 buf->buffer->element[15].eflags = 0; 1277 buf->buffer->element[15].sflags = 0; 1278 buf->next_element_to_fill = 0; 1279 atomic_set(&buf->state, newbufstate); 1280 } 1281 1282 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1283 { 1284 int j; 1285 1286 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1287 if (!q->bufs[j]) 1288 continue; 1289 qeth_cleanup_handled_pending(q, j, 1); 1290 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1291 if (free) { 1292 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1293 q->bufs[j] = NULL; 1294 } 1295 } 1296 } 1297 1298 void qeth_clear_qdio_buffers(struct qeth_card *card) 1299 { 1300 int i; 1301 1302 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1303 /* clear outbound buffers to free skbs */ 1304 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1305 if (card->qdio.out_qs[i]) { 1306 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1307 } 1308 } 1309 } 1310 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1311 1312 static void qeth_free_buffer_pool(struct qeth_card *card) 1313 { 1314 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1315 int i = 0; 1316 list_for_each_entry_safe(pool_entry, tmp, 1317 &card->qdio.init_pool.entry_list, init_list){ 1318 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1319 free_page((unsigned long)pool_entry->elements[i]); 1320 list_del(&pool_entry->init_list); 1321 kfree(pool_entry); 1322 } 1323 } 1324 1325 static void qeth_clean_channel(struct qeth_channel *channel) 1326 { 1327 int cnt; 1328 1329 QETH_DBF_TEXT(SETUP, 2, "freech"); 1330 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1331 kfree(channel->iob[cnt].data); 1332 } 1333 1334 static void qeth_set_single_write_queues(struct qeth_card *card) 1335 { 1336 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1337 (card->qdio.no_out_queues == 4)) 1338 qeth_free_qdio_buffers(card); 1339 1340 card->qdio.no_out_queues = 1; 1341 if (card->qdio.default_out_queue != 0) 1342 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1343 1344 card->qdio.default_out_queue = 0; 1345 } 1346 1347 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1348 { 1349 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1350 (card->qdio.no_out_queues == 1)) { 1351 qeth_free_qdio_buffers(card); 1352 card->qdio.default_out_queue = 2; 1353 } 1354 card->qdio.no_out_queues = 4; 1355 } 1356 1357 static void qeth_update_from_chp_desc(struct qeth_card *card) 1358 { 1359 struct ccw_device *ccwdev; 1360 struct channel_path_desc *chp_dsc; 1361 1362 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1363 1364 ccwdev = card->data.ccwdev; 1365 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1366 if (!chp_dsc) 1367 goto out; 1368 1369 card->info.func_level = 0x4100 + chp_dsc->desc; 1370 if (card->info.type == QETH_CARD_TYPE_IQD) 1371 goto out; 1372 1373 /* CHPP field bit 6 == 1 -> single queue */ 1374 if ((chp_dsc->chpp & 0x02) == 0x02) 1375 qeth_set_single_write_queues(card); 1376 else 1377 qeth_set_multiple_write_queues(card); 1378 out: 1379 kfree(chp_dsc); 1380 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1381 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1382 } 1383 1384 static void qeth_init_qdio_info(struct qeth_card *card) 1385 { 1386 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1387 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1388 /* inbound */ 1389 card->qdio.no_in_queues = 1; 1390 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1391 if (card->info.type == QETH_CARD_TYPE_IQD) 1392 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1393 else 1394 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1395 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1396 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1397 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1398 } 1399 1400 static void qeth_set_intial_options(struct qeth_card *card) 1401 { 1402 card->options.route4.type = NO_ROUTER; 1403 card->options.route6.type = NO_ROUTER; 1404 card->options.fake_broadcast = 0; 1405 card->options.performance_stats = 0; 1406 card->options.rx_sg_cb = QETH_RX_SG_CB; 1407 card->options.isolation = ISOLATION_MODE_NONE; 1408 card->options.cq = QETH_CQ_DISABLED; 1409 } 1410 1411 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1412 { 1413 unsigned long flags; 1414 int rc = 0; 1415 1416 spin_lock_irqsave(&card->thread_mask_lock, flags); 1417 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1418 (u8) card->thread_start_mask, 1419 (u8) card->thread_allowed_mask, 1420 (u8) card->thread_running_mask); 1421 rc = (card->thread_start_mask & thread); 1422 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1423 return rc; 1424 } 1425 1426 static void qeth_start_kernel_thread(struct work_struct *work) 1427 { 1428 struct task_struct *ts; 1429 struct qeth_card *card = container_of(work, struct qeth_card, 1430 kernel_thread_starter); 1431 QETH_CARD_TEXT(card , 2, "strthrd"); 1432 1433 if (card->read.state != CH_STATE_UP && 1434 card->write.state != CH_STATE_UP) 1435 return; 1436 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1437 ts = kthread_run(card->discipline->recover, (void *)card, 1438 "qeth_recover"); 1439 if (IS_ERR(ts)) { 1440 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1441 qeth_clear_thread_running_bit(card, 1442 QETH_RECOVER_THREAD); 1443 } 1444 } 1445 } 1446 1447 static void qeth_buffer_reclaim_work(struct work_struct *); 1448 static int qeth_setup_card(struct qeth_card *card) 1449 { 1450 1451 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1452 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1453 1454 card->read.state = CH_STATE_DOWN; 1455 card->write.state = CH_STATE_DOWN; 1456 card->data.state = CH_STATE_DOWN; 1457 card->state = CARD_STATE_DOWN; 1458 card->lan_online = 0; 1459 card->read_or_write_problem = 0; 1460 card->dev = NULL; 1461 spin_lock_init(&card->vlanlock); 1462 spin_lock_init(&card->mclock); 1463 spin_lock_init(&card->lock); 1464 spin_lock_init(&card->ip_lock); 1465 spin_lock_init(&card->thread_mask_lock); 1466 mutex_init(&card->conf_mutex); 1467 mutex_init(&card->discipline_mutex); 1468 card->thread_start_mask = 0; 1469 card->thread_allowed_mask = 0; 1470 card->thread_running_mask = 0; 1471 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1472 INIT_LIST_HEAD(&card->cmd_waiter_list); 1473 init_waitqueue_head(&card->wait_q); 1474 /* initial options */ 1475 qeth_set_intial_options(card); 1476 /* IP address takeover */ 1477 INIT_LIST_HEAD(&card->ipato.entries); 1478 card->ipato.enabled = 0; 1479 card->ipato.invert4 = 0; 1480 card->ipato.invert6 = 0; 1481 /* init QDIO stuff */ 1482 qeth_init_qdio_info(card); 1483 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1484 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1485 return 0; 1486 } 1487 1488 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1489 { 1490 struct qeth_card *card = container_of(slr, struct qeth_card, 1491 qeth_service_level); 1492 if (card->info.mcl_level[0]) 1493 seq_printf(m, "qeth: %s firmware level %s\n", 1494 CARD_BUS_ID(card), card->info.mcl_level); 1495 } 1496 1497 static struct qeth_card *qeth_alloc_card(void) 1498 { 1499 struct qeth_card *card; 1500 1501 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1502 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1503 if (!card) 1504 goto out; 1505 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1506 if (qeth_setup_channel(&card->read)) 1507 goto out_ip; 1508 if (qeth_setup_channel(&card->write)) 1509 goto out_channel; 1510 card->options.layer2 = -1; 1511 card->qeth_service_level.seq_print = qeth_core_sl_print; 1512 register_service_level(&card->qeth_service_level); 1513 return card; 1514 1515 out_channel: 1516 qeth_clean_channel(&card->read); 1517 out_ip: 1518 kfree(card); 1519 out: 1520 return NULL; 1521 } 1522 1523 static void qeth_determine_card_type(struct qeth_card *card) 1524 { 1525 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1526 1527 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1528 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1529 card->info.type = CARD_RDEV(card)->id.driver_info; 1530 card->qdio.no_out_queues = QETH_MAX_QUEUES; 1531 if (card->info.type == QETH_CARD_TYPE_IQD) 1532 card->info.is_multicast_different = 0x0103; 1533 qeth_update_from_chp_desc(card); 1534 } 1535 1536 static int qeth_clear_channel(struct qeth_channel *channel) 1537 { 1538 unsigned long flags; 1539 struct qeth_card *card; 1540 int rc; 1541 1542 card = CARD_FROM_CDEV(channel->ccwdev); 1543 QETH_CARD_TEXT(card, 3, "clearch"); 1544 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1545 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1546 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1547 1548 if (rc) 1549 return rc; 1550 rc = wait_event_interruptible_timeout(card->wait_q, 1551 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1552 if (rc == -ERESTARTSYS) 1553 return rc; 1554 if (channel->state != CH_STATE_STOPPED) 1555 return -ETIME; 1556 channel->state = CH_STATE_DOWN; 1557 return 0; 1558 } 1559 1560 static int qeth_halt_channel(struct qeth_channel *channel) 1561 { 1562 unsigned long flags; 1563 struct qeth_card *card; 1564 int rc; 1565 1566 card = CARD_FROM_CDEV(channel->ccwdev); 1567 QETH_CARD_TEXT(card, 3, "haltch"); 1568 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1569 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1570 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1571 1572 if (rc) 1573 return rc; 1574 rc = wait_event_interruptible_timeout(card->wait_q, 1575 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1576 if (rc == -ERESTARTSYS) 1577 return rc; 1578 if (channel->state != CH_STATE_HALTED) 1579 return -ETIME; 1580 return 0; 1581 } 1582 1583 static int qeth_halt_channels(struct qeth_card *card) 1584 { 1585 int rc1 = 0, rc2 = 0, rc3 = 0; 1586 1587 QETH_CARD_TEXT(card, 3, "haltchs"); 1588 rc1 = qeth_halt_channel(&card->read); 1589 rc2 = qeth_halt_channel(&card->write); 1590 rc3 = qeth_halt_channel(&card->data); 1591 if (rc1) 1592 return rc1; 1593 if (rc2) 1594 return rc2; 1595 return rc3; 1596 } 1597 1598 static int qeth_clear_channels(struct qeth_card *card) 1599 { 1600 int rc1 = 0, rc2 = 0, rc3 = 0; 1601 1602 QETH_CARD_TEXT(card, 3, "clearchs"); 1603 rc1 = qeth_clear_channel(&card->read); 1604 rc2 = qeth_clear_channel(&card->write); 1605 rc3 = qeth_clear_channel(&card->data); 1606 if (rc1) 1607 return rc1; 1608 if (rc2) 1609 return rc2; 1610 return rc3; 1611 } 1612 1613 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1614 { 1615 int rc = 0; 1616 1617 QETH_CARD_TEXT(card, 3, "clhacrd"); 1618 1619 if (halt) 1620 rc = qeth_halt_channels(card); 1621 if (rc) 1622 return rc; 1623 return qeth_clear_channels(card); 1624 } 1625 1626 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1627 { 1628 int rc = 0; 1629 1630 QETH_CARD_TEXT(card, 3, "qdioclr"); 1631 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1632 QETH_QDIO_CLEANING)) { 1633 case QETH_QDIO_ESTABLISHED: 1634 if (card->info.type == QETH_CARD_TYPE_IQD) 1635 rc = qdio_shutdown(CARD_DDEV(card), 1636 QDIO_FLAG_CLEANUP_USING_HALT); 1637 else 1638 rc = qdio_shutdown(CARD_DDEV(card), 1639 QDIO_FLAG_CLEANUP_USING_CLEAR); 1640 if (rc) 1641 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1642 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1643 break; 1644 case QETH_QDIO_CLEANING: 1645 return rc; 1646 default: 1647 break; 1648 } 1649 rc = qeth_clear_halt_card(card, use_halt); 1650 if (rc) 1651 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1652 card->state = CARD_STATE_DOWN; 1653 return rc; 1654 } 1655 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1656 1657 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1658 int *length) 1659 { 1660 struct ciw *ciw; 1661 char *rcd_buf; 1662 int ret; 1663 struct qeth_channel *channel = &card->data; 1664 unsigned long flags; 1665 1666 /* 1667 * scan for RCD command in extended SenseID data 1668 */ 1669 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1670 if (!ciw || ciw->cmd == 0) 1671 return -EOPNOTSUPP; 1672 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1673 if (!rcd_buf) 1674 return -ENOMEM; 1675 1676 channel->ccw.cmd_code = ciw->cmd; 1677 channel->ccw.cda = (__u32) __pa(rcd_buf); 1678 channel->ccw.count = ciw->count; 1679 channel->ccw.flags = CCW_FLAG_SLI; 1680 channel->state = CH_STATE_RCD; 1681 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1682 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1683 QETH_RCD_PARM, LPM_ANYPATH, 0, 1684 QETH_RCD_TIMEOUT); 1685 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1686 if (!ret) 1687 wait_event(card->wait_q, 1688 (channel->state == CH_STATE_RCD_DONE || 1689 channel->state == CH_STATE_DOWN)); 1690 if (channel->state == CH_STATE_DOWN) 1691 ret = -EIO; 1692 else 1693 channel->state = CH_STATE_DOWN; 1694 if (ret) { 1695 kfree(rcd_buf); 1696 *buffer = NULL; 1697 *length = 0; 1698 } else { 1699 *length = ciw->count; 1700 *buffer = rcd_buf; 1701 } 1702 return ret; 1703 } 1704 1705 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1706 { 1707 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1708 card->info.chpid = prcd[30]; 1709 card->info.unit_addr2 = prcd[31]; 1710 card->info.cula = prcd[63]; 1711 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1712 (prcd[0x11] == _ascebc['M'])); 1713 } 1714 1715 /* Determine whether the device requires a specific layer discipline */ 1716 static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card) 1717 { 1718 if (card->info.type == QETH_CARD_TYPE_OSM || 1719 card->info.type == QETH_CARD_TYPE_OSN) { 1720 QETH_DBF_TEXT(SETUP, 3, "force l2"); 1721 return QETH_DISCIPLINE_LAYER2; 1722 } 1723 1724 /* virtual HiperSocket is L3 only: */ 1725 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) { 1726 QETH_DBF_TEXT(SETUP, 3, "force l3"); 1727 return QETH_DISCIPLINE_LAYER3; 1728 } 1729 1730 QETH_DBF_TEXT(SETUP, 3, "force no"); 1731 return QETH_DISCIPLINE_UNDETERMINED; 1732 } 1733 1734 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1735 { 1736 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1737 1738 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1739 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1740 card->info.blkt.time_total = 0; 1741 card->info.blkt.inter_packet = 0; 1742 card->info.blkt.inter_packet_jumbo = 0; 1743 } else { 1744 card->info.blkt.time_total = 250; 1745 card->info.blkt.inter_packet = 5; 1746 card->info.blkt.inter_packet_jumbo = 15; 1747 } 1748 } 1749 1750 static void qeth_init_tokens(struct qeth_card *card) 1751 { 1752 card->token.issuer_rm_w = 0x00010103UL; 1753 card->token.cm_filter_w = 0x00010108UL; 1754 card->token.cm_connection_w = 0x0001010aUL; 1755 card->token.ulp_filter_w = 0x0001010bUL; 1756 card->token.ulp_connection_w = 0x0001010dUL; 1757 } 1758 1759 static void qeth_init_func_level(struct qeth_card *card) 1760 { 1761 switch (card->info.type) { 1762 case QETH_CARD_TYPE_IQD: 1763 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1764 break; 1765 case QETH_CARD_TYPE_OSD: 1766 case QETH_CARD_TYPE_OSN: 1767 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1768 break; 1769 default: 1770 break; 1771 } 1772 } 1773 1774 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1775 void (*idx_reply_cb)(struct qeth_channel *, 1776 struct qeth_cmd_buffer *)) 1777 { 1778 struct qeth_cmd_buffer *iob; 1779 unsigned long flags; 1780 int rc; 1781 struct qeth_card *card; 1782 1783 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1784 card = CARD_FROM_CDEV(channel->ccwdev); 1785 iob = qeth_get_buffer(channel); 1786 if (!iob) 1787 return -ENOMEM; 1788 iob->callback = idx_reply_cb; 1789 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1790 channel->ccw.count = QETH_BUFSIZE; 1791 channel->ccw.cda = (__u32) __pa(iob->data); 1792 1793 wait_event(card->wait_q, 1794 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1795 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1796 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1797 rc = ccw_device_start(channel->ccwdev, 1798 &channel->ccw, (addr_t) iob, 0, 0); 1799 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1800 1801 if (rc) { 1802 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1803 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1804 atomic_set(&channel->irq_pending, 0); 1805 wake_up(&card->wait_q); 1806 return rc; 1807 } 1808 rc = wait_event_interruptible_timeout(card->wait_q, 1809 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1810 if (rc == -ERESTARTSYS) 1811 return rc; 1812 if (channel->state != CH_STATE_UP) { 1813 rc = -ETIME; 1814 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1815 qeth_clear_cmd_buffers(channel); 1816 } else 1817 rc = 0; 1818 return rc; 1819 } 1820 1821 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1822 void (*idx_reply_cb)(struct qeth_channel *, 1823 struct qeth_cmd_buffer *)) 1824 { 1825 struct qeth_card *card; 1826 struct qeth_cmd_buffer *iob; 1827 unsigned long flags; 1828 __u16 temp; 1829 __u8 tmp; 1830 int rc; 1831 struct ccw_dev_id temp_devid; 1832 1833 card = CARD_FROM_CDEV(channel->ccwdev); 1834 1835 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1836 1837 iob = qeth_get_buffer(channel); 1838 if (!iob) 1839 return -ENOMEM; 1840 iob->callback = idx_reply_cb; 1841 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1842 channel->ccw.count = IDX_ACTIVATE_SIZE; 1843 channel->ccw.cda = (__u32) __pa(iob->data); 1844 if (channel == &card->write) { 1845 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1846 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1847 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1848 card->seqno.trans_hdr++; 1849 } else { 1850 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1851 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1852 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1853 } 1854 tmp = ((__u8)card->info.portno) | 0x80; 1855 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1856 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1857 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1858 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1859 &card->info.func_level, sizeof(__u16)); 1860 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1861 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1862 temp = (card->info.cula << 8) + card->info.unit_addr2; 1863 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1864 1865 wait_event(card->wait_q, 1866 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1867 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1868 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1869 rc = ccw_device_start(channel->ccwdev, 1870 &channel->ccw, (addr_t) iob, 0, 0); 1871 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1872 1873 if (rc) { 1874 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1875 rc); 1876 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1877 atomic_set(&channel->irq_pending, 0); 1878 wake_up(&card->wait_q); 1879 return rc; 1880 } 1881 rc = wait_event_interruptible_timeout(card->wait_q, 1882 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1883 if (rc == -ERESTARTSYS) 1884 return rc; 1885 if (channel->state != CH_STATE_ACTIVATING) { 1886 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1887 " failed to recover an error on the device\n"); 1888 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1889 dev_name(&channel->ccwdev->dev)); 1890 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1891 qeth_clear_cmd_buffers(channel); 1892 return -ETIME; 1893 } 1894 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1895 } 1896 1897 static int qeth_peer_func_level(int level) 1898 { 1899 if ((level & 0xff) == 8) 1900 return (level & 0xff) + 0x400; 1901 if (((level >> 8) & 3) == 1) 1902 return (level & 0xff) + 0x200; 1903 return level; 1904 } 1905 1906 static void qeth_idx_write_cb(struct qeth_channel *channel, 1907 struct qeth_cmd_buffer *iob) 1908 { 1909 struct qeth_card *card; 1910 __u16 temp; 1911 1912 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1913 1914 if (channel->state == CH_STATE_DOWN) { 1915 channel->state = CH_STATE_ACTIVATING; 1916 goto out; 1917 } 1918 card = CARD_FROM_CDEV(channel->ccwdev); 1919 1920 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1921 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1922 dev_err(&card->write.ccwdev->dev, 1923 "The adapter is used exclusively by another " 1924 "host\n"); 1925 else 1926 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1927 " negative reply\n", 1928 dev_name(&card->write.ccwdev->dev)); 1929 goto out; 1930 } 1931 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1932 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1933 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1934 "function level mismatch (sent: 0x%x, received: " 1935 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1936 card->info.func_level, temp); 1937 goto out; 1938 } 1939 channel->state = CH_STATE_UP; 1940 out: 1941 qeth_release_buffer(channel, iob); 1942 } 1943 1944 static void qeth_idx_read_cb(struct qeth_channel *channel, 1945 struct qeth_cmd_buffer *iob) 1946 { 1947 struct qeth_card *card; 1948 __u16 temp; 1949 1950 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1951 if (channel->state == CH_STATE_DOWN) { 1952 channel->state = CH_STATE_ACTIVATING; 1953 goto out; 1954 } 1955 1956 card = CARD_FROM_CDEV(channel->ccwdev); 1957 if (qeth_check_idx_response(card, iob->data)) 1958 goto out; 1959 1960 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1961 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1962 case QETH_IDX_ACT_ERR_EXCL: 1963 dev_err(&card->write.ccwdev->dev, 1964 "The adapter is used exclusively by another " 1965 "host\n"); 1966 break; 1967 case QETH_IDX_ACT_ERR_AUTH: 1968 case QETH_IDX_ACT_ERR_AUTH_USER: 1969 dev_err(&card->read.ccwdev->dev, 1970 "Setting the device online failed because of " 1971 "insufficient authorization\n"); 1972 break; 1973 default: 1974 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1975 " negative reply\n", 1976 dev_name(&card->read.ccwdev->dev)); 1977 } 1978 QETH_CARD_TEXT_(card, 2, "idxread%c", 1979 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1980 goto out; 1981 } 1982 1983 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1984 if (temp != qeth_peer_func_level(card->info.func_level)) { 1985 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1986 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1987 dev_name(&card->read.ccwdev->dev), 1988 card->info.func_level, temp); 1989 goto out; 1990 } 1991 memcpy(&card->token.issuer_rm_r, 1992 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1993 QETH_MPC_TOKEN_LENGTH); 1994 memcpy(&card->info.mcl_level[0], 1995 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1996 channel->state = CH_STATE_UP; 1997 out: 1998 qeth_release_buffer(channel, iob); 1999 } 2000 2001 void qeth_prepare_control_data(struct qeth_card *card, int len, 2002 struct qeth_cmd_buffer *iob) 2003 { 2004 qeth_setup_ccw(&card->write, iob->data, len); 2005 iob->callback = qeth_release_buffer; 2006 2007 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2008 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2009 card->seqno.trans_hdr++; 2010 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2011 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2012 card->seqno.pdu_hdr++; 2013 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2014 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2015 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2016 } 2017 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2018 2019 /** 2020 * qeth_send_control_data() - send control command to the card 2021 * @card: qeth_card structure pointer 2022 * @len: size of the command buffer 2023 * @iob: qeth_cmd_buffer pointer 2024 * @reply_cb: callback function pointer 2025 * @cb_card: pointer to the qeth_card structure 2026 * @cb_reply: pointer to the qeth_reply structure 2027 * @cb_cmd: pointer to the original iob for non-IPA 2028 * commands, or to the qeth_ipa_cmd structure 2029 * for the IPA commands. 2030 * @reply_param: private pointer passed to the callback 2031 * 2032 * Returns the value of the `return_code' field of the response 2033 * block returned from the hardware, or other error indication. 2034 * Value of zero indicates successful execution of the command. 2035 * 2036 * Callback function gets called one or more times, with cb_cmd 2037 * pointing to the response returned by the hardware. Callback 2038 * function must return non-zero if more reply blocks are expected, 2039 * and zero if the last or only reply block is received. Callback 2040 * function can get the value of the reply_param pointer from the 2041 * field 'param' of the structure qeth_reply. 2042 */ 2043 2044 int qeth_send_control_data(struct qeth_card *card, int len, 2045 struct qeth_cmd_buffer *iob, 2046 int (*reply_cb)(struct qeth_card *cb_card, 2047 struct qeth_reply *cb_reply, 2048 unsigned long cb_cmd), 2049 void *reply_param) 2050 { 2051 int rc; 2052 unsigned long flags; 2053 struct qeth_reply *reply = NULL; 2054 unsigned long timeout, event_timeout; 2055 struct qeth_ipa_cmd *cmd; 2056 2057 QETH_CARD_TEXT(card, 2, "sendctl"); 2058 2059 if (card->read_or_write_problem) { 2060 qeth_release_buffer(iob->channel, iob); 2061 return -EIO; 2062 } 2063 reply = qeth_alloc_reply(card); 2064 if (!reply) { 2065 return -ENOMEM; 2066 } 2067 reply->callback = reply_cb; 2068 reply->param = reply_param; 2069 if (card->state == CARD_STATE_DOWN) 2070 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2071 else 2072 reply->seqno = card->seqno.ipa++; 2073 init_waitqueue_head(&reply->wait_q); 2074 spin_lock_irqsave(&card->lock, flags); 2075 list_add_tail(&reply->list, &card->cmd_waiter_list); 2076 spin_unlock_irqrestore(&card->lock, flags); 2077 2078 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2079 qeth_prepare_control_data(card, len, iob); 2080 2081 if (IS_IPA(iob->data)) 2082 event_timeout = QETH_IPA_TIMEOUT; 2083 else 2084 event_timeout = QETH_TIMEOUT; 2085 timeout = jiffies + event_timeout; 2086 2087 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2088 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2089 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2090 (addr_t) iob, 0, 0); 2091 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2092 if (rc) { 2093 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2094 "ccw_device_start rc = %i\n", 2095 dev_name(&card->write.ccwdev->dev), rc); 2096 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2097 spin_lock_irqsave(&card->lock, flags); 2098 list_del_init(&reply->list); 2099 qeth_put_reply(reply); 2100 spin_unlock_irqrestore(&card->lock, flags); 2101 qeth_release_buffer(iob->channel, iob); 2102 atomic_set(&card->write.irq_pending, 0); 2103 wake_up(&card->wait_q); 2104 return rc; 2105 } 2106 2107 /* we have only one long running ipassist, since we can ensure 2108 process context of this command we can sleep */ 2109 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2110 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2111 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2112 if (!wait_event_timeout(reply->wait_q, 2113 atomic_read(&reply->received), event_timeout)) 2114 goto time_err; 2115 } else { 2116 while (!atomic_read(&reply->received)) { 2117 if (time_after(jiffies, timeout)) 2118 goto time_err; 2119 cpu_relax(); 2120 } 2121 } 2122 2123 if (reply->rc == -EIO) 2124 goto error; 2125 rc = reply->rc; 2126 qeth_put_reply(reply); 2127 return rc; 2128 2129 time_err: 2130 reply->rc = -ETIME; 2131 spin_lock_irqsave(&reply->card->lock, flags); 2132 list_del_init(&reply->list); 2133 spin_unlock_irqrestore(&reply->card->lock, flags); 2134 atomic_inc(&reply->received); 2135 error: 2136 atomic_set(&card->write.irq_pending, 0); 2137 qeth_release_buffer(iob->channel, iob); 2138 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2139 rc = reply->rc; 2140 qeth_put_reply(reply); 2141 return rc; 2142 } 2143 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2144 2145 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2146 unsigned long data) 2147 { 2148 struct qeth_cmd_buffer *iob; 2149 2150 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2151 2152 iob = (struct qeth_cmd_buffer *) data; 2153 memcpy(&card->token.cm_filter_r, 2154 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2155 QETH_MPC_TOKEN_LENGTH); 2156 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2157 return 0; 2158 } 2159 2160 static int qeth_cm_enable(struct qeth_card *card) 2161 { 2162 int rc; 2163 struct qeth_cmd_buffer *iob; 2164 2165 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2166 2167 iob = qeth_wait_for_buffer(&card->write); 2168 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2169 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2170 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2171 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2172 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2173 2174 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2175 qeth_cm_enable_cb, NULL); 2176 return rc; 2177 } 2178 2179 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2180 unsigned long data) 2181 { 2182 2183 struct qeth_cmd_buffer *iob; 2184 2185 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2186 2187 iob = (struct qeth_cmd_buffer *) data; 2188 memcpy(&card->token.cm_connection_r, 2189 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2190 QETH_MPC_TOKEN_LENGTH); 2191 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2192 return 0; 2193 } 2194 2195 static int qeth_cm_setup(struct qeth_card *card) 2196 { 2197 int rc; 2198 struct qeth_cmd_buffer *iob; 2199 2200 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2201 2202 iob = qeth_wait_for_buffer(&card->write); 2203 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2204 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2205 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2206 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2207 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2208 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2209 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2210 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2211 qeth_cm_setup_cb, NULL); 2212 return rc; 2213 2214 } 2215 2216 static int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2217 { 2218 switch (card->info.type) { 2219 case QETH_CARD_TYPE_IQD: 2220 return card->info.max_mtu; 2221 case QETH_CARD_TYPE_OSD: 2222 case QETH_CARD_TYPE_OSX: 2223 if (!card->options.layer2) 2224 return ETH_DATA_LEN - 8; /* L3: allow for LLC + SNAP */ 2225 /* fall through */ 2226 default: 2227 return ETH_DATA_LEN; 2228 } 2229 } 2230 2231 static int qeth_get_mtu_outof_framesize(int framesize) 2232 { 2233 switch (framesize) { 2234 case 0x4000: 2235 return 8192; 2236 case 0x6000: 2237 return 16384; 2238 case 0xa000: 2239 return 32768; 2240 case 0xffff: 2241 return 57344; 2242 default: 2243 return 0; 2244 } 2245 } 2246 2247 static int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2248 { 2249 switch (card->info.type) { 2250 case QETH_CARD_TYPE_OSD: 2251 case QETH_CARD_TYPE_OSM: 2252 case QETH_CARD_TYPE_OSX: 2253 case QETH_CARD_TYPE_IQD: 2254 return ((mtu >= 576) && 2255 (mtu <= card->info.max_mtu)); 2256 case QETH_CARD_TYPE_OSN: 2257 default: 2258 return 1; 2259 } 2260 } 2261 2262 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2263 unsigned long data) 2264 { 2265 2266 __u16 mtu, framesize; 2267 __u16 len; 2268 __u8 link_type; 2269 struct qeth_cmd_buffer *iob; 2270 2271 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2272 2273 iob = (struct qeth_cmd_buffer *) data; 2274 memcpy(&card->token.ulp_filter_r, 2275 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2276 QETH_MPC_TOKEN_LENGTH); 2277 if (card->info.type == QETH_CARD_TYPE_IQD) { 2278 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2279 mtu = qeth_get_mtu_outof_framesize(framesize); 2280 if (!mtu) { 2281 iob->rc = -EINVAL; 2282 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2283 return 0; 2284 } 2285 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2286 /* frame size has changed */ 2287 if (card->dev && 2288 ((card->dev->mtu == card->info.initial_mtu) || 2289 (card->dev->mtu > mtu))) 2290 card->dev->mtu = mtu; 2291 qeth_free_qdio_buffers(card); 2292 } 2293 card->info.initial_mtu = mtu; 2294 card->info.max_mtu = mtu; 2295 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2296 } else { 2297 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2298 iob->data); 2299 card->info.initial_mtu = min(card->info.max_mtu, 2300 qeth_get_initial_mtu_for_card(card)); 2301 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2302 } 2303 2304 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2305 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2306 memcpy(&link_type, 2307 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2308 card->info.link_type = link_type; 2309 } else 2310 card->info.link_type = 0; 2311 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2312 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2313 return 0; 2314 } 2315 2316 static int qeth_ulp_enable(struct qeth_card *card) 2317 { 2318 int rc; 2319 char prot_type; 2320 struct qeth_cmd_buffer *iob; 2321 2322 /*FIXME: trace view callbacks*/ 2323 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2324 2325 iob = qeth_wait_for_buffer(&card->write); 2326 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2327 2328 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2329 (__u8) card->info.portno; 2330 if (card->options.layer2) 2331 if (card->info.type == QETH_CARD_TYPE_OSN) 2332 prot_type = QETH_PROT_OSN2; 2333 else 2334 prot_type = QETH_PROT_LAYER2; 2335 else 2336 prot_type = QETH_PROT_TCPIP; 2337 2338 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2339 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2340 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2341 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2342 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2343 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2344 qeth_ulp_enable_cb, NULL); 2345 return rc; 2346 2347 } 2348 2349 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2350 unsigned long data) 2351 { 2352 struct qeth_cmd_buffer *iob; 2353 2354 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2355 2356 iob = (struct qeth_cmd_buffer *) data; 2357 memcpy(&card->token.ulp_connection_r, 2358 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2359 QETH_MPC_TOKEN_LENGTH); 2360 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2361 3)) { 2362 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2363 dev_err(&card->gdev->dev, "A connection could not be " 2364 "established because of an OLM limit\n"); 2365 iob->rc = -EMLINK; 2366 } 2367 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2368 return 0; 2369 } 2370 2371 static int qeth_ulp_setup(struct qeth_card *card) 2372 { 2373 int rc; 2374 __u16 temp; 2375 struct qeth_cmd_buffer *iob; 2376 struct ccw_dev_id dev_id; 2377 2378 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2379 2380 iob = qeth_wait_for_buffer(&card->write); 2381 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2382 2383 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2384 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2385 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2386 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2387 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2388 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2389 2390 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2391 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2392 temp = (card->info.cula << 8) + card->info.unit_addr2; 2393 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2394 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2395 qeth_ulp_setup_cb, NULL); 2396 return rc; 2397 } 2398 2399 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2400 { 2401 int rc; 2402 struct qeth_qdio_out_buffer *newbuf; 2403 2404 rc = 0; 2405 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2406 if (!newbuf) { 2407 rc = -ENOMEM; 2408 goto out; 2409 } 2410 newbuf->buffer = q->qdio_bufs[bidx]; 2411 skb_queue_head_init(&newbuf->skb_list); 2412 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2413 newbuf->q = q; 2414 newbuf->aob = NULL; 2415 newbuf->next_pending = q->bufs[bidx]; 2416 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2417 q->bufs[bidx] = newbuf; 2418 if (q->bufstates) { 2419 q->bufstates[bidx].user = newbuf; 2420 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2421 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2422 QETH_CARD_TEXT_(q->card, 2, "%lx", 2423 (long) newbuf->next_pending); 2424 } 2425 out: 2426 return rc; 2427 } 2428 2429 static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q) 2430 { 2431 if (!q) 2432 return; 2433 2434 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 2435 kfree(q); 2436 } 2437 2438 static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void) 2439 { 2440 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 2441 2442 if (!q) 2443 return NULL; 2444 2445 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 2446 kfree(q); 2447 return NULL; 2448 } 2449 return q; 2450 } 2451 2452 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2453 { 2454 int i, j; 2455 2456 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2457 2458 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2459 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2460 return 0; 2461 2462 QETH_DBF_TEXT(SETUP, 2, "inq"); 2463 card->qdio.in_q = qeth_alloc_qdio_queue(); 2464 if (!card->qdio.in_q) 2465 goto out_nomem; 2466 2467 /* inbound buffer pool */ 2468 if (qeth_alloc_buffer_pool(card)) 2469 goto out_freeinq; 2470 2471 /* outbound */ 2472 card->qdio.out_qs = 2473 kzalloc(card->qdio.no_out_queues * 2474 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2475 if (!card->qdio.out_qs) 2476 goto out_freepool; 2477 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2478 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf(); 2479 if (!card->qdio.out_qs[i]) 2480 goto out_freeoutq; 2481 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2482 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2483 card->qdio.out_qs[i]->queue_no = i; 2484 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2485 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2486 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2487 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2488 goto out_freeoutqbufs; 2489 } 2490 } 2491 2492 /* completion */ 2493 if (qeth_alloc_cq(card)) 2494 goto out_freeoutq; 2495 2496 return 0; 2497 2498 out_freeoutqbufs: 2499 while (j > 0) { 2500 --j; 2501 kmem_cache_free(qeth_qdio_outbuf_cache, 2502 card->qdio.out_qs[i]->bufs[j]); 2503 card->qdio.out_qs[i]->bufs[j] = NULL; 2504 } 2505 out_freeoutq: 2506 while (i > 0) { 2507 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]); 2508 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2509 } 2510 kfree(card->qdio.out_qs); 2511 card->qdio.out_qs = NULL; 2512 out_freepool: 2513 qeth_free_buffer_pool(card); 2514 out_freeinq: 2515 qeth_free_qdio_queue(card->qdio.in_q); 2516 card->qdio.in_q = NULL; 2517 out_nomem: 2518 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2519 return -ENOMEM; 2520 } 2521 2522 static void qeth_free_qdio_buffers(struct qeth_card *card) 2523 { 2524 int i, j; 2525 2526 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 2527 QETH_QDIO_UNINITIALIZED) 2528 return; 2529 2530 qeth_free_cq(card); 2531 cancel_delayed_work_sync(&card->buffer_reclaim_work); 2532 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2533 if (card->qdio.in_q->bufs[j].rx_skb) 2534 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 2535 } 2536 qeth_free_qdio_queue(card->qdio.in_q); 2537 card->qdio.in_q = NULL; 2538 /* inbound buffer pool */ 2539 qeth_free_buffer_pool(card); 2540 /* free outbound qdio_qs */ 2541 if (card->qdio.out_qs) { 2542 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2543 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2544 qeth_free_qdio_out_buf(card->qdio.out_qs[i]); 2545 } 2546 kfree(card->qdio.out_qs); 2547 card->qdio.out_qs = NULL; 2548 } 2549 } 2550 2551 static void qeth_create_qib_param_field(struct qeth_card *card, 2552 char *param_field) 2553 { 2554 2555 param_field[0] = _ascebc['P']; 2556 param_field[1] = _ascebc['C']; 2557 param_field[2] = _ascebc['I']; 2558 param_field[3] = _ascebc['T']; 2559 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2560 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2561 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2562 } 2563 2564 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2565 char *param_field) 2566 { 2567 param_field[16] = _ascebc['B']; 2568 param_field[17] = _ascebc['L']; 2569 param_field[18] = _ascebc['K']; 2570 param_field[19] = _ascebc['T']; 2571 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2572 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2573 *((unsigned int *) (¶m_field[28])) = 2574 card->info.blkt.inter_packet_jumbo; 2575 } 2576 2577 static int qeth_qdio_activate(struct qeth_card *card) 2578 { 2579 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2580 return qdio_activate(CARD_DDEV(card)); 2581 } 2582 2583 static int qeth_dm_act(struct qeth_card *card) 2584 { 2585 int rc; 2586 struct qeth_cmd_buffer *iob; 2587 2588 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2589 2590 iob = qeth_wait_for_buffer(&card->write); 2591 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2592 2593 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2594 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2595 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2596 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2597 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2598 return rc; 2599 } 2600 2601 static int qeth_mpc_initialize(struct qeth_card *card) 2602 { 2603 int rc; 2604 2605 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2606 2607 rc = qeth_issue_next_read(card); 2608 if (rc) { 2609 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2610 return rc; 2611 } 2612 rc = qeth_cm_enable(card); 2613 if (rc) { 2614 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2615 goto out_qdio; 2616 } 2617 rc = qeth_cm_setup(card); 2618 if (rc) { 2619 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2620 goto out_qdio; 2621 } 2622 rc = qeth_ulp_enable(card); 2623 if (rc) { 2624 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2625 goto out_qdio; 2626 } 2627 rc = qeth_ulp_setup(card); 2628 if (rc) { 2629 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2630 goto out_qdio; 2631 } 2632 rc = qeth_alloc_qdio_buffers(card); 2633 if (rc) { 2634 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2635 goto out_qdio; 2636 } 2637 rc = qeth_qdio_establish(card); 2638 if (rc) { 2639 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2640 qeth_free_qdio_buffers(card); 2641 goto out_qdio; 2642 } 2643 rc = qeth_qdio_activate(card); 2644 if (rc) { 2645 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2646 goto out_qdio; 2647 } 2648 rc = qeth_dm_act(card); 2649 if (rc) { 2650 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2651 goto out_qdio; 2652 } 2653 2654 return 0; 2655 out_qdio: 2656 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2657 qdio_free(CARD_DDEV(card)); 2658 return rc; 2659 } 2660 2661 void qeth_print_status_message(struct qeth_card *card) 2662 { 2663 switch (card->info.type) { 2664 case QETH_CARD_TYPE_OSD: 2665 case QETH_CARD_TYPE_OSM: 2666 case QETH_CARD_TYPE_OSX: 2667 /* VM will use a non-zero first character 2668 * to indicate a HiperSockets like reporting 2669 * of the level OSA sets the first character to zero 2670 * */ 2671 if (!card->info.mcl_level[0]) { 2672 sprintf(card->info.mcl_level, "%02x%02x", 2673 card->info.mcl_level[2], 2674 card->info.mcl_level[3]); 2675 break; 2676 } 2677 /* fallthrough */ 2678 case QETH_CARD_TYPE_IQD: 2679 if ((card->info.guestlan) || 2680 (card->info.mcl_level[0] & 0x80)) { 2681 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2682 card->info.mcl_level[0]]; 2683 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2684 card->info.mcl_level[1]]; 2685 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2686 card->info.mcl_level[2]]; 2687 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2688 card->info.mcl_level[3]]; 2689 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2690 } 2691 break; 2692 default: 2693 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2694 } 2695 dev_info(&card->gdev->dev, 2696 "Device is a%s card%s%s%s\nwith link type %s.\n", 2697 qeth_get_cardname(card), 2698 (card->info.mcl_level[0]) ? " (level: " : "", 2699 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2700 (card->info.mcl_level[0]) ? ")" : "", 2701 qeth_get_cardname_short(card)); 2702 } 2703 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2704 2705 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2706 { 2707 struct qeth_buffer_pool_entry *entry; 2708 2709 QETH_CARD_TEXT(card, 5, "inwrklst"); 2710 2711 list_for_each_entry(entry, 2712 &card->qdio.init_pool.entry_list, init_list) { 2713 qeth_put_buffer_pool_entry(card, entry); 2714 } 2715 } 2716 2717 static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2718 struct qeth_card *card) 2719 { 2720 struct list_head *plh; 2721 struct qeth_buffer_pool_entry *entry; 2722 int i, free; 2723 struct page *page; 2724 2725 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2726 return NULL; 2727 2728 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2729 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2730 free = 1; 2731 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2732 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2733 free = 0; 2734 break; 2735 } 2736 } 2737 if (free) { 2738 list_del_init(&entry->list); 2739 return entry; 2740 } 2741 } 2742 2743 /* no free buffer in pool so take first one and swap pages */ 2744 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2745 struct qeth_buffer_pool_entry, list); 2746 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2747 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2748 page = alloc_page(GFP_ATOMIC); 2749 if (!page) { 2750 return NULL; 2751 } else { 2752 free_page((unsigned long)entry->elements[i]); 2753 entry->elements[i] = page_address(page); 2754 if (card->options.performance_stats) 2755 card->perf_stats.sg_alloc_page_rx++; 2756 } 2757 } 2758 } 2759 list_del_init(&entry->list); 2760 return entry; 2761 } 2762 2763 static int qeth_init_input_buffer(struct qeth_card *card, 2764 struct qeth_qdio_buffer *buf) 2765 { 2766 struct qeth_buffer_pool_entry *pool_entry; 2767 int i; 2768 2769 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2770 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2771 if (!buf->rx_skb) 2772 return 1; 2773 } 2774 2775 pool_entry = qeth_find_free_buffer_pool_entry(card); 2776 if (!pool_entry) 2777 return 1; 2778 2779 /* 2780 * since the buffer is accessed only from the input_tasklet 2781 * there shouldn't be a need to synchronize; also, since we use 2782 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2783 * buffers 2784 */ 2785 2786 buf->pool_entry = pool_entry; 2787 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2788 buf->buffer->element[i].length = PAGE_SIZE; 2789 buf->buffer->element[i].addr = pool_entry->elements[i]; 2790 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2791 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2792 else 2793 buf->buffer->element[i].eflags = 0; 2794 buf->buffer->element[i].sflags = 0; 2795 } 2796 return 0; 2797 } 2798 2799 int qeth_init_qdio_queues(struct qeth_card *card) 2800 { 2801 int i, j; 2802 int rc; 2803 2804 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2805 2806 /* inbound queue */ 2807 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, 2808 QDIO_MAX_BUFFERS_PER_Q); 2809 qeth_initialize_working_pool_list(card); 2810 /*give only as many buffers to hardware as we have buffer pool entries*/ 2811 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2812 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2813 card->qdio.in_q->next_buf_to_init = 2814 card->qdio.in_buf_pool.buf_count - 1; 2815 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2816 card->qdio.in_buf_pool.buf_count - 1); 2817 if (rc) { 2818 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2819 return rc; 2820 } 2821 2822 /* completion */ 2823 rc = qeth_cq_init(card); 2824 if (rc) { 2825 return rc; 2826 } 2827 2828 /* outbound queue */ 2829 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2830 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs, 2831 QDIO_MAX_BUFFERS_PER_Q); 2832 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2833 qeth_clear_output_buffer(card->qdio.out_qs[i], 2834 card->qdio.out_qs[i]->bufs[j], 2835 QETH_QDIO_BUF_EMPTY); 2836 } 2837 card->qdio.out_qs[i]->card = card; 2838 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2839 card->qdio.out_qs[i]->do_pack = 0; 2840 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2841 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2842 atomic_set(&card->qdio.out_qs[i]->state, 2843 QETH_OUT_Q_UNLOCKED); 2844 } 2845 return 0; 2846 } 2847 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2848 2849 static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2850 { 2851 switch (link_type) { 2852 case QETH_LINK_TYPE_HSTR: 2853 return 2; 2854 default: 2855 return 1; 2856 } 2857 } 2858 2859 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2860 struct qeth_ipa_cmd *cmd, __u8 command, 2861 enum qeth_prot_versions prot) 2862 { 2863 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2864 cmd->hdr.command = command; 2865 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2866 cmd->hdr.seqno = card->seqno.ipa; 2867 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2868 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2869 if (card->options.layer2) 2870 cmd->hdr.prim_version_no = 2; 2871 else 2872 cmd->hdr.prim_version_no = 1; 2873 cmd->hdr.param_count = 1; 2874 cmd->hdr.prot_version = prot; 2875 cmd->hdr.ipa_supported = 0; 2876 cmd->hdr.ipa_enabled = 0; 2877 } 2878 2879 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2880 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2881 { 2882 struct qeth_cmd_buffer *iob; 2883 struct qeth_ipa_cmd *cmd; 2884 2885 iob = qeth_get_buffer(&card->write); 2886 if (iob) { 2887 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2888 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2889 } else { 2890 dev_warn(&card->gdev->dev, 2891 "The qeth driver ran out of channel command buffers\n"); 2892 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers", 2893 dev_name(&card->gdev->dev)); 2894 } 2895 2896 return iob; 2897 } 2898 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2899 2900 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2901 char prot_type) 2902 { 2903 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2904 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2905 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2906 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2907 } 2908 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2909 2910 /** 2911 * qeth_send_ipa_cmd() - send an IPA command 2912 * 2913 * See qeth_send_control_data() for explanation of the arguments. 2914 */ 2915 2916 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2917 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2918 unsigned long), 2919 void *reply_param) 2920 { 2921 int rc; 2922 char prot_type; 2923 2924 QETH_CARD_TEXT(card, 4, "sendipa"); 2925 2926 if (card->options.layer2) 2927 if (card->info.type == QETH_CARD_TYPE_OSN) 2928 prot_type = QETH_PROT_OSN2; 2929 else 2930 prot_type = QETH_PROT_LAYER2; 2931 else 2932 prot_type = QETH_PROT_TCPIP; 2933 qeth_prepare_ipa_cmd(card, iob, prot_type); 2934 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2935 iob, reply_cb, reply_param); 2936 if (rc == -ETIME) { 2937 qeth_clear_ipacmd_list(card); 2938 qeth_schedule_recovery(card); 2939 } 2940 return rc; 2941 } 2942 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2943 2944 static int qeth_send_startlan(struct qeth_card *card) 2945 { 2946 int rc; 2947 struct qeth_cmd_buffer *iob; 2948 2949 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2950 2951 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2952 if (!iob) 2953 return -ENOMEM; 2954 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2955 return rc; 2956 } 2957 2958 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2959 struct qeth_reply *reply, unsigned long data) 2960 { 2961 struct qeth_ipa_cmd *cmd; 2962 2963 QETH_CARD_TEXT(card, 4, "defadpcb"); 2964 2965 cmd = (struct qeth_ipa_cmd *) data; 2966 if (cmd->hdr.return_code == 0) 2967 cmd->hdr.return_code = 2968 cmd->data.setadapterparms.hdr.return_code; 2969 return 0; 2970 } 2971 2972 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2973 struct qeth_reply *reply, unsigned long data) 2974 { 2975 struct qeth_ipa_cmd *cmd; 2976 2977 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2978 2979 cmd = (struct qeth_ipa_cmd *) data; 2980 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2981 card->info.link_type = 2982 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2983 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2984 } 2985 card->options.adp.supported_funcs = 2986 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2987 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2988 } 2989 2990 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2991 __u32 command, __u32 cmdlen) 2992 { 2993 struct qeth_cmd_buffer *iob; 2994 struct qeth_ipa_cmd *cmd; 2995 2996 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2997 QETH_PROT_IPV4); 2998 if (iob) { 2999 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3000 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 3001 cmd->data.setadapterparms.hdr.command_code = command; 3002 cmd->data.setadapterparms.hdr.used_total = 1; 3003 cmd->data.setadapterparms.hdr.seq_no = 1; 3004 } 3005 3006 return iob; 3007 } 3008 3009 int qeth_query_setadapterparms(struct qeth_card *card) 3010 { 3011 int rc; 3012 struct qeth_cmd_buffer *iob; 3013 3014 QETH_CARD_TEXT(card, 3, "queryadp"); 3015 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 3016 sizeof(struct qeth_ipacmd_setadpparms)); 3017 if (!iob) 3018 return -ENOMEM; 3019 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 3020 return rc; 3021 } 3022 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 3023 3024 static int qeth_query_ipassists_cb(struct qeth_card *card, 3025 struct qeth_reply *reply, unsigned long data) 3026 { 3027 struct qeth_ipa_cmd *cmd; 3028 3029 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 3030 3031 cmd = (struct qeth_ipa_cmd *) data; 3032 3033 switch (cmd->hdr.return_code) { 3034 case IPA_RC_NOTSUPP: 3035 case IPA_RC_L2_UNSUPPORTED_CMD: 3036 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3037 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3038 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3039 return -0; 3040 default: 3041 if (cmd->hdr.return_code) { 3042 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3043 "rc=%d\n", 3044 dev_name(&card->gdev->dev), 3045 cmd->hdr.return_code); 3046 return 0; 3047 } 3048 } 3049 3050 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3051 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3052 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3053 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3054 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3055 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3056 } else 3057 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3058 "\n", dev_name(&card->gdev->dev)); 3059 return 0; 3060 } 3061 3062 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3063 { 3064 int rc; 3065 struct qeth_cmd_buffer *iob; 3066 3067 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3068 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3069 if (!iob) 3070 return -ENOMEM; 3071 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3072 return rc; 3073 } 3074 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3075 3076 static int qeth_query_switch_attributes_cb(struct qeth_card *card, 3077 struct qeth_reply *reply, unsigned long data) 3078 { 3079 struct qeth_ipa_cmd *cmd; 3080 struct qeth_switch_info *sw_info; 3081 struct qeth_query_switch_attributes *attrs; 3082 3083 QETH_CARD_TEXT(card, 2, "qswiatcb"); 3084 cmd = (struct qeth_ipa_cmd *) data; 3085 sw_info = (struct qeth_switch_info *)reply->param; 3086 if (cmd->data.setadapterparms.hdr.return_code == 0) { 3087 attrs = &cmd->data.setadapterparms.data.query_switch_attributes; 3088 sw_info->capabilities = attrs->capabilities; 3089 sw_info->settings = attrs->settings; 3090 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities, 3091 sw_info->settings); 3092 } 3093 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3094 3095 return 0; 3096 } 3097 3098 int qeth_query_switch_attributes(struct qeth_card *card, 3099 struct qeth_switch_info *sw_info) 3100 { 3101 struct qeth_cmd_buffer *iob; 3102 3103 QETH_CARD_TEXT(card, 2, "qswiattr"); 3104 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES)) 3105 return -EOPNOTSUPP; 3106 if (!netif_carrier_ok(card->dev)) 3107 return -ENOMEDIUM; 3108 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES, 3109 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 3110 if (!iob) 3111 return -ENOMEM; 3112 return qeth_send_ipa_cmd(card, iob, 3113 qeth_query_switch_attributes_cb, sw_info); 3114 } 3115 EXPORT_SYMBOL_GPL(qeth_query_switch_attributes); 3116 3117 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3118 struct qeth_reply *reply, unsigned long data) 3119 { 3120 struct qeth_ipa_cmd *cmd; 3121 __u16 rc; 3122 3123 cmd = (struct qeth_ipa_cmd *)data; 3124 rc = cmd->hdr.return_code; 3125 if (rc) 3126 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3127 else 3128 card->info.diagass_support = cmd->data.diagass.ext; 3129 return 0; 3130 } 3131 3132 static int qeth_query_setdiagass(struct qeth_card *card) 3133 { 3134 struct qeth_cmd_buffer *iob; 3135 struct qeth_ipa_cmd *cmd; 3136 3137 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3138 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3139 if (!iob) 3140 return -ENOMEM; 3141 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3142 cmd->data.diagass.subcmd_len = 16; 3143 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3144 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3145 } 3146 3147 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3148 { 3149 unsigned long info = get_zeroed_page(GFP_KERNEL); 3150 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3151 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3152 struct ccw_dev_id ccwid; 3153 int level; 3154 3155 tid->chpid = card->info.chpid; 3156 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3157 tid->ssid = ccwid.ssid; 3158 tid->devno = ccwid.devno; 3159 if (!info) 3160 return; 3161 level = stsi(NULL, 0, 0, 0); 3162 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3163 tid->lparnr = info222->lpar_number; 3164 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3165 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3166 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3167 } 3168 free_page(info); 3169 return; 3170 } 3171 3172 static int qeth_hw_trap_cb(struct qeth_card *card, 3173 struct qeth_reply *reply, unsigned long data) 3174 { 3175 struct qeth_ipa_cmd *cmd; 3176 __u16 rc; 3177 3178 cmd = (struct qeth_ipa_cmd *)data; 3179 rc = cmd->hdr.return_code; 3180 if (rc) 3181 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3182 return 0; 3183 } 3184 3185 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3186 { 3187 struct qeth_cmd_buffer *iob; 3188 struct qeth_ipa_cmd *cmd; 3189 3190 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3191 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3192 if (!iob) 3193 return -ENOMEM; 3194 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3195 cmd->data.diagass.subcmd_len = 80; 3196 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3197 cmd->data.diagass.type = 1; 3198 cmd->data.diagass.action = action; 3199 switch (action) { 3200 case QETH_DIAGS_TRAP_ARM: 3201 cmd->data.diagass.options = 0x0003; 3202 cmd->data.diagass.ext = 0x00010000 + 3203 sizeof(struct qeth_trap_id); 3204 qeth_get_trap_id(card, 3205 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3206 break; 3207 case QETH_DIAGS_TRAP_DISARM: 3208 cmd->data.diagass.options = 0x0001; 3209 break; 3210 case QETH_DIAGS_TRAP_CAPTURE: 3211 break; 3212 } 3213 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3214 } 3215 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3216 3217 static int qeth_check_qdio_errors(struct qeth_card *card, 3218 struct qdio_buffer *buf, 3219 unsigned int qdio_error, 3220 const char *dbftext) 3221 { 3222 if (qdio_error) { 3223 QETH_CARD_TEXT(card, 2, dbftext); 3224 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3225 buf->element[15].sflags); 3226 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3227 buf->element[14].sflags); 3228 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3229 if ((buf->element[15].sflags) == 0x12) { 3230 card->stats.rx_dropped++; 3231 return 0; 3232 } else 3233 return 1; 3234 } 3235 return 0; 3236 } 3237 3238 static void qeth_queue_input_buffer(struct qeth_card *card, int index) 3239 { 3240 struct qeth_qdio_q *queue = card->qdio.in_q; 3241 struct list_head *lh; 3242 int count; 3243 int i; 3244 int rc; 3245 int newcount = 0; 3246 3247 count = (index < queue->next_buf_to_init)? 3248 card->qdio.in_buf_pool.buf_count - 3249 (queue->next_buf_to_init - index) : 3250 card->qdio.in_buf_pool.buf_count - 3251 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3252 /* only requeue at a certain threshold to avoid SIGAs */ 3253 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3254 for (i = queue->next_buf_to_init; 3255 i < queue->next_buf_to_init + count; ++i) { 3256 if (qeth_init_input_buffer(card, 3257 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3258 break; 3259 } else { 3260 newcount++; 3261 } 3262 } 3263 3264 if (newcount < count) { 3265 /* we are in memory shortage so we switch back to 3266 traditional skb allocation and drop packages */ 3267 atomic_set(&card->force_alloc_skb, 3); 3268 count = newcount; 3269 } else { 3270 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3271 } 3272 3273 if (!count) { 3274 i = 0; 3275 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3276 i++; 3277 if (i == card->qdio.in_buf_pool.buf_count) { 3278 QETH_CARD_TEXT(card, 2, "qsarbw"); 3279 card->reclaim_index = index; 3280 schedule_delayed_work( 3281 &card->buffer_reclaim_work, 3282 QETH_RECLAIM_WORK_TIME); 3283 } 3284 return; 3285 } 3286 3287 /* 3288 * according to old code it should be avoided to requeue all 3289 * 128 buffers in order to benefit from PCI avoidance. 3290 * this function keeps at least one buffer (the buffer at 3291 * 'index') un-requeued -> this buffer is the first buffer that 3292 * will be requeued the next time 3293 */ 3294 if (card->options.performance_stats) { 3295 card->perf_stats.inbound_do_qdio_cnt++; 3296 card->perf_stats.inbound_do_qdio_start_time = 3297 qeth_get_micros(); 3298 } 3299 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3300 queue->next_buf_to_init, count); 3301 if (card->options.performance_stats) 3302 card->perf_stats.inbound_do_qdio_time += 3303 qeth_get_micros() - 3304 card->perf_stats.inbound_do_qdio_start_time; 3305 if (rc) { 3306 QETH_CARD_TEXT(card, 2, "qinberr"); 3307 } 3308 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3309 QDIO_MAX_BUFFERS_PER_Q; 3310 } 3311 } 3312 3313 static void qeth_buffer_reclaim_work(struct work_struct *work) 3314 { 3315 struct qeth_card *card = container_of(work, struct qeth_card, 3316 buffer_reclaim_work.work); 3317 3318 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3319 qeth_queue_input_buffer(card, card->reclaim_index); 3320 } 3321 3322 static void qeth_handle_send_error(struct qeth_card *card, 3323 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3324 { 3325 int sbalf15 = buffer->buffer->element[15].sflags; 3326 3327 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3328 if (card->info.type == QETH_CARD_TYPE_IQD) { 3329 if (sbalf15 == 0) { 3330 qdio_err = 0; 3331 } else { 3332 qdio_err = 1; 3333 } 3334 } 3335 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3336 3337 if (!qdio_err) 3338 return; 3339 3340 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3341 return; 3342 3343 QETH_CARD_TEXT(card, 1, "lnkfail"); 3344 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3345 (u16)qdio_err, (u8)sbalf15); 3346 } 3347 3348 /** 3349 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer. 3350 * @queue: queue to check for packing buffer 3351 * 3352 * Returns number of buffers that were prepared for flush. 3353 */ 3354 static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue) 3355 { 3356 struct qeth_qdio_out_buffer *buffer; 3357 3358 buffer = queue->bufs[queue->next_buf_to_fill]; 3359 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3360 (buffer->next_element_to_fill > 0)) { 3361 /* it's a packing buffer */ 3362 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3363 queue->next_buf_to_fill = 3364 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3365 return 1; 3366 } 3367 return 0; 3368 } 3369 3370 /* 3371 * Switched to packing state if the number of used buffers on a queue 3372 * reaches a certain limit. 3373 */ 3374 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3375 { 3376 if (!queue->do_pack) { 3377 if (atomic_read(&queue->used_buffers) 3378 >= QETH_HIGH_WATERMARK_PACK){ 3379 /* switch non-PACKING -> PACKING */ 3380 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3381 if (queue->card->options.performance_stats) 3382 queue->card->perf_stats.sc_dp_p++; 3383 queue->do_pack = 1; 3384 } 3385 } 3386 } 3387 3388 /* 3389 * Switches from packing to non-packing mode. If there is a packing 3390 * buffer on the queue this buffer will be prepared to be flushed. 3391 * In that case 1 is returned to inform the caller. If no buffer 3392 * has to be flushed, zero is returned. 3393 */ 3394 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3395 { 3396 if (queue->do_pack) { 3397 if (atomic_read(&queue->used_buffers) 3398 <= QETH_LOW_WATERMARK_PACK) { 3399 /* switch PACKING -> non-PACKING */ 3400 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3401 if (queue->card->options.performance_stats) 3402 queue->card->perf_stats.sc_p_dp++; 3403 queue->do_pack = 0; 3404 return qeth_prep_flush_pack_buffer(queue); 3405 } 3406 } 3407 return 0; 3408 } 3409 3410 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3411 int count) 3412 { 3413 struct qeth_qdio_out_buffer *buf; 3414 int rc; 3415 int i; 3416 unsigned int qdio_flags; 3417 3418 for (i = index; i < index + count; ++i) { 3419 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3420 buf = queue->bufs[bidx]; 3421 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3422 SBAL_EFLAGS_LAST_ENTRY; 3423 3424 if (queue->bufstates) 3425 queue->bufstates[bidx].user = buf; 3426 3427 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3428 continue; 3429 3430 if (!queue->do_pack) { 3431 if ((atomic_read(&queue->used_buffers) >= 3432 (QETH_HIGH_WATERMARK_PACK - 3433 QETH_WATERMARK_PACK_FUZZ)) && 3434 !atomic_read(&queue->set_pci_flags_count)) { 3435 /* it's likely that we'll go to packing 3436 * mode soon */ 3437 atomic_inc(&queue->set_pci_flags_count); 3438 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3439 } 3440 } else { 3441 if (!atomic_read(&queue->set_pci_flags_count)) { 3442 /* 3443 * there's no outstanding PCI any more, so we 3444 * have to request a PCI to be sure the the PCI 3445 * will wake at some time in the future then we 3446 * can flush packed buffers that might still be 3447 * hanging around, which can happen if no 3448 * further send was requested by the stack 3449 */ 3450 atomic_inc(&queue->set_pci_flags_count); 3451 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3452 } 3453 } 3454 } 3455 3456 netif_trans_update(queue->card->dev); 3457 if (queue->card->options.performance_stats) { 3458 queue->card->perf_stats.outbound_do_qdio_cnt++; 3459 queue->card->perf_stats.outbound_do_qdio_start_time = 3460 qeth_get_micros(); 3461 } 3462 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3463 if (atomic_read(&queue->set_pci_flags_count)) 3464 qdio_flags |= QDIO_FLAG_PCI_OUT; 3465 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3466 queue->queue_no, index, count); 3467 if (queue->card->options.performance_stats) 3468 queue->card->perf_stats.outbound_do_qdio_time += 3469 qeth_get_micros() - 3470 queue->card->perf_stats.outbound_do_qdio_start_time; 3471 atomic_add(count, &queue->used_buffers); 3472 if (rc) { 3473 queue->card->stats.tx_errors += count; 3474 /* ignore temporary SIGA errors without busy condition */ 3475 if (rc == -ENOBUFS) 3476 return; 3477 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3478 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3479 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3480 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3481 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3482 3483 /* this must not happen under normal circumstances. if it 3484 * happens something is really wrong -> recover */ 3485 qeth_schedule_recovery(queue->card); 3486 return; 3487 } 3488 if (queue->card->options.performance_stats) 3489 queue->card->perf_stats.bufs_sent += count; 3490 } 3491 3492 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3493 { 3494 int index; 3495 int flush_cnt = 0; 3496 int q_was_packing = 0; 3497 3498 /* 3499 * check if weed have to switch to non-packing mode or if 3500 * we have to get a pci flag out on the queue 3501 */ 3502 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3503 !atomic_read(&queue->set_pci_flags_count)) { 3504 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3505 QETH_OUT_Q_UNLOCKED) { 3506 /* 3507 * If we get in here, there was no action in 3508 * do_send_packet. So, we check if there is a 3509 * packing buffer to be flushed here. 3510 */ 3511 netif_stop_queue(queue->card->dev); 3512 index = queue->next_buf_to_fill; 3513 q_was_packing = queue->do_pack; 3514 /* queue->do_pack may change */ 3515 barrier(); 3516 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3517 if (!flush_cnt && 3518 !atomic_read(&queue->set_pci_flags_count)) 3519 flush_cnt += qeth_prep_flush_pack_buffer(queue); 3520 if (queue->card->options.performance_stats && 3521 q_was_packing) 3522 queue->card->perf_stats.bufs_sent_pack += 3523 flush_cnt; 3524 if (flush_cnt) 3525 qeth_flush_buffers(queue, index, flush_cnt); 3526 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3527 } 3528 } 3529 } 3530 3531 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3532 unsigned long card_ptr) 3533 { 3534 struct qeth_card *card = (struct qeth_card *)card_ptr; 3535 3536 if (card->dev && (card->dev->flags & IFF_UP)) 3537 napi_schedule(&card->napi); 3538 } 3539 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3540 3541 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3542 { 3543 int rc; 3544 3545 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3546 rc = -1; 3547 goto out; 3548 } else { 3549 if (card->options.cq == cq) { 3550 rc = 0; 3551 goto out; 3552 } 3553 3554 if (card->state != CARD_STATE_DOWN && 3555 card->state != CARD_STATE_RECOVER) { 3556 rc = -1; 3557 goto out; 3558 } 3559 3560 qeth_free_qdio_buffers(card); 3561 card->options.cq = cq; 3562 rc = 0; 3563 } 3564 out: 3565 return rc; 3566 3567 } 3568 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3569 3570 3571 static void qeth_qdio_cq_handler(struct qeth_card *card, 3572 unsigned int qdio_err, 3573 unsigned int queue, int first_element, int count) { 3574 struct qeth_qdio_q *cq = card->qdio.c_q; 3575 int i; 3576 int rc; 3577 3578 if (!qeth_is_cq(card, queue)) 3579 goto out; 3580 3581 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3582 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3583 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3584 3585 if (qdio_err) { 3586 netif_stop_queue(card->dev); 3587 qeth_schedule_recovery(card); 3588 goto out; 3589 } 3590 3591 if (card->options.performance_stats) { 3592 card->perf_stats.cq_cnt++; 3593 card->perf_stats.cq_start_time = qeth_get_micros(); 3594 } 3595 3596 for (i = first_element; i < first_element + count; ++i) { 3597 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3598 struct qdio_buffer *buffer = cq->qdio_bufs[bidx]; 3599 int e; 3600 3601 e = 0; 3602 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) && 3603 buffer->element[e].addr) { 3604 unsigned long phys_aob_addr; 3605 3606 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3607 qeth_qdio_handle_aob(card, phys_aob_addr); 3608 buffer->element[e].addr = NULL; 3609 buffer->element[e].eflags = 0; 3610 buffer->element[e].sflags = 0; 3611 buffer->element[e].length = 0; 3612 3613 ++e; 3614 } 3615 3616 buffer->element[15].eflags = 0; 3617 buffer->element[15].sflags = 0; 3618 } 3619 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3620 card->qdio.c_q->next_buf_to_init, 3621 count); 3622 if (rc) { 3623 dev_warn(&card->gdev->dev, 3624 "QDIO reported an error, rc=%i\n", rc); 3625 QETH_CARD_TEXT(card, 2, "qcqherr"); 3626 } 3627 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3628 + count) % QDIO_MAX_BUFFERS_PER_Q; 3629 3630 netif_wake_queue(card->dev); 3631 3632 if (card->options.performance_stats) { 3633 int delta_t = qeth_get_micros(); 3634 delta_t -= card->perf_stats.cq_start_time; 3635 card->perf_stats.cq_time += delta_t; 3636 } 3637 out: 3638 return; 3639 } 3640 3641 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3642 unsigned int queue, int first_elem, int count, 3643 unsigned long card_ptr) 3644 { 3645 struct qeth_card *card = (struct qeth_card *)card_ptr; 3646 3647 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3648 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3649 3650 if (qeth_is_cq(card, queue)) 3651 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3652 else if (qdio_err) 3653 qeth_schedule_recovery(card); 3654 3655 3656 } 3657 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3658 3659 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3660 unsigned int qdio_error, int __queue, int first_element, 3661 int count, unsigned long card_ptr) 3662 { 3663 struct qeth_card *card = (struct qeth_card *) card_ptr; 3664 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3665 struct qeth_qdio_out_buffer *buffer; 3666 int i; 3667 3668 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3669 if (qdio_error & QDIO_ERROR_FATAL) { 3670 QETH_CARD_TEXT(card, 2, "achkcond"); 3671 netif_stop_queue(card->dev); 3672 qeth_schedule_recovery(card); 3673 return; 3674 } 3675 if (card->options.performance_stats) { 3676 card->perf_stats.outbound_handler_cnt++; 3677 card->perf_stats.outbound_handler_start_time = 3678 qeth_get_micros(); 3679 } 3680 for (i = first_element; i < (first_element + count); ++i) { 3681 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3682 buffer = queue->bufs[bidx]; 3683 qeth_handle_send_error(card, buffer, qdio_error); 3684 3685 if (queue->bufstates && 3686 (queue->bufstates[bidx].flags & 3687 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3688 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3689 3690 if (atomic_cmpxchg(&buffer->state, 3691 QETH_QDIO_BUF_PRIMED, 3692 QETH_QDIO_BUF_PENDING) == 3693 QETH_QDIO_BUF_PRIMED) { 3694 qeth_notify_skbs(queue, buffer, 3695 TX_NOTIFY_PENDING); 3696 } 3697 buffer->aob = queue->bufstates[bidx].aob; 3698 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3699 QETH_CARD_TEXT(queue->card, 5, "aob"); 3700 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3701 virt_to_phys(buffer->aob)); 3702 if (qeth_init_qdio_out_buf(queue, bidx)) { 3703 QETH_CARD_TEXT(card, 2, "outofbuf"); 3704 qeth_schedule_recovery(card); 3705 } 3706 } else { 3707 if (card->options.cq == QETH_CQ_ENABLED) { 3708 enum iucv_tx_notify n; 3709 3710 n = qeth_compute_cq_notification( 3711 buffer->buffer->element[15].sflags, 0); 3712 qeth_notify_skbs(queue, buffer, n); 3713 } 3714 3715 qeth_clear_output_buffer(queue, buffer, 3716 QETH_QDIO_BUF_EMPTY); 3717 } 3718 qeth_cleanup_handled_pending(queue, bidx, 0); 3719 } 3720 atomic_sub(count, &queue->used_buffers); 3721 /* check if we need to do something on this outbound queue */ 3722 if (card->info.type != QETH_CARD_TYPE_IQD) 3723 qeth_check_outbound_queue(queue); 3724 3725 netif_wake_queue(queue->card->dev); 3726 if (card->options.performance_stats) 3727 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3728 card->perf_stats.outbound_handler_start_time; 3729 } 3730 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3731 3732 /* We cannot use outbound queue 3 for unicast packets on HiperSockets */ 3733 static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num) 3734 { 3735 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3)) 3736 return 2; 3737 return queue_num; 3738 } 3739 3740 /** 3741 * Note: Function assumes that we have 4 outbound queues. 3742 */ 3743 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3744 int ipv, int cast_type) 3745 { 3746 __be16 *tci; 3747 u8 tos; 3748 3749 if (cast_type && card->info.is_multicast_different) 3750 return card->info.is_multicast_different & 3751 (card->qdio.no_out_queues - 1); 3752 3753 switch (card->qdio.do_prio_queueing) { 3754 case QETH_PRIO_Q_ING_TOS: 3755 case QETH_PRIO_Q_ING_PREC: 3756 switch (ipv) { 3757 case 4: 3758 tos = ipv4_get_dsfield(ip_hdr(skb)); 3759 break; 3760 case 6: 3761 tos = ipv6_get_dsfield(ipv6_hdr(skb)); 3762 break; 3763 default: 3764 return card->qdio.default_out_queue; 3765 } 3766 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC) 3767 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3); 3768 if (tos & IPTOS_MINCOST) 3769 return qeth_cut_iqd_prio(card, 3); 3770 if (tos & IPTOS_RELIABILITY) 3771 return 2; 3772 if (tos & IPTOS_THROUGHPUT) 3773 return 1; 3774 if (tos & IPTOS_LOWDELAY) 3775 return 0; 3776 break; 3777 case QETH_PRIO_Q_ING_SKB: 3778 if (skb->priority > 5) 3779 return 0; 3780 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3); 3781 case QETH_PRIO_Q_ING_VLAN: 3782 tci = &((struct ethhdr *)skb->data)->h_proto; 3783 if (be16_to_cpu(*tci) == ETH_P_8021Q) 3784 return qeth_cut_iqd_prio(card, 3785 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3); 3786 break; 3787 default: 3788 break; 3789 } 3790 return card->qdio.default_out_queue; 3791 } 3792 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3793 3794 /** 3795 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags. 3796 * @skb: SKB address 3797 * 3798 * Returns the number of pages, and thus QDIO buffer elements, needed to cover 3799 * fragmented part of the SKB. Returns zero for linear SKB. 3800 */ 3801 int qeth_get_elements_for_frags(struct sk_buff *skb) 3802 { 3803 int cnt, elements = 0; 3804 3805 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3806 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt]; 3807 3808 elements += qeth_get_elements_for_range( 3809 (addr_t)skb_frag_address(frag), 3810 (addr_t)skb_frag_address(frag) + skb_frag_size(frag)); 3811 } 3812 return elements; 3813 } 3814 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3815 3816 /** 3817 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags. 3818 * @card: qeth card structure, to check max. elems. 3819 * @skb: SKB address 3820 * @extra_elems: extra elems needed, to check against max. 3821 * @data_offset: range starts at skb->data + data_offset 3822 * 3823 * Returns the number of pages, and thus QDIO buffer elements, needed to cover 3824 * skb data, including linear part and fragments. Checks if the result plus 3825 * extra_elems fits under the limit for the card. Returns 0 if it does not. 3826 * Note: extra_elems is not included in the returned result. 3827 */ 3828 int qeth_get_elements_no(struct qeth_card *card, 3829 struct sk_buff *skb, int extra_elems, int data_offset) 3830 { 3831 int elements = qeth_get_elements_for_range( 3832 (addr_t)skb->data + data_offset, 3833 (addr_t)skb->data + skb_headlen(skb)) + 3834 qeth_get_elements_for_frags(skb); 3835 3836 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3837 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3838 "(Number=%d / Length=%d). Discarded.\n", 3839 elements + extra_elems, skb->len); 3840 return 0; 3841 } 3842 return elements; 3843 } 3844 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3845 3846 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3847 { 3848 int hroom, inpage, rest; 3849 3850 if (((unsigned long)skb->data & PAGE_MASK) != 3851 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3852 hroom = skb_headroom(skb); 3853 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3854 rest = len - inpage; 3855 if (rest > hroom) 3856 return 1; 3857 memmove(skb->data - rest, skb->data, skb_headlen(skb)); 3858 skb->data -= rest; 3859 skb->tail -= rest; 3860 *hdr = (struct qeth_hdr *)skb->data; 3861 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3862 } 3863 return 0; 3864 } 3865 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3866 3867 /** 3868 * qeth_push_hdr() - push a qeth_hdr onto an skb. 3869 * @skb: skb that the qeth_hdr should be pushed onto. 3870 * @hdr: double pointer to a qeth_hdr. When returning with >= 0, 3871 * it contains a valid pointer to a qeth_hdr. 3872 * @len: length of the hdr that needs to be pushed on. 3873 * 3874 * Returns the pushed length. If the header can't be pushed on 3875 * (eg. because it would cross a page boundary), it is allocated from 3876 * the cache instead and 0 is returned. 3877 * Error to create the hdr is indicated by returning with < 0. 3878 */ 3879 int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len) 3880 { 3881 if (skb_headroom(skb) >= len && 3882 qeth_get_elements_for_range((addr_t)skb->data - len, 3883 (addr_t)skb->data) == 1) { 3884 *hdr = skb_push(skb, len); 3885 return len; 3886 } 3887 /* fall back */ 3888 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC); 3889 if (!*hdr) 3890 return -ENOMEM; 3891 return 0; 3892 } 3893 EXPORT_SYMBOL_GPL(qeth_push_hdr); 3894 3895 static void __qeth_fill_buffer(struct sk_buff *skb, 3896 struct qeth_qdio_out_buffer *buf, 3897 bool is_first_elem, unsigned int offset) 3898 { 3899 struct qdio_buffer *buffer = buf->buffer; 3900 int element = buf->next_element_to_fill; 3901 int length = skb_headlen(skb) - offset; 3902 char *data = skb->data + offset; 3903 int length_here, cnt; 3904 3905 /* map linear part into buffer element(s) */ 3906 while (length > 0) { 3907 /* length_here is the remaining amount of data in this page */ 3908 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3909 if (length < length_here) 3910 length_here = length; 3911 3912 buffer->element[element].addr = data; 3913 buffer->element[element].length = length_here; 3914 length -= length_here; 3915 if (is_first_elem) { 3916 is_first_elem = false; 3917 if (length || skb_is_nonlinear(skb)) 3918 /* skb needs additional elements */ 3919 buffer->element[element].eflags = 3920 SBAL_EFLAGS_FIRST_FRAG; 3921 else 3922 buffer->element[element].eflags = 0; 3923 } else { 3924 buffer->element[element].eflags = 3925 SBAL_EFLAGS_MIDDLE_FRAG; 3926 } 3927 data += length_here; 3928 element++; 3929 } 3930 3931 /* map page frags into buffer element(s) */ 3932 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3933 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt]; 3934 3935 data = skb_frag_address(frag); 3936 length = skb_frag_size(frag); 3937 while (length > 0) { 3938 length_here = PAGE_SIZE - 3939 ((unsigned long) data % PAGE_SIZE); 3940 if (length < length_here) 3941 length_here = length; 3942 3943 buffer->element[element].addr = data; 3944 buffer->element[element].length = length_here; 3945 buffer->element[element].eflags = 3946 SBAL_EFLAGS_MIDDLE_FRAG; 3947 length -= length_here; 3948 data += length_here; 3949 element++; 3950 } 3951 } 3952 3953 if (buffer->element[element - 1].eflags) 3954 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3955 buf->next_element_to_fill = element; 3956 } 3957 3958 /** 3959 * qeth_fill_buffer() - map skb into an output buffer 3960 * @queue: QDIO queue to submit the buffer on 3961 * @buf: buffer to transport the skb 3962 * @skb: skb to map into the buffer 3963 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated 3964 * from qeth_core_header_cache. 3965 * @offset: when mapping the skb, start at skb->data + offset 3966 * @hd_len: if > 0, build a dedicated header element of this size 3967 */ 3968 static int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3969 struct qeth_qdio_out_buffer *buf, 3970 struct sk_buff *skb, struct qeth_hdr *hdr, 3971 unsigned int offset, unsigned int hd_len) 3972 { 3973 struct qdio_buffer *buffer = buf->buffer; 3974 bool is_first_elem = true; 3975 int flush_cnt = 0; 3976 3977 refcount_inc(&skb->users); 3978 skb_queue_tail(&buf->skb_list, skb); 3979 3980 /* build dedicated header element */ 3981 if (hd_len) { 3982 int element = buf->next_element_to_fill; 3983 is_first_elem = false; 3984 3985 buffer->element[element].addr = hdr; 3986 buffer->element[element].length = hd_len; 3987 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3988 /* remember to free cache-allocated qeth_hdr: */ 3989 buf->is_header[element] = ((void *)hdr != skb->data); 3990 buf->next_element_to_fill++; 3991 } 3992 3993 __qeth_fill_buffer(skb, buf, is_first_elem, offset); 3994 3995 if (!queue->do_pack) { 3996 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3997 /* set state to PRIMED -> will be flushed */ 3998 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3999 flush_cnt = 1; 4000 } else { 4001 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 4002 if (queue->card->options.performance_stats) 4003 queue->card->perf_stats.skbs_sent_pack++; 4004 if (buf->next_element_to_fill >= 4005 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 4006 /* 4007 * packed buffer if full -> set state PRIMED 4008 * -> will be flushed 4009 */ 4010 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4011 flush_cnt = 1; 4012 } 4013 } 4014 return flush_cnt; 4015 } 4016 4017 int qeth_do_send_packet_fast(struct qeth_qdio_out_q *queue, struct sk_buff *skb, 4018 struct qeth_hdr *hdr, unsigned int offset, 4019 unsigned int hd_len) 4020 { 4021 int index = queue->next_buf_to_fill; 4022 struct qeth_qdio_out_buffer *buffer = queue->bufs[index]; 4023 4024 /* 4025 * check if buffer is empty to make sure that we do not 'overtake' 4026 * ourselves and try to fill a buffer that is already primed 4027 */ 4028 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 4029 return -EBUSY; 4030 queue->next_buf_to_fill = (index + 1) % QDIO_MAX_BUFFERS_PER_Q; 4031 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4032 qeth_flush_buffers(queue, index, 1); 4033 return 0; 4034 } 4035 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 4036 4037 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 4038 struct sk_buff *skb, struct qeth_hdr *hdr, 4039 unsigned int offset, unsigned int hd_len, 4040 int elements_needed) 4041 { 4042 struct qeth_qdio_out_buffer *buffer; 4043 int start_index; 4044 int flush_count = 0; 4045 int do_pack = 0; 4046 int tmp; 4047 int rc = 0; 4048 4049 /* spin until we get the queue ... */ 4050 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4051 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4052 start_index = queue->next_buf_to_fill; 4053 buffer = queue->bufs[queue->next_buf_to_fill]; 4054 /* 4055 * check if buffer is empty to make sure that we do not 'overtake' 4056 * ourselves and try to fill a buffer that is already primed 4057 */ 4058 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 4059 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4060 return -EBUSY; 4061 } 4062 /* check if we need to switch packing state of this queue */ 4063 qeth_switch_to_packing_if_needed(queue); 4064 if (queue->do_pack) { 4065 do_pack = 1; 4066 /* does packet fit in current buffer? */ 4067 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 4068 buffer->next_element_to_fill) < elements_needed) { 4069 /* ... no -> set state PRIMED */ 4070 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 4071 flush_count++; 4072 queue->next_buf_to_fill = 4073 (queue->next_buf_to_fill + 1) % 4074 QDIO_MAX_BUFFERS_PER_Q; 4075 buffer = queue->bufs[queue->next_buf_to_fill]; 4076 /* we did a step forward, so check buffer state 4077 * again */ 4078 if (atomic_read(&buffer->state) != 4079 QETH_QDIO_BUF_EMPTY) { 4080 qeth_flush_buffers(queue, start_index, 4081 flush_count); 4082 atomic_set(&queue->state, 4083 QETH_OUT_Q_UNLOCKED); 4084 rc = -EBUSY; 4085 goto out; 4086 } 4087 } 4088 } 4089 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4090 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 4091 QDIO_MAX_BUFFERS_PER_Q; 4092 flush_count += tmp; 4093 if (flush_count) 4094 qeth_flush_buffers(queue, start_index, flush_count); 4095 else if (!atomic_read(&queue->set_pci_flags_count)) 4096 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4097 /* 4098 * queue->state will go from LOCKED -> UNLOCKED or from 4099 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4100 * (switch packing state or flush buffer to get another pci flag out). 4101 * In that case we will enter this loop 4102 */ 4103 while (atomic_dec_return(&queue->state)) { 4104 start_index = queue->next_buf_to_fill; 4105 /* check if we can go back to non-packing state */ 4106 tmp = qeth_switch_to_nonpacking_if_needed(queue); 4107 /* 4108 * check if we need to flush a packing buffer to get a pci 4109 * flag out on the queue 4110 */ 4111 if (!tmp && !atomic_read(&queue->set_pci_flags_count)) 4112 tmp = qeth_prep_flush_pack_buffer(queue); 4113 if (tmp) { 4114 qeth_flush_buffers(queue, start_index, tmp); 4115 flush_count += tmp; 4116 } 4117 } 4118 out: 4119 /* at this point the queue is UNLOCKED again */ 4120 if (queue->card->options.performance_stats && do_pack) 4121 queue->card->perf_stats.bufs_sent_pack += flush_count; 4122 4123 return rc; 4124 } 4125 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4126 4127 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4128 struct qeth_reply *reply, unsigned long data) 4129 { 4130 struct qeth_ipa_cmd *cmd; 4131 struct qeth_ipacmd_setadpparms *setparms; 4132 4133 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4134 4135 cmd = (struct qeth_ipa_cmd *) data; 4136 setparms = &(cmd->data.setadapterparms); 4137 4138 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4139 if (cmd->hdr.return_code) { 4140 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code); 4141 setparms->data.mode = SET_PROMISC_MODE_OFF; 4142 } 4143 card->info.promisc_mode = setparms->data.mode; 4144 return 0; 4145 } 4146 4147 void qeth_setadp_promisc_mode(struct qeth_card *card) 4148 { 4149 enum qeth_ipa_promisc_modes mode; 4150 struct net_device *dev = card->dev; 4151 struct qeth_cmd_buffer *iob; 4152 struct qeth_ipa_cmd *cmd; 4153 4154 QETH_CARD_TEXT(card, 4, "setprom"); 4155 4156 if (((dev->flags & IFF_PROMISC) && 4157 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4158 (!(dev->flags & IFF_PROMISC) && 4159 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4160 return; 4161 mode = SET_PROMISC_MODE_OFF; 4162 if (dev->flags & IFF_PROMISC) 4163 mode = SET_PROMISC_MODE_ON; 4164 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4165 4166 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4167 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8); 4168 if (!iob) 4169 return; 4170 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4171 cmd->data.setadapterparms.data.mode = mode; 4172 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4173 } 4174 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4175 4176 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4177 { 4178 struct qeth_card *card; 4179 char dbf_text[15]; 4180 4181 card = dev->ml_priv; 4182 4183 QETH_CARD_TEXT(card, 4, "chgmtu"); 4184 sprintf(dbf_text, "%8x", new_mtu); 4185 QETH_CARD_TEXT(card, 4, dbf_text); 4186 4187 if (!qeth_mtu_is_valid(card, new_mtu)) 4188 return -EINVAL; 4189 dev->mtu = new_mtu; 4190 return 0; 4191 } 4192 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4193 4194 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4195 { 4196 struct qeth_card *card; 4197 4198 card = dev->ml_priv; 4199 4200 QETH_CARD_TEXT(card, 5, "getstat"); 4201 4202 return &card->stats; 4203 } 4204 EXPORT_SYMBOL_GPL(qeth_get_stats); 4205 4206 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4207 struct qeth_reply *reply, unsigned long data) 4208 { 4209 struct qeth_ipa_cmd *cmd; 4210 4211 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4212 4213 cmd = (struct qeth_ipa_cmd *) data; 4214 if (!card->options.layer2 || 4215 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4216 memcpy(card->dev->dev_addr, 4217 &cmd->data.setadapterparms.data.change_addr.addr, 4218 OSA_ADDR_LEN); 4219 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4220 } 4221 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4222 return 0; 4223 } 4224 4225 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4226 { 4227 int rc; 4228 struct qeth_cmd_buffer *iob; 4229 struct qeth_ipa_cmd *cmd; 4230 4231 QETH_CARD_TEXT(card, 4, "chgmac"); 4232 4233 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4234 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4235 sizeof(struct qeth_change_addr)); 4236 if (!iob) 4237 return -ENOMEM; 4238 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4239 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4240 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4241 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4242 card->dev->dev_addr, OSA_ADDR_LEN); 4243 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4244 NULL); 4245 return rc; 4246 } 4247 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4248 4249 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4250 struct qeth_reply *reply, unsigned long data) 4251 { 4252 struct qeth_ipa_cmd *cmd; 4253 struct qeth_set_access_ctrl *access_ctrl_req; 4254 int fallback = *(int *)reply->param; 4255 4256 QETH_CARD_TEXT(card, 4, "setaccb"); 4257 4258 cmd = (struct qeth_ipa_cmd *) data; 4259 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4260 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4261 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4262 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4263 cmd->data.setadapterparms.hdr.return_code); 4264 if (cmd->data.setadapterparms.hdr.return_code != 4265 SET_ACCESS_CTRL_RC_SUCCESS) 4266 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4267 card->gdev->dev.kobj.name, 4268 access_ctrl_req->subcmd_code, 4269 cmd->data.setadapterparms.hdr.return_code); 4270 switch (cmd->data.setadapterparms.hdr.return_code) { 4271 case SET_ACCESS_CTRL_RC_SUCCESS: 4272 if (card->options.isolation == ISOLATION_MODE_NONE) { 4273 dev_info(&card->gdev->dev, 4274 "QDIO data connection isolation is deactivated\n"); 4275 } else { 4276 dev_info(&card->gdev->dev, 4277 "QDIO data connection isolation is activated\n"); 4278 } 4279 break; 4280 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4281 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4282 "deactivated\n", dev_name(&card->gdev->dev)); 4283 if (fallback) 4284 card->options.isolation = card->options.prev_isolation; 4285 break; 4286 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4287 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4288 " activated\n", dev_name(&card->gdev->dev)); 4289 if (fallback) 4290 card->options.isolation = card->options.prev_isolation; 4291 break; 4292 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4293 dev_err(&card->gdev->dev, "Adapter does not " 4294 "support QDIO data connection isolation\n"); 4295 break; 4296 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4297 dev_err(&card->gdev->dev, 4298 "Adapter is dedicated. " 4299 "QDIO data connection isolation not supported\n"); 4300 if (fallback) 4301 card->options.isolation = card->options.prev_isolation; 4302 break; 4303 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4304 dev_err(&card->gdev->dev, 4305 "TSO does not permit QDIO data connection isolation\n"); 4306 if (fallback) 4307 card->options.isolation = card->options.prev_isolation; 4308 break; 4309 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4310 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4311 "support reflective relay mode\n"); 4312 if (fallback) 4313 card->options.isolation = card->options.prev_isolation; 4314 break; 4315 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4316 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4317 "enabled at the adjacent switch port"); 4318 if (fallback) 4319 card->options.isolation = card->options.prev_isolation; 4320 break; 4321 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4322 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4323 "at the adjacent switch failed\n"); 4324 break; 4325 default: 4326 /* this should never happen */ 4327 if (fallback) 4328 card->options.isolation = card->options.prev_isolation; 4329 break; 4330 } 4331 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4332 return 0; 4333 } 4334 4335 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4336 enum qeth_ipa_isolation_modes isolation, int fallback) 4337 { 4338 int rc; 4339 struct qeth_cmd_buffer *iob; 4340 struct qeth_ipa_cmd *cmd; 4341 struct qeth_set_access_ctrl *access_ctrl_req; 4342 4343 QETH_CARD_TEXT(card, 4, "setacctl"); 4344 4345 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4346 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4347 4348 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4349 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4350 sizeof(struct qeth_set_access_ctrl)); 4351 if (!iob) 4352 return -ENOMEM; 4353 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4354 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4355 access_ctrl_req->subcmd_code = isolation; 4356 4357 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4358 &fallback); 4359 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4360 return rc; 4361 } 4362 4363 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4364 { 4365 int rc = 0; 4366 4367 QETH_CARD_TEXT(card, 4, "setactlo"); 4368 4369 if ((card->info.type == QETH_CARD_TYPE_OSD || 4370 card->info.type == QETH_CARD_TYPE_OSX) && 4371 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4372 rc = qeth_setadpparms_set_access_ctrl(card, 4373 card->options.isolation, fallback); 4374 if (rc) { 4375 QETH_DBF_MESSAGE(3, 4376 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4377 card->gdev->dev.kobj.name, 4378 rc); 4379 rc = -EOPNOTSUPP; 4380 } 4381 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4382 card->options.isolation = ISOLATION_MODE_NONE; 4383 4384 dev_err(&card->gdev->dev, "Adapter does not " 4385 "support QDIO data connection isolation\n"); 4386 rc = -EOPNOTSUPP; 4387 } 4388 return rc; 4389 } 4390 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4391 4392 void qeth_tx_timeout(struct net_device *dev) 4393 { 4394 struct qeth_card *card; 4395 4396 card = dev->ml_priv; 4397 QETH_CARD_TEXT(card, 4, "txtimeo"); 4398 card->stats.tx_errors++; 4399 qeth_schedule_recovery(card); 4400 } 4401 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4402 4403 static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4404 { 4405 struct qeth_card *card = dev->ml_priv; 4406 int rc = 0; 4407 4408 switch (regnum) { 4409 case MII_BMCR: /* Basic mode control register */ 4410 rc = BMCR_FULLDPLX; 4411 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4412 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4413 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4414 rc |= BMCR_SPEED100; 4415 break; 4416 case MII_BMSR: /* Basic mode status register */ 4417 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4418 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4419 BMSR_100BASE4; 4420 break; 4421 case MII_PHYSID1: /* PHYS ID 1 */ 4422 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4423 dev->dev_addr[2]; 4424 rc = (rc >> 5) & 0xFFFF; 4425 break; 4426 case MII_PHYSID2: /* PHYS ID 2 */ 4427 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4428 break; 4429 case MII_ADVERTISE: /* Advertisement control reg */ 4430 rc = ADVERTISE_ALL; 4431 break; 4432 case MII_LPA: /* Link partner ability reg */ 4433 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4434 LPA_100BASE4 | LPA_LPACK; 4435 break; 4436 case MII_EXPANSION: /* Expansion register */ 4437 break; 4438 case MII_DCOUNTER: /* disconnect counter */ 4439 break; 4440 case MII_FCSCOUNTER: /* false carrier counter */ 4441 break; 4442 case MII_NWAYTEST: /* N-way auto-neg test register */ 4443 break; 4444 case MII_RERRCOUNTER: /* rx error counter */ 4445 rc = card->stats.rx_errors; 4446 break; 4447 case MII_SREVISION: /* silicon revision */ 4448 break; 4449 case MII_RESV1: /* reserved 1 */ 4450 break; 4451 case MII_LBRERROR: /* loopback, rx, bypass error */ 4452 break; 4453 case MII_PHYADDR: /* physical address */ 4454 break; 4455 case MII_RESV2: /* reserved 2 */ 4456 break; 4457 case MII_TPISTATUS: /* TPI status for 10mbps */ 4458 break; 4459 case MII_NCONFIG: /* network interface config */ 4460 break; 4461 default: 4462 break; 4463 } 4464 return rc; 4465 } 4466 4467 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4468 struct qeth_cmd_buffer *iob, int len, 4469 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4470 unsigned long), 4471 void *reply_param) 4472 { 4473 u16 s1, s2; 4474 4475 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4476 4477 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4478 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4479 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4480 /* adjust PDU length fields in IPA_PDU_HEADER */ 4481 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4482 s2 = (u32) len; 4483 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4484 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4485 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4486 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4487 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4488 reply_cb, reply_param); 4489 } 4490 4491 static int qeth_snmp_command_cb(struct qeth_card *card, 4492 struct qeth_reply *reply, unsigned long sdata) 4493 { 4494 struct qeth_ipa_cmd *cmd; 4495 struct qeth_arp_query_info *qinfo; 4496 struct qeth_snmp_cmd *snmp; 4497 unsigned char *data; 4498 __u16 data_len; 4499 4500 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4501 4502 cmd = (struct qeth_ipa_cmd *) sdata; 4503 data = (unsigned char *)((char *)cmd - reply->offset); 4504 qinfo = (struct qeth_arp_query_info *) reply->param; 4505 snmp = &cmd->data.setadapterparms.data.snmp; 4506 4507 if (cmd->hdr.return_code) { 4508 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code); 4509 return 0; 4510 } 4511 if (cmd->data.setadapterparms.hdr.return_code) { 4512 cmd->hdr.return_code = 4513 cmd->data.setadapterparms.hdr.return_code; 4514 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code); 4515 return 0; 4516 } 4517 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4518 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4519 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4520 else 4521 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4522 4523 /* check if there is enough room in userspace */ 4524 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4525 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4526 cmd->hdr.return_code = IPA_RC_ENOMEM; 4527 return 0; 4528 } 4529 QETH_CARD_TEXT_(card, 4, "snore%i", 4530 cmd->data.setadapterparms.hdr.used_total); 4531 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4532 cmd->data.setadapterparms.hdr.seq_no); 4533 /*copy entries to user buffer*/ 4534 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4535 memcpy(qinfo->udata + qinfo->udata_offset, 4536 (char *)snmp, 4537 data_len + offsetof(struct qeth_snmp_cmd, data)); 4538 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4539 } else { 4540 memcpy(qinfo->udata + qinfo->udata_offset, 4541 (char *)&snmp->request, data_len); 4542 } 4543 qinfo->udata_offset += data_len; 4544 /* check if all replies received ... */ 4545 QETH_CARD_TEXT_(card, 4, "srtot%i", 4546 cmd->data.setadapterparms.hdr.used_total); 4547 QETH_CARD_TEXT_(card, 4, "srseq%i", 4548 cmd->data.setadapterparms.hdr.seq_no); 4549 if (cmd->data.setadapterparms.hdr.seq_no < 4550 cmd->data.setadapterparms.hdr.used_total) 4551 return 1; 4552 return 0; 4553 } 4554 4555 static int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4556 { 4557 struct qeth_cmd_buffer *iob; 4558 struct qeth_ipa_cmd *cmd; 4559 struct qeth_snmp_ureq *ureq; 4560 unsigned int req_len; 4561 struct qeth_arp_query_info qinfo = {0, }; 4562 int rc = 0; 4563 4564 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4565 4566 if (card->info.guestlan) 4567 return -EOPNOTSUPP; 4568 4569 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4570 (!card->options.layer2)) { 4571 return -EOPNOTSUPP; 4572 } 4573 /* skip 4 bytes (data_len struct member) to get req_len */ 4574 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4575 return -EFAULT; 4576 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4577 sizeof(struct qeth_ipacmd_hdr) - 4578 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4579 return -EINVAL; 4580 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4581 if (IS_ERR(ureq)) { 4582 QETH_CARD_TEXT(card, 2, "snmpnome"); 4583 return PTR_ERR(ureq); 4584 } 4585 qinfo.udata_len = ureq->hdr.data_len; 4586 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4587 if (!qinfo.udata) { 4588 kfree(ureq); 4589 return -ENOMEM; 4590 } 4591 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4592 4593 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4594 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4595 if (!iob) { 4596 rc = -ENOMEM; 4597 goto out; 4598 } 4599 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4600 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4601 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4602 qeth_snmp_command_cb, (void *)&qinfo); 4603 if (rc) 4604 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4605 QETH_CARD_IFNAME(card), rc); 4606 else { 4607 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4608 rc = -EFAULT; 4609 } 4610 out: 4611 kfree(ureq); 4612 kfree(qinfo.udata); 4613 return rc; 4614 } 4615 4616 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4617 struct qeth_reply *reply, unsigned long data) 4618 { 4619 struct qeth_ipa_cmd *cmd; 4620 struct qeth_qoat_priv *priv; 4621 char *resdata; 4622 int resdatalen; 4623 4624 QETH_CARD_TEXT(card, 3, "qoatcb"); 4625 4626 cmd = (struct qeth_ipa_cmd *)data; 4627 priv = (struct qeth_qoat_priv *)reply->param; 4628 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4629 resdata = (char *)data + 28; 4630 4631 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4632 cmd->hdr.return_code = IPA_RC_FFFF; 4633 return 0; 4634 } 4635 4636 memcpy((priv->buffer + priv->response_len), resdata, 4637 resdatalen); 4638 priv->response_len += resdatalen; 4639 4640 if (cmd->data.setadapterparms.hdr.seq_no < 4641 cmd->data.setadapterparms.hdr.used_total) 4642 return 1; 4643 return 0; 4644 } 4645 4646 static int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4647 { 4648 int rc = 0; 4649 struct qeth_cmd_buffer *iob; 4650 struct qeth_ipa_cmd *cmd; 4651 struct qeth_query_oat *oat_req; 4652 struct qeth_query_oat_data oat_data; 4653 struct qeth_qoat_priv priv; 4654 void __user *tmp; 4655 4656 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4657 4658 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4659 rc = -EOPNOTSUPP; 4660 goto out; 4661 } 4662 4663 if (copy_from_user(&oat_data, udata, 4664 sizeof(struct qeth_query_oat_data))) { 4665 rc = -EFAULT; 4666 goto out; 4667 } 4668 4669 priv.buffer_len = oat_data.buffer_len; 4670 priv.response_len = 0; 4671 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4672 if (!priv.buffer) { 4673 rc = -ENOMEM; 4674 goto out; 4675 } 4676 4677 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4678 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4679 sizeof(struct qeth_query_oat)); 4680 if (!iob) { 4681 rc = -ENOMEM; 4682 goto out_free; 4683 } 4684 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4685 oat_req = &cmd->data.setadapterparms.data.query_oat; 4686 oat_req->subcmd_code = oat_data.command; 4687 4688 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4689 &priv); 4690 if (!rc) { 4691 if (is_compat_task()) 4692 tmp = compat_ptr(oat_data.ptr); 4693 else 4694 tmp = (void __user *)(unsigned long)oat_data.ptr; 4695 4696 if (copy_to_user(tmp, priv.buffer, 4697 priv.response_len)) { 4698 rc = -EFAULT; 4699 goto out_free; 4700 } 4701 4702 oat_data.response_len = priv.response_len; 4703 4704 if (copy_to_user(udata, &oat_data, 4705 sizeof(struct qeth_query_oat_data))) 4706 rc = -EFAULT; 4707 } else 4708 if (rc == IPA_RC_FFFF) 4709 rc = -EFAULT; 4710 4711 out_free: 4712 kfree(priv.buffer); 4713 out: 4714 return rc; 4715 } 4716 4717 static int qeth_query_card_info_cb(struct qeth_card *card, 4718 struct qeth_reply *reply, unsigned long data) 4719 { 4720 struct qeth_ipa_cmd *cmd; 4721 struct qeth_query_card_info *card_info; 4722 struct carrier_info *carrier_info; 4723 4724 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4725 carrier_info = (struct carrier_info *)reply->param; 4726 cmd = (struct qeth_ipa_cmd *)data; 4727 card_info = &cmd->data.setadapterparms.data.card_info; 4728 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4729 carrier_info->card_type = card_info->card_type; 4730 carrier_info->port_mode = card_info->port_mode; 4731 carrier_info->port_speed = card_info->port_speed; 4732 } 4733 4734 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4735 return 0; 4736 } 4737 4738 static int qeth_query_card_info(struct qeth_card *card, 4739 struct carrier_info *carrier_info) 4740 { 4741 struct qeth_cmd_buffer *iob; 4742 4743 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4744 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4745 return -EOPNOTSUPP; 4746 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4747 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4748 if (!iob) 4749 return -ENOMEM; 4750 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4751 (void *)carrier_info); 4752 } 4753 4754 /** 4755 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address 4756 * @card: pointer to a qeth_card 4757 * 4758 * Returns 4759 * 0, if a MAC address has been set for the card's netdevice 4760 * a return code, for various error conditions 4761 */ 4762 int qeth_vm_request_mac(struct qeth_card *card) 4763 { 4764 struct diag26c_mac_resp *response; 4765 struct diag26c_mac_req *request; 4766 struct ccw_dev_id id; 4767 int rc; 4768 4769 QETH_DBF_TEXT(SETUP, 2, "vmreqmac"); 4770 4771 if (!card->dev) 4772 return -ENODEV; 4773 4774 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA); 4775 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA); 4776 if (!request || !response) { 4777 rc = -ENOMEM; 4778 goto out; 4779 } 4780 4781 ccw_device_get_id(CARD_DDEV(card), &id); 4782 request->resp_buf_len = sizeof(*response); 4783 request->resp_version = DIAG26C_VERSION2; 4784 request->op_code = DIAG26C_GET_MAC; 4785 request->devno = id.devno; 4786 4787 rc = diag26c(request, response, DIAG26C_MAC_SERVICES); 4788 if (rc) 4789 goto out; 4790 4791 if (request->resp_buf_len < sizeof(*response) || 4792 response->version != request->resp_version) { 4793 rc = -EIO; 4794 QETH_DBF_TEXT(SETUP, 2, "badresp"); 4795 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len, 4796 sizeof(request->resp_buf_len)); 4797 } else if (!is_valid_ether_addr(response->mac)) { 4798 rc = -EINVAL; 4799 QETH_DBF_TEXT(SETUP, 2, "badmac"); 4800 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN); 4801 } else { 4802 ether_addr_copy(card->dev->dev_addr, response->mac); 4803 } 4804 4805 out: 4806 kfree(response); 4807 kfree(request); 4808 return rc; 4809 } 4810 EXPORT_SYMBOL_GPL(qeth_vm_request_mac); 4811 4812 static int qeth_get_qdio_q_format(struct qeth_card *card) 4813 { 4814 if (card->info.type == QETH_CARD_TYPE_IQD) 4815 return QDIO_IQDIO_QFMT; 4816 else 4817 return QDIO_QETH_QFMT; 4818 } 4819 4820 static void qeth_determine_capabilities(struct qeth_card *card) 4821 { 4822 int rc; 4823 int length; 4824 char *prcd; 4825 struct ccw_device *ddev; 4826 int ddev_offline = 0; 4827 4828 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4829 ddev = CARD_DDEV(card); 4830 if (!ddev->online) { 4831 ddev_offline = 1; 4832 rc = ccw_device_set_online(ddev); 4833 if (rc) { 4834 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4835 goto out; 4836 } 4837 } 4838 4839 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4840 if (rc) { 4841 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4842 dev_name(&card->gdev->dev), rc); 4843 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4844 goto out_offline; 4845 } 4846 qeth_configure_unitaddr(card, prcd); 4847 if (ddev_offline) 4848 qeth_configure_blkt_default(card, prcd); 4849 kfree(prcd); 4850 4851 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4852 if (rc) 4853 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4854 4855 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4856 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1); 4857 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2); 4858 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3); 4859 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4860 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4861 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4862 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4863 dev_info(&card->gdev->dev, 4864 "Completion Queueing supported\n"); 4865 } else { 4866 card->options.cq = QETH_CQ_NOTAVAILABLE; 4867 } 4868 4869 4870 out_offline: 4871 if (ddev_offline == 1) 4872 ccw_device_set_offline(ddev); 4873 out: 4874 return; 4875 } 4876 4877 static void qeth_qdio_establish_cq(struct qeth_card *card, 4878 struct qdio_buffer **in_sbal_ptrs, 4879 void (**queue_start_poll) 4880 (struct ccw_device *, int, 4881 unsigned long)) 4882 { 4883 int i; 4884 4885 if (card->options.cq == QETH_CQ_ENABLED) { 4886 int offset = QDIO_MAX_BUFFERS_PER_Q * 4887 (card->qdio.no_in_queues - 1); 4888 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4889 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4890 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4891 } 4892 4893 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4894 } 4895 } 4896 4897 static int qeth_qdio_establish(struct qeth_card *card) 4898 { 4899 struct qdio_initialize init_data; 4900 char *qib_param_field; 4901 struct qdio_buffer **in_sbal_ptrs; 4902 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4903 struct qdio_buffer **out_sbal_ptrs; 4904 int i, j, k; 4905 int rc = 0; 4906 4907 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4908 4909 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4910 GFP_KERNEL); 4911 if (!qib_param_field) { 4912 rc = -ENOMEM; 4913 goto out_free_nothing; 4914 } 4915 4916 qeth_create_qib_param_field(card, qib_param_field); 4917 qeth_create_qib_param_field_blkt(card, qib_param_field); 4918 4919 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4920 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4921 GFP_KERNEL); 4922 if (!in_sbal_ptrs) { 4923 rc = -ENOMEM; 4924 goto out_free_qib_param; 4925 } 4926 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4927 in_sbal_ptrs[i] = (struct qdio_buffer *) 4928 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4929 } 4930 4931 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4932 GFP_KERNEL); 4933 if (!queue_start_poll) { 4934 rc = -ENOMEM; 4935 goto out_free_in_sbals; 4936 } 4937 for (i = 0; i < card->qdio.no_in_queues; ++i) 4938 queue_start_poll[i] = card->discipline->start_poll; 4939 4940 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4941 4942 out_sbal_ptrs = 4943 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4944 sizeof(void *), GFP_KERNEL); 4945 if (!out_sbal_ptrs) { 4946 rc = -ENOMEM; 4947 goto out_free_queue_start_poll; 4948 } 4949 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4950 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4951 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4952 card->qdio.out_qs[i]->bufs[j]->buffer); 4953 } 4954 4955 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4956 init_data.cdev = CARD_DDEV(card); 4957 init_data.q_format = qeth_get_qdio_q_format(card); 4958 init_data.qib_param_field_format = 0; 4959 init_data.qib_param_field = qib_param_field; 4960 init_data.no_input_qs = card->qdio.no_in_queues; 4961 init_data.no_output_qs = card->qdio.no_out_queues; 4962 init_data.input_handler = card->discipline->input_handler; 4963 init_data.output_handler = card->discipline->output_handler; 4964 init_data.queue_start_poll_array = queue_start_poll; 4965 init_data.int_parm = (unsigned long) card; 4966 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4967 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4968 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4969 init_data.scan_threshold = 4970 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4971 4972 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4973 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4974 rc = qdio_allocate(&init_data); 4975 if (rc) { 4976 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4977 goto out; 4978 } 4979 rc = qdio_establish(&init_data); 4980 if (rc) { 4981 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4982 qdio_free(CARD_DDEV(card)); 4983 } 4984 } 4985 4986 switch (card->options.cq) { 4987 case QETH_CQ_ENABLED: 4988 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4989 break; 4990 case QETH_CQ_DISABLED: 4991 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4992 break; 4993 default: 4994 break; 4995 } 4996 out: 4997 kfree(out_sbal_ptrs); 4998 out_free_queue_start_poll: 4999 kfree(queue_start_poll); 5000 out_free_in_sbals: 5001 kfree(in_sbal_ptrs); 5002 out_free_qib_param: 5003 kfree(qib_param_field); 5004 out_free_nothing: 5005 return rc; 5006 } 5007 5008 static void qeth_core_free_card(struct qeth_card *card) 5009 { 5010 5011 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 5012 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 5013 qeth_clean_channel(&card->read); 5014 qeth_clean_channel(&card->write); 5015 if (card->dev) 5016 free_netdev(card->dev); 5017 qeth_free_qdio_buffers(card); 5018 unregister_service_level(&card->qeth_service_level); 5019 kfree(card); 5020 } 5021 5022 void qeth_trace_features(struct qeth_card *card) 5023 { 5024 QETH_CARD_TEXT(card, 2, "features"); 5025 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4)); 5026 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6)); 5027 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp)); 5028 QETH_CARD_HEX(card, 2, &card->info.diagass_support, 5029 sizeof(card->info.diagass_support)); 5030 } 5031 EXPORT_SYMBOL_GPL(qeth_trace_features); 5032 5033 static struct ccw_device_id qeth_ids[] = { 5034 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 5035 .driver_info = QETH_CARD_TYPE_OSD}, 5036 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 5037 .driver_info = QETH_CARD_TYPE_IQD}, 5038 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 5039 .driver_info = QETH_CARD_TYPE_OSN}, 5040 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 5041 .driver_info = QETH_CARD_TYPE_OSM}, 5042 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 5043 .driver_info = QETH_CARD_TYPE_OSX}, 5044 {}, 5045 }; 5046 MODULE_DEVICE_TABLE(ccw, qeth_ids); 5047 5048 static struct ccw_driver qeth_ccw_driver = { 5049 .driver = { 5050 .owner = THIS_MODULE, 5051 .name = "qeth", 5052 }, 5053 .ids = qeth_ids, 5054 .probe = ccwgroup_probe_ccwdev, 5055 .remove = ccwgroup_remove_ccwdev, 5056 }; 5057 5058 int qeth_core_hardsetup_card(struct qeth_card *card) 5059 { 5060 int retries = 3; 5061 int rc; 5062 5063 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 5064 atomic_set(&card->force_alloc_skb, 0); 5065 qeth_update_from_chp_desc(card); 5066 retry: 5067 if (retries < 3) 5068 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 5069 dev_name(&card->gdev->dev)); 5070 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 5071 ccw_device_set_offline(CARD_DDEV(card)); 5072 ccw_device_set_offline(CARD_WDEV(card)); 5073 ccw_device_set_offline(CARD_RDEV(card)); 5074 qdio_free(CARD_DDEV(card)); 5075 rc = ccw_device_set_online(CARD_RDEV(card)); 5076 if (rc) 5077 goto retriable; 5078 rc = ccw_device_set_online(CARD_WDEV(card)); 5079 if (rc) 5080 goto retriable; 5081 rc = ccw_device_set_online(CARD_DDEV(card)); 5082 if (rc) 5083 goto retriable; 5084 retriable: 5085 if (rc == -ERESTARTSYS) { 5086 QETH_DBF_TEXT(SETUP, 2, "break1"); 5087 return rc; 5088 } else if (rc) { 5089 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 5090 if (--retries < 0) 5091 goto out; 5092 else 5093 goto retry; 5094 } 5095 qeth_determine_capabilities(card); 5096 qeth_init_tokens(card); 5097 qeth_init_func_level(card); 5098 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 5099 if (rc == -ERESTARTSYS) { 5100 QETH_DBF_TEXT(SETUP, 2, "break2"); 5101 return rc; 5102 } else if (rc) { 5103 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5104 if (--retries < 0) 5105 goto out; 5106 else 5107 goto retry; 5108 } 5109 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 5110 if (rc == -ERESTARTSYS) { 5111 QETH_DBF_TEXT(SETUP, 2, "break3"); 5112 return rc; 5113 } else if (rc) { 5114 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 5115 if (--retries < 0) 5116 goto out; 5117 else 5118 goto retry; 5119 } 5120 card->read_or_write_problem = 0; 5121 rc = qeth_mpc_initialize(card); 5122 if (rc) { 5123 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 5124 goto out; 5125 } 5126 5127 rc = qeth_send_startlan(card); 5128 if (rc) { 5129 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 5130 if (rc == IPA_RC_LAN_OFFLINE) { 5131 dev_warn(&card->gdev->dev, 5132 "The LAN is offline\n"); 5133 card->lan_online = 0; 5134 } else { 5135 rc = -ENODEV; 5136 goto out; 5137 } 5138 } else 5139 card->lan_online = 1; 5140 5141 card->options.ipa4.supported_funcs = 0; 5142 card->options.ipa6.supported_funcs = 0; 5143 card->options.adp.supported_funcs = 0; 5144 card->options.sbp.supported_funcs = 0; 5145 card->info.diagass_support = 0; 5146 rc = qeth_query_ipassists(card, QETH_PROT_IPV4); 5147 if (rc == -ENOMEM) 5148 goto out; 5149 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) { 5150 rc = qeth_query_setadapterparms(card); 5151 if (rc < 0) { 5152 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 5153 goto out; 5154 } 5155 } 5156 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) { 5157 rc = qeth_query_setdiagass(card); 5158 if (rc < 0) { 5159 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 5160 goto out; 5161 } 5162 } 5163 return 0; 5164 out: 5165 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 5166 "an error on the device\n"); 5167 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 5168 dev_name(&card->gdev->dev), rc); 5169 return rc; 5170 } 5171 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 5172 5173 static void qeth_create_skb_frag(struct qdio_buffer_element *element, 5174 struct sk_buff *skb, int offset, int data_len) 5175 { 5176 struct page *page = virt_to_page(element->addr); 5177 unsigned int next_frag; 5178 5179 /* first fill the linear space */ 5180 if (!skb->len) { 5181 unsigned int linear = min(data_len, skb_tailroom(skb)); 5182 5183 skb_put_data(skb, element->addr + offset, linear); 5184 data_len -= linear; 5185 if (!data_len) 5186 return; 5187 offset += linear; 5188 /* fall through to add page frag for remaining data */ 5189 } 5190 5191 next_frag = skb_shinfo(skb)->nr_frags; 5192 get_page(page); 5193 skb_add_rx_frag(skb, next_frag, page, offset, data_len, data_len); 5194 } 5195 5196 static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) 5197 { 5198 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); 5199 } 5200 5201 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5202 struct qeth_qdio_buffer *qethbuffer, 5203 struct qdio_buffer_element **__element, int *__offset, 5204 struct qeth_hdr **hdr) 5205 { 5206 struct qdio_buffer_element *element = *__element; 5207 struct qdio_buffer *buffer = qethbuffer->buffer; 5208 int offset = *__offset; 5209 struct sk_buff *skb; 5210 int skb_len = 0; 5211 void *data_ptr; 5212 int data_len; 5213 int headroom = 0; 5214 int use_rx_sg = 0; 5215 5216 /* qeth_hdr must not cross element boundaries */ 5217 while (element->length < offset + sizeof(struct qeth_hdr)) { 5218 if (qeth_is_last_sbale(element)) 5219 return NULL; 5220 element++; 5221 offset = 0; 5222 } 5223 *hdr = element->addr + offset; 5224 5225 offset += sizeof(struct qeth_hdr); 5226 switch ((*hdr)->hdr.l2.id) { 5227 case QETH_HEADER_TYPE_LAYER2: 5228 skb_len = (*hdr)->hdr.l2.pkt_length; 5229 break; 5230 case QETH_HEADER_TYPE_LAYER3: 5231 skb_len = (*hdr)->hdr.l3.length; 5232 headroom = ETH_HLEN; 5233 break; 5234 case QETH_HEADER_TYPE_OSN: 5235 skb_len = (*hdr)->hdr.osn.pdu_length; 5236 headroom = sizeof(struct qeth_hdr); 5237 break; 5238 default: 5239 break; 5240 } 5241 5242 if (!skb_len) 5243 return NULL; 5244 5245 if (((skb_len >= card->options.rx_sg_cb) && 5246 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5247 (!atomic_read(&card->force_alloc_skb))) || 5248 (card->options.cq == QETH_CQ_ENABLED)) 5249 use_rx_sg = 1; 5250 5251 if (use_rx_sg && qethbuffer->rx_skb) { 5252 /* QETH_CQ_ENABLED only: */ 5253 skb = qethbuffer->rx_skb; 5254 qethbuffer->rx_skb = NULL; 5255 } else { 5256 unsigned int linear = (use_rx_sg) ? QETH_RX_PULL_LEN : skb_len; 5257 5258 skb = dev_alloc_skb(linear + headroom); 5259 } 5260 if (!skb) 5261 goto no_mem; 5262 if (headroom) 5263 skb_reserve(skb, headroom); 5264 5265 data_ptr = element->addr + offset; 5266 while (skb_len) { 5267 data_len = min(skb_len, (int)(element->length - offset)); 5268 if (data_len) { 5269 if (use_rx_sg) 5270 qeth_create_skb_frag(element, skb, offset, 5271 data_len); 5272 else 5273 skb_put_data(skb, data_ptr, data_len); 5274 } 5275 skb_len -= data_len; 5276 if (skb_len) { 5277 if (qeth_is_last_sbale(element)) { 5278 QETH_CARD_TEXT(card, 4, "unexeob"); 5279 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5280 dev_kfree_skb_any(skb); 5281 card->stats.rx_errors++; 5282 return NULL; 5283 } 5284 element++; 5285 offset = 0; 5286 data_ptr = element->addr; 5287 } else { 5288 offset += data_len; 5289 } 5290 } 5291 *__element = element; 5292 *__offset = offset; 5293 if (use_rx_sg && card->options.performance_stats) { 5294 card->perf_stats.sg_skbs_rx++; 5295 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5296 } 5297 return skb; 5298 no_mem: 5299 if (net_ratelimit()) { 5300 QETH_CARD_TEXT(card, 2, "noskbmem"); 5301 } 5302 card->stats.rx_dropped++; 5303 return NULL; 5304 } 5305 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5306 5307 int qeth_poll(struct napi_struct *napi, int budget) 5308 { 5309 struct qeth_card *card = container_of(napi, struct qeth_card, napi); 5310 int work_done = 0; 5311 struct qeth_qdio_buffer *buffer; 5312 int done; 5313 int new_budget = budget; 5314 5315 if (card->options.performance_stats) { 5316 card->perf_stats.inbound_cnt++; 5317 card->perf_stats.inbound_start_time = qeth_get_micros(); 5318 } 5319 5320 while (1) { 5321 if (!card->rx.b_count) { 5322 card->rx.qdio_err = 0; 5323 card->rx.b_count = qdio_get_next_buffers( 5324 card->data.ccwdev, 0, &card->rx.b_index, 5325 &card->rx.qdio_err); 5326 if (card->rx.b_count <= 0) { 5327 card->rx.b_count = 0; 5328 break; 5329 } 5330 card->rx.b_element = 5331 &card->qdio.in_q->bufs[card->rx.b_index] 5332 .buffer->element[0]; 5333 card->rx.e_offset = 0; 5334 } 5335 5336 while (card->rx.b_count) { 5337 buffer = &card->qdio.in_q->bufs[card->rx.b_index]; 5338 if (!(card->rx.qdio_err && 5339 qeth_check_qdio_errors(card, buffer->buffer, 5340 card->rx.qdio_err, "qinerr"))) 5341 work_done += 5342 card->discipline->process_rx_buffer( 5343 card, new_budget, &done); 5344 else 5345 done = 1; 5346 5347 if (done) { 5348 if (card->options.performance_stats) 5349 card->perf_stats.bufs_rec++; 5350 qeth_put_buffer_pool_entry(card, 5351 buffer->pool_entry); 5352 qeth_queue_input_buffer(card, card->rx.b_index); 5353 card->rx.b_count--; 5354 if (card->rx.b_count) { 5355 card->rx.b_index = 5356 (card->rx.b_index + 1) % 5357 QDIO_MAX_BUFFERS_PER_Q; 5358 card->rx.b_element = 5359 &card->qdio.in_q 5360 ->bufs[card->rx.b_index] 5361 .buffer->element[0]; 5362 card->rx.e_offset = 0; 5363 } 5364 } 5365 5366 if (work_done >= budget) 5367 goto out; 5368 else 5369 new_budget = budget - work_done; 5370 } 5371 } 5372 5373 napi_complete_done(napi, work_done); 5374 if (qdio_start_irq(card->data.ccwdev, 0)) 5375 napi_schedule(&card->napi); 5376 out: 5377 if (card->options.performance_stats) 5378 card->perf_stats.inbound_time += qeth_get_micros() - 5379 card->perf_stats.inbound_start_time; 5380 return work_done; 5381 } 5382 EXPORT_SYMBOL_GPL(qeth_poll); 5383 5384 int qeth_setassparms_cb(struct qeth_card *card, 5385 struct qeth_reply *reply, unsigned long data) 5386 { 5387 struct qeth_ipa_cmd *cmd; 5388 5389 QETH_CARD_TEXT(card, 4, "defadpcb"); 5390 5391 cmd = (struct qeth_ipa_cmd *) data; 5392 if (cmd->hdr.return_code == 0) { 5393 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code; 5394 if (cmd->hdr.prot_version == QETH_PROT_IPV4) 5395 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 5396 if (cmd->hdr.prot_version == QETH_PROT_IPV6) 5397 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 5398 } 5399 return 0; 5400 } 5401 EXPORT_SYMBOL_GPL(qeth_setassparms_cb); 5402 5403 struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card, 5404 enum qeth_ipa_funcs ipa_func, 5405 __u16 cmd_code, __u16 len, 5406 enum qeth_prot_versions prot) 5407 { 5408 struct qeth_cmd_buffer *iob; 5409 struct qeth_ipa_cmd *cmd; 5410 5411 QETH_CARD_TEXT(card, 4, "getasscm"); 5412 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot); 5413 5414 if (iob) { 5415 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5416 cmd->data.setassparms.hdr.assist_no = ipa_func; 5417 cmd->data.setassparms.hdr.length = 8 + len; 5418 cmd->data.setassparms.hdr.command_code = cmd_code; 5419 cmd->data.setassparms.hdr.return_code = 0; 5420 cmd->data.setassparms.hdr.seq_no = 0; 5421 } 5422 5423 return iob; 5424 } 5425 EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd); 5426 5427 int qeth_send_setassparms(struct qeth_card *card, 5428 struct qeth_cmd_buffer *iob, __u16 len, long data, 5429 int (*reply_cb)(struct qeth_card *, 5430 struct qeth_reply *, unsigned long), 5431 void *reply_param) 5432 { 5433 int rc; 5434 struct qeth_ipa_cmd *cmd; 5435 5436 QETH_CARD_TEXT(card, 4, "sendassp"); 5437 5438 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5439 if (len <= sizeof(__u32)) 5440 cmd->data.setassparms.data.flags_32bit = (__u32) data; 5441 else /* (len > sizeof(__u32)) */ 5442 memcpy(&cmd->data.setassparms.data, (void *) data, len); 5443 5444 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param); 5445 return rc; 5446 } 5447 EXPORT_SYMBOL_GPL(qeth_send_setassparms); 5448 5449 int qeth_send_simple_setassparms(struct qeth_card *card, 5450 enum qeth_ipa_funcs ipa_func, 5451 __u16 cmd_code, long data) 5452 { 5453 int rc; 5454 int length = 0; 5455 struct qeth_cmd_buffer *iob; 5456 5457 QETH_CARD_TEXT(card, 4, "simassp4"); 5458 if (data) 5459 length = sizeof(__u32); 5460 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, 5461 length, QETH_PROT_IPV4); 5462 if (!iob) 5463 return -ENOMEM; 5464 rc = qeth_send_setassparms(card, iob, length, data, 5465 qeth_setassparms_cb, NULL); 5466 return rc; 5467 } 5468 EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms); 5469 5470 static void qeth_unregister_dbf_views(void) 5471 { 5472 int x; 5473 for (x = 0; x < QETH_DBF_INFOS; x++) { 5474 debug_unregister(qeth_dbf[x].id); 5475 qeth_dbf[x].id = NULL; 5476 } 5477 } 5478 5479 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5480 { 5481 char dbf_txt_buf[32]; 5482 va_list args; 5483 5484 if (!debug_level_enabled(id, level)) 5485 return; 5486 va_start(args, fmt); 5487 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5488 va_end(args); 5489 debug_text_event(id, level, dbf_txt_buf); 5490 } 5491 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5492 5493 static int qeth_register_dbf_views(void) 5494 { 5495 int ret; 5496 int x; 5497 5498 for (x = 0; x < QETH_DBF_INFOS; x++) { 5499 /* register the areas */ 5500 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5501 qeth_dbf[x].pages, 5502 qeth_dbf[x].areas, 5503 qeth_dbf[x].len); 5504 if (qeth_dbf[x].id == NULL) { 5505 qeth_unregister_dbf_views(); 5506 return -ENOMEM; 5507 } 5508 5509 /* register a view */ 5510 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5511 if (ret) { 5512 qeth_unregister_dbf_views(); 5513 return ret; 5514 } 5515 5516 /* set a passing level */ 5517 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5518 } 5519 5520 return 0; 5521 } 5522 5523 int qeth_core_load_discipline(struct qeth_card *card, 5524 enum qeth_discipline_id discipline) 5525 { 5526 int rc = 0; 5527 5528 mutex_lock(&qeth_mod_mutex); 5529 switch (discipline) { 5530 case QETH_DISCIPLINE_LAYER3: 5531 card->discipline = try_then_request_module( 5532 symbol_get(qeth_l3_discipline), "qeth_l3"); 5533 break; 5534 case QETH_DISCIPLINE_LAYER2: 5535 card->discipline = try_then_request_module( 5536 symbol_get(qeth_l2_discipline), "qeth_l2"); 5537 break; 5538 default: 5539 break; 5540 } 5541 5542 if (!card->discipline) { 5543 dev_err(&card->gdev->dev, "There is no kernel module to " 5544 "support discipline %d\n", discipline); 5545 rc = -EINVAL; 5546 } 5547 mutex_unlock(&qeth_mod_mutex); 5548 return rc; 5549 } 5550 5551 void qeth_core_free_discipline(struct qeth_card *card) 5552 { 5553 if (card->options.layer2) 5554 symbol_put(qeth_l2_discipline); 5555 else 5556 symbol_put(qeth_l3_discipline); 5557 card->discipline = NULL; 5558 } 5559 5560 const struct device_type qeth_generic_devtype = { 5561 .name = "qeth_generic", 5562 .groups = qeth_generic_attr_groups, 5563 }; 5564 EXPORT_SYMBOL_GPL(qeth_generic_devtype); 5565 5566 static const struct device_type qeth_osn_devtype = { 5567 .name = "qeth_osn", 5568 .groups = qeth_osn_attr_groups, 5569 }; 5570 5571 #define DBF_NAME_LEN 20 5572 5573 struct qeth_dbf_entry { 5574 char dbf_name[DBF_NAME_LEN]; 5575 debug_info_t *dbf_info; 5576 struct list_head dbf_list; 5577 }; 5578 5579 static LIST_HEAD(qeth_dbf_list); 5580 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5581 5582 static debug_info_t *qeth_get_dbf_entry(char *name) 5583 { 5584 struct qeth_dbf_entry *entry; 5585 debug_info_t *rc = NULL; 5586 5587 mutex_lock(&qeth_dbf_list_mutex); 5588 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5589 if (strcmp(entry->dbf_name, name) == 0) { 5590 rc = entry->dbf_info; 5591 break; 5592 } 5593 } 5594 mutex_unlock(&qeth_dbf_list_mutex); 5595 return rc; 5596 } 5597 5598 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5599 { 5600 struct qeth_dbf_entry *new_entry; 5601 5602 card->debug = debug_register(name, 2, 1, 8); 5603 if (!card->debug) { 5604 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5605 goto err; 5606 } 5607 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5608 goto err_dbg; 5609 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5610 if (!new_entry) 5611 goto err_dbg; 5612 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5613 new_entry->dbf_info = card->debug; 5614 mutex_lock(&qeth_dbf_list_mutex); 5615 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5616 mutex_unlock(&qeth_dbf_list_mutex); 5617 5618 return 0; 5619 5620 err_dbg: 5621 debug_unregister(card->debug); 5622 err: 5623 return -ENOMEM; 5624 } 5625 5626 static void qeth_clear_dbf_list(void) 5627 { 5628 struct qeth_dbf_entry *entry, *tmp; 5629 5630 mutex_lock(&qeth_dbf_list_mutex); 5631 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5632 list_del(&entry->dbf_list); 5633 debug_unregister(entry->dbf_info); 5634 kfree(entry); 5635 } 5636 mutex_unlock(&qeth_dbf_list_mutex); 5637 } 5638 5639 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5640 { 5641 struct qeth_card *card; 5642 struct device *dev; 5643 int rc; 5644 enum qeth_discipline_id enforced_disc; 5645 unsigned long flags; 5646 char dbf_name[DBF_NAME_LEN]; 5647 5648 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5649 5650 dev = &gdev->dev; 5651 if (!get_device(dev)) 5652 return -ENODEV; 5653 5654 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5655 5656 card = qeth_alloc_card(); 5657 if (!card) { 5658 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5659 rc = -ENOMEM; 5660 goto err_dev; 5661 } 5662 5663 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5664 dev_name(&gdev->dev)); 5665 card->debug = qeth_get_dbf_entry(dbf_name); 5666 if (!card->debug) { 5667 rc = qeth_add_dbf_entry(card, dbf_name); 5668 if (rc) 5669 goto err_card; 5670 } 5671 5672 card->read.ccwdev = gdev->cdev[0]; 5673 card->write.ccwdev = gdev->cdev[1]; 5674 card->data.ccwdev = gdev->cdev[2]; 5675 dev_set_drvdata(&gdev->dev, card); 5676 card->gdev = gdev; 5677 gdev->cdev[0]->handler = qeth_irq; 5678 gdev->cdev[1]->handler = qeth_irq; 5679 gdev->cdev[2]->handler = qeth_irq; 5680 5681 qeth_determine_card_type(card); 5682 rc = qeth_setup_card(card); 5683 if (rc) { 5684 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5685 goto err_card; 5686 } 5687 5688 qeth_determine_capabilities(card); 5689 enforced_disc = qeth_enforce_discipline(card); 5690 switch (enforced_disc) { 5691 case QETH_DISCIPLINE_UNDETERMINED: 5692 gdev->dev.type = &qeth_generic_devtype; 5693 break; 5694 default: 5695 card->info.layer_enforced = true; 5696 rc = qeth_core_load_discipline(card, enforced_disc); 5697 if (rc) 5698 goto err_card; 5699 5700 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN) 5701 ? card->discipline->devtype 5702 : &qeth_osn_devtype; 5703 rc = card->discipline->setup(card->gdev); 5704 if (rc) 5705 goto err_disc; 5706 break; 5707 } 5708 5709 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5710 list_add_tail(&card->list, &qeth_core_card_list.list); 5711 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5712 return 0; 5713 5714 err_disc: 5715 qeth_core_free_discipline(card); 5716 err_card: 5717 qeth_core_free_card(card); 5718 err_dev: 5719 put_device(dev); 5720 return rc; 5721 } 5722 5723 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5724 { 5725 unsigned long flags; 5726 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5727 5728 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5729 5730 if (card->discipline) { 5731 card->discipline->remove(gdev); 5732 qeth_core_free_discipline(card); 5733 } 5734 5735 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5736 list_del(&card->list); 5737 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5738 qeth_core_free_card(card); 5739 dev_set_drvdata(&gdev->dev, NULL); 5740 put_device(&gdev->dev); 5741 return; 5742 } 5743 5744 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5745 { 5746 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5747 int rc = 0; 5748 enum qeth_discipline_id def_discipline; 5749 5750 if (!card->discipline) { 5751 if (card->info.type == QETH_CARD_TYPE_IQD) 5752 def_discipline = QETH_DISCIPLINE_LAYER3; 5753 else 5754 def_discipline = QETH_DISCIPLINE_LAYER2; 5755 rc = qeth_core_load_discipline(card, def_discipline); 5756 if (rc) 5757 goto err; 5758 rc = card->discipline->setup(card->gdev); 5759 if (rc) { 5760 qeth_core_free_discipline(card); 5761 goto err; 5762 } 5763 } 5764 rc = card->discipline->set_online(gdev); 5765 err: 5766 return rc; 5767 } 5768 5769 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5770 { 5771 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5772 return card->discipline->set_offline(gdev); 5773 } 5774 5775 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5776 { 5777 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5778 qeth_set_allowed_threads(card, 0, 1); 5779 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap) 5780 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM); 5781 qeth_qdio_clear_card(card, 0); 5782 qeth_clear_qdio_buffers(card); 5783 qdio_free(CARD_DDEV(card)); 5784 } 5785 5786 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5787 { 5788 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5789 if (card->discipline && card->discipline->freeze) 5790 return card->discipline->freeze(gdev); 5791 return 0; 5792 } 5793 5794 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5795 { 5796 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5797 if (card->discipline && card->discipline->thaw) 5798 return card->discipline->thaw(gdev); 5799 return 0; 5800 } 5801 5802 static int qeth_core_restore(struct ccwgroup_device *gdev) 5803 { 5804 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5805 if (card->discipline && card->discipline->restore) 5806 return card->discipline->restore(gdev); 5807 return 0; 5808 } 5809 5810 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5811 .driver = { 5812 .owner = THIS_MODULE, 5813 .name = "qeth", 5814 }, 5815 .ccw_driver = &qeth_ccw_driver, 5816 .setup = qeth_core_probe_device, 5817 .remove = qeth_core_remove_device, 5818 .set_online = qeth_core_set_online, 5819 .set_offline = qeth_core_set_offline, 5820 .shutdown = qeth_core_shutdown, 5821 .prepare = NULL, 5822 .complete = NULL, 5823 .freeze = qeth_core_freeze, 5824 .thaw = qeth_core_thaw, 5825 .restore = qeth_core_restore, 5826 }; 5827 5828 static ssize_t group_store(struct device_driver *ddrv, const char *buf, 5829 size_t count) 5830 { 5831 int err; 5832 5833 err = ccwgroup_create_dev(qeth_core_root_dev, 5834 &qeth_core_ccwgroup_driver, 3, buf); 5835 5836 return err ? err : count; 5837 } 5838 static DRIVER_ATTR_WO(group); 5839 5840 static struct attribute *qeth_drv_attrs[] = { 5841 &driver_attr_group.attr, 5842 NULL, 5843 }; 5844 static struct attribute_group qeth_drv_attr_group = { 5845 .attrs = qeth_drv_attrs, 5846 }; 5847 static const struct attribute_group *qeth_drv_attr_groups[] = { 5848 &qeth_drv_attr_group, 5849 NULL, 5850 }; 5851 5852 int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 5853 { 5854 struct qeth_card *card = dev->ml_priv; 5855 struct mii_ioctl_data *mii_data; 5856 int rc = 0; 5857 5858 if (!card) 5859 return -ENODEV; 5860 5861 if (!qeth_card_hw_is_reachable(card)) 5862 return -ENODEV; 5863 5864 if (card->info.type == QETH_CARD_TYPE_OSN) 5865 return -EPERM; 5866 5867 switch (cmd) { 5868 case SIOC_QETH_ADP_SET_SNMP_CONTROL: 5869 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data); 5870 break; 5871 case SIOC_QETH_GET_CARD_TYPE: 5872 if ((card->info.type == QETH_CARD_TYPE_OSD || 5873 card->info.type == QETH_CARD_TYPE_OSM || 5874 card->info.type == QETH_CARD_TYPE_OSX) && 5875 !card->info.guestlan) 5876 return 1; 5877 else 5878 return 0; 5879 case SIOCGMIIPHY: 5880 mii_data = if_mii(rq); 5881 mii_data->phy_id = 0; 5882 break; 5883 case SIOCGMIIREG: 5884 mii_data = if_mii(rq); 5885 if (mii_data->phy_id != 0) 5886 rc = -EINVAL; 5887 else 5888 mii_data->val_out = qeth_mdio_read(dev, 5889 mii_data->phy_id, mii_data->reg_num); 5890 break; 5891 case SIOC_QETH_QUERY_OAT: 5892 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data); 5893 break; 5894 default: 5895 if (card->discipline->do_ioctl) 5896 rc = card->discipline->do_ioctl(dev, rq, cmd); 5897 else 5898 rc = -EOPNOTSUPP; 5899 } 5900 if (rc) 5901 QETH_CARD_TEXT_(card, 2, "ioce%x", rc); 5902 return rc; 5903 } 5904 EXPORT_SYMBOL_GPL(qeth_do_ioctl); 5905 5906 static struct { 5907 const char str[ETH_GSTRING_LEN]; 5908 } qeth_ethtool_stats_keys[] = { 5909 /* 0 */{"rx skbs"}, 5910 {"rx buffers"}, 5911 {"tx skbs"}, 5912 {"tx buffers"}, 5913 {"tx skbs no packing"}, 5914 {"tx buffers no packing"}, 5915 {"tx skbs packing"}, 5916 {"tx buffers packing"}, 5917 {"tx sg skbs"}, 5918 {"tx sg frags"}, 5919 /* 10 */{"rx sg skbs"}, 5920 {"rx sg frags"}, 5921 {"rx sg page allocs"}, 5922 {"tx large kbytes"}, 5923 {"tx large count"}, 5924 {"tx pk state ch n->p"}, 5925 {"tx pk state ch p->n"}, 5926 {"tx pk watermark low"}, 5927 {"tx pk watermark high"}, 5928 {"queue 0 buffer usage"}, 5929 /* 20 */{"queue 1 buffer usage"}, 5930 {"queue 2 buffer usage"}, 5931 {"queue 3 buffer usage"}, 5932 {"rx poll time"}, 5933 {"rx poll count"}, 5934 {"rx do_QDIO time"}, 5935 {"rx do_QDIO count"}, 5936 {"tx handler time"}, 5937 {"tx handler count"}, 5938 {"tx time"}, 5939 /* 30 */{"tx count"}, 5940 {"tx do_QDIO time"}, 5941 {"tx do_QDIO count"}, 5942 {"tx csum"}, 5943 {"tx lin"}, 5944 {"tx linfail"}, 5945 {"cq handler count"}, 5946 {"cq handler time"} 5947 }; 5948 5949 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5950 { 5951 switch (stringset) { 5952 case ETH_SS_STATS: 5953 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5954 default: 5955 return -EINVAL; 5956 } 5957 } 5958 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5959 5960 void qeth_core_get_ethtool_stats(struct net_device *dev, 5961 struct ethtool_stats *stats, u64 *data) 5962 { 5963 struct qeth_card *card = dev->ml_priv; 5964 data[0] = card->stats.rx_packets - 5965 card->perf_stats.initial_rx_packets; 5966 data[1] = card->perf_stats.bufs_rec; 5967 data[2] = card->stats.tx_packets - 5968 card->perf_stats.initial_tx_packets; 5969 data[3] = card->perf_stats.bufs_sent; 5970 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5971 - card->perf_stats.skbs_sent_pack; 5972 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5973 data[6] = card->perf_stats.skbs_sent_pack; 5974 data[7] = card->perf_stats.bufs_sent_pack; 5975 data[8] = card->perf_stats.sg_skbs_sent; 5976 data[9] = card->perf_stats.sg_frags_sent; 5977 data[10] = card->perf_stats.sg_skbs_rx; 5978 data[11] = card->perf_stats.sg_frags_rx; 5979 data[12] = card->perf_stats.sg_alloc_page_rx; 5980 data[13] = (card->perf_stats.large_send_bytes >> 10); 5981 data[14] = card->perf_stats.large_send_cnt; 5982 data[15] = card->perf_stats.sc_dp_p; 5983 data[16] = card->perf_stats.sc_p_dp; 5984 data[17] = QETH_LOW_WATERMARK_PACK; 5985 data[18] = QETH_HIGH_WATERMARK_PACK; 5986 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5987 data[20] = (card->qdio.no_out_queues > 1) ? 5988 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5989 data[21] = (card->qdio.no_out_queues > 2) ? 5990 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5991 data[22] = (card->qdio.no_out_queues > 3) ? 5992 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5993 data[23] = card->perf_stats.inbound_time; 5994 data[24] = card->perf_stats.inbound_cnt; 5995 data[25] = card->perf_stats.inbound_do_qdio_time; 5996 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5997 data[27] = card->perf_stats.outbound_handler_time; 5998 data[28] = card->perf_stats.outbound_handler_cnt; 5999 data[29] = card->perf_stats.outbound_time; 6000 data[30] = card->perf_stats.outbound_cnt; 6001 data[31] = card->perf_stats.outbound_do_qdio_time; 6002 data[32] = card->perf_stats.outbound_do_qdio_cnt; 6003 data[33] = card->perf_stats.tx_csum; 6004 data[34] = card->perf_stats.tx_lin; 6005 data[35] = card->perf_stats.tx_linfail; 6006 data[36] = card->perf_stats.cq_cnt; 6007 data[37] = card->perf_stats.cq_time; 6008 } 6009 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 6010 6011 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 6012 { 6013 switch (stringset) { 6014 case ETH_SS_STATS: 6015 memcpy(data, &qeth_ethtool_stats_keys, 6016 sizeof(qeth_ethtool_stats_keys)); 6017 break; 6018 default: 6019 WARN_ON(1); 6020 break; 6021 } 6022 } 6023 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 6024 6025 void qeth_core_get_drvinfo(struct net_device *dev, 6026 struct ethtool_drvinfo *info) 6027 { 6028 struct qeth_card *card = dev->ml_priv; 6029 6030 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 6031 sizeof(info->driver)); 6032 strlcpy(info->version, "1.0", sizeof(info->version)); 6033 strlcpy(info->fw_version, card->info.mcl_level, 6034 sizeof(info->fw_version)); 6035 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 6036 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 6037 } 6038 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 6039 6040 /* Helper function to fill 'advertising' and 'supported' which are the same. */ 6041 /* Autoneg and full-duplex are supported and advertised unconditionally. */ 6042 /* Always advertise and support all speeds up to specified, and only one */ 6043 /* specified port type. */ 6044 static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd, 6045 int maxspeed, int porttype) 6046 { 6047 ethtool_link_ksettings_zero_link_mode(cmd, supported); 6048 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 6049 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 6050 6051 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 6052 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 6053 6054 switch (porttype) { 6055 case PORT_TP: 6056 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 6057 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 6058 break; 6059 case PORT_FIBRE: 6060 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 6061 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 6062 break; 6063 default: 6064 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 6065 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 6066 WARN_ON_ONCE(1); 6067 } 6068 6069 /* fallthrough from high to low, to select all legal speeds: */ 6070 switch (maxspeed) { 6071 case SPEED_10000: 6072 ethtool_link_ksettings_add_link_mode(cmd, supported, 6073 10000baseT_Full); 6074 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6075 10000baseT_Full); 6076 case SPEED_1000: 6077 ethtool_link_ksettings_add_link_mode(cmd, supported, 6078 1000baseT_Full); 6079 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6080 1000baseT_Full); 6081 ethtool_link_ksettings_add_link_mode(cmd, supported, 6082 1000baseT_Half); 6083 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6084 1000baseT_Half); 6085 case SPEED_100: 6086 ethtool_link_ksettings_add_link_mode(cmd, supported, 6087 100baseT_Full); 6088 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6089 100baseT_Full); 6090 ethtool_link_ksettings_add_link_mode(cmd, supported, 6091 100baseT_Half); 6092 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6093 100baseT_Half); 6094 case SPEED_10: 6095 ethtool_link_ksettings_add_link_mode(cmd, supported, 6096 10baseT_Full); 6097 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6098 10baseT_Full); 6099 ethtool_link_ksettings_add_link_mode(cmd, supported, 6100 10baseT_Half); 6101 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6102 10baseT_Half); 6103 /* end fallthrough */ 6104 break; 6105 default: 6106 ethtool_link_ksettings_add_link_mode(cmd, supported, 6107 10baseT_Full); 6108 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6109 10baseT_Full); 6110 ethtool_link_ksettings_add_link_mode(cmd, supported, 6111 10baseT_Half); 6112 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6113 10baseT_Half); 6114 WARN_ON_ONCE(1); 6115 } 6116 } 6117 6118 int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev, 6119 struct ethtool_link_ksettings *cmd) 6120 { 6121 struct qeth_card *card = netdev->ml_priv; 6122 enum qeth_link_types link_type; 6123 struct carrier_info carrier_info; 6124 int rc; 6125 6126 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 6127 link_type = QETH_LINK_TYPE_10GBIT_ETH; 6128 else 6129 link_type = card->info.link_type; 6130 6131 cmd->base.duplex = DUPLEX_FULL; 6132 cmd->base.autoneg = AUTONEG_ENABLE; 6133 cmd->base.phy_address = 0; 6134 cmd->base.mdio_support = 0; 6135 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID; 6136 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID; 6137 6138 switch (link_type) { 6139 case QETH_LINK_TYPE_FAST_ETH: 6140 case QETH_LINK_TYPE_LANE_ETH100: 6141 cmd->base.speed = SPEED_100; 6142 cmd->base.port = PORT_TP; 6143 break; 6144 case QETH_LINK_TYPE_GBIT_ETH: 6145 case QETH_LINK_TYPE_LANE_ETH1000: 6146 cmd->base.speed = SPEED_1000; 6147 cmd->base.port = PORT_FIBRE; 6148 break; 6149 case QETH_LINK_TYPE_10GBIT_ETH: 6150 cmd->base.speed = SPEED_10000; 6151 cmd->base.port = PORT_FIBRE; 6152 break; 6153 default: 6154 cmd->base.speed = SPEED_10; 6155 cmd->base.port = PORT_TP; 6156 } 6157 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port); 6158 6159 /* Check if we can obtain more accurate information. */ 6160 /* If QUERY_CARD_INFO command is not supported or fails, */ 6161 /* just return the heuristics that was filled above. */ 6162 if (!qeth_card_hw_is_reachable(card)) 6163 return -ENODEV; 6164 rc = qeth_query_card_info(card, &carrier_info); 6165 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */ 6166 return 0; 6167 if (rc) /* report error from the hardware operation */ 6168 return rc; 6169 /* on success, fill in the information got from the hardware */ 6170 6171 netdev_dbg(netdev, 6172 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 6173 carrier_info.card_type, 6174 carrier_info.port_mode, 6175 carrier_info.port_speed); 6176 6177 /* Update attributes for which we've obtained more authoritative */ 6178 /* information, leave the rest the way they where filled above. */ 6179 switch (carrier_info.card_type) { 6180 case CARD_INFO_TYPE_1G_COPPER_A: 6181 case CARD_INFO_TYPE_1G_COPPER_B: 6182 cmd->base.port = PORT_TP; 6183 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port); 6184 break; 6185 case CARD_INFO_TYPE_1G_FIBRE_A: 6186 case CARD_INFO_TYPE_1G_FIBRE_B: 6187 cmd->base.port = PORT_FIBRE; 6188 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port); 6189 break; 6190 case CARD_INFO_TYPE_10G_FIBRE_A: 6191 case CARD_INFO_TYPE_10G_FIBRE_B: 6192 cmd->base.port = PORT_FIBRE; 6193 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port); 6194 break; 6195 } 6196 6197 switch (carrier_info.port_mode) { 6198 case CARD_INFO_PORTM_FULLDUPLEX: 6199 cmd->base.duplex = DUPLEX_FULL; 6200 break; 6201 case CARD_INFO_PORTM_HALFDUPLEX: 6202 cmd->base.duplex = DUPLEX_HALF; 6203 break; 6204 } 6205 6206 switch (carrier_info.port_speed) { 6207 case CARD_INFO_PORTS_10M: 6208 cmd->base.speed = SPEED_10; 6209 break; 6210 case CARD_INFO_PORTS_100M: 6211 cmd->base.speed = SPEED_100; 6212 break; 6213 case CARD_INFO_PORTS_1G: 6214 cmd->base.speed = SPEED_1000; 6215 break; 6216 case CARD_INFO_PORTS_10G: 6217 cmd->base.speed = SPEED_10000; 6218 break; 6219 } 6220 6221 return 0; 6222 } 6223 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings); 6224 6225 /* Callback to handle checksum offload command reply from OSA card. 6226 * Verify that required features have been enabled on the card. 6227 * Return error in hdr->return_code as this value is checked by caller. 6228 * 6229 * Always returns zero to indicate no further messages from the OSA card. 6230 */ 6231 static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card, 6232 struct qeth_reply *reply, 6233 unsigned long data) 6234 { 6235 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data; 6236 struct qeth_checksum_cmd *chksum_cb = 6237 (struct qeth_checksum_cmd *)reply->param; 6238 6239 QETH_CARD_TEXT(card, 4, "chkdoccb"); 6240 if (cmd->hdr.return_code) 6241 return 0; 6242 6243 memset(chksum_cb, 0, sizeof(*chksum_cb)); 6244 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) { 6245 chksum_cb->supported = 6246 cmd->data.setassparms.data.chksum.supported; 6247 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported); 6248 } 6249 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) { 6250 chksum_cb->supported = 6251 cmd->data.setassparms.data.chksum.supported; 6252 chksum_cb->enabled = 6253 cmd->data.setassparms.data.chksum.enabled; 6254 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported); 6255 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled); 6256 } 6257 return 0; 6258 } 6259 6260 /* Send command to OSA card and check results. */ 6261 static int qeth_ipa_checksum_run_cmd(struct qeth_card *card, 6262 enum qeth_ipa_funcs ipa_func, 6263 __u16 cmd_code, long data, 6264 struct qeth_checksum_cmd *chksum_cb) 6265 { 6266 struct qeth_cmd_buffer *iob; 6267 int rc = -ENOMEM; 6268 6269 QETH_CARD_TEXT(card, 4, "chkdocmd"); 6270 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, 6271 sizeof(__u32), QETH_PROT_IPV4); 6272 if (iob) 6273 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data, 6274 qeth_ipa_checksum_run_cmd_cb, 6275 chksum_cb); 6276 return rc; 6277 } 6278 6279 static int qeth_send_checksum_on(struct qeth_card *card, int cstype) 6280 { 6281 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR | 6282 QETH_IPA_CHECKSUM_UDP | 6283 QETH_IPA_CHECKSUM_TCP; 6284 struct qeth_checksum_cmd chksum_cb; 6285 int rc; 6286 6287 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0, 6288 &chksum_cb); 6289 if (!rc) { 6290 if ((required_features & chksum_cb.supported) != 6291 required_features) 6292 rc = -EIO; 6293 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) && 6294 cstype == IPA_INBOUND_CHECKSUM) 6295 dev_warn(&card->gdev->dev, 6296 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n", 6297 QETH_CARD_IFNAME(card)); 6298 } 6299 if (rc) { 6300 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0); 6301 dev_warn(&card->gdev->dev, 6302 "Starting HW checksumming for %s failed, using SW checksumming\n", 6303 QETH_CARD_IFNAME(card)); 6304 return rc; 6305 } 6306 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE, 6307 chksum_cb.supported, &chksum_cb); 6308 if (!rc) { 6309 if ((required_features & chksum_cb.enabled) != 6310 required_features) 6311 rc = -EIO; 6312 } 6313 if (rc) { 6314 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0); 6315 dev_warn(&card->gdev->dev, 6316 "Enabling HW checksumming for %s failed, using SW checksumming\n", 6317 QETH_CARD_IFNAME(card)); 6318 return rc; 6319 } 6320 6321 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n", 6322 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out"); 6323 return 0; 6324 } 6325 6326 static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype) 6327 { 6328 int rc = (on) ? qeth_send_checksum_on(card, cstype) 6329 : qeth_send_simple_setassparms(card, cstype, 6330 IPA_CMD_ASS_STOP, 0); 6331 return rc ? -EIO : 0; 6332 } 6333 6334 static int qeth_set_ipa_tso(struct qeth_card *card, int on) 6335 { 6336 int rc; 6337 6338 QETH_CARD_TEXT(card, 3, "sttso"); 6339 6340 if (on) { 6341 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO, 6342 IPA_CMD_ASS_START, 0); 6343 if (rc) { 6344 dev_warn(&card->gdev->dev, 6345 "Starting outbound TCP segmentation offload for %s failed\n", 6346 QETH_CARD_IFNAME(card)); 6347 return -EIO; 6348 } 6349 dev_info(&card->gdev->dev, "Outbound TSO enabled\n"); 6350 } else { 6351 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO, 6352 IPA_CMD_ASS_STOP, 0); 6353 } 6354 return rc; 6355 } 6356 6357 #define QETH_HW_FEATURES (NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_TSO) 6358 6359 /** 6360 * qeth_recover_features() - Restore device features after recovery 6361 * @dev: the recovering net_device 6362 * 6363 * Caller must hold rtnl lock. 6364 */ 6365 void qeth_recover_features(struct net_device *dev) 6366 { 6367 netdev_features_t features = dev->features; 6368 struct qeth_card *card = dev->ml_priv; 6369 6370 /* force-off any feature that needs an IPA sequence. 6371 * netdev_update_features() will restart them. 6372 */ 6373 dev->features &= ~QETH_HW_FEATURES; 6374 netdev_update_features(dev); 6375 6376 if (features == dev->features) 6377 return; 6378 dev_warn(&card->gdev->dev, 6379 "Device recovery failed to restore all offload features\n"); 6380 } 6381 EXPORT_SYMBOL_GPL(qeth_recover_features); 6382 6383 int qeth_set_features(struct net_device *dev, netdev_features_t features) 6384 { 6385 struct qeth_card *card = dev->ml_priv; 6386 netdev_features_t changed = dev->features ^ features; 6387 int rc = 0; 6388 6389 QETH_DBF_TEXT(SETUP, 2, "setfeat"); 6390 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features)); 6391 6392 if ((changed & NETIF_F_IP_CSUM)) { 6393 rc = qeth_set_ipa_csum(card, 6394 features & NETIF_F_IP_CSUM ? 1 : 0, 6395 IPA_OUTBOUND_CHECKSUM); 6396 if (rc) 6397 changed ^= NETIF_F_IP_CSUM; 6398 } 6399 if ((changed & NETIF_F_RXCSUM)) { 6400 rc = qeth_set_ipa_csum(card, 6401 features & NETIF_F_RXCSUM ? 1 : 0, 6402 IPA_INBOUND_CHECKSUM); 6403 if (rc) 6404 changed ^= NETIF_F_RXCSUM; 6405 } 6406 if ((changed & NETIF_F_TSO)) { 6407 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0); 6408 if (rc) 6409 changed ^= NETIF_F_TSO; 6410 } 6411 6412 /* everything changed successfully? */ 6413 if ((dev->features ^ features) == changed) 6414 return 0; 6415 /* something went wrong. save changed features and return error */ 6416 dev->features ^= changed; 6417 return -EIO; 6418 } 6419 EXPORT_SYMBOL_GPL(qeth_set_features); 6420 6421 netdev_features_t qeth_fix_features(struct net_device *dev, 6422 netdev_features_t features) 6423 { 6424 struct qeth_card *card = dev->ml_priv; 6425 6426 QETH_DBF_TEXT(SETUP, 2, "fixfeat"); 6427 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM)) 6428 features &= ~NETIF_F_IP_CSUM; 6429 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM)) 6430 features &= ~NETIF_F_RXCSUM; 6431 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) 6432 features &= ~NETIF_F_TSO; 6433 /* if the card isn't up, remove features that require hw changes */ 6434 if (card->state == CARD_STATE_DOWN || 6435 card->state == CARD_STATE_RECOVER) 6436 features &= ~QETH_HW_FEATURES; 6437 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features)); 6438 return features; 6439 } 6440 EXPORT_SYMBOL_GPL(qeth_fix_features); 6441 6442 static int __init qeth_core_init(void) 6443 { 6444 int rc; 6445 6446 pr_info("loading core functions\n"); 6447 INIT_LIST_HEAD(&qeth_core_card_list.list); 6448 INIT_LIST_HEAD(&qeth_dbf_list); 6449 rwlock_init(&qeth_core_card_list.rwlock); 6450 mutex_init(&qeth_mod_mutex); 6451 6452 qeth_wq = create_singlethread_workqueue("qeth_wq"); 6453 6454 rc = qeth_register_dbf_views(); 6455 if (rc) 6456 goto out_err; 6457 qeth_core_root_dev = root_device_register("qeth"); 6458 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev); 6459 if (rc) 6460 goto register_err; 6461 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 6462 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 6463 if (!qeth_core_header_cache) { 6464 rc = -ENOMEM; 6465 goto slab_err; 6466 } 6467 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 6468 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 6469 if (!qeth_qdio_outbuf_cache) { 6470 rc = -ENOMEM; 6471 goto cqslab_err; 6472 } 6473 rc = ccw_driver_register(&qeth_ccw_driver); 6474 if (rc) 6475 goto ccw_err; 6476 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 6477 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 6478 if (rc) 6479 goto ccwgroup_err; 6480 6481 return 0; 6482 6483 ccwgroup_err: 6484 ccw_driver_unregister(&qeth_ccw_driver); 6485 ccw_err: 6486 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6487 cqslab_err: 6488 kmem_cache_destroy(qeth_core_header_cache); 6489 slab_err: 6490 root_device_unregister(qeth_core_root_dev); 6491 register_err: 6492 qeth_unregister_dbf_views(); 6493 out_err: 6494 pr_err("Initializing the qeth device driver failed\n"); 6495 return rc; 6496 } 6497 6498 static void __exit qeth_core_exit(void) 6499 { 6500 qeth_clear_dbf_list(); 6501 destroy_workqueue(qeth_wq); 6502 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 6503 ccw_driver_unregister(&qeth_ccw_driver); 6504 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6505 kmem_cache_destroy(qeth_core_header_cache); 6506 root_device_unregister(qeth_core_root_dev); 6507 qeth_unregister_dbf_views(); 6508 pr_info("core functions removed\n"); 6509 } 6510 6511 module_init(qeth_core_init); 6512 module_exit(qeth_core_exit); 6513 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 6514 MODULE_DESCRIPTION("qeth core functions"); 6515 MODULE_LICENSE("GPL"); 6516