1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/io.h> 26 #include <asm/sysinfo.h> 27 #include <asm/compat.h> 28 29 #include "qeth_core.h" 30 31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 33 /* N P A M L V H */ 34 [QETH_DBF_SETUP] = {"qeth_setup", 35 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_MSG] = {"qeth_msg", 37 8, 1, 128, 3, &debug_sprintf_view, NULL}, 38 [QETH_DBF_CTRL] = {"qeth_control", 39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 40 }; 41 EXPORT_SYMBOL_GPL(qeth_dbf); 42 43 struct qeth_card_list_struct qeth_core_card_list; 44 EXPORT_SYMBOL_GPL(qeth_core_card_list); 45 struct kmem_cache *qeth_core_header_cache; 46 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 47 static struct kmem_cache *qeth_qdio_outbuf_cache; 48 49 static struct device *qeth_core_root_dev; 50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 51 static struct lock_class_key qdio_out_skb_queue_key; 52 static struct mutex qeth_mod_mutex; 53 54 static void qeth_send_control_data_cb(struct qeth_channel *, 55 struct qeth_cmd_buffer *); 56 static int qeth_issue_next_read(struct qeth_card *); 57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 59 static void qeth_free_buffer_pool(struct qeth_card *); 60 static int qeth_qdio_establish(struct qeth_card *); 61 static void qeth_free_qdio_buffers(struct qeth_card *); 62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 63 struct qeth_qdio_out_buffer *buf, 64 enum iucv_tx_notify notification); 65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum qeth_qdio_buffer_states newbufstate); 69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 70 71 static struct workqueue_struct *qeth_wq; 72 73 static void qeth_close_dev_handler(struct work_struct *work) 74 { 75 struct qeth_card *card; 76 77 card = container_of(work, struct qeth_card, close_dev_work); 78 QETH_CARD_TEXT(card, 2, "cldevhdl"); 79 rtnl_lock(); 80 dev_close(card->dev); 81 rtnl_unlock(); 82 ccwgroup_set_offline(card->gdev); 83 } 84 85 void qeth_close_dev(struct qeth_card *card) 86 { 87 QETH_CARD_TEXT(card, 2, "cldevsubm"); 88 queue_work(qeth_wq, &card->close_dev_work); 89 } 90 EXPORT_SYMBOL_GPL(qeth_close_dev); 91 92 static inline const char *qeth_get_cardname(struct qeth_card *card) 93 { 94 if (card->info.guestlan) { 95 switch (card->info.type) { 96 case QETH_CARD_TYPE_OSD: 97 return " Virtual NIC QDIO"; 98 case QETH_CARD_TYPE_IQD: 99 return " Virtual NIC Hiper"; 100 case QETH_CARD_TYPE_OSM: 101 return " Virtual NIC QDIO - OSM"; 102 case QETH_CARD_TYPE_OSX: 103 return " Virtual NIC QDIO - OSX"; 104 default: 105 return " unknown"; 106 } 107 } else { 108 switch (card->info.type) { 109 case QETH_CARD_TYPE_OSD: 110 return " OSD Express"; 111 case QETH_CARD_TYPE_IQD: 112 return " HiperSockets"; 113 case QETH_CARD_TYPE_OSN: 114 return " OSN QDIO"; 115 case QETH_CARD_TYPE_OSM: 116 return " OSM QDIO"; 117 case QETH_CARD_TYPE_OSX: 118 return " OSX QDIO"; 119 default: 120 return " unknown"; 121 } 122 } 123 return " n/a"; 124 } 125 126 /* max length to be returned: 14 */ 127 const char *qeth_get_cardname_short(struct qeth_card *card) 128 { 129 if (card->info.guestlan) { 130 switch (card->info.type) { 131 case QETH_CARD_TYPE_OSD: 132 return "Virt.NIC QDIO"; 133 case QETH_CARD_TYPE_IQD: 134 return "Virt.NIC Hiper"; 135 case QETH_CARD_TYPE_OSM: 136 return "Virt.NIC OSM"; 137 case QETH_CARD_TYPE_OSX: 138 return "Virt.NIC OSX"; 139 default: 140 return "unknown"; 141 } 142 } else { 143 switch (card->info.type) { 144 case QETH_CARD_TYPE_OSD: 145 switch (card->info.link_type) { 146 case QETH_LINK_TYPE_FAST_ETH: 147 return "OSD_100"; 148 case QETH_LINK_TYPE_HSTR: 149 return "HSTR"; 150 case QETH_LINK_TYPE_GBIT_ETH: 151 return "OSD_1000"; 152 case QETH_LINK_TYPE_10GBIT_ETH: 153 return "OSD_10GIG"; 154 case QETH_LINK_TYPE_LANE_ETH100: 155 return "OSD_FE_LANE"; 156 case QETH_LINK_TYPE_LANE_TR: 157 return "OSD_TR_LANE"; 158 case QETH_LINK_TYPE_LANE_ETH1000: 159 return "OSD_GbE_LANE"; 160 case QETH_LINK_TYPE_LANE: 161 return "OSD_ATM_LANE"; 162 default: 163 return "OSD_Express"; 164 } 165 case QETH_CARD_TYPE_IQD: 166 return "HiperSockets"; 167 case QETH_CARD_TYPE_OSN: 168 return "OSN"; 169 case QETH_CARD_TYPE_OSM: 170 return "OSM_1000"; 171 case QETH_CARD_TYPE_OSX: 172 return "OSX_10GIG"; 173 default: 174 return "unknown"; 175 } 176 } 177 return "n/a"; 178 } 179 180 void qeth_set_recovery_task(struct qeth_card *card) 181 { 182 card->recovery_task = current; 183 } 184 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 185 186 void qeth_clear_recovery_task(struct qeth_card *card) 187 { 188 card->recovery_task = NULL; 189 } 190 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 191 192 static bool qeth_is_recovery_task(const struct qeth_card *card) 193 { 194 return card->recovery_task == current; 195 } 196 197 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 198 int clear_start_mask) 199 { 200 unsigned long flags; 201 202 spin_lock_irqsave(&card->thread_mask_lock, flags); 203 card->thread_allowed_mask = threads; 204 if (clear_start_mask) 205 card->thread_start_mask &= threads; 206 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 207 wake_up(&card->wait_q); 208 } 209 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 210 211 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 212 { 213 unsigned long flags; 214 int rc = 0; 215 216 spin_lock_irqsave(&card->thread_mask_lock, flags); 217 rc = (card->thread_running_mask & threads); 218 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 219 return rc; 220 } 221 EXPORT_SYMBOL_GPL(qeth_threads_running); 222 223 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 224 { 225 if (qeth_is_recovery_task(card)) 226 return 0; 227 return wait_event_interruptible(card->wait_q, 228 qeth_threads_running(card, threads) == 0); 229 } 230 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 231 232 void qeth_clear_working_pool_list(struct qeth_card *card) 233 { 234 struct qeth_buffer_pool_entry *pool_entry, *tmp; 235 236 QETH_CARD_TEXT(card, 5, "clwrklst"); 237 list_for_each_entry_safe(pool_entry, tmp, 238 &card->qdio.in_buf_pool.entry_list, list){ 239 list_del(&pool_entry->list); 240 } 241 } 242 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 243 244 static int qeth_alloc_buffer_pool(struct qeth_card *card) 245 { 246 struct qeth_buffer_pool_entry *pool_entry; 247 void *ptr; 248 int i, j; 249 250 QETH_CARD_TEXT(card, 5, "alocpool"); 251 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 252 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 253 if (!pool_entry) { 254 qeth_free_buffer_pool(card); 255 return -ENOMEM; 256 } 257 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 258 ptr = (void *) __get_free_page(GFP_KERNEL); 259 if (!ptr) { 260 while (j > 0) 261 free_page((unsigned long) 262 pool_entry->elements[--j]); 263 kfree(pool_entry); 264 qeth_free_buffer_pool(card); 265 return -ENOMEM; 266 } 267 pool_entry->elements[j] = ptr; 268 } 269 list_add(&pool_entry->init_list, 270 &card->qdio.init_pool.entry_list); 271 } 272 return 0; 273 } 274 275 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 276 { 277 QETH_CARD_TEXT(card, 2, "realcbp"); 278 279 if ((card->state != CARD_STATE_DOWN) && 280 (card->state != CARD_STATE_RECOVER)) 281 return -EPERM; 282 283 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 284 qeth_clear_working_pool_list(card); 285 qeth_free_buffer_pool(card); 286 card->qdio.in_buf_pool.buf_count = bufcnt; 287 card->qdio.init_pool.buf_count = bufcnt; 288 return qeth_alloc_buffer_pool(card); 289 } 290 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 291 292 static inline int qeth_cq_init(struct qeth_card *card) 293 { 294 int rc; 295 296 if (card->options.cq == QETH_CQ_ENABLED) { 297 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 298 memset(card->qdio.c_q->qdio_bufs, 0, 299 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 300 card->qdio.c_q->next_buf_to_init = 127; 301 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 302 card->qdio.no_in_queues - 1, 0, 303 127); 304 if (rc) { 305 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 306 goto out; 307 } 308 } 309 rc = 0; 310 out: 311 return rc; 312 } 313 314 static inline int qeth_alloc_cq(struct qeth_card *card) 315 { 316 int rc; 317 318 if (card->options.cq == QETH_CQ_ENABLED) { 319 int i; 320 struct qdio_outbuf_state *outbuf_states; 321 322 QETH_DBF_TEXT(SETUP, 2, "cqon"); 323 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 324 GFP_KERNEL); 325 if (!card->qdio.c_q) { 326 rc = -1; 327 goto kmsg_out; 328 } 329 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 330 331 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 332 card->qdio.c_q->bufs[i].buffer = 333 &card->qdio.c_q->qdio_bufs[i]; 334 } 335 336 card->qdio.no_in_queues = 2; 337 338 card->qdio.out_bufstates = 339 kzalloc(card->qdio.no_out_queues * 340 QDIO_MAX_BUFFERS_PER_Q * 341 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 342 outbuf_states = card->qdio.out_bufstates; 343 if (outbuf_states == NULL) { 344 rc = -1; 345 goto free_cq_out; 346 } 347 for (i = 0; i < card->qdio.no_out_queues; ++i) { 348 card->qdio.out_qs[i]->bufstates = outbuf_states; 349 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 350 } 351 } else { 352 QETH_DBF_TEXT(SETUP, 2, "nocq"); 353 card->qdio.c_q = NULL; 354 card->qdio.no_in_queues = 1; 355 } 356 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 357 rc = 0; 358 out: 359 return rc; 360 free_cq_out: 361 kfree(card->qdio.c_q); 362 card->qdio.c_q = NULL; 363 kmsg_out: 364 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 365 goto out; 366 } 367 368 static inline void qeth_free_cq(struct qeth_card *card) 369 { 370 if (card->qdio.c_q) { 371 --card->qdio.no_in_queues; 372 kfree(card->qdio.c_q); 373 card->qdio.c_q = NULL; 374 } 375 kfree(card->qdio.out_bufstates); 376 card->qdio.out_bufstates = NULL; 377 } 378 379 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 380 int delayed) { 381 enum iucv_tx_notify n; 382 383 switch (sbalf15) { 384 case 0: 385 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 386 break; 387 case 4: 388 case 16: 389 case 17: 390 case 18: 391 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 392 TX_NOTIFY_UNREACHABLE; 393 break; 394 default: 395 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 396 TX_NOTIFY_GENERALERROR; 397 break; 398 } 399 400 return n; 401 } 402 403 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 404 int bidx, int forced_cleanup) 405 { 406 if (q->card->options.cq != QETH_CQ_ENABLED) 407 return; 408 409 if (q->bufs[bidx]->next_pending != NULL) { 410 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 411 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 412 413 while (c) { 414 if (forced_cleanup || 415 atomic_read(&c->state) == 416 QETH_QDIO_BUF_HANDLED_DELAYED) { 417 struct qeth_qdio_out_buffer *f = c; 418 QETH_CARD_TEXT(f->q->card, 5, "fp"); 419 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 420 /* release here to avoid interleaving between 421 outbound tasklet and inbound tasklet 422 regarding notifications and lifecycle */ 423 qeth_release_skbs(c); 424 425 c = f->next_pending; 426 WARN_ON_ONCE(head->next_pending != f); 427 head->next_pending = c; 428 kmem_cache_free(qeth_qdio_outbuf_cache, f); 429 } else { 430 head = c; 431 c = c->next_pending; 432 } 433 434 } 435 } 436 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 437 QETH_QDIO_BUF_HANDLED_DELAYED)) { 438 /* for recovery situations */ 439 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 440 qeth_init_qdio_out_buf(q, bidx); 441 QETH_CARD_TEXT(q->card, 2, "clprecov"); 442 } 443 } 444 445 446 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 447 unsigned long phys_aob_addr) { 448 struct qaob *aob; 449 struct qeth_qdio_out_buffer *buffer; 450 enum iucv_tx_notify notification; 451 452 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 453 QETH_CARD_TEXT(card, 5, "haob"); 454 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 455 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 456 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 457 458 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 459 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 460 notification = TX_NOTIFY_OK; 461 } else { 462 WARN_ON_ONCE(atomic_read(&buffer->state) != 463 QETH_QDIO_BUF_PENDING); 464 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 465 notification = TX_NOTIFY_DELAYED_OK; 466 } 467 468 if (aob->aorc != 0) { 469 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 470 notification = qeth_compute_cq_notification(aob->aorc, 1); 471 } 472 qeth_notify_skbs(buffer->q, buffer, notification); 473 474 buffer->aob = NULL; 475 qeth_clear_output_buffer(buffer->q, buffer, 476 QETH_QDIO_BUF_HANDLED_DELAYED); 477 478 /* from here on: do not touch buffer anymore */ 479 qdio_release_aob(aob); 480 } 481 482 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 483 { 484 return card->options.cq == QETH_CQ_ENABLED && 485 card->qdio.c_q != NULL && 486 queue != 0 && 487 queue == card->qdio.no_in_queues - 1; 488 } 489 490 491 static int qeth_issue_next_read(struct qeth_card *card) 492 { 493 int rc; 494 struct qeth_cmd_buffer *iob; 495 496 QETH_CARD_TEXT(card, 5, "issnxrd"); 497 if (card->read.state != CH_STATE_UP) 498 return -EIO; 499 iob = qeth_get_buffer(&card->read); 500 if (!iob) { 501 dev_warn(&card->gdev->dev, "The qeth device driver " 502 "failed to recover an error on the device\n"); 503 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 504 "available\n", dev_name(&card->gdev->dev)); 505 return -ENOMEM; 506 } 507 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 508 QETH_CARD_TEXT(card, 6, "noirqpnd"); 509 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 510 (addr_t) iob, 0, 0); 511 if (rc) { 512 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 513 "rc=%i\n", dev_name(&card->gdev->dev), rc); 514 atomic_set(&card->read.irq_pending, 0); 515 card->read_or_write_problem = 1; 516 qeth_schedule_recovery(card); 517 wake_up(&card->wait_q); 518 } 519 return rc; 520 } 521 522 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 523 { 524 struct qeth_reply *reply; 525 526 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 527 if (reply) { 528 atomic_set(&reply->refcnt, 1); 529 atomic_set(&reply->received, 0); 530 reply->card = card; 531 } 532 return reply; 533 } 534 535 static void qeth_get_reply(struct qeth_reply *reply) 536 { 537 WARN_ON(atomic_read(&reply->refcnt) <= 0); 538 atomic_inc(&reply->refcnt); 539 } 540 541 static void qeth_put_reply(struct qeth_reply *reply) 542 { 543 WARN_ON(atomic_read(&reply->refcnt) <= 0); 544 if (atomic_dec_and_test(&reply->refcnt)) 545 kfree(reply); 546 } 547 548 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 549 struct qeth_card *card) 550 { 551 char *ipa_name; 552 int com = cmd->hdr.command; 553 ipa_name = qeth_get_ipa_cmd_name(com); 554 if (rc) 555 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 556 "x%X \"%s\"\n", 557 ipa_name, com, dev_name(&card->gdev->dev), 558 QETH_CARD_IFNAME(card), rc, 559 qeth_get_ipa_msg(rc)); 560 else 561 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 562 ipa_name, com, dev_name(&card->gdev->dev), 563 QETH_CARD_IFNAME(card)); 564 } 565 566 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 567 struct qeth_cmd_buffer *iob) 568 { 569 struct qeth_ipa_cmd *cmd = NULL; 570 571 QETH_CARD_TEXT(card, 5, "chkipad"); 572 if (IS_IPA(iob->data)) { 573 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 574 if (IS_IPA_REPLY(cmd)) { 575 if (cmd->hdr.command != IPA_CMD_SETCCID && 576 cmd->hdr.command != IPA_CMD_DELCCID && 577 cmd->hdr.command != IPA_CMD_MODCCID && 578 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 579 qeth_issue_ipa_msg(cmd, 580 cmd->hdr.return_code, card); 581 return cmd; 582 } else { 583 switch (cmd->hdr.command) { 584 case IPA_CMD_STOPLAN: 585 if (cmd->hdr.return_code == 586 IPA_RC_VEPA_TO_VEB_TRANSITION) { 587 dev_err(&card->gdev->dev, 588 "Interface %s is down because the " 589 "adjacent port is no longer in " 590 "reflective relay mode\n", 591 QETH_CARD_IFNAME(card)); 592 qeth_close_dev(card); 593 } else { 594 dev_warn(&card->gdev->dev, 595 "The link for interface %s on CHPID" 596 " 0x%X failed\n", 597 QETH_CARD_IFNAME(card), 598 card->info.chpid); 599 qeth_issue_ipa_msg(cmd, 600 cmd->hdr.return_code, card); 601 } 602 card->lan_online = 0; 603 if (card->dev && netif_carrier_ok(card->dev)) 604 netif_carrier_off(card->dev); 605 return NULL; 606 case IPA_CMD_STARTLAN: 607 dev_info(&card->gdev->dev, 608 "The link for %s on CHPID 0x%X has" 609 " been restored\n", 610 QETH_CARD_IFNAME(card), 611 card->info.chpid); 612 netif_carrier_on(card->dev); 613 card->lan_online = 1; 614 if (card->info.hwtrap) 615 card->info.hwtrap = 2; 616 qeth_schedule_recovery(card); 617 return NULL; 618 case IPA_CMD_MODCCID: 619 return cmd; 620 case IPA_CMD_REGISTER_LOCAL_ADDR: 621 QETH_CARD_TEXT(card, 3, "irla"); 622 break; 623 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 624 QETH_CARD_TEXT(card, 3, "urla"); 625 break; 626 default: 627 QETH_DBF_MESSAGE(2, "Received data is IPA " 628 "but not a reply!\n"); 629 break; 630 } 631 } 632 } 633 return cmd; 634 } 635 636 void qeth_clear_ipacmd_list(struct qeth_card *card) 637 { 638 struct qeth_reply *reply, *r; 639 unsigned long flags; 640 641 QETH_CARD_TEXT(card, 4, "clipalst"); 642 643 spin_lock_irqsave(&card->lock, flags); 644 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 645 qeth_get_reply(reply); 646 reply->rc = -EIO; 647 atomic_inc(&reply->received); 648 list_del_init(&reply->list); 649 wake_up(&reply->wait_q); 650 qeth_put_reply(reply); 651 } 652 spin_unlock_irqrestore(&card->lock, flags); 653 atomic_set(&card->write.irq_pending, 0); 654 } 655 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 656 657 static int qeth_check_idx_response(struct qeth_card *card, 658 unsigned char *buffer) 659 { 660 if (!buffer) 661 return 0; 662 663 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 664 if ((buffer[2] & 0xc0) == 0xc0) { 665 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 666 "with cause code 0x%02x%s\n", 667 buffer[4], 668 ((buffer[4] == 0x22) ? 669 " -- try another portname" : "")); 670 QETH_CARD_TEXT(card, 2, "ckidxres"); 671 QETH_CARD_TEXT(card, 2, " idxterm"); 672 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 673 if (buffer[4] == 0xf6) { 674 dev_err(&card->gdev->dev, 675 "The qeth device is not configured " 676 "for the OSI layer required by z/VM\n"); 677 return -EPERM; 678 } 679 return -EIO; 680 } 681 return 0; 682 } 683 684 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 685 __u32 len) 686 { 687 struct qeth_card *card; 688 689 card = CARD_FROM_CDEV(channel->ccwdev); 690 QETH_CARD_TEXT(card, 4, "setupccw"); 691 if (channel == &card->read) 692 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 693 else 694 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 695 channel->ccw.count = len; 696 channel->ccw.cda = (__u32) __pa(iob); 697 } 698 699 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 700 { 701 __u8 index; 702 703 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 704 index = channel->io_buf_no; 705 do { 706 if (channel->iob[index].state == BUF_STATE_FREE) { 707 channel->iob[index].state = BUF_STATE_LOCKED; 708 channel->io_buf_no = (channel->io_buf_no + 1) % 709 QETH_CMD_BUFFER_NO; 710 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 711 return channel->iob + index; 712 } 713 index = (index + 1) % QETH_CMD_BUFFER_NO; 714 } while (index != channel->io_buf_no); 715 716 return NULL; 717 } 718 719 void qeth_release_buffer(struct qeth_channel *channel, 720 struct qeth_cmd_buffer *iob) 721 { 722 unsigned long flags; 723 724 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 725 spin_lock_irqsave(&channel->iob_lock, flags); 726 memset(iob->data, 0, QETH_BUFSIZE); 727 iob->state = BUF_STATE_FREE; 728 iob->callback = qeth_send_control_data_cb; 729 iob->rc = 0; 730 spin_unlock_irqrestore(&channel->iob_lock, flags); 731 wake_up(&channel->wait_q); 732 } 733 EXPORT_SYMBOL_GPL(qeth_release_buffer); 734 735 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 736 { 737 struct qeth_cmd_buffer *buffer = NULL; 738 unsigned long flags; 739 740 spin_lock_irqsave(&channel->iob_lock, flags); 741 buffer = __qeth_get_buffer(channel); 742 spin_unlock_irqrestore(&channel->iob_lock, flags); 743 return buffer; 744 } 745 746 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 747 { 748 struct qeth_cmd_buffer *buffer; 749 wait_event(channel->wait_q, 750 ((buffer = qeth_get_buffer(channel)) != NULL)); 751 return buffer; 752 } 753 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 754 755 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 756 { 757 int cnt; 758 759 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 760 qeth_release_buffer(channel, &channel->iob[cnt]); 761 channel->buf_no = 0; 762 channel->io_buf_no = 0; 763 } 764 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 765 766 static void qeth_send_control_data_cb(struct qeth_channel *channel, 767 struct qeth_cmd_buffer *iob) 768 { 769 struct qeth_card *card; 770 struct qeth_reply *reply, *r; 771 struct qeth_ipa_cmd *cmd; 772 unsigned long flags; 773 int keep_reply; 774 int rc = 0; 775 776 card = CARD_FROM_CDEV(channel->ccwdev); 777 QETH_CARD_TEXT(card, 4, "sndctlcb"); 778 rc = qeth_check_idx_response(card, iob->data); 779 switch (rc) { 780 case 0: 781 break; 782 case -EIO: 783 qeth_clear_ipacmd_list(card); 784 qeth_schedule_recovery(card); 785 /* fall through */ 786 default: 787 goto out; 788 } 789 790 cmd = qeth_check_ipa_data(card, iob); 791 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 792 goto out; 793 /*in case of OSN : check if cmd is set */ 794 if (card->info.type == QETH_CARD_TYPE_OSN && 795 cmd && 796 cmd->hdr.command != IPA_CMD_STARTLAN && 797 card->osn_info.assist_cb != NULL) { 798 card->osn_info.assist_cb(card->dev, cmd); 799 goto out; 800 } 801 802 spin_lock_irqsave(&card->lock, flags); 803 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 804 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 805 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 806 qeth_get_reply(reply); 807 list_del_init(&reply->list); 808 spin_unlock_irqrestore(&card->lock, flags); 809 keep_reply = 0; 810 if (reply->callback != NULL) { 811 if (cmd) { 812 reply->offset = (__u16)((char *)cmd - 813 (char *)iob->data); 814 keep_reply = reply->callback(card, 815 reply, 816 (unsigned long)cmd); 817 } else 818 keep_reply = reply->callback(card, 819 reply, 820 (unsigned long)iob); 821 } 822 if (cmd) 823 reply->rc = (u16) cmd->hdr.return_code; 824 else if (iob->rc) 825 reply->rc = iob->rc; 826 if (keep_reply) { 827 spin_lock_irqsave(&card->lock, flags); 828 list_add_tail(&reply->list, 829 &card->cmd_waiter_list); 830 spin_unlock_irqrestore(&card->lock, flags); 831 } else { 832 atomic_inc(&reply->received); 833 wake_up(&reply->wait_q); 834 } 835 qeth_put_reply(reply); 836 goto out; 837 } 838 } 839 spin_unlock_irqrestore(&card->lock, flags); 840 out: 841 memcpy(&card->seqno.pdu_hdr_ack, 842 QETH_PDU_HEADER_SEQ_NO(iob->data), 843 QETH_SEQ_NO_LENGTH); 844 qeth_release_buffer(channel, iob); 845 } 846 847 static int qeth_setup_channel(struct qeth_channel *channel) 848 { 849 int cnt; 850 851 QETH_DBF_TEXT(SETUP, 2, "setupch"); 852 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 853 channel->iob[cnt].data = 854 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 855 if (channel->iob[cnt].data == NULL) 856 break; 857 channel->iob[cnt].state = BUF_STATE_FREE; 858 channel->iob[cnt].channel = channel; 859 channel->iob[cnt].callback = qeth_send_control_data_cb; 860 channel->iob[cnt].rc = 0; 861 } 862 if (cnt < QETH_CMD_BUFFER_NO) { 863 while (cnt-- > 0) 864 kfree(channel->iob[cnt].data); 865 return -ENOMEM; 866 } 867 channel->buf_no = 0; 868 channel->io_buf_no = 0; 869 atomic_set(&channel->irq_pending, 0); 870 spin_lock_init(&channel->iob_lock); 871 872 init_waitqueue_head(&channel->wait_q); 873 return 0; 874 } 875 876 static int qeth_set_thread_start_bit(struct qeth_card *card, 877 unsigned long thread) 878 { 879 unsigned long flags; 880 881 spin_lock_irqsave(&card->thread_mask_lock, flags); 882 if (!(card->thread_allowed_mask & thread) || 883 (card->thread_start_mask & thread)) { 884 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 885 return -EPERM; 886 } 887 card->thread_start_mask |= thread; 888 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 889 return 0; 890 } 891 892 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 893 { 894 unsigned long flags; 895 896 spin_lock_irqsave(&card->thread_mask_lock, flags); 897 card->thread_start_mask &= ~thread; 898 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 899 wake_up(&card->wait_q); 900 } 901 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 902 903 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 904 { 905 unsigned long flags; 906 907 spin_lock_irqsave(&card->thread_mask_lock, flags); 908 card->thread_running_mask &= ~thread; 909 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 910 wake_up(&card->wait_q); 911 } 912 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 913 914 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 915 { 916 unsigned long flags; 917 int rc = 0; 918 919 spin_lock_irqsave(&card->thread_mask_lock, flags); 920 if (card->thread_start_mask & thread) { 921 if ((card->thread_allowed_mask & thread) && 922 !(card->thread_running_mask & thread)) { 923 rc = 1; 924 card->thread_start_mask &= ~thread; 925 card->thread_running_mask |= thread; 926 } else 927 rc = -EPERM; 928 } 929 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 930 return rc; 931 } 932 933 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 934 { 935 int rc = 0; 936 937 wait_event(card->wait_q, 938 (rc = __qeth_do_run_thread(card, thread)) >= 0); 939 return rc; 940 } 941 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 942 943 void qeth_schedule_recovery(struct qeth_card *card) 944 { 945 QETH_CARD_TEXT(card, 2, "startrec"); 946 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 947 schedule_work(&card->kernel_thread_starter); 948 } 949 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 950 951 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 952 { 953 int dstat, cstat; 954 char *sense; 955 struct qeth_card *card; 956 957 sense = (char *) irb->ecw; 958 cstat = irb->scsw.cmd.cstat; 959 dstat = irb->scsw.cmd.dstat; 960 card = CARD_FROM_CDEV(cdev); 961 962 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 963 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 964 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 965 QETH_CARD_TEXT(card, 2, "CGENCHK"); 966 dev_warn(&cdev->dev, "The qeth device driver " 967 "failed to recover an error on the device\n"); 968 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 969 dev_name(&cdev->dev), dstat, cstat); 970 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 971 16, 1, irb, 64, 1); 972 return 1; 973 } 974 975 if (dstat & DEV_STAT_UNIT_CHECK) { 976 if (sense[SENSE_RESETTING_EVENT_BYTE] & 977 SENSE_RESETTING_EVENT_FLAG) { 978 QETH_CARD_TEXT(card, 2, "REVIND"); 979 return 1; 980 } 981 if (sense[SENSE_COMMAND_REJECT_BYTE] & 982 SENSE_COMMAND_REJECT_FLAG) { 983 QETH_CARD_TEXT(card, 2, "CMDREJi"); 984 return 1; 985 } 986 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 987 QETH_CARD_TEXT(card, 2, "AFFE"); 988 return 1; 989 } 990 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 991 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 992 return 0; 993 } 994 QETH_CARD_TEXT(card, 2, "DGENCHK"); 995 return 1; 996 } 997 return 0; 998 } 999 1000 static long __qeth_check_irb_error(struct ccw_device *cdev, 1001 unsigned long intparm, struct irb *irb) 1002 { 1003 struct qeth_card *card; 1004 1005 card = CARD_FROM_CDEV(cdev); 1006 1007 if (!IS_ERR(irb)) 1008 return 0; 1009 1010 switch (PTR_ERR(irb)) { 1011 case -EIO: 1012 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1013 dev_name(&cdev->dev)); 1014 QETH_CARD_TEXT(card, 2, "ckirberr"); 1015 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1016 break; 1017 case -ETIMEDOUT: 1018 dev_warn(&cdev->dev, "A hardware operation timed out" 1019 " on the device\n"); 1020 QETH_CARD_TEXT(card, 2, "ckirberr"); 1021 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1022 if (intparm == QETH_RCD_PARM) { 1023 if (card && (card->data.ccwdev == cdev)) { 1024 card->data.state = CH_STATE_DOWN; 1025 wake_up(&card->wait_q); 1026 } 1027 } 1028 break; 1029 default: 1030 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1031 dev_name(&cdev->dev), PTR_ERR(irb)); 1032 QETH_CARD_TEXT(card, 2, "ckirberr"); 1033 QETH_CARD_TEXT(card, 2, " rc???"); 1034 } 1035 return PTR_ERR(irb); 1036 } 1037 1038 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1039 struct irb *irb) 1040 { 1041 int rc; 1042 int cstat, dstat; 1043 struct qeth_cmd_buffer *buffer; 1044 struct qeth_channel *channel; 1045 struct qeth_card *card; 1046 struct qeth_cmd_buffer *iob; 1047 __u8 index; 1048 1049 if (__qeth_check_irb_error(cdev, intparm, irb)) 1050 return; 1051 cstat = irb->scsw.cmd.cstat; 1052 dstat = irb->scsw.cmd.dstat; 1053 1054 card = CARD_FROM_CDEV(cdev); 1055 if (!card) 1056 return; 1057 1058 QETH_CARD_TEXT(card, 5, "irq"); 1059 1060 if (card->read.ccwdev == cdev) { 1061 channel = &card->read; 1062 QETH_CARD_TEXT(card, 5, "read"); 1063 } else if (card->write.ccwdev == cdev) { 1064 channel = &card->write; 1065 QETH_CARD_TEXT(card, 5, "write"); 1066 } else { 1067 channel = &card->data; 1068 QETH_CARD_TEXT(card, 5, "data"); 1069 } 1070 atomic_set(&channel->irq_pending, 0); 1071 1072 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1073 channel->state = CH_STATE_STOPPED; 1074 1075 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1076 channel->state = CH_STATE_HALTED; 1077 1078 /*let's wake up immediately on data channel*/ 1079 if ((channel == &card->data) && (intparm != 0) && 1080 (intparm != QETH_RCD_PARM)) 1081 goto out; 1082 1083 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1084 QETH_CARD_TEXT(card, 6, "clrchpar"); 1085 /* we don't have to handle this further */ 1086 intparm = 0; 1087 } 1088 if (intparm == QETH_HALT_CHANNEL_PARM) { 1089 QETH_CARD_TEXT(card, 6, "hltchpar"); 1090 /* we don't have to handle this further */ 1091 intparm = 0; 1092 } 1093 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1094 (dstat & DEV_STAT_UNIT_CHECK) || 1095 (cstat)) { 1096 if (irb->esw.esw0.erw.cons) { 1097 dev_warn(&channel->ccwdev->dev, 1098 "The qeth device driver failed to recover " 1099 "an error on the device\n"); 1100 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1101 "0x%X dstat 0x%X\n", 1102 dev_name(&channel->ccwdev->dev), cstat, dstat); 1103 print_hex_dump(KERN_WARNING, "qeth: irb ", 1104 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1105 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1106 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1107 } 1108 if (intparm == QETH_RCD_PARM) { 1109 channel->state = CH_STATE_DOWN; 1110 goto out; 1111 } 1112 rc = qeth_get_problem(cdev, irb); 1113 if (rc) { 1114 qeth_clear_ipacmd_list(card); 1115 qeth_schedule_recovery(card); 1116 goto out; 1117 } 1118 } 1119 1120 if (intparm == QETH_RCD_PARM) { 1121 channel->state = CH_STATE_RCD_DONE; 1122 goto out; 1123 } 1124 if (intparm) { 1125 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1126 buffer->state = BUF_STATE_PROCESSED; 1127 } 1128 if (channel == &card->data) 1129 return; 1130 if (channel == &card->read && 1131 channel->state == CH_STATE_UP) 1132 qeth_issue_next_read(card); 1133 1134 iob = channel->iob; 1135 index = channel->buf_no; 1136 while (iob[index].state == BUF_STATE_PROCESSED) { 1137 if (iob[index].callback != NULL) 1138 iob[index].callback(channel, iob + index); 1139 1140 index = (index + 1) % QETH_CMD_BUFFER_NO; 1141 } 1142 channel->buf_no = index; 1143 out: 1144 wake_up(&card->wait_q); 1145 return; 1146 } 1147 1148 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1149 struct qeth_qdio_out_buffer *buf, 1150 enum iucv_tx_notify notification) 1151 { 1152 struct sk_buff *skb; 1153 1154 if (skb_queue_empty(&buf->skb_list)) 1155 goto out; 1156 skb = skb_peek(&buf->skb_list); 1157 while (skb) { 1158 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1159 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1160 if (skb->protocol == ETH_P_AF_IUCV) { 1161 if (skb->sk) { 1162 struct iucv_sock *iucv = iucv_sk(skb->sk); 1163 iucv->sk_txnotify(skb, notification); 1164 } 1165 } 1166 if (skb_queue_is_last(&buf->skb_list, skb)) 1167 skb = NULL; 1168 else 1169 skb = skb_queue_next(&buf->skb_list, skb); 1170 } 1171 out: 1172 return; 1173 } 1174 1175 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1176 { 1177 struct sk_buff *skb; 1178 struct iucv_sock *iucv; 1179 int notify_general_error = 0; 1180 1181 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1182 notify_general_error = 1; 1183 1184 /* release may never happen from within CQ tasklet scope */ 1185 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1186 1187 skb = skb_dequeue(&buf->skb_list); 1188 while (skb) { 1189 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1190 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1191 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1192 if (skb->sk) { 1193 iucv = iucv_sk(skb->sk); 1194 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1195 } 1196 } 1197 atomic_dec(&skb->users); 1198 dev_kfree_skb_any(skb); 1199 skb = skb_dequeue(&buf->skb_list); 1200 } 1201 } 1202 1203 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1204 struct qeth_qdio_out_buffer *buf, 1205 enum qeth_qdio_buffer_states newbufstate) 1206 { 1207 int i; 1208 1209 /* is PCI flag set on buffer? */ 1210 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1211 atomic_dec(&queue->set_pci_flags_count); 1212 1213 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1214 qeth_release_skbs(buf); 1215 } 1216 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1217 if (buf->buffer->element[i].addr && buf->is_header[i]) 1218 kmem_cache_free(qeth_core_header_cache, 1219 buf->buffer->element[i].addr); 1220 buf->is_header[i] = 0; 1221 buf->buffer->element[i].length = 0; 1222 buf->buffer->element[i].addr = NULL; 1223 buf->buffer->element[i].eflags = 0; 1224 buf->buffer->element[i].sflags = 0; 1225 } 1226 buf->buffer->element[15].eflags = 0; 1227 buf->buffer->element[15].sflags = 0; 1228 buf->next_element_to_fill = 0; 1229 atomic_set(&buf->state, newbufstate); 1230 } 1231 1232 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1233 { 1234 int j; 1235 1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1237 if (!q->bufs[j]) 1238 continue; 1239 qeth_cleanup_handled_pending(q, j, 1); 1240 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1241 if (free) { 1242 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1243 q->bufs[j] = NULL; 1244 } 1245 } 1246 } 1247 1248 void qeth_clear_qdio_buffers(struct qeth_card *card) 1249 { 1250 int i; 1251 1252 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1253 /* clear outbound buffers to free skbs */ 1254 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1255 if (card->qdio.out_qs[i]) { 1256 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1257 } 1258 } 1259 } 1260 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1261 1262 static void qeth_free_buffer_pool(struct qeth_card *card) 1263 { 1264 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1265 int i = 0; 1266 list_for_each_entry_safe(pool_entry, tmp, 1267 &card->qdio.init_pool.entry_list, init_list){ 1268 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1269 free_page((unsigned long)pool_entry->elements[i]); 1270 list_del(&pool_entry->init_list); 1271 kfree(pool_entry); 1272 } 1273 } 1274 1275 static void qeth_free_qdio_buffers(struct qeth_card *card) 1276 { 1277 int i, j; 1278 1279 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1280 QETH_QDIO_UNINITIALIZED) 1281 return; 1282 1283 qeth_free_cq(card); 1284 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1285 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 1286 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1287 kfree(card->qdio.in_q); 1288 card->qdio.in_q = NULL; 1289 /* inbound buffer pool */ 1290 qeth_free_buffer_pool(card); 1291 /* free outbound qdio_qs */ 1292 if (card->qdio.out_qs) { 1293 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1294 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1295 kfree(card->qdio.out_qs[i]); 1296 } 1297 kfree(card->qdio.out_qs); 1298 card->qdio.out_qs = NULL; 1299 } 1300 } 1301 1302 static void qeth_clean_channel(struct qeth_channel *channel) 1303 { 1304 int cnt; 1305 1306 QETH_DBF_TEXT(SETUP, 2, "freech"); 1307 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1308 kfree(channel->iob[cnt].data); 1309 } 1310 1311 static void qeth_set_single_write_queues(struct qeth_card *card) 1312 { 1313 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1314 (card->qdio.no_out_queues == 4)) 1315 qeth_free_qdio_buffers(card); 1316 1317 card->qdio.no_out_queues = 1; 1318 if (card->qdio.default_out_queue != 0) 1319 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1320 1321 card->qdio.default_out_queue = 0; 1322 } 1323 1324 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1325 { 1326 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1327 (card->qdio.no_out_queues == 1)) { 1328 qeth_free_qdio_buffers(card); 1329 card->qdio.default_out_queue = 2; 1330 } 1331 card->qdio.no_out_queues = 4; 1332 } 1333 1334 static void qeth_update_from_chp_desc(struct qeth_card *card) 1335 { 1336 struct ccw_device *ccwdev; 1337 struct channelPath_dsc { 1338 u8 flags; 1339 u8 lsn; 1340 u8 desc; 1341 u8 chpid; 1342 u8 swla; 1343 u8 zeroes; 1344 u8 chla; 1345 u8 chpp; 1346 } *chp_dsc; 1347 1348 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1349 1350 ccwdev = card->data.ccwdev; 1351 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1352 if (!chp_dsc) 1353 goto out; 1354 1355 card->info.func_level = 0x4100 + chp_dsc->desc; 1356 if (card->info.type == QETH_CARD_TYPE_IQD) 1357 goto out; 1358 1359 /* CHPP field bit 6 == 1 -> single queue */ 1360 if ((chp_dsc->chpp & 0x02) == 0x02) 1361 qeth_set_single_write_queues(card); 1362 else 1363 qeth_set_multiple_write_queues(card); 1364 out: 1365 kfree(chp_dsc); 1366 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1367 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1368 } 1369 1370 static void qeth_init_qdio_info(struct qeth_card *card) 1371 { 1372 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1373 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1374 /* inbound */ 1375 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1376 if (card->info.type == QETH_CARD_TYPE_IQD) 1377 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1378 else 1379 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1380 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1381 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1382 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1383 } 1384 1385 static void qeth_set_intial_options(struct qeth_card *card) 1386 { 1387 card->options.route4.type = NO_ROUTER; 1388 card->options.route6.type = NO_ROUTER; 1389 card->options.fake_broadcast = 0; 1390 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1391 card->options.performance_stats = 0; 1392 card->options.rx_sg_cb = QETH_RX_SG_CB; 1393 card->options.isolation = ISOLATION_MODE_NONE; 1394 card->options.cq = QETH_CQ_DISABLED; 1395 } 1396 1397 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1398 { 1399 unsigned long flags; 1400 int rc = 0; 1401 1402 spin_lock_irqsave(&card->thread_mask_lock, flags); 1403 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1404 (u8) card->thread_start_mask, 1405 (u8) card->thread_allowed_mask, 1406 (u8) card->thread_running_mask); 1407 rc = (card->thread_start_mask & thread); 1408 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1409 return rc; 1410 } 1411 1412 static void qeth_start_kernel_thread(struct work_struct *work) 1413 { 1414 struct task_struct *ts; 1415 struct qeth_card *card = container_of(work, struct qeth_card, 1416 kernel_thread_starter); 1417 QETH_CARD_TEXT(card , 2, "strthrd"); 1418 1419 if (card->read.state != CH_STATE_UP && 1420 card->write.state != CH_STATE_UP) 1421 return; 1422 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1423 ts = kthread_run(card->discipline->recover, (void *)card, 1424 "qeth_recover"); 1425 if (IS_ERR(ts)) { 1426 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1427 qeth_clear_thread_running_bit(card, 1428 QETH_RECOVER_THREAD); 1429 } 1430 } 1431 } 1432 1433 static int qeth_setup_card(struct qeth_card *card) 1434 { 1435 1436 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1437 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1438 1439 card->read.state = CH_STATE_DOWN; 1440 card->write.state = CH_STATE_DOWN; 1441 card->data.state = CH_STATE_DOWN; 1442 card->state = CARD_STATE_DOWN; 1443 card->lan_online = 0; 1444 card->read_or_write_problem = 0; 1445 card->dev = NULL; 1446 spin_lock_init(&card->vlanlock); 1447 spin_lock_init(&card->mclock); 1448 spin_lock_init(&card->lock); 1449 spin_lock_init(&card->ip_lock); 1450 spin_lock_init(&card->thread_mask_lock); 1451 mutex_init(&card->conf_mutex); 1452 mutex_init(&card->discipline_mutex); 1453 card->thread_start_mask = 0; 1454 card->thread_allowed_mask = 0; 1455 card->thread_running_mask = 0; 1456 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1457 INIT_LIST_HEAD(&card->ip_list); 1458 INIT_LIST_HEAD(card->ip_tbd_list); 1459 INIT_LIST_HEAD(&card->cmd_waiter_list); 1460 init_waitqueue_head(&card->wait_q); 1461 /* initial options */ 1462 qeth_set_intial_options(card); 1463 /* IP address takeover */ 1464 INIT_LIST_HEAD(&card->ipato.entries); 1465 card->ipato.enabled = 0; 1466 card->ipato.invert4 = 0; 1467 card->ipato.invert6 = 0; 1468 /* init QDIO stuff */ 1469 qeth_init_qdio_info(card); 1470 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1471 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1472 return 0; 1473 } 1474 1475 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1476 { 1477 struct qeth_card *card = container_of(slr, struct qeth_card, 1478 qeth_service_level); 1479 if (card->info.mcl_level[0]) 1480 seq_printf(m, "qeth: %s firmware level %s\n", 1481 CARD_BUS_ID(card), card->info.mcl_level); 1482 } 1483 1484 static struct qeth_card *qeth_alloc_card(void) 1485 { 1486 struct qeth_card *card; 1487 1488 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1489 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1490 if (!card) 1491 goto out; 1492 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1493 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1494 if (!card->ip_tbd_list) { 1495 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1496 goto out_card; 1497 } 1498 if (qeth_setup_channel(&card->read)) 1499 goto out_ip; 1500 if (qeth_setup_channel(&card->write)) 1501 goto out_channel; 1502 card->options.layer2 = -1; 1503 card->qeth_service_level.seq_print = qeth_core_sl_print; 1504 register_service_level(&card->qeth_service_level); 1505 return card; 1506 1507 out_channel: 1508 qeth_clean_channel(&card->read); 1509 out_ip: 1510 kfree(card->ip_tbd_list); 1511 out_card: 1512 kfree(card); 1513 out: 1514 return NULL; 1515 } 1516 1517 static int qeth_determine_card_type(struct qeth_card *card) 1518 { 1519 int i = 0; 1520 1521 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1522 1523 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1524 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1525 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1526 if ((CARD_RDEV(card)->id.dev_type == 1527 known_devices[i][QETH_DEV_TYPE_IND]) && 1528 (CARD_RDEV(card)->id.dev_model == 1529 known_devices[i][QETH_DEV_MODEL_IND])) { 1530 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1531 card->qdio.no_out_queues = 1532 known_devices[i][QETH_QUEUE_NO_IND]; 1533 card->qdio.no_in_queues = 1; 1534 card->info.is_multicast_different = 1535 known_devices[i][QETH_MULTICAST_IND]; 1536 qeth_update_from_chp_desc(card); 1537 return 0; 1538 } 1539 i++; 1540 } 1541 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1542 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1543 "unknown type\n"); 1544 return -ENOENT; 1545 } 1546 1547 static int qeth_clear_channel(struct qeth_channel *channel) 1548 { 1549 unsigned long flags; 1550 struct qeth_card *card; 1551 int rc; 1552 1553 card = CARD_FROM_CDEV(channel->ccwdev); 1554 QETH_CARD_TEXT(card, 3, "clearch"); 1555 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1556 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1557 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1558 1559 if (rc) 1560 return rc; 1561 rc = wait_event_interruptible_timeout(card->wait_q, 1562 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1563 if (rc == -ERESTARTSYS) 1564 return rc; 1565 if (channel->state != CH_STATE_STOPPED) 1566 return -ETIME; 1567 channel->state = CH_STATE_DOWN; 1568 return 0; 1569 } 1570 1571 static int qeth_halt_channel(struct qeth_channel *channel) 1572 { 1573 unsigned long flags; 1574 struct qeth_card *card; 1575 int rc; 1576 1577 card = CARD_FROM_CDEV(channel->ccwdev); 1578 QETH_CARD_TEXT(card, 3, "haltch"); 1579 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1580 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1581 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1582 1583 if (rc) 1584 return rc; 1585 rc = wait_event_interruptible_timeout(card->wait_q, 1586 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1587 if (rc == -ERESTARTSYS) 1588 return rc; 1589 if (channel->state != CH_STATE_HALTED) 1590 return -ETIME; 1591 return 0; 1592 } 1593 1594 static int qeth_halt_channels(struct qeth_card *card) 1595 { 1596 int rc1 = 0, rc2 = 0, rc3 = 0; 1597 1598 QETH_CARD_TEXT(card, 3, "haltchs"); 1599 rc1 = qeth_halt_channel(&card->read); 1600 rc2 = qeth_halt_channel(&card->write); 1601 rc3 = qeth_halt_channel(&card->data); 1602 if (rc1) 1603 return rc1; 1604 if (rc2) 1605 return rc2; 1606 return rc3; 1607 } 1608 1609 static int qeth_clear_channels(struct qeth_card *card) 1610 { 1611 int rc1 = 0, rc2 = 0, rc3 = 0; 1612 1613 QETH_CARD_TEXT(card, 3, "clearchs"); 1614 rc1 = qeth_clear_channel(&card->read); 1615 rc2 = qeth_clear_channel(&card->write); 1616 rc3 = qeth_clear_channel(&card->data); 1617 if (rc1) 1618 return rc1; 1619 if (rc2) 1620 return rc2; 1621 return rc3; 1622 } 1623 1624 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1625 { 1626 int rc = 0; 1627 1628 QETH_CARD_TEXT(card, 3, "clhacrd"); 1629 1630 if (halt) 1631 rc = qeth_halt_channels(card); 1632 if (rc) 1633 return rc; 1634 return qeth_clear_channels(card); 1635 } 1636 1637 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1638 { 1639 int rc = 0; 1640 1641 QETH_CARD_TEXT(card, 3, "qdioclr"); 1642 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1643 QETH_QDIO_CLEANING)) { 1644 case QETH_QDIO_ESTABLISHED: 1645 if (card->info.type == QETH_CARD_TYPE_IQD) 1646 rc = qdio_shutdown(CARD_DDEV(card), 1647 QDIO_FLAG_CLEANUP_USING_HALT); 1648 else 1649 rc = qdio_shutdown(CARD_DDEV(card), 1650 QDIO_FLAG_CLEANUP_USING_CLEAR); 1651 if (rc) 1652 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1653 qdio_free(CARD_DDEV(card)); 1654 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1655 break; 1656 case QETH_QDIO_CLEANING: 1657 return rc; 1658 default: 1659 break; 1660 } 1661 rc = qeth_clear_halt_card(card, use_halt); 1662 if (rc) 1663 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1664 card->state = CARD_STATE_DOWN; 1665 return rc; 1666 } 1667 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1668 1669 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1670 int *length) 1671 { 1672 struct ciw *ciw; 1673 char *rcd_buf; 1674 int ret; 1675 struct qeth_channel *channel = &card->data; 1676 unsigned long flags; 1677 1678 /* 1679 * scan for RCD command in extended SenseID data 1680 */ 1681 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1682 if (!ciw || ciw->cmd == 0) 1683 return -EOPNOTSUPP; 1684 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1685 if (!rcd_buf) 1686 return -ENOMEM; 1687 1688 channel->ccw.cmd_code = ciw->cmd; 1689 channel->ccw.cda = (__u32) __pa(rcd_buf); 1690 channel->ccw.count = ciw->count; 1691 channel->ccw.flags = CCW_FLAG_SLI; 1692 channel->state = CH_STATE_RCD; 1693 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1694 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1695 QETH_RCD_PARM, LPM_ANYPATH, 0, 1696 QETH_RCD_TIMEOUT); 1697 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1698 if (!ret) 1699 wait_event(card->wait_q, 1700 (channel->state == CH_STATE_RCD_DONE || 1701 channel->state == CH_STATE_DOWN)); 1702 if (channel->state == CH_STATE_DOWN) 1703 ret = -EIO; 1704 else 1705 channel->state = CH_STATE_DOWN; 1706 if (ret) { 1707 kfree(rcd_buf); 1708 *buffer = NULL; 1709 *length = 0; 1710 } else { 1711 *length = ciw->count; 1712 *buffer = rcd_buf; 1713 } 1714 return ret; 1715 } 1716 1717 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1718 { 1719 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1720 card->info.chpid = prcd[30]; 1721 card->info.unit_addr2 = prcd[31]; 1722 card->info.cula = prcd[63]; 1723 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1724 (prcd[0x11] == _ascebc['M'])); 1725 } 1726 1727 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1728 { 1729 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1730 1731 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1732 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) { 1733 card->info.blkt.time_total = 250; 1734 card->info.blkt.inter_packet = 5; 1735 card->info.blkt.inter_packet_jumbo = 15; 1736 } else { 1737 card->info.blkt.time_total = 0; 1738 card->info.blkt.inter_packet = 0; 1739 card->info.blkt.inter_packet_jumbo = 0; 1740 } 1741 } 1742 1743 static void qeth_init_tokens(struct qeth_card *card) 1744 { 1745 card->token.issuer_rm_w = 0x00010103UL; 1746 card->token.cm_filter_w = 0x00010108UL; 1747 card->token.cm_connection_w = 0x0001010aUL; 1748 card->token.ulp_filter_w = 0x0001010bUL; 1749 card->token.ulp_connection_w = 0x0001010dUL; 1750 } 1751 1752 static void qeth_init_func_level(struct qeth_card *card) 1753 { 1754 switch (card->info.type) { 1755 case QETH_CARD_TYPE_IQD: 1756 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1757 break; 1758 case QETH_CARD_TYPE_OSD: 1759 case QETH_CARD_TYPE_OSN: 1760 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1761 break; 1762 default: 1763 break; 1764 } 1765 } 1766 1767 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1768 void (*idx_reply_cb)(struct qeth_channel *, 1769 struct qeth_cmd_buffer *)) 1770 { 1771 struct qeth_cmd_buffer *iob; 1772 unsigned long flags; 1773 int rc; 1774 struct qeth_card *card; 1775 1776 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1777 card = CARD_FROM_CDEV(channel->ccwdev); 1778 iob = qeth_get_buffer(channel); 1779 iob->callback = idx_reply_cb; 1780 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1781 channel->ccw.count = QETH_BUFSIZE; 1782 channel->ccw.cda = (__u32) __pa(iob->data); 1783 1784 wait_event(card->wait_q, 1785 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1786 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1787 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1788 rc = ccw_device_start(channel->ccwdev, 1789 &channel->ccw, (addr_t) iob, 0, 0); 1790 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1791 1792 if (rc) { 1793 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1794 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1795 atomic_set(&channel->irq_pending, 0); 1796 wake_up(&card->wait_q); 1797 return rc; 1798 } 1799 rc = wait_event_interruptible_timeout(card->wait_q, 1800 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1801 if (rc == -ERESTARTSYS) 1802 return rc; 1803 if (channel->state != CH_STATE_UP) { 1804 rc = -ETIME; 1805 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1806 qeth_clear_cmd_buffers(channel); 1807 } else 1808 rc = 0; 1809 return rc; 1810 } 1811 1812 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1813 void (*idx_reply_cb)(struct qeth_channel *, 1814 struct qeth_cmd_buffer *)) 1815 { 1816 struct qeth_card *card; 1817 struct qeth_cmd_buffer *iob; 1818 unsigned long flags; 1819 __u16 temp; 1820 __u8 tmp; 1821 int rc; 1822 struct ccw_dev_id temp_devid; 1823 1824 card = CARD_FROM_CDEV(channel->ccwdev); 1825 1826 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1827 1828 iob = qeth_get_buffer(channel); 1829 iob->callback = idx_reply_cb; 1830 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1831 channel->ccw.count = IDX_ACTIVATE_SIZE; 1832 channel->ccw.cda = (__u32) __pa(iob->data); 1833 if (channel == &card->write) { 1834 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1835 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1836 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1837 card->seqno.trans_hdr++; 1838 } else { 1839 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1840 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1841 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1842 } 1843 tmp = ((__u8)card->info.portno) | 0x80; 1844 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1845 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1846 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1847 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1848 &card->info.func_level, sizeof(__u16)); 1849 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1850 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1851 temp = (card->info.cula << 8) + card->info.unit_addr2; 1852 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1853 1854 wait_event(card->wait_q, 1855 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1856 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1857 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1858 rc = ccw_device_start(channel->ccwdev, 1859 &channel->ccw, (addr_t) iob, 0, 0); 1860 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1861 1862 if (rc) { 1863 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1864 rc); 1865 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1866 atomic_set(&channel->irq_pending, 0); 1867 wake_up(&card->wait_q); 1868 return rc; 1869 } 1870 rc = wait_event_interruptible_timeout(card->wait_q, 1871 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1872 if (rc == -ERESTARTSYS) 1873 return rc; 1874 if (channel->state != CH_STATE_ACTIVATING) { 1875 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1876 " failed to recover an error on the device\n"); 1877 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1878 dev_name(&channel->ccwdev->dev)); 1879 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1880 qeth_clear_cmd_buffers(channel); 1881 return -ETIME; 1882 } 1883 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1884 } 1885 1886 static int qeth_peer_func_level(int level) 1887 { 1888 if ((level & 0xff) == 8) 1889 return (level & 0xff) + 0x400; 1890 if (((level >> 8) & 3) == 1) 1891 return (level & 0xff) + 0x200; 1892 return level; 1893 } 1894 1895 static void qeth_idx_write_cb(struct qeth_channel *channel, 1896 struct qeth_cmd_buffer *iob) 1897 { 1898 struct qeth_card *card; 1899 __u16 temp; 1900 1901 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1902 1903 if (channel->state == CH_STATE_DOWN) { 1904 channel->state = CH_STATE_ACTIVATING; 1905 goto out; 1906 } 1907 card = CARD_FROM_CDEV(channel->ccwdev); 1908 1909 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1910 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1911 dev_err(&card->write.ccwdev->dev, 1912 "The adapter is used exclusively by another " 1913 "host\n"); 1914 else 1915 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1916 " negative reply\n", 1917 dev_name(&card->write.ccwdev->dev)); 1918 goto out; 1919 } 1920 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1921 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1922 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1923 "function level mismatch (sent: 0x%x, received: " 1924 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1925 card->info.func_level, temp); 1926 goto out; 1927 } 1928 channel->state = CH_STATE_UP; 1929 out: 1930 qeth_release_buffer(channel, iob); 1931 } 1932 1933 static void qeth_idx_read_cb(struct qeth_channel *channel, 1934 struct qeth_cmd_buffer *iob) 1935 { 1936 struct qeth_card *card; 1937 __u16 temp; 1938 1939 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1940 if (channel->state == CH_STATE_DOWN) { 1941 channel->state = CH_STATE_ACTIVATING; 1942 goto out; 1943 } 1944 1945 card = CARD_FROM_CDEV(channel->ccwdev); 1946 if (qeth_check_idx_response(card, iob->data)) 1947 goto out; 1948 1949 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1950 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1951 case QETH_IDX_ACT_ERR_EXCL: 1952 dev_err(&card->write.ccwdev->dev, 1953 "The adapter is used exclusively by another " 1954 "host\n"); 1955 break; 1956 case QETH_IDX_ACT_ERR_AUTH: 1957 case QETH_IDX_ACT_ERR_AUTH_USER: 1958 dev_err(&card->read.ccwdev->dev, 1959 "Setting the device online failed because of " 1960 "insufficient authorization\n"); 1961 break; 1962 default: 1963 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1964 " negative reply\n", 1965 dev_name(&card->read.ccwdev->dev)); 1966 } 1967 QETH_CARD_TEXT_(card, 2, "idxread%c", 1968 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1969 goto out; 1970 } 1971 1972 /** 1973 * * temporary fix for microcode bug 1974 * * to revert it,replace OR by AND 1975 * */ 1976 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1977 (card->info.type == QETH_CARD_TYPE_OSD)) 1978 card->info.portname_required = 1; 1979 1980 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1981 if (temp != qeth_peer_func_level(card->info.func_level)) { 1982 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1983 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1984 dev_name(&card->read.ccwdev->dev), 1985 card->info.func_level, temp); 1986 goto out; 1987 } 1988 memcpy(&card->token.issuer_rm_r, 1989 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1990 QETH_MPC_TOKEN_LENGTH); 1991 memcpy(&card->info.mcl_level[0], 1992 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1993 channel->state = CH_STATE_UP; 1994 out: 1995 qeth_release_buffer(channel, iob); 1996 } 1997 1998 void qeth_prepare_control_data(struct qeth_card *card, int len, 1999 struct qeth_cmd_buffer *iob) 2000 { 2001 qeth_setup_ccw(&card->write, iob->data, len); 2002 iob->callback = qeth_release_buffer; 2003 2004 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2005 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2006 card->seqno.trans_hdr++; 2007 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2008 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2009 card->seqno.pdu_hdr++; 2010 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2011 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2012 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2013 } 2014 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2015 2016 int qeth_send_control_data(struct qeth_card *card, int len, 2017 struct qeth_cmd_buffer *iob, 2018 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 2019 unsigned long), 2020 void *reply_param) 2021 { 2022 int rc; 2023 unsigned long flags; 2024 struct qeth_reply *reply = NULL; 2025 unsigned long timeout, event_timeout; 2026 struct qeth_ipa_cmd *cmd; 2027 2028 QETH_CARD_TEXT(card, 2, "sendctl"); 2029 2030 if (card->read_or_write_problem) { 2031 qeth_release_buffer(iob->channel, iob); 2032 return -EIO; 2033 } 2034 reply = qeth_alloc_reply(card); 2035 if (!reply) { 2036 return -ENOMEM; 2037 } 2038 reply->callback = reply_cb; 2039 reply->param = reply_param; 2040 if (card->state == CARD_STATE_DOWN) 2041 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2042 else 2043 reply->seqno = card->seqno.ipa++; 2044 init_waitqueue_head(&reply->wait_q); 2045 spin_lock_irqsave(&card->lock, flags); 2046 list_add_tail(&reply->list, &card->cmd_waiter_list); 2047 spin_unlock_irqrestore(&card->lock, flags); 2048 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2049 2050 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2051 qeth_prepare_control_data(card, len, iob); 2052 2053 if (IS_IPA(iob->data)) 2054 event_timeout = QETH_IPA_TIMEOUT; 2055 else 2056 event_timeout = QETH_TIMEOUT; 2057 timeout = jiffies + event_timeout; 2058 2059 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2060 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2061 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2062 (addr_t) iob, 0, 0); 2063 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2064 if (rc) { 2065 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2066 "ccw_device_start rc = %i\n", 2067 dev_name(&card->write.ccwdev->dev), rc); 2068 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2069 spin_lock_irqsave(&card->lock, flags); 2070 list_del_init(&reply->list); 2071 qeth_put_reply(reply); 2072 spin_unlock_irqrestore(&card->lock, flags); 2073 qeth_release_buffer(iob->channel, iob); 2074 atomic_set(&card->write.irq_pending, 0); 2075 wake_up(&card->wait_q); 2076 return rc; 2077 } 2078 2079 /* we have only one long running ipassist, since we can ensure 2080 process context of this command we can sleep */ 2081 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2082 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2083 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2084 if (!wait_event_timeout(reply->wait_q, 2085 atomic_read(&reply->received), event_timeout)) 2086 goto time_err; 2087 } else { 2088 while (!atomic_read(&reply->received)) { 2089 if (time_after(jiffies, timeout)) 2090 goto time_err; 2091 cpu_relax(); 2092 } 2093 } 2094 2095 if (reply->rc == -EIO) 2096 goto error; 2097 rc = reply->rc; 2098 qeth_put_reply(reply); 2099 return rc; 2100 2101 time_err: 2102 reply->rc = -ETIME; 2103 spin_lock_irqsave(&reply->card->lock, flags); 2104 list_del_init(&reply->list); 2105 spin_unlock_irqrestore(&reply->card->lock, flags); 2106 atomic_inc(&reply->received); 2107 error: 2108 atomic_set(&card->write.irq_pending, 0); 2109 qeth_release_buffer(iob->channel, iob); 2110 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2111 rc = reply->rc; 2112 qeth_put_reply(reply); 2113 return rc; 2114 } 2115 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2116 2117 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2118 unsigned long data) 2119 { 2120 struct qeth_cmd_buffer *iob; 2121 2122 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2123 2124 iob = (struct qeth_cmd_buffer *) data; 2125 memcpy(&card->token.cm_filter_r, 2126 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2127 QETH_MPC_TOKEN_LENGTH); 2128 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2129 return 0; 2130 } 2131 2132 static int qeth_cm_enable(struct qeth_card *card) 2133 { 2134 int rc; 2135 struct qeth_cmd_buffer *iob; 2136 2137 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2138 2139 iob = qeth_wait_for_buffer(&card->write); 2140 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2141 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2142 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2143 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2144 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2145 2146 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2147 qeth_cm_enable_cb, NULL); 2148 return rc; 2149 } 2150 2151 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2152 unsigned long data) 2153 { 2154 2155 struct qeth_cmd_buffer *iob; 2156 2157 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2158 2159 iob = (struct qeth_cmd_buffer *) data; 2160 memcpy(&card->token.cm_connection_r, 2161 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2162 QETH_MPC_TOKEN_LENGTH); 2163 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2164 return 0; 2165 } 2166 2167 static int qeth_cm_setup(struct qeth_card *card) 2168 { 2169 int rc; 2170 struct qeth_cmd_buffer *iob; 2171 2172 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2173 2174 iob = qeth_wait_for_buffer(&card->write); 2175 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2176 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2177 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2178 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2179 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2180 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2181 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2182 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2183 qeth_cm_setup_cb, NULL); 2184 return rc; 2185 2186 } 2187 2188 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2189 { 2190 switch (card->info.type) { 2191 case QETH_CARD_TYPE_UNKNOWN: 2192 return 1500; 2193 case QETH_CARD_TYPE_IQD: 2194 return card->info.max_mtu; 2195 case QETH_CARD_TYPE_OSD: 2196 switch (card->info.link_type) { 2197 case QETH_LINK_TYPE_HSTR: 2198 case QETH_LINK_TYPE_LANE_TR: 2199 return 2000; 2200 default: 2201 return 1492; 2202 } 2203 case QETH_CARD_TYPE_OSM: 2204 case QETH_CARD_TYPE_OSX: 2205 return 1492; 2206 default: 2207 return 1500; 2208 } 2209 } 2210 2211 static inline int qeth_get_mtu_outof_framesize(int framesize) 2212 { 2213 switch (framesize) { 2214 case 0x4000: 2215 return 8192; 2216 case 0x6000: 2217 return 16384; 2218 case 0xa000: 2219 return 32768; 2220 case 0xffff: 2221 return 57344; 2222 default: 2223 return 0; 2224 } 2225 } 2226 2227 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2228 { 2229 switch (card->info.type) { 2230 case QETH_CARD_TYPE_OSD: 2231 case QETH_CARD_TYPE_OSM: 2232 case QETH_CARD_TYPE_OSX: 2233 case QETH_CARD_TYPE_IQD: 2234 return ((mtu >= 576) && 2235 (mtu <= card->info.max_mtu)); 2236 case QETH_CARD_TYPE_OSN: 2237 case QETH_CARD_TYPE_UNKNOWN: 2238 default: 2239 return 1; 2240 } 2241 } 2242 2243 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2244 unsigned long data) 2245 { 2246 2247 __u16 mtu, framesize; 2248 __u16 len; 2249 __u8 link_type; 2250 struct qeth_cmd_buffer *iob; 2251 2252 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2253 2254 iob = (struct qeth_cmd_buffer *) data; 2255 memcpy(&card->token.ulp_filter_r, 2256 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2257 QETH_MPC_TOKEN_LENGTH); 2258 if (card->info.type == QETH_CARD_TYPE_IQD) { 2259 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2260 mtu = qeth_get_mtu_outof_framesize(framesize); 2261 if (!mtu) { 2262 iob->rc = -EINVAL; 2263 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2264 return 0; 2265 } 2266 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2267 /* frame size has changed */ 2268 if (card->dev && 2269 ((card->dev->mtu == card->info.initial_mtu) || 2270 (card->dev->mtu > mtu))) 2271 card->dev->mtu = mtu; 2272 qeth_free_qdio_buffers(card); 2273 } 2274 card->info.initial_mtu = mtu; 2275 card->info.max_mtu = mtu; 2276 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2277 } else { 2278 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 2279 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2280 iob->data); 2281 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2282 } 2283 2284 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2285 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2286 memcpy(&link_type, 2287 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2288 card->info.link_type = link_type; 2289 } else 2290 card->info.link_type = 0; 2291 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2292 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2293 return 0; 2294 } 2295 2296 static int qeth_ulp_enable(struct qeth_card *card) 2297 { 2298 int rc; 2299 char prot_type; 2300 struct qeth_cmd_buffer *iob; 2301 2302 /*FIXME: trace view callbacks*/ 2303 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2304 2305 iob = qeth_wait_for_buffer(&card->write); 2306 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2307 2308 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2309 (__u8) card->info.portno; 2310 if (card->options.layer2) 2311 if (card->info.type == QETH_CARD_TYPE_OSN) 2312 prot_type = QETH_PROT_OSN2; 2313 else 2314 prot_type = QETH_PROT_LAYER2; 2315 else 2316 prot_type = QETH_PROT_TCPIP; 2317 2318 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2319 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2320 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2321 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2322 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2323 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2324 card->info.portname, 9); 2325 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2326 qeth_ulp_enable_cb, NULL); 2327 return rc; 2328 2329 } 2330 2331 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2332 unsigned long data) 2333 { 2334 struct qeth_cmd_buffer *iob; 2335 2336 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2337 2338 iob = (struct qeth_cmd_buffer *) data; 2339 memcpy(&card->token.ulp_connection_r, 2340 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2341 QETH_MPC_TOKEN_LENGTH); 2342 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2343 3)) { 2344 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2345 dev_err(&card->gdev->dev, "A connection could not be " 2346 "established because of an OLM limit\n"); 2347 iob->rc = -EMLINK; 2348 } 2349 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2350 return 0; 2351 } 2352 2353 static int qeth_ulp_setup(struct qeth_card *card) 2354 { 2355 int rc; 2356 __u16 temp; 2357 struct qeth_cmd_buffer *iob; 2358 struct ccw_dev_id dev_id; 2359 2360 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2361 2362 iob = qeth_wait_for_buffer(&card->write); 2363 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2364 2365 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2366 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2367 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2368 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2369 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2370 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2371 2372 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2373 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2374 temp = (card->info.cula << 8) + card->info.unit_addr2; 2375 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2376 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2377 qeth_ulp_setup_cb, NULL); 2378 return rc; 2379 } 2380 2381 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2382 { 2383 int rc; 2384 struct qeth_qdio_out_buffer *newbuf; 2385 2386 rc = 0; 2387 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2388 if (!newbuf) { 2389 rc = -ENOMEM; 2390 goto out; 2391 } 2392 newbuf->buffer = &q->qdio_bufs[bidx]; 2393 skb_queue_head_init(&newbuf->skb_list); 2394 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2395 newbuf->q = q; 2396 newbuf->aob = NULL; 2397 newbuf->next_pending = q->bufs[bidx]; 2398 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2399 q->bufs[bidx] = newbuf; 2400 if (q->bufstates) { 2401 q->bufstates[bidx].user = newbuf; 2402 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2403 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2404 QETH_CARD_TEXT_(q->card, 2, "%lx", 2405 (long) newbuf->next_pending); 2406 } 2407 out: 2408 return rc; 2409 } 2410 2411 2412 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2413 { 2414 int i, j; 2415 2416 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2417 2418 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2419 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2420 return 0; 2421 2422 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2423 GFP_KERNEL); 2424 if (!card->qdio.in_q) 2425 goto out_nomem; 2426 QETH_DBF_TEXT(SETUP, 2, "inq"); 2427 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2428 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2429 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2430 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2431 card->qdio.in_q->bufs[i].buffer = 2432 &card->qdio.in_q->qdio_bufs[i]; 2433 card->qdio.in_q->bufs[i].rx_skb = NULL; 2434 } 2435 /* inbound buffer pool */ 2436 if (qeth_alloc_buffer_pool(card)) 2437 goto out_freeinq; 2438 2439 /* outbound */ 2440 card->qdio.out_qs = 2441 kzalloc(card->qdio.no_out_queues * 2442 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2443 if (!card->qdio.out_qs) 2444 goto out_freepool; 2445 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2446 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2447 GFP_KERNEL); 2448 if (!card->qdio.out_qs[i]) 2449 goto out_freeoutq; 2450 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2451 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2452 card->qdio.out_qs[i]->queue_no = i; 2453 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2454 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2455 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2456 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2457 goto out_freeoutqbufs; 2458 } 2459 } 2460 2461 /* completion */ 2462 if (qeth_alloc_cq(card)) 2463 goto out_freeoutq; 2464 2465 return 0; 2466 2467 out_freeoutqbufs: 2468 while (j > 0) { 2469 --j; 2470 kmem_cache_free(qeth_qdio_outbuf_cache, 2471 card->qdio.out_qs[i]->bufs[j]); 2472 card->qdio.out_qs[i]->bufs[j] = NULL; 2473 } 2474 out_freeoutq: 2475 while (i > 0) { 2476 kfree(card->qdio.out_qs[--i]); 2477 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2478 } 2479 kfree(card->qdio.out_qs); 2480 card->qdio.out_qs = NULL; 2481 out_freepool: 2482 qeth_free_buffer_pool(card); 2483 out_freeinq: 2484 kfree(card->qdio.in_q); 2485 card->qdio.in_q = NULL; 2486 out_nomem: 2487 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2488 return -ENOMEM; 2489 } 2490 2491 static void qeth_create_qib_param_field(struct qeth_card *card, 2492 char *param_field) 2493 { 2494 2495 param_field[0] = _ascebc['P']; 2496 param_field[1] = _ascebc['C']; 2497 param_field[2] = _ascebc['I']; 2498 param_field[3] = _ascebc['T']; 2499 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2500 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2501 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2502 } 2503 2504 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2505 char *param_field) 2506 { 2507 param_field[16] = _ascebc['B']; 2508 param_field[17] = _ascebc['L']; 2509 param_field[18] = _ascebc['K']; 2510 param_field[19] = _ascebc['T']; 2511 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2512 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2513 *((unsigned int *) (¶m_field[28])) = 2514 card->info.blkt.inter_packet_jumbo; 2515 } 2516 2517 static int qeth_qdio_activate(struct qeth_card *card) 2518 { 2519 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2520 return qdio_activate(CARD_DDEV(card)); 2521 } 2522 2523 static int qeth_dm_act(struct qeth_card *card) 2524 { 2525 int rc; 2526 struct qeth_cmd_buffer *iob; 2527 2528 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2529 2530 iob = qeth_wait_for_buffer(&card->write); 2531 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2532 2533 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2534 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2535 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2536 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2537 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2538 return rc; 2539 } 2540 2541 static int qeth_mpc_initialize(struct qeth_card *card) 2542 { 2543 int rc; 2544 2545 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2546 2547 rc = qeth_issue_next_read(card); 2548 if (rc) { 2549 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2550 return rc; 2551 } 2552 rc = qeth_cm_enable(card); 2553 if (rc) { 2554 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2555 goto out_qdio; 2556 } 2557 rc = qeth_cm_setup(card); 2558 if (rc) { 2559 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2560 goto out_qdio; 2561 } 2562 rc = qeth_ulp_enable(card); 2563 if (rc) { 2564 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2565 goto out_qdio; 2566 } 2567 rc = qeth_ulp_setup(card); 2568 if (rc) { 2569 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2570 goto out_qdio; 2571 } 2572 rc = qeth_alloc_qdio_buffers(card); 2573 if (rc) { 2574 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2575 goto out_qdio; 2576 } 2577 rc = qeth_qdio_establish(card); 2578 if (rc) { 2579 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2580 qeth_free_qdio_buffers(card); 2581 goto out_qdio; 2582 } 2583 rc = qeth_qdio_activate(card); 2584 if (rc) { 2585 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2586 goto out_qdio; 2587 } 2588 rc = qeth_dm_act(card); 2589 if (rc) { 2590 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2591 goto out_qdio; 2592 } 2593 2594 return 0; 2595 out_qdio: 2596 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2597 return rc; 2598 } 2599 2600 static void qeth_print_status_with_portname(struct qeth_card *card) 2601 { 2602 char dbf_text[15]; 2603 int i; 2604 2605 sprintf(dbf_text, "%s", card->info.portname + 1); 2606 for (i = 0; i < 8; i++) 2607 dbf_text[i] = 2608 (char) _ebcasc[(__u8) dbf_text[i]]; 2609 dbf_text[8] = 0; 2610 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2611 "with link type %s (portname: %s)\n", 2612 qeth_get_cardname(card), 2613 (card->info.mcl_level[0]) ? " (level: " : "", 2614 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2615 (card->info.mcl_level[0]) ? ")" : "", 2616 qeth_get_cardname_short(card), 2617 dbf_text); 2618 2619 } 2620 2621 static void qeth_print_status_no_portname(struct qeth_card *card) 2622 { 2623 if (card->info.portname[0]) 2624 dev_info(&card->gdev->dev, "Device is a%s " 2625 "card%s%s%s\nwith link type %s " 2626 "(no portname needed by interface).\n", 2627 qeth_get_cardname(card), 2628 (card->info.mcl_level[0]) ? " (level: " : "", 2629 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2630 (card->info.mcl_level[0]) ? ")" : "", 2631 qeth_get_cardname_short(card)); 2632 else 2633 dev_info(&card->gdev->dev, "Device is a%s " 2634 "card%s%s%s\nwith link type %s.\n", 2635 qeth_get_cardname(card), 2636 (card->info.mcl_level[0]) ? " (level: " : "", 2637 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2638 (card->info.mcl_level[0]) ? ")" : "", 2639 qeth_get_cardname_short(card)); 2640 } 2641 2642 void qeth_print_status_message(struct qeth_card *card) 2643 { 2644 switch (card->info.type) { 2645 case QETH_CARD_TYPE_OSD: 2646 case QETH_CARD_TYPE_OSM: 2647 case QETH_CARD_TYPE_OSX: 2648 /* VM will use a non-zero first character 2649 * to indicate a HiperSockets like reporting 2650 * of the level OSA sets the first character to zero 2651 * */ 2652 if (!card->info.mcl_level[0]) { 2653 sprintf(card->info.mcl_level, "%02x%02x", 2654 card->info.mcl_level[2], 2655 card->info.mcl_level[3]); 2656 2657 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2658 break; 2659 } 2660 /* fallthrough */ 2661 case QETH_CARD_TYPE_IQD: 2662 if ((card->info.guestlan) || 2663 (card->info.mcl_level[0] & 0x80)) { 2664 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2665 card->info.mcl_level[0]]; 2666 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2667 card->info.mcl_level[1]]; 2668 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2669 card->info.mcl_level[2]]; 2670 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2671 card->info.mcl_level[3]]; 2672 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2673 } 2674 break; 2675 default: 2676 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2677 } 2678 if (card->info.portname_required) 2679 qeth_print_status_with_portname(card); 2680 else 2681 qeth_print_status_no_portname(card); 2682 } 2683 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2684 2685 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2686 { 2687 struct qeth_buffer_pool_entry *entry; 2688 2689 QETH_CARD_TEXT(card, 5, "inwrklst"); 2690 2691 list_for_each_entry(entry, 2692 &card->qdio.init_pool.entry_list, init_list) { 2693 qeth_put_buffer_pool_entry(card, entry); 2694 } 2695 } 2696 2697 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2698 struct qeth_card *card) 2699 { 2700 struct list_head *plh; 2701 struct qeth_buffer_pool_entry *entry; 2702 int i, free; 2703 struct page *page; 2704 2705 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2706 return NULL; 2707 2708 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2709 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2710 free = 1; 2711 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2712 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2713 free = 0; 2714 break; 2715 } 2716 } 2717 if (free) { 2718 list_del_init(&entry->list); 2719 return entry; 2720 } 2721 } 2722 2723 /* no free buffer in pool so take first one and swap pages */ 2724 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2725 struct qeth_buffer_pool_entry, list); 2726 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2727 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2728 page = alloc_page(GFP_ATOMIC); 2729 if (!page) { 2730 return NULL; 2731 } else { 2732 free_page((unsigned long)entry->elements[i]); 2733 entry->elements[i] = page_address(page); 2734 if (card->options.performance_stats) 2735 card->perf_stats.sg_alloc_page_rx++; 2736 } 2737 } 2738 } 2739 list_del_init(&entry->list); 2740 return entry; 2741 } 2742 2743 static int qeth_init_input_buffer(struct qeth_card *card, 2744 struct qeth_qdio_buffer *buf) 2745 { 2746 struct qeth_buffer_pool_entry *pool_entry; 2747 int i; 2748 2749 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2750 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2751 if (!buf->rx_skb) 2752 return 1; 2753 } 2754 2755 pool_entry = qeth_find_free_buffer_pool_entry(card); 2756 if (!pool_entry) 2757 return 1; 2758 2759 /* 2760 * since the buffer is accessed only from the input_tasklet 2761 * there shouldn't be a need to synchronize; also, since we use 2762 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2763 * buffers 2764 */ 2765 2766 buf->pool_entry = pool_entry; 2767 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2768 buf->buffer->element[i].length = PAGE_SIZE; 2769 buf->buffer->element[i].addr = pool_entry->elements[i]; 2770 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2771 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2772 else 2773 buf->buffer->element[i].eflags = 0; 2774 buf->buffer->element[i].sflags = 0; 2775 } 2776 return 0; 2777 } 2778 2779 int qeth_init_qdio_queues(struct qeth_card *card) 2780 { 2781 int i, j; 2782 int rc; 2783 2784 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2785 2786 /* inbound queue */ 2787 memset(card->qdio.in_q->qdio_bufs, 0, 2788 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2789 qeth_initialize_working_pool_list(card); 2790 /*give only as many buffers to hardware as we have buffer pool entries*/ 2791 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2792 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2793 card->qdio.in_q->next_buf_to_init = 2794 card->qdio.in_buf_pool.buf_count - 1; 2795 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2796 card->qdio.in_buf_pool.buf_count - 1); 2797 if (rc) { 2798 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2799 return rc; 2800 } 2801 2802 /* completion */ 2803 rc = qeth_cq_init(card); 2804 if (rc) { 2805 return rc; 2806 } 2807 2808 /* outbound queue */ 2809 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2810 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2811 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2812 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2813 qeth_clear_output_buffer(card->qdio.out_qs[i], 2814 card->qdio.out_qs[i]->bufs[j], 2815 QETH_QDIO_BUF_EMPTY); 2816 } 2817 card->qdio.out_qs[i]->card = card; 2818 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2819 card->qdio.out_qs[i]->do_pack = 0; 2820 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2821 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2822 atomic_set(&card->qdio.out_qs[i]->state, 2823 QETH_OUT_Q_UNLOCKED); 2824 } 2825 return 0; 2826 } 2827 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2828 2829 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2830 { 2831 switch (link_type) { 2832 case QETH_LINK_TYPE_HSTR: 2833 return 2; 2834 default: 2835 return 1; 2836 } 2837 } 2838 2839 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2840 struct qeth_ipa_cmd *cmd, __u8 command, 2841 enum qeth_prot_versions prot) 2842 { 2843 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2844 cmd->hdr.command = command; 2845 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2846 cmd->hdr.seqno = card->seqno.ipa; 2847 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2848 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2849 if (card->options.layer2) 2850 cmd->hdr.prim_version_no = 2; 2851 else 2852 cmd->hdr.prim_version_no = 1; 2853 cmd->hdr.param_count = 1; 2854 cmd->hdr.prot_version = prot; 2855 cmd->hdr.ipa_supported = 0; 2856 cmd->hdr.ipa_enabled = 0; 2857 } 2858 2859 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2860 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2861 { 2862 struct qeth_cmd_buffer *iob; 2863 struct qeth_ipa_cmd *cmd; 2864 2865 iob = qeth_wait_for_buffer(&card->write); 2866 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2867 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2868 2869 return iob; 2870 } 2871 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2872 2873 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2874 char prot_type) 2875 { 2876 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2877 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2878 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2879 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2880 } 2881 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2882 2883 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2884 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2885 unsigned long), 2886 void *reply_param) 2887 { 2888 int rc; 2889 char prot_type; 2890 2891 QETH_CARD_TEXT(card, 4, "sendipa"); 2892 2893 if (card->options.layer2) 2894 if (card->info.type == QETH_CARD_TYPE_OSN) 2895 prot_type = QETH_PROT_OSN2; 2896 else 2897 prot_type = QETH_PROT_LAYER2; 2898 else 2899 prot_type = QETH_PROT_TCPIP; 2900 qeth_prepare_ipa_cmd(card, iob, prot_type); 2901 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2902 iob, reply_cb, reply_param); 2903 if (rc == -ETIME) { 2904 qeth_clear_ipacmd_list(card); 2905 qeth_schedule_recovery(card); 2906 } 2907 return rc; 2908 } 2909 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2910 2911 int qeth_send_startlan(struct qeth_card *card) 2912 { 2913 int rc; 2914 struct qeth_cmd_buffer *iob; 2915 2916 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2917 2918 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2919 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2920 return rc; 2921 } 2922 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2923 2924 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2925 struct qeth_reply *reply, unsigned long data) 2926 { 2927 struct qeth_ipa_cmd *cmd; 2928 2929 QETH_CARD_TEXT(card, 4, "defadpcb"); 2930 2931 cmd = (struct qeth_ipa_cmd *) data; 2932 if (cmd->hdr.return_code == 0) 2933 cmd->hdr.return_code = 2934 cmd->data.setadapterparms.hdr.return_code; 2935 return 0; 2936 } 2937 2938 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2939 struct qeth_reply *reply, unsigned long data) 2940 { 2941 struct qeth_ipa_cmd *cmd; 2942 2943 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2944 2945 cmd = (struct qeth_ipa_cmd *) data; 2946 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2947 card->info.link_type = 2948 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2949 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2950 } 2951 card->options.adp.supported_funcs = 2952 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2953 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2954 } 2955 2956 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2957 __u32 command, __u32 cmdlen) 2958 { 2959 struct qeth_cmd_buffer *iob; 2960 struct qeth_ipa_cmd *cmd; 2961 2962 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2963 QETH_PROT_IPV4); 2964 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2965 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2966 cmd->data.setadapterparms.hdr.command_code = command; 2967 cmd->data.setadapterparms.hdr.used_total = 1; 2968 cmd->data.setadapterparms.hdr.seq_no = 1; 2969 2970 return iob; 2971 } 2972 2973 int qeth_query_setadapterparms(struct qeth_card *card) 2974 { 2975 int rc; 2976 struct qeth_cmd_buffer *iob; 2977 2978 QETH_CARD_TEXT(card, 3, "queryadp"); 2979 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2980 sizeof(struct qeth_ipacmd_setadpparms)); 2981 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2982 return rc; 2983 } 2984 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2985 2986 static int qeth_query_ipassists_cb(struct qeth_card *card, 2987 struct qeth_reply *reply, unsigned long data) 2988 { 2989 struct qeth_ipa_cmd *cmd; 2990 2991 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2992 2993 cmd = (struct qeth_ipa_cmd *) data; 2994 2995 switch (cmd->hdr.return_code) { 2996 case IPA_RC_NOTSUPP: 2997 case IPA_RC_L2_UNSUPPORTED_CMD: 2998 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 2999 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3000 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3001 return -0; 3002 default: 3003 if (cmd->hdr.return_code) { 3004 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3005 "rc=%d\n", 3006 dev_name(&card->gdev->dev), 3007 cmd->hdr.return_code); 3008 return 0; 3009 } 3010 } 3011 3012 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3013 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3014 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3015 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3016 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3017 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3018 } else 3019 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3020 "\n", dev_name(&card->gdev->dev)); 3021 return 0; 3022 } 3023 3024 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3025 { 3026 int rc; 3027 struct qeth_cmd_buffer *iob; 3028 3029 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3030 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3031 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3032 return rc; 3033 } 3034 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3035 3036 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3037 struct qeth_reply *reply, unsigned long data) 3038 { 3039 struct qeth_ipa_cmd *cmd; 3040 __u16 rc; 3041 3042 cmd = (struct qeth_ipa_cmd *)data; 3043 rc = cmd->hdr.return_code; 3044 if (rc) 3045 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3046 else 3047 card->info.diagass_support = cmd->data.diagass.ext; 3048 return 0; 3049 } 3050 3051 static int qeth_query_setdiagass(struct qeth_card *card) 3052 { 3053 struct qeth_cmd_buffer *iob; 3054 struct qeth_ipa_cmd *cmd; 3055 3056 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3057 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3058 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3059 cmd->data.diagass.subcmd_len = 16; 3060 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3061 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3062 } 3063 3064 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3065 { 3066 unsigned long info = get_zeroed_page(GFP_KERNEL); 3067 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3068 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3069 struct ccw_dev_id ccwid; 3070 int level; 3071 3072 tid->chpid = card->info.chpid; 3073 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3074 tid->ssid = ccwid.ssid; 3075 tid->devno = ccwid.devno; 3076 if (!info) 3077 return; 3078 level = stsi(NULL, 0, 0, 0); 3079 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3080 tid->lparnr = info222->lpar_number; 3081 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3082 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3083 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3084 } 3085 free_page(info); 3086 return; 3087 } 3088 3089 static int qeth_hw_trap_cb(struct qeth_card *card, 3090 struct qeth_reply *reply, unsigned long data) 3091 { 3092 struct qeth_ipa_cmd *cmd; 3093 __u16 rc; 3094 3095 cmd = (struct qeth_ipa_cmd *)data; 3096 rc = cmd->hdr.return_code; 3097 if (rc) 3098 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3099 return 0; 3100 } 3101 3102 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3103 { 3104 struct qeth_cmd_buffer *iob; 3105 struct qeth_ipa_cmd *cmd; 3106 3107 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3108 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3109 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3110 cmd->data.diagass.subcmd_len = 80; 3111 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3112 cmd->data.diagass.type = 1; 3113 cmd->data.diagass.action = action; 3114 switch (action) { 3115 case QETH_DIAGS_TRAP_ARM: 3116 cmd->data.diagass.options = 0x0003; 3117 cmd->data.diagass.ext = 0x00010000 + 3118 sizeof(struct qeth_trap_id); 3119 qeth_get_trap_id(card, 3120 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3121 break; 3122 case QETH_DIAGS_TRAP_DISARM: 3123 cmd->data.diagass.options = 0x0001; 3124 break; 3125 case QETH_DIAGS_TRAP_CAPTURE: 3126 break; 3127 } 3128 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3129 } 3130 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3131 3132 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3133 unsigned int qdio_error, const char *dbftext) 3134 { 3135 if (qdio_error) { 3136 QETH_CARD_TEXT(card, 2, dbftext); 3137 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3138 buf->element[15].sflags); 3139 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3140 buf->element[14].sflags); 3141 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3142 if ((buf->element[15].sflags) == 0x12) { 3143 card->stats.rx_dropped++; 3144 return 0; 3145 } else 3146 return 1; 3147 } 3148 return 0; 3149 } 3150 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3151 3152 void qeth_buffer_reclaim_work(struct work_struct *work) 3153 { 3154 struct qeth_card *card = container_of(work, struct qeth_card, 3155 buffer_reclaim_work.work); 3156 3157 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3158 qeth_queue_input_buffer(card, card->reclaim_index); 3159 } 3160 3161 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3162 { 3163 struct qeth_qdio_q *queue = card->qdio.in_q; 3164 struct list_head *lh; 3165 int count; 3166 int i; 3167 int rc; 3168 int newcount = 0; 3169 3170 count = (index < queue->next_buf_to_init)? 3171 card->qdio.in_buf_pool.buf_count - 3172 (queue->next_buf_to_init - index) : 3173 card->qdio.in_buf_pool.buf_count - 3174 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3175 /* only requeue at a certain threshold to avoid SIGAs */ 3176 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3177 for (i = queue->next_buf_to_init; 3178 i < queue->next_buf_to_init + count; ++i) { 3179 if (qeth_init_input_buffer(card, 3180 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3181 break; 3182 } else { 3183 newcount++; 3184 } 3185 } 3186 3187 if (newcount < count) { 3188 /* we are in memory shortage so we switch back to 3189 traditional skb allocation and drop packages */ 3190 atomic_set(&card->force_alloc_skb, 3); 3191 count = newcount; 3192 } else { 3193 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3194 } 3195 3196 if (!count) { 3197 i = 0; 3198 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3199 i++; 3200 if (i == card->qdio.in_buf_pool.buf_count) { 3201 QETH_CARD_TEXT(card, 2, "qsarbw"); 3202 card->reclaim_index = index; 3203 schedule_delayed_work( 3204 &card->buffer_reclaim_work, 3205 QETH_RECLAIM_WORK_TIME); 3206 } 3207 return; 3208 } 3209 3210 /* 3211 * according to old code it should be avoided to requeue all 3212 * 128 buffers in order to benefit from PCI avoidance. 3213 * this function keeps at least one buffer (the buffer at 3214 * 'index') un-requeued -> this buffer is the first buffer that 3215 * will be requeued the next time 3216 */ 3217 if (card->options.performance_stats) { 3218 card->perf_stats.inbound_do_qdio_cnt++; 3219 card->perf_stats.inbound_do_qdio_start_time = 3220 qeth_get_micros(); 3221 } 3222 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3223 queue->next_buf_to_init, count); 3224 if (card->options.performance_stats) 3225 card->perf_stats.inbound_do_qdio_time += 3226 qeth_get_micros() - 3227 card->perf_stats.inbound_do_qdio_start_time; 3228 if (rc) { 3229 QETH_CARD_TEXT(card, 2, "qinberr"); 3230 } 3231 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3232 QDIO_MAX_BUFFERS_PER_Q; 3233 } 3234 } 3235 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3236 3237 static int qeth_handle_send_error(struct qeth_card *card, 3238 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3239 { 3240 int sbalf15 = buffer->buffer->element[15].sflags; 3241 3242 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3243 if (card->info.type == QETH_CARD_TYPE_IQD) { 3244 if (sbalf15 == 0) { 3245 qdio_err = 0; 3246 } else { 3247 qdio_err = 1; 3248 } 3249 } 3250 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3251 3252 if (!qdio_err) 3253 return QETH_SEND_ERROR_NONE; 3254 3255 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3256 return QETH_SEND_ERROR_RETRY; 3257 3258 QETH_CARD_TEXT(card, 1, "lnkfail"); 3259 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3260 (u16)qdio_err, (u8)sbalf15); 3261 return QETH_SEND_ERROR_LINK_FAILURE; 3262 } 3263 3264 /* 3265 * Switched to packing state if the number of used buffers on a queue 3266 * reaches a certain limit. 3267 */ 3268 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3269 { 3270 if (!queue->do_pack) { 3271 if (atomic_read(&queue->used_buffers) 3272 >= QETH_HIGH_WATERMARK_PACK){ 3273 /* switch non-PACKING -> PACKING */ 3274 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3275 if (queue->card->options.performance_stats) 3276 queue->card->perf_stats.sc_dp_p++; 3277 queue->do_pack = 1; 3278 } 3279 } 3280 } 3281 3282 /* 3283 * Switches from packing to non-packing mode. If there is a packing 3284 * buffer on the queue this buffer will be prepared to be flushed. 3285 * In that case 1 is returned to inform the caller. If no buffer 3286 * has to be flushed, zero is returned. 3287 */ 3288 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3289 { 3290 struct qeth_qdio_out_buffer *buffer; 3291 int flush_count = 0; 3292 3293 if (queue->do_pack) { 3294 if (atomic_read(&queue->used_buffers) 3295 <= QETH_LOW_WATERMARK_PACK) { 3296 /* switch PACKING -> non-PACKING */ 3297 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3298 if (queue->card->options.performance_stats) 3299 queue->card->perf_stats.sc_p_dp++; 3300 queue->do_pack = 0; 3301 /* flush packing buffers */ 3302 buffer = queue->bufs[queue->next_buf_to_fill]; 3303 if ((atomic_read(&buffer->state) == 3304 QETH_QDIO_BUF_EMPTY) && 3305 (buffer->next_element_to_fill > 0)) { 3306 atomic_set(&buffer->state, 3307 QETH_QDIO_BUF_PRIMED); 3308 flush_count++; 3309 queue->next_buf_to_fill = 3310 (queue->next_buf_to_fill + 1) % 3311 QDIO_MAX_BUFFERS_PER_Q; 3312 } 3313 } 3314 } 3315 return flush_count; 3316 } 3317 3318 3319 /* 3320 * Called to flush a packing buffer if no more pci flags are on the queue. 3321 * Checks if there is a packing buffer and prepares it to be flushed. 3322 * In that case returns 1, otherwise zero. 3323 */ 3324 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3325 { 3326 struct qeth_qdio_out_buffer *buffer; 3327 3328 buffer = queue->bufs[queue->next_buf_to_fill]; 3329 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3330 (buffer->next_element_to_fill > 0)) { 3331 /* it's a packing buffer */ 3332 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3333 queue->next_buf_to_fill = 3334 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3335 return 1; 3336 } 3337 return 0; 3338 } 3339 3340 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3341 int count) 3342 { 3343 struct qeth_qdio_out_buffer *buf; 3344 int rc; 3345 int i; 3346 unsigned int qdio_flags; 3347 3348 for (i = index; i < index + count; ++i) { 3349 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3350 buf = queue->bufs[bidx]; 3351 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3352 SBAL_EFLAGS_LAST_ENTRY; 3353 3354 if (queue->bufstates) 3355 queue->bufstates[bidx].user = buf; 3356 3357 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3358 continue; 3359 3360 if (!queue->do_pack) { 3361 if ((atomic_read(&queue->used_buffers) >= 3362 (QETH_HIGH_WATERMARK_PACK - 3363 QETH_WATERMARK_PACK_FUZZ)) && 3364 !atomic_read(&queue->set_pci_flags_count)) { 3365 /* it's likely that we'll go to packing 3366 * mode soon */ 3367 atomic_inc(&queue->set_pci_flags_count); 3368 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3369 } 3370 } else { 3371 if (!atomic_read(&queue->set_pci_flags_count)) { 3372 /* 3373 * there's no outstanding PCI any more, so we 3374 * have to request a PCI to be sure the the PCI 3375 * will wake at some time in the future then we 3376 * can flush packed buffers that might still be 3377 * hanging around, which can happen if no 3378 * further send was requested by the stack 3379 */ 3380 atomic_inc(&queue->set_pci_flags_count); 3381 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3382 } 3383 } 3384 } 3385 3386 queue->card->dev->trans_start = jiffies; 3387 if (queue->card->options.performance_stats) { 3388 queue->card->perf_stats.outbound_do_qdio_cnt++; 3389 queue->card->perf_stats.outbound_do_qdio_start_time = 3390 qeth_get_micros(); 3391 } 3392 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3393 if (atomic_read(&queue->set_pci_flags_count)) 3394 qdio_flags |= QDIO_FLAG_PCI_OUT; 3395 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3396 queue->queue_no, index, count); 3397 if (queue->card->options.performance_stats) 3398 queue->card->perf_stats.outbound_do_qdio_time += 3399 qeth_get_micros() - 3400 queue->card->perf_stats.outbound_do_qdio_start_time; 3401 atomic_add(count, &queue->used_buffers); 3402 if (rc) { 3403 queue->card->stats.tx_errors += count; 3404 /* ignore temporary SIGA errors without busy condition */ 3405 if (rc == -ENOBUFS) 3406 return; 3407 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3408 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3409 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3410 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3411 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3412 3413 /* this must not happen under normal circumstances. if it 3414 * happens something is really wrong -> recover */ 3415 qeth_schedule_recovery(queue->card); 3416 return; 3417 } 3418 if (queue->card->options.performance_stats) 3419 queue->card->perf_stats.bufs_sent += count; 3420 } 3421 3422 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3423 { 3424 int index; 3425 int flush_cnt = 0; 3426 int q_was_packing = 0; 3427 3428 /* 3429 * check if weed have to switch to non-packing mode or if 3430 * we have to get a pci flag out on the queue 3431 */ 3432 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3433 !atomic_read(&queue->set_pci_flags_count)) { 3434 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3435 QETH_OUT_Q_UNLOCKED) { 3436 /* 3437 * If we get in here, there was no action in 3438 * do_send_packet. So, we check if there is a 3439 * packing buffer to be flushed here. 3440 */ 3441 netif_stop_queue(queue->card->dev); 3442 index = queue->next_buf_to_fill; 3443 q_was_packing = queue->do_pack; 3444 /* queue->do_pack may change */ 3445 barrier(); 3446 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3447 if (!flush_cnt && 3448 !atomic_read(&queue->set_pci_flags_count)) 3449 flush_cnt += 3450 qeth_flush_buffers_on_no_pci(queue); 3451 if (queue->card->options.performance_stats && 3452 q_was_packing) 3453 queue->card->perf_stats.bufs_sent_pack += 3454 flush_cnt; 3455 if (flush_cnt) 3456 qeth_flush_buffers(queue, index, flush_cnt); 3457 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3458 } 3459 } 3460 } 3461 3462 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3463 unsigned long card_ptr) 3464 { 3465 struct qeth_card *card = (struct qeth_card *)card_ptr; 3466 3467 if (card->dev && (card->dev->flags & IFF_UP)) 3468 napi_schedule(&card->napi); 3469 } 3470 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3471 3472 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3473 { 3474 int rc; 3475 3476 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3477 rc = -1; 3478 goto out; 3479 } else { 3480 if (card->options.cq == cq) { 3481 rc = 0; 3482 goto out; 3483 } 3484 3485 if (card->state != CARD_STATE_DOWN && 3486 card->state != CARD_STATE_RECOVER) { 3487 rc = -1; 3488 goto out; 3489 } 3490 3491 qeth_free_qdio_buffers(card); 3492 card->options.cq = cq; 3493 rc = 0; 3494 } 3495 out: 3496 return rc; 3497 3498 } 3499 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3500 3501 3502 static void qeth_qdio_cq_handler(struct qeth_card *card, 3503 unsigned int qdio_err, 3504 unsigned int queue, int first_element, int count) { 3505 struct qeth_qdio_q *cq = card->qdio.c_q; 3506 int i; 3507 int rc; 3508 3509 if (!qeth_is_cq(card, queue)) 3510 goto out; 3511 3512 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3513 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3514 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3515 3516 if (qdio_err) { 3517 netif_stop_queue(card->dev); 3518 qeth_schedule_recovery(card); 3519 goto out; 3520 } 3521 3522 if (card->options.performance_stats) { 3523 card->perf_stats.cq_cnt++; 3524 card->perf_stats.cq_start_time = qeth_get_micros(); 3525 } 3526 3527 for (i = first_element; i < first_element + count; ++i) { 3528 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3529 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3530 int e; 3531 3532 e = 0; 3533 while (buffer->element[e].addr) { 3534 unsigned long phys_aob_addr; 3535 3536 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3537 qeth_qdio_handle_aob(card, phys_aob_addr); 3538 buffer->element[e].addr = NULL; 3539 buffer->element[e].eflags = 0; 3540 buffer->element[e].sflags = 0; 3541 buffer->element[e].length = 0; 3542 3543 ++e; 3544 } 3545 3546 buffer->element[15].eflags = 0; 3547 buffer->element[15].sflags = 0; 3548 } 3549 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3550 card->qdio.c_q->next_buf_to_init, 3551 count); 3552 if (rc) { 3553 dev_warn(&card->gdev->dev, 3554 "QDIO reported an error, rc=%i\n", rc); 3555 QETH_CARD_TEXT(card, 2, "qcqherr"); 3556 } 3557 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3558 + count) % QDIO_MAX_BUFFERS_PER_Q; 3559 3560 netif_wake_queue(card->dev); 3561 3562 if (card->options.performance_stats) { 3563 int delta_t = qeth_get_micros(); 3564 delta_t -= card->perf_stats.cq_start_time; 3565 card->perf_stats.cq_time += delta_t; 3566 } 3567 out: 3568 return; 3569 } 3570 3571 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3572 unsigned int queue, int first_elem, int count, 3573 unsigned long card_ptr) 3574 { 3575 struct qeth_card *card = (struct qeth_card *)card_ptr; 3576 3577 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3578 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3579 3580 if (qeth_is_cq(card, queue)) 3581 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3582 else if (qdio_err) 3583 qeth_schedule_recovery(card); 3584 3585 3586 } 3587 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3588 3589 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3590 unsigned int qdio_error, int __queue, int first_element, 3591 int count, unsigned long card_ptr) 3592 { 3593 struct qeth_card *card = (struct qeth_card *) card_ptr; 3594 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3595 struct qeth_qdio_out_buffer *buffer; 3596 int i; 3597 3598 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3599 if (qdio_error & QDIO_ERROR_FATAL) { 3600 QETH_CARD_TEXT(card, 2, "achkcond"); 3601 netif_stop_queue(card->dev); 3602 qeth_schedule_recovery(card); 3603 return; 3604 } 3605 if (card->options.performance_stats) { 3606 card->perf_stats.outbound_handler_cnt++; 3607 card->perf_stats.outbound_handler_start_time = 3608 qeth_get_micros(); 3609 } 3610 for (i = first_element; i < (first_element + count); ++i) { 3611 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3612 buffer = queue->bufs[bidx]; 3613 qeth_handle_send_error(card, buffer, qdio_error); 3614 3615 if (queue->bufstates && 3616 (queue->bufstates[bidx].flags & 3617 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3618 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3619 3620 if (atomic_cmpxchg(&buffer->state, 3621 QETH_QDIO_BUF_PRIMED, 3622 QETH_QDIO_BUF_PENDING) == 3623 QETH_QDIO_BUF_PRIMED) { 3624 qeth_notify_skbs(queue, buffer, 3625 TX_NOTIFY_PENDING); 3626 } 3627 buffer->aob = queue->bufstates[bidx].aob; 3628 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3629 QETH_CARD_TEXT(queue->card, 5, "aob"); 3630 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3631 virt_to_phys(buffer->aob)); 3632 if (qeth_init_qdio_out_buf(queue, bidx)) { 3633 QETH_CARD_TEXT(card, 2, "outofbuf"); 3634 qeth_schedule_recovery(card); 3635 } 3636 } else { 3637 if (card->options.cq == QETH_CQ_ENABLED) { 3638 enum iucv_tx_notify n; 3639 3640 n = qeth_compute_cq_notification( 3641 buffer->buffer->element[15].sflags, 0); 3642 qeth_notify_skbs(queue, buffer, n); 3643 } 3644 3645 qeth_clear_output_buffer(queue, buffer, 3646 QETH_QDIO_BUF_EMPTY); 3647 } 3648 qeth_cleanup_handled_pending(queue, bidx, 0); 3649 } 3650 atomic_sub(count, &queue->used_buffers); 3651 /* check if we need to do something on this outbound queue */ 3652 if (card->info.type != QETH_CARD_TYPE_IQD) 3653 qeth_check_outbound_queue(queue); 3654 3655 netif_wake_queue(queue->card->dev); 3656 if (card->options.performance_stats) 3657 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3658 card->perf_stats.outbound_handler_start_time; 3659 } 3660 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3661 3662 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3663 int ipv, int cast_type) 3664 { 3665 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3666 card->info.type == QETH_CARD_TYPE_OSX)) 3667 return card->qdio.default_out_queue; 3668 switch (card->qdio.no_out_queues) { 3669 case 4: 3670 if (cast_type && card->info.is_multicast_different) 3671 return card->info.is_multicast_different & 3672 (card->qdio.no_out_queues - 1); 3673 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3674 const u8 tos = ip_hdr(skb)->tos; 3675 3676 if (card->qdio.do_prio_queueing == 3677 QETH_PRIO_Q_ING_TOS) { 3678 if (tos & IP_TOS_NOTIMPORTANT) 3679 return 3; 3680 if (tos & IP_TOS_HIGHRELIABILITY) 3681 return 2; 3682 if (tos & IP_TOS_HIGHTHROUGHPUT) 3683 return 1; 3684 if (tos & IP_TOS_LOWDELAY) 3685 return 0; 3686 } 3687 if (card->qdio.do_prio_queueing == 3688 QETH_PRIO_Q_ING_PREC) 3689 return 3 - (tos >> 6); 3690 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3691 /* TODO: IPv6!!! */ 3692 } 3693 return card->qdio.default_out_queue; 3694 case 1: /* fallthrough for single-out-queue 1920-device */ 3695 default: 3696 return card->qdio.default_out_queue; 3697 } 3698 } 3699 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3700 3701 int qeth_get_elements_for_frags(struct sk_buff *skb) 3702 { 3703 int cnt, length, e, elements = 0; 3704 struct skb_frag_struct *frag; 3705 char *data; 3706 3707 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3708 frag = &skb_shinfo(skb)->frags[cnt]; 3709 data = (char *)page_to_phys(skb_frag_page(frag)) + 3710 frag->page_offset; 3711 length = frag->size; 3712 e = PFN_UP((unsigned long)data + length - 1) - 3713 PFN_DOWN((unsigned long)data); 3714 elements += e; 3715 } 3716 return elements; 3717 } 3718 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3719 3720 int qeth_get_elements_no(struct qeth_card *card, 3721 struct sk_buff *skb, int elems) 3722 { 3723 int dlen = skb->len - skb->data_len; 3724 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3725 PFN_DOWN((unsigned long)skb->data); 3726 3727 elements_needed += qeth_get_elements_for_frags(skb); 3728 3729 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3730 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3731 "(Number=%d / Length=%d). Discarded.\n", 3732 (elements_needed+elems), skb->len); 3733 return 0; 3734 } 3735 return elements_needed; 3736 } 3737 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3738 3739 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3740 { 3741 int hroom, inpage, rest; 3742 3743 if (((unsigned long)skb->data & PAGE_MASK) != 3744 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3745 hroom = skb_headroom(skb); 3746 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3747 rest = len - inpage; 3748 if (rest > hroom) 3749 return 1; 3750 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3751 skb->data -= rest; 3752 skb->tail -= rest; 3753 *hdr = (struct qeth_hdr *)skb->data; 3754 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3755 } 3756 return 0; 3757 } 3758 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3759 3760 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3761 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3762 int offset) 3763 { 3764 int length = skb->len - skb->data_len; 3765 int length_here; 3766 int element; 3767 char *data; 3768 int first_lap, cnt; 3769 struct skb_frag_struct *frag; 3770 3771 element = *next_element_to_fill; 3772 data = skb->data; 3773 first_lap = (is_tso == 0 ? 1 : 0); 3774 3775 if (offset >= 0) { 3776 data = skb->data + offset; 3777 length -= offset; 3778 first_lap = 0; 3779 } 3780 3781 while (length > 0) { 3782 /* length_here is the remaining amount of data in this page */ 3783 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3784 if (length < length_here) 3785 length_here = length; 3786 3787 buffer->element[element].addr = data; 3788 buffer->element[element].length = length_here; 3789 length -= length_here; 3790 if (!length) { 3791 if (first_lap) 3792 if (skb_shinfo(skb)->nr_frags) 3793 buffer->element[element].eflags = 3794 SBAL_EFLAGS_FIRST_FRAG; 3795 else 3796 buffer->element[element].eflags = 0; 3797 else 3798 buffer->element[element].eflags = 3799 SBAL_EFLAGS_MIDDLE_FRAG; 3800 } else { 3801 if (first_lap) 3802 buffer->element[element].eflags = 3803 SBAL_EFLAGS_FIRST_FRAG; 3804 else 3805 buffer->element[element].eflags = 3806 SBAL_EFLAGS_MIDDLE_FRAG; 3807 } 3808 data += length_here; 3809 element++; 3810 first_lap = 0; 3811 } 3812 3813 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3814 frag = &skb_shinfo(skb)->frags[cnt]; 3815 data = (char *)page_to_phys(skb_frag_page(frag)) + 3816 frag->page_offset; 3817 length = frag->size; 3818 while (length > 0) { 3819 length_here = PAGE_SIZE - 3820 ((unsigned long) data % PAGE_SIZE); 3821 if (length < length_here) 3822 length_here = length; 3823 3824 buffer->element[element].addr = data; 3825 buffer->element[element].length = length_here; 3826 buffer->element[element].eflags = 3827 SBAL_EFLAGS_MIDDLE_FRAG; 3828 length -= length_here; 3829 data += length_here; 3830 element++; 3831 } 3832 } 3833 3834 if (buffer->element[element - 1].eflags) 3835 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3836 *next_element_to_fill = element; 3837 } 3838 3839 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3840 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3841 struct qeth_hdr *hdr, int offset, int hd_len) 3842 { 3843 struct qdio_buffer *buffer; 3844 int flush_cnt = 0, hdr_len, large_send = 0; 3845 3846 buffer = buf->buffer; 3847 atomic_inc(&skb->users); 3848 skb_queue_tail(&buf->skb_list, skb); 3849 3850 /*check first on TSO ....*/ 3851 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3852 int element = buf->next_element_to_fill; 3853 3854 hdr_len = sizeof(struct qeth_hdr_tso) + 3855 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3856 /*fill first buffer entry only with header information */ 3857 buffer->element[element].addr = skb->data; 3858 buffer->element[element].length = hdr_len; 3859 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3860 buf->next_element_to_fill++; 3861 skb->data += hdr_len; 3862 skb->len -= hdr_len; 3863 large_send = 1; 3864 } 3865 3866 if (offset >= 0) { 3867 int element = buf->next_element_to_fill; 3868 buffer->element[element].addr = hdr; 3869 buffer->element[element].length = sizeof(struct qeth_hdr) + 3870 hd_len; 3871 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3872 buf->is_header[element] = 1; 3873 buf->next_element_to_fill++; 3874 } 3875 3876 __qeth_fill_buffer(skb, buffer, large_send, 3877 (int *)&buf->next_element_to_fill, offset); 3878 3879 if (!queue->do_pack) { 3880 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3881 /* set state to PRIMED -> will be flushed */ 3882 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3883 flush_cnt = 1; 3884 } else { 3885 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3886 if (queue->card->options.performance_stats) 3887 queue->card->perf_stats.skbs_sent_pack++; 3888 if (buf->next_element_to_fill >= 3889 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3890 /* 3891 * packed buffer if full -> set state PRIMED 3892 * -> will be flushed 3893 */ 3894 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3895 flush_cnt = 1; 3896 } 3897 } 3898 return flush_cnt; 3899 } 3900 3901 int qeth_do_send_packet_fast(struct qeth_card *card, 3902 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3903 struct qeth_hdr *hdr, int elements_needed, 3904 int offset, int hd_len) 3905 { 3906 struct qeth_qdio_out_buffer *buffer; 3907 int index; 3908 3909 /* spin until we get the queue ... */ 3910 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3911 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3912 /* ... now we've got the queue */ 3913 index = queue->next_buf_to_fill; 3914 buffer = queue->bufs[queue->next_buf_to_fill]; 3915 /* 3916 * check if buffer is empty to make sure that we do not 'overtake' 3917 * ourselves and try to fill a buffer that is already primed 3918 */ 3919 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3920 goto out; 3921 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3922 QDIO_MAX_BUFFERS_PER_Q; 3923 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3924 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3925 qeth_flush_buffers(queue, index, 1); 3926 return 0; 3927 out: 3928 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3929 return -EBUSY; 3930 } 3931 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3932 3933 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3934 struct sk_buff *skb, struct qeth_hdr *hdr, 3935 int elements_needed) 3936 { 3937 struct qeth_qdio_out_buffer *buffer; 3938 int start_index; 3939 int flush_count = 0; 3940 int do_pack = 0; 3941 int tmp; 3942 int rc = 0; 3943 3944 /* spin until we get the queue ... */ 3945 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3946 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3947 start_index = queue->next_buf_to_fill; 3948 buffer = queue->bufs[queue->next_buf_to_fill]; 3949 /* 3950 * check if buffer is empty to make sure that we do not 'overtake' 3951 * ourselves and try to fill a buffer that is already primed 3952 */ 3953 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3954 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3955 return -EBUSY; 3956 } 3957 /* check if we need to switch packing state of this queue */ 3958 qeth_switch_to_packing_if_needed(queue); 3959 if (queue->do_pack) { 3960 do_pack = 1; 3961 /* does packet fit in current buffer? */ 3962 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3963 buffer->next_element_to_fill) < elements_needed) { 3964 /* ... no -> set state PRIMED */ 3965 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3966 flush_count++; 3967 queue->next_buf_to_fill = 3968 (queue->next_buf_to_fill + 1) % 3969 QDIO_MAX_BUFFERS_PER_Q; 3970 buffer = queue->bufs[queue->next_buf_to_fill]; 3971 /* we did a step forward, so check buffer state 3972 * again */ 3973 if (atomic_read(&buffer->state) != 3974 QETH_QDIO_BUF_EMPTY) { 3975 qeth_flush_buffers(queue, start_index, 3976 flush_count); 3977 atomic_set(&queue->state, 3978 QETH_OUT_Q_UNLOCKED); 3979 return -EBUSY; 3980 } 3981 } 3982 } 3983 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3984 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3985 QDIO_MAX_BUFFERS_PER_Q; 3986 flush_count += tmp; 3987 if (flush_count) 3988 qeth_flush_buffers(queue, start_index, flush_count); 3989 else if (!atomic_read(&queue->set_pci_flags_count)) 3990 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3991 /* 3992 * queue->state will go from LOCKED -> UNLOCKED or from 3993 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3994 * (switch packing state or flush buffer to get another pci flag out). 3995 * In that case we will enter this loop 3996 */ 3997 while (atomic_dec_return(&queue->state)) { 3998 flush_count = 0; 3999 start_index = queue->next_buf_to_fill; 4000 /* check if we can go back to non-packing state */ 4001 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4002 /* 4003 * check if we need to flush a packing buffer to get a pci 4004 * flag out on the queue 4005 */ 4006 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4007 flush_count += qeth_flush_buffers_on_no_pci(queue); 4008 if (flush_count) 4009 qeth_flush_buffers(queue, start_index, flush_count); 4010 } 4011 /* at this point the queue is UNLOCKED again */ 4012 if (queue->card->options.performance_stats && do_pack) 4013 queue->card->perf_stats.bufs_sent_pack += flush_count; 4014 4015 return rc; 4016 } 4017 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4018 4019 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4020 struct qeth_reply *reply, unsigned long data) 4021 { 4022 struct qeth_ipa_cmd *cmd; 4023 struct qeth_ipacmd_setadpparms *setparms; 4024 4025 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4026 4027 cmd = (struct qeth_ipa_cmd *) data; 4028 setparms = &(cmd->data.setadapterparms); 4029 4030 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4031 if (cmd->hdr.return_code) { 4032 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 4033 setparms->data.mode = SET_PROMISC_MODE_OFF; 4034 } 4035 card->info.promisc_mode = setparms->data.mode; 4036 return 0; 4037 } 4038 4039 void qeth_setadp_promisc_mode(struct qeth_card *card) 4040 { 4041 enum qeth_ipa_promisc_modes mode; 4042 struct net_device *dev = card->dev; 4043 struct qeth_cmd_buffer *iob; 4044 struct qeth_ipa_cmd *cmd; 4045 4046 QETH_CARD_TEXT(card, 4, "setprom"); 4047 4048 if (((dev->flags & IFF_PROMISC) && 4049 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4050 (!(dev->flags & IFF_PROMISC) && 4051 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4052 return; 4053 mode = SET_PROMISC_MODE_OFF; 4054 if (dev->flags & IFF_PROMISC) 4055 mode = SET_PROMISC_MODE_ON; 4056 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4057 4058 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4059 sizeof(struct qeth_ipacmd_setadpparms)); 4060 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4061 cmd->data.setadapterparms.data.mode = mode; 4062 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4063 } 4064 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4065 4066 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4067 { 4068 struct qeth_card *card; 4069 char dbf_text[15]; 4070 4071 card = dev->ml_priv; 4072 4073 QETH_CARD_TEXT(card, 4, "chgmtu"); 4074 sprintf(dbf_text, "%8x", new_mtu); 4075 QETH_CARD_TEXT(card, 4, dbf_text); 4076 4077 if (new_mtu < 64) 4078 return -EINVAL; 4079 if (new_mtu > 65535) 4080 return -EINVAL; 4081 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4082 (!qeth_mtu_is_valid(card, new_mtu))) 4083 return -EINVAL; 4084 dev->mtu = new_mtu; 4085 return 0; 4086 } 4087 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4088 4089 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4090 { 4091 struct qeth_card *card; 4092 4093 card = dev->ml_priv; 4094 4095 QETH_CARD_TEXT(card, 5, "getstat"); 4096 4097 return &card->stats; 4098 } 4099 EXPORT_SYMBOL_GPL(qeth_get_stats); 4100 4101 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4102 struct qeth_reply *reply, unsigned long data) 4103 { 4104 struct qeth_ipa_cmd *cmd; 4105 4106 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4107 4108 cmd = (struct qeth_ipa_cmd *) data; 4109 if (!card->options.layer2 || 4110 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4111 memcpy(card->dev->dev_addr, 4112 &cmd->data.setadapterparms.data.change_addr.addr, 4113 OSA_ADDR_LEN); 4114 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4115 } 4116 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4117 return 0; 4118 } 4119 4120 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4121 { 4122 int rc; 4123 struct qeth_cmd_buffer *iob; 4124 struct qeth_ipa_cmd *cmd; 4125 4126 QETH_CARD_TEXT(card, 4, "chgmac"); 4127 4128 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4129 sizeof(struct qeth_ipacmd_setadpparms)); 4130 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4131 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4132 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4133 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4134 card->dev->dev_addr, OSA_ADDR_LEN); 4135 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4136 NULL); 4137 return rc; 4138 } 4139 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4140 4141 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4142 struct qeth_reply *reply, unsigned long data) 4143 { 4144 struct qeth_ipa_cmd *cmd; 4145 struct qeth_set_access_ctrl *access_ctrl_req; 4146 int fallback = *(int *)reply->param; 4147 4148 QETH_CARD_TEXT(card, 4, "setaccb"); 4149 4150 cmd = (struct qeth_ipa_cmd *) data; 4151 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4152 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4153 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4154 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4155 cmd->data.setadapterparms.hdr.return_code); 4156 if (cmd->data.setadapterparms.hdr.return_code != 4157 SET_ACCESS_CTRL_RC_SUCCESS) 4158 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4159 card->gdev->dev.kobj.name, 4160 access_ctrl_req->subcmd_code, 4161 cmd->data.setadapterparms.hdr.return_code); 4162 switch (cmd->data.setadapterparms.hdr.return_code) { 4163 case SET_ACCESS_CTRL_RC_SUCCESS: 4164 if (card->options.isolation == ISOLATION_MODE_NONE) { 4165 dev_info(&card->gdev->dev, 4166 "QDIO data connection isolation is deactivated\n"); 4167 } else { 4168 dev_info(&card->gdev->dev, 4169 "QDIO data connection isolation is activated\n"); 4170 } 4171 break; 4172 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4173 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4174 "deactivated\n", dev_name(&card->gdev->dev)); 4175 if (fallback) 4176 card->options.isolation = card->options.prev_isolation; 4177 break; 4178 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4179 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4180 " activated\n", dev_name(&card->gdev->dev)); 4181 if (fallback) 4182 card->options.isolation = card->options.prev_isolation; 4183 break; 4184 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4185 dev_err(&card->gdev->dev, "Adapter does not " 4186 "support QDIO data connection isolation\n"); 4187 break; 4188 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4189 dev_err(&card->gdev->dev, 4190 "Adapter is dedicated. " 4191 "QDIO data connection isolation not supported\n"); 4192 if (fallback) 4193 card->options.isolation = card->options.prev_isolation; 4194 break; 4195 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4196 dev_err(&card->gdev->dev, 4197 "TSO does not permit QDIO data connection isolation\n"); 4198 if (fallback) 4199 card->options.isolation = card->options.prev_isolation; 4200 break; 4201 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4202 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4203 "support reflective relay mode\n"); 4204 if (fallback) 4205 card->options.isolation = card->options.prev_isolation; 4206 break; 4207 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4208 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4209 "enabled at the adjacent switch port"); 4210 if (fallback) 4211 card->options.isolation = card->options.prev_isolation; 4212 break; 4213 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4214 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4215 "at the adjacent switch failed\n"); 4216 break; 4217 default: 4218 /* this should never happen */ 4219 if (fallback) 4220 card->options.isolation = card->options.prev_isolation; 4221 break; 4222 } 4223 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4224 return 0; 4225 } 4226 4227 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4228 enum qeth_ipa_isolation_modes isolation, int fallback) 4229 { 4230 int rc; 4231 struct qeth_cmd_buffer *iob; 4232 struct qeth_ipa_cmd *cmd; 4233 struct qeth_set_access_ctrl *access_ctrl_req; 4234 4235 QETH_CARD_TEXT(card, 4, "setacctl"); 4236 4237 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4238 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4239 4240 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4241 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4242 sizeof(struct qeth_set_access_ctrl)); 4243 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4244 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4245 access_ctrl_req->subcmd_code = isolation; 4246 4247 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4248 &fallback); 4249 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4250 return rc; 4251 } 4252 4253 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4254 { 4255 int rc = 0; 4256 4257 QETH_CARD_TEXT(card, 4, "setactlo"); 4258 4259 if ((card->info.type == QETH_CARD_TYPE_OSD || 4260 card->info.type == QETH_CARD_TYPE_OSX) && 4261 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4262 rc = qeth_setadpparms_set_access_ctrl(card, 4263 card->options.isolation, fallback); 4264 if (rc) { 4265 QETH_DBF_MESSAGE(3, 4266 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4267 card->gdev->dev.kobj.name, 4268 rc); 4269 rc = -EOPNOTSUPP; 4270 } 4271 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4272 card->options.isolation = ISOLATION_MODE_NONE; 4273 4274 dev_err(&card->gdev->dev, "Adapter does not " 4275 "support QDIO data connection isolation\n"); 4276 rc = -EOPNOTSUPP; 4277 } 4278 return rc; 4279 } 4280 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4281 4282 void qeth_tx_timeout(struct net_device *dev) 4283 { 4284 struct qeth_card *card; 4285 4286 card = dev->ml_priv; 4287 QETH_CARD_TEXT(card, 4, "txtimeo"); 4288 card->stats.tx_errors++; 4289 qeth_schedule_recovery(card); 4290 } 4291 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4292 4293 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4294 { 4295 struct qeth_card *card = dev->ml_priv; 4296 int rc = 0; 4297 4298 switch (regnum) { 4299 case MII_BMCR: /* Basic mode control register */ 4300 rc = BMCR_FULLDPLX; 4301 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4302 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4303 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4304 rc |= BMCR_SPEED100; 4305 break; 4306 case MII_BMSR: /* Basic mode status register */ 4307 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4308 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4309 BMSR_100BASE4; 4310 break; 4311 case MII_PHYSID1: /* PHYS ID 1 */ 4312 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4313 dev->dev_addr[2]; 4314 rc = (rc >> 5) & 0xFFFF; 4315 break; 4316 case MII_PHYSID2: /* PHYS ID 2 */ 4317 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4318 break; 4319 case MII_ADVERTISE: /* Advertisement control reg */ 4320 rc = ADVERTISE_ALL; 4321 break; 4322 case MII_LPA: /* Link partner ability reg */ 4323 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4324 LPA_100BASE4 | LPA_LPACK; 4325 break; 4326 case MII_EXPANSION: /* Expansion register */ 4327 break; 4328 case MII_DCOUNTER: /* disconnect counter */ 4329 break; 4330 case MII_FCSCOUNTER: /* false carrier counter */ 4331 break; 4332 case MII_NWAYTEST: /* N-way auto-neg test register */ 4333 break; 4334 case MII_RERRCOUNTER: /* rx error counter */ 4335 rc = card->stats.rx_errors; 4336 break; 4337 case MII_SREVISION: /* silicon revision */ 4338 break; 4339 case MII_RESV1: /* reserved 1 */ 4340 break; 4341 case MII_LBRERROR: /* loopback, rx, bypass error */ 4342 break; 4343 case MII_PHYADDR: /* physical address */ 4344 break; 4345 case MII_RESV2: /* reserved 2 */ 4346 break; 4347 case MII_TPISTATUS: /* TPI status for 10mbps */ 4348 break; 4349 case MII_NCONFIG: /* network interface config */ 4350 break; 4351 default: 4352 break; 4353 } 4354 return rc; 4355 } 4356 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4357 4358 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4359 struct qeth_cmd_buffer *iob, int len, 4360 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4361 unsigned long), 4362 void *reply_param) 4363 { 4364 u16 s1, s2; 4365 4366 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4367 4368 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4369 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4370 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4371 /* adjust PDU length fields in IPA_PDU_HEADER */ 4372 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4373 s2 = (u32) len; 4374 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4375 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4376 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4377 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4378 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4379 reply_cb, reply_param); 4380 } 4381 4382 static int qeth_snmp_command_cb(struct qeth_card *card, 4383 struct qeth_reply *reply, unsigned long sdata) 4384 { 4385 struct qeth_ipa_cmd *cmd; 4386 struct qeth_arp_query_info *qinfo; 4387 struct qeth_snmp_cmd *snmp; 4388 unsigned char *data; 4389 __u16 data_len; 4390 4391 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4392 4393 cmd = (struct qeth_ipa_cmd *) sdata; 4394 data = (unsigned char *)((char *)cmd - reply->offset); 4395 qinfo = (struct qeth_arp_query_info *) reply->param; 4396 snmp = &cmd->data.setadapterparms.data.snmp; 4397 4398 if (cmd->hdr.return_code) { 4399 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4400 return 0; 4401 } 4402 if (cmd->data.setadapterparms.hdr.return_code) { 4403 cmd->hdr.return_code = 4404 cmd->data.setadapterparms.hdr.return_code; 4405 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4406 return 0; 4407 } 4408 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4409 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4410 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4411 else 4412 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4413 4414 /* check if there is enough room in userspace */ 4415 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4416 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4417 cmd->hdr.return_code = IPA_RC_ENOMEM; 4418 return 0; 4419 } 4420 QETH_CARD_TEXT_(card, 4, "snore%i", 4421 cmd->data.setadapterparms.hdr.used_total); 4422 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4423 cmd->data.setadapterparms.hdr.seq_no); 4424 /*copy entries to user buffer*/ 4425 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4426 memcpy(qinfo->udata + qinfo->udata_offset, 4427 (char *)snmp, 4428 data_len + offsetof(struct qeth_snmp_cmd, data)); 4429 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4430 } else { 4431 memcpy(qinfo->udata + qinfo->udata_offset, 4432 (char *)&snmp->request, data_len); 4433 } 4434 qinfo->udata_offset += data_len; 4435 /* check if all replies received ... */ 4436 QETH_CARD_TEXT_(card, 4, "srtot%i", 4437 cmd->data.setadapterparms.hdr.used_total); 4438 QETH_CARD_TEXT_(card, 4, "srseq%i", 4439 cmd->data.setadapterparms.hdr.seq_no); 4440 if (cmd->data.setadapterparms.hdr.seq_no < 4441 cmd->data.setadapterparms.hdr.used_total) 4442 return 1; 4443 return 0; 4444 } 4445 4446 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4447 { 4448 struct qeth_cmd_buffer *iob; 4449 struct qeth_ipa_cmd *cmd; 4450 struct qeth_snmp_ureq *ureq; 4451 int req_len; 4452 struct qeth_arp_query_info qinfo = {0, }; 4453 int rc = 0; 4454 4455 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4456 4457 if (card->info.guestlan) 4458 return -EOPNOTSUPP; 4459 4460 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4461 (!card->options.layer2)) { 4462 return -EOPNOTSUPP; 4463 } 4464 /* skip 4 bytes (data_len struct member) to get req_len */ 4465 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4466 return -EFAULT; 4467 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4468 if (IS_ERR(ureq)) { 4469 QETH_CARD_TEXT(card, 2, "snmpnome"); 4470 return PTR_ERR(ureq); 4471 } 4472 qinfo.udata_len = ureq->hdr.data_len; 4473 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4474 if (!qinfo.udata) { 4475 kfree(ureq); 4476 return -ENOMEM; 4477 } 4478 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4479 4480 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4481 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4482 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4483 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4484 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4485 qeth_snmp_command_cb, (void *)&qinfo); 4486 if (rc) 4487 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4488 QETH_CARD_IFNAME(card), rc); 4489 else { 4490 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4491 rc = -EFAULT; 4492 } 4493 4494 kfree(ureq); 4495 kfree(qinfo.udata); 4496 return rc; 4497 } 4498 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4499 4500 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4501 struct qeth_reply *reply, unsigned long data) 4502 { 4503 struct qeth_ipa_cmd *cmd; 4504 struct qeth_qoat_priv *priv; 4505 char *resdata; 4506 int resdatalen; 4507 4508 QETH_CARD_TEXT(card, 3, "qoatcb"); 4509 4510 cmd = (struct qeth_ipa_cmd *)data; 4511 priv = (struct qeth_qoat_priv *)reply->param; 4512 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4513 resdata = (char *)data + 28; 4514 4515 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4516 cmd->hdr.return_code = IPA_RC_FFFF; 4517 return 0; 4518 } 4519 4520 memcpy((priv->buffer + priv->response_len), resdata, 4521 resdatalen); 4522 priv->response_len += resdatalen; 4523 4524 if (cmd->data.setadapterparms.hdr.seq_no < 4525 cmd->data.setadapterparms.hdr.used_total) 4526 return 1; 4527 return 0; 4528 } 4529 4530 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4531 { 4532 int rc = 0; 4533 struct qeth_cmd_buffer *iob; 4534 struct qeth_ipa_cmd *cmd; 4535 struct qeth_query_oat *oat_req; 4536 struct qeth_query_oat_data oat_data; 4537 struct qeth_qoat_priv priv; 4538 void __user *tmp; 4539 4540 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4541 4542 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4543 rc = -EOPNOTSUPP; 4544 goto out; 4545 } 4546 4547 if (copy_from_user(&oat_data, udata, 4548 sizeof(struct qeth_query_oat_data))) { 4549 rc = -EFAULT; 4550 goto out; 4551 } 4552 4553 priv.buffer_len = oat_data.buffer_len; 4554 priv.response_len = 0; 4555 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4556 if (!priv.buffer) { 4557 rc = -ENOMEM; 4558 goto out; 4559 } 4560 4561 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4562 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4563 sizeof(struct qeth_query_oat)); 4564 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4565 oat_req = &cmd->data.setadapterparms.data.query_oat; 4566 oat_req->subcmd_code = oat_data.command; 4567 4568 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4569 &priv); 4570 if (!rc) { 4571 if (is_compat_task()) 4572 tmp = compat_ptr(oat_data.ptr); 4573 else 4574 tmp = (void __user *)(unsigned long)oat_data.ptr; 4575 4576 if (copy_to_user(tmp, priv.buffer, 4577 priv.response_len)) { 4578 rc = -EFAULT; 4579 goto out_free; 4580 } 4581 4582 oat_data.response_len = priv.response_len; 4583 4584 if (copy_to_user(udata, &oat_data, 4585 sizeof(struct qeth_query_oat_data))) 4586 rc = -EFAULT; 4587 } else 4588 if (rc == IPA_RC_FFFF) 4589 rc = -EFAULT; 4590 4591 out_free: 4592 kfree(priv.buffer); 4593 out: 4594 return rc; 4595 } 4596 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4597 4598 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4599 { 4600 switch (card->info.type) { 4601 case QETH_CARD_TYPE_IQD: 4602 return 2; 4603 default: 4604 return 0; 4605 } 4606 } 4607 4608 static void qeth_determine_capabilities(struct qeth_card *card) 4609 { 4610 int rc; 4611 int length; 4612 char *prcd; 4613 struct ccw_device *ddev; 4614 int ddev_offline = 0; 4615 4616 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4617 ddev = CARD_DDEV(card); 4618 if (!ddev->online) { 4619 ddev_offline = 1; 4620 rc = ccw_device_set_online(ddev); 4621 if (rc) { 4622 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4623 goto out; 4624 } 4625 } 4626 4627 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4628 if (rc) { 4629 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4630 dev_name(&card->gdev->dev), rc); 4631 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4632 goto out_offline; 4633 } 4634 qeth_configure_unitaddr(card, prcd); 4635 if (ddev_offline) 4636 qeth_configure_blkt_default(card, prcd); 4637 kfree(prcd); 4638 4639 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4640 if (rc) 4641 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4642 4643 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4644 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4645 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4646 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4647 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4648 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4649 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4650 dev_info(&card->gdev->dev, 4651 "Completion Queueing supported\n"); 4652 } else { 4653 card->options.cq = QETH_CQ_NOTAVAILABLE; 4654 } 4655 4656 4657 out_offline: 4658 if (ddev_offline == 1) 4659 ccw_device_set_offline(ddev); 4660 out: 4661 return; 4662 } 4663 4664 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4665 struct qdio_buffer **in_sbal_ptrs, 4666 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4667 int i; 4668 4669 if (card->options.cq == QETH_CQ_ENABLED) { 4670 int offset = QDIO_MAX_BUFFERS_PER_Q * 4671 (card->qdio.no_in_queues - 1); 4672 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4673 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4674 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4675 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4676 } 4677 4678 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4679 } 4680 } 4681 4682 static int qeth_qdio_establish(struct qeth_card *card) 4683 { 4684 struct qdio_initialize init_data; 4685 char *qib_param_field; 4686 struct qdio_buffer **in_sbal_ptrs; 4687 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4688 struct qdio_buffer **out_sbal_ptrs; 4689 int i, j, k; 4690 int rc = 0; 4691 4692 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4693 4694 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4695 GFP_KERNEL); 4696 if (!qib_param_field) { 4697 rc = -ENOMEM; 4698 goto out_free_nothing; 4699 } 4700 4701 qeth_create_qib_param_field(card, qib_param_field); 4702 qeth_create_qib_param_field_blkt(card, qib_param_field); 4703 4704 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4705 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4706 GFP_KERNEL); 4707 if (!in_sbal_ptrs) { 4708 rc = -ENOMEM; 4709 goto out_free_qib_param; 4710 } 4711 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4712 in_sbal_ptrs[i] = (struct qdio_buffer *) 4713 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4714 } 4715 4716 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4717 GFP_KERNEL); 4718 if (!queue_start_poll) { 4719 rc = -ENOMEM; 4720 goto out_free_in_sbals; 4721 } 4722 for (i = 0; i < card->qdio.no_in_queues; ++i) 4723 queue_start_poll[i] = card->discipline->start_poll; 4724 4725 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4726 4727 out_sbal_ptrs = 4728 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4729 sizeof(void *), GFP_KERNEL); 4730 if (!out_sbal_ptrs) { 4731 rc = -ENOMEM; 4732 goto out_free_queue_start_poll; 4733 } 4734 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4735 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4736 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4737 card->qdio.out_qs[i]->bufs[j]->buffer); 4738 } 4739 4740 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4741 init_data.cdev = CARD_DDEV(card); 4742 init_data.q_format = qeth_get_qdio_q_format(card); 4743 init_data.qib_param_field_format = 0; 4744 init_data.qib_param_field = qib_param_field; 4745 init_data.no_input_qs = card->qdio.no_in_queues; 4746 init_data.no_output_qs = card->qdio.no_out_queues; 4747 init_data.input_handler = card->discipline->input_handler; 4748 init_data.output_handler = card->discipline->output_handler; 4749 init_data.queue_start_poll_array = queue_start_poll; 4750 init_data.int_parm = (unsigned long) card; 4751 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4752 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4753 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4754 init_data.scan_threshold = 4755 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4756 4757 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4758 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4759 rc = qdio_allocate(&init_data); 4760 if (rc) { 4761 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4762 goto out; 4763 } 4764 rc = qdio_establish(&init_data); 4765 if (rc) { 4766 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4767 qdio_free(CARD_DDEV(card)); 4768 } 4769 } 4770 4771 switch (card->options.cq) { 4772 case QETH_CQ_ENABLED: 4773 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4774 break; 4775 case QETH_CQ_DISABLED: 4776 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4777 break; 4778 default: 4779 break; 4780 } 4781 out: 4782 kfree(out_sbal_ptrs); 4783 out_free_queue_start_poll: 4784 kfree(queue_start_poll); 4785 out_free_in_sbals: 4786 kfree(in_sbal_ptrs); 4787 out_free_qib_param: 4788 kfree(qib_param_field); 4789 out_free_nothing: 4790 return rc; 4791 } 4792 4793 static void qeth_core_free_card(struct qeth_card *card) 4794 { 4795 4796 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4797 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4798 qeth_clean_channel(&card->read); 4799 qeth_clean_channel(&card->write); 4800 if (card->dev) 4801 free_netdev(card->dev); 4802 kfree(card->ip_tbd_list); 4803 qeth_free_qdio_buffers(card); 4804 unregister_service_level(&card->qeth_service_level); 4805 kfree(card); 4806 } 4807 4808 void qeth_trace_features(struct qeth_card *card) 4809 { 4810 QETH_CARD_TEXT(card, 2, "features"); 4811 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 4812 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 4813 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 4814 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 4815 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 4816 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 4817 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 4818 } 4819 EXPORT_SYMBOL_GPL(qeth_trace_features); 4820 4821 static struct ccw_device_id qeth_ids[] = { 4822 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4823 .driver_info = QETH_CARD_TYPE_OSD}, 4824 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4825 .driver_info = QETH_CARD_TYPE_IQD}, 4826 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4827 .driver_info = QETH_CARD_TYPE_OSN}, 4828 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4829 .driver_info = QETH_CARD_TYPE_OSM}, 4830 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4831 .driver_info = QETH_CARD_TYPE_OSX}, 4832 {}, 4833 }; 4834 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4835 4836 static struct ccw_driver qeth_ccw_driver = { 4837 .driver = { 4838 .owner = THIS_MODULE, 4839 .name = "qeth", 4840 }, 4841 .ids = qeth_ids, 4842 .probe = ccwgroup_probe_ccwdev, 4843 .remove = ccwgroup_remove_ccwdev, 4844 }; 4845 4846 int qeth_core_hardsetup_card(struct qeth_card *card) 4847 { 4848 int retries = 3; 4849 int rc; 4850 4851 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4852 atomic_set(&card->force_alloc_skb, 0); 4853 qeth_update_from_chp_desc(card); 4854 retry: 4855 if (retries < 3) 4856 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4857 dev_name(&card->gdev->dev)); 4858 ccw_device_set_offline(CARD_DDEV(card)); 4859 ccw_device_set_offline(CARD_WDEV(card)); 4860 ccw_device_set_offline(CARD_RDEV(card)); 4861 rc = ccw_device_set_online(CARD_RDEV(card)); 4862 if (rc) 4863 goto retriable; 4864 rc = ccw_device_set_online(CARD_WDEV(card)); 4865 if (rc) 4866 goto retriable; 4867 rc = ccw_device_set_online(CARD_DDEV(card)); 4868 if (rc) 4869 goto retriable; 4870 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4871 retriable: 4872 if (rc == -ERESTARTSYS) { 4873 QETH_DBF_TEXT(SETUP, 2, "break1"); 4874 return rc; 4875 } else if (rc) { 4876 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4877 if (--retries < 0) 4878 goto out; 4879 else 4880 goto retry; 4881 } 4882 qeth_determine_capabilities(card); 4883 qeth_init_tokens(card); 4884 qeth_init_func_level(card); 4885 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4886 if (rc == -ERESTARTSYS) { 4887 QETH_DBF_TEXT(SETUP, 2, "break2"); 4888 return rc; 4889 } else if (rc) { 4890 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4891 if (--retries < 0) 4892 goto out; 4893 else 4894 goto retry; 4895 } 4896 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4897 if (rc == -ERESTARTSYS) { 4898 QETH_DBF_TEXT(SETUP, 2, "break3"); 4899 return rc; 4900 } else if (rc) { 4901 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4902 if (--retries < 0) 4903 goto out; 4904 else 4905 goto retry; 4906 } 4907 card->read_or_write_problem = 0; 4908 rc = qeth_mpc_initialize(card); 4909 if (rc) { 4910 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4911 goto out; 4912 } 4913 4914 card->options.ipa4.supported_funcs = 0; 4915 card->options.adp.supported_funcs = 0; 4916 card->info.diagass_support = 0; 4917 qeth_query_ipassists(card, QETH_PROT_IPV4); 4918 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4919 qeth_query_setadapterparms(card); 4920 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4921 qeth_query_setdiagass(card); 4922 return 0; 4923 out: 4924 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4925 "an error on the device\n"); 4926 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4927 dev_name(&card->gdev->dev), rc); 4928 return rc; 4929 } 4930 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4931 4932 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4933 struct qdio_buffer_element *element, 4934 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4935 { 4936 struct page *page = virt_to_page(element->addr); 4937 if (*pskb == NULL) { 4938 if (qethbuffer->rx_skb) { 4939 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4940 *pskb = qethbuffer->rx_skb; 4941 qethbuffer->rx_skb = NULL; 4942 } else { 4943 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4944 if (!(*pskb)) 4945 return -ENOMEM; 4946 } 4947 4948 skb_reserve(*pskb, ETH_HLEN); 4949 if (data_len <= QETH_RX_PULL_LEN) { 4950 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4951 data_len); 4952 } else { 4953 get_page(page); 4954 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 4955 element->addr + offset, QETH_RX_PULL_LEN); 4956 skb_fill_page_desc(*pskb, *pfrag, page, 4957 offset + QETH_RX_PULL_LEN, 4958 data_len - QETH_RX_PULL_LEN); 4959 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 4960 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 4961 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 4962 (*pfrag)++; 4963 } 4964 } else { 4965 get_page(page); 4966 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4967 (*pskb)->data_len += data_len; 4968 (*pskb)->len += data_len; 4969 (*pskb)->truesize += data_len; 4970 (*pfrag)++; 4971 } 4972 4973 4974 return 0; 4975 } 4976 4977 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4978 struct qeth_qdio_buffer *qethbuffer, 4979 struct qdio_buffer_element **__element, int *__offset, 4980 struct qeth_hdr **hdr) 4981 { 4982 struct qdio_buffer_element *element = *__element; 4983 struct qdio_buffer *buffer = qethbuffer->buffer; 4984 int offset = *__offset; 4985 struct sk_buff *skb = NULL; 4986 int skb_len = 0; 4987 void *data_ptr; 4988 int data_len; 4989 int headroom = 0; 4990 int use_rx_sg = 0; 4991 int frag = 0; 4992 4993 /* qeth_hdr must not cross element boundaries */ 4994 if (element->length < offset + sizeof(struct qeth_hdr)) { 4995 if (qeth_is_last_sbale(element)) 4996 return NULL; 4997 element++; 4998 offset = 0; 4999 if (element->length < sizeof(struct qeth_hdr)) 5000 return NULL; 5001 } 5002 *hdr = element->addr + offset; 5003 5004 offset += sizeof(struct qeth_hdr); 5005 switch ((*hdr)->hdr.l2.id) { 5006 case QETH_HEADER_TYPE_LAYER2: 5007 skb_len = (*hdr)->hdr.l2.pkt_length; 5008 break; 5009 case QETH_HEADER_TYPE_LAYER3: 5010 skb_len = (*hdr)->hdr.l3.length; 5011 headroom = ETH_HLEN; 5012 break; 5013 case QETH_HEADER_TYPE_OSN: 5014 skb_len = (*hdr)->hdr.osn.pdu_length; 5015 headroom = sizeof(struct qeth_hdr); 5016 break; 5017 default: 5018 break; 5019 } 5020 5021 if (!skb_len) 5022 return NULL; 5023 5024 if (((skb_len >= card->options.rx_sg_cb) && 5025 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5026 (!atomic_read(&card->force_alloc_skb))) || 5027 (card->options.cq == QETH_CQ_ENABLED)) { 5028 use_rx_sg = 1; 5029 } else { 5030 skb = dev_alloc_skb(skb_len + headroom); 5031 if (!skb) 5032 goto no_mem; 5033 if (headroom) 5034 skb_reserve(skb, headroom); 5035 } 5036 5037 data_ptr = element->addr + offset; 5038 while (skb_len) { 5039 data_len = min(skb_len, (int)(element->length - offset)); 5040 if (data_len) { 5041 if (use_rx_sg) { 5042 if (qeth_create_skb_frag(qethbuffer, element, 5043 &skb, offset, &frag, data_len)) 5044 goto no_mem; 5045 } else { 5046 memcpy(skb_put(skb, data_len), data_ptr, 5047 data_len); 5048 } 5049 } 5050 skb_len -= data_len; 5051 if (skb_len) { 5052 if (qeth_is_last_sbale(element)) { 5053 QETH_CARD_TEXT(card, 4, "unexeob"); 5054 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5055 dev_kfree_skb_any(skb); 5056 card->stats.rx_errors++; 5057 return NULL; 5058 } 5059 element++; 5060 offset = 0; 5061 data_ptr = element->addr; 5062 } else { 5063 offset += data_len; 5064 } 5065 } 5066 *__element = element; 5067 *__offset = offset; 5068 if (use_rx_sg && card->options.performance_stats) { 5069 card->perf_stats.sg_skbs_rx++; 5070 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5071 } 5072 return skb; 5073 no_mem: 5074 if (net_ratelimit()) { 5075 QETH_CARD_TEXT(card, 2, "noskbmem"); 5076 } 5077 card->stats.rx_dropped++; 5078 return NULL; 5079 } 5080 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5081 5082 static void qeth_unregister_dbf_views(void) 5083 { 5084 int x; 5085 for (x = 0; x < QETH_DBF_INFOS; x++) { 5086 debug_unregister(qeth_dbf[x].id); 5087 qeth_dbf[x].id = NULL; 5088 } 5089 } 5090 5091 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5092 { 5093 char dbf_txt_buf[32]; 5094 va_list args; 5095 5096 if (level > id->level) 5097 return; 5098 va_start(args, fmt); 5099 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5100 va_end(args); 5101 debug_text_event(id, level, dbf_txt_buf); 5102 } 5103 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5104 5105 static int qeth_register_dbf_views(void) 5106 { 5107 int ret; 5108 int x; 5109 5110 for (x = 0; x < QETH_DBF_INFOS; x++) { 5111 /* register the areas */ 5112 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5113 qeth_dbf[x].pages, 5114 qeth_dbf[x].areas, 5115 qeth_dbf[x].len); 5116 if (qeth_dbf[x].id == NULL) { 5117 qeth_unregister_dbf_views(); 5118 return -ENOMEM; 5119 } 5120 5121 /* register a view */ 5122 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5123 if (ret) { 5124 qeth_unregister_dbf_views(); 5125 return ret; 5126 } 5127 5128 /* set a passing level */ 5129 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5130 } 5131 5132 return 0; 5133 } 5134 5135 int qeth_core_load_discipline(struct qeth_card *card, 5136 enum qeth_discipline_id discipline) 5137 { 5138 int rc = 0; 5139 mutex_lock(&qeth_mod_mutex); 5140 switch (discipline) { 5141 case QETH_DISCIPLINE_LAYER3: 5142 card->discipline = try_then_request_module( 5143 symbol_get(qeth_l3_discipline), "qeth_l3"); 5144 break; 5145 case QETH_DISCIPLINE_LAYER2: 5146 card->discipline = try_then_request_module( 5147 symbol_get(qeth_l2_discipline), "qeth_l2"); 5148 break; 5149 } 5150 if (!card->discipline) { 5151 dev_err(&card->gdev->dev, "There is no kernel module to " 5152 "support discipline %d\n", discipline); 5153 rc = -EINVAL; 5154 } 5155 mutex_unlock(&qeth_mod_mutex); 5156 return rc; 5157 } 5158 5159 void qeth_core_free_discipline(struct qeth_card *card) 5160 { 5161 if (card->options.layer2) 5162 symbol_put(qeth_l2_discipline); 5163 else 5164 symbol_put(qeth_l3_discipline); 5165 card->discipline = NULL; 5166 } 5167 5168 static const struct device_type qeth_generic_devtype = { 5169 .name = "qeth_generic", 5170 .groups = qeth_generic_attr_groups, 5171 }; 5172 static const struct device_type qeth_osn_devtype = { 5173 .name = "qeth_osn", 5174 .groups = qeth_osn_attr_groups, 5175 }; 5176 5177 #define DBF_NAME_LEN 20 5178 5179 struct qeth_dbf_entry { 5180 char dbf_name[DBF_NAME_LEN]; 5181 debug_info_t *dbf_info; 5182 struct list_head dbf_list; 5183 }; 5184 5185 static LIST_HEAD(qeth_dbf_list); 5186 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5187 5188 static debug_info_t *qeth_get_dbf_entry(char *name) 5189 { 5190 struct qeth_dbf_entry *entry; 5191 debug_info_t *rc = NULL; 5192 5193 mutex_lock(&qeth_dbf_list_mutex); 5194 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5195 if (strcmp(entry->dbf_name, name) == 0) { 5196 rc = entry->dbf_info; 5197 break; 5198 } 5199 } 5200 mutex_unlock(&qeth_dbf_list_mutex); 5201 return rc; 5202 } 5203 5204 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5205 { 5206 struct qeth_dbf_entry *new_entry; 5207 5208 card->debug = debug_register(name, 2, 1, 8); 5209 if (!card->debug) { 5210 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5211 goto err; 5212 } 5213 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5214 goto err_dbg; 5215 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5216 if (!new_entry) 5217 goto err_dbg; 5218 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5219 new_entry->dbf_info = card->debug; 5220 mutex_lock(&qeth_dbf_list_mutex); 5221 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5222 mutex_unlock(&qeth_dbf_list_mutex); 5223 5224 return 0; 5225 5226 err_dbg: 5227 debug_unregister(card->debug); 5228 err: 5229 return -ENOMEM; 5230 } 5231 5232 static void qeth_clear_dbf_list(void) 5233 { 5234 struct qeth_dbf_entry *entry, *tmp; 5235 5236 mutex_lock(&qeth_dbf_list_mutex); 5237 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5238 list_del(&entry->dbf_list); 5239 debug_unregister(entry->dbf_info); 5240 kfree(entry); 5241 } 5242 mutex_unlock(&qeth_dbf_list_mutex); 5243 } 5244 5245 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5246 { 5247 struct qeth_card *card; 5248 struct device *dev; 5249 int rc; 5250 unsigned long flags; 5251 char dbf_name[DBF_NAME_LEN]; 5252 5253 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5254 5255 dev = &gdev->dev; 5256 if (!get_device(dev)) 5257 return -ENODEV; 5258 5259 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5260 5261 card = qeth_alloc_card(); 5262 if (!card) { 5263 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5264 rc = -ENOMEM; 5265 goto err_dev; 5266 } 5267 5268 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5269 dev_name(&gdev->dev)); 5270 card->debug = qeth_get_dbf_entry(dbf_name); 5271 if (!card->debug) { 5272 rc = qeth_add_dbf_entry(card, dbf_name); 5273 if (rc) 5274 goto err_card; 5275 } 5276 5277 card->read.ccwdev = gdev->cdev[0]; 5278 card->write.ccwdev = gdev->cdev[1]; 5279 card->data.ccwdev = gdev->cdev[2]; 5280 dev_set_drvdata(&gdev->dev, card); 5281 card->gdev = gdev; 5282 gdev->cdev[0]->handler = qeth_irq; 5283 gdev->cdev[1]->handler = qeth_irq; 5284 gdev->cdev[2]->handler = qeth_irq; 5285 5286 rc = qeth_determine_card_type(card); 5287 if (rc) { 5288 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5289 goto err_card; 5290 } 5291 rc = qeth_setup_card(card); 5292 if (rc) { 5293 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5294 goto err_card; 5295 } 5296 5297 if (card->info.type == QETH_CARD_TYPE_OSN) 5298 gdev->dev.type = &qeth_osn_devtype; 5299 else 5300 gdev->dev.type = &qeth_generic_devtype; 5301 5302 switch (card->info.type) { 5303 case QETH_CARD_TYPE_OSN: 5304 case QETH_CARD_TYPE_OSM: 5305 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5306 if (rc) 5307 goto err_card; 5308 rc = card->discipline->setup(card->gdev); 5309 if (rc) 5310 goto err_disc; 5311 case QETH_CARD_TYPE_OSD: 5312 case QETH_CARD_TYPE_OSX: 5313 default: 5314 break; 5315 } 5316 5317 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5318 list_add_tail(&card->list, &qeth_core_card_list.list); 5319 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5320 5321 qeth_determine_capabilities(card); 5322 return 0; 5323 5324 err_disc: 5325 qeth_core_free_discipline(card); 5326 err_card: 5327 qeth_core_free_card(card); 5328 err_dev: 5329 put_device(dev); 5330 return rc; 5331 } 5332 5333 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5334 { 5335 unsigned long flags; 5336 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5337 5338 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5339 5340 if (card->discipline) { 5341 card->discipline->remove(gdev); 5342 qeth_core_free_discipline(card); 5343 } 5344 5345 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5346 list_del(&card->list); 5347 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5348 qeth_core_free_card(card); 5349 dev_set_drvdata(&gdev->dev, NULL); 5350 put_device(&gdev->dev); 5351 return; 5352 } 5353 5354 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5355 { 5356 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5357 int rc = 0; 5358 int def_discipline; 5359 5360 if (!card->discipline) { 5361 if (card->info.type == QETH_CARD_TYPE_IQD) 5362 def_discipline = QETH_DISCIPLINE_LAYER3; 5363 else 5364 def_discipline = QETH_DISCIPLINE_LAYER2; 5365 rc = qeth_core_load_discipline(card, def_discipline); 5366 if (rc) 5367 goto err; 5368 rc = card->discipline->setup(card->gdev); 5369 if (rc) 5370 goto err; 5371 } 5372 rc = card->discipline->set_online(gdev); 5373 err: 5374 return rc; 5375 } 5376 5377 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5378 { 5379 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5380 return card->discipline->set_offline(gdev); 5381 } 5382 5383 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5384 { 5385 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5386 if (card->discipline && card->discipline->shutdown) 5387 card->discipline->shutdown(gdev); 5388 } 5389 5390 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5391 { 5392 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5393 if (card->discipline && card->discipline->prepare) 5394 return card->discipline->prepare(gdev); 5395 return 0; 5396 } 5397 5398 static void qeth_core_complete(struct ccwgroup_device *gdev) 5399 { 5400 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5401 if (card->discipline && card->discipline->complete) 5402 card->discipline->complete(gdev); 5403 } 5404 5405 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5406 { 5407 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5408 if (card->discipline && card->discipline->freeze) 5409 return card->discipline->freeze(gdev); 5410 return 0; 5411 } 5412 5413 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5414 { 5415 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5416 if (card->discipline && card->discipline->thaw) 5417 return card->discipline->thaw(gdev); 5418 return 0; 5419 } 5420 5421 static int qeth_core_restore(struct ccwgroup_device *gdev) 5422 { 5423 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5424 if (card->discipline && card->discipline->restore) 5425 return card->discipline->restore(gdev); 5426 return 0; 5427 } 5428 5429 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5430 .driver = { 5431 .owner = THIS_MODULE, 5432 .name = "qeth", 5433 }, 5434 .setup = qeth_core_probe_device, 5435 .remove = qeth_core_remove_device, 5436 .set_online = qeth_core_set_online, 5437 .set_offline = qeth_core_set_offline, 5438 .shutdown = qeth_core_shutdown, 5439 .prepare = qeth_core_prepare, 5440 .complete = qeth_core_complete, 5441 .freeze = qeth_core_freeze, 5442 .thaw = qeth_core_thaw, 5443 .restore = qeth_core_restore, 5444 }; 5445 5446 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5447 const char *buf, size_t count) 5448 { 5449 int err; 5450 5451 err = ccwgroup_create_dev(qeth_core_root_dev, 5452 &qeth_core_ccwgroup_driver, 3, buf); 5453 5454 return err ? err : count; 5455 } 5456 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5457 5458 static struct attribute *qeth_drv_attrs[] = { 5459 &driver_attr_group.attr, 5460 NULL, 5461 }; 5462 static struct attribute_group qeth_drv_attr_group = { 5463 .attrs = qeth_drv_attrs, 5464 }; 5465 static const struct attribute_group *qeth_drv_attr_groups[] = { 5466 &qeth_drv_attr_group, 5467 NULL, 5468 }; 5469 5470 static struct { 5471 const char str[ETH_GSTRING_LEN]; 5472 } qeth_ethtool_stats_keys[] = { 5473 /* 0 */{"rx skbs"}, 5474 {"rx buffers"}, 5475 {"tx skbs"}, 5476 {"tx buffers"}, 5477 {"tx skbs no packing"}, 5478 {"tx buffers no packing"}, 5479 {"tx skbs packing"}, 5480 {"tx buffers packing"}, 5481 {"tx sg skbs"}, 5482 {"tx sg frags"}, 5483 /* 10 */{"rx sg skbs"}, 5484 {"rx sg frags"}, 5485 {"rx sg page allocs"}, 5486 {"tx large kbytes"}, 5487 {"tx large count"}, 5488 {"tx pk state ch n->p"}, 5489 {"tx pk state ch p->n"}, 5490 {"tx pk watermark low"}, 5491 {"tx pk watermark high"}, 5492 {"queue 0 buffer usage"}, 5493 /* 20 */{"queue 1 buffer usage"}, 5494 {"queue 2 buffer usage"}, 5495 {"queue 3 buffer usage"}, 5496 {"rx poll time"}, 5497 {"rx poll count"}, 5498 {"rx do_QDIO time"}, 5499 {"rx do_QDIO count"}, 5500 {"tx handler time"}, 5501 {"tx handler count"}, 5502 {"tx time"}, 5503 /* 30 */{"tx count"}, 5504 {"tx do_QDIO time"}, 5505 {"tx do_QDIO count"}, 5506 {"tx csum"}, 5507 {"tx lin"}, 5508 {"cq handler count"}, 5509 {"cq handler time"} 5510 }; 5511 5512 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5513 { 5514 switch (stringset) { 5515 case ETH_SS_STATS: 5516 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5517 default: 5518 return -EINVAL; 5519 } 5520 } 5521 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5522 5523 void qeth_core_get_ethtool_stats(struct net_device *dev, 5524 struct ethtool_stats *stats, u64 *data) 5525 { 5526 struct qeth_card *card = dev->ml_priv; 5527 data[0] = card->stats.rx_packets - 5528 card->perf_stats.initial_rx_packets; 5529 data[1] = card->perf_stats.bufs_rec; 5530 data[2] = card->stats.tx_packets - 5531 card->perf_stats.initial_tx_packets; 5532 data[3] = card->perf_stats.bufs_sent; 5533 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5534 - card->perf_stats.skbs_sent_pack; 5535 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5536 data[6] = card->perf_stats.skbs_sent_pack; 5537 data[7] = card->perf_stats.bufs_sent_pack; 5538 data[8] = card->perf_stats.sg_skbs_sent; 5539 data[9] = card->perf_stats.sg_frags_sent; 5540 data[10] = card->perf_stats.sg_skbs_rx; 5541 data[11] = card->perf_stats.sg_frags_rx; 5542 data[12] = card->perf_stats.sg_alloc_page_rx; 5543 data[13] = (card->perf_stats.large_send_bytes >> 10); 5544 data[14] = card->perf_stats.large_send_cnt; 5545 data[15] = card->perf_stats.sc_dp_p; 5546 data[16] = card->perf_stats.sc_p_dp; 5547 data[17] = QETH_LOW_WATERMARK_PACK; 5548 data[18] = QETH_HIGH_WATERMARK_PACK; 5549 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5550 data[20] = (card->qdio.no_out_queues > 1) ? 5551 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5552 data[21] = (card->qdio.no_out_queues > 2) ? 5553 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5554 data[22] = (card->qdio.no_out_queues > 3) ? 5555 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5556 data[23] = card->perf_stats.inbound_time; 5557 data[24] = card->perf_stats.inbound_cnt; 5558 data[25] = card->perf_stats.inbound_do_qdio_time; 5559 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5560 data[27] = card->perf_stats.outbound_handler_time; 5561 data[28] = card->perf_stats.outbound_handler_cnt; 5562 data[29] = card->perf_stats.outbound_time; 5563 data[30] = card->perf_stats.outbound_cnt; 5564 data[31] = card->perf_stats.outbound_do_qdio_time; 5565 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5566 data[33] = card->perf_stats.tx_csum; 5567 data[34] = card->perf_stats.tx_lin; 5568 data[35] = card->perf_stats.cq_cnt; 5569 data[36] = card->perf_stats.cq_time; 5570 } 5571 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5572 5573 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5574 { 5575 switch (stringset) { 5576 case ETH_SS_STATS: 5577 memcpy(data, &qeth_ethtool_stats_keys, 5578 sizeof(qeth_ethtool_stats_keys)); 5579 break; 5580 default: 5581 WARN_ON(1); 5582 break; 5583 } 5584 } 5585 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5586 5587 void qeth_core_get_drvinfo(struct net_device *dev, 5588 struct ethtool_drvinfo *info) 5589 { 5590 struct qeth_card *card = dev->ml_priv; 5591 5592 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5593 sizeof(info->driver)); 5594 strlcpy(info->version, "1.0", sizeof(info->version)); 5595 strlcpy(info->fw_version, card->info.mcl_level, 5596 sizeof(info->fw_version)); 5597 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5598 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5599 } 5600 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5601 5602 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5603 struct ethtool_cmd *ecmd) 5604 { 5605 struct qeth_card *card = netdev->ml_priv; 5606 enum qeth_link_types link_type; 5607 5608 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5609 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5610 else 5611 link_type = card->info.link_type; 5612 5613 ecmd->transceiver = XCVR_INTERNAL; 5614 ecmd->supported = SUPPORTED_Autoneg; 5615 ecmd->advertising = ADVERTISED_Autoneg; 5616 ecmd->duplex = DUPLEX_FULL; 5617 ecmd->autoneg = AUTONEG_ENABLE; 5618 5619 switch (link_type) { 5620 case QETH_LINK_TYPE_FAST_ETH: 5621 case QETH_LINK_TYPE_LANE_ETH100: 5622 ecmd->supported |= SUPPORTED_10baseT_Half | 5623 SUPPORTED_10baseT_Full | 5624 SUPPORTED_100baseT_Half | 5625 SUPPORTED_100baseT_Full | 5626 SUPPORTED_TP; 5627 ecmd->advertising |= ADVERTISED_10baseT_Half | 5628 ADVERTISED_10baseT_Full | 5629 ADVERTISED_100baseT_Half | 5630 ADVERTISED_100baseT_Full | 5631 ADVERTISED_TP; 5632 ecmd->speed = SPEED_100; 5633 ecmd->port = PORT_TP; 5634 break; 5635 5636 case QETH_LINK_TYPE_GBIT_ETH: 5637 case QETH_LINK_TYPE_LANE_ETH1000: 5638 ecmd->supported |= SUPPORTED_10baseT_Half | 5639 SUPPORTED_10baseT_Full | 5640 SUPPORTED_100baseT_Half | 5641 SUPPORTED_100baseT_Full | 5642 SUPPORTED_1000baseT_Half | 5643 SUPPORTED_1000baseT_Full | 5644 SUPPORTED_FIBRE; 5645 ecmd->advertising |= ADVERTISED_10baseT_Half | 5646 ADVERTISED_10baseT_Full | 5647 ADVERTISED_100baseT_Half | 5648 ADVERTISED_100baseT_Full | 5649 ADVERTISED_1000baseT_Half | 5650 ADVERTISED_1000baseT_Full | 5651 ADVERTISED_FIBRE; 5652 ecmd->speed = SPEED_1000; 5653 ecmd->port = PORT_FIBRE; 5654 break; 5655 5656 case QETH_LINK_TYPE_10GBIT_ETH: 5657 ecmd->supported |= SUPPORTED_10baseT_Half | 5658 SUPPORTED_10baseT_Full | 5659 SUPPORTED_100baseT_Half | 5660 SUPPORTED_100baseT_Full | 5661 SUPPORTED_1000baseT_Half | 5662 SUPPORTED_1000baseT_Full | 5663 SUPPORTED_10000baseT_Full | 5664 SUPPORTED_FIBRE; 5665 ecmd->advertising |= ADVERTISED_10baseT_Half | 5666 ADVERTISED_10baseT_Full | 5667 ADVERTISED_100baseT_Half | 5668 ADVERTISED_100baseT_Full | 5669 ADVERTISED_1000baseT_Half | 5670 ADVERTISED_1000baseT_Full | 5671 ADVERTISED_10000baseT_Full | 5672 ADVERTISED_FIBRE; 5673 ecmd->speed = SPEED_10000; 5674 ecmd->port = PORT_FIBRE; 5675 break; 5676 5677 default: 5678 ecmd->supported |= SUPPORTED_10baseT_Half | 5679 SUPPORTED_10baseT_Full | 5680 SUPPORTED_TP; 5681 ecmd->advertising |= ADVERTISED_10baseT_Half | 5682 ADVERTISED_10baseT_Full | 5683 ADVERTISED_TP; 5684 ecmd->speed = SPEED_10; 5685 ecmd->port = PORT_TP; 5686 } 5687 5688 return 0; 5689 } 5690 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5691 5692 static int __init qeth_core_init(void) 5693 { 5694 int rc; 5695 5696 pr_info("loading core functions\n"); 5697 INIT_LIST_HEAD(&qeth_core_card_list.list); 5698 INIT_LIST_HEAD(&qeth_dbf_list); 5699 rwlock_init(&qeth_core_card_list.rwlock); 5700 mutex_init(&qeth_mod_mutex); 5701 5702 qeth_wq = create_singlethread_workqueue("qeth_wq"); 5703 5704 rc = qeth_register_dbf_views(); 5705 if (rc) 5706 goto out_err; 5707 qeth_core_root_dev = root_device_register("qeth"); 5708 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 5709 if (rc) 5710 goto register_err; 5711 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5712 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5713 if (!qeth_core_header_cache) { 5714 rc = -ENOMEM; 5715 goto slab_err; 5716 } 5717 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5718 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5719 if (!qeth_qdio_outbuf_cache) { 5720 rc = -ENOMEM; 5721 goto cqslab_err; 5722 } 5723 rc = ccw_driver_register(&qeth_ccw_driver); 5724 if (rc) 5725 goto ccw_err; 5726 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5727 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5728 if (rc) 5729 goto ccwgroup_err; 5730 5731 return 0; 5732 5733 ccwgroup_err: 5734 ccw_driver_unregister(&qeth_ccw_driver); 5735 ccw_err: 5736 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5737 cqslab_err: 5738 kmem_cache_destroy(qeth_core_header_cache); 5739 slab_err: 5740 root_device_unregister(qeth_core_root_dev); 5741 register_err: 5742 qeth_unregister_dbf_views(); 5743 out_err: 5744 pr_err("Initializing the qeth device driver failed\n"); 5745 return rc; 5746 } 5747 5748 static void __exit qeth_core_exit(void) 5749 { 5750 qeth_clear_dbf_list(); 5751 destroy_workqueue(qeth_wq); 5752 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5753 ccw_driver_unregister(&qeth_ccw_driver); 5754 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5755 kmem_cache_destroy(qeth_core_header_cache); 5756 root_device_unregister(qeth_core_root_dev); 5757 qeth_unregister_dbf_views(); 5758 pr_info("core functions removed\n"); 5759 } 5760 5761 module_init(qeth_core_init); 5762 module_exit(qeth_core_exit); 5763 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5764 MODULE_DESCRIPTION("qeth core functions"); 5765 MODULE_LICENSE("GPL"); 5766