1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/io.h> 27 28 #include "qeth_core.h" 29 30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 32 /* N P A M L V H */ 33 [QETH_DBF_SETUP] = {"qeth_setup", 34 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 35 [QETH_DBF_MSG] = {"qeth_msg", 36 8, 1, 128, 3, &debug_sprintf_view, NULL}, 37 [QETH_DBF_CTRL] = {"qeth_control", 38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 39 }; 40 EXPORT_SYMBOL_GPL(qeth_dbf); 41 42 struct qeth_card_list_struct qeth_core_card_list; 43 EXPORT_SYMBOL_GPL(qeth_core_card_list); 44 struct kmem_cache *qeth_core_header_cache; 45 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 46 47 static struct device *qeth_core_root_dev; 48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 49 static struct lock_class_key qdio_out_skb_queue_key; 50 51 static void qeth_send_control_data_cb(struct qeth_channel *, 52 struct qeth_cmd_buffer *); 53 static int qeth_issue_next_read(struct qeth_card *); 54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 56 static void qeth_free_buffer_pool(struct qeth_card *); 57 static int qeth_qdio_establish(struct qeth_card *); 58 59 60 static inline const char *qeth_get_cardname(struct qeth_card *card) 61 { 62 if (card->info.guestlan) { 63 switch (card->info.type) { 64 case QETH_CARD_TYPE_OSD: 65 return " Guest LAN QDIO"; 66 case QETH_CARD_TYPE_IQD: 67 return " Guest LAN Hiper"; 68 case QETH_CARD_TYPE_OSM: 69 return " Guest LAN QDIO - OSM"; 70 case QETH_CARD_TYPE_OSX: 71 return " Guest LAN QDIO - OSX"; 72 default: 73 return " unknown"; 74 } 75 } else { 76 switch (card->info.type) { 77 case QETH_CARD_TYPE_OSD: 78 return " OSD Express"; 79 case QETH_CARD_TYPE_IQD: 80 return " HiperSockets"; 81 case QETH_CARD_TYPE_OSN: 82 return " OSN QDIO"; 83 case QETH_CARD_TYPE_OSM: 84 return " OSM QDIO"; 85 case QETH_CARD_TYPE_OSX: 86 return " OSX QDIO"; 87 default: 88 return " unknown"; 89 } 90 } 91 return " n/a"; 92 } 93 94 /* max length to be returned: 14 */ 95 const char *qeth_get_cardname_short(struct qeth_card *card) 96 { 97 if (card->info.guestlan) { 98 switch (card->info.type) { 99 case QETH_CARD_TYPE_OSD: 100 return "GuestLAN QDIO"; 101 case QETH_CARD_TYPE_IQD: 102 return "GuestLAN Hiper"; 103 case QETH_CARD_TYPE_OSM: 104 return "GuestLAN OSM"; 105 case QETH_CARD_TYPE_OSX: 106 return "GuestLAN OSX"; 107 default: 108 return "unknown"; 109 } 110 } else { 111 switch (card->info.type) { 112 case QETH_CARD_TYPE_OSD: 113 switch (card->info.link_type) { 114 case QETH_LINK_TYPE_FAST_ETH: 115 return "OSD_100"; 116 case QETH_LINK_TYPE_HSTR: 117 return "HSTR"; 118 case QETH_LINK_TYPE_GBIT_ETH: 119 return "OSD_1000"; 120 case QETH_LINK_TYPE_10GBIT_ETH: 121 return "OSD_10GIG"; 122 case QETH_LINK_TYPE_LANE_ETH100: 123 return "OSD_FE_LANE"; 124 case QETH_LINK_TYPE_LANE_TR: 125 return "OSD_TR_LANE"; 126 case QETH_LINK_TYPE_LANE_ETH1000: 127 return "OSD_GbE_LANE"; 128 case QETH_LINK_TYPE_LANE: 129 return "OSD_ATM_LANE"; 130 default: 131 return "OSD_Express"; 132 } 133 case QETH_CARD_TYPE_IQD: 134 return "HiperSockets"; 135 case QETH_CARD_TYPE_OSN: 136 return "OSN"; 137 case QETH_CARD_TYPE_OSM: 138 return "OSM_1000"; 139 case QETH_CARD_TYPE_OSX: 140 return "OSX_10GIG"; 141 default: 142 return "unknown"; 143 } 144 } 145 return "n/a"; 146 } 147 148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 149 int clear_start_mask) 150 { 151 unsigned long flags; 152 153 spin_lock_irqsave(&card->thread_mask_lock, flags); 154 card->thread_allowed_mask = threads; 155 if (clear_start_mask) 156 card->thread_start_mask &= threads; 157 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 158 wake_up(&card->wait_q); 159 } 160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 161 162 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 163 { 164 unsigned long flags; 165 int rc = 0; 166 167 spin_lock_irqsave(&card->thread_mask_lock, flags); 168 rc = (card->thread_running_mask & threads); 169 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 170 return rc; 171 } 172 EXPORT_SYMBOL_GPL(qeth_threads_running); 173 174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 175 { 176 return wait_event_interruptible(card->wait_q, 177 qeth_threads_running(card, threads) == 0); 178 } 179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 180 181 void qeth_clear_working_pool_list(struct qeth_card *card) 182 { 183 struct qeth_buffer_pool_entry *pool_entry, *tmp; 184 185 QETH_CARD_TEXT(card, 5, "clwrklst"); 186 list_for_each_entry_safe(pool_entry, tmp, 187 &card->qdio.in_buf_pool.entry_list, list){ 188 list_del(&pool_entry->list); 189 } 190 } 191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 192 193 static int qeth_alloc_buffer_pool(struct qeth_card *card) 194 { 195 struct qeth_buffer_pool_entry *pool_entry; 196 void *ptr; 197 int i, j; 198 199 QETH_CARD_TEXT(card, 5, "alocpool"); 200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 202 if (!pool_entry) { 203 qeth_free_buffer_pool(card); 204 return -ENOMEM; 205 } 206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 207 ptr = (void *) __get_free_page(GFP_KERNEL); 208 if (!ptr) { 209 while (j > 0) 210 free_page((unsigned long) 211 pool_entry->elements[--j]); 212 kfree(pool_entry); 213 qeth_free_buffer_pool(card); 214 return -ENOMEM; 215 } 216 pool_entry->elements[j] = ptr; 217 } 218 list_add(&pool_entry->init_list, 219 &card->qdio.init_pool.entry_list); 220 } 221 return 0; 222 } 223 224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 225 { 226 QETH_CARD_TEXT(card, 2, "realcbp"); 227 228 if ((card->state != CARD_STATE_DOWN) && 229 (card->state != CARD_STATE_RECOVER)) 230 return -EPERM; 231 232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 233 qeth_clear_working_pool_list(card); 234 qeth_free_buffer_pool(card); 235 card->qdio.in_buf_pool.buf_count = bufcnt; 236 card->qdio.init_pool.buf_count = bufcnt; 237 return qeth_alloc_buffer_pool(card); 238 } 239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 240 241 static int qeth_issue_next_read(struct qeth_card *card) 242 { 243 int rc; 244 struct qeth_cmd_buffer *iob; 245 246 QETH_CARD_TEXT(card, 5, "issnxrd"); 247 if (card->read.state != CH_STATE_UP) 248 return -EIO; 249 iob = qeth_get_buffer(&card->read); 250 if (!iob) { 251 dev_warn(&card->gdev->dev, "The qeth device driver " 252 "failed to recover an error on the device\n"); 253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 254 "available\n", dev_name(&card->gdev->dev)); 255 return -ENOMEM; 256 } 257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 258 QETH_CARD_TEXT(card, 6, "noirqpnd"); 259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 260 (addr_t) iob, 0, 0); 261 if (rc) { 262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 263 "rc=%i\n", dev_name(&card->gdev->dev), rc); 264 atomic_set(&card->read.irq_pending, 0); 265 card->read_or_write_problem = 1; 266 qeth_schedule_recovery(card); 267 wake_up(&card->wait_q); 268 } 269 return rc; 270 } 271 272 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 273 { 274 struct qeth_reply *reply; 275 276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 277 if (reply) { 278 atomic_set(&reply->refcnt, 1); 279 atomic_set(&reply->received, 0); 280 reply->card = card; 281 }; 282 return reply; 283 } 284 285 static void qeth_get_reply(struct qeth_reply *reply) 286 { 287 WARN_ON(atomic_read(&reply->refcnt) <= 0); 288 atomic_inc(&reply->refcnt); 289 } 290 291 static void qeth_put_reply(struct qeth_reply *reply) 292 { 293 WARN_ON(atomic_read(&reply->refcnt) <= 0); 294 if (atomic_dec_and_test(&reply->refcnt)) 295 kfree(reply); 296 } 297 298 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 299 struct qeth_card *card) 300 { 301 char *ipa_name; 302 int com = cmd->hdr.command; 303 ipa_name = qeth_get_ipa_cmd_name(com); 304 if (rc) 305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", 306 ipa_name, com, QETH_CARD_IFNAME(card), 307 rc, qeth_get_ipa_msg(rc)); 308 else 309 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", 310 ipa_name, com, QETH_CARD_IFNAME(card)); 311 } 312 313 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 314 struct qeth_cmd_buffer *iob) 315 { 316 struct qeth_ipa_cmd *cmd = NULL; 317 318 QETH_CARD_TEXT(card, 5, "chkipad"); 319 if (IS_IPA(iob->data)) { 320 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 321 if (IS_IPA_REPLY(cmd)) { 322 if (cmd->hdr.command != IPA_CMD_SETCCID && 323 cmd->hdr.command != IPA_CMD_DELCCID && 324 cmd->hdr.command != IPA_CMD_MODCCID && 325 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 326 qeth_issue_ipa_msg(cmd, 327 cmd->hdr.return_code, card); 328 return cmd; 329 } else { 330 switch (cmd->hdr.command) { 331 case IPA_CMD_STOPLAN: 332 dev_warn(&card->gdev->dev, 333 "The link for interface %s on CHPID" 334 " 0x%X failed\n", 335 QETH_CARD_IFNAME(card), 336 card->info.chpid); 337 card->lan_online = 0; 338 if (card->dev && netif_carrier_ok(card->dev)) 339 netif_carrier_off(card->dev); 340 return NULL; 341 case IPA_CMD_STARTLAN: 342 dev_info(&card->gdev->dev, 343 "The link for %s on CHPID 0x%X has" 344 " been restored\n", 345 QETH_CARD_IFNAME(card), 346 card->info.chpid); 347 netif_carrier_on(card->dev); 348 card->lan_online = 1; 349 qeth_schedule_recovery(card); 350 return NULL; 351 case IPA_CMD_MODCCID: 352 return cmd; 353 case IPA_CMD_REGISTER_LOCAL_ADDR: 354 QETH_CARD_TEXT(card, 3, "irla"); 355 break; 356 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 357 QETH_CARD_TEXT(card, 3, "urla"); 358 break; 359 default: 360 QETH_DBF_MESSAGE(2, "Received data is IPA " 361 "but not a reply!\n"); 362 break; 363 } 364 } 365 } 366 return cmd; 367 } 368 369 void qeth_clear_ipacmd_list(struct qeth_card *card) 370 { 371 struct qeth_reply *reply, *r; 372 unsigned long flags; 373 374 QETH_CARD_TEXT(card, 4, "clipalst"); 375 376 spin_lock_irqsave(&card->lock, flags); 377 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 378 qeth_get_reply(reply); 379 reply->rc = -EIO; 380 atomic_inc(&reply->received); 381 list_del_init(&reply->list); 382 wake_up(&reply->wait_q); 383 qeth_put_reply(reply); 384 } 385 spin_unlock_irqrestore(&card->lock, flags); 386 atomic_set(&card->write.irq_pending, 0); 387 } 388 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 389 390 static int qeth_check_idx_response(struct qeth_card *card, 391 unsigned char *buffer) 392 { 393 if (!buffer) 394 return 0; 395 396 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 397 if ((buffer[2] & 0xc0) == 0xc0) { 398 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 399 "with cause code 0x%02x%s\n", 400 buffer[4], 401 ((buffer[4] == 0x22) ? 402 " -- try another portname" : "")); 403 QETH_CARD_TEXT(card, 2, "ckidxres"); 404 QETH_CARD_TEXT(card, 2, " idxterm"); 405 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 406 if (buffer[4] == 0xf6) { 407 dev_err(&card->gdev->dev, 408 "The qeth device is not configured " 409 "for the OSI layer required by z/VM\n"); 410 return -EPERM; 411 } 412 return -EIO; 413 } 414 return 0; 415 } 416 417 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 418 __u32 len) 419 { 420 struct qeth_card *card; 421 422 card = CARD_FROM_CDEV(channel->ccwdev); 423 QETH_CARD_TEXT(card, 4, "setupccw"); 424 if (channel == &card->read) 425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 426 else 427 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 428 channel->ccw.count = len; 429 channel->ccw.cda = (__u32) __pa(iob); 430 } 431 432 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 433 { 434 __u8 index; 435 436 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 437 index = channel->io_buf_no; 438 do { 439 if (channel->iob[index].state == BUF_STATE_FREE) { 440 channel->iob[index].state = BUF_STATE_LOCKED; 441 channel->io_buf_no = (channel->io_buf_no + 1) % 442 QETH_CMD_BUFFER_NO; 443 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 444 return channel->iob + index; 445 } 446 index = (index + 1) % QETH_CMD_BUFFER_NO; 447 } while (index != channel->io_buf_no); 448 449 return NULL; 450 } 451 452 void qeth_release_buffer(struct qeth_channel *channel, 453 struct qeth_cmd_buffer *iob) 454 { 455 unsigned long flags; 456 457 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 458 spin_lock_irqsave(&channel->iob_lock, flags); 459 memset(iob->data, 0, QETH_BUFSIZE); 460 iob->state = BUF_STATE_FREE; 461 iob->callback = qeth_send_control_data_cb; 462 iob->rc = 0; 463 spin_unlock_irqrestore(&channel->iob_lock, flags); 464 } 465 EXPORT_SYMBOL_GPL(qeth_release_buffer); 466 467 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 468 { 469 struct qeth_cmd_buffer *buffer = NULL; 470 unsigned long flags; 471 472 spin_lock_irqsave(&channel->iob_lock, flags); 473 buffer = __qeth_get_buffer(channel); 474 spin_unlock_irqrestore(&channel->iob_lock, flags); 475 return buffer; 476 } 477 478 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 479 { 480 struct qeth_cmd_buffer *buffer; 481 wait_event(channel->wait_q, 482 ((buffer = qeth_get_buffer(channel)) != NULL)); 483 return buffer; 484 } 485 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 486 487 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 488 { 489 int cnt; 490 491 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 492 qeth_release_buffer(channel, &channel->iob[cnt]); 493 channel->buf_no = 0; 494 channel->io_buf_no = 0; 495 } 496 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 497 498 static void qeth_send_control_data_cb(struct qeth_channel *channel, 499 struct qeth_cmd_buffer *iob) 500 { 501 struct qeth_card *card; 502 struct qeth_reply *reply, *r; 503 struct qeth_ipa_cmd *cmd; 504 unsigned long flags; 505 int keep_reply; 506 int rc = 0; 507 508 card = CARD_FROM_CDEV(channel->ccwdev); 509 QETH_CARD_TEXT(card, 4, "sndctlcb"); 510 rc = qeth_check_idx_response(card, iob->data); 511 switch (rc) { 512 case 0: 513 break; 514 case -EIO: 515 qeth_clear_ipacmd_list(card); 516 qeth_schedule_recovery(card); 517 /* fall through */ 518 default: 519 goto out; 520 } 521 522 cmd = qeth_check_ipa_data(card, iob); 523 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 524 goto out; 525 /*in case of OSN : check if cmd is set */ 526 if (card->info.type == QETH_CARD_TYPE_OSN && 527 cmd && 528 cmd->hdr.command != IPA_CMD_STARTLAN && 529 card->osn_info.assist_cb != NULL) { 530 card->osn_info.assist_cb(card->dev, cmd); 531 goto out; 532 } 533 534 spin_lock_irqsave(&card->lock, flags); 535 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 536 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 537 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 538 qeth_get_reply(reply); 539 list_del_init(&reply->list); 540 spin_unlock_irqrestore(&card->lock, flags); 541 keep_reply = 0; 542 if (reply->callback != NULL) { 543 if (cmd) { 544 reply->offset = (__u16)((char *)cmd - 545 (char *)iob->data); 546 keep_reply = reply->callback(card, 547 reply, 548 (unsigned long)cmd); 549 } else 550 keep_reply = reply->callback(card, 551 reply, 552 (unsigned long)iob); 553 } 554 if (cmd) 555 reply->rc = (u16) cmd->hdr.return_code; 556 else if (iob->rc) 557 reply->rc = iob->rc; 558 if (keep_reply) { 559 spin_lock_irqsave(&card->lock, flags); 560 list_add_tail(&reply->list, 561 &card->cmd_waiter_list); 562 spin_unlock_irqrestore(&card->lock, flags); 563 } else { 564 atomic_inc(&reply->received); 565 wake_up(&reply->wait_q); 566 } 567 qeth_put_reply(reply); 568 goto out; 569 } 570 } 571 spin_unlock_irqrestore(&card->lock, flags); 572 out: 573 memcpy(&card->seqno.pdu_hdr_ack, 574 QETH_PDU_HEADER_SEQ_NO(iob->data), 575 QETH_SEQ_NO_LENGTH); 576 qeth_release_buffer(channel, iob); 577 } 578 579 static int qeth_setup_channel(struct qeth_channel *channel) 580 { 581 int cnt; 582 583 QETH_DBF_TEXT(SETUP, 2, "setupch"); 584 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 585 channel->iob[cnt].data = 586 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 587 if (channel->iob[cnt].data == NULL) 588 break; 589 channel->iob[cnt].state = BUF_STATE_FREE; 590 channel->iob[cnt].channel = channel; 591 channel->iob[cnt].callback = qeth_send_control_data_cb; 592 channel->iob[cnt].rc = 0; 593 } 594 if (cnt < QETH_CMD_BUFFER_NO) { 595 while (cnt-- > 0) 596 kfree(channel->iob[cnt].data); 597 return -ENOMEM; 598 } 599 channel->buf_no = 0; 600 channel->io_buf_no = 0; 601 atomic_set(&channel->irq_pending, 0); 602 spin_lock_init(&channel->iob_lock); 603 604 init_waitqueue_head(&channel->wait_q); 605 return 0; 606 } 607 608 static int qeth_set_thread_start_bit(struct qeth_card *card, 609 unsigned long thread) 610 { 611 unsigned long flags; 612 613 spin_lock_irqsave(&card->thread_mask_lock, flags); 614 if (!(card->thread_allowed_mask & thread) || 615 (card->thread_start_mask & thread)) { 616 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 617 return -EPERM; 618 } 619 card->thread_start_mask |= thread; 620 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 621 return 0; 622 } 623 624 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 625 { 626 unsigned long flags; 627 628 spin_lock_irqsave(&card->thread_mask_lock, flags); 629 card->thread_start_mask &= ~thread; 630 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 631 wake_up(&card->wait_q); 632 } 633 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 634 635 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 636 { 637 unsigned long flags; 638 639 spin_lock_irqsave(&card->thread_mask_lock, flags); 640 card->thread_running_mask &= ~thread; 641 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 642 wake_up(&card->wait_q); 643 } 644 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 645 646 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 647 { 648 unsigned long flags; 649 int rc = 0; 650 651 spin_lock_irqsave(&card->thread_mask_lock, flags); 652 if (card->thread_start_mask & thread) { 653 if ((card->thread_allowed_mask & thread) && 654 !(card->thread_running_mask & thread)) { 655 rc = 1; 656 card->thread_start_mask &= ~thread; 657 card->thread_running_mask |= thread; 658 } else 659 rc = -EPERM; 660 } 661 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 662 return rc; 663 } 664 665 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 666 { 667 int rc = 0; 668 669 wait_event(card->wait_q, 670 (rc = __qeth_do_run_thread(card, thread)) >= 0); 671 return rc; 672 } 673 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 674 675 void qeth_schedule_recovery(struct qeth_card *card) 676 { 677 QETH_CARD_TEXT(card, 2, "startrec"); 678 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 679 schedule_work(&card->kernel_thread_starter); 680 } 681 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 682 683 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 684 { 685 int dstat, cstat; 686 char *sense; 687 struct qeth_card *card; 688 689 sense = (char *) irb->ecw; 690 cstat = irb->scsw.cmd.cstat; 691 dstat = irb->scsw.cmd.dstat; 692 card = CARD_FROM_CDEV(cdev); 693 694 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 695 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 696 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 697 QETH_CARD_TEXT(card, 2, "CGENCHK"); 698 dev_warn(&cdev->dev, "The qeth device driver " 699 "failed to recover an error on the device\n"); 700 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 701 dev_name(&cdev->dev), dstat, cstat); 702 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 703 16, 1, irb, 64, 1); 704 return 1; 705 } 706 707 if (dstat & DEV_STAT_UNIT_CHECK) { 708 if (sense[SENSE_RESETTING_EVENT_BYTE] & 709 SENSE_RESETTING_EVENT_FLAG) { 710 QETH_CARD_TEXT(card, 2, "REVIND"); 711 return 1; 712 } 713 if (sense[SENSE_COMMAND_REJECT_BYTE] & 714 SENSE_COMMAND_REJECT_FLAG) { 715 QETH_CARD_TEXT(card, 2, "CMDREJi"); 716 return 1; 717 } 718 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 719 QETH_CARD_TEXT(card, 2, "AFFE"); 720 return 1; 721 } 722 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 723 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 724 return 0; 725 } 726 QETH_CARD_TEXT(card, 2, "DGENCHK"); 727 return 1; 728 } 729 return 0; 730 } 731 732 static long __qeth_check_irb_error(struct ccw_device *cdev, 733 unsigned long intparm, struct irb *irb) 734 { 735 struct qeth_card *card; 736 737 card = CARD_FROM_CDEV(cdev); 738 739 if (!IS_ERR(irb)) 740 return 0; 741 742 switch (PTR_ERR(irb)) { 743 case -EIO: 744 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 745 dev_name(&cdev->dev)); 746 QETH_CARD_TEXT(card, 2, "ckirberr"); 747 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 748 break; 749 case -ETIMEDOUT: 750 dev_warn(&cdev->dev, "A hardware operation timed out" 751 " on the device\n"); 752 QETH_CARD_TEXT(card, 2, "ckirberr"); 753 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 754 if (intparm == QETH_RCD_PARM) { 755 if (card && (card->data.ccwdev == cdev)) { 756 card->data.state = CH_STATE_DOWN; 757 wake_up(&card->wait_q); 758 } 759 } 760 break; 761 default: 762 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 763 dev_name(&cdev->dev), PTR_ERR(irb)); 764 QETH_CARD_TEXT(card, 2, "ckirberr"); 765 QETH_CARD_TEXT(card, 2, " rc???"); 766 } 767 return PTR_ERR(irb); 768 } 769 770 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 771 struct irb *irb) 772 { 773 int rc; 774 int cstat, dstat; 775 struct qeth_cmd_buffer *buffer; 776 struct qeth_channel *channel; 777 struct qeth_card *card; 778 struct qeth_cmd_buffer *iob; 779 __u8 index; 780 781 if (__qeth_check_irb_error(cdev, intparm, irb)) 782 return; 783 cstat = irb->scsw.cmd.cstat; 784 dstat = irb->scsw.cmd.dstat; 785 786 card = CARD_FROM_CDEV(cdev); 787 if (!card) 788 return; 789 790 QETH_CARD_TEXT(card, 5, "irq"); 791 792 if (card->read.ccwdev == cdev) { 793 channel = &card->read; 794 QETH_CARD_TEXT(card, 5, "read"); 795 } else if (card->write.ccwdev == cdev) { 796 channel = &card->write; 797 QETH_CARD_TEXT(card, 5, "write"); 798 } else { 799 channel = &card->data; 800 QETH_CARD_TEXT(card, 5, "data"); 801 } 802 atomic_set(&channel->irq_pending, 0); 803 804 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 805 channel->state = CH_STATE_STOPPED; 806 807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 808 channel->state = CH_STATE_HALTED; 809 810 /*let's wake up immediately on data channel*/ 811 if ((channel == &card->data) && (intparm != 0) && 812 (intparm != QETH_RCD_PARM)) 813 goto out; 814 815 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 816 QETH_CARD_TEXT(card, 6, "clrchpar"); 817 /* we don't have to handle this further */ 818 intparm = 0; 819 } 820 if (intparm == QETH_HALT_CHANNEL_PARM) { 821 QETH_CARD_TEXT(card, 6, "hltchpar"); 822 /* we don't have to handle this further */ 823 intparm = 0; 824 } 825 if ((dstat & DEV_STAT_UNIT_EXCEP) || 826 (dstat & DEV_STAT_UNIT_CHECK) || 827 (cstat)) { 828 if (irb->esw.esw0.erw.cons) { 829 dev_warn(&channel->ccwdev->dev, 830 "The qeth device driver failed to recover " 831 "an error on the device\n"); 832 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 833 "0x%X dstat 0x%X\n", 834 dev_name(&channel->ccwdev->dev), cstat, dstat); 835 print_hex_dump(KERN_WARNING, "qeth: irb ", 836 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 837 print_hex_dump(KERN_WARNING, "qeth: sense data ", 838 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 839 } 840 if (intparm == QETH_RCD_PARM) { 841 channel->state = CH_STATE_DOWN; 842 goto out; 843 } 844 rc = qeth_get_problem(cdev, irb); 845 if (rc) { 846 qeth_clear_ipacmd_list(card); 847 qeth_schedule_recovery(card); 848 goto out; 849 } 850 } 851 852 if (intparm == QETH_RCD_PARM) { 853 channel->state = CH_STATE_RCD_DONE; 854 goto out; 855 } 856 if (intparm) { 857 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 858 buffer->state = BUF_STATE_PROCESSED; 859 } 860 if (channel == &card->data) 861 return; 862 if (channel == &card->read && 863 channel->state == CH_STATE_UP) 864 qeth_issue_next_read(card); 865 866 iob = channel->iob; 867 index = channel->buf_no; 868 while (iob[index].state == BUF_STATE_PROCESSED) { 869 if (iob[index].callback != NULL) 870 iob[index].callback(channel, iob + index); 871 872 index = (index + 1) % QETH_CMD_BUFFER_NO; 873 } 874 channel->buf_no = index; 875 out: 876 wake_up(&card->wait_q); 877 return; 878 } 879 880 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 881 struct qeth_qdio_out_buffer *buf) 882 { 883 int i; 884 struct sk_buff *skb; 885 886 /* is PCI flag set on buffer? */ 887 if (buf->buffer->element[0].flags & 0x40) 888 atomic_dec(&queue->set_pci_flags_count); 889 890 skb = skb_dequeue(&buf->skb_list); 891 while (skb) { 892 atomic_dec(&skb->users); 893 dev_kfree_skb_any(skb); 894 skb = skb_dequeue(&buf->skb_list); 895 } 896 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 897 if (buf->buffer->element[i].addr && buf->is_header[i]) 898 kmem_cache_free(qeth_core_header_cache, 899 buf->buffer->element[i].addr); 900 buf->is_header[i] = 0; 901 buf->buffer->element[i].length = 0; 902 buf->buffer->element[i].addr = NULL; 903 buf->buffer->element[i].flags = 0; 904 } 905 buf->buffer->element[15].flags = 0; 906 buf->next_element_to_fill = 0; 907 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 908 } 909 910 void qeth_clear_qdio_buffers(struct qeth_card *card) 911 { 912 int i, j; 913 914 QETH_CARD_TEXT(card, 2, "clearqdbf"); 915 /* clear outbound buffers to free skbs */ 916 for (i = 0; i < card->qdio.no_out_queues; ++i) 917 if (card->qdio.out_qs[i]) { 918 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 919 qeth_clear_output_buffer(card->qdio.out_qs[i], 920 &card->qdio.out_qs[i]->bufs[j]); 921 } 922 } 923 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 924 925 static void qeth_free_buffer_pool(struct qeth_card *card) 926 { 927 struct qeth_buffer_pool_entry *pool_entry, *tmp; 928 int i = 0; 929 list_for_each_entry_safe(pool_entry, tmp, 930 &card->qdio.init_pool.entry_list, init_list){ 931 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 932 free_page((unsigned long)pool_entry->elements[i]); 933 list_del(&pool_entry->init_list); 934 kfree(pool_entry); 935 } 936 } 937 938 static void qeth_free_qdio_buffers(struct qeth_card *card) 939 { 940 int i, j; 941 942 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 943 QETH_QDIO_UNINITIALIZED) 944 return; 945 kfree(card->qdio.in_q); 946 card->qdio.in_q = NULL; 947 /* inbound buffer pool */ 948 qeth_free_buffer_pool(card); 949 /* free outbound qdio_qs */ 950 if (card->qdio.out_qs) { 951 for (i = 0; i < card->qdio.no_out_queues; ++i) { 952 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 953 qeth_clear_output_buffer(card->qdio.out_qs[i], 954 &card->qdio.out_qs[i]->bufs[j]); 955 kfree(card->qdio.out_qs[i]); 956 } 957 kfree(card->qdio.out_qs); 958 card->qdio.out_qs = NULL; 959 } 960 } 961 962 static void qeth_clean_channel(struct qeth_channel *channel) 963 { 964 int cnt; 965 966 QETH_DBF_TEXT(SETUP, 2, "freech"); 967 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 968 kfree(channel->iob[cnt].data); 969 } 970 971 static void qeth_get_channel_path_desc(struct qeth_card *card) 972 { 973 struct ccw_device *ccwdev; 974 struct channelPath_dsc { 975 u8 flags; 976 u8 lsn; 977 u8 desc; 978 u8 chpid; 979 u8 swla; 980 u8 zeroes; 981 u8 chla; 982 u8 chpp; 983 } *chp_dsc; 984 985 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 986 987 ccwdev = card->data.ccwdev; 988 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 989 if (chp_dsc != NULL) { 990 /* CHPP field bit 6 == 1 -> single queue */ 991 if ((chp_dsc->chpp & 0x02) == 0x02) { 992 if ((atomic_read(&card->qdio.state) != 993 QETH_QDIO_UNINITIALIZED) && 994 (card->qdio.no_out_queues == 4)) 995 /* change from 4 to 1 outbound queues */ 996 qeth_free_qdio_buffers(card); 997 card->qdio.no_out_queues = 1; 998 if (card->qdio.default_out_queue != 0) 999 dev_info(&card->gdev->dev, 1000 "Priority Queueing not supported\n"); 1001 card->qdio.default_out_queue = 0; 1002 } else { 1003 if ((atomic_read(&card->qdio.state) != 1004 QETH_QDIO_UNINITIALIZED) && 1005 (card->qdio.no_out_queues == 1)) { 1006 /* change from 1 to 4 outbound queues */ 1007 qeth_free_qdio_buffers(card); 1008 card->qdio.default_out_queue = 2; 1009 } 1010 card->qdio.no_out_queues = 4; 1011 } 1012 card->info.func_level = 0x4100 + chp_dsc->desc; 1013 kfree(chp_dsc); 1014 } 1015 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1016 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1017 return; 1018 } 1019 1020 static void qeth_init_qdio_info(struct qeth_card *card) 1021 { 1022 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1023 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1024 /* inbound */ 1025 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1026 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1027 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1028 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1029 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1030 } 1031 1032 static void qeth_set_intial_options(struct qeth_card *card) 1033 { 1034 card->options.route4.type = NO_ROUTER; 1035 card->options.route6.type = NO_ROUTER; 1036 card->options.checksum_type = QETH_CHECKSUM_DEFAULT; 1037 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1038 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1039 card->options.fake_broadcast = 0; 1040 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1041 card->options.performance_stats = 0; 1042 card->options.rx_sg_cb = QETH_RX_SG_CB; 1043 card->options.isolation = ISOLATION_MODE_NONE; 1044 } 1045 1046 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1047 { 1048 unsigned long flags; 1049 int rc = 0; 1050 1051 spin_lock_irqsave(&card->thread_mask_lock, flags); 1052 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1053 (u8) card->thread_start_mask, 1054 (u8) card->thread_allowed_mask, 1055 (u8) card->thread_running_mask); 1056 rc = (card->thread_start_mask & thread); 1057 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1058 return rc; 1059 } 1060 1061 static void qeth_start_kernel_thread(struct work_struct *work) 1062 { 1063 struct qeth_card *card = container_of(work, struct qeth_card, 1064 kernel_thread_starter); 1065 QETH_CARD_TEXT(card , 2, "strthrd"); 1066 1067 if (card->read.state != CH_STATE_UP && 1068 card->write.state != CH_STATE_UP) 1069 return; 1070 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1071 kthread_run(card->discipline.recover, (void *) card, 1072 "qeth_recover"); 1073 } 1074 1075 static int qeth_setup_card(struct qeth_card *card) 1076 { 1077 1078 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1079 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1080 1081 card->read.state = CH_STATE_DOWN; 1082 card->write.state = CH_STATE_DOWN; 1083 card->data.state = CH_STATE_DOWN; 1084 card->state = CARD_STATE_DOWN; 1085 card->lan_online = 0; 1086 card->use_hard_stop = 0; 1087 card->read_or_write_problem = 0; 1088 card->dev = NULL; 1089 spin_lock_init(&card->vlanlock); 1090 spin_lock_init(&card->mclock); 1091 card->vlangrp = NULL; 1092 spin_lock_init(&card->lock); 1093 spin_lock_init(&card->ip_lock); 1094 spin_lock_init(&card->thread_mask_lock); 1095 mutex_init(&card->conf_mutex); 1096 mutex_init(&card->discipline_mutex); 1097 card->thread_start_mask = 0; 1098 card->thread_allowed_mask = 0; 1099 card->thread_running_mask = 0; 1100 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1101 INIT_LIST_HEAD(&card->ip_list); 1102 INIT_LIST_HEAD(card->ip_tbd_list); 1103 INIT_LIST_HEAD(&card->cmd_waiter_list); 1104 init_waitqueue_head(&card->wait_q); 1105 /* intial options */ 1106 qeth_set_intial_options(card); 1107 /* IP address takeover */ 1108 INIT_LIST_HEAD(&card->ipato.entries); 1109 card->ipato.enabled = 0; 1110 card->ipato.invert4 = 0; 1111 card->ipato.invert6 = 0; 1112 /* init QDIO stuff */ 1113 qeth_init_qdio_info(card); 1114 return 0; 1115 } 1116 1117 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1118 { 1119 struct qeth_card *card = container_of(slr, struct qeth_card, 1120 qeth_service_level); 1121 if (card->info.mcl_level[0]) 1122 seq_printf(m, "qeth: %s firmware level %s\n", 1123 CARD_BUS_ID(card), card->info.mcl_level); 1124 } 1125 1126 static struct qeth_card *qeth_alloc_card(void) 1127 { 1128 struct qeth_card *card; 1129 1130 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1131 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1132 if (!card) 1133 goto out; 1134 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1135 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1136 if (!card->ip_tbd_list) { 1137 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1138 goto out_card; 1139 } 1140 if (qeth_setup_channel(&card->read)) 1141 goto out_ip; 1142 if (qeth_setup_channel(&card->write)) 1143 goto out_channel; 1144 card->options.layer2 = -1; 1145 card->qeth_service_level.seq_print = qeth_core_sl_print; 1146 register_service_level(&card->qeth_service_level); 1147 return card; 1148 1149 out_channel: 1150 qeth_clean_channel(&card->read); 1151 out_ip: 1152 kfree(card->ip_tbd_list); 1153 out_card: 1154 kfree(card); 1155 out: 1156 return NULL; 1157 } 1158 1159 static int qeth_determine_card_type(struct qeth_card *card) 1160 { 1161 int i = 0; 1162 1163 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1164 1165 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1166 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1167 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1168 if ((CARD_RDEV(card)->id.dev_type == 1169 known_devices[i][QETH_DEV_TYPE_IND]) && 1170 (CARD_RDEV(card)->id.dev_model == 1171 known_devices[i][QETH_DEV_MODEL_IND])) { 1172 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1173 card->qdio.no_out_queues = 1174 known_devices[i][QETH_QUEUE_NO_IND]; 1175 card->info.is_multicast_different = 1176 known_devices[i][QETH_MULTICAST_IND]; 1177 qeth_get_channel_path_desc(card); 1178 return 0; 1179 } 1180 i++; 1181 } 1182 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1183 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1184 "unknown type\n"); 1185 return -ENOENT; 1186 } 1187 1188 static int qeth_clear_channel(struct qeth_channel *channel) 1189 { 1190 unsigned long flags; 1191 struct qeth_card *card; 1192 int rc; 1193 1194 card = CARD_FROM_CDEV(channel->ccwdev); 1195 QETH_CARD_TEXT(card, 3, "clearch"); 1196 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1197 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1198 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1199 1200 if (rc) 1201 return rc; 1202 rc = wait_event_interruptible_timeout(card->wait_q, 1203 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1204 if (rc == -ERESTARTSYS) 1205 return rc; 1206 if (channel->state != CH_STATE_STOPPED) 1207 return -ETIME; 1208 channel->state = CH_STATE_DOWN; 1209 return 0; 1210 } 1211 1212 static int qeth_halt_channel(struct qeth_channel *channel) 1213 { 1214 unsigned long flags; 1215 struct qeth_card *card; 1216 int rc; 1217 1218 card = CARD_FROM_CDEV(channel->ccwdev); 1219 QETH_CARD_TEXT(card, 3, "haltch"); 1220 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1221 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1222 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1223 1224 if (rc) 1225 return rc; 1226 rc = wait_event_interruptible_timeout(card->wait_q, 1227 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1228 if (rc == -ERESTARTSYS) 1229 return rc; 1230 if (channel->state != CH_STATE_HALTED) 1231 return -ETIME; 1232 return 0; 1233 } 1234 1235 static int qeth_halt_channels(struct qeth_card *card) 1236 { 1237 int rc1 = 0, rc2 = 0, rc3 = 0; 1238 1239 QETH_CARD_TEXT(card, 3, "haltchs"); 1240 rc1 = qeth_halt_channel(&card->read); 1241 rc2 = qeth_halt_channel(&card->write); 1242 rc3 = qeth_halt_channel(&card->data); 1243 if (rc1) 1244 return rc1; 1245 if (rc2) 1246 return rc2; 1247 return rc3; 1248 } 1249 1250 static int qeth_clear_channels(struct qeth_card *card) 1251 { 1252 int rc1 = 0, rc2 = 0, rc3 = 0; 1253 1254 QETH_CARD_TEXT(card, 3, "clearchs"); 1255 rc1 = qeth_clear_channel(&card->read); 1256 rc2 = qeth_clear_channel(&card->write); 1257 rc3 = qeth_clear_channel(&card->data); 1258 if (rc1) 1259 return rc1; 1260 if (rc2) 1261 return rc2; 1262 return rc3; 1263 } 1264 1265 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1266 { 1267 int rc = 0; 1268 1269 QETH_CARD_TEXT(card, 3, "clhacrd"); 1270 1271 if (halt) 1272 rc = qeth_halt_channels(card); 1273 if (rc) 1274 return rc; 1275 return qeth_clear_channels(card); 1276 } 1277 1278 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1279 { 1280 int rc = 0; 1281 1282 QETH_CARD_TEXT(card, 3, "qdioclr"); 1283 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1284 QETH_QDIO_CLEANING)) { 1285 case QETH_QDIO_ESTABLISHED: 1286 if (card->info.type == QETH_CARD_TYPE_IQD) 1287 rc = qdio_shutdown(CARD_DDEV(card), 1288 QDIO_FLAG_CLEANUP_USING_HALT); 1289 else 1290 rc = qdio_shutdown(CARD_DDEV(card), 1291 QDIO_FLAG_CLEANUP_USING_CLEAR); 1292 if (rc) 1293 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1294 qdio_free(CARD_DDEV(card)); 1295 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1296 break; 1297 case QETH_QDIO_CLEANING: 1298 return rc; 1299 default: 1300 break; 1301 } 1302 rc = qeth_clear_halt_card(card, use_halt); 1303 if (rc) 1304 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1305 card->state = CARD_STATE_DOWN; 1306 return rc; 1307 } 1308 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1309 1310 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1311 int *length) 1312 { 1313 struct ciw *ciw; 1314 char *rcd_buf; 1315 int ret; 1316 struct qeth_channel *channel = &card->data; 1317 unsigned long flags; 1318 1319 /* 1320 * scan for RCD command in extended SenseID data 1321 */ 1322 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1323 if (!ciw || ciw->cmd == 0) 1324 return -EOPNOTSUPP; 1325 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1326 if (!rcd_buf) 1327 return -ENOMEM; 1328 1329 channel->ccw.cmd_code = ciw->cmd; 1330 channel->ccw.cda = (__u32) __pa(rcd_buf); 1331 channel->ccw.count = ciw->count; 1332 channel->ccw.flags = CCW_FLAG_SLI; 1333 channel->state = CH_STATE_RCD; 1334 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1335 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1336 QETH_RCD_PARM, LPM_ANYPATH, 0, 1337 QETH_RCD_TIMEOUT); 1338 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1339 if (!ret) 1340 wait_event(card->wait_q, 1341 (channel->state == CH_STATE_RCD_DONE || 1342 channel->state == CH_STATE_DOWN)); 1343 if (channel->state == CH_STATE_DOWN) 1344 ret = -EIO; 1345 else 1346 channel->state = CH_STATE_DOWN; 1347 if (ret) { 1348 kfree(rcd_buf); 1349 *buffer = NULL; 1350 *length = 0; 1351 } else { 1352 *length = ciw->count; 1353 *buffer = rcd_buf; 1354 } 1355 return ret; 1356 } 1357 1358 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1359 { 1360 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1361 card->info.chpid = prcd[30]; 1362 card->info.unit_addr2 = prcd[31]; 1363 card->info.cula = prcd[63]; 1364 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1365 (prcd[0x11] == _ascebc['M'])); 1366 } 1367 1368 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1369 { 1370 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1371 1372 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) { 1373 card->info.blkt.time_total = 250; 1374 card->info.blkt.inter_packet = 5; 1375 card->info.blkt.inter_packet_jumbo = 15; 1376 } else { 1377 card->info.blkt.time_total = 0; 1378 card->info.blkt.inter_packet = 0; 1379 card->info.blkt.inter_packet_jumbo = 0; 1380 } 1381 } 1382 1383 static void qeth_init_tokens(struct qeth_card *card) 1384 { 1385 card->token.issuer_rm_w = 0x00010103UL; 1386 card->token.cm_filter_w = 0x00010108UL; 1387 card->token.cm_connection_w = 0x0001010aUL; 1388 card->token.ulp_filter_w = 0x0001010bUL; 1389 card->token.ulp_connection_w = 0x0001010dUL; 1390 } 1391 1392 static void qeth_init_func_level(struct qeth_card *card) 1393 { 1394 switch (card->info.type) { 1395 case QETH_CARD_TYPE_IQD: 1396 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1397 break; 1398 case QETH_CARD_TYPE_OSD: 1399 case QETH_CARD_TYPE_OSN: 1400 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1401 break; 1402 default: 1403 break; 1404 } 1405 } 1406 1407 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1408 void (*idx_reply_cb)(struct qeth_channel *, 1409 struct qeth_cmd_buffer *)) 1410 { 1411 struct qeth_cmd_buffer *iob; 1412 unsigned long flags; 1413 int rc; 1414 struct qeth_card *card; 1415 1416 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1417 card = CARD_FROM_CDEV(channel->ccwdev); 1418 iob = qeth_get_buffer(channel); 1419 iob->callback = idx_reply_cb; 1420 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1421 channel->ccw.count = QETH_BUFSIZE; 1422 channel->ccw.cda = (__u32) __pa(iob->data); 1423 1424 wait_event(card->wait_q, 1425 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1426 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1427 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1428 rc = ccw_device_start(channel->ccwdev, 1429 &channel->ccw, (addr_t) iob, 0, 0); 1430 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1431 1432 if (rc) { 1433 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1434 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1435 atomic_set(&channel->irq_pending, 0); 1436 wake_up(&card->wait_q); 1437 return rc; 1438 } 1439 rc = wait_event_interruptible_timeout(card->wait_q, 1440 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1441 if (rc == -ERESTARTSYS) 1442 return rc; 1443 if (channel->state != CH_STATE_UP) { 1444 rc = -ETIME; 1445 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1446 qeth_clear_cmd_buffers(channel); 1447 } else 1448 rc = 0; 1449 return rc; 1450 } 1451 1452 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1453 void (*idx_reply_cb)(struct qeth_channel *, 1454 struct qeth_cmd_buffer *)) 1455 { 1456 struct qeth_card *card; 1457 struct qeth_cmd_buffer *iob; 1458 unsigned long flags; 1459 __u16 temp; 1460 __u8 tmp; 1461 int rc; 1462 struct ccw_dev_id temp_devid; 1463 1464 card = CARD_FROM_CDEV(channel->ccwdev); 1465 1466 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1467 1468 iob = qeth_get_buffer(channel); 1469 iob->callback = idx_reply_cb; 1470 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1471 channel->ccw.count = IDX_ACTIVATE_SIZE; 1472 channel->ccw.cda = (__u32) __pa(iob->data); 1473 if (channel == &card->write) { 1474 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1475 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1476 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1477 card->seqno.trans_hdr++; 1478 } else { 1479 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1480 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1481 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1482 } 1483 tmp = ((__u8)card->info.portno) | 0x80; 1484 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1485 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1486 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1487 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1488 &card->info.func_level, sizeof(__u16)); 1489 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1490 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1491 temp = (card->info.cula << 8) + card->info.unit_addr2; 1492 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1493 1494 wait_event(card->wait_q, 1495 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1496 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1497 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1498 rc = ccw_device_start(channel->ccwdev, 1499 &channel->ccw, (addr_t) iob, 0, 0); 1500 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1501 1502 if (rc) { 1503 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1504 rc); 1505 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1506 atomic_set(&channel->irq_pending, 0); 1507 wake_up(&card->wait_q); 1508 return rc; 1509 } 1510 rc = wait_event_interruptible_timeout(card->wait_q, 1511 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1512 if (rc == -ERESTARTSYS) 1513 return rc; 1514 if (channel->state != CH_STATE_ACTIVATING) { 1515 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1516 " failed to recover an error on the device\n"); 1517 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1518 dev_name(&channel->ccwdev->dev)); 1519 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1520 qeth_clear_cmd_buffers(channel); 1521 return -ETIME; 1522 } 1523 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1524 } 1525 1526 static int qeth_peer_func_level(int level) 1527 { 1528 if ((level & 0xff) == 8) 1529 return (level & 0xff) + 0x400; 1530 if (((level >> 8) & 3) == 1) 1531 return (level & 0xff) + 0x200; 1532 return level; 1533 } 1534 1535 static void qeth_idx_write_cb(struct qeth_channel *channel, 1536 struct qeth_cmd_buffer *iob) 1537 { 1538 struct qeth_card *card; 1539 __u16 temp; 1540 1541 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1542 1543 if (channel->state == CH_STATE_DOWN) { 1544 channel->state = CH_STATE_ACTIVATING; 1545 goto out; 1546 } 1547 card = CARD_FROM_CDEV(channel->ccwdev); 1548 1549 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1550 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1551 dev_err(&card->write.ccwdev->dev, 1552 "The adapter is used exclusively by another " 1553 "host\n"); 1554 else 1555 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1556 " negative reply\n", 1557 dev_name(&card->write.ccwdev->dev)); 1558 goto out; 1559 } 1560 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1561 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1562 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1563 "function level mismatch (sent: 0x%x, received: " 1564 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1565 card->info.func_level, temp); 1566 goto out; 1567 } 1568 channel->state = CH_STATE_UP; 1569 out: 1570 qeth_release_buffer(channel, iob); 1571 } 1572 1573 static void qeth_idx_read_cb(struct qeth_channel *channel, 1574 struct qeth_cmd_buffer *iob) 1575 { 1576 struct qeth_card *card; 1577 __u16 temp; 1578 1579 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1580 if (channel->state == CH_STATE_DOWN) { 1581 channel->state = CH_STATE_ACTIVATING; 1582 goto out; 1583 } 1584 1585 card = CARD_FROM_CDEV(channel->ccwdev); 1586 if (qeth_check_idx_response(card, iob->data)) 1587 goto out; 1588 1589 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1590 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1591 case QETH_IDX_ACT_ERR_EXCL: 1592 dev_err(&card->write.ccwdev->dev, 1593 "The adapter is used exclusively by another " 1594 "host\n"); 1595 break; 1596 case QETH_IDX_ACT_ERR_AUTH: 1597 case QETH_IDX_ACT_ERR_AUTH_USER: 1598 dev_err(&card->read.ccwdev->dev, 1599 "Setting the device online failed because of " 1600 "insufficient authorization\n"); 1601 break; 1602 default: 1603 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1604 " negative reply\n", 1605 dev_name(&card->read.ccwdev->dev)); 1606 } 1607 QETH_CARD_TEXT_(card, 2, "idxread%c", 1608 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1609 goto out; 1610 } 1611 1612 /** 1613 * * temporary fix for microcode bug 1614 * * to revert it,replace OR by AND 1615 * */ 1616 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1617 (card->info.type == QETH_CARD_TYPE_OSD)) 1618 card->info.portname_required = 1; 1619 1620 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1621 if (temp != qeth_peer_func_level(card->info.func_level)) { 1622 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1623 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1624 dev_name(&card->read.ccwdev->dev), 1625 card->info.func_level, temp); 1626 goto out; 1627 } 1628 memcpy(&card->token.issuer_rm_r, 1629 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1630 QETH_MPC_TOKEN_LENGTH); 1631 memcpy(&card->info.mcl_level[0], 1632 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1633 channel->state = CH_STATE_UP; 1634 out: 1635 qeth_release_buffer(channel, iob); 1636 } 1637 1638 void qeth_prepare_control_data(struct qeth_card *card, int len, 1639 struct qeth_cmd_buffer *iob) 1640 { 1641 qeth_setup_ccw(&card->write, iob->data, len); 1642 iob->callback = qeth_release_buffer; 1643 1644 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1645 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1646 card->seqno.trans_hdr++; 1647 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1648 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1649 card->seqno.pdu_hdr++; 1650 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1651 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1652 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1653 } 1654 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1655 1656 int qeth_send_control_data(struct qeth_card *card, int len, 1657 struct qeth_cmd_buffer *iob, 1658 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1659 unsigned long), 1660 void *reply_param) 1661 { 1662 int rc; 1663 unsigned long flags; 1664 struct qeth_reply *reply = NULL; 1665 unsigned long timeout, event_timeout; 1666 struct qeth_ipa_cmd *cmd; 1667 1668 QETH_CARD_TEXT(card, 2, "sendctl"); 1669 1670 if (card->read_or_write_problem) { 1671 qeth_release_buffer(iob->channel, iob); 1672 return -EIO; 1673 } 1674 reply = qeth_alloc_reply(card); 1675 if (!reply) { 1676 return -ENOMEM; 1677 } 1678 reply->callback = reply_cb; 1679 reply->param = reply_param; 1680 if (card->state == CARD_STATE_DOWN) 1681 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1682 else 1683 reply->seqno = card->seqno.ipa++; 1684 init_waitqueue_head(&reply->wait_q); 1685 spin_lock_irqsave(&card->lock, flags); 1686 list_add_tail(&reply->list, &card->cmd_waiter_list); 1687 spin_unlock_irqrestore(&card->lock, flags); 1688 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1689 1690 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1691 qeth_prepare_control_data(card, len, iob); 1692 1693 if (IS_IPA(iob->data)) 1694 event_timeout = QETH_IPA_TIMEOUT; 1695 else 1696 event_timeout = QETH_TIMEOUT; 1697 timeout = jiffies + event_timeout; 1698 1699 QETH_CARD_TEXT(card, 6, "noirqpnd"); 1700 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1701 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1702 (addr_t) iob, 0, 0); 1703 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1704 if (rc) { 1705 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1706 "ccw_device_start rc = %i\n", 1707 dev_name(&card->write.ccwdev->dev), rc); 1708 QETH_CARD_TEXT_(card, 2, " err%d", rc); 1709 spin_lock_irqsave(&card->lock, flags); 1710 list_del_init(&reply->list); 1711 qeth_put_reply(reply); 1712 spin_unlock_irqrestore(&card->lock, flags); 1713 qeth_release_buffer(iob->channel, iob); 1714 atomic_set(&card->write.irq_pending, 0); 1715 wake_up(&card->wait_q); 1716 return rc; 1717 } 1718 1719 /* we have only one long running ipassist, since we can ensure 1720 process context of this command we can sleep */ 1721 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1722 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1723 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1724 if (!wait_event_timeout(reply->wait_q, 1725 atomic_read(&reply->received), event_timeout)) 1726 goto time_err; 1727 } else { 1728 while (!atomic_read(&reply->received)) { 1729 if (time_after(jiffies, timeout)) 1730 goto time_err; 1731 cpu_relax(); 1732 }; 1733 } 1734 1735 rc = reply->rc; 1736 qeth_put_reply(reply); 1737 return rc; 1738 1739 time_err: 1740 spin_lock_irqsave(&reply->card->lock, flags); 1741 list_del_init(&reply->list); 1742 spin_unlock_irqrestore(&reply->card->lock, flags); 1743 reply->rc = -ETIME; 1744 atomic_inc(&reply->received); 1745 atomic_set(&card->write.irq_pending, 0); 1746 qeth_release_buffer(iob->channel, iob); 1747 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 1748 wake_up(&reply->wait_q); 1749 rc = reply->rc; 1750 qeth_put_reply(reply); 1751 return rc; 1752 } 1753 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1754 1755 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1756 unsigned long data) 1757 { 1758 struct qeth_cmd_buffer *iob; 1759 1760 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1761 1762 iob = (struct qeth_cmd_buffer *) data; 1763 memcpy(&card->token.cm_filter_r, 1764 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1765 QETH_MPC_TOKEN_LENGTH); 1766 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1767 return 0; 1768 } 1769 1770 static int qeth_cm_enable(struct qeth_card *card) 1771 { 1772 int rc; 1773 struct qeth_cmd_buffer *iob; 1774 1775 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1776 1777 iob = qeth_wait_for_buffer(&card->write); 1778 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1779 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1780 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1781 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1782 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1783 1784 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1785 qeth_cm_enable_cb, NULL); 1786 return rc; 1787 } 1788 1789 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1790 unsigned long data) 1791 { 1792 1793 struct qeth_cmd_buffer *iob; 1794 1795 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1796 1797 iob = (struct qeth_cmd_buffer *) data; 1798 memcpy(&card->token.cm_connection_r, 1799 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1800 QETH_MPC_TOKEN_LENGTH); 1801 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1802 return 0; 1803 } 1804 1805 static int qeth_cm_setup(struct qeth_card *card) 1806 { 1807 int rc; 1808 struct qeth_cmd_buffer *iob; 1809 1810 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1811 1812 iob = qeth_wait_for_buffer(&card->write); 1813 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1814 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1815 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1816 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1817 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1818 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1819 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1820 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1821 qeth_cm_setup_cb, NULL); 1822 return rc; 1823 1824 } 1825 1826 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1827 { 1828 switch (card->info.type) { 1829 case QETH_CARD_TYPE_UNKNOWN: 1830 return 1500; 1831 case QETH_CARD_TYPE_IQD: 1832 return card->info.max_mtu; 1833 case QETH_CARD_TYPE_OSD: 1834 switch (card->info.link_type) { 1835 case QETH_LINK_TYPE_HSTR: 1836 case QETH_LINK_TYPE_LANE_TR: 1837 return 2000; 1838 default: 1839 return 1492; 1840 } 1841 case QETH_CARD_TYPE_OSM: 1842 case QETH_CARD_TYPE_OSX: 1843 return 1492; 1844 default: 1845 return 1500; 1846 } 1847 } 1848 1849 static inline int qeth_get_mtu_outof_framesize(int framesize) 1850 { 1851 switch (framesize) { 1852 case 0x4000: 1853 return 8192; 1854 case 0x6000: 1855 return 16384; 1856 case 0xa000: 1857 return 32768; 1858 case 0xffff: 1859 return 57344; 1860 default: 1861 return 0; 1862 } 1863 } 1864 1865 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1866 { 1867 switch (card->info.type) { 1868 case QETH_CARD_TYPE_OSD: 1869 case QETH_CARD_TYPE_OSM: 1870 case QETH_CARD_TYPE_OSX: 1871 case QETH_CARD_TYPE_IQD: 1872 return ((mtu >= 576) && 1873 (mtu <= card->info.max_mtu)); 1874 case QETH_CARD_TYPE_OSN: 1875 case QETH_CARD_TYPE_UNKNOWN: 1876 default: 1877 return 1; 1878 } 1879 } 1880 1881 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1882 unsigned long data) 1883 { 1884 1885 __u16 mtu, framesize; 1886 __u16 len; 1887 __u8 link_type; 1888 struct qeth_cmd_buffer *iob; 1889 1890 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1891 1892 iob = (struct qeth_cmd_buffer *) data; 1893 memcpy(&card->token.ulp_filter_r, 1894 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1895 QETH_MPC_TOKEN_LENGTH); 1896 if (card->info.type == QETH_CARD_TYPE_IQD) { 1897 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1898 mtu = qeth_get_mtu_outof_framesize(framesize); 1899 if (!mtu) { 1900 iob->rc = -EINVAL; 1901 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1902 return 0; 1903 } 1904 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 1905 /* frame size has changed */ 1906 if (card->dev && 1907 ((card->dev->mtu == card->info.initial_mtu) || 1908 (card->dev->mtu > mtu))) 1909 card->dev->mtu = mtu; 1910 qeth_free_qdio_buffers(card); 1911 } 1912 card->info.initial_mtu = mtu; 1913 card->info.max_mtu = mtu; 1914 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1915 } else { 1916 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1917 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 1918 iob->data); 1919 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1920 } 1921 1922 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1923 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1924 memcpy(&link_type, 1925 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1926 card->info.link_type = link_type; 1927 } else 1928 card->info.link_type = 0; 1929 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 1930 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1931 return 0; 1932 } 1933 1934 static int qeth_ulp_enable(struct qeth_card *card) 1935 { 1936 int rc; 1937 char prot_type; 1938 struct qeth_cmd_buffer *iob; 1939 1940 /*FIXME: trace view callbacks*/ 1941 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1942 1943 iob = qeth_wait_for_buffer(&card->write); 1944 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1945 1946 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1947 (__u8) card->info.portno; 1948 if (card->options.layer2) 1949 if (card->info.type == QETH_CARD_TYPE_OSN) 1950 prot_type = QETH_PROT_OSN2; 1951 else 1952 prot_type = QETH_PROT_LAYER2; 1953 else 1954 prot_type = QETH_PROT_TCPIP; 1955 1956 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1957 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1958 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1959 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1960 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1961 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1962 card->info.portname, 9); 1963 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1964 qeth_ulp_enable_cb, NULL); 1965 return rc; 1966 1967 } 1968 1969 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1970 unsigned long data) 1971 { 1972 struct qeth_cmd_buffer *iob; 1973 int rc = 0; 1974 1975 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1976 1977 iob = (struct qeth_cmd_buffer *) data; 1978 memcpy(&card->token.ulp_connection_r, 1979 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1980 QETH_MPC_TOKEN_LENGTH); 1981 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1982 3)) { 1983 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 1984 dev_err(&card->gdev->dev, "A connection could not be " 1985 "established because of an OLM limit\n"); 1986 iob->rc = -EMLINK; 1987 } 1988 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1989 return rc; 1990 } 1991 1992 static int qeth_ulp_setup(struct qeth_card *card) 1993 { 1994 int rc; 1995 __u16 temp; 1996 struct qeth_cmd_buffer *iob; 1997 struct ccw_dev_id dev_id; 1998 1999 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2000 2001 iob = qeth_wait_for_buffer(&card->write); 2002 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2003 2004 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2005 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2006 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2007 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2008 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2009 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2010 2011 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2012 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2013 temp = (card->info.cula << 8) + card->info.unit_addr2; 2014 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2015 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2016 qeth_ulp_setup_cb, NULL); 2017 return rc; 2018 } 2019 2020 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2021 { 2022 int i, j; 2023 2024 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2025 2026 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2027 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2028 return 0; 2029 2030 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 2031 GFP_KERNEL); 2032 if (!card->qdio.in_q) 2033 goto out_nomem; 2034 QETH_DBF_TEXT(SETUP, 2, "inq"); 2035 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2036 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2037 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2038 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 2039 card->qdio.in_q->bufs[i].buffer = 2040 &card->qdio.in_q->qdio_bufs[i]; 2041 /* inbound buffer pool */ 2042 if (qeth_alloc_buffer_pool(card)) 2043 goto out_freeinq; 2044 /* outbound */ 2045 card->qdio.out_qs = 2046 kmalloc(card->qdio.no_out_queues * 2047 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2048 if (!card->qdio.out_qs) 2049 goto out_freepool; 2050 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2051 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2052 GFP_KERNEL); 2053 if (!card->qdio.out_qs[i]) 2054 goto out_freeoutq; 2055 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2056 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2057 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2058 card->qdio.out_qs[i]->queue_no = i; 2059 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2060 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2061 card->qdio.out_qs[i]->bufs[j].buffer = 2062 &card->qdio.out_qs[i]->qdio_bufs[j]; 2063 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2064 skb_list); 2065 lockdep_set_class( 2066 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2067 &qdio_out_skb_queue_key); 2068 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2069 } 2070 } 2071 return 0; 2072 2073 out_freeoutq: 2074 while (i > 0) 2075 kfree(card->qdio.out_qs[--i]); 2076 kfree(card->qdio.out_qs); 2077 card->qdio.out_qs = NULL; 2078 out_freepool: 2079 qeth_free_buffer_pool(card); 2080 out_freeinq: 2081 kfree(card->qdio.in_q); 2082 card->qdio.in_q = NULL; 2083 out_nomem: 2084 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2085 return -ENOMEM; 2086 } 2087 2088 static void qeth_create_qib_param_field(struct qeth_card *card, 2089 char *param_field) 2090 { 2091 2092 param_field[0] = _ascebc['P']; 2093 param_field[1] = _ascebc['C']; 2094 param_field[2] = _ascebc['I']; 2095 param_field[3] = _ascebc['T']; 2096 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2097 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2098 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2099 } 2100 2101 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2102 char *param_field) 2103 { 2104 param_field[16] = _ascebc['B']; 2105 param_field[17] = _ascebc['L']; 2106 param_field[18] = _ascebc['K']; 2107 param_field[19] = _ascebc['T']; 2108 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2109 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2110 *((unsigned int *) (¶m_field[28])) = 2111 card->info.blkt.inter_packet_jumbo; 2112 } 2113 2114 static int qeth_qdio_activate(struct qeth_card *card) 2115 { 2116 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2117 return qdio_activate(CARD_DDEV(card)); 2118 } 2119 2120 static int qeth_dm_act(struct qeth_card *card) 2121 { 2122 int rc; 2123 struct qeth_cmd_buffer *iob; 2124 2125 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2126 2127 iob = qeth_wait_for_buffer(&card->write); 2128 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2129 2130 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2131 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2132 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2133 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2134 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2135 return rc; 2136 } 2137 2138 static int qeth_mpc_initialize(struct qeth_card *card) 2139 { 2140 int rc; 2141 2142 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2143 2144 rc = qeth_issue_next_read(card); 2145 if (rc) { 2146 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2147 return rc; 2148 } 2149 rc = qeth_cm_enable(card); 2150 if (rc) { 2151 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2152 goto out_qdio; 2153 } 2154 rc = qeth_cm_setup(card); 2155 if (rc) { 2156 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2157 goto out_qdio; 2158 } 2159 rc = qeth_ulp_enable(card); 2160 if (rc) { 2161 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2162 goto out_qdio; 2163 } 2164 rc = qeth_ulp_setup(card); 2165 if (rc) { 2166 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2167 goto out_qdio; 2168 } 2169 rc = qeth_alloc_qdio_buffers(card); 2170 if (rc) { 2171 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2172 goto out_qdio; 2173 } 2174 rc = qeth_qdio_establish(card); 2175 if (rc) { 2176 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2177 qeth_free_qdio_buffers(card); 2178 goto out_qdio; 2179 } 2180 rc = qeth_qdio_activate(card); 2181 if (rc) { 2182 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2183 goto out_qdio; 2184 } 2185 rc = qeth_dm_act(card); 2186 if (rc) { 2187 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2188 goto out_qdio; 2189 } 2190 2191 return 0; 2192 out_qdio: 2193 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2194 return rc; 2195 } 2196 2197 static void qeth_print_status_with_portname(struct qeth_card *card) 2198 { 2199 char dbf_text[15]; 2200 int i; 2201 2202 sprintf(dbf_text, "%s", card->info.portname + 1); 2203 for (i = 0; i < 8; i++) 2204 dbf_text[i] = 2205 (char) _ebcasc[(__u8) dbf_text[i]]; 2206 dbf_text[8] = 0; 2207 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2208 "with link type %s (portname: %s)\n", 2209 qeth_get_cardname(card), 2210 (card->info.mcl_level[0]) ? " (level: " : "", 2211 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2212 (card->info.mcl_level[0]) ? ")" : "", 2213 qeth_get_cardname_short(card), 2214 dbf_text); 2215 2216 } 2217 2218 static void qeth_print_status_no_portname(struct qeth_card *card) 2219 { 2220 if (card->info.portname[0]) 2221 dev_info(&card->gdev->dev, "Device is a%s " 2222 "card%s%s%s\nwith link type %s " 2223 "(no portname needed by interface).\n", 2224 qeth_get_cardname(card), 2225 (card->info.mcl_level[0]) ? " (level: " : "", 2226 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2227 (card->info.mcl_level[0]) ? ")" : "", 2228 qeth_get_cardname_short(card)); 2229 else 2230 dev_info(&card->gdev->dev, "Device is a%s " 2231 "card%s%s%s\nwith link type %s.\n", 2232 qeth_get_cardname(card), 2233 (card->info.mcl_level[0]) ? " (level: " : "", 2234 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2235 (card->info.mcl_level[0]) ? ")" : "", 2236 qeth_get_cardname_short(card)); 2237 } 2238 2239 void qeth_print_status_message(struct qeth_card *card) 2240 { 2241 switch (card->info.type) { 2242 case QETH_CARD_TYPE_OSD: 2243 case QETH_CARD_TYPE_OSM: 2244 case QETH_CARD_TYPE_OSX: 2245 /* VM will use a non-zero first character 2246 * to indicate a HiperSockets like reporting 2247 * of the level OSA sets the first character to zero 2248 * */ 2249 if (!card->info.mcl_level[0]) { 2250 sprintf(card->info.mcl_level, "%02x%02x", 2251 card->info.mcl_level[2], 2252 card->info.mcl_level[3]); 2253 2254 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2255 break; 2256 } 2257 /* fallthrough */ 2258 case QETH_CARD_TYPE_IQD: 2259 if ((card->info.guestlan) || 2260 (card->info.mcl_level[0] & 0x80)) { 2261 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2262 card->info.mcl_level[0]]; 2263 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2264 card->info.mcl_level[1]]; 2265 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2266 card->info.mcl_level[2]]; 2267 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2268 card->info.mcl_level[3]]; 2269 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2270 } 2271 break; 2272 default: 2273 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2274 } 2275 if (card->info.portname_required) 2276 qeth_print_status_with_portname(card); 2277 else 2278 qeth_print_status_no_portname(card); 2279 } 2280 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2281 2282 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2283 { 2284 struct qeth_buffer_pool_entry *entry; 2285 2286 QETH_CARD_TEXT(card, 5, "inwrklst"); 2287 2288 list_for_each_entry(entry, 2289 &card->qdio.init_pool.entry_list, init_list) { 2290 qeth_put_buffer_pool_entry(card, entry); 2291 } 2292 } 2293 2294 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2295 struct qeth_card *card) 2296 { 2297 struct list_head *plh; 2298 struct qeth_buffer_pool_entry *entry; 2299 int i, free; 2300 struct page *page; 2301 2302 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2303 return NULL; 2304 2305 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2306 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2307 free = 1; 2308 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2309 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2310 free = 0; 2311 break; 2312 } 2313 } 2314 if (free) { 2315 list_del_init(&entry->list); 2316 return entry; 2317 } 2318 } 2319 2320 /* no free buffer in pool so take first one and swap pages */ 2321 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2322 struct qeth_buffer_pool_entry, list); 2323 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2324 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2325 page = alloc_page(GFP_ATOMIC); 2326 if (!page) { 2327 return NULL; 2328 } else { 2329 free_page((unsigned long)entry->elements[i]); 2330 entry->elements[i] = page_address(page); 2331 if (card->options.performance_stats) 2332 card->perf_stats.sg_alloc_page_rx++; 2333 } 2334 } 2335 } 2336 list_del_init(&entry->list); 2337 return entry; 2338 } 2339 2340 static int qeth_init_input_buffer(struct qeth_card *card, 2341 struct qeth_qdio_buffer *buf) 2342 { 2343 struct qeth_buffer_pool_entry *pool_entry; 2344 int i; 2345 2346 pool_entry = qeth_find_free_buffer_pool_entry(card); 2347 if (!pool_entry) 2348 return 1; 2349 2350 /* 2351 * since the buffer is accessed only from the input_tasklet 2352 * there shouldn't be a need to synchronize; also, since we use 2353 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2354 * buffers 2355 */ 2356 2357 buf->pool_entry = pool_entry; 2358 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2359 buf->buffer->element[i].length = PAGE_SIZE; 2360 buf->buffer->element[i].addr = pool_entry->elements[i]; 2361 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2362 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; 2363 else 2364 buf->buffer->element[i].flags = 0; 2365 } 2366 return 0; 2367 } 2368 2369 int qeth_init_qdio_queues(struct qeth_card *card) 2370 { 2371 int i, j; 2372 int rc; 2373 2374 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2375 2376 /* inbound queue */ 2377 memset(card->qdio.in_q->qdio_bufs, 0, 2378 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2379 qeth_initialize_working_pool_list(card); 2380 /*give only as many buffers to hardware as we have buffer pool entries*/ 2381 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2382 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2383 card->qdio.in_q->next_buf_to_init = 2384 card->qdio.in_buf_pool.buf_count - 1; 2385 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2386 card->qdio.in_buf_pool.buf_count - 1); 2387 if (rc) { 2388 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2389 return rc; 2390 } 2391 /* outbound queue */ 2392 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2393 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2394 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2395 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2396 qeth_clear_output_buffer(card->qdio.out_qs[i], 2397 &card->qdio.out_qs[i]->bufs[j]); 2398 } 2399 card->qdio.out_qs[i]->card = card; 2400 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2401 card->qdio.out_qs[i]->do_pack = 0; 2402 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2403 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2404 atomic_set(&card->qdio.out_qs[i]->state, 2405 QETH_OUT_Q_UNLOCKED); 2406 } 2407 return 0; 2408 } 2409 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2410 2411 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2412 { 2413 switch (link_type) { 2414 case QETH_LINK_TYPE_HSTR: 2415 return 2; 2416 default: 2417 return 1; 2418 } 2419 } 2420 2421 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2422 struct qeth_ipa_cmd *cmd, __u8 command, 2423 enum qeth_prot_versions prot) 2424 { 2425 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2426 cmd->hdr.command = command; 2427 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2428 cmd->hdr.seqno = card->seqno.ipa; 2429 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2430 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2431 if (card->options.layer2) 2432 cmd->hdr.prim_version_no = 2; 2433 else 2434 cmd->hdr.prim_version_no = 1; 2435 cmd->hdr.param_count = 1; 2436 cmd->hdr.prot_version = prot; 2437 cmd->hdr.ipa_supported = 0; 2438 cmd->hdr.ipa_enabled = 0; 2439 } 2440 2441 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2442 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2443 { 2444 struct qeth_cmd_buffer *iob; 2445 struct qeth_ipa_cmd *cmd; 2446 2447 iob = qeth_wait_for_buffer(&card->write); 2448 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2449 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2450 2451 return iob; 2452 } 2453 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2454 2455 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2456 char prot_type) 2457 { 2458 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2459 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2460 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2461 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2462 } 2463 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2464 2465 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2466 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2467 unsigned long), 2468 void *reply_param) 2469 { 2470 int rc; 2471 char prot_type; 2472 2473 QETH_CARD_TEXT(card, 4, "sendipa"); 2474 2475 if (card->options.layer2) 2476 if (card->info.type == QETH_CARD_TYPE_OSN) 2477 prot_type = QETH_PROT_OSN2; 2478 else 2479 prot_type = QETH_PROT_LAYER2; 2480 else 2481 prot_type = QETH_PROT_TCPIP; 2482 qeth_prepare_ipa_cmd(card, iob, prot_type); 2483 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2484 iob, reply_cb, reply_param); 2485 if (rc == -ETIME) { 2486 qeth_clear_ipacmd_list(card); 2487 qeth_schedule_recovery(card); 2488 } 2489 return rc; 2490 } 2491 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2492 2493 static int qeth_send_startstoplan(struct qeth_card *card, 2494 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2495 { 2496 int rc; 2497 struct qeth_cmd_buffer *iob; 2498 2499 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); 2500 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2501 2502 return rc; 2503 } 2504 2505 int qeth_send_startlan(struct qeth_card *card) 2506 { 2507 int rc; 2508 2509 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2510 2511 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); 2512 return rc; 2513 } 2514 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2515 2516 int qeth_send_stoplan(struct qeth_card *card) 2517 { 2518 int rc = 0; 2519 2520 /* 2521 * TODO: according to the IPA format document page 14, 2522 * TCP/IP (we!) never issue a STOPLAN 2523 * is this right ?!? 2524 */ 2525 QETH_DBF_TEXT(SETUP, 2, "stoplan"); 2526 2527 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); 2528 return rc; 2529 } 2530 EXPORT_SYMBOL_GPL(qeth_send_stoplan); 2531 2532 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2533 struct qeth_reply *reply, unsigned long data) 2534 { 2535 struct qeth_ipa_cmd *cmd; 2536 2537 QETH_CARD_TEXT(card, 4, "defadpcb"); 2538 2539 cmd = (struct qeth_ipa_cmd *) data; 2540 if (cmd->hdr.return_code == 0) 2541 cmd->hdr.return_code = 2542 cmd->data.setadapterparms.hdr.return_code; 2543 return 0; 2544 } 2545 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2546 2547 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2548 struct qeth_reply *reply, unsigned long data) 2549 { 2550 struct qeth_ipa_cmd *cmd; 2551 2552 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2553 2554 cmd = (struct qeth_ipa_cmd *) data; 2555 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2556 card->info.link_type = 2557 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2558 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2559 } 2560 card->options.adp.supported_funcs = 2561 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2562 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2563 } 2564 2565 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2566 __u32 command, __u32 cmdlen) 2567 { 2568 struct qeth_cmd_buffer *iob; 2569 struct qeth_ipa_cmd *cmd; 2570 2571 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2572 QETH_PROT_IPV4); 2573 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2574 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2575 cmd->data.setadapterparms.hdr.command_code = command; 2576 cmd->data.setadapterparms.hdr.used_total = 1; 2577 cmd->data.setadapterparms.hdr.seq_no = 1; 2578 2579 return iob; 2580 } 2581 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2582 2583 int qeth_query_setadapterparms(struct qeth_card *card) 2584 { 2585 int rc; 2586 struct qeth_cmd_buffer *iob; 2587 2588 QETH_CARD_TEXT(card, 3, "queryadp"); 2589 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2590 sizeof(struct qeth_ipacmd_setadpparms)); 2591 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2592 return rc; 2593 } 2594 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2595 2596 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 2597 unsigned int qdio_error, const char *dbftext) 2598 { 2599 if (qdio_error) { 2600 QETH_CARD_TEXT(card, 2, dbftext); 2601 QETH_CARD_TEXT_(card, 2, " F15=%02X", 2602 buf->element[15].flags & 0xff); 2603 QETH_CARD_TEXT_(card, 2, " F14=%02X", 2604 buf->element[14].flags & 0xff); 2605 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 2606 if ((buf->element[15].flags & 0xff) == 0x12) { 2607 card->stats.rx_dropped++; 2608 return 0; 2609 } else 2610 return 1; 2611 } 2612 return 0; 2613 } 2614 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2615 2616 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2617 { 2618 struct qeth_qdio_q *queue = card->qdio.in_q; 2619 int count; 2620 int i; 2621 int rc; 2622 int newcount = 0; 2623 2624 count = (index < queue->next_buf_to_init)? 2625 card->qdio.in_buf_pool.buf_count - 2626 (queue->next_buf_to_init - index) : 2627 card->qdio.in_buf_pool.buf_count - 2628 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2629 /* only requeue at a certain threshold to avoid SIGAs */ 2630 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2631 for (i = queue->next_buf_to_init; 2632 i < queue->next_buf_to_init + count; ++i) { 2633 if (qeth_init_input_buffer(card, 2634 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2635 break; 2636 } else { 2637 newcount++; 2638 } 2639 } 2640 2641 if (newcount < count) { 2642 /* we are in memory shortage so we switch back to 2643 traditional skb allocation and drop packages */ 2644 atomic_set(&card->force_alloc_skb, 3); 2645 count = newcount; 2646 } else { 2647 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2648 } 2649 2650 /* 2651 * according to old code it should be avoided to requeue all 2652 * 128 buffers in order to benefit from PCI avoidance. 2653 * this function keeps at least one buffer (the buffer at 2654 * 'index') un-requeued -> this buffer is the first buffer that 2655 * will be requeued the next time 2656 */ 2657 if (card->options.performance_stats) { 2658 card->perf_stats.inbound_do_qdio_cnt++; 2659 card->perf_stats.inbound_do_qdio_start_time = 2660 qeth_get_micros(); 2661 } 2662 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2663 queue->next_buf_to_init, count); 2664 if (card->options.performance_stats) 2665 card->perf_stats.inbound_do_qdio_time += 2666 qeth_get_micros() - 2667 card->perf_stats.inbound_do_qdio_start_time; 2668 if (rc) { 2669 dev_warn(&card->gdev->dev, 2670 "QDIO reported an error, rc=%i\n", rc); 2671 QETH_CARD_TEXT(card, 2, "qinberr"); 2672 } 2673 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2674 QDIO_MAX_BUFFERS_PER_Q; 2675 } 2676 } 2677 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2678 2679 static int qeth_handle_send_error(struct qeth_card *card, 2680 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2681 { 2682 int sbalf15 = buffer->buffer->element[15].flags & 0xff; 2683 2684 QETH_CARD_TEXT(card, 6, "hdsnderr"); 2685 if (card->info.type == QETH_CARD_TYPE_IQD) { 2686 if (sbalf15 == 0) { 2687 qdio_err = 0; 2688 } else { 2689 qdio_err = 1; 2690 } 2691 } 2692 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 2693 2694 if (!qdio_err) 2695 return QETH_SEND_ERROR_NONE; 2696 2697 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2698 return QETH_SEND_ERROR_RETRY; 2699 2700 QETH_CARD_TEXT(card, 1, "lnkfail"); 2701 QETH_CARD_TEXT_(card, 1, "%04x %02x", 2702 (u16)qdio_err, (u8)sbalf15); 2703 return QETH_SEND_ERROR_LINK_FAILURE; 2704 } 2705 2706 /* 2707 * Switched to packing state if the number of used buffers on a queue 2708 * reaches a certain limit. 2709 */ 2710 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2711 { 2712 if (!queue->do_pack) { 2713 if (atomic_read(&queue->used_buffers) 2714 >= QETH_HIGH_WATERMARK_PACK){ 2715 /* switch non-PACKING -> PACKING */ 2716 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 2717 if (queue->card->options.performance_stats) 2718 queue->card->perf_stats.sc_dp_p++; 2719 queue->do_pack = 1; 2720 } 2721 } 2722 } 2723 2724 /* 2725 * Switches from packing to non-packing mode. If there is a packing 2726 * buffer on the queue this buffer will be prepared to be flushed. 2727 * In that case 1 is returned to inform the caller. If no buffer 2728 * has to be flushed, zero is returned. 2729 */ 2730 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2731 { 2732 struct qeth_qdio_out_buffer *buffer; 2733 int flush_count = 0; 2734 2735 if (queue->do_pack) { 2736 if (atomic_read(&queue->used_buffers) 2737 <= QETH_LOW_WATERMARK_PACK) { 2738 /* switch PACKING -> non-PACKING */ 2739 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 2740 if (queue->card->options.performance_stats) 2741 queue->card->perf_stats.sc_p_dp++; 2742 queue->do_pack = 0; 2743 /* flush packing buffers */ 2744 buffer = &queue->bufs[queue->next_buf_to_fill]; 2745 if ((atomic_read(&buffer->state) == 2746 QETH_QDIO_BUF_EMPTY) && 2747 (buffer->next_element_to_fill > 0)) { 2748 atomic_set(&buffer->state, 2749 QETH_QDIO_BUF_PRIMED); 2750 flush_count++; 2751 queue->next_buf_to_fill = 2752 (queue->next_buf_to_fill + 1) % 2753 QDIO_MAX_BUFFERS_PER_Q; 2754 } 2755 } 2756 } 2757 return flush_count; 2758 } 2759 2760 /* 2761 * Called to flush a packing buffer if no more pci flags are on the queue. 2762 * Checks if there is a packing buffer and prepares it to be flushed. 2763 * In that case returns 1, otherwise zero. 2764 */ 2765 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2766 { 2767 struct qeth_qdio_out_buffer *buffer; 2768 2769 buffer = &queue->bufs[queue->next_buf_to_fill]; 2770 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2771 (buffer->next_element_to_fill > 0)) { 2772 /* it's a packing buffer */ 2773 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2774 queue->next_buf_to_fill = 2775 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2776 return 1; 2777 } 2778 return 0; 2779 } 2780 2781 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2782 int count) 2783 { 2784 struct qeth_qdio_out_buffer *buf; 2785 int rc; 2786 int i; 2787 unsigned int qdio_flags; 2788 2789 for (i = index; i < index + count; ++i) { 2790 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2791 buf->buffer->element[buf->next_element_to_fill - 1].flags |= 2792 SBAL_FLAGS_LAST_ENTRY; 2793 2794 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2795 continue; 2796 2797 if (!queue->do_pack) { 2798 if ((atomic_read(&queue->used_buffers) >= 2799 (QETH_HIGH_WATERMARK_PACK - 2800 QETH_WATERMARK_PACK_FUZZ)) && 2801 !atomic_read(&queue->set_pci_flags_count)) { 2802 /* it's likely that we'll go to packing 2803 * mode soon */ 2804 atomic_inc(&queue->set_pci_flags_count); 2805 buf->buffer->element[0].flags |= 0x40; 2806 } 2807 } else { 2808 if (!atomic_read(&queue->set_pci_flags_count)) { 2809 /* 2810 * there's no outstanding PCI any more, so we 2811 * have to request a PCI to be sure the the PCI 2812 * will wake at some time in the future then we 2813 * can flush packed buffers that might still be 2814 * hanging around, which can happen if no 2815 * further send was requested by the stack 2816 */ 2817 atomic_inc(&queue->set_pci_flags_count); 2818 buf->buffer->element[0].flags |= 0x40; 2819 } 2820 } 2821 } 2822 2823 queue->card->dev->trans_start = jiffies; 2824 if (queue->card->options.performance_stats) { 2825 queue->card->perf_stats.outbound_do_qdio_cnt++; 2826 queue->card->perf_stats.outbound_do_qdio_start_time = 2827 qeth_get_micros(); 2828 } 2829 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2830 if (atomic_read(&queue->set_pci_flags_count)) 2831 qdio_flags |= QDIO_FLAG_PCI_OUT; 2832 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2833 queue->queue_no, index, count); 2834 if (queue->card->options.performance_stats) 2835 queue->card->perf_stats.outbound_do_qdio_time += 2836 qeth_get_micros() - 2837 queue->card->perf_stats.outbound_do_qdio_start_time; 2838 atomic_add(count, &queue->used_buffers); 2839 if (rc) { 2840 queue->card->stats.tx_errors += count; 2841 /* ignore temporary SIGA errors without busy condition */ 2842 if (rc == QDIO_ERROR_SIGA_TARGET) 2843 return; 2844 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 2845 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 2846 2847 /* this must not happen under normal circumstances. if it 2848 * happens something is really wrong -> recover */ 2849 qeth_schedule_recovery(queue->card); 2850 return; 2851 } 2852 if (queue->card->options.performance_stats) 2853 queue->card->perf_stats.bufs_sent += count; 2854 } 2855 2856 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2857 { 2858 int index; 2859 int flush_cnt = 0; 2860 int q_was_packing = 0; 2861 2862 /* 2863 * check if weed have to switch to non-packing mode or if 2864 * we have to get a pci flag out on the queue 2865 */ 2866 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2867 !atomic_read(&queue->set_pci_flags_count)) { 2868 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2869 QETH_OUT_Q_UNLOCKED) { 2870 /* 2871 * If we get in here, there was no action in 2872 * do_send_packet. So, we check if there is a 2873 * packing buffer to be flushed here. 2874 */ 2875 netif_stop_queue(queue->card->dev); 2876 index = queue->next_buf_to_fill; 2877 q_was_packing = queue->do_pack; 2878 /* queue->do_pack may change */ 2879 barrier(); 2880 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 2881 if (!flush_cnt && 2882 !atomic_read(&queue->set_pci_flags_count)) 2883 flush_cnt += 2884 qeth_flush_buffers_on_no_pci(queue); 2885 if (queue->card->options.performance_stats && 2886 q_was_packing) 2887 queue->card->perf_stats.bufs_sent_pack += 2888 flush_cnt; 2889 if (flush_cnt) 2890 qeth_flush_buffers(queue, index, flush_cnt); 2891 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 2892 } 2893 } 2894 } 2895 2896 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 2897 unsigned long card_ptr) 2898 { 2899 struct qeth_card *card = (struct qeth_card *)card_ptr; 2900 2901 if (card->dev && (card->dev->flags & IFF_UP)) 2902 napi_schedule(&card->napi); 2903 } 2904 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 2905 2906 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 2907 unsigned int queue, int first_element, int count, 2908 unsigned long card_ptr) 2909 { 2910 struct qeth_card *card = (struct qeth_card *)card_ptr; 2911 2912 if (qdio_err) 2913 qeth_schedule_recovery(card); 2914 } 2915 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 2916 2917 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 2918 unsigned int qdio_error, int __queue, int first_element, 2919 int count, unsigned long card_ptr) 2920 { 2921 struct qeth_card *card = (struct qeth_card *) card_ptr; 2922 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 2923 struct qeth_qdio_out_buffer *buffer; 2924 int i; 2925 2926 QETH_CARD_TEXT(card, 6, "qdouhdl"); 2927 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 2928 QETH_CARD_TEXT(card, 2, "achkcond"); 2929 netif_stop_queue(card->dev); 2930 qeth_schedule_recovery(card); 2931 return; 2932 } 2933 if (card->options.performance_stats) { 2934 card->perf_stats.outbound_handler_cnt++; 2935 card->perf_stats.outbound_handler_start_time = 2936 qeth_get_micros(); 2937 } 2938 for (i = first_element; i < (first_element + count); ++i) { 2939 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2940 qeth_handle_send_error(card, buffer, qdio_error); 2941 qeth_clear_output_buffer(queue, buffer); 2942 } 2943 atomic_sub(count, &queue->used_buffers); 2944 /* check if we need to do something on this outbound queue */ 2945 if (card->info.type != QETH_CARD_TYPE_IQD) 2946 qeth_check_outbound_queue(queue); 2947 2948 netif_wake_queue(queue->card->dev); 2949 if (card->options.performance_stats) 2950 card->perf_stats.outbound_handler_time += qeth_get_micros() - 2951 card->perf_stats.outbound_handler_start_time; 2952 } 2953 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 2954 2955 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 2956 int ipv, int cast_type) 2957 { 2958 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 2959 card->info.type == QETH_CARD_TYPE_OSX)) 2960 return card->qdio.default_out_queue; 2961 switch (card->qdio.no_out_queues) { 2962 case 4: 2963 if (cast_type && card->info.is_multicast_different) 2964 return card->info.is_multicast_different & 2965 (card->qdio.no_out_queues - 1); 2966 if (card->qdio.do_prio_queueing && (ipv == 4)) { 2967 const u8 tos = ip_hdr(skb)->tos; 2968 2969 if (card->qdio.do_prio_queueing == 2970 QETH_PRIO_Q_ING_TOS) { 2971 if (tos & IP_TOS_NOTIMPORTANT) 2972 return 3; 2973 if (tos & IP_TOS_HIGHRELIABILITY) 2974 return 2; 2975 if (tos & IP_TOS_HIGHTHROUGHPUT) 2976 return 1; 2977 if (tos & IP_TOS_LOWDELAY) 2978 return 0; 2979 } 2980 if (card->qdio.do_prio_queueing == 2981 QETH_PRIO_Q_ING_PREC) 2982 return 3 - (tos >> 6); 2983 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 2984 /* TODO: IPv6!!! */ 2985 } 2986 return card->qdio.default_out_queue; 2987 case 1: /* fallthrough for single-out-queue 1920-device */ 2988 default: 2989 return card->qdio.default_out_queue; 2990 } 2991 } 2992 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 2993 2994 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 2995 struct sk_buff *skb, int elems) 2996 { 2997 int dlen = skb->len - skb->data_len; 2998 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 2999 PFN_DOWN((unsigned long)skb->data); 3000 3001 elements_needed += skb_shinfo(skb)->nr_frags; 3002 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3003 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3004 "(Number=%d / Length=%d). Discarded.\n", 3005 (elements_needed+elems), skb->len); 3006 return 0; 3007 } 3008 return elements_needed; 3009 } 3010 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3011 3012 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3013 { 3014 int hroom, inpage, rest; 3015 3016 if (((unsigned long)skb->data & PAGE_MASK) != 3017 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3018 hroom = skb_headroom(skb); 3019 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3020 rest = len - inpage; 3021 if (rest > hroom) 3022 return 1; 3023 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3024 skb->data -= rest; 3025 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3026 } 3027 return 0; 3028 } 3029 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3030 3031 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3032 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3033 int offset) 3034 { 3035 int length = skb->len - skb->data_len; 3036 int length_here; 3037 int element; 3038 char *data; 3039 int first_lap, cnt; 3040 struct skb_frag_struct *frag; 3041 3042 element = *next_element_to_fill; 3043 data = skb->data; 3044 first_lap = (is_tso == 0 ? 1 : 0); 3045 3046 if (offset >= 0) { 3047 data = skb->data + offset; 3048 length -= offset; 3049 first_lap = 0; 3050 } 3051 3052 while (length > 0) { 3053 /* length_here is the remaining amount of data in this page */ 3054 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3055 if (length < length_here) 3056 length_here = length; 3057 3058 buffer->element[element].addr = data; 3059 buffer->element[element].length = length_here; 3060 length -= length_here; 3061 if (!length) { 3062 if (first_lap) 3063 if (skb_shinfo(skb)->nr_frags) 3064 buffer->element[element].flags = 3065 SBAL_FLAGS_FIRST_FRAG; 3066 else 3067 buffer->element[element].flags = 0; 3068 else 3069 buffer->element[element].flags = 3070 SBAL_FLAGS_MIDDLE_FRAG; 3071 } else { 3072 if (first_lap) 3073 buffer->element[element].flags = 3074 SBAL_FLAGS_FIRST_FRAG; 3075 else 3076 buffer->element[element].flags = 3077 SBAL_FLAGS_MIDDLE_FRAG; 3078 } 3079 data += length_here; 3080 element++; 3081 first_lap = 0; 3082 } 3083 3084 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3085 frag = &skb_shinfo(skb)->frags[cnt]; 3086 buffer->element[element].addr = (char *)page_to_phys(frag->page) 3087 + frag->page_offset; 3088 buffer->element[element].length = frag->size; 3089 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG; 3090 element++; 3091 } 3092 3093 if (buffer->element[element - 1].flags) 3094 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG; 3095 *next_element_to_fill = element; 3096 } 3097 3098 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3099 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3100 struct qeth_hdr *hdr, int offset, int hd_len) 3101 { 3102 struct qdio_buffer *buffer; 3103 int flush_cnt = 0, hdr_len, large_send = 0; 3104 3105 buffer = buf->buffer; 3106 atomic_inc(&skb->users); 3107 skb_queue_tail(&buf->skb_list, skb); 3108 3109 /*check first on TSO ....*/ 3110 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3111 int element = buf->next_element_to_fill; 3112 3113 hdr_len = sizeof(struct qeth_hdr_tso) + 3114 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3115 /*fill first buffer entry only with header information */ 3116 buffer->element[element].addr = skb->data; 3117 buffer->element[element].length = hdr_len; 3118 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3119 buf->next_element_to_fill++; 3120 skb->data += hdr_len; 3121 skb->len -= hdr_len; 3122 large_send = 1; 3123 } 3124 3125 if (offset >= 0) { 3126 int element = buf->next_element_to_fill; 3127 buffer->element[element].addr = hdr; 3128 buffer->element[element].length = sizeof(struct qeth_hdr) + 3129 hd_len; 3130 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3131 buf->is_header[element] = 1; 3132 buf->next_element_to_fill++; 3133 } 3134 3135 __qeth_fill_buffer(skb, buffer, large_send, 3136 (int *)&buf->next_element_to_fill, offset); 3137 3138 if (!queue->do_pack) { 3139 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3140 /* set state to PRIMED -> will be flushed */ 3141 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3142 flush_cnt = 1; 3143 } else { 3144 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3145 if (queue->card->options.performance_stats) 3146 queue->card->perf_stats.skbs_sent_pack++; 3147 if (buf->next_element_to_fill >= 3148 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3149 /* 3150 * packed buffer if full -> set state PRIMED 3151 * -> will be flushed 3152 */ 3153 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3154 flush_cnt = 1; 3155 } 3156 } 3157 return flush_cnt; 3158 } 3159 3160 int qeth_do_send_packet_fast(struct qeth_card *card, 3161 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3162 struct qeth_hdr *hdr, int elements_needed, 3163 int offset, int hd_len) 3164 { 3165 struct qeth_qdio_out_buffer *buffer; 3166 int index; 3167 3168 /* spin until we get the queue ... */ 3169 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3170 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3171 /* ... now we've got the queue */ 3172 index = queue->next_buf_to_fill; 3173 buffer = &queue->bufs[queue->next_buf_to_fill]; 3174 /* 3175 * check if buffer is empty to make sure that we do not 'overtake' 3176 * ourselves and try to fill a buffer that is already primed 3177 */ 3178 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3179 goto out; 3180 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3181 QDIO_MAX_BUFFERS_PER_Q; 3182 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3183 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3184 qeth_flush_buffers(queue, index, 1); 3185 return 0; 3186 out: 3187 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3188 return -EBUSY; 3189 } 3190 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3191 3192 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3193 struct sk_buff *skb, struct qeth_hdr *hdr, 3194 int elements_needed) 3195 { 3196 struct qeth_qdio_out_buffer *buffer; 3197 int start_index; 3198 int flush_count = 0; 3199 int do_pack = 0; 3200 int tmp; 3201 int rc = 0; 3202 3203 /* spin until we get the queue ... */ 3204 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3205 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3206 start_index = queue->next_buf_to_fill; 3207 buffer = &queue->bufs[queue->next_buf_to_fill]; 3208 /* 3209 * check if buffer is empty to make sure that we do not 'overtake' 3210 * ourselves and try to fill a buffer that is already primed 3211 */ 3212 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3213 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3214 return -EBUSY; 3215 } 3216 /* check if we need to switch packing state of this queue */ 3217 qeth_switch_to_packing_if_needed(queue); 3218 if (queue->do_pack) { 3219 do_pack = 1; 3220 /* does packet fit in current buffer? */ 3221 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3222 buffer->next_element_to_fill) < elements_needed) { 3223 /* ... no -> set state PRIMED */ 3224 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3225 flush_count++; 3226 queue->next_buf_to_fill = 3227 (queue->next_buf_to_fill + 1) % 3228 QDIO_MAX_BUFFERS_PER_Q; 3229 buffer = &queue->bufs[queue->next_buf_to_fill]; 3230 /* we did a step forward, so check buffer state 3231 * again */ 3232 if (atomic_read(&buffer->state) != 3233 QETH_QDIO_BUF_EMPTY) { 3234 qeth_flush_buffers(queue, start_index, 3235 flush_count); 3236 atomic_set(&queue->state, 3237 QETH_OUT_Q_UNLOCKED); 3238 return -EBUSY; 3239 } 3240 } 3241 } 3242 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3243 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3244 QDIO_MAX_BUFFERS_PER_Q; 3245 flush_count += tmp; 3246 if (flush_count) 3247 qeth_flush_buffers(queue, start_index, flush_count); 3248 else if (!atomic_read(&queue->set_pci_flags_count)) 3249 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3250 /* 3251 * queue->state will go from LOCKED -> UNLOCKED or from 3252 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3253 * (switch packing state or flush buffer to get another pci flag out). 3254 * In that case we will enter this loop 3255 */ 3256 while (atomic_dec_return(&queue->state)) { 3257 flush_count = 0; 3258 start_index = queue->next_buf_to_fill; 3259 /* check if we can go back to non-packing state */ 3260 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3261 /* 3262 * check if we need to flush a packing buffer to get a pci 3263 * flag out on the queue 3264 */ 3265 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3266 flush_count += qeth_flush_buffers_on_no_pci(queue); 3267 if (flush_count) 3268 qeth_flush_buffers(queue, start_index, flush_count); 3269 } 3270 /* at this point the queue is UNLOCKED again */ 3271 if (queue->card->options.performance_stats && do_pack) 3272 queue->card->perf_stats.bufs_sent_pack += flush_count; 3273 3274 return rc; 3275 } 3276 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3277 3278 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3279 struct qeth_reply *reply, unsigned long data) 3280 { 3281 struct qeth_ipa_cmd *cmd; 3282 struct qeth_ipacmd_setadpparms *setparms; 3283 3284 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3285 3286 cmd = (struct qeth_ipa_cmd *) data; 3287 setparms = &(cmd->data.setadapterparms); 3288 3289 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3290 if (cmd->hdr.return_code) { 3291 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3292 setparms->data.mode = SET_PROMISC_MODE_OFF; 3293 } 3294 card->info.promisc_mode = setparms->data.mode; 3295 return 0; 3296 } 3297 3298 void qeth_setadp_promisc_mode(struct qeth_card *card) 3299 { 3300 enum qeth_ipa_promisc_modes mode; 3301 struct net_device *dev = card->dev; 3302 struct qeth_cmd_buffer *iob; 3303 struct qeth_ipa_cmd *cmd; 3304 3305 QETH_CARD_TEXT(card, 4, "setprom"); 3306 3307 if (((dev->flags & IFF_PROMISC) && 3308 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3309 (!(dev->flags & IFF_PROMISC) && 3310 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3311 return; 3312 mode = SET_PROMISC_MODE_OFF; 3313 if (dev->flags & IFF_PROMISC) 3314 mode = SET_PROMISC_MODE_ON; 3315 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3316 3317 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3318 sizeof(struct qeth_ipacmd_setadpparms)); 3319 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3320 cmd->data.setadapterparms.data.mode = mode; 3321 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3322 } 3323 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3324 3325 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3326 { 3327 struct qeth_card *card; 3328 char dbf_text[15]; 3329 3330 card = dev->ml_priv; 3331 3332 QETH_CARD_TEXT(card, 4, "chgmtu"); 3333 sprintf(dbf_text, "%8x", new_mtu); 3334 QETH_CARD_TEXT(card, 4, dbf_text); 3335 3336 if (new_mtu < 64) 3337 return -EINVAL; 3338 if (new_mtu > 65535) 3339 return -EINVAL; 3340 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3341 (!qeth_mtu_is_valid(card, new_mtu))) 3342 return -EINVAL; 3343 dev->mtu = new_mtu; 3344 return 0; 3345 } 3346 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3347 3348 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3349 { 3350 struct qeth_card *card; 3351 3352 card = dev->ml_priv; 3353 3354 QETH_CARD_TEXT(card, 5, "getstat"); 3355 3356 return &card->stats; 3357 } 3358 EXPORT_SYMBOL_GPL(qeth_get_stats); 3359 3360 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3361 struct qeth_reply *reply, unsigned long data) 3362 { 3363 struct qeth_ipa_cmd *cmd; 3364 3365 QETH_CARD_TEXT(card, 4, "chgmaccb"); 3366 3367 cmd = (struct qeth_ipa_cmd *) data; 3368 if (!card->options.layer2 || 3369 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3370 memcpy(card->dev->dev_addr, 3371 &cmd->data.setadapterparms.data.change_addr.addr, 3372 OSA_ADDR_LEN); 3373 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3374 } 3375 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3376 return 0; 3377 } 3378 3379 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3380 { 3381 int rc; 3382 struct qeth_cmd_buffer *iob; 3383 struct qeth_ipa_cmd *cmd; 3384 3385 QETH_CARD_TEXT(card, 4, "chgmac"); 3386 3387 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3388 sizeof(struct qeth_ipacmd_setadpparms)); 3389 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3390 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3391 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3392 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3393 card->dev->dev_addr, OSA_ADDR_LEN); 3394 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3395 NULL); 3396 return rc; 3397 } 3398 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3399 3400 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 3401 struct qeth_reply *reply, unsigned long data) 3402 { 3403 struct qeth_ipa_cmd *cmd; 3404 struct qeth_set_access_ctrl *access_ctrl_req; 3405 3406 QETH_CARD_TEXT(card, 4, "setaccb"); 3407 3408 cmd = (struct qeth_ipa_cmd *) data; 3409 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3410 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 3411 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3412 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 3413 cmd->data.setadapterparms.hdr.return_code); 3414 switch (cmd->data.setadapterparms.hdr.return_code) { 3415 case SET_ACCESS_CTRL_RC_SUCCESS: 3416 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 3417 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 3418 { 3419 card->options.isolation = access_ctrl_req->subcmd_code; 3420 if (card->options.isolation == ISOLATION_MODE_NONE) { 3421 dev_info(&card->gdev->dev, 3422 "QDIO data connection isolation is deactivated\n"); 3423 } else { 3424 dev_info(&card->gdev->dev, 3425 "QDIO data connection isolation is activated\n"); 3426 } 3427 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 3428 card->gdev->dev.kobj.name, 3429 access_ctrl_req->subcmd_code, 3430 cmd->data.setadapterparms.hdr.return_code); 3431 break; 3432 } 3433 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 3434 { 3435 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 3436 card->gdev->dev.kobj.name, 3437 access_ctrl_req->subcmd_code, 3438 cmd->data.setadapterparms.hdr.return_code); 3439 dev_err(&card->gdev->dev, "Adapter does not " 3440 "support QDIO data connection isolation\n"); 3441 3442 /* ensure isolation mode is "none" */ 3443 card->options.isolation = ISOLATION_MODE_NONE; 3444 break; 3445 } 3446 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 3447 { 3448 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3449 card->gdev->dev.kobj.name, 3450 access_ctrl_req->subcmd_code, 3451 cmd->data.setadapterparms.hdr.return_code); 3452 dev_err(&card->gdev->dev, 3453 "Adapter is dedicated. " 3454 "QDIO data connection isolation not supported\n"); 3455 3456 /* ensure isolation mode is "none" */ 3457 card->options.isolation = ISOLATION_MODE_NONE; 3458 break; 3459 } 3460 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 3461 { 3462 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3463 card->gdev->dev.kobj.name, 3464 access_ctrl_req->subcmd_code, 3465 cmd->data.setadapterparms.hdr.return_code); 3466 dev_err(&card->gdev->dev, 3467 "TSO does not permit QDIO data connection isolation\n"); 3468 3469 /* ensure isolation mode is "none" */ 3470 card->options.isolation = ISOLATION_MODE_NONE; 3471 break; 3472 } 3473 default: 3474 { 3475 /* this should never happen */ 3476 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 3477 "==UNKNOWN\n", 3478 card->gdev->dev.kobj.name, 3479 access_ctrl_req->subcmd_code, 3480 cmd->data.setadapterparms.hdr.return_code); 3481 3482 /* ensure isolation mode is "none" */ 3483 card->options.isolation = ISOLATION_MODE_NONE; 3484 break; 3485 } 3486 } 3487 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3488 return 0; 3489 } 3490 3491 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 3492 enum qeth_ipa_isolation_modes isolation) 3493 { 3494 int rc; 3495 struct qeth_cmd_buffer *iob; 3496 struct qeth_ipa_cmd *cmd; 3497 struct qeth_set_access_ctrl *access_ctrl_req; 3498 3499 QETH_CARD_TEXT(card, 4, "setacctl"); 3500 3501 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 3502 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3503 3504 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 3505 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 3506 sizeof(struct qeth_set_access_ctrl)); 3507 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3508 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3509 access_ctrl_req->subcmd_code = isolation; 3510 3511 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 3512 NULL); 3513 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 3514 return rc; 3515 } 3516 3517 int qeth_set_access_ctrl_online(struct qeth_card *card) 3518 { 3519 int rc = 0; 3520 3521 QETH_CARD_TEXT(card, 4, "setactlo"); 3522 3523 if ((card->info.type == QETH_CARD_TYPE_OSD || 3524 card->info.type == QETH_CARD_TYPE_OSX) && 3525 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 3526 rc = qeth_setadpparms_set_access_ctrl(card, 3527 card->options.isolation); 3528 if (rc) { 3529 QETH_DBF_MESSAGE(3, 3530 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 3531 card->gdev->dev.kobj.name, 3532 rc); 3533 } 3534 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 3535 card->options.isolation = ISOLATION_MODE_NONE; 3536 3537 dev_err(&card->gdev->dev, "Adapter does not " 3538 "support QDIO data connection isolation\n"); 3539 rc = -EOPNOTSUPP; 3540 } 3541 return rc; 3542 } 3543 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 3544 3545 void qeth_tx_timeout(struct net_device *dev) 3546 { 3547 struct qeth_card *card; 3548 3549 card = dev->ml_priv; 3550 QETH_CARD_TEXT(card, 4, "txtimeo"); 3551 card->stats.tx_errors++; 3552 qeth_schedule_recovery(card); 3553 } 3554 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3555 3556 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3557 { 3558 struct qeth_card *card = dev->ml_priv; 3559 int rc = 0; 3560 3561 switch (regnum) { 3562 case MII_BMCR: /* Basic mode control register */ 3563 rc = BMCR_FULLDPLX; 3564 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3565 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3566 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3567 rc |= BMCR_SPEED100; 3568 break; 3569 case MII_BMSR: /* Basic mode status register */ 3570 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3571 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3572 BMSR_100BASE4; 3573 break; 3574 case MII_PHYSID1: /* PHYS ID 1 */ 3575 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3576 dev->dev_addr[2]; 3577 rc = (rc >> 5) & 0xFFFF; 3578 break; 3579 case MII_PHYSID2: /* PHYS ID 2 */ 3580 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3581 break; 3582 case MII_ADVERTISE: /* Advertisement control reg */ 3583 rc = ADVERTISE_ALL; 3584 break; 3585 case MII_LPA: /* Link partner ability reg */ 3586 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3587 LPA_100BASE4 | LPA_LPACK; 3588 break; 3589 case MII_EXPANSION: /* Expansion register */ 3590 break; 3591 case MII_DCOUNTER: /* disconnect counter */ 3592 break; 3593 case MII_FCSCOUNTER: /* false carrier counter */ 3594 break; 3595 case MII_NWAYTEST: /* N-way auto-neg test register */ 3596 break; 3597 case MII_RERRCOUNTER: /* rx error counter */ 3598 rc = card->stats.rx_errors; 3599 break; 3600 case MII_SREVISION: /* silicon revision */ 3601 break; 3602 case MII_RESV1: /* reserved 1 */ 3603 break; 3604 case MII_LBRERROR: /* loopback, rx, bypass error */ 3605 break; 3606 case MII_PHYADDR: /* physical address */ 3607 break; 3608 case MII_RESV2: /* reserved 2 */ 3609 break; 3610 case MII_TPISTATUS: /* TPI status for 10mbps */ 3611 break; 3612 case MII_NCONFIG: /* network interface config */ 3613 break; 3614 default: 3615 break; 3616 } 3617 return rc; 3618 } 3619 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3620 3621 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3622 struct qeth_cmd_buffer *iob, int len, 3623 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3624 unsigned long), 3625 void *reply_param) 3626 { 3627 u16 s1, s2; 3628 3629 QETH_CARD_TEXT(card, 4, "sendsnmp"); 3630 3631 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3632 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3633 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3634 /* adjust PDU length fields in IPA_PDU_HEADER */ 3635 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3636 s2 = (u32) len; 3637 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3638 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3639 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3640 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3641 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3642 reply_cb, reply_param); 3643 } 3644 3645 static int qeth_snmp_command_cb(struct qeth_card *card, 3646 struct qeth_reply *reply, unsigned long sdata) 3647 { 3648 struct qeth_ipa_cmd *cmd; 3649 struct qeth_arp_query_info *qinfo; 3650 struct qeth_snmp_cmd *snmp; 3651 unsigned char *data; 3652 __u16 data_len; 3653 3654 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 3655 3656 cmd = (struct qeth_ipa_cmd *) sdata; 3657 data = (unsigned char *)((char *)cmd - reply->offset); 3658 qinfo = (struct qeth_arp_query_info *) reply->param; 3659 snmp = &cmd->data.setadapterparms.data.snmp; 3660 3661 if (cmd->hdr.return_code) { 3662 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 3663 return 0; 3664 } 3665 if (cmd->data.setadapterparms.hdr.return_code) { 3666 cmd->hdr.return_code = 3667 cmd->data.setadapterparms.hdr.return_code; 3668 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 3669 return 0; 3670 } 3671 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3672 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3673 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3674 else 3675 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3676 3677 /* check if there is enough room in userspace */ 3678 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3679 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 3680 cmd->hdr.return_code = -ENOMEM; 3681 return 0; 3682 } 3683 QETH_CARD_TEXT_(card, 4, "snore%i", 3684 cmd->data.setadapterparms.hdr.used_total); 3685 QETH_CARD_TEXT_(card, 4, "sseqn%i", 3686 cmd->data.setadapterparms.hdr.seq_no); 3687 /*copy entries to user buffer*/ 3688 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3689 memcpy(qinfo->udata + qinfo->udata_offset, 3690 (char *)snmp, 3691 data_len + offsetof(struct qeth_snmp_cmd, data)); 3692 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3693 } else { 3694 memcpy(qinfo->udata + qinfo->udata_offset, 3695 (char *)&snmp->request, data_len); 3696 } 3697 qinfo->udata_offset += data_len; 3698 /* check if all replies received ... */ 3699 QETH_CARD_TEXT_(card, 4, "srtot%i", 3700 cmd->data.setadapterparms.hdr.used_total); 3701 QETH_CARD_TEXT_(card, 4, "srseq%i", 3702 cmd->data.setadapterparms.hdr.seq_no); 3703 if (cmd->data.setadapterparms.hdr.seq_no < 3704 cmd->data.setadapterparms.hdr.used_total) 3705 return 1; 3706 return 0; 3707 } 3708 3709 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3710 { 3711 struct qeth_cmd_buffer *iob; 3712 struct qeth_ipa_cmd *cmd; 3713 struct qeth_snmp_ureq *ureq; 3714 int req_len; 3715 struct qeth_arp_query_info qinfo = {0, }; 3716 int rc = 0; 3717 3718 QETH_CARD_TEXT(card, 3, "snmpcmd"); 3719 3720 if (card->info.guestlan) 3721 return -EOPNOTSUPP; 3722 3723 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3724 (!card->options.layer2)) { 3725 return -EOPNOTSUPP; 3726 } 3727 /* skip 4 bytes (data_len struct member) to get req_len */ 3728 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3729 return -EFAULT; 3730 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 3731 if (IS_ERR(ureq)) { 3732 QETH_CARD_TEXT(card, 2, "snmpnome"); 3733 return PTR_ERR(ureq); 3734 } 3735 qinfo.udata_len = ureq->hdr.data_len; 3736 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3737 if (!qinfo.udata) { 3738 kfree(ureq); 3739 return -ENOMEM; 3740 } 3741 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3742 3743 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3744 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3745 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3746 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3747 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3748 qeth_snmp_command_cb, (void *)&qinfo); 3749 if (rc) 3750 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3751 QETH_CARD_IFNAME(card), rc); 3752 else { 3753 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3754 rc = -EFAULT; 3755 } 3756 3757 kfree(ureq); 3758 kfree(qinfo.udata); 3759 return rc; 3760 } 3761 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3762 3763 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3764 { 3765 switch (card->info.type) { 3766 case QETH_CARD_TYPE_IQD: 3767 return 2; 3768 default: 3769 return 0; 3770 } 3771 } 3772 3773 static void qeth_determine_capabilities(struct qeth_card *card) 3774 { 3775 int rc; 3776 int length; 3777 char *prcd; 3778 struct ccw_device *ddev; 3779 int ddev_offline = 0; 3780 3781 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 3782 ddev = CARD_DDEV(card); 3783 if (!ddev->online) { 3784 ddev_offline = 1; 3785 rc = ccw_device_set_online(ddev); 3786 if (rc) { 3787 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3788 goto out; 3789 } 3790 } 3791 3792 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 3793 if (rc) { 3794 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 3795 dev_name(&card->gdev->dev), rc); 3796 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3797 goto out_offline; 3798 } 3799 qeth_configure_unitaddr(card, prcd); 3800 qeth_configure_blkt_default(card, prcd); 3801 kfree(prcd); 3802 3803 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 3804 if (rc) 3805 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 3806 3807 out_offline: 3808 if (ddev_offline == 1) 3809 ccw_device_set_offline(ddev); 3810 out: 3811 return; 3812 } 3813 3814 static int qeth_qdio_establish(struct qeth_card *card) 3815 { 3816 struct qdio_initialize init_data; 3817 char *qib_param_field; 3818 struct qdio_buffer **in_sbal_ptrs; 3819 struct qdio_buffer **out_sbal_ptrs; 3820 int i, j, k; 3821 int rc = 0; 3822 3823 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3824 3825 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3826 GFP_KERNEL); 3827 if (!qib_param_field) 3828 return -ENOMEM; 3829 3830 qeth_create_qib_param_field(card, qib_param_field); 3831 qeth_create_qib_param_field_blkt(card, qib_param_field); 3832 3833 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3834 GFP_KERNEL); 3835 if (!in_sbal_ptrs) { 3836 kfree(qib_param_field); 3837 return -ENOMEM; 3838 } 3839 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3840 in_sbal_ptrs[i] = (struct qdio_buffer *) 3841 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3842 3843 out_sbal_ptrs = 3844 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3845 sizeof(void *), GFP_KERNEL); 3846 if (!out_sbal_ptrs) { 3847 kfree(in_sbal_ptrs); 3848 kfree(qib_param_field); 3849 return -ENOMEM; 3850 } 3851 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3852 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3853 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3854 card->qdio.out_qs[i]->bufs[j].buffer); 3855 } 3856 3857 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3858 init_data.cdev = CARD_DDEV(card); 3859 init_data.q_format = qeth_get_qdio_q_format(card); 3860 init_data.qib_param_field_format = 0; 3861 init_data.qib_param_field = qib_param_field; 3862 init_data.no_input_qs = 1; 3863 init_data.no_output_qs = card->qdio.no_out_queues; 3864 init_data.input_handler = card->discipline.input_handler; 3865 init_data.output_handler = card->discipline.output_handler; 3866 init_data.queue_start_poll = card->discipline.start_poll; 3867 init_data.int_parm = (unsigned long) card; 3868 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3869 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3870 init_data.scan_threshold = 3871 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 3872 3873 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3874 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3875 rc = qdio_allocate(&init_data); 3876 if (rc) { 3877 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3878 goto out; 3879 } 3880 rc = qdio_establish(&init_data); 3881 if (rc) { 3882 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3883 qdio_free(CARD_DDEV(card)); 3884 } 3885 } 3886 out: 3887 kfree(out_sbal_ptrs); 3888 kfree(in_sbal_ptrs); 3889 kfree(qib_param_field); 3890 return rc; 3891 } 3892 3893 static void qeth_core_free_card(struct qeth_card *card) 3894 { 3895 3896 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 3897 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 3898 qeth_clean_channel(&card->read); 3899 qeth_clean_channel(&card->write); 3900 if (card->dev) 3901 free_netdev(card->dev); 3902 kfree(card->ip_tbd_list); 3903 qeth_free_qdio_buffers(card); 3904 unregister_service_level(&card->qeth_service_level); 3905 kfree(card); 3906 } 3907 3908 static struct ccw_device_id qeth_ids[] = { 3909 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 3910 .driver_info = QETH_CARD_TYPE_OSD}, 3911 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 3912 .driver_info = QETH_CARD_TYPE_IQD}, 3913 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 3914 .driver_info = QETH_CARD_TYPE_OSN}, 3915 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 3916 .driver_info = QETH_CARD_TYPE_OSM}, 3917 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 3918 .driver_info = QETH_CARD_TYPE_OSX}, 3919 {}, 3920 }; 3921 MODULE_DEVICE_TABLE(ccw, qeth_ids); 3922 3923 static struct ccw_driver qeth_ccw_driver = { 3924 .name = "qeth", 3925 .ids = qeth_ids, 3926 .probe = ccwgroup_probe_ccwdev, 3927 .remove = ccwgroup_remove_ccwdev, 3928 }; 3929 3930 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 3931 unsigned long driver_id) 3932 { 3933 return ccwgroup_create_from_string(root_dev, driver_id, 3934 &qeth_ccw_driver, 3, buf); 3935 } 3936 3937 int qeth_core_hardsetup_card(struct qeth_card *card) 3938 { 3939 int retries = 0; 3940 int rc; 3941 3942 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 3943 atomic_set(&card->force_alloc_skb, 0); 3944 qeth_get_channel_path_desc(card); 3945 retry: 3946 if (retries) 3947 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 3948 dev_name(&card->gdev->dev)); 3949 ccw_device_set_offline(CARD_DDEV(card)); 3950 ccw_device_set_offline(CARD_WDEV(card)); 3951 ccw_device_set_offline(CARD_RDEV(card)); 3952 rc = ccw_device_set_online(CARD_RDEV(card)); 3953 if (rc) 3954 goto retriable; 3955 rc = ccw_device_set_online(CARD_WDEV(card)); 3956 if (rc) 3957 goto retriable; 3958 rc = ccw_device_set_online(CARD_DDEV(card)); 3959 if (rc) 3960 goto retriable; 3961 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 3962 retriable: 3963 if (rc == -ERESTARTSYS) { 3964 QETH_DBF_TEXT(SETUP, 2, "break1"); 3965 return rc; 3966 } else if (rc) { 3967 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 3968 if (++retries > 3) 3969 goto out; 3970 else 3971 goto retry; 3972 } 3973 qeth_determine_capabilities(card); 3974 qeth_init_tokens(card); 3975 qeth_init_func_level(card); 3976 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 3977 if (rc == -ERESTARTSYS) { 3978 QETH_DBF_TEXT(SETUP, 2, "break2"); 3979 return rc; 3980 } else if (rc) { 3981 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3982 if (--retries < 0) 3983 goto out; 3984 else 3985 goto retry; 3986 } 3987 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 3988 if (rc == -ERESTARTSYS) { 3989 QETH_DBF_TEXT(SETUP, 2, "break3"); 3990 return rc; 3991 } else if (rc) { 3992 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 3993 if (--retries < 0) 3994 goto out; 3995 else 3996 goto retry; 3997 } 3998 card->read_or_write_problem = 0; 3999 rc = qeth_mpc_initialize(card); 4000 if (rc) { 4001 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4002 goto out; 4003 } 4004 return 0; 4005 out: 4006 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4007 "an error on the device\n"); 4008 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4009 dev_name(&card->gdev->dev), rc); 4010 return rc; 4011 } 4012 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4013 4014 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 4015 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4016 { 4017 struct page *page = virt_to_page(element->addr); 4018 if (*pskb == NULL) { 4019 /* the upper protocol layers assume that there is data in the 4020 * skb itself. Copy a small amount (64 bytes) to make them 4021 * happy. */ 4022 *pskb = dev_alloc_skb(64 + ETH_HLEN); 4023 if (!(*pskb)) 4024 return -ENOMEM; 4025 skb_reserve(*pskb, ETH_HLEN); 4026 if (data_len <= 64) { 4027 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4028 data_len); 4029 } else { 4030 get_page(page); 4031 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 4032 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 4033 data_len - 64); 4034 (*pskb)->data_len += data_len - 64; 4035 (*pskb)->len += data_len - 64; 4036 (*pskb)->truesize += data_len - 64; 4037 (*pfrag)++; 4038 } 4039 } else { 4040 get_page(page); 4041 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4042 (*pskb)->data_len += data_len; 4043 (*pskb)->len += data_len; 4044 (*pskb)->truesize += data_len; 4045 (*pfrag)++; 4046 } 4047 return 0; 4048 } 4049 4050 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4051 struct qdio_buffer *buffer, 4052 struct qdio_buffer_element **__element, int *__offset, 4053 struct qeth_hdr **hdr) 4054 { 4055 struct qdio_buffer_element *element = *__element; 4056 int offset = *__offset; 4057 struct sk_buff *skb = NULL; 4058 int skb_len = 0; 4059 void *data_ptr; 4060 int data_len; 4061 int headroom = 0; 4062 int use_rx_sg = 0; 4063 int frag = 0; 4064 4065 /* qeth_hdr must not cross element boundaries */ 4066 if (element->length < offset + sizeof(struct qeth_hdr)) { 4067 if (qeth_is_last_sbale(element)) 4068 return NULL; 4069 element++; 4070 offset = 0; 4071 if (element->length < sizeof(struct qeth_hdr)) 4072 return NULL; 4073 } 4074 *hdr = element->addr + offset; 4075 4076 offset += sizeof(struct qeth_hdr); 4077 switch ((*hdr)->hdr.l2.id) { 4078 case QETH_HEADER_TYPE_LAYER2: 4079 skb_len = (*hdr)->hdr.l2.pkt_length; 4080 break; 4081 case QETH_HEADER_TYPE_LAYER3: 4082 skb_len = (*hdr)->hdr.l3.length; 4083 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4084 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4085 headroom = TR_HLEN; 4086 else 4087 headroom = ETH_HLEN; 4088 break; 4089 case QETH_HEADER_TYPE_OSN: 4090 skb_len = (*hdr)->hdr.osn.pdu_length; 4091 headroom = sizeof(struct qeth_hdr); 4092 break; 4093 default: 4094 break; 4095 } 4096 4097 if (!skb_len) 4098 return NULL; 4099 4100 if ((skb_len >= card->options.rx_sg_cb) && 4101 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4102 (!atomic_read(&card->force_alloc_skb))) { 4103 use_rx_sg = 1; 4104 } else { 4105 skb = dev_alloc_skb(skb_len + headroom); 4106 if (!skb) 4107 goto no_mem; 4108 if (headroom) 4109 skb_reserve(skb, headroom); 4110 } 4111 4112 data_ptr = element->addr + offset; 4113 while (skb_len) { 4114 data_len = min(skb_len, (int)(element->length - offset)); 4115 if (data_len) { 4116 if (use_rx_sg) { 4117 if (qeth_create_skb_frag(element, &skb, offset, 4118 &frag, data_len)) 4119 goto no_mem; 4120 } else { 4121 memcpy(skb_put(skb, data_len), data_ptr, 4122 data_len); 4123 } 4124 } 4125 skb_len -= data_len; 4126 if (skb_len) { 4127 if (qeth_is_last_sbale(element)) { 4128 QETH_CARD_TEXT(card, 4, "unexeob"); 4129 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4130 dev_kfree_skb_any(skb); 4131 card->stats.rx_errors++; 4132 return NULL; 4133 } 4134 element++; 4135 offset = 0; 4136 data_ptr = element->addr; 4137 } else { 4138 offset += data_len; 4139 } 4140 } 4141 *__element = element; 4142 *__offset = offset; 4143 if (use_rx_sg && card->options.performance_stats) { 4144 card->perf_stats.sg_skbs_rx++; 4145 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4146 } 4147 return skb; 4148 no_mem: 4149 if (net_ratelimit()) { 4150 QETH_CARD_TEXT(card, 2, "noskbmem"); 4151 } 4152 card->stats.rx_dropped++; 4153 return NULL; 4154 } 4155 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4156 4157 static void qeth_unregister_dbf_views(void) 4158 { 4159 int x; 4160 for (x = 0; x < QETH_DBF_INFOS; x++) { 4161 debug_unregister(qeth_dbf[x].id); 4162 qeth_dbf[x].id = NULL; 4163 } 4164 } 4165 4166 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4167 { 4168 char dbf_txt_buf[32]; 4169 va_list args; 4170 4171 if (level > id->level) 4172 return; 4173 va_start(args, fmt); 4174 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4175 va_end(args); 4176 debug_text_event(id, level, dbf_txt_buf); 4177 } 4178 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4179 4180 static int qeth_register_dbf_views(void) 4181 { 4182 int ret; 4183 int x; 4184 4185 for (x = 0; x < QETH_DBF_INFOS; x++) { 4186 /* register the areas */ 4187 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4188 qeth_dbf[x].pages, 4189 qeth_dbf[x].areas, 4190 qeth_dbf[x].len); 4191 if (qeth_dbf[x].id == NULL) { 4192 qeth_unregister_dbf_views(); 4193 return -ENOMEM; 4194 } 4195 4196 /* register a view */ 4197 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4198 if (ret) { 4199 qeth_unregister_dbf_views(); 4200 return ret; 4201 } 4202 4203 /* set a passing level */ 4204 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4205 } 4206 4207 return 0; 4208 } 4209 4210 int qeth_core_load_discipline(struct qeth_card *card, 4211 enum qeth_discipline_id discipline) 4212 { 4213 int rc = 0; 4214 switch (discipline) { 4215 case QETH_DISCIPLINE_LAYER3: 4216 card->discipline.ccwgdriver = try_then_request_module( 4217 symbol_get(qeth_l3_ccwgroup_driver), 4218 "qeth_l3"); 4219 break; 4220 case QETH_DISCIPLINE_LAYER2: 4221 card->discipline.ccwgdriver = try_then_request_module( 4222 symbol_get(qeth_l2_ccwgroup_driver), 4223 "qeth_l2"); 4224 break; 4225 } 4226 if (!card->discipline.ccwgdriver) { 4227 dev_err(&card->gdev->dev, "There is no kernel module to " 4228 "support discipline %d\n", discipline); 4229 rc = -EINVAL; 4230 } 4231 return rc; 4232 } 4233 4234 void qeth_core_free_discipline(struct qeth_card *card) 4235 { 4236 if (card->options.layer2) 4237 symbol_put(qeth_l2_ccwgroup_driver); 4238 else 4239 symbol_put(qeth_l3_ccwgroup_driver); 4240 card->discipline.ccwgdriver = NULL; 4241 } 4242 4243 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4244 { 4245 struct qeth_card *card; 4246 struct device *dev; 4247 int rc; 4248 unsigned long flags; 4249 char dbf_name[20]; 4250 4251 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4252 4253 dev = &gdev->dev; 4254 if (!get_device(dev)) 4255 return -ENODEV; 4256 4257 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4258 4259 card = qeth_alloc_card(); 4260 if (!card) { 4261 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4262 rc = -ENOMEM; 4263 goto err_dev; 4264 } 4265 4266 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 4267 dev_name(&gdev->dev)); 4268 card->debug = debug_register(dbf_name, 2, 1, 8); 4269 if (!card->debug) { 4270 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 4271 rc = -ENOMEM; 4272 goto err_card; 4273 } 4274 debug_register_view(card->debug, &debug_hex_ascii_view); 4275 4276 card->read.ccwdev = gdev->cdev[0]; 4277 card->write.ccwdev = gdev->cdev[1]; 4278 card->data.ccwdev = gdev->cdev[2]; 4279 dev_set_drvdata(&gdev->dev, card); 4280 card->gdev = gdev; 4281 gdev->cdev[0]->handler = qeth_irq; 4282 gdev->cdev[1]->handler = qeth_irq; 4283 gdev->cdev[2]->handler = qeth_irq; 4284 4285 rc = qeth_determine_card_type(card); 4286 if (rc) { 4287 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4288 goto err_dbf; 4289 } 4290 rc = qeth_setup_card(card); 4291 if (rc) { 4292 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4293 goto err_dbf; 4294 } 4295 4296 if (card->info.type == QETH_CARD_TYPE_OSN) 4297 rc = qeth_core_create_osn_attributes(dev); 4298 else 4299 rc = qeth_core_create_device_attributes(dev); 4300 if (rc) 4301 goto err_dbf; 4302 switch (card->info.type) { 4303 case QETH_CARD_TYPE_OSN: 4304 case QETH_CARD_TYPE_OSM: 4305 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4306 if (rc) 4307 goto err_attr; 4308 rc = card->discipline.ccwgdriver->probe(card->gdev); 4309 if (rc) 4310 goto err_disc; 4311 case QETH_CARD_TYPE_OSD: 4312 case QETH_CARD_TYPE_OSX: 4313 default: 4314 break; 4315 } 4316 4317 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4318 list_add_tail(&card->list, &qeth_core_card_list.list); 4319 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4320 4321 qeth_determine_capabilities(card); 4322 return 0; 4323 4324 err_disc: 4325 qeth_core_free_discipline(card); 4326 err_attr: 4327 if (card->info.type == QETH_CARD_TYPE_OSN) 4328 qeth_core_remove_osn_attributes(dev); 4329 else 4330 qeth_core_remove_device_attributes(dev); 4331 err_dbf: 4332 debug_unregister(card->debug); 4333 err_card: 4334 qeth_core_free_card(card); 4335 err_dev: 4336 put_device(dev); 4337 return rc; 4338 } 4339 4340 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4341 { 4342 unsigned long flags; 4343 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4344 4345 QETH_DBF_TEXT(SETUP, 2, "removedv"); 4346 4347 if (card->info.type == QETH_CARD_TYPE_OSN) { 4348 qeth_core_remove_osn_attributes(&gdev->dev); 4349 } else { 4350 qeth_core_remove_device_attributes(&gdev->dev); 4351 } 4352 4353 if (card->discipline.ccwgdriver) { 4354 card->discipline.ccwgdriver->remove(gdev); 4355 qeth_core_free_discipline(card); 4356 } 4357 4358 debug_unregister(card->debug); 4359 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4360 list_del(&card->list); 4361 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4362 qeth_core_free_card(card); 4363 dev_set_drvdata(&gdev->dev, NULL); 4364 put_device(&gdev->dev); 4365 return; 4366 } 4367 4368 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4369 { 4370 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4371 int rc = 0; 4372 int def_discipline; 4373 4374 if (!card->discipline.ccwgdriver) { 4375 if (card->info.type == QETH_CARD_TYPE_IQD) 4376 def_discipline = QETH_DISCIPLINE_LAYER3; 4377 else 4378 def_discipline = QETH_DISCIPLINE_LAYER2; 4379 rc = qeth_core_load_discipline(card, def_discipline); 4380 if (rc) 4381 goto err; 4382 rc = card->discipline.ccwgdriver->probe(card->gdev); 4383 if (rc) 4384 goto err; 4385 } 4386 rc = card->discipline.ccwgdriver->set_online(gdev); 4387 err: 4388 return rc; 4389 } 4390 4391 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4392 { 4393 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4394 return card->discipline.ccwgdriver->set_offline(gdev); 4395 } 4396 4397 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4398 { 4399 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4400 if (card->discipline.ccwgdriver && 4401 card->discipline.ccwgdriver->shutdown) 4402 card->discipline.ccwgdriver->shutdown(gdev); 4403 } 4404 4405 static int qeth_core_prepare(struct ccwgroup_device *gdev) 4406 { 4407 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4408 if (card->discipline.ccwgdriver && 4409 card->discipline.ccwgdriver->prepare) 4410 return card->discipline.ccwgdriver->prepare(gdev); 4411 return 0; 4412 } 4413 4414 static void qeth_core_complete(struct ccwgroup_device *gdev) 4415 { 4416 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4417 if (card->discipline.ccwgdriver && 4418 card->discipline.ccwgdriver->complete) 4419 card->discipline.ccwgdriver->complete(gdev); 4420 } 4421 4422 static int qeth_core_freeze(struct ccwgroup_device *gdev) 4423 { 4424 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4425 if (card->discipline.ccwgdriver && 4426 card->discipline.ccwgdriver->freeze) 4427 return card->discipline.ccwgdriver->freeze(gdev); 4428 return 0; 4429 } 4430 4431 static int qeth_core_thaw(struct ccwgroup_device *gdev) 4432 { 4433 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4434 if (card->discipline.ccwgdriver && 4435 card->discipline.ccwgdriver->thaw) 4436 return card->discipline.ccwgdriver->thaw(gdev); 4437 return 0; 4438 } 4439 4440 static int qeth_core_restore(struct ccwgroup_device *gdev) 4441 { 4442 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4443 if (card->discipline.ccwgdriver && 4444 card->discipline.ccwgdriver->restore) 4445 return card->discipline.ccwgdriver->restore(gdev); 4446 return 0; 4447 } 4448 4449 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4450 .owner = THIS_MODULE, 4451 .name = "qeth", 4452 .driver_id = 0xD8C5E3C8, 4453 .probe = qeth_core_probe_device, 4454 .remove = qeth_core_remove_device, 4455 .set_online = qeth_core_set_online, 4456 .set_offline = qeth_core_set_offline, 4457 .shutdown = qeth_core_shutdown, 4458 .prepare = qeth_core_prepare, 4459 .complete = qeth_core_complete, 4460 .freeze = qeth_core_freeze, 4461 .thaw = qeth_core_thaw, 4462 .restore = qeth_core_restore, 4463 }; 4464 4465 static ssize_t 4466 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4467 size_t count) 4468 { 4469 int err; 4470 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4471 qeth_core_ccwgroup_driver.driver_id); 4472 if (err) 4473 return err; 4474 else 4475 return count; 4476 } 4477 4478 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4479 4480 static struct { 4481 const char str[ETH_GSTRING_LEN]; 4482 } qeth_ethtool_stats_keys[] = { 4483 /* 0 */{"rx skbs"}, 4484 {"rx buffers"}, 4485 {"tx skbs"}, 4486 {"tx buffers"}, 4487 {"tx skbs no packing"}, 4488 {"tx buffers no packing"}, 4489 {"tx skbs packing"}, 4490 {"tx buffers packing"}, 4491 {"tx sg skbs"}, 4492 {"tx sg frags"}, 4493 /* 10 */{"rx sg skbs"}, 4494 {"rx sg frags"}, 4495 {"rx sg page allocs"}, 4496 {"tx large kbytes"}, 4497 {"tx large count"}, 4498 {"tx pk state ch n->p"}, 4499 {"tx pk state ch p->n"}, 4500 {"tx pk watermark low"}, 4501 {"tx pk watermark high"}, 4502 {"queue 0 buffer usage"}, 4503 /* 20 */{"queue 1 buffer usage"}, 4504 {"queue 2 buffer usage"}, 4505 {"queue 3 buffer usage"}, 4506 {"rx poll time"}, 4507 {"rx poll count"}, 4508 {"rx do_QDIO time"}, 4509 {"rx do_QDIO count"}, 4510 {"tx handler time"}, 4511 {"tx handler count"}, 4512 {"tx time"}, 4513 /* 30 */{"tx count"}, 4514 {"tx do_QDIO time"}, 4515 {"tx do_QDIO count"}, 4516 {"tx csum"}, 4517 {"tx lin"}, 4518 }; 4519 4520 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 4521 { 4522 switch (stringset) { 4523 case ETH_SS_STATS: 4524 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4525 default: 4526 return -EINVAL; 4527 } 4528 } 4529 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 4530 4531 void qeth_core_get_ethtool_stats(struct net_device *dev, 4532 struct ethtool_stats *stats, u64 *data) 4533 { 4534 struct qeth_card *card = dev->ml_priv; 4535 data[0] = card->stats.rx_packets - 4536 card->perf_stats.initial_rx_packets; 4537 data[1] = card->perf_stats.bufs_rec; 4538 data[2] = card->stats.tx_packets - 4539 card->perf_stats.initial_tx_packets; 4540 data[3] = card->perf_stats.bufs_sent; 4541 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4542 - card->perf_stats.skbs_sent_pack; 4543 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4544 data[6] = card->perf_stats.skbs_sent_pack; 4545 data[7] = card->perf_stats.bufs_sent_pack; 4546 data[8] = card->perf_stats.sg_skbs_sent; 4547 data[9] = card->perf_stats.sg_frags_sent; 4548 data[10] = card->perf_stats.sg_skbs_rx; 4549 data[11] = card->perf_stats.sg_frags_rx; 4550 data[12] = card->perf_stats.sg_alloc_page_rx; 4551 data[13] = (card->perf_stats.large_send_bytes >> 10); 4552 data[14] = card->perf_stats.large_send_cnt; 4553 data[15] = card->perf_stats.sc_dp_p; 4554 data[16] = card->perf_stats.sc_p_dp; 4555 data[17] = QETH_LOW_WATERMARK_PACK; 4556 data[18] = QETH_HIGH_WATERMARK_PACK; 4557 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4558 data[20] = (card->qdio.no_out_queues > 1) ? 4559 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4560 data[21] = (card->qdio.no_out_queues > 2) ? 4561 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4562 data[22] = (card->qdio.no_out_queues > 3) ? 4563 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4564 data[23] = card->perf_stats.inbound_time; 4565 data[24] = card->perf_stats.inbound_cnt; 4566 data[25] = card->perf_stats.inbound_do_qdio_time; 4567 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4568 data[27] = card->perf_stats.outbound_handler_time; 4569 data[28] = card->perf_stats.outbound_handler_cnt; 4570 data[29] = card->perf_stats.outbound_time; 4571 data[30] = card->perf_stats.outbound_cnt; 4572 data[31] = card->perf_stats.outbound_do_qdio_time; 4573 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4574 data[33] = card->perf_stats.tx_csum; 4575 data[34] = card->perf_stats.tx_lin; 4576 } 4577 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4578 4579 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4580 { 4581 switch (stringset) { 4582 case ETH_SS_STATS: 4583 memcpy(data, &qeth_ethtool_stats_keys, 4584 sizeof(qeth_ethtool_stats_keys)); 4585 break; 4586 default: 4587 WARN_ON(1); 4588 break; 4589 } 4590 } 4591 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4592 4593 void qeth_core_get_drvinfo(struct net_device *dev, 4594 struct ethtool_drvinfo *info) 4595 { 4596 struct qeth_card *card = dev->ml_priv; 4597 if (card->options.layer2) 4598 strcpy(info->driver, "qeth_l2"); 4599 else 4600 strcpy(info->driver, "qeth_l3"); 4601 4602 strcpy(info->version, "1.0"); 4603 strcpy(info->fw_version, card->info.mcl_level); 4604 sprintf(info->bus_info, "%s/%s/%s", 4605 CARD_RDEV_ID(card), 4606 CARD_WDEV_ID(card), 4607 CARD_DDEV_ID(card)); 4608 } 4609 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4610 4611 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4612 struct ethtool_cmd *ecmd) 4613 { 4614 struct qeth_card *card = netdev->ml_priv; 4615 enum qeth_link_types link_type; 4616 4617 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4618 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4619 else 4620 link_type = card->info.link_type; 4621 4622 ecmd->transceiver = XCVR_INTERNAL; 4623 ecmd->supported = SUPPORTED_Autoneg; 4624 ecmd->advertising = ADVERTISED_Autoneg; 4625 ecmd->duplex = DUPLEX_FULL; 4626 ecmd->autoneg = AUTONEG_ENABLE; 4627 4628 switch (link_type) { 4629 case QETH_LINK_TYPE_FAST_ETH: 4630 case QETH_LINK_TYPE_LANE_ETH100: 4631 ecmd->supported |= SUPPORTED_10baseT_Half | 4632 SUPPORTED_10baseT_Full | 4633 SUPPORTED_100baseT_Half | 4634 SUPPORTED_100baseT_Full | 4635 SUPPORTED_TP; 4636 ecmd->advertising |= ADVERTISED_10baseT_Half | 4637 ADVERTISED_10baseT_Full | 4638 ADVERTISED_100baseT_Half | 4639 ADVERTISED_100baseT_Full | 4640 ADVERTISED_TP; 4641 ecmd->speed = SPEED_100; 4642 ecmd->port = PORT_TP; 4643 break; 4644 4645 case QETH_LINK_TYPE_GBIT_ETH: 4646 case QETH_LINK_TYPE_LANE_ETH1000: 4647 ecmd->supported |= SUPPORTED_10baseT_Half | 4648 SUPPORTED_10baseT_Full | 4649 SUPPORTED_100baseT_Half | 4650 SUPPORTED_100baseT_Full | 4651 SUPPORTED_1000baseT_Half | 4652 SUPPORTED_1000baseT_Full | 4653 SUPPORTED_FIBRE; 4654 ecmd->advertising |= ADVERTISED_10baseT_Half | 4655 ADVERTISED_10baseT_Full | 4656 ADVERTISED_100baseT_Half | 4657 ADVERTISED_100baseT_Full | 4658 ADVERTISED_1000baseT_Half | 4659 ADVERTISED_1000baseT_Full | 4660 ADVERTISED_FIBRE; 4661 ecmd->speed = SPEED_1000; 4662 ecmd->port = PORT_FIBRE; 4663 break; 4664 4665 case QETH_LINK_TYPE_10GBIT_ETH: 4666 ecmd->supported |= SUPPORTED_10baseT_Half | 4667 SUPPORTED_10baseT_Full | 4668 SUPPORTED_100baseT_Half | 4669 SUPPORTED_100baseT_Full | 4670 SUPPORTED_1000baseT_Half | 4671 SUPPORTED_1000baseT_Full | 4672 SUPPORTED_10000baseT_Full | 4673 SUPPORTED_FIBRE; 4674 ecmd->advertising |= ADVERTISED_10baseT_Half | 4675 ADVERTISED_10baseT_Full | 4676 ADVERTISED_100baseT_Half | 4677 ADVERTISED_100baseT_Full | 4678 ADVERTISED_1000baseT_Half | 4679 ADVERTISED_1000baseT_Full | 4680 ADVERTISED_10000baseT_Full | 4681 ADVERTISED_FIBRE; 4682 ecmd->speed = SPEED_10000; 4683 ecmd->port = PORT_FIBRE; 4684 break; 4685 4686 default: 4687 ecmd->supported |= SUPPORTED_10baseT_Half | 4688 SUPPORTED_10baseT_Full | 4689 SUPPORTED_TP; 4690 ecmd->advertising |= ADVERTISED_10baseT_Half | 4691 ADVERTISED_10baseT_Full | 4692 ADVERTISED_TP; 4693 ecmd->speed = SPEED_10; 4694 ecmd->port = PORT_TP; 4695 } 4696 4697 return 0; 4698 } 4699 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4700 4701 static int __init qeth_core_init(void) 4702 { 4703 int rc; 4704 4705 pr_info("loading core functions\n"); 4706 INIT_LIST_HEAD(&qeth_core_card_list.list); 4707 rwlock_init(&qeth_core_card_list.rwlock); 4708 4709 rc = qeth_register_dbf_views(); 4710 if (rc) 4711 goto out_err; 4712 rc = ccw_driver_register(&qeth_ccw_driver); 4713 if (rc) 4714 goto ccw_err; 4715 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4716 if (rc) 4717 goto ccwgroup_err; 4718 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4719 &driver_attr_group); 4720 if (rc) 4721 goto driver_err; 4722 qeth_core_root_dev = root_device_register("qeth"); 4723 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4724 if (rc) 4725 goto register_err; 4726 4727 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 4728 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 4729 if (!qeth_core_header_cache) { 4730 rc = -ENOMEM; 4731 goto slab_err; 4732 } 4733 4734 return 0; 4735 slab_err: 4736 root_device_unregister(qeth_core_root_dev); 4737 register_err: 4738 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4739 &driver_attr_group); 4740 driver_err: 4741 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4742 ccwgroup_err: 4743 ccw_driver_unregister(&qeth_ccw_driver); 4744 ccw_err: 4745 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 4746 qeth_unregister_dbf_views(); 4747 out_err: 4748 pr_err("Initializing the qeth device driver failed\n"); 4749 return rc; 4750 } 4751 4752 static void __exit qeth_core_exit(void) 4753 { 4754 root_device_unregister(qeth_core_root_dev); 4755 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4756 &driver_attr_group); 4757 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4758 ccw_driver_unregister(&qeth_ccw_driver); 4759 kmem_cache_destroy(qeth_core_header_cache); 4760 qeth_unregister_dbf_views(); 4761 pr_info("core functions removed\n"); 4762 } 4763 4764 module_init(qeth_core_init); 4765 module_exit(qeth_core_exit); 4766 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4767 MODULE_DESCRIPTION("qeth core functions"); 4768 MODULE_LICENSE("GPL"); 4769