1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 #include <net/dsfield.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/chpid.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 #include <asm/compat.h> 30 31 #include "qeth_core.h" 32 33 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 35 /* N P A M L V H */ 36 [QETH_DBF_SETUP] = {"qeth_setup", 37 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 39 &debug_sprintf_view, NULL}, 40 [QETH_DBF_CTRL] = {"qeth_control", 41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 42 }; 43 EXPORT_SYMBOL_GPL(qeth_dbf); 44 45 struct qeth_card_list_struct qeth_core_card_list; 46 EXPORT_SYMBOL_GPL(qeth_core_card_list); 47 struct kmem_cache *qeth_core_header_cache; 48 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 49 static struct kmem_cache *qeth_qdio_outbuf_cache; 50 51 static struct device *qeth_core_root_dev; 52 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 53 static struct lock_class_key qdio_out_skb_queue_key; 54 static struct mutex qeth_mod_mutex; 55 56 static void qeth_send_control_data_cb(struct qeth_channel *, 57 struct qeth_cmd_buffer *); 58 static int qeth_issue_next_read(struct qeth_card *); 59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 61 static void qeth_free_buffer_pool(struct qeth_card *); 62 static int qeth_qdio_establish(struct qeth_card *); 63 static void qeth_free_qdio_buffers(struct qeth_card *); 64 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 65 struct qeth_qdio_out_buffer *buf, 66 enum iucv_tx_notify notification); 67 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 68 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 69 struct qeth_qdio_out_buffer *buf, 70 enum qeth_qdio_buffer_states newbufstate); 71 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 72 73 struct workqueue_struct *qeth_wq; 74 EXPORT_SYMBOL_GPL(qeth_wq); 75 76 static void qeth_close_dev_handler(struct work_struct *work) 77 { 78 struct qeth_card *card; 79 80 card = container_of(work, struct qeth_card, close_dev_work); 81 QETH_CARD_TEXT(card, 2, "cldevhdl"); 82 rtnl_lock(); 83 dev_close(card->dev); 84 rtnl_unlock(); 85 ccwgroup_set_offline(card->gdev); 86 } 87 88 void qeth_close_dev(struct qeth_card *card) 89 { 90 QETH_CARD_TEXT(card, 2, "cldevsubm"); 91 queue_work(qeth_wq, &card->close_dev_work); 92 } 93 EXPORT_SYMBOL_GPL(qeth_close_dev); 94 95 static inline const char *qeth_get_cardname(struct qeth_card *card) 96 { 97 if (card->info.guestlan) { 98 switch (card->info.type) { 99 case QETH_CARD_TYPE_OSD: 100 return " Virtual NIC QDIO"; 101 case QETH_CARD_TYPE_IQD: 102 return " Virtual NIC Hiper"; 103 case QETH_CARD_TYPE_OSM: 104 return " Virtual NIC QDIO - OSM"; 105 case QETH_CARD_TYPE_OSX: 106 return " Virtual NIC QDIO - OSX"; 107 default: 108 return " unknown"; 109 } 110 } else { 111 switch (card->info.type) { 112 case QETH_CARD_TYPE_OSD: 113 return " OSD Express"; 114 case QETH_CARD_TYPE_IQD: 115 return " HiperSockets"; 116 case QETH_CARD_TYPE_OSN: 117 return " OSN QDIO"; 118 case QETH_CARD_TYPE_OSM: 119 return " OSM QDIO"; 120 case QETH_CARD_TYPE_OSX: 121 return " OSX QDIO"; 122 default: 123 return " unknown"; 124 } 125 } 126 return " n/a"; 127 } 128 129 /* max length to be returned: 14 */ 130 const char *qeth_get_cardname_short(struct qeth_card *card) 131 { 132 if (card->info.guestlan) { 133 switch (card->info.type) { 134 case QETH_CARD_TYPE_OSD: 135 return "Virt.NIC QDIO"; 136 case QETH_CARD_TYPE_IQD: 137 return "Virt.NIC Hiper"; 138 case QETH_CARD_TYPE_OSM: 139 return "Virt.NIC OSM"; 140 case QETH_CARD_TYPE_OSX: 141 return "Virt.NIC OSX"; 142 default: 143 return "unknown"; 144 } 145 } else { 146 switch (card->info.type) { 147 case QETH_CARD_TYPE_OSD: 148 switch (card->info.link_type) { 149 case QETH_LINK_TYPE_FAST_ETH: 150 return "OSD_100"; 151 case QETH_LINK_TYPE_HSTR: 152 return "HSTR"; 153 case QETH_LINK_TYPE_GBIT_ETH: 154 return "OSD_1000"; 155 case QETH_LINK_TYPE_10GBIT_ETH: 156 return "OSD_10GIG"; 157 case QETH_LINK_TYPE_LANE_ETH100: 158 return "OSD_FE_LANE"; 159 case QETH_LINK_TYPE_LANE_TR: 160 return "OSD_TR_LANE"; 161 case QETH_LINK_TYPE_LANE_ETH1000: 162 return "OSD_GbE_LANE"; 163 case QETH_LINK_TYPE_LANE: 164 return "OSD_ATM_LANE"; 165 default: 166 return "OSD_Express"; 167 } 168 case QETH_CARD_TYPE_IQD: 169 return "HiperSockets"; 170 case QETH_CARD_TYPE_OSN: 171 return "OSN"; 172 case QETH_CARD_TYPE_OSM: 173 return "OSM_1000"; 174 case QETH_CARD_TYPE_OSX: 175 return "OSX_10GIG"; 176 default: 177 return "unknown"; 178 } 179 } 180 return "n/a"; 181 } 182 183 void qeth_set_recovery_task(struct qeth_card *card) 184 { 185 card->recovery_task = current; 186 } 187 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 188 189 void qeth_clear_recovery_task(struct qeth_card *card) 190 { 191 card->recovery_task = NULL; 192 } 193 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 194 195 static bool qeth_is_recovery_task(const struct qeth_card *card) 196 { 197 return card->recovery_task == current; 198 } 199 200 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 201 int clear_start_mask) 202 { 203 unsigned long flags; 204 205 spin_lock_irqsave(&card->thread_mask_lock, flags); 206 card->thread_allowed_mask = threads; 207 if (clear_start_mask) 208 card->thread_start_mask &= threads; 209 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 210 wake_up(&card->wait_q); 211 } 212 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 213 214 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 215 { 216 unsigned long flags; 217 int rc = 0; 218 219 spin_lock_irqsave(&card->thread_mask_lock, flags); 220 rc = (card->thread_running_mask & threads); 221 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 222 return rc; 223 } 224 EXPORT_SYMBOL_GPL(qeth_threads_running); 225 226 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 227 { 228 if (qeth_is_recovery_task(card)) 229 return 0; 230 return wait_event_interruptible(card->wait_q, 231 qeth_threads_running(card, threads) == 0); 232 } 233 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 234 235 void qeth_clear_working_pool_list(struct qeth_card *card) 236 { 237 struct qeth_buffer_pool_entry *pool_entry, *tmp; 238 239 QETH_CARD_TEXT(card, 5, "clwrklst"); 240 list_for_each_entry_safe(pool_entry, tmp, 241 &card->qdio.in_buf_pool.entry_list, list){ 242 list_del(&pool_entry->list); 243 } 244 } 245 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 246 247 static int qeth_alloc_buffer_pool(struct qeth_card *card) 248 { 249 struct qeth_buffer_pool_entry *pool_entry; 250 void *ptr; 251 int i, j; 252 253 QETH_CARD_TEXT(card, 5, "alocpool"); 254 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 255 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 256 if (!pool_entry) { 257 qeth_free_buffer_pool(card); 258 return -ENOMEM; 259 } 260 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 261 ptr = (void *) __get_free_page(GFP_KERNEL); 262 if (!ptr) { 263 while (j > 0) 264 free_page((unsigned long) 265 pool_entry->elements[--j]); 266 kfree(pool_entry); 267 qeth_free_buffer_pool(card); 268 return -ENOMEM; 269 } 270 pool_entry->elements[j] = ptr; 271 } 272 list_add(&pool_entry->init_list, 273 &card->qdio.init_pool.entry_list); 274 } 275 return 0; 276 } 277 278 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 279 { 280 QETH_CARD_TEXT(card, 2, "realcbp"); 281 282 if ((card->state != CARD_STATE_DOWN) && 283 (card->state != CARD_STATE_RECOVER)) 284 return -EPERM; 285 286 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 287 qeth_clear_working_pool_list(card); 288 qeth_free_buffer_pool(card); 289 card->qdio.in_buf_pool.buf_count = bufcnt; 290 card->qdio.init_pool.buf_count = bufcnt; 291 return qeth_alloc_buffer_pool(card); 292 } 293 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 294 295 static inline int qeth_cq_init(struct qeth_card *card) 296 { 297 int rc; 298 299 if (card->options.cq == QETH_CQ_ENABLED) { 300 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 301 memset(card->qdio.c_q->qdio_bufs, 0, 302 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 303 card->qdio.c_q->next_buf_to_init = 127; 304 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 305 card->qdio.no_in_queues - 1, 0, 306 127); 307 if (rc) { 308 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 309 goto out; 310 } 311 } 312 rc = 0; 313 out: 314 return rc; 315 } 316 317 static inline int qeth_alloc_cq(struct qeth_card *card) 318 { 319 int rc; 320 321 if (card->options.cq == QETH_CQ_ENABLED) { 322 int i; 323 struct qdio_outbuf_state *outbuf_states; 324 325 QETH_DBF_TEXT(SETUP, 2, "cqon"); 326 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 327 GFP_KERNEL); 328 if (!card->qdio.c_q) { 329 rc = -1; 330 goto kmsg_out; 331 } 332 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 333 334 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 335 card->qdio.c_q->bufs[i].buffer = 336 &card->qdio.c_q->qdio_bufs[i]; 337 } 338 339 card->qdio.no_in_queues = 2; 340 341 card->qdio.out_bufstates = 342 kzalloc(card->qdio.no_out_queues * 343 QDIO_MAX_BUFFERS_PER_Q * 344 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 345 outbuf_states = card->qdio.out_bufstates; 346 if (outbuf_states == NULL) { 347 rc = -1; 348 goto free_cq_out; 349 } 350 for (i = 0; i < card->qdio.no_out_queues; ++i) { 351 card->qdio.out_qs[i]->bufstates = outbuf_states; 352 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 353 } 354 } else { 355 QETH_DBF_TEXT(SETUP, 2, "nocq"); 356 card->qdio.c_q = NULL; 357 card->qdio.no_in_queues = 1; 358 } 359 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 360 rc = 0; 361 out: 362 return rc; 363 free_cq_out: 364 kfree(card->qdio.c_q); 365 card->qdio.c_q = NULL; 366 kmsg_out: 367 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 368 goto out; 369 } 370 371 static inline void qeth_free_cq(struct qeth_card *card) 372 { 373 if (card->qdio.c_q) { 374 --card->qdio.no_in_queues; 375 kfree(card->qdio.c_q); 376 card->qdio.c_q = NULL; 377 } 378 kfree(card->qdio.out_bufstates); 379 card->qdio.out_bufstates = NULL; 380 } 381 382 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 383 int delayed) { 384 enum iucv_tx_notify n; 385 386 switch (sbalf15) { 387 case 0: 388 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 389 break; 390 case 4: 391 case 16: 392 case 17: 393 case 18: 394 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 395 TX_NOTIFY_UNREACHABLE; 396 break; 397 default: 398 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 399 TX_NOTIFY_GENERALERROR; 400 break; 401 } 402 403 return n; 404 } 405 406 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 407 int bidx, int forced_cleanup) 408 { 409 if (q->card->options.cq != QETH_CQ_ENABLED) 410 return; 411 412 if (q->bufs[bidx]->next_pending != NULL) { 413 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 414 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 415 416 while (c) { 417 if (forced_cleanup || 418 atomic_read(&c->state) == 419 QETH_QDIO_BUF_HANDLED_DELAYED) { 420 struct qeth_qdio_out_buffer *f = c; 421 QETH_CARD_TEXT(f->q->card, 5, "fp"); 422 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 423 /* release here to avoid interleaving between 424 outbound tasklet and inbound tasklet 425 regarding notifications and lifecycle */ 426 qeth_release_skbs(c); 427 428 c = f->next_pending; 429 WARN_ON_ONCE(head->next_pending != f); 430 head->next_pending = c; 431 kmem_cache_free(qeth_qdio_outbuf_cache, f); 432 } else { 433 head = c; 434 c = c->next_pending; 435 } 436 437 } 438 } 439 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 440 QETH_QDIO_BUF_HANDLED_DELAYED)) { 441 /* for recovery situations */ 442 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 443 qeth_init_qdio_out_buf(q, bidx); 444 QETH_CARD_TEXT(q->card, 2, "clprecov"); 445 } 446 } 447 448 449 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 450 unsigned long phys_aob_addr) { 451 struct qaob *aob; 452 struct qeth_qdio_out_buffer *buffer; 453 enum iucv_tx_notify notification; 454 455 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 456 QETH_CARD_TEXT(card, 5, "haob"); 457 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 458 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 459 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 460 461 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 462 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 463 notification = TX_NOTIFY_OK; 464 } else { 465 WARN_ON_ONCE(atomic_read(&buffer->state) != 466 QETH_QDIO_BUF_PENDING); 467 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 468 notification = TX_NOTIFY_DELAYED_OK; 469 } 470 471 if (aob->aorc != 0) { 472 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 473 notification = qeth_compute_cq_notification(aob->aorc, 1); 474 } 475 qeth_notify_skbs(buffer->q, buffer, notification); 476 477 buffer->aob = NULL; 478 qeth_clear_output_buffer(buffer->q, buffer, 479 QETH_QDIO_BUF_HANDLED_DELAYED); 480 481 /* from here on: do not touch buffer anymore */ 482 qdio_release_aob(aob); 483 } 484 485 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 486 { 487 return card->options.cq == QETH_CQ_ENABLED && 488 card->qdio.c_q != NULL && 489 queue != 0 && 490 queue == card->qdio.no_in_queues - 1; 491 } 492 493 494 static int qeth_issue_next_read(struct qeth_card *card) 495 { 496 int rc; 497 struct qeth_cmd_buffer *iob; 498 499 QETH_CARD_TEXT(card, 5, "issnxrd"); 500 if (card->read.state != CH_STATE_UP) 501 return -EIO; 502 iob = qeth_get_buffer(&card->read); 503 if (!iob) { 504 dev_warn(&card->gdev->dev, "The qeth device driver " 505 "failed to recover an error on the device\n"); 506 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 507 "available\n", dev_name(&card->gdev->dev)); 508 return -ENOMEM; 509 } 510 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 511 QETH_CARD_TEXT(card, 6, "noirqpnd"); 512 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 513 (addr_t) iob, 0, 0); 514 if (rc) { 515 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 516 "rc=%i\n", dev_name(&card->gdev->dev), rc); 517 atomic_set(&card->read.irq_pending, 0); 518 card->read_or_write_problem = 1; 519 qeth_schedule_recovery(card); 520 wake_up(&card->wait_q); 521 } 522 return rc; 523 } 524 525 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 526 { 527 struct qeth_reply *reply; 528 529 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 530 if (reply) { 531 atomic_set(&reply->refcnt, 1); 532 atomic_set(&reply->received, 0); 533 reply->card = card; 534 } 535 return reply; 536 } 537 538 static void qeth_get_reply(struct qeth_reply *reply) 539 { 540 WARN_ON(atomic_read(&reply->refcnt) <= 0); 541 atomic_inc(&reply->refcnt); 542 } 543 544 static void qeth_put_reply(struct qeth_reply *reply) 545 { 546 WARN_ON(atomic_read(&reply->refcnt) <= 0); 547 if (atomic_dec_and_test(&reply->refcnt)) 548 kfree(reply); 549 } 550 551 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 552 struct qeth_card *card) 553 { 554 char *ipa_name; 555 int com = cmd->hdr.command; 556 ipa_name = qeth_get_ipa_cmd_name(com); 557 if (rc) 558 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 559 "x%X \"%s\"\n", 560 ipa_name, com, dev_name(&card->gdev->dev), 561 QETH_CARD_IFNAME(card), rc, 562 qeth_get_ipa_msg(rc)); 563 else 564 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 565 ipa_name, com, dev_name(&card->gdev->dev), 566 QETH_CARD_IFNAME(card)); 567 } 568 569 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 570 struct qeth_cmd_buffer *iob) 571 { 572 struct qeth_ipa_cmd *cmd = NULL; 573 574 QETH_CARD_TEXT(card, 5, "chkipad"); 575 if (IS_IPA(iob->data)) { 576 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 577 if (IS_IPA_REPLY(cmd)) { 578 if (cmd->hdr.command != IPA_CMD_SETCCID && 579 cmd->hdr.command != IPA_CMD_DELCCID && 580 cmd->hdr.command != IPA_CMD_MODCCID && 581 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 582 qeth_issue_ipa_msg(cmd, 583 cmd->hdr.return_code, card); 584 return cmd; 585 } else { 586 switch (cmd->hdr.command) { 587 case IPA_CMD_STOPLAN: 588 if (cmd->hdr.return_code == 589 IPA_RC_VEPA_TO_VEB_TRANSITION) { 590 dev_err(&card->gdev->dev, 591 "Interface %s is down because the " 592 "adjacent port is no longer in " 593 "reflective relay mode\n", 594 QETH_CARD_IFNAME(card)); 595 qeth_close_dev(card); 596 } else { 597 dev_warn(&card->gdev->dev, 598 "The link for interface %s on CHPID" 599 " 0x%X failed\n", 600 QETH_CARD_IFNAME(card), 601 card->info.chpid); 602 qeth_issue_ipa_msg(cmd, 603 cmd->hdr.return_code, card); 604 } 605 card->lan_online = 0; 606 if (card->dev && netif_carrier_ok(card->dev)) 607 netif_carrier_off(card->dev); 608 return NULL; 609 case IPA_CMD_STARTLAN: 610 dev_info(&card->gdev->dev, 611 "The link for %s on CHPID 0x%X has" 612 " been restored\n", 613 QETH_CARD_IFNAME(card), 614 card->info.chpid); 615 netif_carrier_on(card->dev); 616 card->lan_online = 1; 617 if (card->info.hwtrap) 618 card->info.hwtrap = 2; 619 qeth_schedule_recovery(card); 620 return NULL; 621 case IPA_CMD_SETBRIDGEPORT: 622 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 623 if (card->discipline->control_event_handler 624 (card, cmd)) 625 return cmd; 626 else 627 return NULL; 628 case IPA_CMD_MODCCID: 629 return cmd; 630 case IPA_CMD_REGISTER_LOCAL_ADDR: 631 QETH_CARD_TEXT(card, 3, "irla"); 632 break; 633 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 634 QETH_CARD_TEXT(card, 3, "urla"); 635 break; 636 default: 637 QETH_DBF_MESSAGE(2, "Received data is IPA " 638 "but not a reply!\n"); 639 break; 640 } 641 } 642 } 643 return cmd; 644 } 645 646 void qeth_clear_ipacmd_list(struct qeth_card *card) 647 { 648 struct qeth_reply *reply, *r; 649 unsigned long flags; 650 651 QETH_CARD_TEXT(card, 4, "clipalst"); 652 653 spin_lock_irqsave(&card->lock, flags); 654 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 655 qeth_get_reply(reply); 656 reply->rc = -EIO; 657 atomic_inc(&reply->received); 658 list_del_init(&reply->list); 659 wake_up(&reply->wait_q); 660 qeth_put_reply(reply); 661 } 662 spin_unlock_irqrestore(&card->lock, flags); 663 atomic_set(&card->write.irq_pending, 0); 664 } 665 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 666 667 static int qeth_check_idx_response(struct qeth_card *card, 668 unsigned char *buffer) 669 { 670 if (!buffer) 671 return 0; 672 673 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 674 if ((buffer[2] & 0xc0) == 0xc0) { 675 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 676 "with cause code 0x%02x%s\n", 677 buffer[4], 678 ((buffer[4] == 0x22) ? 679 " -- try another portname" : "")); 680 QETH_CARD_TEXT(card, 2, "ckidxres"); 681 QETH_CARD_TEXT(card, 2, " idxterm"); 682 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 683 if (buffer[4] == 0xf6) { 684 dev_err(&card->gdev->dev, 685 "The qeth device is not configured " 686 "for the OSI layer required by z/VM\n"); 687 return -EPERM; 688 } 689 return -EIO; 690 } 691 return 0; 692 } 693 694 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 695 __u32 len) 696 { 697 struct qeth_card *card; 698 699 card = CARD_FROM_CDEV(channel->ccwdev); 700 QETH_CARD_TEXT(card, 4, "setupccw"); 701 if (channel == &card->read) 702 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 703 else 704 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 705 channel->ccw.count = len; 706 channel->ccw.cda = (__u32) __pa(iob); 707 } 708 709 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 710 { 711 __u8 index; 712 713 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 714 index = channel->io_buf_no; 715 do { 716 if (channel->iob[index].state == BUF_STATE_FREE) { 717 channel->iob[index].state = BUF_STATE_LOCKED; 718 channel->io_buf_no = (channel->io_buf_no + 1) % 719 QETH_CMD_BUFFER_NO; 720 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 721 return channel->iob + index; 722 } 723 index = (index + 1) % QETH_CMD_BUFFER_NO; 724 } while (index != channel->io_buf_no); 725 726 return NULL; 727 } 728 729 void qeth_release_buffer(struct qeth_channel *channel, 730 struct qeth_cmd_buffer *iob) 731 { 732 unsigned long flags; 733 734 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 735 spin_lock_irqsave(&channel->iob_lock, flags); 736 memset(iob->data, 0, QETH_BUFSIZE); 737 iob->state = BUF_STATE_FREE; 738 iob->callback = qeth_send_control_data_cb; 739 iob->rc = 0; 740 spin_unlock_irqrestore(&channel->iob_lock, flags); 741 wake_up(&channel->wait_q); 742 } 743 EXPORT_SYMBOL_GPL(qeth_release_buffer); 744 745 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 746 { 747 struct qeth_cmd_buffer *buffer = NULL; 748 unsigned long flags; 749 750 spin_lock_irqsave(&channel->iob_lock, flags); 751 buffer = __qeth_get_buffer(channel); 752 spin_unlock_irqrestore(&channel->iob_lock, flags); 753 return buffer; 754 } 755 756 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 757 { 758 struct qeth_cmd_buffer *buffer; 759 wait_event(channel->wait_q, 760 ((buffer = qeth_get_buffer(channel)) != NULL)); 761 return buffer; 762 } 763 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 764 765 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 766 { 767 int cnt; 768 769 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 770 qeth_release_buffer(channel, &channel->iob[cnt]); 771 channel->buf_no = 0; 772 channel->io_buf_no = 0; 773 } 774 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 775 776 static void qeth_send_control_data_cb(struct qeth_channel *channel, 777 struct qeth_cmd_buffer *iob) 778 { 779 struct qeth_card *card; 780 struct qeth_reply *reply, *r; 781 struct qeth_ipa_cmd *cmd; 782 unsigned long flags; 783 int keep_reply; 784 int rc = 0; 785 786 card = CARD_FROM_CDEV(channel->ccwdev); 787 QETH_CARD_TEXT(card, 4, "sndctlcb"); 788 rc = qeth_check_idx_response(card, iob->data); 789 switch (rc) { 790 case 0: 791 break; 792 case -EIO: 793 qeth_clear_ipacmd_list(card); 794 qeth_schedule_recovery(card); 795 /* fall through */ 796 default: 797 goto out; 798 } 799 800 cmd = qeth_check_ipa_data(card, iob); 801 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 802 goto out; 803 /*in case of OSN : check if cmd is set */ 804 if (card->info.type == QETH_CARD_TYPE_OSN && 805 cmd && 806 cmd->hdr.command != IPA_CMD_STARTLAN && 807 card->osn_info.assist_cb != NULL) { 808 card->osn_info.assist_cb(card->dev, cmd); 809 goto out; 810 } 811 812 spin_lock_irqsave(&card->lock, flags); 813 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 814 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 815 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 816 qeth_get_reply(reply); 817 list_del_init(&reply->list); 818 spin_unlock_irqrestore(&card->lock, flags); 819 keep_reply = 0; 820 if (reply->callback != NULL) { 821 if (cmd) { 822 reply->offset = (__u16)((char *)cmd - 823 (char *)iob->data); 824 keep_reply = reply->callback(card, 825 reply, 826 (unsigned long)cmd); 827 } else 828 keep_reply = reply->callback(card, 829 reply, 830 (unsigned long)iob); 831 } 832 if (cmd) 833 reply->rc = (u16) cmd->hdr.return_code; 834 else if (iob->rc) 835 reply->rc = iob->rc; 836 if (keep_reply) { 837 spin_lock_irqsave(&card->lock, flags); 838 list_add_tail(&reply->list, 839 &card->cmd_waiter_list); 840 spin_unlock_irqrestore(&card->lock, flags); 841 } else { 842 atomic_inc(&reply->received); 843 wake_up(&reply->wait_q); 844 } 845 qeth_put_reply(reply); 846 goto out; 847 } 848 } 849 spin_unlock_irqrestore(&card->lock, flags); 850 out: 851 memcpy(&card->seqno.pdu_hdr_ack, 852 QETH_PDU_HEADER_SEQ_NO(iob->data), 853 QETH_SEQ_NO_LENGTH); 854 qeth_release_buffer(channel, iob); 855 } 856 857 static int qeth_setup_channel(struct qeth_channel *channel) 858 { 859 int cnt; 860 861 QETH_DBF_TEXT(SETUP, 2, "setupch"); 862 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 863 channel->iob[cnt].data = 864 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 865 if (channel->iob[cnt].data == NULL) 866 break; 867 channel->iob[cnt].state = BUF_STATE_FREE; 868 channel->iob[cnt].channel = channel; 869 channel->iob[cnt].callback = qeth_send_control_data_cb; 870 channel->iob[cnt].rc = 0; 871 } 872 if (cnt < QETH_CMD_BUFFER_NO) { 873 while (cnt-- > 0) 874 kfree(channel->iob[cnt].data); 875 return -ENOMEM; 876 } 877 channel->buf_no = 0; 878 channel->io_buf_no = 0; 879 atomic_set(&channel->irq_pending, 0); 880 spin_lock_init(&channel->iob_lock); 881 882 init_waitqueue_head(&channel->wait_q); 883 return 0; 884 } 885 886 static int qeth_set_thread_start_bit(struct qeth_card *card, 887 unsigned long thread) 888 { 889 unsigned long flags; 890 891 spin_lock_irqsave(&card->thread_mask_lock, flags); 892 if (!(card->thread_allowed_mask & thread) || 893 (card->thread_start_mask & thread)) { 894 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 895 return -EPERM; 896 } 897 card->thread_start_mask |= thread; 898 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 899 return 0; 900 } 901 902 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 903 { 904 unsigned long flags; 905 906 spin_lock_irqsave(&card->thread_mask_lock, flags); 907 card->thread_start_mask &= ~thread; 908 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 909 wake_up(&card->wait_q); 910 } 911 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 912 913 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 914 { 915 unsigned long flags; 916 917 spin_lock_irqsave(&card->thread_mask_lock, flags); 918 card->thread_running_mask &= ~thread; 919 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 920 wake_up(&card->wait_q); 921 } 922 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 923 924 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 925 { 926 unsigned long flags; 927 int rc = 0; 928 929 spin_lock_irqsave(&card->thread_mask_lock, flags); 930 if (card->thread_start_mask & thread) { 931 if ((card->thread_allowed_mask & thread) && 932 !(card->thread_running_mask & thread)) { 933 rc = 1; 934 card->thread_start_mask &= ~thread; 935 card->thread_running_mask |= thread; 936 } else 937 rc = -EPERM; 938 } 939 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 940 return rc; 941 } 942 943 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 944 { 945 int rc = 0; 946 947 wait_event(card->wait_q, 948 (rc = __qeth_do_run_thread(card, thread)) >= 0); 949 return rc; 950 } 951 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 952 953 void qeth_schedule_recovery(struct qeth_card *card) 954 { 955 QETH_CARD_TEXT(card, 2, "startrec"); 956 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 957 schedule_work(&card->kernel_thread_starter); 958 } 959 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 960 961 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 962 { 963 int dstat, cstat; 964 char *sense; 965 struct qeth_card *card; 966 967 sense = (char *) irb->ecw; 968 cstat = irb->scsw.cmd.cstat; 969 dstat = irb->scsw.cmd.dstat; 970 card = CARD_FROM_CDEV(cdev); 971 972 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 973 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 974 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 975 QETH_CARD_TEXT(card, 2, "CGENCHK"); 976 dev_warn(&cdev->dev, "The qeth device driver " 977 "failed to recover an error on the device\n"); 978 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 979 dev_name(&cdev->dev), dstat, cstat); 980 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 981 16, 1, irb, 64, 1); 982 return 1; 983 } 984 985 if (dstat & DEV_STAT_UNIT_CHECK) { 986 if (sense[SENSE_RESETTING_EVENT_BYTE] & 987 SENSE_RESETTING_EVENT_FLAG) { 988 QETH_CARD_TEXT(card, 2, "REVIND"); 989 return 1; 990 } 991 if (sense[SENSE_COMMAND_REJECT_BYTE] & 992 SENSE_COMMAND_REJECT_FLAG) { 993 QETH_CARD_TEXT(card, 2, "CMDREJi"); 994 return 1; 995 } 996 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 997 QETH_CARD_TEXT(card, 2, "AFFE"); 998 return 1; 999 } 1000 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1001 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1002 return 0; 1003 } 1004 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1005 return 1; 1006 } 1007 return 0; 1008 } 1009 1010 static long __qeth_check_irb_error(struct ccw_device *cdev, 1011 unsigned long intparm, struct irb *irb) 1012 { 1013 struct qeth_card *card; 1014 1015 card = CARD_FROM_CDEV(cdev); 1016 1017 if (!card || !IS_ERR(irb)) 1018 return 0; 1019 1020 switch (PTR_ERR(irb)) { 1021 case -EIO: 1022 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1023 dev_name(&cdev->dev)); 1024 QETH_CARD_TEXT(card, 2, "ckirberr"); 1025 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1026 break; 1027 case -ETIMEDOUT: 1028 dev_warn(&cdev->dev, "A hardware operation timed out" 1029 " on the device\n"); 1030 QETH_CARD_TEXT(card, 2, "ckirberr"); 1031 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1032 if (intparm == QETH_RCD_PARM) { 1033 if (card->data.ccwdev == cdev) { 1034 card->data.state = CH_STATE_DOWN; 1035 wake_up(&card->wait_q); 1036 } 1037 } 1038 break; 1039 default: 1040 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1041 dev_name(&cdev->dev), PTR_ERR(irb)); 1042 QETH_CARD_TEXT(card, 2, "ckirberr"); 1043 QETH_CARD_TEXT(card, 2, " rc???"); 1044 } 1045 return PTR_ERR(irb); 1046 } 1047 1048 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1049 struct irb *irb) 1050 { 1051 int rc; 1052 int cstat, dstat; 1053 struct qeth_cmd_buffer *buffer; 1054 struct qeth_channel *channel; 1055 struct qeth_card *card; 1056 struct qeth_cmd_buffer *iob; 1057 __u8 index; 1058 1059 if (__qeth_check_irb_error(cdev, intparm, irb)) 1060 return; 1061 cstat = irb->scsw.cmd.cstat; 1062 dstat = irb->scsw.cmd.dstat; 1063 1064 card = CARD_FROM_CDEV(cdev); 1065 if (!card) 1066 return; 1067 1068 QETH_CARD_TEXT(card, 5, "irq"); 1069 1070 if (card->read.ccwdev == cdev) { 1071 channel = &card->read; 1072 QETH_CARD_TEXT(card, 5, "read"); 1073 } else if (card->write.ccwdev == cdev) { 1074 channel = &card->write; 1075 QETH_CARD_TEXT(card, 5, "write"); 1076 } else { 1077 channel = &card->data; 1078 QETH_CARD_TEXT(card, 5, "data"); 1079 } 1080 atomic_set(&channel->irq_pending, 0); 1081 1082 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1083 channel->state = CH_STATE_STOPPED; 1084 1085 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1086 channel->state = CH_STATE_HALTED; 1087 1088 /*let's wake up immediately on data channel*/ 1089 if ((channel == &card->data) && (intparm != 0) && 1090 (intparm != QETH_RCD_PARM)) 1091 goto out; 1092 1093 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1094 QETH_CARD_TEXT(card, 6, "clrchpar"); 1095 /* we don't have to handle this further */ 1096 intparm = 0; 1097 } 1098 if (intparm == QETH_HALT_CHANNEL_PARM) { 1099 QETH_CARD_TEXT(card, 6, "hltchpar"); 1100 /* we don't have to handle this further */ 1101 intparm = 0; 1102 } 1103 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1104 (dstat & DEV_STAT_UNIT_CHECK) || 1105 (cstat)) { 1106 if (irb->esw.esw0.erw.cons) { 1107 dev_warn(&channel->ccwdev->dev, 1108 "The qeth device driver failed to recover " 1109 "an error on the device\n"); 1110 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1111 "0x%X dstat 0x%X\n", 1112 dev_name(&channel->ccwdev->dev), cstat, dstat); 1113 print_hex_dump(KERN_WARNING, "qeth: irb ", 1114 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1115 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1116 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1117 } 1118 if (intparm == QETH_RCD_PARM) { 1119 channel->state = CH_STATE_DOWN; 1120 goto out; 1121 } 1122 rc = qeth_get_problem(cdev, irb); 1123 if (rc) { 1124 qeth_clear_ipacmd_list(card); 1125 qeth_schedule_recovery(card); 1126 goto out; 1127 } 1128 } 1129 1130 if (intparm == QETH_RCD_PARM) { 1131 channel->state = CH_STATE_RCD_DONE; 1132 goto out; 1133 } 1134 if (intparm) { 1135 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1136 buffer->state = BUF_STATE_PROCESSED; 1137 } 1138 if (channel == &card->data) 1139 return; 1140 if (channel == &card->read && 1141 channel->state == CH_STATE_UP) 1142 qeth_issue_next_read(card); 1143 1144 iob = channel->iob; 1145 index = channel->buf_no; 1146 while (iob[index].state == BUF_STATE_PROCESSED) { 1147 if (iob[index].callback != NULL) 1148 iob[index].callback(channel, iob + index); 1149 1150 index = (index + 1) % QETH_CMD_BUFFER_NO; 1151 } 1152 channel->buf_no = index; 1153 out: 1154 wake_up(&card->wait_q); 1155 return; 1156 } 1157 1158 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1159 struct qeth_qdio_out_buffer *buf, 1160 enum iucv_tx_notify notification) 1161 { 1162 struct sk_buff *skb; 1163 1164 if (skb_queue_empty(&buf->skb_list)) 1165 goto out; 1166 skb = skb_peek(&buf->skb_list); 1167 while (skb) { 1168 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1169 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1170 if (skb->protocol == ETH_P_AF_IUCV) { 1171 if (skb->sk) { 1172 struct iucv_sock *iucv = iucv_sk(skb->sk); 1173 iucv->sk_txnotify(skb, notification); 1174 } 1175 } 1176 if (skb_queue_is_last(&buf->skb_list, skb)) 1177 skb = NULL; 1178 else 1179 skb = skb_queue_next(&buf->skb_list, skb); 1180 } 1181 out: 1182 return; 1183 } 1184 1185 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1186 { 1187 struct sk_buff *skb; 1188 struct iucv_sock *iucv; 1189 int notify_general_error = 0; 1190 1191 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1192 notify_general_error = 1; 1193 1194 /* release may never happen from within CQ tasklet scope */ 1195 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1196 1197 skb = skb_dequeue(&buf->skb_list); 1198 while (skb) { 1199 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1200 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1201 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1202 if (skb->sk) { 1203 iucv = iucv_sk(skb->sk); 1204 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1205 } 1206 } 1207 atomic_dec(&skb->users); 1208 dev_kfree_skb_any(skb); 1209 skb = skb_dequeue(&buf->skb_list); 1210 } 1211 } 1212 1213 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1214 struct qeth_qdio_out_buffer *buf, 1215 enum qeth_qdio_buffer_states newbufstate) 1216 { 1217 int i; 1218 1219 /* is PCI flag set on buffer? */ 1220 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1221 atomic_dec(&queue->set_pci_flags_count); 1222 1223 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1224 qeth_release_skbs(buf); 1225 } 1226 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1227 if (buf->buffer->element[i].addr && buf->is_header[i]) 1228 kmem_cache_free(qeth_core_header_cache, 1229 buf->buffer->element[i].addr); 1230 buf->is_header[i] = 0; 1231 buf->buffer->element[i].length = 0; 1232 buf->buffer->element[i].addr = NULL; 1233 buf->buffer->element[i].eflags = 0; 1234 buf->buffer->element[i].sflags = 0; 1235 } 1236 buf->buffer->element[15].eflags = 0; 1237 buf->buffer->element[15].sflags = 0; 1238 buf->next_element_to_fill = 0; 1239 atomic_set(&buf->state, newbufstate); 1240 } 1241 1242 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1243 { 1244 int j; 1245 1246 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1247 if (!q->bufs[j]) 1248 continue; 1249 qeth_cleanup_handled_pending(q, j, 1); 1250 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1251 if (free) { 1252 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1253 q->bufs[j] = NULL; 1254 } 1255 } 1256 } 1257 1258 void qeth_clear_qdio_buffers(struct qeth_card *card) 1259 { 1260 int i; 1261 1262 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1263 /* clear outbound buffers to free skbs */ 1264 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1265 if (card->qdio.out_qs[i]) { 1266 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1267 } 1268 } 1269 } 1270 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1271 1272 static void qeth_free_buffer_pool(struct qeth_card *card) 1273 { 1274 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1275 int i = 0; 1276 list_for_each_entry_safe(pool_entry, tmp, 1277 &card->qdio.init_pool.entry_list, init_list){ 1278 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1279 free_page((unsigned long)pool_entry->elements[i]); 1280 list_del(&pool_entry->init_list); 1281 kfree(pool_entry); 1282 } 1283 } 1284 1285 static void qeth_free_qdio_buffers(struct qeth_card *card) 1286 { 1287 int i, j; 1288 1289 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1290 QETH_QDIO_UNINITIALIZED) 1291 return; 1292 1293 qeth_free_cq(card); 1294 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1295 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1296 if (card->qdio.in_q->bufs[j].rx_skb) 1297 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1298 } 1299 kfree(card->qdio.in_q); 1300 card->qdio.in_q = NULL; 1301 /* inbound buffer pool */ 1302 qeth_free_buffer_pool(card); 1303 /* free outbound qdio_qs */ 1304 if (card->qdio.out_qs) { 1305 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1306 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1307 kfree(card->qdio.out_qs[i]); 1308 } 1309 kfree(card->qdio.out_qs); 1310 card->qdio.out_qs = NULL; 1311 } 1312 } 1313 1314 static void qeth_clean_channel(struct qeth_channel *channel) 1315 { 1316 int cnt; 1317 1318 QETH_DBF_TEXT(SETUP, 2, "freech"); 1319 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1320 kfree(channel->iob[cnt].data); 1321 } 1322 1323 static void qeth_set_single_write_queues(struct qeth_card *card) 1324 { 1325 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1326 (card->qdio.no_out_queues == 4)) 1327 qeth_free_qdio_buffers(card); 1328 1329 card->qdio.no_out_queues = 1; 1330 if (card->qdio.default_out_queue != 0) 1331 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1332 1333 card->qdio.default_out_queue = 0; 1334 } 1335 1336 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1337 { 1338 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1339 (card->qdio.no_out_queues == 1)) { 1340 qeth_free_qdio_buffers(card); 1341 card->qdio.default_out_queue = 2; 1342 } 1343 card->qdio.no_out_queues = 4; 1344 } 1345 1346 static void qeth_update_from_chp_desc(struct qeth_card *card) 1347 { 1348 struct ccw_device *ccwdev; 1349 struct channel_path_desc *chp_dsc; 1350 1351 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1352 1353 ccwdev = card->data.ccwdev; 1354 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1355 if (!chp_dsc) 1356 goto out; 1357 1358 card->info.func_level = 0x4100 + chp_dsc->desc; 1359 if (card->info.type == QETH_CARD_TYPE_IQD) 1360 goto out; 1361 1362 /* CHPP field bit 6 == 1 -> single queue */ 1363 if ((chp_dsc->chpp & 0x02) == 0x02) 1364 qeth_set_single_write_queues(card); 1365 else 1366 qeth_set_multiple_write_queues(card); 1367 out: 1368 kfree(chp_dsc); 1369 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1370 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1371 } 1372 1373 static void qeth_init_qdio_info(struct qeth_card *card) 1374 { 1375 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1376 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1377 /* inbound */ 1378 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1379 if (card->info.type == QETH_CARD_TYPE_IQD) 1380 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1381 else 1382 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1383 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1384 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1385 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1386 } 1387 1388 static void qeth_set_intial_options(struct qeth_card *card) 1389 { 1390 card->options.route4.type = NO_ROUTER; 1391 card->options.route6.type = NO_ROUTER; 1392 card->options.fake_broadcast = 0; 1393 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1394 card->options.performance_stats = 0; 1395 card->options.rx_sg_cb = QETH_RX_SG_CB; 1396 card->options.isolation = ISOLATION_MODE_NONE; 1397 card->options.cq = QETH_CQ_DISABLED; 1398 } 1399 1400 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1401 { 1402 unsigned long flags; 1403 int rc = 0; 1404 1405 spin_lock_irqsave(&card->thread_mask_lock, flags); 1406 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1407 (u8) card->thread_start_mask, 1408 (u8) card->thread_allowed_mask, 1409 (u8) card->thread_running_mask); 1410 rc = (card->thread_start_mask & thread); 1411 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1412 return rc; 1413 } 1414 1415 static void qeth_start_kernel_thread(struct work_struct *work) 1416 { 1417 struct task_struct *ts; 1418 struct qeth_card *card = container_of(work, struct qeth_card, 1419 kernel_thread_starter); 1420 QETH_CARD_TEXT(card , 2, "strthrd"); 1421 1422 if (card->read.state != CH_STATE_UP && 1423 card->write.state != CH_STATE_UP) 1424 return; 1425 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1426 ts = kthread_run(card->discipline->recover, (void *)card, 1427 "qeth_recover"); 1428 if (IS_ERR(ts)) { 1429 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1430 qeth_clear_thread_running_bit(card, 1431 QETH_RECOVER_THREAD); 1432 } 1433 } 1434 } 1435 1436 static int qeth_setup_card(struct qeth_card *card) 1437 { 1438 1439 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1440 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1441 1442 card->read.state = CH_STATE_DOWN; 1443 card->write.state = CH_STATE_DOWN; 1444 card->data.state = CH_STATE_DOWN; 1445 card->state = CARD_STATE_DOWN; 1446 card->lan_online = 0; 1447 card->read_or_write_problem = 0; 1448 card->dev = NULL; 1449 spin_lock_init(&card->vlanlock); 1450 spin_lock_init(&card->mclock); 1451 spin_lock_init(&card->lock); 1452 spin_lock_init(&card->ip_lock); 1453 spin_lock_init(&card->thread_mask_lock); 1454 mutex_init(&card->conf_mutex); 1455 mutex_init(&card->discipline_mutex); 1456 card->thread_start_mask = 0; 1457 card->thread_allowed_mask = 0; 1458 card->thread_running_mask = 0; 1459 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1460 INIT_LIST_HEAD(&card->ip_list); 1461 INIT_LIST_HEAD(card->ip_tbd_list); 1462 INIT_LIST_HEAD(&card->cmd_waiter_list); 1463 init_waitqueue_head(&card->wait_q); 1464 /* initial options */ 1465 qeth_set_intial_options(card); 1466 /* IP address takeover */ 1467 INIT_LIST_HEAD(&card->ipato.entries); 1468 card->ipato.enabled = 0; 1469 card->ipato.invert4 = 0; 1470 card->ipato.invert6 = 0; 1471 /* init QDIO stuff */ 1472 qeth_init_qdio_info(card); 1473 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1474 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1475 return 0; 1476 } 1477 1478 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1479 { 1480 struct qeth_card *card = container_of(slr, struct qeth_card, 1481 qeth_service_level); 1482 if (card->info.mcl_level[0]) 1483 seq_printf(m, "qeth: %s firmware level %s\n", 1484 CARD_BUS_ID(card), card->info.mcl_level); 1485 } 1486 1487 static struct qeth_card *qeth_alloc_card(void) 1488 { 1489 struct qeth_card *card; 1490 1491 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1492 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1493 if (!card) 1494 goto out; 1495 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1496 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1497 if (!card->ip_tbd_list) { 1498 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1499 goto out_card; 1500 } 1501 if (qeth_setup_channel(&card->read)) 1502 goto out_ip; 1503 if (qeth_setup_channel(&card->write)) 1504 goto out_channel; 1505 card->options.layer2 = -1; 1506 card->qeth_service_level.seq_print = qeth_core_sl_print; 1507 register_service_level(&card->qeth_service_level); 1508 return card; 1509 1510 out_channel: 1511 qeth_clean_channel(&card->read); 1512 out_ip: 1513 kfree(card->ip_tbd_list); 1514 out_card: 1515 kfree(card); 1516 out: 1517 return NULL; 1518 } 1519 1520 static int qeth_determine_card_type(struct qeth_card *card) 1521 { 1522 int i = 0; 1523 1524 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1525 1526 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1527 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1528 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1529 if ((CARD_RDEV(card)->id.dev_type == 1530 known_devices[i][QETH_DEV_TYPE_IND]) && 1531 (CARD_RDEV(card)->id.dev_model == 1532 known_devices[i][QETH_DEV_MODEL_IND])) { 1533 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1534 card->qdio.no_out_queues = 1535 known_devices[i][QETH_QUEUE_NO_IND]; 1536 card->qdio.no_in_queues = 1; 1537 card->info.is_multicast_different = 1538 known_devices[i][QETH_MULTICAST_IND]; 1539 qeth_update_from_chp_desc(card); 1540 return 0; 1541 } 1542 i++; 1543 } 1544 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1545 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1546 "unknown type\n"); 1547 return -ENOENT; 1548 } 1549 1550 static int qeth_clear_channel(struct qeth_channel *channel) 1551 { 1552 unsigned long flags; 1553 struct qeth_card *card; 1554 int rc; 1555 1556 card = CARD_FROM_CDEV(channel->ccwdev); 1557 QETH_CARD_TEXT(card, 3, "clearch"); 1558 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1559 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1560 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1561 1562 if (rc) 1563 return rc; 1564 rc = wait_event_interruptible_timeout(card->wait_q, 1565 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1566 if (rc == -ERESTARTSYS) 1567 return rc; 1568 if (channel->state != CH_STATE_STOPPED) 1569 return -ETIME; 1570 channel->state = CH_STATE_DOWN; 1571 return 0; 1572 } 1573 1574 static int qeth_halt_channel(struct qeth_channel *channel) 1575 { 1576 unsigned long flags; 1577 struct qeth_card *card; 1578 int rc; 1579 1580 card = CARD_FROM_CDEV(channel->ccwdev); 1581 QETH_CARD_TEXT(card, 3, "haltch"); 1582 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1583 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1584 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1585 1586 if (rc) 1587 return rc; 1588 rc = wait_event_interruptible_timeout(card->wait_q, 1589 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1590 if (rc == -ERESTARTSYS) 1591 return rc; 1592 if (channel->state != CH_STATE_HALTED) 1593 return -ETIME; 1594 return 0; 1595 } 1596 1597 static int qeth_halt_channels(struct qeth_card *card) 1598 { 1599 int rc1 = 0, rc2 = 0, rc3 = 0; 1600 1601 QETH_CARD_TEXT(card, 3, "haltchs"); 1602 rc1 = qeth_halt_channel(&card->read); 1603 rc2 = qeth_halt_channel(&card->write); 1604 rc3 = qeth_halt_channel(&card->data); 1605 if (rc1) 1606 return rc1; 1607 if (rc2) 1608 return rc2; 1609 return rc3; 1610 } 1611 1612 static int qeth_clear_channels(struct qeth_card *card) 1613 { 1614 int rc1 = 0, rc2 = 0, rc3 = 0; 1615 1616 QETH_CARD_TEXT(card, 3, "clearchs"); 1617 rc1 = qeth_clear_channel(&card->read); 1618 rc2 = qeth_clear_channel(&card->write); 1619 rc3 = qeth_clear_channel(&card->data); 1620 if (rc1) 1621 return rc1; 1622 if (rc2) 1623 return rc2; 1624 return rc3; 1625 } 1626 1627 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1628 { 1629 int rc = 0; 1630 1631 QETH_CARD_TEXT(card, 3, "clhacrd"); 1632 1633 if (halt) 1634 rc = qeth_halt_channels(card); 1635 if (rc) 1636 return rc; 1637 return qeth_clear_channels(card); 1638 } 1639 1640 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1641 { 1642 int rc = 0; 1643 1644 QETH_CARD_TEXT(card, 3, "qdioclr"); 1645 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1646 QETH_QDIO_CLEANING)) { 1647 case QETH_QDIO_ESTABLISHED: 1648 if (card->info.type == QETH_CARD_TYPE_IQD) 1649 rc = qdio_shutdown(CARD_DDEV(card), 1650 QDIO_FLAG_CLEANUP_USING_HALT); 1651 else 1652 rc = qdio_shutdown(CARD_DDEV(card), 1653 QDIO_FLAG_CLEANUP_USING_CLEAR); 1654 if (rc) 1655 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1656 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1657 break; 1658 case QETH_QDIO_CLEANING: 1659 return rc; 1660 default: 1661 break; 1662 } 1663 rc = qeth_clear_halt_card(card, use_halt); 1664 if (rc) 1665 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1666 card->state = CARD_STATE_DOWN; 1667 return rc; 1668 } 1669 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1670 1671 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1672 int *length) 1673 { 1674 struct ciw *ciw; 1675 char *rcd_buf; 1676 int ret; 1677 struct qeth_channel *channel = &card->data; 1678 unsigned long flags; 1679 1680 /* 1681 * scan for RCD command in extended SenseID data 1682 */ 1683 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1684 if (!ciw || ciw->cmd == 0) 1685 return -EOPNOTSUPP; 1686 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1687 if (!rcd_buf) 1688 return -ENOMEM; 1689 1690 channel->ccw.cmd_code = ciw->cmd; 1691 channel->ccw.cda = (__u32) __pa(rcd_buf); 1692 channel->ccw.count = ciw->count; 1693 channel->ccw.flags = CCW_FLAG_SLI; 1694 channel->state = CH_STATE_RCD; 1695 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1696 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1697 QETH_RCD_PARM, LPM_ANYPATH, 0, 1698 QETH_RCD_TIMEOUT); 1699 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1700 if (!ret) 1701 wait_event(card->wait_q, 1702 (channel->state == CH_STATE_RCD_DONE || 1703 channel->state == CH_STATE_DOWN)); 1704 if (channel->state == CH_STATE_DOWN) 1705 ret = -EIO; 1706 else 1707 channel->state = CH_STATE_DOWN; 1708 if (ret) { 1709 kfree(rcd_buf); 1710 *buffer = NULL; 1711 *length = 0; 1712 } else { 1713 *length = ciw->count; 1714 *buffer = rcd_buf; 1715 } 1716 return ret; 1717 } 1718 1719 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1720 { 1721 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1722 card->info.chpid = prcd[30]; 1723 card->info.unit_addr2 = prcd[31]; 1724 card->info.cula = prcd[63]; 1725 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1726 (prcd[0x11] == _ascebc['M'])); 1727 } 1728 1729 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1730 { 1731 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1732 1733 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1734 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1735 card->info.blkt.time_total = 0; 1736 card->info.blkt.inter_packet = 0; 1737 card->info.blkt.inter_packet_jumbo = 0; 1738 } else { 1739 card->info.blkt.time_total = 250; 1740 card->info.blkt.inter_packet = 5; 1741 card->info.blkt.inter_packet_jumbo = 15; 1742 } 1743 } 1744 1745 static void qeth_init_tokens(struct qeth_card *card) 1746 { 1747 card->token.issuer_rm_w = 0x00010103UL; 1748 card->token.cm_filter_w = 0x00010108UL; 1749 card->token.cm_connection_w = 0x0001010aUL; 1750 card->token.ulp_filter_w = 0x0001010bUL; 1751 card->token.ulp_connection_w = 0x0001010dUL; 1752 } 1753 1754 static void qeth_init_func_level(struct qeth_card *card) 1755 { 1756 switch (card->info.type) { 1757 case QETH_CARD_TYPE_IQD: 1758 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1759 break; 1760 case QETH_CARD_TYPE_OSD: 1761 case QETH_CARD_TYPE_OSN: 1762 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1763 break; 1764 default: 1765 break; 1766 } 1767 } 1768 1769 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1770 void (*idx_reply_cb)(struct qeth_channel *, 1771 struct qeth_cmd_buffer *)) 1772 { 1773 struct qeth_cmd_buffer *iob; 1774 unsigned long flags; 1775 int rc; 1776 struct qeth_card *card; 1777 1778 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1779 card = CARD_FROM_CDEV(channel->ccwdev); 1780 iob = qeth_get_buffer(channel); 1781 iob->callback = idx_reply_cb; 1782 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1783 channel->ccw.count = QETH_BUFSIZE; 1784 channel->ccw.cda = (__u32) __pa(iob->data); 1785 1786 wait_event(card->wait_q, 1787 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1788 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1789 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1790 rc = ccw_device_start(channel->ccwdev, 1791 &channel->ccw, (addr_t) iob, 0, 0); 1792 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1793 1794 if (rc) { 1795 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1796 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1797 atomic_set(&channel->irq_pending, 0); 1798 wake_up(&card->wait_q); 1799 return rc; 1800 } 1801 rc = wait_event_interruptible_timeout(card->wait_q, 1802 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1803 if (rc == -ERESTARTSYS) 1804 return rc; 1805 if (channel->state != CH_STATE_UP) { 1806 rc = -ETIME; 1807 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1808 qeth_clear_cmd_buffers(channel); 1809 } else 1810 rc = 0; 1811 return rc; 1812 } 1813 1814 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1815 void (*idx_reply_cb)(struct qeth_channel *, 1816 struct qeth_cmd_buffer *)) 1817 { 1818 struct qeth_card *card; 1819 struct qeth_cmd_buffer *iob; 1820 unsigned long flags; 1821 __u16 temp; 1822 __u8 tmp; 1823 int rc; 1824 struct ccw_dev_id temp_devid; 1825 1826 card = CARD_FROM_CDEV(channel->ccwdev); 1827 1828 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1829 1830 iob = qeth_get_buffer(channel); 1831 iob->callback = idx_reply_cb; 1832 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1833 channel->ccw.count = IDX_ACTIVATE_SIZE; 1834 channel->ccw.cda = (__u32) __pa(iob->data); 1835 if (channel == &card->write) { 1836 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1837 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1838 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1839 card->seqno.trans_hdr++; 1840 } else { 1841 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1842 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1843 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1844 } 1845 tmp = ((__u8)card->info.portno) | 0x80; 1846 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1847 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1848 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1849 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1850 &card->info.func_level, sizeof(__u16)); 1851 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1852 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1853 temp = (card->info.cula << 8) + card->info.unit_addr2; 1854 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1855 1856 wait_event(card->wait_q, 1857 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1858 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1859 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1860 rc = ccw_device_start(channel->ccwdev, 1861 &channel->ccw, (addr_t) iob, 0, 0); 1862 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1863 1864 if (rc) { 1865 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1866 rc); 1867 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1868 atomic_set(&channel->irq_pending, 0); 1869 wake_up(&card->wait_q); 1870 return rc; 1871 } 1872 rc = wait_event_interruptible_timeout(card->wait_q, 1873 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1874 if (rc == -ERESTARTSYS) 1875 return rc; 1876 if (channel->state != CH_STATE_ACTIVATING) { 1877 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1878 " failed to recover an error on the device\n"); 1879 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1880 dev_name(&channel->ccwdev->dev)); 1881 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1882 qeth_clear_cmd_buffers(channel); 1883 return -ETIME; 1884 } 1885 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1886 } 1887 1888 static int qeth_peer_func_level(int level) 1889 { 1890 if ((level & 0xff) == 8) 1891 return (level & 0xff) + 0x400; 1892 if (((level >> 8) & 3) == 1) 1893 return (level & 0xff) + 0x200; 1894 return level; 1895 } 1896 1897 static void qeth_idx_write_cb(struct qeth_channel *channel, 1898 struct qeth_cmd_buffer *iob) 1899 { 1900 struct qeth_card *card; 1901 __u16 temp; 1902 1903 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1904 1905 if (channel->state == CH_STATE_DOWN) { 1906 channel->state = CH_STATE_ACTIVATING; 1907 goto out; 1908 } 1909 card = CARD_FROM_CDEV(channel->ccwdev); 1910 1911 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1912 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1913 dev_err(&card->write.ccwdev->dev, 1914 "The adapter is used exclusively by another " 1915 "host\n"); 1916 else 1917 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1918 " negative reply\n", 1919 dev_name(&card->write.ccwdev->dev)); 1920 goto out; 1921 } 1922 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1923 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1924 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1925 "function level mismatch (sent: 0x%x, received: " 1926 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1927 card->info.func_level, temp); 1928 goto out; 1929 } 1930 channel->state = CH_STATE_UP; 1931 out: 1932 qeth_release_buffer(channel, iob); 1933 } 1934 1935 static void qeth_idx_read_cb(struct qeth_channel *channel, 1936 struct qeth_cmd_buffer *iob) 1937 { 1938 struct qeth_card *card; 1939 __u16 temp; 1940 1941 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1942 if (channel->state == CH_STATE_DOWN) { 1943 channel->state = CH_STATE_ACTIVATING; 1944 goto out; 1945 } 1946 1947 card = CARD_FROM_CDEV(channel->ccwdev); 1948 if (qeth_check_idx_response(card, iob->data)) 1949 goto out; 1950 1951 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1952 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1953 case QETH_IDX_ACT_ERR_EXCL: 1954 dev_err(&card->write.ccwdev->dev, 1955 "The adapter is used exclusively by another " 1956 "host\n"); 1957 break; 1958 case QETH_IDX_ACT_ERR_AUTH: 1959 case QETH_IDX_ACT_ERR_AUTH_USER: 1960 dev_err(&card->read.ccwdev->dev, 1961 "Setting the device online failed because of " 1962 "insufficient authorization\n"); 1963 break; 1964 default: 1965 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1966 " negative reply\n", 1967 dev_name(&card->read.ccwdev->dev)); 1968 } 1969 QETH_CARD_TEXT_(card, 2, "idxread%c", 1970 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1971 goto out; 1972 } 1973 1974 /** 1975 * * temporary fix for microcode bug 1976 * * to revert it,replace OR by AND 1977 * */ 1978 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1979 (card->info.type == QETH_CARD_TYPE_OSD)) 1980 card->info.portname_required = 1; 1981 1982 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1983 if (temp != qeth_peer_func_level(card->info.func_level)) { 1984 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1985 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1986 dev_name(&card->read.ccwdev->dev), 1987 card->info.func_level, temp); 1988 goto out; 1989 } 1990 memcpy(&card->token.issuer_rm_r, 1991 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1992 QETH_MPC_TOKEN_LENGTH); 1993 memcpy(&card->info.mcl_level[0], 1994 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1995 channel->state = CH_STATE_UP; 1996 out: 1997 qeth_release_buffer(channel, iob); 1998 } 1999 2000 void qeth_prepare_control_data(struct qeth_card *card, int len, 2001 struct qeth_cmd_buffer *iob) 2002 { 2003 qeth_setup_ccw(&card->write, iob->data, len); 2004 iob->callback = qeth_release_buffer; 2005 2006 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2007 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2008 card->seqno.trans_hdr++; 2009 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2010 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2011 card->seqno.pdu_hdr++; 2012 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2013 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2014 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2015 } 2016 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2017 2018 int qeth_send_control_data(struct qeth_card *card, int len, 2019 struct qeth_cmd_buffer *iob, 2020 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 2021 unsigned long), 2022 void *reply_param) 2023 { 2024 int rc; 2025 unsigned long flags; 2026 struct qeth_reply *reply = NULL; 2027 unsigned long timeout, event_timeout; 2028 struct qeth_ipa_cmd *cmd; 2029 2030 QETH_CARD_TEXT(card, 2, "sendctl"); 2031 2032 if (card->read_or_write_problem) { 2033 qeth_release_buffer(iob->channel, iob); 2034 return -EIO; 2035 } 2036 reply = qeth_alloc_reply(card); 2037 if (!reply) { 2038 return -ENOMEM; 2039 } 2040 reply->callback = reply_cb; 2041 reply->param = reply_param; 2042 if (card->state == CARD_STATE_DOWN) 2043 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2044 else 2045 reply->seqno = card->seqno.ipa++; 2046 init_waitqueue_head(&reply->wait_q); 2047 spin_lock_irqsave(&card->lock, flags); 2048 list_add_tail(&reply->list, &card->cmd_waiter_list); 2049 spin_unlock_irqrestore(&card->lock, flags); 2050 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2051 2052 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2053 qeth_prepare_control_data(card, len, iob); 2054 2055 if (IS_IPA(iob->data)) 2056 event_timeout = QETH_IPA_TIMEOUT; 2057 else 2058 event_timeout = QETH_TIMEOUT; 2059 timeout = jiffies + event_timeout; 2060 2061 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2062 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2063 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2064 (addr_t) iob, 0, 0); 2065 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2066 if (rc) { 2067 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2068 "ccw_device_start rc = %i\n", 2069 dev_name(&card->write.ccwdev->dev), rc); 2070 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2071 spin_lock_irqsave(&card->lock, flags); 2072 list_del_init(&reply->list); 2073 qeth_put_reply(reply); 2074 spin_unlock_irqrestore(&card->lock, flags); 2075 qeth_release_buffer(iob->channel, iob); 2076 atomic_set(&card->write.irq_pending, 0); 2077 wake_up(&card->wait_q); 2078 return rc; 2079 } 2080 2081 /* we have only one long running ipassist, since we can ensure 2082 process context of this command we can sleep */ 2083 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2084 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2085 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2086 if (!wait_event_timeout(reply->wait_q, 2087 atomic_read(&reply->received), event_timeout)) 2088 goto time_err; 2089 } else { 2090 while (!atomic_read(&reply->received)) { 2091 if (time_after(jiffies, timeout)) 2092 goto time_err; 2093 cpu_relax(); 2094 } 2095 } 2096 2097 if (reply->rc == -EIO) 2098 goto error; 2099 rc = reply->rc; 2100 qeth_put_reply(reply); 2101 return rc; 2102 2103 time_err: 2104 reply->rc = -ETIME; 2105 spin_lock_irqsave(&reply->card->lock, flags); 2106 list_del_init(&reply->list); 2107 spin_unlock_irqrestore(&reply->card->lock, flags); 2108 atomic_inc(&reply->received); 2109 error: 2110 atomic_set(&card->write.irq_pending, 0); 2111 qeth_release_buffer(iob->channel, iob); 2112 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2113 rc = reply->rc; 2114 qeth_put_reply(reply); 2115 return rc; 2116 } 2117 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2118 2119 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2120 unsigned long data) 2121 { 2122 struct qeth_cmd_buffer *iob; 2123 2124 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2125 2126 iob = (struct qeth_cmd_buffer *) data; 2127 memcpy(&card->token.cm_filter_r, 2128 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2129 QETH_MPC_TOKEN_LENGTH); 2130 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2131 return 0; 2132 } 2133 2134 static int qeth_cm_enable(struct qeth_card *card) 2135 { 2136 int rc; 2137 struct qeth_cmd_buffer *iob; 2138 2139 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2140 2141 iob = qeth_wait_for_buffer(&card->write); 2142 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2143 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2144 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2145 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2146 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2147 2148 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2149 qeth_cm_enable_cb, NULL); 2150 return rc; 2151 } 2152 2153 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2154 unsigned long data) 2155 { 2156 2157 struct qeth_cmd_buffer *iob; 2158 2159 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2160 2161 iob = (struct qeth_cmd_buffer *) data; 2162 memcpy(&card->token.cm_connection_r, 2163 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2164 QETH_MPC_TOKEN_LENGTH); 2165 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2166 return 0; 2167 } 2168 2169 static int qeth_cm_setup(struct qeth_card *card) 2170 { 2171 int rc; 2172 struct qeth_cmd_buffer *iob; 2173 2174 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2175 2176 iob = qeth_wait_for_buffer(&card->write); 2177 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2178 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2179 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2180 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2181 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2182 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2183 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2184 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2185 qeth_cm_setup_cb, NULL); 2186 return rc; 2187 2188 } 2189 2190 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2191 { 2192 switch (card->info.type) { 2193 case QETH_CARD_TYPE_UNKNOWN: 2194 return 1500; 2195 case QETH_CARD_TYPE_IQD: 2196 return card->info.max_mtu; 2197 case QETH_CARD_TYPE_OSD: 2198 switch (card->info.link_type) { 2199 case QETH_LINK_TYPE_HSTR: 2200 case QETH_LINK_TYPE_LANE_TR: 2201 return 2000; 2202 default: 2203 return card->options.layer2 ? 1500 : 1492; 2204 } 2205 case QETH_CARD_TYPE_OSM: 2206 case QETH_CARD_TYPE_OSX: 2207 return card->options.layer2 ? 1500 : 1492; 2208 default: 2209 return 1500; 2210 } 2211 } 2212 2213 static inline int qeth_get_mtu_outof_framesize(int framesize) 2214 { 2215 switch (framesize) { 2216 case 0x4000: 2217 return 8192; 2218 case 0x6000: 2219 return 16384; 2220 case 0xa000: 2221 return 32768; 2222 case 0xffff: 2223 return 57344; 2224 default: 2225 return 0; 2226 } 2227 } 2228 2229 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2230 { 2231 switch (card->info.type) { 2232 case QETH_CARD_TYPE_OSD: 2233 case QETH_CARD_TYPE_OSM: 2234 case QETH_CARD_TYPE_OSX: 2235 case QETH_CARD_TYPE_IQD: 2236 return ((mtu >= 576) && 2237 (mtu <= card->info.max_mtu)); 2238 case QETH_CARD_TYPE_OSN: 2239 case QETH_CARD_TYPE_UNKNOWN: 2240 default: 2241 return 1; 2242 } 2243 } 2244 2245 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2246 unsigned long data) 2247 { 2248 2249 __u16 mtu, framesize; 2250 __u16 len; 2251 __u8 link_type; 2252 struct qeth_cmd_buffer *iob; 2253 2254 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2255 2256 iob = (struct qeth_cmd_buffer *) data; 2257 memcpy(&card->token.ulp_filter_r, 2258 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2259 QETH_MPC_TOKEN_LENGTH); 2260 if (card->info.type == QETH_CARD_TYPE_IQD) { 2261 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2262 mtu = qeth_get_mtu_outof_framesize(framesize); 2263 if (!mtu) { 2264 iob->rc = -EINVAL; 2265 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2266 return 0; 2267 } 2268 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2269 /* frame size has changed */ 2270 if (card->dev && 2271 ((card->dev->mtu == card->info.initial_mtu) || 2272 (card->dev->mtu > mtu))) 2273 card->dev->mtu = mtu; 2274 qeth_free_qdio_buffers(card); 2275 } 2276 card->info.initial_mtu = mtu; 2277 card->info.max_mtu = mtu; 2278 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2279 } else { 2280 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2281 iob->data); 2282 card->info.initial_mtu = min(card->info.max_mtu, 2283 qeth_get_initial_mtu_for_card(card)); 2284 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2285 } 2286 2287 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2288 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2289 memcpy(&link_type, 2290 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2291 card->info.link_type = link_type; 2292 } else 2293 card->info.link_type = 0; 2294 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2295 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2296 return 0; 2297 } 2298 2299 static int qeth_ulp_enable(struct qeth_card *card) 2300 { 2301 int rc; 2302 char prot_type; 2303 struct qeth_cmd_buffer *iob; 2304 2305 /*FIXME: trace view callbacks*/ 2306 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2307 2308 iob = qeth_wait_for_buffer(&card->write); 2309 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2310 2311 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2312 (__u8) card->info.portno; 2313 if (card->options.layer2) 2314 if (card->info.type == QETH_CARD_TYPE_OSN) 2315 prot_type = QETH_PROT_OSN2; 2316 else 2317 prot_type = QETH_PROT_LAYER2; 2318 else 2319 prot_type = QETH_PROT_TCPIP; 2320 2321 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2322 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2323 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2324 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2325 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2326 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2327 card->info.portname, 9); 2328 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2329 qeth_ulp_enable_cb, NULL); 2330 return rc; 2331 2332 } 2333 2334 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2335 unsigned long data) 2336 { 2337 struct qeth_cmd_buffer *iob; 2338 2339 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2340 2341 iob = (struct qeth_cmd_buffer *) data; 2342 memcpy(&card->token.ulp_connection_r, 2343 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2344 QETH_MPC_TOKEN_LENGTH); 2345 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2346 3)) { 2347 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2348 dev_err(&card->gdev->dev, "A connection could not be " 2349 "established because of an OLM limit\n"); 2350 iob->rc = -EMLINK; 2351 } 2352 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2353 return 0; 2354 } 2355 2356 static int qeth_ulp_setup(struct qeth_card *card) 2357 { 2358 int rc; 2359 __u16 temp; 2360 struct qeth_cmd_buffer *iob; 2361 struct ccw_dev_id dev_id; 2362 2363 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2364 2365 iob = qeth_wait_for_buffer(&card->write); 2366 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2367 2368 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2369 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2370 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2371 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2372 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2373 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2374 2375 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2376 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2377 temp = (card->info.cula << 8) + card->info.unit_addr2; 2378 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2379 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2380 qeth_ulp_setup_cb, NULL); 2381 return rc; 2382 } 2383 2384 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2385 { 2386 int rc; 2387 struct qeth_qdio_out_buffer *newbuf; 2388 2389 rc = 0; 2390 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2391 if (!newbuf) { 2392 rc = -ENOMEM; 2393 goto out; 2394 } 2395 newbuf->buffer = &q->qdio_bufs[bidx]; 2396 skb_queue_head_init(&newbuf->skb_list); 2397 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2398 newbuf->q = q; 2399 newbuf->aob = NULL; 2400 newbuf->next_pending = q->bufs[bidx]; 2401 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2402 q->bufs[bidx] = newbuf; 2403 if (q->bufstates) { 2404 q->bufstates[bidx].user = newbuf; 2405 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2406 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2407 QETH_CARD_TEXT_(q->card, 2, "%lx", 2408 (long) newbuf->next_pending); 2409 } 2410 out: 2411 return rc; 2412 } 2413 2414 2415 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2416 { 2417 int i, j; 2418 2419 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2420 2421 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2422 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2423 return 0; 2424 2425 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2426 GFP_KERNEL); 2427 if (!card->qdio.in_q) 2428 goto out_nomem; 2429 QETH_DBF_TEXT(SETUP, 2, "inq"); 2430 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2431 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2432 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2433 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2434 card->qdio.in_q->bufs[i].buffer = 2435 &card->qdio.in_q->qdio_bufs[i]; 2436 card->qdio.in_q->bufs[i].rx_skb = NULL; 2437 } 2438 /* inbound buffer pool */ 2439 if (qeth_alloc_buffer_pool(card)) 2440 goto out_freeinq; 2441 2442 /* outbound */ 2443 card->qdio.out_qs = 2444 kzalloc(card->qdio.no_out_queues * 2445 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2446 if (!card->qdio.out_qs) 2447 goto out_freepool; 2448 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2449 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2450 GFP_KERNEL); 2451 if (!card->qdio.out_qs[i]) 2452 goto out_freeoutq; 2453 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2454 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2455 card->qdio.out_qs[i]->queue_no = i; 2456 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2457 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2458 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2459 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2460 goto out_freeoutqbufs; 2461 } 2462 } 2463 2464 /* completion */ 2465 if (qeth_alloc_cq(card)) 2466 goto out_freeoutq; 2467 2468 return 0; 2469 2470 out_freeoutqbufs: 2471 while (j > 0) { 2472 --j; 2473 kmem_cache_free(qeth_qdio_outbuf_cache, 2474 card->qdio.out_qs[i]->bufs[j]); 2475 card->qdio.out_qs[i]->bufs[j] = NULL; 2476 } 2477 out_freeoutq: 2478 while (i > 0) { 2479 kfree(card->qdio.out_qs[--i]); 2480 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2481 } 2482 kfree(card->qdio.out_qs); 2483 card->qdio.out_qs = NULL; 2484 out_freepool: 2485 qeth_free_buffer_pool(card); 2486 out_freeinq: 2487 kfree(card->qdio.in_q); 2488 card->qdio.in_q = NULL; 2489 out_nomem: 2490 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2491 return -ENOMEM; 2492 } 2493 2494 static void qeth_create_qib_param_field(struct qeth_card *card, 2495 char *param_field) 2496 { 2497 2498 param_field[0] = _ascebc['P']; 2499 param_field[1] = _ascebc['C']; 2500 param_field[2] = _ascebc['I']; 2501 param_field[3] = _ascebc['T']; 2502 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2503 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2504 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2505 } 2506 2507 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2508 char *param_field) 2509 { 2510 param_field[16] = _ascebc['B']; 2511 param_field[17] = _ascebc['L']; 2512 param_field[18] = _ascebc['K']; 2513 param_field[19] = _ascebc['T']; 2514 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2515 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2516 *((unsigned int *) (¶m_field[28])) = 2517 card->info.blkt.inter_packet_jumbo; 2518 } 2519 2520 static int qeth_qdio_activate(struct qeth_card *card) 2521 { 2522 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2523 return qdio_activate(CARD_DDEV(card)); 2524 } 2525 2526 static int qeth_dm_act(struct qeth_card *card) 2527 { 2528 int rc; 2529 struct qeth_cmd_buffer *iob; 2530 2531 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2532 2533 iob = qeth_wait_for_buffer(&card->write); 2534 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2535 2536 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2537 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2538 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2539 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2540 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2541 return rc; 2542 } 2543 2544 static int qeth_mpc_initialize(struct qeth_card *card) 2545 { 2546 int rc; 2547 2548 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2549 2550 rc = qeth_issue_next_read(card); 2551 if (rc) { 2552 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2553 return rc; 2554 } 2555 rc = qeth_cm_enable(card); 2556 if (rc) { 2557 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2558 goto out_qdio; 2559 } 2560 rc = qeth_cm_setup(card); 2561 if (rc) { 2562 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2563 goto out_qdio; 2564 } 2565 rc = qeth_ulp_enable(card); 2566 if (rc) { 2567 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2568 goto out_qdio; 2569 } 2570 rc = qeth_ulp_setup(card); 2571 if (rc) { 2572 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2573 goto out_qdio; 2574 } 2575 rc = qeth_alloc_qdio_buffers(card); 2576 if (rc) { 2577 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2578 goto out_qdio; 2579 } 2580 rc = qeth_qdio_establish(card); 2581 if (rc) { 2582 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2583 qeth_free_qdio_buffers(card); 2584 goto out_qdio; 2585 } 2586 rc = qeth_qdio_activate(card); 2587 if (rc) { 2588 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2589 goto out_qdio; 2590 } 2591 rc = qeth_dm_act(card); 2592 if (rc) { 2593 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2594 goto out_qdio; 2595 } 2596 2597 return 0; 2598 out_qdio: 2599 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2600 qdio_free(CARD_DDEV(card)); 2601 return rc; 2602 } 2603 2604 static void qeth_print_status_with_portname(struct qeth_card *card) 2605 { 2606 char dbf_text[15]; 2607 int i; 2608 2609 sprintf(dbf_text, "%s", card->info.portname + 1); 2610 for (i = 0; i < 8; i++) 2611 dbf_text[i] = 2612 (char) _ebcasc[(__u8) dbf_text[i]]; 2613 dbf_text[8] = 0; 2614 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2615 "with link type %s (portname: %s)\n", 2616 qeth_get_cardname(card), 2617 (card->info.mcl_level[0]) ? " (level: " : "", 2618 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2619 (card->info.mcl_level[0]) ? ")" : "", 2620 qeth_get_cardname_short(card), 2621 dbf_text); 2622 2623 } 2624 2625 static void qeth_print_status_no_portname(struct qeth_card *card) 2626 { 2627 if (card->info.portname[0]) 2628 dev_info(&card->gdev->dev, "Device is a%s " 2629 "card%s%s%s\nwith link type %s " 2630 "(no portname needed by interface).\n", 2631 qeth_get_cardname(card), 2632 (card->info.mcl_level[0]) ? " (level: " : "", 2633 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2634 (card->info.mcl_level[0]) ? ")" : "", 2635 qeth_get_cardname_short(card)); 2636 else 2637 dev_info(&card->gdev->dev, "Device is a%s " 2638 "card%s%s%s\nwith link type %s.\n", 2639 qeth_get_cardname(card), 2640 (card->info.mcl_level[0]) ? " (level: " : "", 2641 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2642 (card->info.mcl_level[0]) ? ")" : "", 2643 qeth_get_cardname_short(card)); 2644 } 2645 2646 void qeth_print_status_message(struct qeth_card *card) 2647 { 2648 switch (card->info.type) { 2649 case QETH_CARD_TYPE_OSD: 2650 case QETH_CARD_TYPE_OSM: 2651 case QETH_CARD_TYPE_OSX: 2652 /* VM will use a non-zero first character 2653 * to indicate a HiperSockets like reporting 2654 * of the level OSA sets the first character to zero 2655 * */ 2656 if (!card->info.mcl_level[0]) { 2657 sprintf(card->info.mcl_level, "%02x%02x", 2658 card->info.mcl_level[2], 2659 card->info.mcl_level[3]); 2660 2661 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2662 break; 2663 } 2664 /* fallthrough */ 2665 case QETH_CARD_TYPE_IQD: 2666 if ((card->info.guestlan) || 2667 (card->info.mcl_level[0] & 0x80)) { 2668 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2669 card->info.mcl_level[0]]; 2670 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2671 card->info.mcl_level[1]]; 2672 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2673 card->info.mcl_level[2]]; 2674 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2675 card->info.mcl_level[3]]; 2676 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2677 } 2678 break; 2679 default: 2680 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2681 } 2682 if (card->info.portname_required) 2683 qeth_print_status_with_portname(card); 2684 else 2685 qeth_print_status_no_portname(card); 2686 } 2687 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2688 2689 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2690 { 2691 struct qeth_buffer_pool_entry *entry; 2692 2693 QETH_CARD_TEXT(card, 5, "inwrklst"); 2694 2695 list_for_each_entry(entry, 2696 &card->qdio.init_pool.entry_list, init_list) { 2697 qeth_put_buffer_pool_entry(card, entry); 2698 } 2699 } 2700 2701 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2702 struct qeth_card *card) 2703 { 2704 struct list_head *plh; 2705 struct qeth_buffer_pool_entry *entry; 2706 int i, free; 2707 struct page *page; 2708 2709 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2710 return NULL; 2711 2712 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2713 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2714 free = 1; 2715 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2716 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2717 free = 0; 2718 break; 2719 } 2720 } 2721 if (free) { 2722 list_del_init(&entry->list); 2723 return entry; 2724 } 2725 } 2726 2727 /* no free buffer in pool so take first one and swap pages */ 2728 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2729 struct qeth_buffer_pool_entry, list); 2730 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2731 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2732 page = alloc_page(GFP_ATOMIC); 2733 if (!page) { 2734 return NULL; 2735 } else { 2736 free_page((unsigned long)entry->elements[i]); 2737 entry->elements[i] = page_address(page); 2738 if (card->options.performance_stats) 2739 card->perf_stats.sg_alloc_page_rx++; 2740 } 2741 } 2742 } 2743 list_del_init(&entry->list); 2744 return entry; 2745 } 2746 2747 static int qeth_init_input_buffer(struct qeth_card *card, 2748 struct qeth_qdio_buffer *buf) 2749 { 2750 struct qeth_buffer_pool_entry *pool_entry; 2751 int i; 2752 2753 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2754 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2755 if (!buf->rx_skb) 2756 return 1; 2757 } 2758 2759 pool_entry = qeth_find_free_buffer_pool_entry(card); 2760 if (!pool_entry) 2761 return 1; 2762 2763 /* 2764 * since the buffer is accessed only from the input_tasklet 2765 * there shouldn't be a need to synchronize; also, since we use 2766 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2767 * buffers 2768 */ 2769 2770 buf->pool_entry = pool_entry; 2771 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2772 buf->buffer->element[i].length = PAGE_SIZE; 2773 buf->buffer->element[i].addr = pool_entry->elements[i]; 2774 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2775 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2776 else 2777 buf->buffer->element[i].eflags = 0; 2778 buf->buffer->element[i].sflags = 0; 2779 } 2780 return 0; 2781 } 2782 2783 int qeth_init_qdio_queues(struct qeth_card *card) 2784 { 2785 int i, j; 2786 int rc; 2787 2788 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2789 2790 /* inbound queue */ 2791 memset(card->qdio.in_q->qdio_bufs, 0, 2792 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2793 qeth_initialize_working_pool_list(card); 2794 /*give only as many buffers to hardware as we have buffer pool entries*/ 2795 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2796 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2797 card->qdio.in_q->next_buf_to_init = 2798 card->qdio.in_buf_pool.buf_count - 1; 2799 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2800 card->qdio.in_buf_pool.buf_count - 1); 2801 if (rc) { 2802 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2803 return rc; 2804 } 2805 2806 /* completion */ 2807 rc = qeth_cq_init(card); 2808 if (rc) { 2809 return rc; 2810 } 2811 2812 /* outbound queue */ 2813 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2814 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2815 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2816 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2817 qeth_clear_output_buffer(card->qdio.out_qs[i], 2818 card->qdio.out_qs[i]->bufs[j], 2819 QETH_QDIO_BUF_EMPTY); 2820 } 2821 card->qdio.out_qs[i]->card = card; 2822 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2823 card->qdio.out_qs[i]->do_pack = 0; 2824 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2825 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2826 atomic_set(&card->qdio.out_qs[i]->state, 2827 QETH_OUT_Q_UNLOCKED); 2828 } 2829 return 0; 2830 } 2831 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2832 2833 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2834 { 2835 switch (link_type) { 2836 case QETH_LINK_TYPE_HSTR: 2837 return 2; 2838 default: 2839 return 1; 2840 } 2841 } 2842 2843 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2844 struct qeth_ipa_cmd *cmd, __u8 command, 2845 enum qeth_prot_versions prot) 2846 { 2847 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2848 cmd->hdr.command = command; 2849 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2850 cmd->hdr.seqno = card->seqno.ipa; 2851 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2852 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2853 if (card->options.layer2) 2854 cmd->hdr.prim_version_no = 2; 2855 else 2856 cmd->hdr.prim_version_no = 1; 2857 cmd->hdr.param_count = 1; 2858 cmd->hdr.prot_version = prot; 2859 cmd->hdr.ipa_supported = 0; 2860 cmd->hdr.ipa_enabled = 0; 2861 } 2862 2863 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2864 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2865 { 2866 struct qeth_cmd_buffer *iob; 2867 struct qeth_ipa_cmd *cmd; 2868 2869 iob = qeth_wait_for_buffer(&card->write); 2870 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2871 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2872 2873 return iob; 2874 } 2875 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2876 2877 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2878 char prot_type) 2879 { 2880 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2881 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2882 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2883 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2884 } 2885 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2886 2887 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2888 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2889 unsigned long), 2890 void *reply_param) 2891 { 2892 int rc; 2893 char prot_type; 2894 2895 QETH_CARD_TEXT(card, 4, "sendipa"); 2896 2897 if (card->options.layer2) 2898 if (card->info.type == QETH_CARD_TYPE_OSN) 2899 prot_type = QETH_PROT_OSN2; 2900 else 2901 prot_type = QETH_PROT_LAYER2; 2902 else 2903 prot_type = QETH_PROT_TCPIP; 2904 qeth_prepare_ipa_cmd(card, iob, prot_type); 2905 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2906 iob, reply_cb, reply_param); 2907 if (rc == -ETIME) { 2908 qeth_clear_ipacmd_list(card); 2909 qeth_schedule_recovery(card); 2910 } 2911 return rc; 2912 } 2913 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2914 2915 int qeth_send_startlan(struct qeth_card *card) 2916 { 2917 int rc; 2918 struct qeth_cmd_buffer *iob; 2919 2920 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2921 2922 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2923 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2924 return rc; 2925 } 2926 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2927 2928 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2929 struct qeth_reply *reply, unsigned long data) 2930 { 2931 struct qeth_ipa_cmd *cmd; 2932 2933 QETH_CARD_TEXT(card, 4, "defadpcb"); 2934 2935 cmd = (struct qeth_ipa_cmd *) data; 2936 if (cmd->hdr.return_code == 0) 2937 cmd->hdr.return_code = 2938 cmd->data.setadapterparms.hdr.return_code; 2939 return 0; 2940 } 2941 2942 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2943 struct qeth_reply *reply, unsigned long data) 2944 { 2945 struct qeth_ipa_cmd *cmd; 2946 2947 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2948 2949 cmd = (struct qeth_ipa_cmd *) data; 2950 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2951 card->info.link_type = 2952 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2953 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2954 } 2955 card->options.adp.supported_funcs = 2956 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2957 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2958 } 2959 2960 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2961 __u32 command, __u32 cmdlen) 2962 { 2963 struct qeth_cmd_buffer *iob; 2964 struct qeth_ipa_cmd *cmd; 2965 2966 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2967 QETH_PROT_IPV4); 2968 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2969 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2970 cmd->data.setadapterparms.hdr.command_code = command; 2971 cmd->data.setadapterparms.hdr.used_total = 1; 2972 cmd->data.setadapterparms.hdr.seq_no = 1; 2973 2974 return iob; 2975 } 2976 2977 int qeth_query_setadapterparms(struct qeth_card *card) 2978 { 2979 int rc; 2980 struct qeth_cmd_buffer *iob; 2981 2982 QETH_CARD_TEXT(card, 3, "queryadp"); 2983 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2984 sizeof(struct qeth_ipacmd_setadpparms)); 2985 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2986 return rc; 2987 } 2988 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2989 2990 static int qeth_query_ipassists_cb(struct qeth_card *card, 2991 struct qeth_reply *reply, unsigned long data) 2992 { 2993 struct qeth_ipa_cmd *cmd; 2994 2995 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2996 2997 cmd = (struct qeth_ipa_cmd *) data; 2998 2999 switch (cmd->hdr.return_code) { 3000 case IPA_RC_NOTSUPP: 3001 case IPA_RC_L2_UNSUPPORTED_CMD: 3002 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3003 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3004 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3005 return -0; 3006 default: 3007 if (cmd->hdr.return_code) { 3008 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3009 "rc=%d\n", 3010 dev_name(&card->gdev->dev), 3011 cmd->hdr.return_code); 3012 return 0; 3013 } 3014 } 3015 3016 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3017 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3018 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3019 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3020 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3021 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3022 } else 3023 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3024 "\n", dev_name(&card->gdev->dev)); 3025 return 0; 3026 } 3027 3028 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3029 { 3030 int rc; 3031 struct qeth_cmd_buffer *iob; 3032 3033 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3034 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3035 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3036 return rc; 3037 } 3038 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3039 3040 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3041 struct qeth_reply *reply, unsigned long data) 3042 { 3043 struct qeth_ipa_cmd *cmd; 3044 __u16 rc; 3045 3046 cmd = (struct qeth_ipa_cmd *)data; 3047 rc = cmd->hdr.return_code; 3048 if (rc) 3049 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3050 else 3051 card->info.diagass_support = cmd->data.diagass.ext; 3052 return 0; 3053 } 3054 3055 static int qeth_query_setdiagass(struct qeth_card *card) 3056 { 3057 struct qeth_cmd_buffer *iob; 3058 struct qeth_ipa_cmd *cmd; 3059 3060 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3061 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3062 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3063 cmd->data.diagass.subcmd_len = 16; 3064 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3065 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3066 } 3067 3068 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3069 { 3070 unsigned long info = get_zeroed_page(GFP_KERNEL); 3071 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3072 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3073 struct ccw_dev_id ccwid; 3074 int level; 3075 3076 tid->chpid = card->info.chpid; 3077 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3078 tid->ssid = ccwid.ssid; 3079 tid->devno = ccwid.devno; 3080 if (!info) 3081 return; 3082 level = stsi(NULL, 0, 0, 0); 3083 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3084 tid->lparnr = info222->lpar_number; 3085 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3086 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3087 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3088 } 3089 free_page(info); 3090 return; 3091 } 3092 3093 static int qeth_hw_trap_cb(struct qeth_card *card, 3094 struct qeth_reply *reply, unsigned long data) 3095 { 3096 struct qeth_ipa_cmd *cmd; 3097 __u16 rc; 3098 3099 cmd = (struct qeth_ipa_cmd *)data; 3100 rc = cmd->hdr.return_code; 3101 if (rc) 3102 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3103 return 0; 3104 } 3105 3106 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3107 { 3108 struct qeth_cmd_buffer *iob; 3109 struct qeth_ipa_cmd *cmd; 3110 3111 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3112 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3113 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3114 cmd->data.diagass.subcmd_len = 80; 3115 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3116 cmd->data.diagass.type = 1; 3117 cmd->data.diagass.action = action; 3118 switch (action) { 3119 case QETH_DIAGS_TRAP_ARM: 3120 cmd->data.diagass.options = 0x0003; 3121 cmd->data.diagass.ext = 0x00010000 + 3122 sizeof(struct qeth_trap_id); 3123 qeth_get_trap_id(card, 3124 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3125 break; 3126 case QETH_DIAGS_TRAP_DISARM: 3127 cmd->data.diagass.options = 0x0001; 3128 break; 3129 case QETH_DIAGS_TRAP_CAPTURE: 3130 break; 3131 } 3132 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3133 } 3134 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3135 3136 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3137 unsigned int qdio_error, const char *dbftext) 3138 { 3139 if (qdio_error) { 3140 QETH_CARD_TEXT(card, 2, dbftext); 3141 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3142 buf->element[15].sflags); 3143 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3144 buf->element[14].sflags); 3145 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3146 if ((buf->element[15].sflags) == 0x12) { 3147 card->stats.rx_dropped++; 3148 return 0; 3149 } else 3150 return 1; 3151 } 3152 return 0; 3153 } 3154 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3155 3156 void qeth_buffer_reclaim_work(struct work_struct *work) 3157 { 3158 struct qeth_card *card = container_of(work, struct qeth_card, 3159 buffer_reclaim_work.work); 3160 3161 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3162 qeth_queue_input_buffer(card, card->reclaim_index); 3163 } 3164 3165 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3166 { 3167 struct qeth_qdio_q *queue = card->qdio.in_q; 3168 struct list_head *lh; 3169 int count; 3170 int i; 3171 int rc; 3172 int newcount = 0; 3173 3174 count = (index < queue->next_buf_to_init)? 3175 card->qdio.in_buf_pool.buf_count - 3176 (queue->next_buf_to_init - index) : 3177 card->qdio.in_buf_pool.buf_count - 3178 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3179 /* only requeue at a certain threshold to avoid SIGAs */ 3180 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3181 for (i = queue->next_buf_to_init; 3182 i < queue->next_buf_to_init + count; ++i) { 3183 if (qeth_init_input_buffer(card, 3184 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3185 break; 3186 } else { 3187 newcount++; 3188 } 3189 } 3190 3191 if (newcount < count) { 3192 /* we are in memory shortage so we switch back to 3193 traditional skb allocation and drop packages */ 3194 atomic_set(&card->force_alloc_skb, 3); 3195 count = newcount; 3196 } else { 3197 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3198 } 3199 3200 if (!count) { 3201 i = 0; 3202 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3203 i++; 3204 if (i == card->qdio.in_buf_pool.buf_count) { 3205 QETH_CARD_TEXT(card, 2, "qsarbw"); 3206 card->reclaim_index = index; 3207 schedule_delayed_work( 3208 &card->buffer_reclaim_work, 3209 QETH_RECLAIM_WORK_TIME); 3210 } 3211 return; 3212 } 3213 3214 /* 3215 * according to old code it should be avoided to requeue all 3216 * 128 buffers in order to benefit from PCI avoidance. 3217 * this function keeps at least one buffer (the buffer at 3218 * 'index') un-requeued -> this buffer is the first buffer that 3219 * will be requeued the next time 3220 */ 3221 if (card->options.performance_stats) { 3222 card->perf_stats.inbound_do_qdio_cnt++; 3223 card->perf_stats.inbound_do_qdio_start_time = 3224 qeth_get_micros(); 3225 } 3226 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3227 queue->next_buf_to_init, count); 3228 if (card->options.performance_stats) 3229 card->perf_stats.inbound_do_qdio_time += 3230 qeth_get_micros() - 3231 card->perf_stats.inbound_do_qdio_start_time; 3232 if (rc) { 3233 QETH_CARD_TEXT(card, 2, "qinberr"); 3234 } 3235 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3236 QDIO_MAX_BUFFERS_PER_Q; 3237 } 3238 } 3239 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3240 3241 static int qeth_handle_send_error(struct qeth_card *card, 3242 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3243 { 3244 int sbalf15 = buffer->buffer->element[15].sflags; 3245 3246 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3247 if (card->info.type == QETH_CARD_TYPE_IQD) { 3248 if (sbalf15 == 0) { 3249 qdio_err = 0; 3250 } else { 3251 qdio_err = 1; 3252 } 3253 } 3254 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3255 3256 if (!qdio_err) 3257 return QETH_SEND_ERROR_NONE; 3258 3259 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3260 return QETH_SEND_ERROR_RETRY; 3261 3262 QETH_CARD_TEXT(card, 1, "lnkfail"); 3263 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3264 (u16)qdio_err, (u8)sbalf15); 3265 return QETH_SEND_ERROR_LINK_FAILURE; 3266 } 3267 3268 /* 3269 * Switched to packing state if the number of used buffers on a queue 3270 * reaches a certain limit. 3271 */ 3272 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3273 { 3274 if (!queue->do_pack) { 3275 if (atomic_read(&queue->used_buffers) 3276 >= QETH_HIGH_WATERMARK_PACK){ 3277 /* switch non-PACKING -> PACKING */ 3278 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3279 if (queue->card->options.performance_stats) 3280 queue->card->perf_stats.sc_dp_p++; 3281 queue->do_pack = 1; 3282 } 3283 } 3284 } 3285 3286 /* 3287 * Switches from packing to non-packing mode. If there is a packing 3288 * buffer on the queue this buffer will be prepared to be flushed. 3289 * In that case 1 is returned to inform the caller. If no buffer 3290 * has to be flushed, zero is returned. 3291 */ 3292 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3293 { 3294 struct qeth_qdio_out_buffer *buffer; 3295 int flush_count = 0; 3296 3297 if (queue->do_pack) { 3298 if (atomic_read(&queue->used_buffers) 3299 <= QETH_LOW_WATERMARK_PACK) { 3300 /* switch PACKING -> non-PACKING */ 3301 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3302 if (queue->card->options.performance_stats) 3303 queue->card->perf_stats.sc_p_dp++; 3304 queue->do_pack = 0; 3305 /* flush packing buffers */ 3306 buffer = queue->bufs[queue->next_buf_to_fill]; 3307 if ((atomic_read(&buffer->state) == 3308 QETH_QDIO_BUF_EMPTY) && 3309 (buffer->next_element_to_fill > 0)) { 3310 atomic_set(&buffer->state, 3311 QETH_QDIO_BUF_PRIMED); 3312 flush_count++; 3313 queue->next_buf_to_fill = 3314 (queue->next_buf_to_fill + 1) % 3315 QDIO_MAX_BUFFERS_PER_Q; 3316 } 3317 } 3318 } 3319 return flush_count; 3320 } 3321 3322 3323 /* 3324 * Called to flush a packing buffer if no more pci flags are on the queue. 3325 * Checks if there is a packing buffer and prepares it to be flushed. 3326 * In that case returns 1, otherwise zero. 3327 */ 3328 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3329 { 3330 struct qeth_qdio_out_buffer *buffer; 3331 3332 buffer = queue->bufs[queue->next_buf_to_fill]; 3333 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3334 (buffer->next_element_to_fill > 0)) { 3335 /* it's a packing buffer */ 3336 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3337 queue->next_buf_to_fill = 3338 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3339 return 1; 3340 } 3341 return 0; 3342 } 3343 3344 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3345 int count) 3346 { 3347 struct qeth_qdio_out_buffer *buf; 3348 int rc; 3349 int i; 3350 unsigned int qdio_flags; 3351 3352 for (i = index; i < index + count; ++i) { 3353 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3354 buf = queue->bufs[bidx]; 3355 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3356 SBAL_EFLAGS_LAST_ENTRY; 3357 3358 if (queue->bufstates) 3359 queue->bufstates[bidx].user = buf; 3360 3361 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3362 continue; 3363 3364 if (!queue->do_pack) { 3365 if ((atomic_read(&queue->used_buffers) >= 3366 (QETH_HIGH_WATERMARK_PACK - 3367 QETH_WATERMARK_PACK_FUZZ)) && 3368 !atomic_read(&queue->set_pci_flags_count)) { 3369 /* it's likely that we'll go to packing 3370 * mode soon */ 3371 atomic_inc(&queue->set_pci_flags_count); 3372 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3373 } 3374 } else { 3375 if (!atomic_read(&queue->set_pci_flags_count)) { 3376 /* 3377 * there's no outstanding PCI any more, so we 3378 * have to request a PCI to be sure the the PCI 3379 * will wake at some time in the future then we 3380 * can flush packed buffers that might still be 3381 * hanging around, which can happen if no 3382 * further send was requested by the stack 3383 */ 3384 atomic_inc(&queue->set_pci_flags_count); 3385 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3386 } 3387 } 3388 } 3389 3390 queue->card->dev->trans_start = jiffies; 3391 if (queue->card->options.performance_stats) { 3392 queue->card->perf_stats.outbound_do_qdio_cnt++; 3393 queue->card->perf_stats.outbound_do_qdio_start_time = 3394 qeth_get_micros(); 3395 } 3396 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3397 if (atomic_read(&queue->set_pci_flags_count)) 3398 qdio_flags |= QDIO_FLAG_PCI_OUT; 3399 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3400 queue->queue_no, index, count); 3401 if (queue->card->options.performance_stats) 3402 queue->card->perf_stats.outbound_do_qdio_time += 3403 qeth_get_micros() - 3404 queue->card->perf_stats.outbound_do_qdio_start_time; 3405 atomic_add(count, &queue->used_buffers); 3406 if (rc) { 3407 queue->card->stats.tx_errors += count; 3408 /* ignore temporary SIGA errors without busy condition */ 3409 if (rc == -ENOBUFS) 3410 return; 3411 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3412 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3413 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3414 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3415 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3416 3417 /* this must not happen under normal circumstances. if it 3418 * happens something is really wrong -> recover */ 3419 qeth_schedule_recovery(queue->card); 3420 return; 3421 } 3422 if (queue->card->options.performance_stats) 3423 queue->card->perf_stats.bufs_sent += count; 3424 } 3425 3426 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3427 { 3428 int index; 3429 int flush_cnt = 0; 3430 int q_was_packing = 0; 3431 3432 /* 3433 * check if weed have to switch to non-packing mode or if 3434 * we have to get a pci flag out on the queue 3435 */ 3436 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3437 !atomic_read(&queue->set_pci_flags_count)) { 3438 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3439 QETH_OUT_Q_UNLOCKED) { 3440 /* 3441 * If we get in here, there was no action in 3442 * do_send_packet. So, we check if there is a 3443 * packing buffer to be flushed here. 3444 */ 3445 netif_stop_queue(queue->card->dev); 3446 index = queue->next_buf_to_fill; 3447 q_was_packing = queue->do_pack; 3448 /* queue->do_pack may change */ 3449 barrier(); 3450 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3451 if (!flush_cnt && 3452 !atomic_read(&queue->set_pci_flags_count)) 3453 flush_cnt += 3454 qeth_flush_buffers_on_no_pci(queue); 3455 if (queue->card->options.performance_stats && 3456 q_was_packing) 3457 queue->card->perf_stats.bufs_sent_pack += 3458 flush_cnt; 3459 if (flush_cnt) 3460 qeth_flush_buffers(queue, index, flush_cnt); 3461 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3462 } 3463 } 3464 } 3465 3466 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3467 unsigned long card_ptr) 3468 { 3469 struct qeth_card *card = (struct qeth_card *)card_ptr; 3470 3471 if (card->dev && (card->dev->flags & IFF_UP)) 3472 napi_schedule(&card->napi); 3473 } 3474 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3475 3476 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3477 { 3478 int rc; 3479 3480 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3481 rc = -1; 3482 goto out; 3483 } else { 3484 if (card->options.cq == cq) { 3485 rc = 0; 3486 goto out; 3487 } 3488 3489 if (card->state != CARD_STATE_DOWN && 3490 card->state != CARD_STATE_RECOVER) { 3491 rc = -1; 3492 goto out; 3493 } 3494 3495 qeth_free_qdio_buffers(card); 3496 card->options.cq = cq; 3497 rc = 0; 3498 } 3499 out: 3500 return rc; 3501 3502 } 3503 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3504 3505 3506 static void qeth_qdio_cq_handler(struct qeth_card *card, 3507 unsigned int qdio_err, 3508 unsigned int queue, int first_element, int count) { 3509 struct qeth_qdio_q *cq = card->qdio.c_q; 3510 int i; 3511 int rc; 3512 3513 if (!qeth_is_cq(card, queue)) 3514 goto out; 3515 3516 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3517 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3518 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3519 3520 if (qdio_err) { 3521 netif_stop_queue(card->dev); 3522 qeth_schedule_recovery(card); 3523 goto out; 3524 } 3525 3526 if (card->options.performance_stats) { 3527 card->perf_stats.cq_cnt++; 3528 card->perf_stats.cq_start_time = qeth_get_micros(); 3529 } 3530 3531 for (i = first_element; i < first_element + count; ++i) { 3532 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3533 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3534 int e; 3535 3536 e = 0; 3537 while (buffer->element[e].addr) { 3538 unsigned long phys_aob_addr; 3539 3540 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3541 qeth_qdio_handle_aob(card, phys_aob_addr); 3542 buffer->element[e].addr = NULL; 3543 buffer->element[e].eflags = 0; 3544 buffer->element[e].sflags = 0; 3545 buffer->element[e].length = 0; 3546 3547 ++e; 3548 } 3549 3550 buffer->element[15].eflags = 0; 3551 buffer->element[15].sflags = 0; 3552 } 3553 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3554 card->qdio.c_q->next_buf_to_init, 3555 count); 3556 if (rc) { 3557 dev_warn(&card->gdev->dev, 3558 "QDIO reported an error, rc=%i\n", rc); 3559 QETH_CARD_TEXT(card, 2, "qcqherr"); 3560 } 3561 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3562 + count) % QDIO_MAX_BUFFERS_PER_Q; 3563 3564 netif_wake_queue(card->dev); 3565 3566 if (card->options.performance_stats) { 3567 int delta_t = qeth_get_micros(); 3568 delta_t -= card->perf_stats.cq_start_time; 3569 card->perf_stats.cq_time += delta_t; 3570 } 3571 out: 3572 return; 3573 } 3574 3575 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3576 unsigned int queue, int first_elem, int count, 3577 unsigned long card_ptr) 3578 { 3579 struct qeth_card *card = (struct qeth_card *)card_ptr; 3580 3581 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3582 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3583 3584 if (qeth_is_cq(card, queue)) 3585 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3586 else if (qdio_err) 3587 qeth_schedule_recovery(card); 3588 3589 3590 } 3591 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3592 3593 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3594 unsigned int qdio_error, int __queue, int first_element, 3595 int count, unsigned long card_ptr) 3596 { 3597 struct qeth_card *card = (struct qeth_card *) card_ptr; 3598 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3599 struct qeth_qdio_out_buffer *buffer; 3600 int i; 3601 3602 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3603 if (qdio_error & QDIO_ERROR_FATAL) { 3604 QETH_CARD_TEXT(card, 2, "achkcond"); 3605 netif_stop_queue(card->dev); 3606 qeth_schedule_recovery(card); 3607 return; 3608 } 3609 if (card->options.performance_stats) { 3610 card->perf_stats.outbound_handler_cnt++; 3611 card->perf_stats.outbound_handler_start_time = 3612 qeth_get_micros(); 3613 } 3614 for (i = first_element; i < (first_element + count); ++i) { 3615 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3616 buffer = queue->bufs[bidx]; 3617 qeth_handle_send_error(card, buffer, qdio_error); 3618 3619 if (queue->bufstates && 3620 (queue->bufstates[bidx].flags & 3621 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3622 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3623 3624 if (atomic_cmpxchg(&buffer->state, 3625 QETH_QDIO_BUF_PRIMED, 3626 QETH_QDIO_BUF_PENDING) == 3627 QETH_QDIO_BUF_PRIMED) { 3628 qeth_notify_skbs(queue, buffer, 3629 TX_NOTIFY_PENDING); 3630 } 3631 buffer->aob = queue->bufstates[bidx].aob; 3632 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3633 QETH_CARD_TEXT(queue->card, 5, "aob"); 3634 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3635 virt_to_phys(buffer->aob)); 3636 if (qeth_init_qdio_out_buf(queue, bidx)) { 3637 QETH_CARD_TEXT(card, 2, "outofbuf"); 3638 qeth_schedule_recovery(card); 3639 } 3640 } else { 3641 if (card->options.cq == QETH_CQ_ENABLED) { 3642 enum iucv_tx_notify n; 3643 3644 n = qeth_compute_cq_notification( 3645 buffer->buffer->element[15].sflags, 0); 3646 qeth_notify_skbs(queue, buffer, n); 3647 } 3648 3649 qeth_clear_output_buffer(queue, buffer, 3650 QETH_QDIO_BUF_EMPTY); 3651 } 3652 qeth_cleanup_handled_pending(queue, bidx, 0); 3653 } 3654 atomic_sub(count, &queue->used_buffers); 3655 /* check if we need to do something on this outbound queue */ 3656 if (card->info.type != QETH_CARD_TYPE_IQD) 3657 qeth_check_outbound_queue(queue); 3658 3659 netif_wake_queue(queue->card->dev); 3660 if (card->options.performance_stats) 3661 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3662 card->perf_stats.outbound_handler_start_time; 3663 } 3664 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3665 3666 /** 3667 * Note: Function assumes that we have 4 outbound queues. 3668 */ 3669 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3670 int ipv, int cast_type) 3671 { 3672 __be16 *tci; 3673 u8 tos; 3674 3675 if (cast_type && card->info.is_multicast_different) 3676 return card->info.is_multicast_different & 3677 (card->qdio.no_out_queues - 1); 3678 3679 switch (card->qdio.do_prio_queueing) { 3680 case QETH_PRIO_Q_ING_TOS: 3681 case QETH_PRIO_Q_ING_PREC: 3682 switch (ipv) { 3683 case 4: 3684 tos = ipv4_get_dsfield(ip_hdr(skb)); 3685 break; 3686 case 6: 3687 tos = ipv6_get_dsfield(ipv6_hdr(skb)); 3688 break; 3689 default: 3690 return card->qdio.default_out_queue; 3691 } 3692 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC) 3693 return ~tos >> 6 & 3; 3694 if (tos & IPTOS_MINCOST) 3695 return 3; 3696 if (tos & IPTOS_RELIABILITY) 3697 return 2; 3698 if (tos & IPTOS_THROUGHPUT) 3699 return 1; 3700 if (tos & IPTOS_LOWDELAY) 3701 return 0; 3702 break; 3703 case QETH_PRIO_Q_ING_SKB: 3704 if (skb->priority > 5) 3705 return 0; 3706 return ~skb->priority >> 1 & 3; 3707 case QETH_PRIO_Q_ING_VLAN: 3708 tci = &((struct ethhdr *)skb->data)->h_proto; 3709 if (*tci == ETH_P_8021Q) 3710 return ~*(tci + 1) >> (VLAN_PRIO_SHIFT + 1) & 3; 3711 break; 3712 default: 3713 break; 3714 } 3715 return card->qdio.default_out_queue; 3716 } 3717 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3718 3719 int qeth_get_elements_for_frags(struct sk_buff *skb) 3720 { 3721 int cnt, length, e, elements = 0; 3722 struct skb_frag_struct *frag; 3723 char *data; 3724 3725 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3726 frag = &skb_shinfo(skb)->frags[cnt]; 3727 data = (char *)page_to_phys(skb_frag_page(frag)) + 3728 frag->page_offset; 3729 length = frag->size; 3730 e = PFN_UP((unsigned long)data + length - 1) - 3731 PFN_DOWN((unsigned long)data); 3732 elements += e; 3733 } 3734 return elements; 3735 } 3736 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3737 3738 int qeth_get_elements_no(struct qeth_card *card, 3739 struct sk_buff *skb, int elems) 3740 { 3741 int dlen = skb->len - skb->data_len; 3742 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3743 PFN_DOWN((unsigned long)skb->data); 3744 3745 elements_needed += qeth_get_elements_for_frags(skb); 3746 3747 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3748 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3749 "(Number=%d / Length=%d). Discarded.\n", 3750 (elements_needed+elems), skb->len); 3751 return 0; 3752 } 3753 return elements_needed; 3754 } 3755 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3756 3757 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3758 { 3759 int hroom, inpage, rest; 3760 3761 if (((unsigned long)skb->data & PAGE_MASK) != 3762 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3763 hroom = skb_headroom(skb); 3764 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3765 rest = len - inpage; 3766 if (rest > hroom) 3767 return 1; 3768 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3769 skb->data -= rest; 3770 skb->tail -= rest; 3771 *hdr = (struct qeth_hdr *)skb->data; 3772 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3773 } 3774 return 0; 3775 } 3776 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3777 3778 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3779 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3780 int offset) 3781 { 3782 int length = skb->len - skb->data_len; 3783 int length_here; 3784 int element; 3785 char *data; 3786 int first_lap, cnt; 3787 struct skb_frag_struct *frag; 3788 3789 element = *next_element_to_fill; 3790 data = skb->data; 3791 first_lap = (is_tso == 0 ? 1 : 0); 3792 3793 if (offset >= 0) { 3794 data = skb->data + offset; 3795 length -= offset; 3796 first_lap = 0; 3797 } 3798 3799 while (length > 0) { 3800 /* length_here is the remaining amount of data in this page */ 3801 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3802 if (length < length_here) 3803 length_here = length; 3804 3805 buffer->element[element].addr = data; 3806 buffer->element[element].length = length_here; 3807 length -= length_here; 3808 if (!length) { 3809 if (first_lap) 3810 if (skb_shinfo(skb)->nr_frags) 3811 buffer->element[element].eflags = 3812 SBAL_EFLAGS_FIRST_FRAG; 3813 else 3814 buffer->element[element].eflags = 0; 3815 else 3816 buffer->element[element].eflags = 3817 SBAL_EFLAGS_MIDDLE_FRAG; 3818 } else { 3819 if (first_lap) 3820 buffer->element[element].eflags = 3821 SBAL_EFLAGS_FIRST_FRAG; 3822 else 3823 buffer->element[element].eflags = 3824 SBAL_EFLAGS_MIDDLE_FRAG; 3825 } 3826 data += length_here; 3827 element++; 3828 first_lap = 0; 3829 } 3830 3831 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3832 frag = &skb_shinfo(skb)->frags[cnt]; 3833 data = (char *)page_to_phys(skb_frag_page(frag)) + 3834 frag->page_offset; 3835 length = frag->size; 3836 while (length > 0) { 3837 length_here = PAGE_SIZE - 3838 ((unsigned long) data % PAGE_SIZE); 3839 if (length < length_here) 3840 length_here = length; 3841 3842 buffer->element[element].addr = data; 3843 buffer->element[element].length = length_here; 3844 buffer->element[element].eflags = 3845 SBAL_EFLAGS_MIDDLE_FRAG; 3846 length -= length_here; 3847 data += length_here; 3848 element++; 3849 } 3850 } 3851 3852 if (buffer->element[element - 1].eflags) 3853 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3854 *next_element_to_fill = element; 3855 } 3856 3857 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3858 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3859 struct qeth_hdr *hdr, int offset, int hd_len) 3860 { 3861 struct qdio_buffer *buffer; 3862 int flush_cnt = 0, hdr_len, large_send = 0; 3863 3864 buffer = buf->buffer; 3865 atomic_inc(&skb->users); 3866 skb_queue_tail(&buf->skb_list, skb); 3867 3868 /*check first on TSO ....*/ 3869 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3870 int element = buf->next_element_to_fill; 3871 3872 hdr_len = sizeof(struct qeth_hdr_tso) + 3873 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3874 /*fill first buffer entry only with header information */ 3875 buffer->element[element].addr = skb->data; 3876 buffer->element[element].length = hdr_len; 3877 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3878 buf->next_element_to_fill++; 3879 skb->data += hdr_len; 3880 skb->len -= hdr_len; 3881 large_send = 1; 3882 } 3883 3884 if (offset >= 0) { 3885 int element = buf->next_element_to_fill; 3886 buffer->element[element].addr = hdr; 3887 buffer->element[element].length = sizeof(struct qeth_hdr) + 3888 hd_len; 3889 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3890 buf->is_header[element] = 1; 3891 buf->next_element_to_fill++; 3892 } 3893 3894 __qeth_fill_buffer(skb, buffer, large_send, 3895 (int *)&buf->next_element_to_fill, offset); 3896 3897 if (!queue->do_pack) { 3898 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3899 /* set state to PRIMED -> will be flushed */ 3900 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3901 flush_cnt = 1; 3902 } else { 3903 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3904 if (queue->card->options.performance_stats) 3905 queue->card->perf_stats.skbs_sent_pack++; 3906 if (buf->next_element_to_fill >= 3907 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3908 /* 3909 * packed buffer if full -> set state PRIMED 3910 * -> will be flushed 3911 */ 3912 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3913 flush_cnt = 1; 3914 } 3915 } 3916 return flush_cnt; 3917 } 3918 3919 int qeth_do_send_packet_fast(struct qeth_card *card, 3920 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3921 struct qeth_hdr *hdr, int elements_needed, 3922 int offset, int hd_len) 3923 { 3924 struct qeth_qdio_out_buffer *buffer; 3925 int index; 3926 3927 /* spin until we get the queue ... */ 3928 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3929 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3930 /* ... now we've got the queue */ 3931 index = queue->next_buf_to_fill; 3932 buffer = queue->bufs[queue->next_buf_to_fill]; 3933 /* 3934 * check if buffer is empty to make sure that we do not 'overtake' 3935 * ourselves and try to fill a buffer that is already primed 3936 */ 3937 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3938 goto out; 3939 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3940 QDIO_MAX_BUFFERS_PER_Q; 3941 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3942 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3943 qeth_flush_buffers(queue, index, 1); 3944 return 0; 3945 out: 3946 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3947 return -EBUSY; 3948 } 3949 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3950 3951 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3952 struct sk_buff *skb, struct qeth_hdr *hdr, 3953 int elements_needed) 3954 { 3955 struct qeth_qdio_out_buffer *buffer; 3956 int start_index; 3957 int flush_count = 0; 3958 int do_pack = 0; 3959 int tmp; 3960 int rc = 0; 3961 3962 /* spin until we get the queue ... */ 3963 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3964 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3965 start_index = queue->next_buf_to_fill; 3966 buffer = queue->bufs[queue->next_buf_to_fill]; 3967 /* 3968 * check if buffer is empty to make sure that we do not 'overtake' 3969 * ourselves and try to fill a buffer that is already primed 3970 */ 3971 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3972 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3973 return -EBUSY; 3974 } 3975 /* check if we need to switch packing state of this queue */ 3976 qeth_switch_to_packing_if_needed(queue); 3977 if (queue->do_pack) { 3978 do_pack = 1; 3979 /* does packet fit in current buffer? */ 3980 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3981 buffer->next_element_to_fill) < elements_needed) { 3982 /* ... no -> set state PRIMED */ 3983 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3984 flush_count++; 3985 queue->next_buf_to_fill = 3986 (queue->next_buf_to_fill + 1) % 3987 QDIO_MAX_BUFFERS_PER_Q; 3988 buffer = queue->bufs[queue->next_buf_to_fill]; 3989 /* we did a step forward, so check buffer state 3990 * again */ 3991 if (atomic_read(&buffer->state) != 3992 QETH_QDIO_BUF_EMPTY) { 3993 qeth_flush_buffers(queue, start_index, 3994 flush_count); 3995 atomic_set(&queue->state, 3996 QETH_OUT_Q_UNLOCKED); 3997 return -EBUSY; 3998 } 3999 } 4000 } 4001 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 4002 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 4003 QDIO_MAX_BUFFERS_PER_Q; 4004 flush_count += tmp; 4005 if (flush_count) 4006 qeth_flush_buffers(queue, start_index, flush_count); 4007 else if (!atomic_read(&queue->set_pci_flags_count)) 4008 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4009 /* 4010 * queue->state will go from LOCKED -> UNLOCKED or from 4011 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4012 * (switch packing state or flush buffer to get another pci flag out). 4013 * In that case we will enter this loop 4014 */ 4015 while (atomic_dec_return(&queue->state)) { 4016 flush_count = 0; 4017 start_index = queue->next_buf_to_fill; 4018 /* check if we can go back to non-packing state */ 4019 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4020 /* 4021 * check if we need to flush a packing buffer to get a pci 4022 * flag out on the queue 4023 */ 4024 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4025 flush_count += qeth_flush_buffers_on_no_pci(queue); 4026 if (flush_count) 4027 qeth_flush_buffers(queue, start_index, flush_count); 4028 } 4029 /* at this point the queue is UNLOCKED again */ 4030 if (queue->card->options.performance_stats && do_pack) 4031 queue->card->perf_stats.bufs_sent_pack += flush_count; 4032 4033 return rc; 4034 } 4035 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4036 4037 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4038 struct qeth_reply *reply, unsigned long data) 4039 { 4040 struct qeth_ipa_cmd *cmd; 4041 struct qeth_ipacmd_setadpparms *setparms; 4042 4043 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4044 4045 cmd = (struct qeth_ipa_cmd *) data; 4046 setparms = &(cmd->data.setadapterparms); 4047 4048 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4049 if (cmd->hdr.return_code) { 4050 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 4051 setparms->data.mode = SET_PROMISC_MODE_OFF; 4052 } 4053 card->info.promisc_mode = setparms->data.mode; 4054 return 0; 4055 } 4056 4057 void qeth_setadp_promisc_mode(struct qeth_card *card) 4058 { 4059 enum qeth_ipa_promisc_modes mode; 4060 struct net_device *dev = card->dev; 4061 struct qeth_cmd_buffer *iob; 4062 struct qeth_ipa_cmd *cmd; 4063 4064 QETH_CARD_TEXT(card, 4, "setprom"); 4065 4066 if (((dev->flags & IFF_PROMISC) && 4067 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4068 (!(dev->flags & IFF_PROMISC) && 4069 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4070 return; 4071 mode = SET_PROMISC_MODE_OFF; 4072 if (dev->flags & IFF_PROMISC) 4073 mode = SET_PROMISC_MODE_ON; 4074 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4075 4076 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4077 sizeof(struct qeth_ipacmd_setadpparms)); 4078 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4079 cmd->data.setadapterparms.data.mode = mode; 4080 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4081 } 4082 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4083 4084 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4085 { 4086 struct qeth_card *card; 4087 char dbf_text[15]; 4088 4089 card = dev->ml_priv; 4090 4091 QETH_CARD_TEXT(card, 4, "chgmtu"); 4092 sprintf(dbf_text, "%8x", new_mtu); 4093 QETH_CARD_TEXT(card, 4, dbf_text); 4094 4095 if (new_mtu < 64) 4096 return -EINVAL; 4097 if (new_mtu > 65535) 4098 return -EINVAL; 4099 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4100 (!qeth_mtu_is_valid(card, new_mtu))) 4101 return -EINVAL; 4102 dev->mtu = new_mtu; 4103 return 0; 4104 } 4105 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4106 4107 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4108 { 4109 struct qeth_card *card; 4110 4111 card = dev->ml_priv; 4112 4113 QETH_CARD_TEXT(card, 5, "getstat"); 4114 4115 return &card->stats; 4116 } 4117 EXPORT_SYMBOL_GPL(qeth_get_stats); 4118 4119 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4120 struct qeth_reply *reply, unsigned long data) 4121 { 4122 struct qeth_ipa_cmd *cmd; 4123 4124 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4125 4126 cmd = (struct qeth_ipa_cmd *) data; 4127 if (!card->options.layer2 || 4128 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4129 memcpy(card->dev->dev_addr, 4130 &cmd->data.setadapterparms.data.change_addr.addr, 4131 OSA_ADDR_LEN); 4132 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4133 } 4134 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4135 return 0; 4136 } 4137 4138 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4139 { 4140 int rc; 4141 struct qeth_cmd_buffer *iob; 4142 struct qeth_ipa_cmd *cmd; 4143 4144 QETH_CARD_TEXT(card, 4, "chgmac"); 4145 4146 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4147 sizeof(struct qeth_ipacmd_setadpparms)); 4148 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4149 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4150 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4151 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4152 card->dev->dev_addr, OSA_ADDR_LEN); 4153 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4154 NULL); 4155 return rc; 4156 } 4157 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4158 4159 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4160 struct qeth_reply *reply, unsigned long data) 4161 { 4162 struct qeth_ipa_cmd *cmd; 4163 struct qeth_set_access_ctrl *access_ctrl_req; 4164 int fallback = *(int *)reply->param; 4165 4166 QETH_CARD_TEXT(card, 4, "setaccb"); 4167 4168 cmd = (struct qeth_ipa_cmd *) data; 4169 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4170 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4171 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4172 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4173 cmd->data.setadapterparms.hdr.return_code); 4174 if (cmd->data.setadapterparms.hdr.return_code != 4175 SET_ACCESS_CTRL_RC_SUCCESS) 4176 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4177 card->gdev->dev.kobj.name, 4178 access_ctrl_req->subcmd_code, 4179 cmd->data.setadapterparms.hdr.return_code); 4180 switch (cmd->data.setadapterparms.hdr.return_code) { 4181 case SET_ACCESS_CTRL_RC_SUCCESS: 4182 if (card->options.isolation == ISOLATION_MODE_NONE) { 4183 dev_info(&card->gdev->dev, 4184 "QDIO data connection isolation is deactivated\n"); 4185 } else { 4186 dev_info(&card->gdev->dev, 4187 "QDIO data connection isolation is activated\n"); 4188 } 4189 break; 4190 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4191 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4192 "deactivated\n", dev_name(&card->gdev->dev)); 4193 if (fallback) 4194 card->options.isolation = card->options.prev_isolation; 4195 break; 4196 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4197 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4198 " activated\n", dev_name(&card->gdev->dev)); 4199 if (fallback) 4200 card->options.isolation = card->options.prev_isolation; 4201 break; 4202 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4203 dev_err(&card->gdev->dev, "Adapter does not " 4204 "support QDIO data connection isolation\n"); 4205 break; 4206 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4207 dev_err(&card->gdev->dev, 4208 "Adapter is dedicated. " 4209 "QDIO data connection isolation not supported\n"); 4210 if (fallback) 4211 card->options.isolation = card->options.prev_isolation; 4212 break; 4213 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4214 dev_err(&card->gdev->dev, 4215 "TSO does not permit QDIO data connection isolation\n"); 4216 if (fallback) 4217 card->options.isolation = card->options.prev_isolation; 4218 break; 4219 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4220 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4221 "support reflective relay mode\n"); 4222 if (fallback) 4223 card->options.isolation = card->options.prev_isolation; 4224 break; 4225 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4226 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4227 "enabled at the adjacent switch port"); 4228 if (fallback) 4229 card->options.isolation = card->options.prev_isolation; 4230 break; 4231 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4232 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4233 "at the adjacent switch failed\n"); 4234 break; 4235 default: 4236 /* this should never happen */ 4237 if (fallback) 4238 card->options.isolation = card->options.prev_isolation; 4239 break; 4240 } 4241 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4242 return 0; 4243 } 4244 4245 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4246 enum qeth_ipa_isolation_modes isolation, int fallback) 4247 { 4248 int rc; 4249 struct qeth_cmd_buffer *iob; 4250 struct qeth_ipa_cmd *cmd; 4251 struct qeth_set_access_ctrl *access_ctrl_req; 4252 4253 QETH_CARD_TEXT(card, 4, "setacctl"); 4254 4255 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4256 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4257 4258 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4259 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4260 sizeof(struct qeth_set_access_ctrl)); 4261 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4262 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4263 access_ctrl_req->subcmd_code = isolation; 4264 4265 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4266 &fallback); 4267 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4268 return rc; 4269 } 4270 4271 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4272 { 4273 int rc = 0; 4274 4275 QETH_CARD_TEXT(card, 4, "setactlo"); 4276 4277 if ((card->info.type == QETH_CARD_TYPE_OSD || 4278 card->info.type == QETH_CARD_TYPE_OSX) && 4279 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4280 rc = qeth_setadpparms_set_access_ctrl(card, 4281 card->options.isolation, fallback); 4282 if (rc) { 4283 QETH_DBF_MESSAGE(3, 4284 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4285 card->gdev->dev.kobj.name, 4286 rc); 4287 rc = -EOPNOTSUPP; 4288 } 4289 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4290 card->options.isolation = ISOLATION_MODE_NONE; 4291 4292 dev_err(&card->gdev->dev, "Adapter does not " 4293 "support QDIO data connection isolation\n"); 4294 rc = -EOPNOTSUPP; 4295 } 4296 return rc; 4297 } 4298 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4299 4300 void qeth_tx_timeout(struct net_device *dev) 4301 { 4302 struct qeth_card *card; 4303 4304 card = dev->ml_priv; 4305 QETH_CARD_TEXT(card, 4, "txtimeo"); 4306 card->stats.tx_errors++; 4307 qeth_schedule_recovery(card); 4308 } 4309 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4310 4311 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4312 { 4313 struct qeth_card *card = dev->ml_priv; 4314 int rc = 0; 4315 4316 switch (regnum) { 4317 case MII_BMCR: /* Basic mode control register */ 4318 rc = BMCR_FULLDPLX; 4319 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4320 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4321 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4322 rc |= BMCR_SPEED100; 4323 break; 4324 case MII_BMSR: /* Basic mode status register */ 4325 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4326 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4327 BMSR_100BASE4; 4328 break; 4329 case MII_PHYSID1: /* PHYS ID 1 */ 4330 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4331 dev->dev_addr[2]; 4332 rc = (rc >> 5) & 0xFFFF; 4333 break; 4334 case MII_PHYSID2: /* PHYS ID 2 */ 4335 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4336 break; 4337 case MII_ADVERTISE: /* Advertisement control reg */ 4338 rc = ADVERTISE_ALL; 4339 break; 4340 case MII_LPA: /* Link partner ability reg */ 4341 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4342 LPA_100BASE4 | LPA_LPACK; 4343 break; 4344 case MII_EXPANSION: /* Expansion register */ 4345 break; 4346 case MII_DCOUNTER: /* disconnect counter */ 4347 break; 4348 case MII_FCSCOUNTER: /* false carrier counter */ 4349 break; 4350 case MII_NWAYTEST: /* N-way auto-neg test register */ 4351 break; 4352 case MII_RERRCOUNTER: /* rx error counter */ 4353 rc = card->stats.rx_errors; 4354 break; 4355 case MII_SREVISION: /* silicon revision */ 4356 break; 4357 case MII_RESV1: /* reserved 1 */ 4358 break; 4359 case MII_LBRERROR: /* loopback, rx, bypass error */ 4360 break; 4361 case MII_PHYADDR: /* physical address */ 4362 break; 4363 case MII_RESV2: /* reserved 2 */ 4364 break; 4365 case MII_TPISTATUS: /* TPI status for 10mbps */ 4366 break; 4367 case MII_NCONFIG: /* network interface config */ 4368 break; 4369 default: 4370 break; 4371 } 4372 return rc; 4373 } 4374 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4375 4376 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4377 struct qeth_cmd_buffer *iob, int len, 4378 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4379 unsigned long), 4380 void *reply_param) 4381 { 4382 u16 s1, s2; 4383 4384 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4385 4386 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4387 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4388 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4389 /* adjust PDU length fields in IPA_PDU_HEADER */ 4390 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4391 s2 = (u32) len; 4392 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4393 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4394 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4395 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4396 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4397 reply_cb, reply_param); 4398 } 4399 4400 static int qeth_snmp_command_cb(struct qeth_card *card, 4401 struct qeth_reply *reply, unsigned long sdata) 4402 { 4403 struct qeth_ipa_cmd *cmd; 4404 struct qeth_arp_query_info *qinfo; 4405 struct qeth_snmp_cmd *snmp; 4406 unsigned char *data; 4407 __u16 data_len; 4408 4409 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4410 4411 cmd = (struct qeth_ipa_cmd *) sdata; 4412 data = (unsigned char *)((char *)cmd - reply->offset); 4413 qinfo = (struct qeth_arp_query_info *) reply->param; 4414 snmp = &cmd->data.setadapterparms.data.snmp; 4415 4416 if (cmd->hdr.return_code) { 4417 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4418 return 0; 4419 } 4420 if (cmd->data.setadapterparms.hdr.return_code) { 4421 cmd->hdr.return_code = 4422 cmd->data.setadapterparms.hdr.return_code; 4423 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4424 return 0; 4425 } 4426 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4427 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4428 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4429 else 4430 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4431 4432 /* check if there is enough room in userspace */ 4433 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4434 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4435 cmd->hdr.return_code = IPA_RC_ENOMEM; 4436 return 0; 4437 } 4438 QETH_CARD_TEXT_(card, 4, "snore%i", 4439 cmd->data.setadapterparms.hdr.used_total); 4440 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4441 cmd->data.setadapterparms.hdr.seq_no); 4442 /*copy entries to user buffer*/ 4443 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4444 memcpy(qinfo->udata + qinfo->udata_offset, 4445 (char *)snmp, 4446 data_len + offsetof(struct qeth_snmp_cmd, data)); 4447 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4448 } else { 4449 memcpy(qinfo->udata + qinfo->udata_offset, 4450 (char *)&snmp->request, data_len); 4451 } 4452 qinfo->udata_offset += data_len; 4453 /* check if all replies received ... */ 4454 QETH_CARD_TEXT_(card, 4, "srtot%i", 4455 cmd->data.setadapterparms.hdr.used_total); 4456 QETH_CARD_TEXT_(card, 4, "srseq%i", 4457 cmd->data.setadapterparms.hdr.seq_no); 4458 if (cmd->data.setadapterparms.hdr.seq_no < 4459 cmd->data.setadapterparms.hdr.used_total) 4460 return 1; 4461 return 0; 4462 } 4463 4464 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4465 { 4466 struct qeth_cmd_buffer *iob; 4467 struct qeth_ipa_cmd *cmd; 4468 struct qeth_snmp_ureq *ureq; 4469 unsigned int req_len; 4470 struct qeth_arp_query_info qinfo = {0, }; 4471 int rc = 0; 4472 4473 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4474 4475 if (card->info.guestlan) 4476 return -EOPNOTSUPP; 4477 4478 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4479 (!card->options.layer2)) { 4480 return -EOPNOTSUPP; 4481 } 4482 /* skip 4 bytes (data_len struct member) to get req_len */ 4483 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4484 return -EFAULT; 4485 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4486 sizeof(struct qeth_ipacmd_hdr) - 4487 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4488 return -EINVAL; 4489 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4490 if (IS_ERR(ureq)) { 4491 QETH_CARD_TEXT(card, 2, "snmpnome"); 4492 return PTR_ERR(ureq); 4493 } 4494 qinfo.udata_len = ureq->hdr.data_len; 4495 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4496 if (!qinfo.udata) { 4497 kfree(ureq); 4498 return -ENOMEM; 4499 } 4500 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4501 4502 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4503 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4504 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4505 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4506 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4507 qeth_snmp_command_cb, (void *)&qinfo); 4508 if (rc) 4509 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4510 QETH_CARD_IFNAME(card), rc); 4511 else { 4512 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4513 rc = -EFAULT; 4514 } 4515 4516 kfree(ureq); 4517 kfree(qinfo.udata); 4518 return rc; 4519 } 4520 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4521 4522 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4523 struct qeth_reply *reply, unsigned long data) 4524 { 4525 struct qeth_ipa_cmd *cmd; 4526 struct qeth_qoat_priv *priv; 4527 char *resdata; 4528 int resdatalen; 4529 4530 QETH_CARD_TEXT(card, 3, "qoatcb"); 4531 4532 cmd = (struct qeth_ipa_cmd *)data; 4533 priv = (struct qeth_qoat_priv *)reply->param; 4534 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4535 resdata = (char *)data + 28; 4536 4537 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4538 cmd->hdr.return_code = IPA_RC_FFFF; 4539 return 0; 4540 } 4541 4542 memcpy((priv->buffer + priv->response_len), resdata, 4543 resdatalen); 4544 priv->response_len += resdatalen; 4545 4546 if (cmd->data.setadapterparms.hdr.seq_no < 4547 cmd->data.setadapterparms.hdr.used_total) 4548 return 1; 4549 return 0; 4550 } 4551 4552 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4553 { 4554 int rc = 0; 4555 struct qeth_cmd_buffer *iob; 4556 struct qeth_ipa_cmd *cmd; 4557 struct qeth_query_oat *oat_req; 4558 struct qeth_query_oat_data oat_data; 4559 struct qeth_qoat_priv priv; 4560 void __user *tmp; 4561 4562 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4563 4564 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4565 rc = -EOPNOTSUPP; 4566 goto out; 4567 } 4568 4569 if (copy_from_user(&oat_data, udata, 4570 sizeof(struct qeth_query_oat_data))) { 4571 rc = -EFAULT; 4572 goto out; 4573 } 4574 4575 priv.buffer_len = oat_data.buffer_len; 4576 priv.response_len = 0; 4577 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4578 if (!priv.buffer) { 4579 rc = -ENOMEM; 4580 goto out; 4581 } 4582 4583 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4584 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4585 sizeof(struct qeth_query_oat)); 4586 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4587 oat_req = &cmd->data.setadapterparms.data.query_oat; 4588 oat_req->subcmd_code = oat_data.command; 4589 4590 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4591 &priv); 4592 if (!rc) { 4593 if (is_compat_task()) 4594 tmp = compat_ptr(oat_data.ptr); 4595 else 4596 tmp = (void __user *)(unsigned long)oat_data.ptr; 4597 4598 if (copy_to_user(tmp, priv.buffer, 4599 priv.response_len)) { 4600 rc = -EFAULT; 4601 goto out_free; 4602 } 4603 4604 oat_data.response_len = priv.response_len; 4605 4606 if (copy_to_user(udata, &oat_data, 4607 sizeof(struct qeth_query_oat_data))) 4608 rc = -EFAULT; 4609 } else 4610 if (rc == IPA_RC_FFFF) 4611 rc = -EFAULT; 4612 4613 out_free: 4614 kfree(priv.buffer); 4615 out: 4616 return rc; 4617 } 4618 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4619 4620 static int qeth_query_card_info_cb(struct qeth_card *card, 4621 struct qeth_reply *reply, unsigned long data) 4622 { 4623 struct qeth_ipa_cmd *cmd; 4624 struct qeth_query_card_info *card_info; 4625 struct carrier_info *carrier_info; 4626 4627 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4628 carrier_info = (struct carrier_info *)reply->param; 4629 cmd = (struct qeth_ipa_cmd *)data; 4630 card_info = &cmd->data.setadapterparms.data.card_info; 4631 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4632 carrier_info->card_type = card_info->card_type; 4633 carrier_info->port_mode = card_info->port_mode; 4634 carrier_info->port_speed = card_info->port_speed; 4635 } 4636 4637 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4638 return 0; 4639 } 4640 4641 int qeth_query_card_info(struct qeth_card *card, 4642 struct carrier_info *carrier_info) 4643 { 4644 struct qeth_cmd_buffer *iob; 4645 4646 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4647 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4648 return -EOPNOTSUPP; 4649 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4650 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4651 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4652 (void *)carrier_info); 4653 } 4654 EXPORT_SYMBOL_GPL(qeth_query_card_info); 4655 4656 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4657 { 4658 switch (card->info.type) { 4659 case QETH_CARD_TYPE_IQD: 4660 return 2; 4661 default: 4662 return 0; 4663 } 4664 } 4665 4666 static void qeth_determine_capabilities(struct qeth_card *card) 4667 { 4668 int rc; 4669 int length; 4670 char *prcd; 4671 struct ccw_device *ddev; 4672 int ddev_offline = 0; 4673 4674 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4675 ddev = CARD_DDEV(card); 4676 if (!ddev->online) { 4677 ddev_offline = 1; 4678 rc = ccw_device_set_online(ddev); 4679 if (rc) { 4680 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4681 goto out; 4682 } 4683 } 4684 4685 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4686 if (rc) { 4687 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4688 dev_name(&card->gdev->dev), rc); 4689 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4690 goto out_offline; 4691 } 4692 qeth_configure_unitaddr(card, prcd); 4693 if (ddev_offline) 4694 qeth_configure_blkt_default(card, prcd); 4695 kfree(prcd); 4696 4697 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4698 if (rc) 4699 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4700 4701 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4702 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4703 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4704 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4705 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4706 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4707 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4708 dev_info(&card->gdev->dev, 4709 "Completion Queueing supported\n"); 4710 } else { 4711 card->options.cq = QETH_CQ_NOTAVAILABLE; 4712 } 4713 4714 4715 out_offline: 4716 if (ddev_offline == 1) 4717 ccw_device_set_offline(ddev); 4718 out: 4719 return; 4720 } 4721 4722 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4723 struct qdio_buffer **in_sbal_ptrs, 4724 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4725 int i; 4726 4727 if (card->options.cq == QETH_CQ_ENABLED) { 4728 int offset = QDIO_MAX_BUFFERS_PER_Q * 4729 (card->qdio.no_in_queues - 1); 4730 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4731 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4732 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4733 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4734 } 4735 4736 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4737 } 4738 } 4739 4740 static int qeth_qdio_establish(struct qeth_card *card) 4741 { 4742 struct qdio_initialize init_data; 4743 char *qib_param_field; 4744 struct qdio_buffer **in_sbal_ptrs; 4745 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4746 struct qdio_buffer **out_sbal_ptrs; 4747 int i, j, k; 4748 int rc = 0; 4749 4750 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4751 4752 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4753 GFP_KERNEL); 4754 if (!qib_param_field) { 4755 rc = -ENOMEM; 4756 goto out_free_nothing; 4757 } 4758 4759 qeth_create_qib_param_field(card, qib_param_field); 4760 qeth_create_qib_param_field_blkt(card, qib_param_field); 4761 4762 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4763 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4764 GFP_KERNEL); 4765 if (!in_sbal_ptrs) { 4766 rc = -ENOMEM; 4767 goto out_free_qib_param; 4768 } 4769 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4770 in_sbal_ptrs[i] = (struct qdio_buffer *) 4771 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4772 } 4773 4774 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4775 GFP_KERNEL); 4776 if (!queue_start_poll) { 4777 rc = -ENOMEM; 4778 goto out_free_in_sbals; 4779 } 4780 for (i = 0; i < card->qdio.no_in_queues; ++i) 4781 queue_start_poll[i] = card->discipline->start_poll; 4782 4783 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4784 4785 out_sbal_ptrs = 4786 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4787 sizeof(void *), GFP_KERNEL); 4788 if (!out_sbal_ptrs) { 4789 rc = -ENOMEM; 4790 goto out_free_queue_start_poll; 4791 } 4792 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4793 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4794 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4795 card->qdio.out_qs[i]->bufs[j]->buffer); 4796 } 4797 4798 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4799 init_data.cdev = CARD_DDEV(card); 4800 init_data.q_format = qeth_get_qdio_q_format(card); 4801 init_data.qib_param_field_format = 0; 4802 init_data.qib_param_field = qib_param_field; 4803 init_data.no_input_qs = card->qdio.no_in_queues; 4804 init_data.no_output_qs = card->qdio.no_out_queues; 4805 init_data.input_handler = card->discipline->input_handler; 4806 init_data.output_handler = card->discipline->output_handler; 4807 init_data.queue_start_poll_array = queue_start_poll; 4808 init_data.int_parm = (unsigned long) card; 4809 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4810 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4811 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4812 init_data.scan_threshold = 4813 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4814 4815 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4816 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4817 rc = qdio_allocate(&init_data); 4818 if (rc) { 4819 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4820 goto out; 4821 } 4822 rc = qdio_establish(&init_data); 4823 if (rc) { 4824 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4825 qdio_free(CARD_DDEV(card)); 4826 } 4827 } 4828 4829 switch (card->options.cq) { 4830 case QETH_CQ_ENABLED: 4831 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4832 break; 4833 case QETH_CQ_DISABLED: 4834 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4835 break; 4836 default: 4837 break; 4838 } 4839 out: 4840 kfree(out_sbal_ptrs); 4841 out_free_queue_start_poll: 4842 kfree(queue_start_poll); 4843 out_free_in_sbals: 4844 kfree(in_sbal_ptrs); 4845 out_free_qib_param: 4846 kfree(qib_param_field); 4847 out_free_nothing: 4848 return rc; 4849 } 4850 4851 static void qeth_core_free_card(struct qeth_card *card) 4852 { 4853 4854 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4855 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4856 qeth_clean_channel(&card->read); 4857 qeth_clean_channel(&card->write); 4858 if (card->dev) 4859 free_netdev(card->dev); 4860 kfree(card->ip_tbd_list); 4861 qeth_free_qdio_buffers(card); 4862 unregister_service_level(&card->qeth_service_level); 4863 kfree(card); 4864 } 4865 4866 void qeth_trace_features(struct qeth_card *card) 4867 { 4868 QETH_CARD_TEXT(card, 2, "features"); 4869 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 4870 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 4871 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 4872 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 4873 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 4874 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 4875 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 4876 } 4877 EXPORT_SYMBOL_GPL(qeth_trace_features); 4878 4879 static struct ccw_device_id qeth_ids[] = { 4880 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4881 .driver_info = QETH_CARD_TYPE_OSD}, 4882 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4883 .driver_info = QETH_CARD_TYPE_IQD}, 4884 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4885 .driver_info = QETH_CARD_TYPE_OSN}, 4886 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4887 .driver_info = QETH_CARD_TYPE_OSM}, 4888 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4889 .driver_info = QETH_CARD_TYPE_OSX}, 4890 {}, 4891 }; 4892 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4893 4894 static struct ccw_driver qeth_ccw_driver = { 4895 .driver = { 4896 .owner = THIS_MODULE, 4897 .name = "qeth", 4898 }, 4899 .ids = qeth_ids, 4900 .probe = ccwgroup_probe_ccwdev, 4901 .remove = ccwgroup_remove_ccwdev, 4902 }; 4903 4904 int qeth_core_hardsetup_card(struct qeth_card *card) 4905 { 4906 int retries = 3; 4907 int rc; 4908 4909 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4910 atomic_set(&card->force_alloc_skb, 0); 4911 qeth_update_from_chp_desc(card); 4912 retry: 4913 if (retries < 3) 4914 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4915 dev_name(&card->gdev->dev)); 4916 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4917 ccw_device_set_offline(CARD_DDEV(card)); 4918 ccw_device_set_offline(CARD_WDEV(card)); 4919 ccw_device_set_offline(CARD_RDEV(card)); 4920 qdio_free(CARD_DDEV(card)); 4921 rc = ccw_device_set_online(CARD_RDEV(card)); 4922 if (rc) 4923 goto retriable; 4924 rc = ccw_device_set_online(CARD_WDEV(card)); 4925 if (rc) 4926 goto retriable; 4927 rc = ccw_device_set_online(CARD_DDEV(card)); 4928 if (rc) 4929 goto retriable; 4930 retriable: 4931 if (rc == -ERESTARTSYS) { 4932 QETH_DBF_TEXT(SETUP, 2, "break1"); 4933 return rc; 4934 } else if (rc) { 4935 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4936 if (--retries < 0) 4937 goto out; 4938 else 4939 goto retry; 4940 } 4941 qeth_determine_capabilities(card); 4942 qeth_init_tokens(card); 4943 qeth_init_func_level(card); 4944 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4945 if (rc == -ERESTARTSYS) { 4946 QETH_DBF_TEXT(SETUP, 2, "break2"); 4947 return rc; 4948 } else if (rc) { 4949 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4950 if (--retries < 0) 4951 goto out; 4952 else 4953 goto retry; 4954 } 4955 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4956 if (rc == -ERESTARTSYS) { 4957 QETH_DBF_TEXT(SETUP, 2, "break3"); 4958 return rc; 4959 } else if (rc) { 4960 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4961 if (--retries < 0) 4962 goto out; 4963 else 4964 goto retry; 4965 } 4966 card->read_or_write_problem = 0; 4967 rc = qeth_mpc_initialize(card); 4968 if (rc) { 4969 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4970 goto out; 4971 } 4972 4973 card->options.ipa4.supported_funcs = 0; 4974 card->options.adp.supported_funcs = 0; 4975 card->options.sbp.supported_funcs = 0; 4976 card->info.diagass_support = 0; 4977 qeth_query_ipassists(card, QETH_PROT_IPV4); 4978 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4979 qeth_query_setadapterparms(card); 4980 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4981 qeth_query_setdiagass(card); 4982 return 0; 4983 out: 4984 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4985 "an error on the device\n"); 4986 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4987 dev_name(&card->gdev->dev), rc); 4988 return rc; 4989 } 4990 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4991 4992 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4993 struct qdio_buffer_element *element, 4994 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4995 { 4996 struct page *page = virt_to_page(element->addr); 4997 if (*pskb == NULL) { 4998 if (qethbuffer->rx_skb) { 4999 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 5000 *pskb = qethbuffer->rx_skb; 5001 qethbuffer->rx_skb = NULL; 5002 } else { 5003 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 5004 if (!(*pskb)) 5005 return -ENOMEM; 5006 } 5007 5008 skb_reserve(*pskb, ETH_HLEN); 5009 if (data_len <= QETH_RX_PULL_LEN) { 5010 memcpy(skb_put(*pskb, data_len), element->addr + offset, 5011 data_len); 5012 } else { 5013 get_page(page); 5014 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 5015 element->addr + offset, QETH_RX_PULL_LEN); 5016 skb_fill_page_desc(*pskb, *pfrag, page, 5017 offset + QETH_RX_PULL_LEN, 5018 data_len - QETH_RX_PULL_LEN); 5019 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5020 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5021 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5022 (*pfrag)++; 5023 } 5024 } else { 5025 get_page(page); 5026 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5027 (*pskb)->data_len += data_len; 5028 (*pskb)->len += data_len; 5029 (*pskb)->truesize += data_len; 5030 (*pfrag)++; 5031 } 5032 5033 5034 return 0; 5035 } 5036 5037 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5038 struct qeth_qdio_buffer *qethbuffer, 5039 struct qdio_buffer_element **__element, int *__offset, 5040 struct qeth_hdr **hdr) 5041 { 5042 struct qdio_buffer_element *element = *__element; 5043 struct qdio_buffer *buffer = qethbuffer->buffer; 5044 int offset = *__offset; 5045 struct sk_buff *skb = NULL; 5046 int skb_len = 0; 5047 void *data_ptr; 5048 int data_len; 5049 int headroom = 0; 5050 int use_rx_sg = 0; 5051 int frag = 0; 5052 5053 /* qeth_hdr must not cross element boundaries */ 5054 if (element->length < offset + sizeof(struct qeth_hdr)) { 5055 if (qeth_is_last_sbale(element)) 5056 return NULL; 5057 element++; 5058 offset = 0; 5059 if (element->length < sizeof(struct qeth_hdr)) 5060 return NULL; 5061 } 5062 *hdr = element->addr + offset; 5063 5064 offset += sizeof(struct qeth_hdr); 5065 switch ((*hdr)->hdr.l2.id) { 5066 case QETH_HEADER_TYPE_LAYER2: 5067 skb_len = (*hdr)->hdr.l2.pkt_length; 5068 break; 5069 case QETH_HEADER_TYPE_LAYER3: 5070 skb_len = (*hdr)->hdr.l3.length; 5071 headroom = ETH_HLEN; 5072 break; 5073 case QETH_HEADER_TYPE_OSN: 5074 skb_len = (*hdr)->hdr.osn.pdu_length; 5075 headroom = sizeof(struct qeth_hdr); 5076 break; 5077 default: 5078 break; 5079 } 5080 5081 if (!skb_len) 5082 return NULL; 5083 5084 if (((skb_len >= card->options.rx_sg_cb) && 5085 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5086 (!atomic_read(&card->force_alloc_skb))) || 5087 (card->options.cq == QETH_CQ_ENABLED)) { 5088 use_rx_sg = 1; 5089 } else { 5090 skb = dev_alloc_skb(skb_len + headroom); 5091 if (!skb) 5092 goto no_mem; 5093 if (headroom) 5094 skb_reserve(skb, headroom); 5095 } 5096 5097 data_ptr = element->addr + offset; 5098 while (skb_len) { 5099 data_len = min(skb_len, (int)(element->length - offset)); 5100 if (data_len) { 5101 if (use_rx_sg) { 5102 if (qeth_create_skb_frag(qethbuffer, element, 5103 &skb, offset, &frag, data_len)) 5104 goto no_mem; 5105 } else { 5106 memcpy(skb_put(skb, data_len), data_ptr, 5107 data_len); 5108 } 5109 } 5110 skb_len -= data_len; 5111 if (skb_len) { 5112 if (qeth_is_last_sbale(element)) { 5113 QETH_CARD_TEXT(card, 4, "unexeob"); 5114 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5115 dev_kfree_skb_any(skb); 5116 card->stats.rx_errors++; 5117 return NULL; 5118 } 5119 element++; 5120 offset = 0; 5121 data_ptr = element->addr; 5122 } else { 5123 offset += data_len; 5124 } 5125 } 5126 *__element = element; 5127 *__offset = offset; 5128 if (use_rx_sg && card->options.performance_stats) { 5129 card->perf_stats.sg_skbs_rx++; 5130 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5131 } 5132 return skb; 5133 no_mem: 5134 if (net_ratelimit()) { 5135 QETH_CARD_TEXT(card, 2, "noskbmem"); 5136 } 5137 card->stats.rx_dropped++; 5138 return NULL; 5139 } 5140 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5141 5142 static void qeth_unregister_dbf_views(void) 5143 { 5144 int x; 5145 for (x = 0; x < QETH_DBF_INFOS; x++) { 5146 debug_unregister(qeth_dbf[x].id); 5147 qeth_dbf[x].id = NULL; 5148 } 5149 } 5150 5151 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5152 { 5153 char dbf_txt_buf[32]; 5154 va_list args; 5155 5156 if (!debug_level_enabled(id, level)) 5157 return; 5158 va_start(args, fmt); 5159 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5160 va_end(args); 5161 debug_text_event(id, level, dbf_txt_buf); 5162 } 5163 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5164 5165 static int qeth_register_dbf_views(void) 5166 { 5167 int ret; 5168 int x; 5169 5170 for (x = 0; x < QETH_DBF_INFOS; x++) { 5171 /* register the areas */ 5172 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5173 qeth_dbf[x].pages, 5174 qeth_dbf[x].areas, 5175 qeth_dbf[x].len); 5176 if (qeth_dbf[x].id == NULL) { 5177 qeth_unregister_dbf_views(); 5178 return -ENOMEM; 5179 } 5180 5181 /* register a view */ 5182 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5183 if (ret) { 5184 qeth_unregister_dbf_views(); 5185 return ret; 5186 } 5187 5188 /* set a passing level */ 5189 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5190 } 5191 5192 return 0; 5193 } 5194 5195 int qeth_core_load_discipline(struct qeth_card *card, 5196 enum qeth_discipline_id discipline) 5197 { 5198 int rc = 0; 5199 mutex_lock(&qeth_mod_mutex); 5200 switch (discipline) { 5201 case QETH_DISCIPLINE_LAYER3: 5202 card->discipline = try_then_request_module( 5203 symbol_get(qeth_l3_discipline), "qeth_l3"); 5204 break; 5205 case QETH_DISCIPLINE_LAYER2: 5206 card->discipline = try_then_request_module( 5207 symbol_get(qeth_l2_discipline), "qeth_l2"); 5208 break; 5209 } 5210 if (!card->discipline) { 5211 dev_err(&card->gdev->dev, "There is no kernel module to " 5212 "support discipline %d\n", discipline); 5213 rc = -EINVAL; 5214 } 5215 mutex_unlock(&qeth_mod_mutex); 5216 return rc; 5217 } 5218 5219 void qeth_core_free_discipline(struct qeth_card *card) 5220 { 5221 if (card->options.layer2) 5222 symbol_put(qeth_l2_discipline); 5223 else 5224 symbol_put(qeth_l3_discipline); 5225 card->discipline = NULL; 5226 } 5227 5228 static const struct device_type qeth_generic_devtype = { 5229 .name = "qeth_generic", 5230 .groups = qeth_generic_attr_groups, 5231 }; 5232 static const struct device_type qeth_osn_devtype = { 5233 .name = "qeth_osn", 5234 .groups = qeth_osn_attr_groups, 5235 }; 5236 5237 #define DBF_NAME_LEN 20 5238 5239 struct qeth_dbf_entry { 5240 char dbf_name[DBF_NAME_LEN]; 5241 debug_info_t *dbf_info; 5242 struct list_head dbf_list; 5243 }; 5244 5245 static LIST_HEAD(qeth_dbf_list); 5246 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5247 5248 static debug_info_t *qeth_get_dbf_entry(char *name) 5249 { 5250 struct qeth_dbf_entry *entry; 5251 debug_info_t *rc = NULL; 5252 5253 mutex_lock(&qeth_dbf_list_mutex); 5254 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5255 if (strcmp(entry->dbf_name, name) == 0) { 5256 rc = entry->dbf_info; 5257 break; 5258 } 5259 } 5260 mutex_unlock(&qeth_dbf_list_mutex); 5261 return rc; 5262 } 5263 5264 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5265 { 5266 struct qeth_dbf_entry *new_entry; 5267 5268 card->debug = debug_register(name, 2, 1, 8); 5269 if (!card->debug) { 5270 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5271 goto err; 5272 } 5273 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5274 goto err_dbg; 5275 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5276 if (!new_entry) 5277 goto err_dbg; 5278 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5279 new_entry->dbf_info = card->debug; 5280 mutex_lock(&qeth_dbf_list_mutex); 5281 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5282 mutex_unlock(&qeth_dbf_list_mutex); 5283 5284 return 0; 5285 5286 err_dbg: 5287 debug_unregister(card->debug); 5288 err: 5289 return -ENOMEM; 5290 } 5291 5292 static void qeth_clear_dbf_list(void) 5293 { 5294 struct qeth_dbf_entry *entry, *tmp; 5295 5296 mutex_lock(&qeth_dbf_list_mutex); 5297 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5298 list_del(&entry->dbf_list); 5299 debug_unregister(entry->dbf_info); 5300 kfree(entry); 5301 } 5302 mutex_unlock(&qeth_dbf_list_mutex); 5303 } 5304 5305 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5306 { 5307 struct qeth_card *card; 5308 struct device *dev; 5309 int rc; 5310 unsigned long flags; 5311 char dbf_name[DBF_NAME_LEN]; 5312 5313 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5314 5315 dev = &gdev->dev; 5316 if (!get_device(dev)) 5317 return -ENODEV; 5318 5319 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5320 5321 card = qeth_alloc_card(); 5322 if (!card) { 5323 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5324 rc = -ENOMEM; 5325 goto err_dev; 5326 } 5327 5328 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5329 dev_name(&gdev->dev)); 5330 card->debug = qeth_get_dbf_entry(dbf_name); 5331 if (!card->debug) { 5332 rc = qeth_add_dbf_entry(card, dbf_name); 5333 if (rc) 5334 goto err_card; 5335 } 5336 5337 card->read.ccwdev = gdev->cdev[0]; 5338 card->write.ccwdev = gdev->cdev[1]; 5339 card->data.ccwdev = gdev->cdev[2]; 5340 dev_set_drvdata(&gdev->dev, card); 5341 card->gdev = gdev; 5342 gdev->cdev[0]->handler = qeth_irq; 5343 gdev->cdev[1]->handler = qeth_irq; 5344 gdev->cdev[2]->handler = qeth_irq; 5345 5346 rc = qeth_determine_card_type(card); 5347 if (rc) { 5348 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5349 goto err_card; 5350 } 5351 rc = qeth_setup_card(card); 5352 if (rc) { 5353 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5354 goto err_card; 5355 } 5356 5357 if (card->info.type == QETH_CARD_TYPE_OSN) 5358 gdev->dev.type = &qeth_osn_devtype; 5359 else 5360 gdev->dev.type = &qeth_generic_devtype; 5361 5362 switch (card->info.type) { 5363 case QETH_CARD_TYPE_OSN: 5364 case QETH_CARD_TYPE_OSM: 5365 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5366 if (rc) 5367 goto err_card; 5368 rc = card->discipline->setup(card->gdev); 5369 if (rc) 5370 goto err_disc; 5371 case QETH_CARD_TYPE_OSD: 5372 case QETH_CARD_TYPE_OSX: 5373 default: 5374 break; 5375 } 5376 5377 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5378 list_add_tail(&card->list, &qeth_core_card_list.list); 5379 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5380 5381 qeth_determine_capabilities(card); 5382 return 0; 5383 5384 err_disc: 5385 qeth_core_free_discipline(card); 5386 err_card: 5387 qeth_core_free_card(card); 5388 err_dev: 5389 put_device(dev); 5390 return rc; 5391 } 5392 5393 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5394 { 5395 unsigned long flags; 5396 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5397 5398 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5399 5400 if (card->discipline) { 5401 card->discipline->remove(gdev); 5402 qeth_core_free_discipline(card); 5403 } 5404 5405 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5406 list_del(&card->list); 5407 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5408 qeth_core_free_card(card); 5409 dev_set_drvdata(&gdev->dev, NULL); 5410 put_device(&gdev->dev); 5411 return; 5412 } 5413 5414 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5415 { 5416 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5417 int rc = 0; 5418 int def_discipline; 5419 5420 if (!card->discipline) { 5421 if (card->info.type == QETH_CARD_TYPE_IQD) 5422 def_discipline = QETH_DISCIPLINE_LAYER3; 5423 else 5424 def_discipline = QETH_DISCIPLINE_LAYER2; 5425 rc = qeth_core_load_discipline(card, def_discipline); 5426 if (rc) 5427 goto err; 5428 rc = card->discipline->setup(card->gdev); 5429 if (rc) 5430 goto err; 5431 } 5432 rc = card->discipline->set_online(gdev); 5433 err: 5434 return rc; 5435 } 5436 5437 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5438 { 5439 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5440 return card->discipline->set_offline(gdev); 5441 } 5442 5443 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5444 { 5445 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5446 if (card->discipline && card->discipline->shutdown) 5447 card->discipline->shutdown(gdev); 5448 } 5449 5450 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5451 { 5452 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5453 if (card->discipline && card->discipline->prepare) 5454 return card->discipline->prepare(gdev); 5455 return 0; 5456 } 5457 5458 static void qeth_core_complete(struct ccwgroup_device *gdev) 5459 { 5460 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5461 if (card->discipline && card->discipline->complete) 5462 card->discipline->complete(gdev); 5463 } 5464 5465 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5466 { 5467 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5468 if (card->discipline && card->discipline->freeze) 5469 return card->discipline->freeze(gdev); 5470 return 0; 5471 } 5472 5473 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5474 { 5475 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5476 if (card->discipline && card->discipline->thaw) 5477 return card->discipline->thaw(gdev); 5478 return 0; 5479 } 5480 5481 static int qeth_core_restore(struct ccwgroup_device *gdev) 5482 { 5483 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5484 if (card->discipline && card->discipline->restore) 5485 return card->discipline->restore(gdev); 5486 return 0; 5487 } 5488 5489 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5490 .driver = { 5491 .owner = THIS_MODULE, 5492 .name = "qeth", 5493 }, 5494 .setup = qeth_core_probe_device, 5495 .remove = qeth_core_remove_device, 5496 .set_online = qeth_core_set_online, 5497 .set_offline = qeth_core_set_offline, 5498 .shutdown = qeth_core_shutdown, 5499 .prepare = qeth_core_prepare, 5500 .complete = qeth_core_complete, 5501 .freeze = qeth_core_freeze, 5502 .thaw = qeth_core_thaw, 5503 .restore = qeth_core_restore, 5504 }; 5505 5506 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5507 const char *buf, size_t count) 5508 { 5509 int err; 5510 5511 err = ccwgroup_create_dev(qeth_core_root_dev, 5512 &qeth_core_ccwgroup_driver, 3, buf); 5513 5514 return err ? err : count; 5515 } 5516 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5517 5518 static struct attribute *qeth_drv_attrs[] = { 5519 &driver_attr_group.attr, 5520 NULL, 5521 }; 5522 static struct attribute_group qeth_drv_attr_group = { 5523 .attrs = qeth_drv_attrs, 5524 }; 5525 static const struct attribute_group *qeth_drv_attr_groups[] = { 5526 &qeth_drv_attr_group, 5527 NULL, 5528 }; 5529 5530 static struct { 5531 const char str[ETH_GSTRING_LEN]; 5532 } qeth_ethtool_stats_keys[] = { 5533 /* 0 */{"rx skbs"}, 5534 {"rx buffers"}, 5535 {"tx skbs"}, 5536 {"tx buffers"}, 5537 {"tx skbs no packing"}, 5538 {"tx buffers no packing"}, 5539 {"tx skbs packing"}, 5540 {"tx buffers packing"}, 5541 {"tx sg skbs"}, 5542 {"tx sg frags"}, 5543 /* 10 */{"rx sg skbs"}, 5544 {"rx sg frags"}, 5545 {"rx sg page allocs"}, 5546 {"tx large kbytes"}, 5547 {"tx large count"}, 5548 {"tx pk state ch n->p"}, 5549 {"tx pk state ch p->n"}, 5550 {"tx pk watermark low"}, 5551 {"tx pk watermark high"}, 5552 {"queue 0 buffer usage"}, 5553 /* 20 */{"queue 1 buffer usage"}, 5554 {"queue 2 buffer usage"}, 5555 {"queue 3 buffer usage"}, 5556 {"rx poll time"}, 5557 {"rx poll count"}, 5558 {"rx do_QDIO time"}, 5559 {"rx do_QDIO count"}, 5560 {"tx handler time"}, 5561 {"tx handler count"}, 5562 {"tx time"}, 5563 /* 30 */{"tx count"}, 5564 {"tx do_QDIO time"}, 5565 {"tx do_QDIO count"}, 5566 {"tx csum"}, 5567 {"tx lin"}, 5568 {"cq handler count"}, 5569 {"cq handler time"} 5570 }; 5571 5572 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5573 { 5574 switch (stringset) { 5575 case ETH_SS_STATS: 5576 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5577 default: 5578 return -EINVAL; 5579 } 5580 } 5581 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5582 5583 void qeth_core_get_ethtool_stats(struct net_device *dev, 5584 struct ethtool_stats *stats, u64 *data) 5585 { 5586 struct qeth_card *card = dev->ml_priv; 5587 data[0] = card->stats.rx_packets - 5588 card->perf_stats.initial_rx_packets; 5589 data[1] = card->perf_stats.bufs_rec; 5590 data[2] = card->stats.tx_packets - 5591 card->perf_stats.initial_tx_packets; 5592 data[3] = card->perf_stats.bufs_sent; 5593 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5594 - card->perf_stats.skbs_sent_pack; 5595 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5596 data[6] = card->perf_stats.skbs_sent_pack; 5597 data[7] = card->perf_stats.bufs_sent_pack; 5598 data[8] = card->perf_stats.sg_skbs_sent; 5599 data[9] = card->perf_stats.sg_frags_sent; 5600 data[10] = card->perf_stats.sg_skbs_rx; 5601 data[11] = card->perf_stats.sg_frags_rx; 5602 data[12] = card->perf_stats.sg_alloc_page_rx; 5603 data[13] = (card->perf_stats.large_send_bytes >> 10); 5604 data[14] = card->perf_stats.large_send_cnt; 5605 data[15] = card->perf_stats.sc_dp_p; 5606 data[16] = card->perf_stats.sc_p_dp; 5607 data[17] = QETH_LOW_WATERMARK_PACK; 5608 data[18] = QETH_HIGH_WATERMARK_PACK; 5609 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5610 data[20] = (card->qdio.no_out_queues > 1) ? 5611 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5612 data[21] = (card->qdio.no_out_queues > 2) ? 5613 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5614 data[22] = (card->qdio.no_out_queues > 3) ? 5615 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5616 data[23] = card->perf_stats.inbound_time; 5617 data[24] = card->perf_stats.inbound_cnt; 5618 data[25] = card->perf_stats.inbound_do_qdio_time; 5619 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5620 data[27] = card->perf_stats.outbound_handler_time; 5621 data[28] = card->perf_stats.outbound_handler_cnt; 5622 data[29] = card->perf_stats.outbound_time; 5623 data[30] = card->perf_stats.outbound_cnt; 5624 data[31] = card->perf_stats.outbound_do_qdio_time; 5625 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5626 data[33] = card->perf_stats.tx_csum; 5627 data[34] = card->perf_stats.tx_lin; 5628 data[35] = card->perf_stats.cq_cnt; 5629 data[36] = card->perf_stats.cq_time; 5630 } 5631 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5632 5633 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5634 { 5635 switch (stringset) { 5636 case ETH_SS_STATS: 5637 memcpy(data, &qeth_ethtool_stats_keys, 5638 sizeof(qeth_ethtool_stats_keys)); 5639 break; 5640 default: 5641 WARN_ON(1); 5642 break; 5643 } 5644 } 5645 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5646 5647 void qeth_core_get_drvinfo(struct net_device *dev, 5648 struct ethtool_drvinfo *info) 5649 { 5650 struct qeth_card *card = dev->ml_priv; 5651 5652 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5653 sizeof(info->driver)); 5654 strlcpy(info->version, "1.0", sizeof(info->version)); 5655 strlcpy(info->fw_version, card->info.mcl_level, 5656 sizeof(info->fw_version)); 5657 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5658 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5659 } 5660 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5661 5662 /* Helper function to fill 'advertizing' and 'supported' which are the same. */ 5663 /* Autoneg and full-duplex are supported and advertized uncondionally. */ 5664 /* Always advertize and support all speeds up to specified, and only one */ 5665 /* specified port type. */ 5666 static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd, 5667 int maxspeed, int porttype) 5668 { 5669 int port_sup, port_adv, spd_sup, spd_adv; 5670 5671 switch (porttype) { 5672 case PORT_TP: 5673 port_sup = SUPPORTED_TP; 5674 port_adv = ADVERTISED_TP; 5675 break; 5676 case PORT_FIBRE: 5677 port_sup = SUPPORTED_FIBRE; 5678 port_adv = ADVERTISED_FIBRE; 5679 break; 5680 default: 5681 port_sup = SUPPORTED_TP; 5682 port_adv = ADVERTISED_TP; 5683 WARN_ON_ONCE(1); 5684 } 5685 5686 /* "Fallthrough" case'es ordered from high to low result in setting */ 5687 /* flags cumulatively, starting from the specified speed and down to */ 5688 /* the lowest possible. */ 5689 spd_sup = 0; 5690 spd_adv = 0; 5691 switch (maxspeed) { 5692 case SPEED_10000: 5693 spd_sup |= SUPPORTED_10000baseT_Full; 5694 spd_adv |= ADVERTISED_10000baseT_Full; 5695 case SPEED_1000: 5696 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; 5697 spd_adv |= ADVERTISED_1000baseT_Half | 5698 ADVERTISED_1000baseT_Full; 5699 case SPEED_100: 5700 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full; 5701 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; 5702 case SPEED_10: 5703 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5704 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5705 break; 5706 default: 5707 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5708 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5709 WARN_ON_ONCE(1); 5710 } 5711 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv; 5712 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup; 5713 } 5714 5715 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5716 struct ethtool_cmd *ecmd) 5717 { 5718 struct qeth_card *card = netdev->ml_priv; 5719 enum qeth_link_types link_type; 5720 struct carrier_info carrier_info; 5721 u32 speed; 5722 5723 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5724 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5725 else 5726 link_type = card->info.link_type; 5727 5728 ecmd->transceiver = XCVR_INTERNAL; 5729 ecmd->duplex = DUPLEX_FULL; 5730 ecmd->autoneg = AUTONEG_ENABLE; 5731 5732 switch (link_type) { 5733 case QETH_LINK_TYPE_FAST_ETH: 5734 case QETH_LINK_TYPE_LANE_ETH100: 5735 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP); 5736 speed = SPEED_100; 5737 ecmd->port = PORT_TP; 5738 break; 5739 5740 case QETH_LINK_TYPE_GBIT_ETH: 5741 case QETH_LINK_TYPE_LANE_ETH1000: 5742 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5743 speed = SPEED_1000; 5744 ecmd->port = PORT_FIBRE; 5745 break; 5746 5747 case QETH_LINK_TYPE_10GBIT_ETH: 5748 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5749 speed = SPEED_10000; 5750 ecmd->port = PORT_FIBRE; 5751 break; 5752 5753 default: 5754 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP); 5755 speed = SPEED_10; 5756 ecmd->port = PORT_TP; 5757 } 5758 ethtool_cmd_speed_set(ecmd, speed); 5759 5760 /* Check if we can obtain more accurate information. */ 5761 /* If QUERY_CARD_INFO command is not supported or fails, */ 5762 /* just return the heuristics that was filled above. */ 5763 if (qeth_query_card_info(card, &carrier_info) != 0) 5764 return 0; 5765 5766 netdev_dbg(netdev, 5767 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 5768 carrier_info.card_type, 5769 carrier_info.port_mode, 5770 carrier_info.port_speed); 5771 5772 /* Update attributes for which we've obtained more authoritative */ 5773 /* information, leave the rest the way they where filled above. */ 5774 switch (carrier_info.card_type) { 5775 case CARD_INFO_TYPE_1G_COPPER_A: 5776 case CARD_INFO_TYPE_1G_COPPER_B: 5777 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP); 5778 ecmd->port = PORT_TP; 5779 break; 5780 case CARD_INFO_TYPE_1G_FIBRE_A: 5781 case CARD_INFO_TYPE_1G_FIBRE_B: 5782 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5783 ecmd->port = PORT_FIBRE; 5784 break; 5785 case CARD_INFO_TYPE_10G_FIBRE_A: 5786 case CARD_INFO_TYPE_10G_FIBRE_B: 5787 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5788 ecmd->port = PORT_FIBRE; 5789 break; 5790 } 5791 5792 switch (carrier_info.port_mode) { 5793 case CARD_INFO_PORTM_FULLDUPLEX: 5794 ecmd->duplex = DUPLEX_FULL; 5795 break; 5796 case CARD_INFO_PORTM_HALFDUPLEX: 5797 ecmd->duplex = DUPLEX_HALF; 5798 break; 5799 } 5800 5801 switch (carrier_info.port_speed) { 5802 case CARD_INFO_PORTS_10M: 5803 speed = SPEED_10; 5804 break; 5805 case CARD_INFO_PORTS_100M: 5806 speed = SPEED_100; 5807 break; 5808 case CARD_INFO_PORTS_1G: 5809 speed = SPEED_1000; 5810 break; 5811 case CARD_INFO_PORTS_10G: 5812 speed = SPEED_10000; 5813 break; 5814 } 5815 ethtool_cmd_speed_set(ecmd, speed); 5816 5817 return 0; 5818 } 5819 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5820 5821 static int __init qeth_core_init(void) 5822 { 5823 int rc; 5824 5825 pr_info("loading core functions\n"); 5826 INIT_LIST_HEAD(&qeth_core_card_list.list); 5827 INIT_LIST_HEAD(&qeth_dbf_list); 5828 rwlock_init(&qeth_core_card_list.rwlock); 5829 mutex_init(&qeth_mod_mutex); 5830 5831 qeth_wq = create_singlethread_workqueue("qeth_wq"); 5832 5833 rc = qeth_register_dbf_views(); 5834 if (rc) 5835 goto out_err; 5836 qeth_core_root_dev = root_device_register("qeth"); 5837 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev); 5838 if (rc) 5839 goto register_err; 5840 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5841 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5842 if (!qeth_core_header_cache) { 5843 rc = -ENOMEM; 5844 goto slab_err; 5845 } 5846 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5847 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5848 if (!qeth_qdio_outbuf_cache) { 5849 rc = -ENOMEM; 5850 goto cqslab_err; 5851 } 5852 rc = ccw_driver_register(&qeth_ccw_driver); 5853 if (rc) 5854 goto ccw_err; 5855 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5856 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5857 if (rc) 5858 goto ccwgroup_err; 5859 5860 return 0; 5861 5862 ccwgroup_err: 5863 ccw_driver_unregister(&qeth_ccw_driver); 5864 ccw_err: 5865 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5866 cqslab_err: 5867 kmem_cache_destroy(qeth_core_header_cache); 5868 slab_err: 5869 root_device_unregister(qeth_core_root_dev); 5870 register_err: 5871 qeth_unregister_dbf_views(); 5872 out_err: 5873 pr_err("Initializing the qeth device driver failed\n"); 5874 return rc; 5875 } 5876 5877 static void __exit qeth_core_exit(void) 5878 { 5879 qeth_clear_dbf_list(); 5880 destroy_workqueue(qeth_wq); 5881 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5882 ccw_driver_unregister(&qeth_ccw_driver); 5883 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5884 kmem_cache_destroy(qeth_core_header_cache); 5885 root_device_unregister(qeth_core_root_dev); 5886 qeth_unregister_dbf_views(); 5887 pr_info("core functions removed\n"); 5888 } 5889 5890 module_init(qeth_core_init); 5891 module_exit(qeth_core_exit); 5892 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5893 MODULE_DESCRIPTION("qeth core functions"); 5894 MODULE_LICENSE("GPL"); 5895