1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/io.h> 27 28 #include "qeth_core.h" 29 30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 32 /* N P A M L V H */ 33 [QETH_DBF_SETUP] = {"qeth_setup", 34 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 35 [QETH_DBF_MSG] = {"qeth_msg", 36 8, 1, 128, 3, &debug_sprintf_view, NULL}, 37 [QETH_DBF_CTRL] = {"qeth_control", 38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 39 }; 40 EXPORT_SYMBOL_GPL(qeth_dbf); 41 42 struct qeth_card_list_struct qeth_core_card_list; 43 EXPORT_SYMBOL_GPL(qeth_core_card_list); 44 struct kmem_cache *qeth_core_header_cache; 45 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 46 47 static struct device *qeth_core_root_dev; 48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 49 static struct lock_class_key qdio_out_skb_queue_key; 50 51 static void qeth_send_control_data_cb(struct qeth_channel *, 52 struct qeth_cmd_buffer *); 53 static int qeth_issue_next_read(struct qeth_card *); 54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 56 static void qeth_free_buffer_pool(struct qeth_card *); 57 static int qeth_qdio_establish(struct qeth_card *); 58 59 60 static inline const char *qeth_get_cardname(struct qeth_card *card) 61 { 62 if (card->info.guestlan) { 63 switch (card->info.type) { 64 case QETH_CARD_TYPE_OSD: 65 return " Guest LAN QDIO"; 66 case QETH_CARD_TYPE_IQD: 67 return " Guest LAN Hiper"; 68 case QETH_CARD_TYPE_OSM: 69 return " Guest LAN QDIO - OSM"; 70 case QETH_CARD_TYPE_OSX: 71 return " Guest LAN QDIO - OSX"; 72 default: 73 return " unknown"; 74 } 75 } else { 76 switch (card->info.type) { 77 case QETH_CARD_TYPE_OSD: 78 return " OSD Express"; 79 case QETH_CARD_TYPE_IQD: 80 return " HiperSockets"; 81 case QETH_CARD_TYPE_OSN: 82 return " OSN QDIO"; 83 case QETH_CARD_TYPE_OSM: 84 return " OSM QDIO"; 85 case QETH_CARD_TYPE_OSX: 86 return " OSX QDIO"; 87 default: 88 return " unknown"; 89 } 90 } 91 return " n/a"; 92 } 93 94 /* max length to be returned: 14 */ 95 const char *qeth_get_cardname_short(struct qeth_card *card) 96 { 97 if (card->info.guestlan) { 98 switch (card->info.type) { 99 case QETH_CARD_TYPE_OSD: 100 return "GuestLAN QDIO"; 101 case QETH_CARD_TYPE_IQD: 102 return "GuestLAN Hiper"; 103 case QETH_CARD_TYPE_OSM: 104 return "GuestLAN OSM"; 105 case QETH_CARD_TYPE_OSX: 106 return "GuestLAN OSX"; 107 default: 108 return "unknown"; 109 } 110 } else { 111 switch (card->info.type) { 112 case QETH_CARD_TYPE_OSD: 113 switch (card->info.link_type) { 114 case QETH_LINK_TYPE_FAST_ETH: 115 return "OSD_100"; 116 case QETH_LINK_TYPE_HSTR: 117 return "HSTR"; 118 case QETH_LINK_TYPE_GBIT_ETH: 119 return "OSD_1000"; 120 case QETH_LINK_TYPE_10GBIT_ETH: 121 return "OSD_10GIG"; 122 case QETH_LINK_TYPE_LANE_ETH100: 123 return "OSD_FE_LANE"; 124 case QETH_LINK_TYPE_LANE_TR: 125 return "OSD_TR_LANE"; 126 case QETH_LINK_TYPE_LANE_ETH1000: 127 return "OSD_GbE_LANE"; 128 case QETH_LINK_TYPE_LANE: 129 return "OSD_ATM_LANE"; 130 default: 131 return "OSD_Express"; 132 } 133 case QETH_CARD_TYPE_IQD: 134 return "HiperSockets"; 135 case QETH_CARD_TYPE_OSN: 136 return "OSN"; 137 case QETH_CARD_TYPE_OSM: 138 return "OSM_1000"; 139 case QETH_CARD_TYPE_OSX: 140 return "OSX_10GIG"; 141 default: 142 return "unknown"; 143 } 144 } 145 return "n/a"; 146 } 147 148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 149 int clear_start_mask) 150 { 151 unsigned long flags; 152 153 spin_lock_irqsave(&card->thread_mask_lock, flags); 154 card->thread_allowed_mask = threads; 155 if (clear_start_mask) 156 card->thread_start_mask &= threads; 157 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 158 wake_up(&card->wait_q); 159 } 160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 161 162 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 163 { 164 unsigned long flags; 165 int rc = 0; 166 167 spin_lock_irqsave(&card->thread_mask_lock, flags); 168 rc = (card->thread_running_mask & threads); 169 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 170 return rc; 171 } 172 EXPORT_SYMBOL_GPL(qeth_threads_running); 173 174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 175 { 176 return wait_event_interruptible(card->wait_q, 177 qeth_threads_running(card, threads) == 0); 178 } 179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 180 181 void qeth_clear_working_pool_list(struct qeth_card *card) 182 { 183 struct qeth_buffer_pool_entry *pool_entry, *tmp; 184 185 QETH_CARD_TEXT(card, 5, "clwrklst"); 186 list_for_each_entry_safe(pool_entry, tmp, 187 &card->qdio.in_buf_pool.entry_list, list){ 188 list_del(&pool_entry->list); 189 } 190 } 191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 192 193 static int qeth_alloc_buffer_pool(struct qeth_card *card) 194 { 195 struct qeth_buffer_pool_entry *pool_entry; 196 void *ptr; 197 int i, j; 198 199 QETH_CARD_TEXT(card, 5, "alocpool"); 200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 202 if (!pool_entry) { 203 qeth_free_buffer_pool(card); 204 return -ENOMEM; 205 } 206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 207 ptr = (void *) __get_free_page(GFP_KERNEL); 208 if (!ptr) { 209 while (j > 0) 210 free_page((unsigned long) 211 pool_entry->elements[--j]); 212 kfree(pool_entry); 213 qeth_free_buffer_pool(card); 214 return -ENOMEM; 215 } 216 pool_entry->elements[j] = ptr; 217 } 218 list_add(&pool_entry->init_list, 219 &card->qdio.init_pool.entry_list); 220 } 221 return 0; 222 } 223 224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 225 { 226 QETH_CARD_TEXT(card, 2, "realcbp"); 227 228 if ((card->state != CARD_STATE_DOWN) && 229 (card->state != CARD_STATE_RECOVER)) 230 return -EPERM; 231 232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 233 qeth_clear_working_pool_list(card); 234 qeth_free_buffer_pool(card); 235 card->qdio.in_buf_pool.buf_count = bufcnt; 236 card->qdio.init_pool.buf_count = bufcnt; 237 return qeth_alloc_buffer_pool(card); 238 } 239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 240 241 static int qeth_issue_next_read(struct qeth_card *card) 242 { 243 int rc; 244 struct qeth_cmd_buffer *iob; 245 246 QETH_CARD_TEXT(card, 5, "issnxrd"); 247 if (card->read.state != CH_STATE_UP) 248 return -EIO; 249 iob = qeth_get_buffer(&card->read); 250 if (!iob) { 251 dev_warn(&card->gdev->dev, "The qeth device driver " 252 "failed to recover an error on the device\n"); 253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 254 "available\n", dev_name(&card->gdev->dev)); 255 return -ENOMEM; 256 } 257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 258 QETH_CARD_TEXT(card, 6, "noirqpnd"); 259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 260 (addr_t) iob, 0, 0); 261 if (rc) { 262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 263 "rc=%i\n", dev_name(&card->gdev->dev), rc); 264 atomic_set(&card->read.irq_pending, 0); 265 card->read_or_write_problem = 1; 266 qeth_schedule_recovery(card); 267 wake_up(&card->wait_q); 268 } 269 return rc; 270 } 271 272 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 273 { 274 struct qeth_reply *reply; 275 276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 277 if (reply) { 278 atomic_set(&reply->refcnt, 1); 279 atomic_set(&reply->received, 0); 280 reply->card = card; 281 }; 282 return reply; 283 } 284 285 static void qeth_get_reply(struct qeth_reply *reply) 286 { 287 WARN_ON(atomic_read(&reply->refcnt) <= 0); 288 atomic_inc(&reply->refcnt); 289 } 290 291 static void qeth_put_reply(struct qeth_reply *reply) 292 { 293 WARN_ON(atomic_read(&reply->refcnt) <= 0); 294 if (atomic_dec_and_test(&reply->refcnt)) 295 kfree(reply); 296 } 297 298 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 299 struct qeth_card *card) 300 { 301 char *ipa_name; 302 int com = cmd->hdr.command; 303 ipa_name = qeth_get_ipa_cmd_name(com); 304 if (rc) 305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", 306 ipa_name, com, QETH_CARD_IFNAME(card), 307 rc, qeth_get_ipa_msg(rc)); 308 else 309 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", 310 ipa_name, com, QETH_CARD_IFNAME(card)); 311 } 312 313 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 314 struct qeth_cmd_buffer *iob) 315 { 316 struct qeth_ipa_cmd *cmd = NULL; 317 318 QETH_CARD_TEXT(card, 5, "chkipad"); 319 if (IS_IPA(iob->data)) { 320 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 321 if (IS_IPA_REPLY(cmd)) { 322 if (cmd->hdr.command != IPA_CMD_SETCCID && 323 cmd->hdr.command != IPA_CMD_DELCCID && 324 cmd->hdr.command != IPA_CMD_MODCCID && 325 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 326 qeth_issue_ipa_msg(cmd, 327 cmd->hdr.return_code, card); 328 return cmd; 329 } else { 330 switch (cmd->hdr.command) { 331 case IPA_CMD_STOPLAN: 332 dev_warn(&card->gdev->dev, 333 "The link for interface %s on CHPID" 334 " 0x%X failed\n", 335 QETH_CARD_IFNAME(card), 336 card->info.chpid); 337 card->lan_online = 0; 338 if (card->dev && netif_carrier_ok(card->dev)) 339 netif_carrier_off(card->dev); 340 return NULL; 341 case IPA_CMD_STARTLAN: 342 dev_info(&card->gdev->dev, 343 "The link for %s on CHPID 0x%X has" 344 " been restored\n", 345 QETH_CARD_IFNAME(card), 346 card->info.chpid); 347 netif_carrier_on(card->dev); 348 card->lan_online = 1; 349 qeth_schedule_recovery(card); 350 return NULL; 351 case IPA_CMD_MODCCID: 352 return cmd; 353 case IPA_CMD_REGISTER_LOCAL_ADDR: 354 QETH_CARD_TEXT(card, 3, "irla"); 355 break; 356 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 357 QETH_CARD_TEXT(card, 3, "urla"); 358 break; 359 default: 360 QETH_DBF_MESSAGE(2, "Received data is IPA " 361 "but not a reply!\n"); 362 break; 363 } 364 } 365 } 366 return cmd; 367 } 368 369 void qeth_clear_ipacmd_list(struct qeth_card *card) 370 { 371 struct qeth_reply *reply, *r; 372 unsigned long flags; 373 374 QETH_CARD_TEXT(card, 4, "clipalst"); 375 376 spin_lock_irqsave(&card->lock, flags); 377 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 378 qeth_get_reply(reply); 379 reply->rc = -EIO; 380 atomic_inc(&reply->received); 381 list_del_init(&reply->list); 382 wake_up(&reply->wait_q); 383 qeth_put_reply(reply); 384 } 385 spin_unlock_irqrestore(&card->lock, flags); 386 atomic_set(&card->write.irq_pending, 0); 387 } 388 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 389 390 static int qeth_check_idx_response(struct qeth_card *card, 391 unsigned char *buffer) 392 { 393 if (!buffer) 394 return 0; 395 396 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 397 if ((buffer[2] & 0xc0) == 0xc0) { 398 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 399 "with cause code 0x%02x%s\n", 400 buffer[4], 401 ((buffer[4] == 0x22) ? 402 " -- try another portname" : "")); 403 QETH_CARD_TEXT(card, 2, "ckidxres"); 404 QETH_CARD_TEXT(card, 2, " idxterm"); 405 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 406 if (buffer[4] == 0xf6) { 407 dev_err(&card->gdev->dev, 408 "The qeth device is not configured " 409 "for the OSI layer required by z/VM\n"); 410 return -EPERM; 411 } 412 return -EIO; 413 } 414 return 0; 415 } 416 417 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 418 __u32 len) 419 { 420 struct qeth_card *card; 421 422 card = CARD_FROM_CDEV(channel->ccwdev); 423 QETH_CARD_TEXT(card, 4, "setupccw"); 424 if (channel == &card->read) 425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 426 else 427 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 428 channel->ccw.count = len; 429 channel->ccw.cda = (__u32) __pa(iob); 430 } 431 432 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 433 { 434 __u8 index; 435 436 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 437 index = channel->io_buf_no; 438 do { 439 if (channel->iob[index].state == BUF_STATE_FREE) { 440 channel->iob[index].state = BUF_STATE_LOCKED; 441 channel->io_buf_no = (channel->io_buf_no + 1) % 442 QETH_CMD_BUFFER_NO; 443 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 444 return channel->iob + index; 445 } 446 index = (index + 1) % QETH_CMD_BUFFER_NO; 447 } while (index != channel->io_buf_no); 448 449 return NULL; 450 } 451 452 void qeth_release_buffer(struct qeth_channel *channel, 453 struct qeth_cmd_buffer *iob) 454 { 455 unsigned long flags; 456 457 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 458 spin_lock_irqsave(&channel->iob_lock, flags); 459 memset(iob->data, 0, QETH_BUFSIZE); 460 iob->state = BUF_STATE_FREE; 461 iob->callback = qeth_send_control_data_cb; 462 iob->rc = 0; 463 spin_unlock_irqrestore(&channel->iob_lock, flags); 464 } 465 EXPORT_SYMBOL_GPL(qeth_release_buffer); 466 467 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 468 { 469 struct qeth_cmd_buffer *buffer = NULL; 470 unsigned long flags; 471 472 spin_lock_irqsave(&channel->iob_lock, flags); 473 buffer = __qeth_get_buffer(channel); 474 spin_unlock_irqrestore(&channel->iob_lock, flags); 475 return buffer; 476 } 477 478 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 479 { 480 struct qeth_cmd_buffer *buffer; 481 wait_event(channel->wait_q, 482 ((buffer = qeth_get_buffer(channel)) != NULL)); 483 return buffer; 484 } 485 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 486 487 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 488 { 489 int cnt; 490 491 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 492 qeth_release_buffer(channel, &channel->iob[cnt]); 493 channel->buf_no = 0; 494 channel->io_buf_no = 0; 495 } 496 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 497 498 static void qeth_send_control_data_cb(struct qeth_channel *channel, 499 struct qeth_cmd_buffer *iob) 500 { 501 struct qeth_card *card; 502 struct qeth_reply *reply, *r; 503 struct qeth_ipa_cmd *cmd; 504 unsigned long flags; 505 int keep_reply; 506 int rc = 0; 507 508 card = CARD_FROM_CDEV(channel->ccwdev); 509 QETH_CARD_TEXT(card, 4, "sndctlcb"); 510 rc = qeth_check_idx_response(card, iob->data); 511 switch (rc) { 512 case 0: 513 break; 514 case -EIO: 515 qeth_clear_ipacmd_list(card); 516 qeth_schedule_recovery(card); 517 /* fall through */ 518 default: 519 goto out; 520 } 521 522 cmd = qeth_check_ipa_data(card, iob); 523 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 524 goto out; 525 /*in case of OSN : check if cmd is set */ 526 if (card->info.type == QETH_CARD_TYPE_OSN && 527 cmd && 528 cmd->hdr.command != IPA_CMD_STARTLAN && 529 card->osn_info.assist_cb != NULL) { 530 card->osn_info.assist_cb(card->dev, cmd); 531 goto out; 532 } 533 534 spin_lock_irqsave(&card->lock, flags); 535 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 536 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 537 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 538 qeth_get_reply(reply); 539 list_del_init(&reply->list); 540 spin_unlock_irqrestore(&card->lock, flags); 541 keep_reply = 0; 542 if (reply->callback != NULL) { 543 if (cmd) { 544 reply->offset = (__u16)((char *)cmd - 545 (char *)iob->data); 546 keep_reply = reply->callback(card, 547 reply, 548 (unsigned long)cmd); 549 } else 550 keep_reply = reply->callback(card, 551 reply, 552 (unsigned long)iob); 553 } 554 if (cmd) 555 reply->rc = (u16) cmd->hdr.return_code; 556 else if (iob->rc) 557 reply->rc = iob->rc; 558 if (keep_reply) { 559 spin_lock_irqsave(&card->lock, flags); 560 list_add_tail(&reply->list, 561 &card->cmd_waiter_list); 562 spin_unlock_irqrestore(&card->lock, flags); 563 } else { 564 atomic_inc(&reply->received); 565 wake_up(&reply->wait_q); 566 } 567 qeth_put_reply(reply); 568 goto out; 569 } 570 } 571 spin_unlock_irqrestore(&card->lock, flags); 572 out: 573 memcpy(&card->seqno.pdu_hdr_ack, 574 QETH_PDU_HEADER_SEQ_NO(iob->data), 575 QETH_SEQ_NO_LENGTH); 576 qeth_release_buffer(channel, iob); 577 } 578 579 static int qeth_setup_channel(struct qeth_channel *channel) 580 { 581 int cnt; 582 583 QETH_DBF_TEXT(SETUP, 2, "setupch"); 584 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 585 channel->iob[cnt].data = 586 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 587 if (channel->iob[cnt].data == NULL) 588 break; 589 channel->iob[cnt].state = BUF_STATE_FREE; 590 channel->iob[cnt].channel = channel; 591 channel->iob[cnt].callback = qeth_send_control_data_cb; 592 channel->iob[cnt].rc = 0; 593 } 594 if (cnt < QETH_CMD_BUFFER_NO) { 595 while (cnt-- > 0) 596 kfree(channel->iob[cnt].data); 597 return -ENOMEM; 598 } 599 channel->buf_no = 0; 600 channel->io_buf_no = 0; 601 atomic_set(&channel->irq_pending, 0); 602 spin_lock_init(&channel->iob_lock); 603 604 init_waitqueue_head(&channel->wait_q); 605 return 0; 606 } 607 608 static int qeth_set_thread_start_bit(struct qeth_card *card, 609 unsigned long thread) 610 { 611 unsigned long flags; 612 613 spin_lock_irqsave(&card->thread_mask_lock, flags); 614 if (!(card->thread_allowed_mask & thread) || 615 (card->thread_start_mask & thread)) { 616 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 617 return -EPERM; 618 } 619 card->thread_start_mask |= thread; 620 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 621 return 0; 622 } 623 624 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 625 { 626 unsigned long flags; 627 628 spin_lock_irqsave(&card->thread_mask_lock, flags); 629 card->thread_start_mask &= ~thread; 630 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 631 wake_up(&card->wait_q); 632 } 633 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 634 635 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 636 { 637 unsigned long flags; 638 639 spin_lock_irqsave(&card->thread_mask_lock, flags); 640 card->thread_running_mask &= ~thread; 641 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 642 wake_up(&card->wait_q); 643 } 644 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 645 646 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 647 { 648 unsigned long flags; 649 int rc = 0; 650 651 spin_lock_irqsave(&card->thread_mask_lock, flags); 652 if (card->thread_start_mask & thread) { 653 if ((card->thread_allowed_mask & thread) && 654 !(card->thread_running_mask & thread)) { 655 rc = 1; 656 card->thread_start_mask &= ~thread; 657 card->thread_running_mask |= thread; 658 } else 659 rc = -EPERM; 660 } 661 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 662 return rc; 663 } 664 665 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 666 { 667 int rc = 0; 668 669 wait_event(card->wait_q, 670 (rc = __qeth_do_run_thread(card, thread)) >= 0); 671 return rc; 672 } 673 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 674 675 void qeth_schedule_recovery(struct qeth_card *card) 676 { 677 QETH_CARD_TEXT(card, 2, "startrec"); 678 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 679 schedule_work(&card->kernel_thread_starter); 680 } 681 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 682 683 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 684 { 685 int dstat, cstat; 686 char *sense; 687 struct qeth_card *card; 688 689 sense = (char *) irb->ecw; 690 cstat = irb->scsw.cmd.cstat; 691 dstat = irb->scsw.cmd.dstat; 692 card = CARD_FROM_CDEV(cdev); 693 694 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 695 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 696 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 697 QETH_CARD_TEXT(card, 2, "CGENCHK"); 698 dev_warn(&cdev->dev, "The qeth device driver " 699 "failed to recover an error on the device\n"); 700 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 701 dev_name(&cdev->dev), dstat, cstat); 702 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 703 16, 1, irb, 64, 1); 704 return 1; 705 } 706 707 if (dstat & DEV_STAT_UNIT_CHECK) { 708 if (sense[SENSE_RESETTING_EVENT_BYTE] & 709 SENSE_RESETTING_EVENT_FLAG) { 710 QETH_CARD_TEXT(card, 2, "REVIND"); 711 return 1; 712 } 713 if (sense[SENSE_COMMAND_REJECT_BYTE] & 714 SENSE_COMMAND_REJECT_FLAG) { 715 QETH_CARD_TEXT(card, 2, "CMDREJi"); 716 return 1; 717 } 718 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 719 QETH_CARD_TEXT(card, 2, "AFFE"); 720 return 1; 721 } 722 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 723 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 724 return 0; 725 } 726 QETH_CARD_TEXT(card, 2, "DGENCHK"); 727 return 1; 728 } 729 return 0; 730 } 731 732 static long __qeth_check_irb_error(struct ccw_device *cdev, 733 unsigned long intparm, struct irb *irb) 734 { 735 struct qeth_card *card; 736 737 card = CARD_FROM_CDEV(cdev); 738 739 if (!IS_ERR(irb)) 740 return 0; 741 742 switch (PTR_ERR(irb)) { 743 case -EIO: 744 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 745 dev_name(&cdev->dev)); 746 QETH_CARD_TEXT(card, 2, "ckirberr"); 747 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 748 break; 749 case -ETIMEDOUT: 750 dev_warn(&cdev->dev, "A hardware operation timed out" 751 " on the device\n"); 752 QETH_CARD_TEXT(card, 2, "ckirberr"); 753 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 754 if (intparm == QETH_RCD_PARM) { 755 if (card && (card->data.ccwdev == cdev)) { 756 card->data.state = CH_STATE_DOWN; 757 wake_up(&card->wait_q); 758 } 759 } 760 break; 761 default: 762 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 763 dev_name(&cdev->dev), PTR_ERR(irb)); 764 QETH_CARD_TEXT(card, 2, "ckirberr"); 765 QETH_CARD_TEXT(card, 2, " rc???"); 766 } 767 return PTR_ERR(irb); 768 } 769 770 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 771 struct irb *irb) 772 { 773 int rc; 774 int cstat, dstat; 775 struct qeth_cmd_buffer *buffer; 776 struct qeth_channel *channel; 777 struct qeth_card *card; 778 struct qeth_cmd_buffer *iob; 779 __u8 index; 780 781 if (__qeth_check_irb_error(cdev, intparm, irb)) 782 return; 783 cstat = irb->scsw.cmd.cstat; 784 dstat = irb->scsw.cmd.dstat; 785 786 card = CARD_FROM_CDEV(cdev); 787 if (!card) 788 return; 789 790 QETH_CARD_TEXT(card, 5, "irq"); 791 792 if (card->read.ccwdev == cdev) { 793 channel = &card->read; 794 QETH_CARD_TEXT(card, 5, "read"); 795 } else if (card->write.ccwdev == cdev) { 796 channel = &card->write; 797 QETH_CARD_TEXT(card, 5, "write"); 798 } else { 799 channel = &card->data; 800 QETH_CARD_TEXT(card, 5, "data"); 801 } 802 atomic_set(&channel->irq_pending, 0); 803 804 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 805 channel->state = CH_STATE_STOPPED; 806 807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 808 channel->state = CH_STATE_HALTED; 809 810 /*let's wake up immediately on data channel*/ 811 if ((channel == &card->data) && (intparm != 0) && 812 (intparm != QETH_RCD_PARM)) 813 goto out; 814 815 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 816 QETH_CARD_TEXT(card, 6, "clrchpar"); 817 /* we don't have to handle this further */ 818 intparm = 0; 819 } 820 if (intparm == QETH_HALT_CHANNEL_PARM) { 821 QETH_CARD_TEXT(card, 6, "hltchpar"); 822 /* we don't have to handle this further */ 823 intparm = 0; 824 } 825 if ((dstat & DEV_STAT_UNIT_EXCEP) || 826 (dstat & DEV_STAT_UNIT_CHECK) || 827 (cstat)) { 828 if (irb->esw.esw0.erw.cons) { 829 dev_warn(&channel->ccwdev->dev, 830 "The qeth device driver failed to recover " 831 "an error on the device\n"); 832 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 833 "0x%X dstat 0x%X\n", 834 dev_name(&channel->ccwdev->dev), cstat, dstat); 835 print_hex_dump(KERN_WARNING, "qeth: irb ", 836 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 837 print_hex_dump(KERN_WARNING, "qeth: sense data ", 838 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 839 } 840 if (intparm == QETH_RCD_PARM) { 841 channel->state = CH_STATE_DOWN; 842 goto out; 843 } 844 rc = qeth_get_problem(cdev, irb); 845 if (rc) { 846 qeth_clear_ipacmd_list(card); 847 qeth_schedule_recovery(card); 848 goto out; 849 } 850 } 851 852 if (intparm == QETH_RCD_PARM) { 853 channel->state = CH_STATE_RCD_DONE; 854 goto out; 855 } 856 if (intparm) { 857 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 858 buffer->state = BUF_STATE_PROCESSED; 859 } 860 if (channel == &card->data) 861 return; 862 if (channel == &card->read && 863 channel->state == CH_STATE_UP) 864 qeth_issue_next_read(card); 865 866 iob = channel->iob; 867 index = channel->buf_no; 868 while (iob[index].state == BUF_STATE_PROCESSED) { 869 if (iob[index].callback != NULL) 870 iob[index].callback(channel, iob + index); 871 872 index = (index + 1) % QETH_CMD_BUFFER_NO; 873 } 874 channel->buf_no = index; 875 out: 876 wake_up(&card->wait_q); 877 return; 878 } 879 880 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 881 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb) 882 { 883 int i; 884 struct sk_buff *skb; 885 886 /* is PCI flag set on buffer? */ 887 if (buf->buffer->element[0].flags & 0x40) 888 atomic_dec(&queue->set_pci_flags_count); 889 890 if (!qeth_skip_skb) { 891 skb = skb_dequeue(&buf->skb_list); 892 while (skb) { 893 atomic_dec(&skb->users); 894 dev_kfree_skb_any(skb); 895 skb = skb_dequeue(&buf->skb_list); 896 } 897 } 898 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 899 if (buf->buffer->element[i].addr && buf->is_header[i]) 900 kmem_cache_free(qeth_core_header_cache, 901 buf->buffer->element[i].addr); 902 buf->is_header[i] = 0; 903 buf->buffer->element[i].length = 0; 904 buf->buffer->element[i].addr = NULL; 905 buf->buffer->element[i].flags = 0; 906 } 907 buf->buffer->element[15].flags = 0; 908 buf->next_element_to_fill = 0; 909 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 910 } 911 912 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 913 struct qeth_qdio_out_buffer *buf) 914 { 915 __qeth_clear_output_buffer(queue, buf, 0); 916 } 917 918 void qeth_clear_qdio_buffers(struct qeth_card *card) 919 { 920 int i, j; 921 922 QETH_CARD_TEXT(card, 2, "clearqdbf"); 923 /* clear outbound buffers to free skbs */ 924 for (i = 0; i < card->qdio.no_out_queues; ++i) 925 if (card->qdio.out_qs[i]) { 926 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 927 qeth_clear_output_buffer(card->qdio.out_qs[i], 928 &card->qdio.out_qs[i]->bufs[j]); 929 } 930 } 931 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 932 933 static void qeth_free_buffer_pool(struct qeth_card *card) 934 { 935 struct qeth_buffer_pool_entry *pool_entry, *tmp; 936 int i = 0; 937 list_for_each_entry_safe(pool_entry, tmp, 938 &card->qdio.init_pool.entry_list, init_list){ 939 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 940 free_page((unsigned long)pool_entry->elements[i]); 941 list_del(&pool_entry->init_list); 942 kfree(pool_entry); 943 } 944 } 945 946 static void qeth_free_qdio_buffers(struct qeth_card *card) 947 { 948 int i, j; 949 950 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 951 QETH_QDIO_UNINITIALIZED) 952 return; 953 kfree(card->qdio.in_q); 954 card->qdio.in_q = NULL; 955 /* inbound buffer pool */ 956 qeth_free_buffer_pool(card); 957 /* free outbound qdio_qs */ 958 if (card->qdio.out_qs) { 959 for (i = 0; i < card->qdio.no_out_queues; ++i) { 960 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 961 qeth_clear_output_buffer(card->qdio.out_qs[i], 962 &card->qdio.out_qs[i]->bufs[j]); 963 kfree(card->qdio.out_qs[i]); 964 } 965 kfree(card->qdio.out_qs); 966 card->qdio.out_qs = NULL; 967 } 968 } 969 970 static void qeth_clean_channel(struct qeth_channel *channel) 971 { 972 int cnt; 973 974 QETH_DBF_TEXT(SETUP, 2, "freech"); 975 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 976 kfree(channel->iob[cnt].data); 977 } 978 979 static void qeth_get_channel_path_desc(struct qeth_card *card) 980 { 981 struct ccw_device *ccwdev; 982 struct channelPath_dsc { 983 u8 flags; 984 u8 lsn; 985 u8 desc; 986 u8 chpid; 987 u8 swla; 988 u8 zeroes; 989 u8 chla; 990 u8 chpp; 991 } *chp_dsc; 992 993 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 994 995 ccwdev = card->data.ccwdev; 996 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 997 if (chp_dsc != NULL) { 998 /* CHPP field bit 6 == 1 -> single queue */ 999 if ((chp_dsc->chpp & 0x02) == 0x02) 1000 card->qdio.no_out_queues = 1; 1001 card->info.func_level = 0x4100 + chp_dsc->desc; 1002 kfree(chp_dsc); 1003 } 1004 if (card->qdio.no_out_queues == 1) { 1005 card->qdio.default_out_queue = 0; 1006 dev_info(&card->gdev->dev, 1007 "Priority Queueing not supported\n"); 1008 } 1009 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1010 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1011 return; 1012 } 1013 1014 static void qeth_init_qdio_info(struct qeth_card *card) 1015 { 1016 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1017 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1018 /* inbound */ 1019 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1020 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1021 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1022 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1023 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1024 } 1025 1026 static void qeth_set_intial_options(struct qeth_card *card) 1027 { 1028 card->options.route4.type = NO_ROUTER; 1029 card->options.route6.type = NO_ROUTER; 1030 card->options.checksum_type = QETH_CHECKSUM_DEFAULT; 1031 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1032 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1033 card->options.fake_broadcast = 0; 1034 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1035 card->options.performance_stats = 0; 1036 card->options.rx_sg_cb = QETH_RX_SG_CB; 1037 card->options.isolation = ISOLATION_MODE_NONE; 1038 } 1039 1040 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1041 { 1042 unsigned long flags; 1043 int rc = 0; 1044 1045 spin_lock_irqsave(&card->thread_mask_lock, flags); 1046 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1047 (u8) card->thread_start_mask, 1048 (u8) card->thread_allowed_mask, 1049 (u8) card->thread_running_mask); 1050 rc = (card->thread_start_mask & thread); 1051 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1052 return rc; 1053 } 1054 1055 static void qeth_start_kernel_thread(struct work_struct *work) 1056 { 1057 struct qeth_card *card = container_of(work, struct qeth_card, 1058 kernel_thread_starter); 1059 QETH_CARD_TEXT(card , 2, "strthrd"); 1060 1061 if (card->read.state != CH_STATE_UP && 1062 card->write.state != CH_STATE_UP) 1063 return; 1064 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1065 kthread_run(card->discipline.recover, (void *) card, 1066 "qeth_recover"); 1067 } 1068 1069 static int qeth_setup_card(struct qeth_card *card) 1070 { 1071 1072 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1073 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1074 1075 card->read.state = CH_STATE_DOWN; 1076 card->write.state = CH_STATE_DOWN; 1077 card->data.state = CH_STATE_DOWN; 1078 card->state = CARD_STATE_DOWN; 1079 card->lan_online = 0; 1080 card->use_hard_stop = 0; 1081 card->read_or_write_problem = 0; 1082 card->dev = NULL; 1083 spin_lock_init(&card->vlanlock); 1084 spin_lock_init(&card->mclock); 1085 card->vlangrp = NULL; 1086 spin_lock_init(&card->lock); 1087 spin_lock_init(&card->ip_lock); 1088 spin_lock_init(&card->thread_mask_lock); 1089 mutex_init(&card->conf_mutex); 1090 mutex_init(&card->discipline_mutex); 1091 card->thread_start_mask = 0; 1092 card->thread_allowed_mask = 0; 1093 card->thread_running_mask = 0; 1094 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1095 INIT_LIST_HEAD(&card->ip_list); 1096 INIT_LIST_HEAD(card->ip_tbd_list); 1097 INIT_LIST_HEAD(&card->cmd_waiter_list); 1098 init_waitqueue_head(&card->wait_q); 1099 /* intial options */ 1100 qeth_set_intial_options(card); 1101 /* IP address takeover */ 1102 INIT_LIST_HEAD(&card->ipato.entries); 1103 card->ipato.enabled = 0; 1104 card->ipato.invert4 = 0; 1105 card->ipato.invert6 = 0; 1106 /* init QDIO stuff */ 1107 qeth_init_qdio_info(card); 1108 return 0; 1109 } 1110 1111 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1112 { 1113 struct qeth_card *card = container_of(slr, struct qeth_card, 1114 qeth_service_level); 1115 if (card->info.mcl_level[0]) 1116 seq_printf(m, "qeth: %s firmware level %s\n", 1117 CARD_BUS_ID(card), card->info.mcl_level); 1118 } 1119 1120 static struct qeth_card *qeth_alloc_card(void) 1121 { 1122 struct qeth_card *card; 1123 1124 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1125 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1126 if (!card) 1127 goto out; 1128 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1129 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1130 if (!card->ip_tbd_list) { 1131 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1132 goto out_card; 1133 } 1134 if (qeth_setup_channel(&card->read)) 1135 goto out_ip; 1136 if (qeth_setup_channel(&card->write)) 1137 goto out_channel; 1138 card->options.layer2 = -1; 1139 card->qeth_service_level.seq_print = qeth_core_sl_print; 1140 register_service_level(&card->qeth_service_level); 1141 return card; 1142 1143 out_channel: 1144 qeth_clean_channel(&card->read); 1145 out_ip: 1146 kfree(card->ip_tbd_list); 1147 out_card: 1148 kfree(card); 1149 out: 1150 return NULL; 1151 } 1152 1153 static int qeth_determine_card_type(struct qeth_card *card) 1154 { 1155 int i = 0; 1156 1157 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1158 1159 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1160 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1161 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1162 if ((CARD_RDEV(card)->id.dev_type == 1163 known_devices[i][QETH_DEV_TYPE_IND]) && 1164 (CARD_RDEV(card)->id.dev_model == 1165 known_devices[i][QETH_DEV_MODEL_IND])) { 1166 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1167 card->qdio.no_out_queues = 1168 known_devices[i][QETH_QUEUE_NO_IND]; 1169 card->info.is_multicast_different = 1170 known_devices[i][QETH_MULTICAST_IND]; 1171 qeth_get_channel_path_desc(card); 1172 return 0; 1173 } 1174 i++; 1175 } 1176 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1177 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1178 "unknown type\n"); 1179 return -ENOENT; 1180 } 1181 1182 static int qeth_clear_channel(struct qeth_channel *channel) 1183 { 1184 unsigned long flags; 1185 struct qeth_card *card; 1186 int rc; 1187 1188 card = CARD_FROM_CDEV(channel->ccwdev); 1189 QETH_CARD_TEXT(card, 3, "clearch"); 1190 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1191 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1192 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1193 1194 if (rc) 1195 return rc; 1196 rc = wait_event_interruptible_timeout(card->wait_q, 1197 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1198 if (rc == -ERESTARTSYS) 1199 return rc; 1200 if (channel->state != CH_STATE_STOPPED) 1201 return -ETIME; 1202 channel->state = CH_STATE_DOWN; 1203 return 0; 1204 } 1205 1206 static int qeth_halt_channel(struct qeth_channel *channel) 1207 { 1208 unsigned long flags; 1209 struct qeth_card *card; 1210 int rc; 1211 1212 card = CARD_FROM_CDEV(channel->ccwdev); 1213 QETH_CARD_TEXT(card, 3, "haltch"); 1214 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1215 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1216 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1217 1218 if (rc) 1219 return rc; 1220 rc = wait_event_interruptible_timeout(card->wait_q, 1221 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1222 if (rc == -ERESTARTSYS) 1223 return rc; 1224 if (channel->state != CH_STATE_HALTED) 1225 return -ETIME; 1226 return 0; 1227 } 1228 1229 static int qeth_halt_channels(struct qeth_card *card) 1230 { 1231 int rc1 = 0, rc2 = 0, rc3 = 0; 1232 1233 QETH_CARD_TEXT(card, 3, "haltchs"); 1234 rc1 = qeth_halt_channel(&card->read); 1235 rc2 = qeth_halt_channel(&card->write); 1236 rc3 = qeth_halt_channel(&card->data); 1237 if (rc1) 1238 return rc1; 1239 if (rc2) 1240 return rc2; 1241 return rc3; 1242 } 1243 1244 static int qeth_clear_channels(struct qeth_card *card) 1245 { 1246 int rc1 = 0, rc2 = 0, rc3 = 0; 1247 1248 QETH_CARD_TEXT(card, 3, "clearchs"); 1249 rc1 = qeth_clear_channel(&card->read); 1250 rc2 = qeth_clear_channel(&card->write); 1251 rc3 = qeth_clear_channel(&card->data); 1252 if (rc1) 1253 return rc1; 1254 if (rc2) 1255 return rc2; 1256 return rc3; 1257 } 1258 1259 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1260 { 1261 int rc = 0; 1262 1263 QETH_CARD_TEXT(card, 3, "clhacrd"); 1264 1265 if (halt) 1266 rc = qeth_halt_channels(card); 1267 if (rc) 1268 return rc; 1269 return qeth_clear_channels(card); 1270 } 1271 1272 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1273 { 1274 int rc = 0; 1275 1276 QETH_CARD_TEXT(card, 3, "qdioclr"); 1277 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1278 QETH_QDIO_CLEANING)) { 1279 case QETH_QDIO_ESTABLISHED: 1280 if (card->info.type == QETH_CARD_TYPE_IQD) 1281 rc = qdio_shutdown(CARD_DDEV(card), 1282 QDIO_FLAG_CLEANUP_USING_HALT); 1283 else 1284 rc = qdio_shutdown(CARD_DDEV(card), 1285 QDIO_FLAG_CLEANUP_USING_CLEAR); 1286 if (rc) 1287 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1288 qdio_free(CARD_DDEV(card)); 1289 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1290 break; 1291 case QETH_QDIO_CLEANING: 1292 return rc; 1293 default: 1294 break; 1295 } 1296 rc = qeth_clear_halt_card(card, use_halt); 1297 if (rc) 1298 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1299 card->state = CARD_STATE_DOWN; 1300 return rc; 1301 } 1302 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1303 1304 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1305 int *length) 1306 { 1307 struct ciw *ciw; 1308 char *rcd_buf; 1309 int ret; 1310 struct qeth_channel *channel = &card->data; 1311 unsigned long flags; 1312 1313 /* 1314 * scan for RCD command in extended SenseID data 1315 */ 1316 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1317 if (!ciw || ciw->cmd == 0) 1318 return -EOPNOTSUPP; 1319 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1320 if (!rcd_buf) 1321 return -ENOMEM; 1322 1323 channel->ccw.cmd_code = ciw->cmd; 1324 channel->ccw.cda = (__u32) __pa(rcd_buf); 1325 channel->ccw.count = ciw->count; 1326 channel->ccw.flags = CCW_FLAG_SLI; 1327 channel->state = CH_STATE_RCD; 1328 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1329 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1330 QETH_RCD_PARM, LPM_ANYPATH, 0, 1331 QETH_RCD_TIMEOUT); 1332 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1333 if (!ret) 1334 wait_event(card->wait_q, 1335 (channel->state == CH_STATE_RCD_DONE || 1336 channel->state == CH_STATE_DOWN)); 1337 if (channel->state == CH_STATE_DOWN) 1338 ret = -EIO; 1339 else 1340 channel->state = CH_STATE_DOWN; 1341 if (ret) { 1342 kfree(rcd_buf); 1343 *buffer = NULL; 1344 *length = 0; 1345 } else { 1346 *length = ciw->count; 1347 *buffer = rcd_buf; 1348 } 1349 return ret; 1350 } 1351 1352 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1353 { 1354 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1355 card->info.chpid = prcd[30]; 1356 card->info.unit_addr2 = prcd[31]; 1357 card->info.cula = prcd[63]; 1358 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1359 (prcd[0x11] == _ascebc['M'])); 1360 } 1361 1362 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1363 { 1364 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1365 1366 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) { 1367 card->info.blkt.time_total = 250; 1368 card->info.blkt.inter_packet = 5; 1369 card->info.blkt.inter_packet_jumbo = 15; 1370 } else { 1371 card->info.blkt.time_total = 0; 1372 card->info.blkt.inter_packet = 0; 1373 card->info.blkt.inter_packet_jumbo = 0; 1374 } 1375 } 1376 1377 static void qeth_init_tokens(struct qeth_card *card) 1378 { 1379 card->token.issuer_rm_w = 0x00010103UL; 1380 card->token.cm_filter_w = 0x00010108UL; 1381 card->token.cm_connection_w = 0x0001010aUL; 1382 card->token.ulp_filter_w = 0x0001010bUL; 1383 card->token.ulp_connection_w = 0x0001010dUL; 1384 } 1385 1386 static void qeth_init_func_level(struct qeth_card *card) 1387 { 1388 switch (card->info.type) { 1389 case QETH_CARD_TYPE_IQD: 1390 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1391 break; 1392 case QETH_CARD_TYPE_OSD: 1393 case QETH_CARD_TYPE_OSN: 1394 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1395 break; 1396 default: 1397 break; 1398 } 1399 } 1400 1401 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1402 void (*idx_reply_cb)(struct qeth_channel *, 1403 struct qeth_cmd_buffer *)) 1404 { 1405 struct qeth_cmd_buffer *iob; 1406 unsigned long flags; 1407 int rc; 1408 struct qeth_card *card; 1409 1410 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1411 card = CARD_FROM_CDEV(channel->ccwdev); 1412 iob = qeth_get_buffer(channel); 1413 iob->callback = idx_reply_cb; 1414 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1415 channel->ccw.count = QETH_BUFSIZE; 1416 channel->ccw.cda = (__u32) __pa(iob->data); 1417 1418 wait_event(card->wait_q, 1419 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1420 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1421 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1422 rc = ccw_device_start(channel->ccwdev, 1423 &channel->ccw, (addr_t) iob, 0, 0); 1424 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1425 1426 if (rc) { 1427 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1428 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1429 atomic_set(&channel->irq_pending, 0); 1430 wake_up(&card->wait_q); 1431 return rc; 1432 } 1433 rc = wait_event_interruptible_timeout(card->wait_q, 1434 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1435 if (rc == -ERESTARTSYS) 1436 return rc; 1437 if (channel->state != CH_STATE_UP) { 1438 rc = -ETIME; 1439 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1440 qeth_clear_cmd_buffers(channel); 1441 } else 1442 rc = 0; 1443 return rc; 1444 } 1445 1446 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1447 void (*idx_reply_cb)(struct qeth_channel *, 1448 struct qeth_cmd_buffer *)) 1449 { 1450 struct qeth_card *card; 1451 struct qeth_cmd_buffer *iob; 1452 unsigned long flags; 1453 __u16 temp; 1454 __u8 tmp; 1455 int rc; 1456 struct ccw_dev_id temp_devid; 1457 1458 card = CARD_FROM_CDEV(channel->ccwdev); 1459 1460 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1461 1462 iob = qeth_get_buffer(channel); 1463 iob->callback = idx_reply_cb; 1464 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1465 channel->ccw.count = IDX_ACTIVATE_SIZE; 1466 channel->ccw.cda = (__u32) __pa(iob->data); 1467 if (channel == &card->write) { 1468 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1469 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1470 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1471 card->seqno.trans_hdr++; 1472 } else { 1473 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1474 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1475 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1476 } 1477 tmp = ((__u8)card->info.portno) | 0x80; 1478 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1479 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1480 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1481 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1482 &card->info.func_level, sizeof(__u16)); 1483 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1484 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1485 temp = (card->info.cula << 8) + card->info.unit_addr2; 1486 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1487 1488 wait_event(card->wait_q, 1489 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1490 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1491 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1492 rc = ccw_device_start(channel->ccwdev, 1493 &channel->ccw, (addr_t) iob, 0, 0); 1494 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1495 1496 if (rc) { 1497 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1498 rc); 1499 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1500 atomic_set(&channel->irq_pending, 0); 1501 wake_up(&card->wait_q); 1502 return rc; 1503 } 1504 rc = wait_event_interruptible_timeout(card->wait_q, 1505 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1506 if (rc == -ERESTARTSYS) 1507 return rc; 1508 if (channel->state != CH_STATE_ACTIVATING) { 1509 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1510 " failed to recover an error on the device\n"); 1511 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1512 dev_name(&channel->ccwdev->dev)); 1513 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1514 qeth_clear_cmd_buffers(channel); 1515 return -ETIME; 1516 } 1517 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1518 } 1519 1520 static int qeth_peer_func_level(int level) 1521 { 1522 if ((level & 0xff) == 8) 1523 return (level & 0xff) + 0x400; 1524 if (((level >> 8) & 3) == 1) 1525 return (level & 0xff) + 0x200; 1526 return level; 1527 } 1528 1529 static void qeth_idx_write_cb(struct qeth_channel *channel, 1530 struct qeth_cmd_buffer *iob) 1531 { 1532 struct qeth_card *card; 1533 __u16 temp; 1534 1535 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1536 1537 if (channel->state == CH_STATE_DOWN) { 1538 channel->state = CH_STATE_ACTIVATING; 1539 goto out; 1540 } 1541 card = CARD_FROM_CDEV(channel->ccwdev); 1542 1543 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1544 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1545 dev_err(&card->write.ccwdev->dev, 1546 "The adapter is used exclusively by another " 1547 "host\n"); 1548 else 1549 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1550 " negative reply\n", 1551 dev_name(&card->write.ccwdev->dev)); 1552 goto out; 1553 } 1554 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1555 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1556 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1557 "function level mismatch (sent: 0x%x, received: " 1558 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1559 card->info.func_level, temp); 1560 goto out; 1561 } 1562 channel->state = CH_STATE_UP; 1563 out: 1564 qeth_release_buffer(channel, iob); 1565 } 1566 1567 static void qeth_idx_read_cb(struct qeth_channel *channel, 1568 struct qeth_cmd_buffer *iob) 1569 { 1570 struct qeth_card *card; 1571 __u16 temp; 1572 1573 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1574 if (channel->state == CH_STATE_DOWN) { 1575 channel->state = CH_STATE_ACTIVATING; 1576 goto out; 1577 } 1578 1579 card = CARD_FROM_CDEV(channel->ccwdev); 1580 if (qeth_check_idx_response(card, iob->data)) 1581 goto out; 1582 1583 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1584 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1585 case QETH_IDX_ACT_ERR_EXCL: 1586 dev_err(&card->write.ccwdev->dev, 1587 "The adapter is used exclusively by another " 1588 "host\n"); 1589 break; 1590 case QETH_IDX_ACT_ERR_AUTH: 1591 case QETH_IDX_ACT_ERR_AUTH_USER: 1592 dev_err(&card->read.ccwdev->dev, 1593 "Setting the device online failed because of " 1594 "insufficient authorization\n"); 1595 break; 1596 default: 1597 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1598 " negative reply\n", 1599 dev_name(&card->read.ccwdev->dev)); 1600 } 1601 QETH_CARD_TEXT_(card, 2, "idxread%c", 1602 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1603 goto out; 1604 } 1605 1606 /** 1607 * * temporary fix for microcode bug 1608 * * to revert it,replace OR by AND 1609 * */ 1610 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1611 (card->info.type == QETH_CARD_TYPE_OSD)) 1612 card->info.portname_required = 1; 1613 1614 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1615 if (temp != qeth_peer_func_level(card->info.func_level)) { 1616 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1617 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1618 dev_name(&card->read.ccwdev->dev), 1619 card->info.func_level, temp); 1620 goto out; 1621 } 1622 memcpy(&card->token.issuer_rm_r, 1623 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1624 QETH_MPC_TOKEN_LENGTH); 1625 memcpy(&card->info.mcl_level[0], 1626 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1627 channel->state = CH_STATE_UP; 1628 out: 1629 qeth_release_buffer(channel, iob); 1630 } 1631 1632 void qeth_prepare_control_data(struct qeth_card *card, int len, 1633 struct qeth_cmd_buffer *iob) 1634 { 1635 qeth_setup_ccw(&card->write, iob->data, len); 1636 iob->callback = qeth_release_buffer; 1637 1638 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1639 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1640 card->seqno.trans_hdr++; 1641 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1642 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1643 card->seqno.pdu_hdr++; 1644 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1645 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1646 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1647 } 1648 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1649 1650 int qeth_send_control_data(struct qeth_card *card, int len, 1651 struct qeth_cmd_buffer *iob, 1652 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1653 unsigned long), 1654 void *reply_param) 1655 { 1656 int rc; 1657 unsigned long flags; 1658 struct qeth_reply *reply = NULL; 1659 unsigned long timeout, event_timeout; 1660 struct qeth_ipa_cmd *cmd; 1661 1662 QETH_CARD_TEXT(card, 2, "sendctl"); 1663 1664 if (card->read_or_write_problem) { 1665 qeth_release_buffer(iob->channel, iob); 1666 return -EIO; 1667 } 1668 reply = qeth_alloc_reply(card); 1669 if (!reply) { 1670 return -ENOMEM; 1671 } 1672 reply->callback = reply_cb; 1673 reply->param = reply_param; 1674 if (card->state == CARD_STATE_DOWN) 1675 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1676 else 1677 reply->seqno = card->seqno.ipa++; 1678 init_waitqueue_head(&reply->wait_q); 1679 spin_lock_irqsave(&card->lock, flags); 1680 list_add_tail(&reply->list, &card->cmd_waiter_list); 1681 spin_unlock_irqrestore(&card->lock, flags); 1682 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1683 1684 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1685 qeth_prepare_control_data(card, len, iob); 1686 1687 if (IS_IPA(iob->data)) 1688 event_timeout = QETH_IPA_TIMEOUT; 1689 else 1690 event_timeout = QETH_TIMEOUT; 1691 timeout = jiffies + event_timeout; 1692 1693 QETH_CARD_TEXT(card, 6, "noirqpnd"); 1694 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1695 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1696 (addr_t) iob, 0, 0); 1697 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1698 if (rc) { 1699 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1700 "ccw_device_start rc = %i\n", 1701 dev_name(&card->write.ccwdev->dev), rc); 1702 QETH_CARD_TEXT_(card, 2, " err%d", rc); 1703 spin_lock_irqsave(&card->lock, flags); 1704 list_del_init(&reply->list); 1705 qeth_put_reply(reply); 1706 spin_unlock_irqrestore(&card->lock, flags); 1707 qeth_release_buffer(iob->channel, iob); 1708 atomic_set(&card->write.irq_pending, 0); 1709 wake_up(&card->wait_q); 1710 return rc; 1711 } 1712 1713 /* we have only one long running ipassist, since we can ensure 1714 process context of this command we can sleep */ 1715 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1716 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1717 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1718 if (!wait_event_timeout(reply->wait_q, 1719 atomic_read(&reply->received), event_timeout)) 1720 goto time_err; 1721 } else { 1722 while (!atomic_read(&reply->received)) { 1723 if (time_after(jiffies, timeout)) 1724 goto time_err; 1725 cpu_relax(); 1726 }; 1727 } 1728 1729 rc = reply->rc; 1730 qeth_put_reply(reply); 1731 return rc; 1732 1733 time_err: 1734 spin_lock_irqsave(&reply->card->lock, flags); 1735 list_del_init(&reply->list); 1736 spin_unlock_irqrestore(&reply->card->lock, flags); 1737 reply->rc = -ETIME; 1738 atomic_inc(&reply->received); 1739 atomic_set(&card->write.irq_pending, 0); 1740 qeth_release_buffer(iob->channel, iob); 1741 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 1742 wake_up(&reply->wait_q); 1743 rc = reply->rc; 1744 qeth_put_reply(reply); 1745 return rc; 1746 } 1747 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1748 1749 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1750 unsigned long data) 1751 { 1752 struct qeth_cmd_buffer *iob; 1753 1754 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1755 1756 iob = (struct qeth_cmd_buffer *) data; 1757 memcpy(&card->token.cm_filter_r, 1758 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1759 QETH_MPC_TOKEN_LENGTH); 1760 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1761 return 0; 1762 } 1763 1764 static int qeth_cm_enable(struct qeth_card *card) 1765 { 1766 int rc; 1767 struct qeth_cmd_buffer *iob; 1768 1769 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1770 1771 iob = qeth_wait_for_buffer(&card->write); 1772 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1773 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1774 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1775 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1776 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1777 1778 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1779 qeth_cm_enable_cb, NULL); 1780 return rc; 1781 } 1782 1783 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1784 unsigned long data) 1785 { 1786 1787 struct qeth_cmd_buffer *iob; 1788 1789 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1790 1791 iob = (struct qeth_cmd_buffer *) data; 1792 memcpy(&card->token.cm_connection_r, 1793 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1794 QETH_MPC_TOKEN_LENGTH); 1795 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1796 return 0; 1797 } 1798 1799 static int qeth_cm_setup(struct qeth_card *card) 1800 { 1801 int rc; 1802 struct qeth_cmd_buffer *iob; 1803 1804 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1805 1806 iob = qeth_wait_for_buffer(&card->write); 1807 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1808 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1809 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1810 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1811 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1812 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1813 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1814 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1815 qeth_cm_setup_cb, NULL); 1816 return rc; 1817 1818 } 1819 1820 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1821 { 1822 switch (card->info.type) { 1823 case QETH_CARD_TYPE_UNKNOWN: 1824 return 1500; 1825 case QETH_CARD_TYPE_IQD: 1826 return card->info.max_mtu; 1827 case QETH_CARD_TYPE_OSD: 1828 switch (card->info.link_type) { 1829 case QETH_LINK_TYPE_HSTR: 1830 case QETH_LINK_TYPE_LANE_TR: 1831 return 2000; 1832 default: 1833 return 1492; 1834 } 1835 case QETH_CARD_TYPE_OSM: 1836 case QETH_CARD_TYPE_OSX: 1837 return 1492; 1838 default: 1839 return 1500; 1840 } 1841 } 1842 1843 static inline int qeth_get_max_mtu_for_card(int cardtype) 1844 { 1845 switch (cardtype) { 1846 1847 case QETH_CARD_TYPE_UNKNOWN: 1848 case QETH_CARD_TYPE_OSD: 1849 case QETH_CARD_TYPE_OSN: 1850 case QETH_CARD_TYPE_OSM: 1851 case QETH_CARD_TYPE_OSX: 1852 return 61440; 1853 case QETH_CARD_TYPE_IQD: 1854 return 57344; 1855 default: 1856 return 1500; 1857 } 1858 } 1859 1860 static inline int qeth_get_mtu_out_of_mpc(int cardtype) 1861 { 1862 switch (cardtype) { 1863 case QETH_CARD_TYPE_IQD: 1864 return 1; 1865 default: 1866 return 0; 1867 } 1868 } 1869 1870 static inline int qeth_get_mtu_outof_framesize(int framesize) 1871 { 1872 switch (framesize) { 1873 case 0x4000: 1874 return 8192; 1875 case 0x6000: 1876 return 16384; 1877 case 0xa000: 1878 return 32768; 1879 case 0xffff: 1880 return 57344; 1881 default: 1882 return 0; 1883 } 1884 } 1885 1886 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1887 { 1888 switch (card->info.type) { 1889 case QETH_CARD_TYPE_OSD: 1890 case QETH_CARD_TYPE_OSM: 1891 case QETH_CARD_TYPE_OSX: 1892 return ((mtu >= 576) && (mtu <= 61440)); 1893 case QETH_CARD_TYPE_IQD: 1894 return ((mtu >= 576) && 1895 (mtu <= card->info.max_mtu + 4096 - 32)); 1896 case QETH_CARD_TYPE_OSN: 1897 case QETH_CARD_TYPE_UNKNOWN: 1898 default: 1899 return 1; 1900 } 1901 } 1902 1903 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1904 unsigned long data) 1905 { 1906 1907 __u16 mtu, framesize; 1908 __u16 len; 1909 __u8 link_type; 1910 struct qeth_cmd_buffer *iob; 1911 1912 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1913 1914 iob = (struct qeth_cmd_buffer *) data; 1915 memcpy(&card->token.ulp_filter_r, 1916 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1917 QETH_MPC_TOKEN_LENGTH); 1918 if (qeth_get_mtu_out_of_mpc(card->info.type)) { 1919 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1920 mtu = qeth_get_mtu_outof_framesize(framesize); 1921 if (!mtu) { 1922 iob->rc = -EINVAL; 1923 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1924 return 0; 1925 } 1926 card->info.max_mtu = mtu; 1927 card->info.initial_mtu = mtu; 1928 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1929 } else { 1930 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1931 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); 1932 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1933 } 1934 1935 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1936 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1937 memcpy(&link_type, 1938 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1939 card->info.link_type = link_type; 1940 } else 1941 card->info.link_type = 0; 1942 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 1943 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1944 return 0; 1945 } 1946 1947 static int qeth_ulp_enable(struct qeth_card *card) 1948 { 1949 int rc; 1950 char prot_type; 1951 struct qeth_cmd_buffer *iob; 1952 1953 /*FIXME: trace view callbacks*/ 1954 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1955 1956 iob = qeth_wait_for_buffer(&card->write); 1957 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1958 1959 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1960 (__u8) card->info.portno; 1961 if (card->options.layer2) 1962 if (card->info.type == QETH_CARD_TYPE_OSN) 1963 prot_type = QETH_PROT_OSN2; 1964 else 1965 prot_type = QETH_PROT_LAYER2; 1966 else 1967 prot_type = QETH_PROT_TCPIP; 1968 1969 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1970 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1971 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1972 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1973 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1974 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1975 card->info.portname, 9); 1976 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1977 qeth_ulp_enable_cb, NULL); 1978 return rc; 1979 1980 } 1981 1982 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1983 unsigned long data) 1984 { 1985 struct qeth_cmd_buffer *iob; 1986 int rc = 0; 1987 1988 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1989 1990 iob = (struct qeth_cmd_buffer *) data; 1991 memcpy(&card->token.ulp_connection_r, 1992 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1993 QETH_MPC_TOKEN_LENGTH); 1994 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1995 3)) { 1996 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 1997 dev_err(&card->gdev->dev, "A connection could not be " 1998 "established because of an OLM limit\n"); 1999 iob->rc = -EMLINK; 2000 } 2001 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2002 return rc; 2003 } 2004 2005 static int qeth_ulp_setup(struct qeth_card *card) 2006 { 2007 int rc; 2008 __u16 temp; 2009 struct qeth_cmd_buffer *iob; 2010 struct ccw_dev_id dev_id; 2011 2012 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2013 2014 iob = qeth_wait_for_buffer(&card->write); 2015 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2016 2017 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2018 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2019 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2020 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2021 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2022 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2023 2024 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2025 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2026 temp = (card->info.cula << 8) + card->info.unit_addr2; 2027 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2028 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2029 qeth_ulp_setup_cb, NULL); 2030 return rc; 2031 } 2032 2033 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2034 { 2035 int i, j; 2036 2037 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2038 2039 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2040 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2041 return 0; 2042 2043 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 2044 GFP_KERNEL); 2045 if (!card->qdio.in_q) 2046 goto out_nomem; 2047 QETH_DBF_TEXT(SETUP, 2, "inq"); 2048 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2049 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2050 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2051 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 2052 card->qdio.in_q->bufs[i].buffer = 2053 &card->qdio.in_q->qdio_bufs[i]; 2054 /* inbound buffer pool */ 2055 if (qeth_alloc_buffer_pool(card)) 2056 goto out_freeinq; 2057 /* outbound */ 2058 card->qdio.out_qs = 2059 kmalloc(card->qdio.no_out_queues * 2060 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2061 if (!card->qdio.out_qs) 2062 goto out_freepool; 2063 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2064 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2065 GFP_KERNEL); 2066 if (!card->qdio.out_qs[i]) 2067 goto out_freeoutq; 2068 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2069 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2070 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2071 card->qdio.out_qs[i]->queue_no = i; 2072 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2073 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2074 card->qdio.out_qs[i]->bufs[j].buffer = 2075 &card->qdio.out_qs[i]->qdio_bufs[j]; 2076 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2077 skb_list); 2078 lockdep_set_class( 2079 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2080 &qdio_out_skb_queue_key); 2081 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2082 } 2083 } 2084 return 0; 2085 2086 out_freeoutq: 2087 while (i > 0) 2088 kfree(card->qdio.out_qs[--i]); 2089 kfree(card->qdio.out_qs); 2090 card->qdio.out_qs = NULL; 2091 out_freepool: 2092 qeth_free_buffer_pool(card); 2093 out_freeinq: 2094 kfree(card->qdio.in_q); 2095 card->qdio.in_q = NULL; 2096 out_nomem: 2097 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2098 return -ENOMEM; 2099 } 2100 2101 static void qeth_create_qib_param_field(struct qeth_card *card, 2102 char *param_field) 2103 { 2104 2105 param_field[0] = _ascebc['P']; 2106 param_field[1] = _ascebc['C']; 2107 param_field[2] = _ascebc['I']; 2108 param_field[3] = _ascebc['T']; 2109 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2110 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2111 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2112 } 2113 2114 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2115 char *param_field) 2116 { 2117 param_field[16] = _ascebc['B']; 2118 param_field[17] = _ascebc['L']; 2119 param_field[18] = _ascebc['K']; 2120 param_field[19] = _ascebc['T']; 2121 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2122 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2123 *((unsigned int *) (¶m_field[28])) = 2124 card->info.blkt.inter_packet_jumbo; 2125 } 2126 2127 static int qeth_qdio_activate(struct qeth_card *card) 2128 { 2129 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2130 return qdio_activate(CARD_DDEV(card)); 2131 } 2132 2133 static int qeth_dm_act(struct qeth_card *card) 2134 { 2135 int rc; 2136 struct qeth_cmd_buffer *iob; 2137 2138 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2139 2140 iob = qeth_wait_for_buffer(&card->write); 2141 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2142 2143 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2144 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2145 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2146 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2147 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2148 return rc; 2149 } 2150 2151 static int qeth_mpc_initialize(struct qeth_card *card) 2152 { 2153 int rc; 2154 2155 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2156 2157 rc = qeth_issue_next_read(card); 2158 if (rc) { 2159 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2160 return rc; 2161 } 2162 rc = qeth_cm_enable(card); 2163 if (rc) { 2164 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2165 goto out_qdio; 2166 } 2167 rc = qeth_cm_setup(card); 2168 if (rc) { 2169 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2170 goto out_qdio; 2171 } 2172 rc = qeth_ulp_enable(card); 2173 if (rc) { 2174 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2175 goto out_qdio; 2176 } 2177 rc = qeth_ulp_setup(card); 2178 if (rc) { 2179 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2180 goto out_qdio; 2181 } 2182 rc = qeth_alloc_qdio_buffers(card); 2183 if (rc) { 2184 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2185 goto out_qdio; 2186 } 2187 rc = qeth_qdio_establish(card); 2188 if (rc) { 2189 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2190 qeth_free_qdio_buffers(card); 2191 goto out_qdio; 2192 } 2193 rc = qeth_qdio_activate(card); 2194 if (rc) { 2195 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2196 goto out_qdio; 2197 } 2198 rc = qeth_dm_act(card); 2199 if (rc) { 2200 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2201 goto out_qdio; 2202 } 2203 2204 return 0; 2205 out_qdio: 2206 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2207 return rc; 2208 } 2209 2210 static void qeth_print_status_with_portname(struct qeth_card *card) 2211 { 2212 char dbf_text[15]; 2213 int i; 2214 2215 sprintf(dbf_text, "%s", card->info.portname + 1); 2216 for (i = 0; i < 8; i++) 2217 dbf_text[i] = 2218 (char) _ebcasc[(__u8) dbf_text[i]]; 2219 dbf_text[8] = 0; 2220 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2221 "with link type %s (portname: %s)\n", 2222 qeth_get_cardname(card), 2223 (card->info.mcl_level[0]) ? " (level: " : "", 2224 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2225 (card->info.mcl_level[0]) ? ")" : "", 2226 qeth_get_cardname_short(card), 2227 dbf_text); 2228 2229 } 2230 2231 static void qeth_print_status_no_portname(struct qeth_card *card) 2232 { 2233 if (card->info.portname[0]) 2234 dev_info(&card->gdev->dev, "Device is a%s " 2235 "card%s%s%s\nwith link type %s " 2236 "(no portname needed by interface).\n", 2237 qeth_get_cardname(card), 2238 (card->info.mcl_level[0]) ? " (level: " : "", 2239 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2240 (card->info.mcl_level[0]) ? ")" : "", 2241 qeth_get_cardname_short(card)); 2242 else 2243 dev_info(&card->gdev->dev, "Device is a%s " 2244 "card%s%s%s\nwith link type %s.\n", 2245 qeth_get_cardname(card), 2246 (card->info.mcl_level[0]) ? " (level: " : "", 2247 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2248 (card->info.mcl_level[0]) ? ")" : "", 2249 qeth_get_cardname_short(card)); 2250 } 2251 2252 void qeth_print_status_message(struct qeth_card *card) 2253 { 2254 switch (card->info.type) { 2255 case QETH_CARD_TYPE_OSD: 2256 case QETH_CARD_TYPE_OSM: 2257 case QETH_CARD_TYPE_OSX: 2258 /* VM will use a non-zero first character 2259 * to indicate a HiperSockets like reporting 2260 * of the level OSA sets the first character to zero 2261 * */ 2262 if (!card->info.mcl_level[0]) { 2263 sprintf(card->info.mcl_level, "%02x%02x", 2264 card->info.mcl_level[2], 2265 card->info.mcl_level[3]); 2266 2267 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2268 break; 2269 } 2270 /* fallthrough */ 2271 case QETH_CARD_TYPE_IQD: 2272 if ((card->info.guestlan) || 2273 (card->info.mcl_level[0] & 0x80)) { 2274 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2275 card->info.mcl_level[0]]; 2276 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2277 card->info.mcl_level[1]]; 2278 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2279 card->info.mcl_level[2]]; 2280 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2281 card->info.mcl_level[3]]; 2282 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2283 } 2284 break; 2285 default: 2286 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2287 } 2288 if (card->info.portname_required) 2289 qeth_print_status_with_portname(card); 2290 else 2291 qeth_print_status_no_portname(card); 2292 } 2293 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2294 2295 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2296 { 2297 struct qeth_buffer_pool_entry *entry; 2298 2299 QETH_CARD_TEXT(card, 5, "inwrklst"); 2300 2301 list_for_each_entry(entry, 2302 &card->qdio.init_pool.entry_list, init_list) { 2303 qeth_put_buffer_pool_entry(card, entry); 2304 } 2305 } 2306 2307 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2308 struct qeth_card *card) 2309 { 2310 struct list_head *plh; 2311 struct qeth_buffer_pool_entry *entry; 2312 int i, free; 2313 struct page *page; 2314 2315 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2316 return NULL; 2317 2318 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2319 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2320 free = 1; 2321 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2322 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2323 free = 0; 2324 break; 2325 } 2326 } 2327 if (free) { 2328 list_del_init(&entry->list); 2329 return entry; 2330 } 2331 } 2332 2333 /* no free buffer in pool so take first one and swap pages */ 2334 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2335 struct qeth_buffer_pool_entry, list); 2336 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2337 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2338 page = alloc_page(GFP_ATOMIC); 2339 if (!page) { 2340 return NULL; 2341 } else { 2342 free_page((unsigned long)entry->elements[i]); 2343 entry->elements[i] = page_address(page); 2344 if (card->options.performance_stats) 2345 card->perf_stats.sg_alloc_page_rx++; 2346 } 2347 } 2348 } 2349 list_del_init(&entry->list); 2350 return entry; 2351 } 2352 2353 static int qeth_init_input_buffer(struct qeth_card *card, 2354 struct qeth_qdio_buffer *buf) 2355 { 2356 struct qeth_buffer_pool_entry *pool_entry; 2357 int i; 2358 2359 pool_entry = qeth_find_free_buffer_pool_entry(card); 2360 if (!pool_entry) 2361 return 1; 2362 2363 /* 2364 * since the buffer is accessed only from the input_tasklet 2365 * there shouldn't be a need to synchronize; also, since we use 2366 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2367 * buffers 2368 */ 2369 2370 buf->pool_entry = pool_entry; 2371 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2372 buf->buffer->element[i].length = PAGE_SIZE; 2373 buf->buffer->element[i].addr = pool_entry->elements[i]; 2374 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2375 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; 2376 else 2377 buf->buffer->element[i].flags = 0; 2378 } 2379 return 0; 2380 } 2381 2382 int qeth_init_qdio_queues(struct qeth_card *card) 2383 { 2384 int i, j; 2385 int rc; 2386 2387 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2388 2389 /* inbound queue */ 2390 memset(card->qdio.in_q->qdio_bufs, 0, 2391 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2392 qeth_initialize_working_pool_list(card); 2393 /*give only as many buffers to hardware as we have buffer pool entries*/ 2394 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2395 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2396 card->qdio.in_q->next_buf_to_init = 2397 card->qdio.in_buf_pool.buf_count - 1; 2398 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2399 card->qdio.in_buf_pool.buf_count - 1); 2400 if (rc) { 2401 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2402 return rc; 2403 } 2404 /* outbound queue */ 2405 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2406 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2407 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2408 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2409 qeth_clear_output_buffer(card->qdio.out_qs[i], 2410 &card->qdio.out_qs[i]->bufs[j]); 2411 } 2412 card->qdio.out_qs[i]->card = card; 2413 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2414 card->qdio.out_qs[i]->do_pack = 0; 2415 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2416 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2417 atomic_set(&card->qdio.out_qs[i]->state, 2418 QETH_OUT_Q_UNLOCKED); 2419 } 2420 return 0; 2421 } 2422 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2423 2424 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2425 { 2426 switch (link_type) { 2427 case QETH_LINK_TYPE_HSTR: 2428 return 2; 2429 default: 2430 return 1; 2431 } 2432 } 2433 2434 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2435 struct qeth_ipa_cmd *cmd, __u8 command, 2436 enum qeth_prot_versions prot) 2437 { 2438 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2439 cmd->hdr.command = command; 2440 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2441 cmd->hdr.seqno = card->seqno.ipa; 2442 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2443 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2444 if (card->options.layer2) 2445 cmd->hdr.prim_version_no = 2; 2446 else 2447 cmd->hdr.prim_version_no = 1; 2448 cmd->hdr.param_count = 1; 2449 cmd->hdr.prot_version = prot; 2450 cmd->hdr.ipa_supported = 0; 2451 cmd->hdr.ipa_enabled = 0; 2452 } 2453 2454 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2455 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2456 { 2457 struct qeth_cmd_buffer *iob; 2458 struct qeth_ipa_cmd *cmd; 2459 2460 iob = qeth_wait_for_buffer(&card->write); 2461 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2462 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2463 2464 return iob; 2465 } 2466 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2467 2468 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2469 char prot_type) 2470 { 2471 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2472 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2473 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2474 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2475 } 2476 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2477 2478 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2479 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2480 unsigned long), 2481 void *reply_param) 2482 { 2483 int rc; 2484 char prot_type; 2485 2486 QETH_CARD_TEXT(card, 4, "sendipa"); 2487 2488 if (card->options.layer2) 2489 if (card->info.type == QETH_CARD_TYPE_OSN) 2490 prot_type = QETH_PROT_OSN2; 2491 else 2492 prot_type = QETH_PROT_LAYER2; 2493 else 2494 prot_type = QETH_PROT_TCPIP; 2495 qeth_prepare_ipa_cmd(card, iob, prot_type); 2496 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2497 iob, reply_cb, reply_param); 2498 if (rc == -ETIME) { 2499 qeth_clear_ipacmd_list(card); 2500 qeth_schedule_recovery(card); 2501 } 2502 return rc; 2503 } 2504 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2505 2506 static int qeth_send_startstoplan(struct qeth_card *card, 2507 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2508 { 2509 int rc; 2510 struct qeth_cmd_buffer *iob; 2511 2512 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); 2513 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2514 2515 return rc; 2516 } 2517 2518 int qeth_send_startlan(struct qeth_card *card) 2519 { 2520 int rc; 2521 2522 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2523 2524 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); 2525 return rc; 2526 } 2527 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2528 2529 int qeth_send_stoplan(struct qeth_card *card) 2530 { 2531 int rc = 0; 2532 2533 /* 2534 * TODO: according to the IPA format document page 14, 2535 * TCP/IP (we!) never issue a STOPLAN 2536 * is this right ?!? 2537 */ 2538 QETH_DBF_TEXT(SETUP, 2, "stoplan"); 2539 2540 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); 2541 return rc; 2542 } 2543 EXPORT_SYMBOL_GPL(qeth_send_stoplan); 2544 2545 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2546 struct qeth_reply *reply, unsigned long data) 2547 { 2548 struct qeth_ipa_cmd *cmd; 2549 2550 QETH_CARD_TEXT(card, 4, "defadpcb"); 2551 2552 cmd = (struct qeth_ipa_cmd *) data; 2553 if (cmd->hdr.return_code == 0) 2554 cmd->hdr.return_code = 2555 cmd->data.setadapterparms.hdr.return_code; 2556 return 0; 2557 } 2558 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2559 2560 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2561 struct qeth_reply *reply, unsigned long data) 2562 { 2563 struct qeth_ipa_cmd *cmd; 2564 2565 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2566 2567 cmd = (struct qeth_ipa_cmd *) data; 2568 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2569 card->info.link_type = 2570 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2571 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2572 } 2573 card->options.adp.supported_funcs = 2574 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2575 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2576 } 2577 2578 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2579 __u32 command, __u32 cmdlen) 2580 { 2581 struct qeth_cmd_buffer *iob; 2582 struct qeth_ipa_cmd *cmd; 2583 2584 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2585 QETH_PROT_IPV4); 2586 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2587 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2588 cmd->data.setadapterparms.hdr.command_code = command; 2589 cmd->data.setadapterparms.hdr.used_total = 1; 2590 cmd->data.setadapterparms.hdr.seq_no = 1; 2591 2592 return iob; 2593 } 2594 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2595 2596 int qeth_query_setadapterparms(struct qeth_card *card) 2597 { 2598 int rc; 2599 struct qeth_cmd_buffer *iob; 2600 2601 QETH_CARD_TEXT(card, 3, "queryadp"); 2602 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2603 sizeof(struct qeth_ipacmd_setadpparms)); 2604 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2605 return rc; 2606 } 2607 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2608 2609 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 2610 unsigned int qdio_error, const char *dbftext) 2611 { 2612 if (qdio_error) { 2613 QETH_CARD_TEXT(card, 2, dbftext); 2614 QETH_CARD_TEXT_(card, 2, " F15=%02X", 2615 buf->element[15].flags & 0xff); 2616 QETH_CARD_TEXT_(card, 2, " F14=%02X", 2617 buf->element[14].flags & 0xff); 2618 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 2619 if ((buf->element[15].flags & 0xff) == 0x12) { 2620 card->stats.rx_dropped++; 2621 return 0; 2622 } else 2623 return 1; 2624 } 2625 return 0; 2626 } 2627 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2628 2629 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2630 { 2631 struct qeth_qdio_q *queue = card->qdio.in_q; 2632 int count; 2633 int i; 2634 int rc; 2635 int newcount = 0; 2636 2637 count = (index < queue->next_buf_to_init)? 2638 card->qdio.in_buf_pool.buf_count - 2639 (queue->next_buf_to_init - index) : 2640 card->qdio.in_buf_pool.buf_count - 2641 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2642 /* only requeue at a certain threshold to avoid SIGAs */ 2643 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2644 for (i = queue->next_buf_to_init; 2645 i < queue->next_buf_to_init + count; ++i) { 2646 if (qeth_init_input_buffer(card, 2647 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2648 break; 2649 } else { 2650 newcount++; 2651 } 2652 } 2653 2654 if (newcount < count) { 2655 /* we are in memory shortage so we switch back to 2656 traditional skb allocation and drop packages */ 2657 atomic_set(&card->force_alloc_skb, 3); 2658 count = newcount; 2659 } else { 2660 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2661 } 2662 2663 /* 2664 * according to old code it should be avoided to requeue all 2665 * 128 buffers in order to benefit from PCI avoidance. 2666 * this function keeps at least one buffer (the buffer at 2667 * 'index') un-requeued -> this buffer is the first buffer that 2668 * will be requeued the next time 2669 */ 2670 if (card->options.performance_stats) { 2671 card->perf_stats.inbound_do_qdio_cnt++; 2672 card->perf_stats.inbound_do_qdio_start_time = 2673 qeth_get_micros(); 2674 } 2675 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2676 queue->next_buf_to_init, count); 2677 if (card->options.performance_stats) 2678 card->perf_stats.inbound_do_qdio_time += 2679 qeth_get_micros() - 2680 card->perf_stats.inbound_do_qdio_start_time; 2681 if (rc) { 2682 dev_warn(&card->gdev->dev, 2683 "QDIO reported an error, rc=%i\n", rc); 2684 QETH_CARD_TEXT(card, 2, "qinberr"); 2685 } 2686 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2687 QDIO_MAX_BUFFERS_PER_Q; 2688 } 2689 } 2690 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2691 2692 static int qeth_handle_send_error(struct qeth_card *card, 2693 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2694 { 2695 int sbalf15 = buffer->buffer->element[15].flags & 0xff; 2696 2697 QETH_CARD_TEXT(card, 6, "hdsnderr"); 2698 if (card->info.type == QETH_CARD_TYPE_IQD) { 2699 if (sbalf15 == 0) { 2700 qdio_err = 0; 2701 } else { 2702 qdio_err = 1; 2703 } 2704 } 2705 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 2706 2707 if (!qdio_err) 2708 return QETH_SEND_ERROR_NONE; 2709 2710 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2711 return QETH_SEND_ERROR_RETRY; 2712 2713 QETH_CARD_TEXT(card, 1, "lnkfail"); 2714 QETH_CARD_TEXT_(card, 1, "%04x %02x", 2715 (u16)qdio_err, (u8)sbalf15); 2716 return QETH_SEND_ERROR_LINK_FAILURE; 2717 } 2718 2719 /* 2720 * Switched to packing state if the number of used buffers on a queue 2721 * reaches a certain limit. 2722 */ 2723 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2724 { 2725 if (!queue->do_pack) { 2726 if (atomic_read(&queue->used_buffers) 2727 >= QETH_HIGH_WATERMARK_PACK){ 2728 /* switch non-PACKING -> PACKING */ 2729 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 2730 if (queue->card->options.performance_stats) 2731 queue->card->perf_stats.sc_dp_p++; 2732 queue->do_pack = 1; 2733 } 2734 } 2735 } 2736 2737 /* 2738 * Switches from packing to non-packing mode. If there is a packing 2739 * buffer on the queue this buffer will be prepared to be flushed. 2740 * In that case 1 is returned to inform the caller. If no buffer 2741 * has to be flushed, zero is returned. 2742 */ 2743 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2744 { 2745 struct qeth_qdio_out_buffer *buffer; 2746 int flush_count = 0; 2747 2748 if (queue->do_pack) { 2749 if (atomic_read(&queue->used_buffers) 2750 <= QETH_LOW_WATERMARK_PACK) { 2751 /* switch PACKING -> non-PACKING */ 2752 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 2753 if (queue->card->options.performance_stats) 2754 queue->card->perf_stats.sc_p_dp++; 2755 queue->do_pack = 0; 2756 /* flush packing buffers */ 2757 buffer = &queue->bufs[queue->next_buf_to_fill]; 2758 if ((atomic_read(&buffer->state) == 2759 QETH_QDIO_BUF_EMPTY) && 2760 (buffer->next_element_to_fill > 0)) { 2761 atomic_set(&buffer->state, 2762 QETH_QDIO_BUF_PRIMED); 2763 flush_count++; 2764 queue->next_buf_to_fill = 2765 (queue->next_buf_to_fill + 1) % 2766 QDIO_MAX_BUFFERS_PER_Q; 2767 } 2768 } 2769 } 2770 return flush_count; 2771 } 2772 2773 /* 2774 * Called to flush a packing buffer if no more pci flags are on the queue. 2775 * Checks if there is a packing buffer and prepares it to be flushed. 2776 * In that case returns 1, otherwise zero. 2777 */ 2778 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2779 { 2780 struct qeth_qdio_out_buffer *buffer; 2781 2782 buffer = &queue->bufs[queue->next_buf_to_fill]; 2783 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2784 (buffer->next_element_to_fill > 0)) { 2785 /* it's a packing buffer */ 2786 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2787 queue->next_buf_to_fill = 2788 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2789 return 1; 2790 } 2791 return 0; 2792 } 2793 2794 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2795 int count) 2796 { 2797 struct qeth_qdio_out_buffer *buf; 2798 int rc; 2799 int i; 2800 unsigned int qdio_flags; 2801 2802 for (i = index; i < index + count; ++i) { 2803 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2804 buf->buffer->element[buf->next_element_to_fill - 1].flags |= 2805 SBAL_FLAGS_LAST_ENTRY; 2806 2807 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2808 continue; 2809 2810 if (!queue->do_pack) { 2811 if ((atomic_read(&queue->used_buffers) >= 2812 (QETH_HIGH_WATERMARK_PACK - 2813 QETH_WATERMARK_PACK_FUZZ)) && 2814 !atomic_read(&queue->set_pci_flags_count)) { 2815 /* it's likely that we'll go to packing 2816 * mode soon */ 2817 atomic_inc(&queue->set_pci_flags_count); 2818 buf->buffer->element[0].flags |= 0x40; 2819 } 2820 } else { 2821 if (!atomic_read(&queue->set_pci_flags_count)) { 2822 /* 2823 * there's no outstanding PCI any more, so we 2824 * have to request a PCI to be sure the the PCI 2825 * will wake at some time in the future then we 2826 * can flush packed buffers that might still be 2827 * hanging around, which can happen if no 2828 * further send was requested by the stack 2829 */ 2830 atomic_inc(&queue->set_pci_flags_count); 2831 buf->buffer->element[0].flags |= 0x40; 2832 } 2833 } 2834 } 2835 2836 queue->sync_iqdio_error = 0; 2837 queue->card->dev->trans_start = jiffies; 2838 if (queue->card->options.performance_stats) { 2839 queue->card->perf_stats.outbound_do_qdio_cnt++; 2840 queue->card->perf_stats.outbound_do_qdio_start_time = 2841 qeth_get_micros(); 2842 } 2843 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2844 if (atomic_read(&queue->set_pci_flags_count)) 2845 qdio_flags |= QDIO_FLAG_PCI_OUT; 2846 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2847 queue->queue_no, index, count); 2848 if (queue->card->options.performance_stats) 2849 queue->card->perf_stats.outbound_do_qdio_time += 2850 qeth_get_micros() - 2851 queue->card->perf_stats.outbound_do_qdio_start_time; 2852 if (rc > 0) { 2853 if (!(rc & QDIO_ERROR_SIGA_BUSY)) 2854 queue->sync_iqdio_error = rc & 3; 2855 } 2856 if (rc) { 2857 queue->card->stats.tx_errors += count; 2858 /* ignore temporary SIGA errors without busy condition */ 2859 if (rc == QDIO_ERROR_SIGA_TARGET) 2860 return; 2861 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 2862 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 2863 2864 /* this must not happen under normal circumstances. if it 2865 * happens something is really wrong -> recover */ 2866 qeth_schedule_recovery(queue->card); 2867 return; 2868 } 2869 atomic_add(count, &queue->used_buffers); 2870 if (queue->card->options.performance_stats) 2871 queue->card->perf_stats.bufs_sent += count; 2872 } 2873 2874 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2875 { 2876 int index; 2877 int flush_cnt = 0; 2878 int q_was_packing = 0; 2879 2880 /* 2881 * check if weed have to switch to non-packing mode or if 2882 * we have to get a pci flag out on the queue 2883 */ 2884 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2885 !atomic_read(&queue->set_pci_flags_count)) { 2886 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2887 QETH_OUT_Q_UNLOCKED) { 2888 /* 2889 * If we get in here, there was no action in 2890 * do_send_packet. So, we check if there is a 2891 * packing buffer to be flushed here. 2892 */ 2893 netif_stop_queue(queue->card->dev); 2894 index = queue->next_buf_to_fill; 2895 q_was_packing = queue->do_pack; 2896 /* queue->do_pack may change */ 2897 barrier(); 2898 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 2899 if (!flush_cnt && 2900 !atomic_read(&queue->set_pci_flags_count)) 2901 flush_cnt += 2902 qeth_flush_buffers_on_no_pci(queue); 2903 if (queue->card->options.performance_stats && 2904 q_was_packing) 2905 queue->card->perf_stats.bufs_sent_pack += 2906 flush_cnt; 2907 if (flush_cnt) 2908 qeth_flush_buffers(queue, index, flush_cnt); 2909 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 2910 } 2911 } 2912 } 2913 2914 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 2915 unsigned long card_ptr) 2916 { 2917 struct qeth_card *card = (struct qeth_card *)card_ptr; 2918 2919 if (card->dev) 2920 napi_schedule(&card->napi); 2921 } 2922 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 2923 2924 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 2925 unsigned int queue, int first_element, int count, 2926 unsigned long card_ptr) 2927 { 2928 struct qeth_card *card = (struct qeth_card *)card_ptr; 2929 2930 if (qdio_err) 2931 qeth_schedule_recovery(card); 2932 } 2933 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 2934 2935 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 2936 unsigned int qdio_error, int __queue, int first_element, 2937 int count, unsigned long card_ptr) 2938 { 2939 struct qeth_card *card = (struct qeth_card *) card_ptr; 2940 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 2941 struct qeth_qdio_out_buffer *buffer; 2942 int i; 2943 unsigned qeth_send_err; 2944 2945 QETH_CARD_TEXT(card, 6, "qdouhdl"); 2946 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 2947 QETH_CARD_TEXT(card, 2, "achkcond"); 2948 netif_stop_queue(card->dev); 2949 qeth_schedule_recovery(card); 2950 return; 2951 } 2952 if (card->options.performance_stats) { 2953 card->perf_stats.outbound_handler_cnt++; 2954 card->perf_stats.outbound_handler_start_time = 2955 qeth_get_micros(); 2956 } 2957 for (i = first_element; i < (first_element + count); ++i) { 2958 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2959 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error); 2960 __qeth_clear_output_buffer(queue, buffer, 2961 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0); 2962 } 2963 atomic_sub(count, &queue->used_buffers); 2964 /* check if we need to do something on this outbound queue */ 2965 if (card->info.type != QETH_CARD_TYPE_IQD) 2966 qeth_check_outbound_queue(queue); 2967 2968 netif_wake_queue(queue->card->dev); 2969 if (card->options.performance_stats) 2970 card->perf_stats.outbound_handler_time += qeth_get_micros() - 2971 card->perf_stats.outbound_handler_start_time; 2972 } 2973 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 2974 2975 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 2976 int ipv, int cast_type) 2977 { 2978 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 2979 card->info.type == QETH_CARD_TYPE_OSX)) 2980 return card->qdio.default_out_queue; 2981 switch (card->qdio.no_out_queues) { 2982 case 4: 2983 if (cast_type && card->info.is_multicast_different) 2984 return card->info.is_multicast_different & 2985 (card->qdio.no_out_queues - 1); 2986 if (card->qdio.do_prio_queueing && (ipv == 4)) { 2987 const u8 tos = ip_hdr(skb)->tos; 2988 2989 if (card->qdio.do_prio_queueing == 2990 QETH_PRIO_Q_ING_TOS) { 2991 if (tos & IP_TOS_NOTIMPORTANT) 2992 return 3; 2993 if (tos & IP_TOS_HIGHRELIABILITY) 2994 return 2; 2995 if (tos & IP_TOS_HIGHTHROUGHPUT) 2996 return 1; 2997 if (tos & IP_TOS_LOWDELAY) 2998 return 0; 2999 } 3000 if (card->qdio.do_prio_queueing == 3001 QETH_PRIO_Q_ING_PREC) 3002 return 3 - (tos >> 6); 3003 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3004 /* TODO: IPv6!!! */ 3005 } 3006 return card->qdio.default_out_queue; 3007 case 1: /* fallthrough for single-out-queue 1920-device */ 3008 default: 3009 return card->qdio.default_out_queue; 3010 } 3011 } 3012 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3013 3014 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3015 struct sk_buff *skb, int elems) 3016 { 3017 int dlen = skb->len - skb->data_len; 3018 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3019 PFN_DOWN((unsigned long)skb->data); 3020 3021 elements_needed += skb_shinfo(skb)->nr_frags; 3022 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3023 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3024 "(Number=%d / Length=%d). Discarded.\n", 3025 (elements_needed+elems), skb->len); 3026 return 0; 3027 } 3028 return elements_needed; 3029 } 3030 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3031 3032 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3033 { 3034 int hroom, inpage, rest; 3035 3036 if (((unsigned long)skb->data & PAGE_MASK) != 3037 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3038 hroom = skb_headroom(skb); 3039 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3040 rest = len - inpage; 3041 if (rest > hroom) 3042 return 1; 3043 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3044 skb->data -= rest; 3045 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3046 } 3047 return 0; 3048 } 3049 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3050 3051 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3052 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3053 int offset) 3054 { 3055 int length = skb->len - skb->data_len; 3056 int length_here; 3057 int element; 3058 char *data; 3059 int first_lap, cnt; 3060 struct skb_frag_struct *frag; 3061 3062 element = *next_element_to_fill; 3063 data = skb->data; 3064 first_lap = (is_tso == 0 ? 1 : 0); 3065 3066 if (offset >= 0) { 3067 data = skb->data + offset; 3068 length -= offset; 3069 first_lap = 0; 3070 } 3071 3072 while (length > 0) { 3073 /* length_here is the remaining amount of data in this page */ 3074 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3075 if (length < length_here) 3076 length_here = length; 3077 3078 buffer->element[element].addr = data; 3079 buffer->element[element].length = length_here; 3080 length -= length_here; 3081 if (!length) { 3082 if (first_lap) 3083 if (skb_shinfo(skb)->nr_frags) 3084 buffer->element[element].flags = 3085 SBAL_FLAGS_FIRST_FRAG; 3086 else 3087 buffer->element[element].flags = 0; 3088 else 3089 buffer->element[element].flags = 3090 SBAL_FLAGS_MIDDLE_FRAG; 3091 } else { 3092 if (first_lap) 3093 buffer->element[element].flags = 3094 SBAL_FLAGS_FIRST_FRAG; 3095 else 3096 buffer->element[element].flags = 3097 SBAL_FLAGS_MIDDLE_FRAG; 3098 } 3099 data += length_here; 3100 element++; 3101 first_lap = 0; 3102 } 3103 3104 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3105 frag = &skb_shinfo(skb)->frags[cnt]; 3106 buffer->element[element].addr = (char *)page_to_phys(frag->page) 3107 + frag->page_offset; 3108 buffer->element[element].length = frag->size; 3109 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG; 3110 element++; 3111 } 3112 3113 if (buffer->element[element - 1].flags) 3114 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG; 3115 *next_element_to_fill = element; 3116 } 3117 3118 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3119 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3120 struct qeth_hdr *hdr, int offset, int hd_len) 3121 { 3122 struct qdio_buffer *buffer; 3123 int flush_cnt = 0, hdr_len, large_send = 0; 3124 3125 buffer = buf->buffer; 3126 atomic_inc(&skb->users); 3127 skb_queue_tail(&buf->skb_list, skb); 3128 3129 /*check first on TSO ....*/ 3130 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3131 int element = buf->next_element_to_fill; 3132 3133 hdr_len = sizeof(struct qeth_hdr_tso) + 3134 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3135 /*fill first buffer entry only with header information */ 3136 buffer->element[element].addr = skb->data; 3137 buffer->element[element].length = hdr_len; 3138 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3139 buf->next_element_to_fill++; 3140 skb->data += hdr_len; 3141 skb->len -= hdr_len; 3142 large_send = 1; 3143 } 3144 3145 if (offset >= 0) { 3146 int element = buf->next_element_to_fill; 3147 buffer->element[element].addr = hdr; 3148 buffer->element[element].length = sizeof(struct qeth_hdr) + 3149 hd_len; 3150 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3151 buf->is_header[element] = 1; 3152 buf->next_element_to_fill++; 3153 } 3154 3155 __qeth_fill_buffer(skb, buffer, large_send, 3156 (int *)&buf->next_element_to_fill, offset); 3157 3158 if (!queue->do_pack) { 3159 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3160 /* set state to PRIMED -> will be flushed */ 3161 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3162 flush_cnt = 1; 3163 } else { 3164 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3165 if (queue->card->options.performance_stats) 3166 queue->card->perf_stats.skbs_sent_pack++; 3167 if (buf->next_element_to_fill >= 3168 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3169 /* 3170 * packed buffer if full -> set state PRIMED 3171 * -> will be flushed 3172 */ 3173 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3174 flush_cnt = 1; 3175 } 3176 } 3177 return flush_cnt; 3178 } 3179 3180 int qeth_do_send_packet_fast(struct qeth_card *card, 3181 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3182 struct qeth_hdr *hdr, int elements_needed, 3183 int offset, int hd_len) 3184 { 3185 struct qeth_qdio_out_buffer *buffer; 3186 struct sk_buff *skb1; 3187 struct qeth_skb_data *retry_ctrl; 3188 int index; 3189 int rc; 3190 3191 /* spin until we get the queue ... */ 3192 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3193 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3194 /* ... now we've got the queue */ 3195 index = queue->next_buf_to_fill; 3196 buffer = &queue->bufs[queue->next_buf_to_fill]; 3197 /* 3198 * check if buffer is empty to make sure that we do not 'overtake' 3199 * ourselves and try to fill a buffer that is already primed 3200 */ 3201 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3202 goto out; 3203 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3204 QDIO_MAX_BUFFERS_PER_Q; 3205 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3206 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3207 qeth_flush_buffers(queue, index, 1); 3208 if (queue->sync_iqdio_error == 2) { 3209 skb1 = skb_dequeue(&buffer->skb_list); 3210 while (skb1) { 3211 atomic_dec(&skb1->users); 3212 skb1 = skb_dequeue(&buffer->skb_list); 3213 } 3214 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16]; 3215 if (retry_ctrl->magic != QETH_SKB_MAGIC) { 3216 retry_ctrl->magic = QETH_SKB_MAGIC; 3217 retry_ctrl->count = 0; 3218 } 3219 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) { 3220 retry_ctrl->count++; 3221 rc = dev_queue_xmit(skb); 3222 } else { 3223 dev_kfree_skb_any(skb); 3224 QETH_CARD_TEXT(card, 2, "qrdrop"); 3225 } 3226 } 3227 return 0; 3228 out: 3229 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3230 return -EBUSY; 3231 } 3232 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3233 3234 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3235 struct sk_buff *skb, struct qeth_hdr *hdr, 3236 int elements_needed) 3237 { 3238 struct qeth_qdio_out_buffer *buffer; 3239 int start_index; 3240 int flush_count = 0; 3241 int do_pack = 0; 3242 int tmp; 3243 int rc = 0; 3244 3245 /* spin until we get the queue ... */ 3246 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3247 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3248 start_index = queue->next_buf_to_fill; 3249 buffer = &queue->bufs[queue->next_buf_to_fill]; 3250 /* 3251 * check if buffer is empty to make sure that we do not 'overtake' 3252 * ourselves and try to fill a buffer that is already primed 3253 */ 3254 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3255 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3256 return -EBUSY; 3257 } 3258 /* check if we need to switch packing state of this queue */ 3259 qeth_switch_to_packing_if_needed(queue); 3260 if (queue->do_pack) { 3261 do_pack = 1; 3262 /* does packet fit in current buffer? */ 3263 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3264 buffer->next_element_to_fill) < elements_needed) { 3265 /* ... no -> set state PRIMED */ 3266 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3267 flush_count++; 3268 queue->next_buf_to_fill = 3269 (queue->next_buf_to_fill + 1) % 3270 QDIO_MAX_BUFFERS_PER_Q; 3271 buffer = &queue->bufs[queue->next_buf_to_fill]; 3272 /* we did a step forward, so check buffer state 3273 * again */ 3274 if (atomic_read(&buffer->state) != 3275 QETH_QDIO_BUF_EMPTY) { 3276 qeth_flush_buffers(queue, start_index, 3277 flush_count); 3278 atomic_set(&queue->state, 3279 QETH_OUT_Q_UNLOCKED); 3280 return -EBUSY; 3281 } 3282 } 3283 } 3284 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3285 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3286 QDIO_MAX_BUFFERS_PER_Q; 3287 flush_count += tmp; 3288 if (flush_count) 3289 qeth_flush_buffers(queue, start_index, flush_count); 3290 else if (!atomic_read(&queue->set_pci_flags_count)) 3291 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3292 /* 3293 * queue->state will go from LOCKED -> UNLOCKED or from 3294 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3295 * (switch packing state or flush buffer to get another pci flag out). 3296 * In that case we will enter this loop 3297 */ 3298 while (atomic_dec_return(&queue->state)) { 3299 flush_count = 0; 3300 start_index = queue->next_buf_to_fill; 3301 /* check if we can go back to non-packing state */ 3302 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3303 /* 3304 * check if we need to flush a packing buffer to get a pci 3305 * flag out on the queue 3306 */ 3307 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3308 flush_count += qeth_flush_buffers_on_no_pci(queue); 3309 if (flush_count) 3310 qeth_flush_buffers(queue, start_index, flush_count); 3311 } 3312 /* at this point the queue is UNLOCKED again */ 3313 if (queue->card->options.performance_stats && do_pack) 3314 queue->card->perf_stats.bufs_sent_pack += flush_count; 3315 3316 return rc; 3317 } 3318 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3319 3320 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3321 struct qeth_reply *reply, unsigned long data) 3322 { 3323 struct qeth_ipa_cmd *cmd; 3324 struct qeth_ipacmd_setadpparms *setparms; 3325 3326 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3327 3328 cmd = (struct qeth_ipa_cmd *) data; 3329 setparms = &(cmd->data.setadapterparms); 3330 3331 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3332 if (cmd->hdr.return_code) { 3333 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3334 setparms->data.mode = SET_PROMISC_MODE_OFF; 3335 } 3336 card->info.promisc_mode = setparms->data.mode; 3337 return 0; 3338 } 3339 3340 void qeth_setadp_promisc_mode(struct qeth_card *card) 3341 { 3342 enum qeth_ipa_promisc_modes mode; 3343 struct net_device *dev = card->dev; 3344 struct qeth_cmd_buffer *iob; 3345 struct qeth_ipa_cmd *cmd; 3346 3347 QETH_CARD_TEXT(card, 4, "setprom"); 3348 3349 if (((dev->flags & IFF_PROMISC) && 3350 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3351 (!(dev->flags & IFF_PROMISC) && 3352 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3353 return; 3354 mode = SET_PROMISC_MODE_OFF; 3355 if (dev->flags & IFF_PROMISC) 3356 mode = SET_PROMISC_MODE_ON; 3357 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3358 3359 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3360 sizeof(struct qeth_ipacmd_setadpparms)); 3361 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3362 cmd->data.setadapterparms.data.mode = mode; 3363 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3364 } 3365 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3366 3367 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3368 { 3369 struct qeth_card *card; 3370 char dbf_text[15]; 3371 3372 card = dev->ml_priv; 3373 3374 QETH_CARD_TEXT(card, 4, "chgmtu"); 3375 sprintf(dbf_text, "%8x", new_mtu); 3376 QETH_CARD_TEXT(card, 4, dbf_text); 3377 3378 if (new_mtu < 64) 3379 return -EINVAL; 3380 if (new_mtu > 65535) 3381 return -EINVAL; 3382 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3383 (!qeth_mtu_is_valid(card, new_mtu))) 3384 return -EINVAL; 3385 dev->mtu = new_mtu; 3386 return 0; 3387 } 3388 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3389 3390 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3391 { 3392 struct qeth_card *card; 3393 3394 card = dev->ml_priv; 3395 3396 QETH_CARD_TEXT(card, 5, "getstat"); 3397 3398 return &card->stats; 3399 } 3400 EXPORT_SYMBOL_GPL(qeth_get_stats); 3401 3402 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3403 struct qeth_reply *reply, unsigned long data) 3404 { 3405 struct qeth_ipa_cmd *cmd; 3406 3407 QETH_CARD_TEXT(card, 4, "chgmaccb"); 3408 3409 cmd = (struct qeth_ipa_cmd *) data; 3410 if (!card->options.layer2 || 3411 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3412 memcpy(card->dev->dev_addr, 3413 &cmd->data.setadapterparms.data.change_addr.addr, 3414 OSA_ADDR_LEN); 3415 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3416 } 3417 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3418 return 0; 3419 } 3420 3421 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3422 { 3423 int rc; 3424 struct qeth_cmd_buffer *iob; 3425 struct qeth_ipa_cmd *cmd; 3426 3427 QETH_CARD_TEXT(card, 4, "chgmac"); 3428 3429 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3430 sizeof(struct qeth_ipacmd_setadpparms)); 3431 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3432 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3433 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3434 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3435 card->dev->dev_addr, OSA_ADDR_LEN); 3436 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3437 NULL); 3438 return rc; 3439 } 3440 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3441 3442 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 3443 struct qeth_reply *reply, unsigned long data) 3444 { 3445 struct qeth_ipa_cmd *cmd; 3446 struct qeth_set_access_ctrl *access_ctrl_req; 3447 3448 QETH_CARD_TEXT(card, 4, "setaccb"); 3449 3450 cmd = (struct qeth_ipa_cmd *) data; 3451 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3452 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 3453 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3454 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 3455 cmd->data.setadapterparms.hdr.return_code); 3456 switch (cmd->data.setadapterparms.hdr.return_code) { 3457 case SET_ACCESS_CTRL_RC_SUCCESS: 3458 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 3459 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 3460 { 3461 card->options.isolation = access_ctrl_req->subcmd_code; 3462 if (card->options.isolation == ISOLATION_MODE_NONE) { 3463 dev_info(&card->gdev->dev, 3464 "QDIO data connection isolation is deactivated\n"); 3465 } else { 3466 dev_info(&card->gdev->dev, 3467 "QDIO data connection isolation is activated\n"); 3468 } 3469 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 3470 card->gdev->dev.kobj.name, 3471 access_ctrl_req->subcmd_code, 3472 cmd->data.setadapterparms.hdr.return_code); 3473 break; 3474 } 3475 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 3476 { 3477 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 3478 card->gdev->dev.kobj.name, 3479 access_ctrl_req->subcmd_code, 3480 cmd->data.setadapterparms.hdr.return_code); 3481 dev_err(&card->gdev->dev, "Adapter does not " 3482 "support QDIO data connection isolation\n"); 3483 3484 /* ensure isolation mode is "none" */ 3485 card->options.isolation = ISOLATION_MODE_NONE; 3486 break; 3487 } 3488 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 3489 { 3490 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3491 card->gdev->dev.kobj.name, 3492 access_ctrl_req->subcmd_code, 3493 cmd->data.setadapterparms.hdr.return_code); 3494 dev_err(&card->gdev->dev, 3495 "Adapter is dedicated. " 3496 "QDIO data connection isolation not supported\n"); 3497 3498 /* ensure isolation mode is "none" */ 3499 card->options.isolation = ISOLATION_MODE_NONE; 3500 break; 3501 } 3502 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 3503 { 3504 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3505 card->gdev->dev.kobj.name, 3506 access_ctrl_req->subcmd_code, 3507 cmd->data.setadapterparms.hdr.return_code); 3508 dev_err(&card->gdev->dev, 3509 "TSO does not permit QDIO data connection isolation\n"); 3510 3511 /* ensure isolation mode is "none" */ 3512 card->options.isolation = ISOLATION_MODE_NONE; 3513 break; 3514 } 3515 default: 3516 { 3517 /* this should never happen */ 3518 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 3519 "==UNKNOWN\n", 3520 card->gdev->dev.kobj.name, 3521 access_ctrl_req->subcmd_code, 3522 cmd->data.setadapterparms.hdr.return_code); 3523 3524 /* ensure isolation mode is "none" */ 3525 card->options.isolation = ISOLATION_MODE_NONE; 3526 break; 3527 } 3528 } 3529 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3530 return 0; 3531 } 3532 3533 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 3534 enum qeth_ipa_isolation_modes isolation) 3535 { 3536 int rc; 3537 struct qeth_cmd_buffer *iob; 3538 struct qeth_ipa_cmd *cmd; 3539 struct qeth_set_access_ctrl *access_ctrl_req; 3540 3541 QETH_CARD_TEXT(card, 4, "setacctl"); 3542 3543 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 3544 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3545 3546 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 3547 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 3548 sizeof(struct qeth_set_access_ctrl)); 3549 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3550 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3551 access_ctrl_req->subcmd_code = isolation; 3552 3553 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 3554 NULL); 3555 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 3556 return rc; 3557 } 3558 3559 int qeth_set_access_ctrl_online(struct qeth_card *card) 3560 { 3561 int rc = 0; 3562 3563 QETH_CARD_TEXT(card, 4, "setactlo"); 3564 3565 if ((card->info.type == QETH_CARD_TYPE_OSD || 3566 card->info.type == QETH_CARD_TYPE_OSX) && 3567 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 3568 rc = qeth_setadpparms_set_access_ctrl(card, 3569 card->options.isolation); 3570 if (rc) { 3571 QETH_DBF_MESSAGE(3, 3572 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 3573 card->gdev->dev.kobj.name, 3574 rc); 3575 } 3576 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 3577 card->options.isolation = ISOLATION_MODE_NONE; 3578 3579 dev_err(&card->gdev->dev, "Adapter does not " 3580 "support QDIO data connection isolation\n"); 3581 rc = -EOPNOTSUPP; 3582 } 3583 return rc; 3584 } 3585 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 3586 3587 void qeth_tx_timeout(struct net_device *dev) 3588 { 3589 struct qeth_card *card; 3590 3591 card = dev->ml_priv; 3592 QETH_CARD_TEXT(card, 4, "txtimeo"); 3593 card->stats.tx_errors++; 3594 qeth_schedule_recovery(card); 3595 } 3596 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3597 3598 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3599 { 3600 struct qeth_card *card = dev->ml_priv; 3601 int rc = 0; 3602 3603 switch (regnum) { 3604 case MII_BMCR: /* Basic mode control register */ 3605 rc = BMCR_FULLDPLX; 3606 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3607 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3608 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3609 rc |= BMCR_SPEED100; 3610 break; 3611 case MII_BMSR: /* Basic mode status register */ 3612 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3613 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3614 BMSR_100BASE4; 3615 break; 3616 case MII_PHYSID1: /* PHYS ID 1 */ 3617 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3618 dev->dev_addr[2]; 3619 rc = (rc >> 5) & 0xFFFF; 3620 break; 3621 case MII_PHYSID2: /* PHYS ID 2 */ 3622 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3623 break; 3624 case MII_ADVERTISE: /* Advertisement control reg */ 3625 rc = ADVERTISE_ALL; 3626 break; 3627 case MII_LPA: /* Link partner ability reg */ 3628 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3629 LPA_100BASE4 | LPA_LPACK; 3630 break; 3631 case MII_EXPANSION: /* Expansion register */ 3632 break; 3633 case MII_DCOUNTER: /* disconnect counter */ 3634 break; 3635 case MII_FCSCOUNTER: /* false carrier counter */ 3636 break; 3637 case MII_NWAYTEST: /* N-way auto-neg test register */ 3638 break; 3639 case MII_RERRCOUNTER: /* rx error counter */ 3640 rc = card->stats.rx_errors; 3641 break; 3642 case MII_SREVISION: /* silicon revision */ 3643 break; 3644 case MII_RESV1: /* reserved 1 */ 3645 break; 3646 case MII_LBRERROR: /* loopback, rx, bypass error */ 3647 break; 3648 case MII_PHYADDR: /* physical address */ 3649 break; 3650 case MII_RESV2: /* reserved 2 */ 3651 break; 3652 case MII_TPISTATUS: /* TPI status for 10mbps */ 3653 break; 3654 case MII_NCONFIG: /* network interface config */ 3655 break; 3656 default: 3657 break; 3658 } 3659 return rc; 3660 } 3661 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3662 3663 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3664 struct qeth_cmd_buffer *iob, int len, 3665 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3666 unsigned long), 3667 void *reply_param) 3668 { 3669 u16 s1, s2; 3670 3671 QETH_CARD_TEXT(card, 4, "sendsnmp"); 3672 3673 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3674 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3675 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3676 /* adjust PDU length fields in IPA_PDU_HEADER */ 3677 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3678 s2 = (u32) len; 3679 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3680 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3681 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3682 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3683 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3684 reply_cb, reply_param); 3685 } 3686 3687 static int qeth_snmp_command_cb(struct qeth_card *card, 3688 struct qeth_reply *reply, unsigned long sdata) 3689 { 3690 struct qeth_ipa_cmd *cmd; 3691 struct qeth_arp_query_info *qinfo; 3692 struct qeth_snmp_cmd *snmp; 3693 unsigned char *data; 3694 __u16 data_len; 3695 3696 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 3697 3698 cmd = (struct qeth_ipa_cmd *) sdata; 3699 data = (unsigned char *)((char *)cmd - reply->offset); 3700 qinfo = (struct qeth_arp_query_info *) reply->param; 3701 snmp = &cmd->data.setadapterparms.data.snmp; 3702 3703 if (cmd->hdr.return_code) { 3704 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 3705 return 0; 3706 } 3707 if (cmd->data.setadapterparms.hdr.return_code) { 3708 cmd->hdr.return_code = 3709 cmd->data.setadapterparms.hdr.return_code; 3710 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 3711 return 0; 3712 } 3713 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3714 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3715 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3716 else 3717 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3718 3719 /* check if there is enough room in userspace */ 3720 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3721 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 3722 cmd->hdr.return_code = -ENOMEM; 3723 return 0; 3724 } 3725 QETH_CARD_TEXT_(card, 4, "snore%i", 3726 cmd->data.setadapterparms.hdr.used_total); 3727 QETH_CARD_TEXT_(card, 4, "sseqn%i", 3728 cmd->data.setadapterparms.hdr.seq_no); 3729 /*copy entries to user buffer*/ 3730 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3731 memcpy(qinfo->udata + qinfo->udata_offset, 3732 (char *)snmp, 3733 data_len + offsetof(struct qeth_snmp_cmd, data)); 3734 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3735 } else { 3736 memcpy(qinfo->udata + qinfo->udata_offset, 3737 (char *)&snmp->request, data_len); 3738 } 3739 qinfo->udata_offset += data_len; 3740 /* check if all replies received ... */ 3741 QETH_CARD_TEXT_(card, 4, "srtot%i", 3742 cmd->data.setadapterparms.hdr.used_total); 3743 QETH_CARD_TEXT_(card, 4, "srseq%i", 3744 cmd->data.setadapterparms.hdr.seq_no); 3745 if (cmd->data.setadapterparms.hdr.seq_no < 3746 cmd->data.setadapterparms.hdr.used_total) 3747 return 1; 3748 return 0; 3749 } 3750 3751 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3752 { 3753 struct qeth_cmd_buffer *iob; 3754 struct qeth_ipa_cmd *cmd; 3755 struct qeth_snmp_ureq *ureq; 3756 int req_len; 3757 struct qeth_arp_query_info qinfo = {0, }; 3758 int rc = 0; 3759 3760 QETH_CARD_TEXT(card, 3, "snmpcmd"); 3761 3762 if (card->info.guestlan) 3763 return -EOPNOTSUPP; 3764 3765 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3766 (!card->options.layer2)) { 3767 return -EOPNOTSUPP; 3768 } 3769 /* skip 4 bytes (data_len struct member) to get req_len */ 3770 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3771 return -EFAULT; 3772 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 3773 if (IS_ERR(ureq)) { 3774 QETH_CARD_TEXT(card, 2, "snmpnome"); 3775 return PTR_ERR(ureq); 3776 } 3777 qinfo.udata_len = ureq->hdr.data_len; 3778 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3779 if (!qinfo.udata) { 3780 kfree(ureq); 3781 return -ENOMEM; 3782 } 3783 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3784 3785 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3786 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3787 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3788 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3789 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3790 qeth_snmp_command_cb, (void *)&qinfo); 3791 if (rc) 3792 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3793 QETH_CARD_IFNAME(card), rc); 3794 else { 3795 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3796 rc = -EFAULT; 3797 } 3798 3799 kfree(ureq); 3800 kfree(qinfo.udata); 3801 return rc; 3802 } 3803 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3804 3805 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3806 { 3807 switch (card->info.type) { 3808 case QETH_CARD_TYPE_IQD: 3809 return 2; 3810 default: 3811 return 0; 3812 } 3813 } 3814 3815 static int qeth_qdio_establish(struct qeth_card *card) 3816 { 3817 struct qdio_initialize init_data; 3818 char *qib_param_field; 3819 struct qdio_buffer **in_sbal_ptrs; 3820 struct qdio_buffer **out_sbal_ptrs; 3821 int i, j, k; 3822 int rc = 0; 3823 3824 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3825 3826 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3827 GFP_KERNEL); 3828 if (!qib_param_field) 3829 return -ENOMEM; 3830 3831 qeth_create_qib_param_field(card, qib_param_field); 3832 qeth_create_qib_param_field_blkt(card, qib_param_field); 3833 3834 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3835 GFP_KERNEL); 3836 if (!in_sbal_ptrs) { 3837 kfree(qib_param_field); 3838 return -ENOMEM; 3839 } 3840 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3841 in_sbal_ptrs[i] = (struct qdio_buffer *) 3842 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3843 3844 out_sbal_ptrs = 3845 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3846 sizeof(void *), GFP_KERNEL); 3847 if (!out_sbal_ptrs) { 3848 kfree(in_sbal_ptrs); 3849 kfree(qib_param_field); 3850 return -ENOMEM; 3851 } 3852 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3853 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3854 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3855 card->qdio.out_qs[i]->bufs[j].buffer); 3856 } 3857 3858 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3859 init_data.cdev = CARD_DDEV(card); 3860 init_data.q_format = qeth_get_qdio_q_format(card); 3861 init_data.qib_param_field_format = 0; 3862 init_data.qib_param_field = qib_param_field; 3863 init_data.no_input_qs = 1; 3864 init_data.no_output_qs = card->qdio.no_out_queues; 3865 init_data.input_handler = card->discipline.input_handler; 3866 init_data.output_handler = card->discipline.output_handler; 3867 init_data.queue_start_poll = card->discipline.start_poll; 3868 init_data.int_parm = (unsigned long) card; 3869 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3870 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3871 3872 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3873 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3874 rc = qdio_allocate(&init_data); 3875 if (rc) { 3876 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3877 goto out; 3878 } 3879 rc = qdio_establish(&init_data); 3880 if (rc) { 3881 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3882 qdio_free(CARD_DDEV(card)); 3883 } 3884 } 3885 out: 3886 kfree(out_sbal_ptrs); 3887 kfree(in_sbal_ptrs); 3888 kfree(qib_param_field); 3889 return rc; 3890 } 3891 3892 static void qeth_core_free_card(struct qeth_card *card) 3893 { 3894 3895 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 3896 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 3897 qeth_clean_channel(&card->read); 3898 qeth_clean_channel(&card->write); 3899 if (card->dev) 3900 free_netdev(card->dev); 3901 kfree(card->ip_tbd_list); 3902 qeth_free_qdio_buffers(card); 3903 unregister_service_level(&card->qeth_service_level); 3904 kfree(card); 3905 } 3906 3907 static struct ccw_device_id qeth_ids[] = { 3908 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 3909 .driver_info = QETH_CARD_TYPE_OSD}, 3910 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 3911 .driver_info = QETH_CARD_TYPE_IQD}, 3912 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 3913 .driver_info = QETH_CARD_TYPE_OSN}, 3914 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 3915 .driver_info = QETH_CARD_TYPE_OSM}, 3916 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 3917 .driver_info = QETH_CARD_TYPE_OSX}, 3918 {}, 3919 }; 3920 MODULE_DEVICE_TABLE(ccw, qeth_ids); 3921 3922 static struct ccw_driver qeth_ccw_driver = { 3923 .name = "qeth", 3924 .ids = qeth_ids, 3925 .probe = ccwgroup_probe_ccwdev, 3926 .remove = ccwgroup_remove_ccwdev, 3927 }; 3928 3929 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 3930 unsigned long driver_id) 3931 { 3932 return ccwgroup_create_from_string(root_dev, driver_id, 3933 &qeth_ccw_driver, 3, buf); 3934 } 3935 3936 int qeth_core_hardsetup_card(struct qeth_card *card) 3937 { 3938 int retries = 0; 3939 int rc; 3940 3941 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 3942 atomic_set(&card->force_alloc_skb, 0); 3943 retry: 3944 if (retries) 3945 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 3946 dev_name(&card->gdev->dev)); 3947 ccw_device_set_offline(CARD_DDEV(card)); 3948 ccw_device_set_offline(CARD_WDEV(card)); 3949 ccw_device_set_offline(CARD_RDEV(card)); 3950 rc = ccw_device_set_online(CARD_RDEV(card)); 3951 if (rc) 3952 goto retriable; 3953 rc = ccw_device_set_online(CARD_WDEV(card)); 3954 if (rc) 3955 goto retriable; 3956 rc = ccw_device_set_online(CARD_DDEV(card)); 3957 if (rc) 3958 goto retriable; 3959 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 3960 retriable: 3961 if (rc == -ERESTARTSYS) { 3962 QETH_DBF_TEXT(SETUP, 2, "break1"); 3963 return rc; 3964 } else if (rc) { 3965 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 3966 if (++retries > 3) 3967 goto out; 3968 else 3969 goto retry; 3970 } 3971 qeth_init_tokens(card); 3972 qeth_init_func_level(card); 3973 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 3974 if (rc == -ERESTARTSYS) { 3975 QETH_DBF_TEXT(SETUP, 2, "break2"); 3976 return rc; 3977 } else if (rc) { 3978 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3979 if (--retries < 0) 3980 goto out; 3981 else 3982 goto retry; 3983 } 3984 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 3985 if (rc == -ERESTARTSYS) { 3986 QETH_DBF_TEXT(SETUP, 2, "break3"); 3987 return rc; 3988 } else if (rc) { 3989 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 3990 if (--retries < 0) 3991 goto out; 3992 else 3993 goto retry; 3994 } 3995 card->read_or_write_problem = 0; 3996 rc = qeth_mpc_initialize(card); 3997 if (rc) { 3998 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3999 goto out; 4000 } 4001 return 0; 4002 out: 4003 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4004 "an error on the device\n"); 4005 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4006 dev_name(&card->gdev->dev), rc); 4007 return rc; 4008 } 4009 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4010 4011 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 4012 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4013 { 4014 struct page *page = virt_to_page(element->addr); 4015 if (*pskb == NULL) { 4016 /* the upper protocol layers assume that there is data in the 4017 * skb itself. Copy a small amount (64 bytes) to make them 4018 * happy. */ 4019 *pskb = dev_alloc_skb(64 + ETH_HLEN); 4020 if (!(*pskb)) 4021 return -ENOMEM; 4022 skb_reserve(*pskb, ETH_HLEN); 4023 if (data_len <= 64) { 4024 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4025 data_len); 4026 } else { 4027 get_page(page); 4028 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 4029 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 4030 data_len - 64); 4031 (*pskb)->data_len += data_len - 64; 4032 (*pskb)->len += data_len - 64; 4033 (*pskb)->truesize += data_len - 64; 4034 (*pfrag)++; 4035 } 4036 } else { 4037 get_page(page); 4038 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4039 (*pskb)->data_len += data_len; 4040 (*pskb)->len += data_len; 4041 (*pskb)->truesize += data_len; 4042 (*pfrag)++; 4043 } 4044 return 0; 4045 } 4046 4047 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4048 struct qdio_buffer *buffer, 4049 struct qdio_buffer_element **__element, int *__offset, 4050 struct qeth_hdr **hdr) 4051 { 4052 struct qdio_buffer_element *element = *__element; 4053 int offset = *__offset; 4054 struct sk_buff *skb = NULL; 4055 int skb_len = 0; 4056 void *data_ptr; 4057 int data_len; 4058 int headroom = 0; 4059 int use_rx_sg = 0; 4060 int frag = 0; 4061 4062 /* qeth_hdr must not cross element boundaries */ 4063 if (element->length < offset + sizeof(struct qeth_hdr)) { 4064 if (qeth_is_last_sbale(element)) 4065 return NULL; 4066 element++; 4067 offset = 0; 4068 if (element->length < sizeof(struct qeth_hdr)) 4069 return NULL; 4070 } 4071 *hdr = element->addr + offset; 4072 4073 offset += sizeof(struct qeth_hdr); 4074 switch ((*hdr)->hdr.l2.id) { 4075 case QETH_HEADER_TYPE_LAYER2: 4076 skb_len = (*hdr)->hdr.l2.pkt_length; 4077 break; 4078 case QETH_HEADER_TYPE_LAYER3: 4079 skb_len = (*hdr)->hdr.l3.length; 4080 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4081 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4082 headroom = TR_HLEN; 4083 else 4084 headroom = ETH_HLEN; 4085 break; 4086 case QETH_HEADER_TYPE_OSN: 4087 skb_len = (*hdr)->hdr.osn.pdu_length; 4088 headroom = sizeof(struct qeth_hdr); 4089 break; 4090 default: 4091 break; 4092 } 4093 4094 if (!skb_len) 4095 return NULL; 4096 4097 if ((skb_len >= card->options.rx_sg_cb) && 4098 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4099 (!atomic_read(&card->force_alloc_skb))) { 4100 use_rx_sg = 1; 4101 } else { 4102 skb = dev_alloc_skb(skb_len + headroom); 4103 if (!skb) 4104 goto no_mem; 4105 if (headroom) 4106 skb_reserve(skb, headroom); 4107 } 4108 4109 data_ptr = element->addr + offset; 4110 while (skb_len) { 4111 data_len = min(skb_len, (int)(element->length - offset)); 4112 if (data_len) { 4113 if (use_rx_sg) { 4114 if (qeth_create_skb_frag(element, &skb, offset, 4115 &frag, data_len)) 4116 goto no_mem; 4117 } else { 4118 memcpy(skb_put(skb, data_len), data_ptr, 4119 data_len); 4120 } 4121 } 4122 skb_len -= data_len; 4123 if (skb_len) { 4124 if (qeth_is_last_sbale(element)) { 4125 QETH_CARD_TEXT(card, 4, "unexeob"); 4126 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4127 dev_kfree_skb_any(skb); 4128 card->stats.rx_errors++; 4129 return NULL; 4130 } 4131 element++; 4132 offset = 0; 4133 data_ptr = element->addr; 4134 } else { 4135 offset += data_len; 4136 } 4137 } 4138 *__element = element; 4139 *__offset = offset; 4140 if (use_rx_sg && card->options.performance_stats) { 4141 card->perf_stats.sg_skbs_rx++; 4142 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4143 } 4144 return skb; 4145 no_mem: 4146 if (net_ratelimit()) { 4147 QETH_CARD_TEXT(card, 2, "noskbmem"); 4148 } 4149 card->stats.rx_dropped++; 4150 return NULL; 4151 } 4152 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4153 4154 static void qeth_unregister_dbf_views(void) 4155 { 4156 int x; 4157 for (x = 0; x < QETH_DBF_INFOS; x++) { 4158 debug_unregister(qeth_dbf[x].id); 4159 qeth_dbf[x].id = NULL; 4160 } 4161 } 4162 4163 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4164 { 4165 char dbf_txt_buf[32]; 4166 va_list args; 4167 4168 if (level > id->level) 4169 return; 4170 va_start(args, fmt); 4171 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4172 va_end(args); 4173 debug_text_event(id, level, dbf_txt_buf); 4174 } 4175 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4176 4177 static int qeth_register_dbf_views(void) 4178 { 4179 int ret; 4180 int x; 4181 4182 for (x = 0; x < QETH_DBF_INFOS; x++) { 4183 /* register the areas */ 4184 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4185 qeth_dbf[x].pages, 4186 qeth_dbf[x].areas, 4187 qeth_dbf[x].len); 4188 if (qeth_dbf[x].id == NULL) { 4189 qeth_unregister_dbf_views(); 4190 return -ENOMEM; 4191 } 4192 4193 /* register a view */ 4194 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4195 if (ret) { 4196 qeth_unregister_dbf_views(); 4197 return ret; 4198 } 4199 4200 /* set a passing level */ 4201 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4202 } 4203 4204 return 0; 4205 } 4206 4207 int qeth_core_load_discipline(struct qeth_card *card, 4208 enum qeth_discipline_id discipline) 4209 { 4210 int rc = 0; 4211 switch (discipline) { 4212 case QETH_DISCIPLINE_LAYER3: 4213 card->discipline.ccwgdriver = try_then_request_module( 4214 symbol_get(qeth_l3_ccwgroup_driver), 4215 "qeth_l3"); 4216 break; 4217 case QETH_DISCIPLINE_LAYER2: 4218 card->discipline.ccwgdriver = try_then_request_module( 4219 symbol_get(qeth_l2_ccwgroup_driver), 4220 "qeth_l2"); 4221 break; 4222 } 4223 if (!card->discipline.ccwgdriver) { 4224 dev_err(&card->gdev->dev, "There is no kernel module to " 4225 "support discipline %d\n", discipline); 4226 rc = -EINVAL; 4227 } 4228 return rc; 4229 } 4230 4231 void qeth_core_free_discipline(struct qeth_card *card) 4232 { 4233 if (card->options.layer2) 4234 symbol_put(qeth_l2_ccwgroup_driver); 4235 else 4236 symbol_put(qeth_l3_ccwgroup_driver); 4237 card->discipline.ccwgdriver = NULL; 4238 } 4239 4240 static void qeth_determine_capabilities(struct qeth_card *card) 4241 { 4242 int rc; 4243 int length; 4244 char *prcd; 4245 4246 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4247 rc = ccw_device_set_online(CARD_DDEV(card)); 4248 if (rc) { 4249 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4250 goto out; 4251 } 4252 4253 4254 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4255 if (rc) { 4256 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4257 dev_name(&card->gdev->dev), rc); 4258 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4259 goto out_offline; 4260 } 4261 qeth_configure_unitaddr(card, prcd); 4262 qeth_configure_blkt_default(card, prcd); 4263 kfree(prcd); 4264 4265 rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd); 4266 if (rc) 4267 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4268 4269 out_offline: 4270 ccw_device_set_offline(CARD_DDEV(card)); 4271 out: 4272 return; 4273 } 4274 4275 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4276 { 4277 struct qeth_card *card; 4278 struct device *dev; 4279 int rc; 4280 unsigned long flags; 4281 char dbf_name[20]; 4282 4283 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4284 4285 dev = &gdev->dev; 4286 if (!get_device(dev)) 4287 return -ENODEV; 4288 4289 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4290 4291 card = qeth_alloc_card(); 4292 if (!card) { 4293 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4294 rc = -ENOMEM; 4295 goto err_dev; 4296 } 4297 4298 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 4299 dev_name(&gdev->dev)); 4300 card->debug = debug_register(dbf_name, 2, 1, 8); 4301 if (!card->debug) { 4302 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 4303 rc = -ENOMEM; 4304 goto err_card; 4305 } 4306 debug_register_view(card->debug, &debug_hex_ascii_view); 4307 4308 card->read.ccwdev = gdev->cdev[0]; 4309 card->write.ccwdev = gdev->cdev[1]; 4310 card->data.ccwdev = gdev->cdev[2]; 4311 dev_set_drvdata(&gdev->dev, card); 4312 card->gdev = gdev; 4313 gdev->cdev[0]->handler = qeth_irq; 4314 gdev->cdev[1]->handler = qeth_irq; 4315 gdev->cdev[2]->handler = qeth_irq; 4316 4317 rc = qeth_determine_card_type(card); 4318 if (rc) { 4319 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4320 goto err_dbf; 4321 } 4322 rc = qeth_setup_card(card); 4323 if (rc) { 4324 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4325 goto err_dbf; 4326 } 4327 4328 if (card->info.type == QETH_CARD_TYPE_OSN) 4329 rc = qeth_core_create_osn_attributes(dev); 4330 else 4331 rc = qeth_core_create_device_attributes(dev); 4332 if (rc) 4333 goto err_dbf; 4334 switch (card->info.type) { 4335 case QETH_CARD_TYPE_OSN: 4336 case QETH_CARD_TYPE_OSM: 4337 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4338 if (rc) 4339 goto err_attr; 4340 rc = card->discipline.ccwgdriver->probe(card->gdev); 4341 if (rc) 4342 goto err_disc; 4343 case QETH_CARD_TYPE_OSD: 4344 case QETH_CARD_TYPE_OSX: 4345 default: 4346 break; 4347 } 4348 4349 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4350 list_add_tail(&card->list, &qeth_core_card_list.list); 4351 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4352 4353 qeth_determine_capabilities(card); 4354 return 0; 4355 4356 err_disc: 4357 qeth_core_free_discipline(card); 4358 err_attr: 4359 if (card->info.type == QETH_CARD_TYPE_OSN) 4360 qeth_core_remove_osn_attributes(dev); 4361 else 4362 qeth_core_remove_device_attributes(dev); 4363 err_dbf: 4364 debug_unregister(card->debug); 4365 err_card: 4366 qeth_core_free_card(card); 4367 err_dev: 4368 put_device(dev); 4369 return rc; 4370 } 4371 4372 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4373 { 4374 unsigned long flags; 4375 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4376 4377 QETH_DBF_TEXT(SETUP, 2, "removedv"); 4378 4379 if (card->info.type == QETH_CARD_TYPE_OSN) { 4380 qeth_core_remove_osn_attributes(&gdev->dev); 4381 } else { 4382 qeth_core_remove_device_attributes(&gdev->dev); 4383 } 4384 4385 if (card->discipline.ccwgdriver) { 4386 card->discipline.ccwgdriver->remove(gdev); 4387 qeth_core_free_discipline(card); 4388 } 4389 4390 debug_unregister(card->debug); 4391 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4392 list_del(&card->list); 4393 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4394 qeth_core_free_card(card); 4395 dev_set_drvdata(&gdev->dev, NULL); 4396 put_device(&gdev->dev); 4397 return; 4398 } 4399 4400 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4401 { 4402 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4403 int rc = 0; 4404 int def_discipline; 4405 4406 if (!card->discipline.ccwgdriver) { 4407 if (card->info.type == QETH_CARD_TYPE_IQD) 4408 def_discipline = QETH_DISCIPLINE_LAYER3; 4409 else 4410 def_discipline = QETH_DISCIPLINE_LAYER2; 4411 rc = qeth_core_load_discipline(card, def_discipline); 4412 if (rc) 4413 goto err; 4414 rc = card->discipline.ccwgdriver->probe(card->gdev); 4415 if (rc) 4416 goto err; 4417 } 4418 rc = card->discipline.ccwgdriver->set_online(gdev); 4419 err: 4420 return rc; 4421 } 4422 4423 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4424 { 4425 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4426 return card->discipline.ccwgdriver->set_offline(gdev); 4427 } 4428 4429 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4430 { 4431 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4432 if (card->discipline.ccwgdriver && 4433 card->discipline.ccwgdriver->shutdown) 4434 card->discipline.ccwgdriver->shutdown(gdev); 4435 } 4436 4437 static int qeth_core_prepare(struct ccwgroup_device *gdev) 4438 { 4439 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4440 if (card->discipline.ccwgdriver && 4441 card->discipline.ccwgdriver->prepare) 4442 return card->discipline.ccwgdriver->prepare(gdev); 4443 return 0; 4444 } 4445 4446 static void qeth_core_complete(struct ccwgroup_device *gdev) 4447 { 4448 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4449 if (card->discipline.ccwgdriver && 4450 card->discipline.ccwgdriver->complete) 4451 card->discipline.ccwgdriver->complete(gdev); 4452 } 4453 4454 static int qeth_core_freeze(struct ccwgroup_device *gdev) 4455 { 4456 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4457 if (card->discipline.ccwgdriver && 4458 card->discipline.ccwgdriver->freeze) 4459 return card->discipline.ccwgdriver->freeze(gdev); 4460 return 0; 4461 } 4462 4463 static int qeth_core_thaw(struct ccwgroup_device *gdev) 4464 { 4465 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4466 if (card->discipline.ccwgdriver && 4467 card->discipline.ccwgdriver->thaw) 4468 return card->discipline.ccwgdriver->thaw(gdev); 4469 return 0; 4470 } 4471 4472 static int qeth_core_restore(struct ccwgroup_device *gdev) 4473 { 4474 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4475 if (card->discipline.ccwgdriver && 4476 card->discipline.ccwgdriver->restore) 4477 return card->discipline.ccwgdriver->restore(gdev); 4478 return 0; 4479 } 4480 4481 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4482 .owner = THIS_MODULE, 4483 .name = "qeth", 4484 .driver_id = 0xD8C5E3C8, 4485 .probe = qeth_core_probe_device, 4486 .remove = qeth_core_remove_device, 4487 .set_online = qeth_core_set_online, 4488 .set_offline = qeth_core_set_offline, 4489 .shutdown = qeth_core_shutdown, 4490 .prepare = qeth_core_prepare, 4491 .complete = qeth_core_complete, 4492 .freeze = qeth_core_freeze, 4493 .thaw = qeth_core_thaw, 4494 .restore = qeth_core_restore, 4495 }; 4496 4497 static ssize_t 4498 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4499 size_t count) 4500 { 4501 int err; 4502 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4503 qeth_core_ccwgroup_driver.driver_id); 4504 if (err) 4505 return err; 4506 else 4507 return count; 4508 } 4509 4510 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4511 4512 static struct { 4513 const char str[ETH_GSTRING_LEN]; 4514 } qeth_ethtool_stats_keys[] = { 4515 /* 0 */{"rx skbs"}, 4516 {"rx buffers"}, 4517 {"tx skbs"}, 4518 {"tx buffers"}, 4519 {"tx skbs no packing"}, 4520 {"tx buffers no packing"}, 4521 {"tx skbs packing"}, 4522 {"tx buffers packing"}, 4523 {"tx sg skbs"}, 4524 {"tx sg frags"}, 4525 /* 10 */{"rx sg skbs"}, 4526 {"rx sg frags"}, 4527 {"rx sg page allocs"}, 4528 {"tx large kbytes"}, 4529 {"tx large count"}, 4530 {"tx pk state ch n->p"}, 4531 {"tx pk state ch p->n"}, 4532 {"tx pk watermark low"}, 4533 {"tx pk watermark high"}, 4534 {"queue 0 buffer usage"}, 4535 /* 20 */{"queue 1 buffer usage"}, 4536 {"queue 2 buffer usage"}, 4537 {"queue 3 buffer usage"}, 4538 {"rx poll time"}, 4539 {"rx poll count"}, 4540 {"rx do_QDIO time"}, 4541 {"rx do_QDIO count"}, 4542 {"tx handler time"}, 4543 {"tx handler count"}, 4544 {"tx time"}, 4545 /* 30 */{"tx count"}, 4546 {"tx do_QDIO time"}, 4547 {"tx do_QDIO count"}, 4548 {"tx csum"}, 4549 {"tx lin"}, 4550 }; 4551 4552 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 4553 { 4554 switch (stringset) { 4555 case ETH_SS_STATS: 4556 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4557 default: 4558 return -EINVAL; 4559 } 4560 } 4561 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 4562 4563 void qeth_core_get_ethtool_stats(struct net_device *dev, 4564 struct ethtool_stats *stats, u64 *data) 4565 { 4566 struct qeth_card *card = dev->ml_priv; 4567 data[0] = card->stats.rx_packets - 4568 card->perf_stats.initial_rx_packets; 4569 data[1] = card->perf_stats.bufs_rec; 4570 data[2] = card->stats.tx_packets - 4571 card->perf_stats.initial_tx_packets; 4572 data[3] = card->perf_stats.bufs_sent; 4573 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4574 - card->perf_stats.skbs_sent_pack; 4575 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4576 data[6] = card->perf_stats.skbs_sent_pack; 4577 data[7] = card->perf_stats.bufs_sent_pack; 4578 data[8] = card->perf_stats.sg_skbs_sent; 4579 data[9] = card->perf_stats.sg_frags_sent; 4580 data[10] = card->perf_stats.sg_skbs_rx; 4581 data[11] = card->perf_stats.sg_frags_rx; 4582 data[12] = card->perf_stats.sg_alloc_page_rx; 4583 data[13] = (card->perf_stats.large_send_bytes >> 10); 4584 data[14] = card->perf_stats.large_send_cnt; 4585 data[15] = card->perf_stats.sc_dp_p; 4586 data[16] = card->perf_stats.sc_p_dp; 4587 data[17] = QETH_LOW_WATERMARK_PACK; 4588 data[18] = QETH_HIGH_WATERMARK_PACK; 4589 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4590 data[20] = (card->qdio.no_out_queues > 1) ? 4591 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4592 data[21] = (card->qdio.no_out_queues > 2) ? 4593 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4594 data[22] = (card->qdio.no_out_queues > 3) ? 4595 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4596 data[23] = card->perf_stats.inbound_time; 4597 data[24] = card->perf_stats.inbound_cnt; 4598 data[25] = card->perf_stats.inbound_do_qdio_time; 4599 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4600 data[27] = card->perf_stats.outbound_handler_time; 4601 data[28] = card->perf_stats.outbound_handler_cnt; 4602 data[29] = card->perf_stats.outbound_time; 4603 data[30] = card->perf_stats.outbound_cnt; 4604 data[31] = card->perf_stats.outbound_do_qdio_time; 4605 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4606 data[33] = card->perf_stats.tx_csum; 4607 data[34] = card->perf_stats.tx_lin; 4608 } 4609 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4610 4611 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4612 { 4613 switch (stringset) { 4614 case ETH_SS_STATS: 4615 memcpy(data, &qeth_ethtool_stats_keys, 4616 sizeof(qeth_ethtool_stats_keys)); 4617 break; 4618 default: 4619 WARN_ON(1); 4620 break; 4621 } 4622 } 4623 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4624 4625 void qeth_core_get_drvinfo(struct net_device *dev, 4626 struct ethtool_drvinfo *info) 4627 { 4628 struct qeth_card *card = dev->ml_priv; 4629 if (card->options.layer2) 4630 strcpy(info->driver, "qeth_l2"); 4631 else 4632 strcpy(info->driver, "qeth_l3"); 4633 4634 strcpy(info->version, "1.0"); 4635 strcpy(info->fw_version, card->info.mcl_level); 4636 sprintf(info->bus_info, "%s/%s/%s", 4637 CARD_RDEV_ID(card), 4638 CARD_WDEV_ID(card), 4639 CARD_DDEV_ID(card)); 4640 } 4641 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4642 4643 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4644 struct ethtool_cmd *ecmd) 4645 { 4646 struct qeth_card *card = netdev->ml_priv; 4647 enum qeth_link_types link_type; 4648 4649 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4650 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4651 else 4652 link_type = card->info.link_type; 4653 4654 ecmd->transceiver = XCVR_INTERNAL; 4655 ecmd->supported = SUPPORTED_Autoneg; 4656 ecmd->advertising = ADVERTISED_Autoneg; 4657 ecmd->duplex = DUPLEX_FULL; 4658 ecmd->autoneg = AUTONEG_ENABLE; 4659 4660 switch (link_type) { 4661 case QETH_LINK_TYPE_FAST_ETH: 4662 case QETH_LINK_TYPE_LANE_ETH100: 4663 ecmd->supported |= SUPPORTED_10baseT_Half | 4664 SUPPORTED_10baseT_Full | 4665 SUPPORTED_100baseT_Half | 4666 SUPPORTED_100baseT_Full | 4667 SUPPORTED_TP; 4668 ecmd->advertising |= ADVERTISED_10baseT_Half | 4669 ADVERTISED_10baseT_Full | 4670 ADVERTISED_100baseT_Half | 4671 ADVERTISED_100baseT_Full | 4672 ADVERTISED_TP; 4673 ecmd->speed = SPEED_100; 4674 ecmd->port = PORT_TP; 4675 break; 4676 4677 case QETH_LINK_TYPE_GBIT_ETH: 4678 case QETH_LINK_TYPE_LANE_ETH1000: 4679 ecmd->supported |= SUPPORTED_10baseT_Half | 4680 SUPPORTED_10baseT_Full | 4681 SUPPORTED_100baseT_Half | 4682 SUPPORTED_100baseT_Full | 4683 SUPPORTED_1000baseT_Half | 4684 SUPPORTED_1000baseT_Full | 4685 SUPPORTED_FIBRE; 4686 ecmd->advertising |= ADVERTISED_10baseT_Half | 4687 ADVERTISED_10baseT_Full | 4688 ADVERTISED_100baseT_Half | 4689 ADVERTISED_100baseT_Full | 4690 ADVERTISED_1000baseT_Half | 4691 ADVERTISED_1000baseT_Full | 4692 ADVERTISED_FIBRE; 4693 ecmd->speed = SPEED_1000; 4694 ecmd->port = PORT_FIBRE; 4695 break; 4696 4697 case QETH_LINK_TYPE_10GBIT_ETH: 4698 ecmd->supported |= SUPPORTED_10baseT_Half | 4699 SUPPORTED_10baseT_Full | 4700 SUPPORTED_100baseT_Half | 4701 SUPPORTED_100baseT_Full | 4702 SUPPORTED_1000baseT_Half | 4703 SUPPORTED_1000baseT_Full | 4704 SUPPORTED_10000baseT_Full | 4705 SUPPORTED_FIBRE; 4706 ecmd->advertising |= ADVERTISED_10baseT_Half | 4707 ADVERTISED_10baseT_Full | 4708 ADVERTISED_100baseT_Half | 4709 ADVERTISED_100baseT_Full | 4710 ADVERTISED_1000baseT_Half | 4711 ADVERTISED_1000baseT_Full | 4712 ADVERTISED_10000baseT_Full | 4713 ADVERTISED_FIBRE; 4714 ecmd->speed = SPEED_10000; 4715 ecmd->port = PORT_FIBRE; 4716 break; 4717 4718 default: 4719 ecmd->supported |= SUPPORTED_10baseT_Half | 4720 SUPPORTED_10baseT_Full | 4721 SUPPORTED_TP; 4722 ecmd->advertising |= ADVERTISED_10baseT_Half | 4723 ADVERTISED_10baseT_Full | 4724 ADVERTISED_TP; 4725 ecmd->speed = SPEED_10; 4726 ecmd->port = PORT_TP; 4727 } 4728 4729 return 0; 4730 } 4731 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4732 4733 static int __init qeth_core_init(void) 4734 { 4735 int rc; 4736 4737 pr_info("loading core functions\n"); 4738 INIT_LIST_HEAD(&qeth_core_card_list.list); 4739 rwlock_init(&qeth_core_card_list.rwlock); 4740 4741 rc = qeth_register_dbf_views(); 4742 if (rc) 4743 goto out_err; 4744 rc = ccw_driver_register(&qeth_ccw_driver); 4745 if (rc) 4746 goto ccw_err; 4747 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4748 if (rc) 4749 goto ccwgroup_err; 4750 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4751 &driver_attr_group); 4752 if (rc) 4753 goto driver_err; 4754 qeth_core_root_dev = root_device_register("qeth"); 4755 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4756 if (rc) 4757 goto register_err; 4758 4759 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 4760 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 4761 if (!qeth_core_header_cache) { 4762 rc = -ENOMEM; 4763 goto slab_err; 4764 } 4765 4766 return 0; 4767 slab_err: 4768 root_device_unregister(qeth_core_root_dev); 4769 register_err: 4770 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4771 &driver_attr_group); 4772 driver_err: 4773 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4774 ccwgroup_err: 4775 ccw_driver_unregister(&qeth_ccw_driver); 4776 ccw_err: 4777 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 4778 qeth_unregister_dbf_views(); 4779 out_err: 4780 pr_err("Initializing the qeth device driver failed\n"); 4781 return rc; 4782 } 4783 4784 static void __exit qeth_core_exit(void) 4785 { 4786 root_device_unregister(qeth_core_root_dev); 4787 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4788 &driver_attr_group); 4789 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4790 ccw_driver_unregister(&qeth_ccw_driver); 4791 kmem_cache_destroy(qeth_core_header_cache); 4792 qeth_unregister_dbf_views(); 4793 pr_info("core functions removed\n"); 4794 } 4795 4796 module_init(qeth_core_init); 4797 module_exit(qeth_core_exit); 4798 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4799 MODULE_DESCRIPTION("qeth core functions"); 4800 MODULE_LICENSE("GPL"); 4801