1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/io.h> 26 #include <asm/sysinfo.h> 27 #include <asm/compat.h> 28 29 #include "qeth_core.h" 30 31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 33 /* N P A M L V H */ 34 [QETH_DBF_SETUP] = {"qeth_setup", 35 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 37 &debug_sprintf_view, NULL}, 38 [QETH_DBF_CTRL] = {"qeth_control", 39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 40 }; 41 EXPORT_SYMBOL_GPL(qeth_dbf); 42 43 struct qeth_card_list_struct qeth_core_card_list; 44 EXPORT_SYMBOL_GPL(qeth_core_card_list); 45 struct kmem_cache *qeth_core_header_cache; 46 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 47 static struct kmem_cache *qeth_qdio_outbuf_cache; 48 49 static struct device *qeth_core_root_dev; 50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 51 static struct lock_class_key qdio_out_skb_queue_key; 52 static struct mutex qeth_mod_mutex; 53 54 static void qeth_send_control_data_cb(struct qeth_channel *, 55 struct qeth_cmd_buffer *); 56 static int qeth_issue_next_read(struct qeth_card *); 57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 59 static void qeth_free_buffer_pool(struct qeth_card *); 60 static int qeth_qdio_establish(struct qeth_card *); 61 static void qeth_free_qdio_buffers(struct qeth_card *); 62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 63 struct qeth_qdio_out_buffer *buf, 64 enum iucv_tx_notify notification); 65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum qeth_qdio_buffer_states newbufstate); 69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 70 71 struct workqueue_struct *qeth_wq; 72 EXPORT_SYMBOL_GPL(qeth_wq); 73 74 static void qeth_close_dev_handler(struct work_struct *work) 75 { 76 struct qeth_card *card; 77 78 card = container_of(work, struct qeth_card, close_dev_work); 79 QETH_CARD_TEXT(card, 2, "cldevhdl"); 80 rtnl_lock(); 81 dev_close(card->dev); 82 rtnl_unlock(); 83 ccwgroup_set_offline(card->gdev); 84 } 85 86 void qeth_close_dev(struct qeth_card *card) 87 { 88 QETH_CARD_TEXT(card, 2, "cldevsubm"); 89 queue_work(qeth_wq, &card->close_dev_work); 90 } 91 EXPORT_SYMBOL_GPL(qeth_close_dev); 92 93 static inline const char *qeth_get_cardname(struct qeth_card *card) 94 { 95 if (card->info.guestlan) { 96 switch (card->info.type) { 97 case QETH_CARD_TYPE_OSD: 98 return " Virtual NIC QDIO"; 99 case QETH_CARD_TYPE_IQD: 100 return " Virtual NIC Hiper"; 101 case QETH_CARD_TYPE_OSM: 102 return " Virtual NIC QDIO - OSM"; 103 case QETH_CARD_TYPE_OSX: 104 return " Virtual NIC QDIO - OSX"; 105 default: 106 return " unknown"; 107 } 108 } else { 109 switch (card->info.type) { 110 case QETH_CARD_TYPE_OSD: 111 return " OSD Express"; 112 case QETH_CARD_TYPE_IQD: 113 return " HiperSockets"; 114 case QETH_CARD_TYPE_OSN: 115 return " OSN QDIO"; 116 case QETH_CARD_TYPE_OSM: 117 return " OSM QDIO"; 118 case QETH_CARD_TYPE_OSX: 119 return " OSX QDIO"; 120 default: 121 return " unknown"; 122 } 123 } 124 return " n/a"; 125 } 126 127 /* max length to be returned: 14 */ 128 const char *qeth_get_cardname_short(struct qeth_card *card) 129 { 130 if (card->info.guestlan) { 131 switch (card->info.type) { 132 case QETH_CARD_TYPE_OSD: 133 return "Virt.NIC QDIO"; 134 case QETH_CARD_TYPE_IQD: 135 return "Virt.NIC Hiper"; 136 case QETH_CARD_TYPE_OSM: 137 return "Virt.NIC OSM"; 138 case QETH_CARD_TYPE_OSX: 139 return "Virt.NIC OSX"; 140 default: 141 return "unknown"; 142 } 143 } else { 144 switch (card->info.type) { 145 case QETH_CARD_TYPE_OSD: 146 switch (card->info.link_type) { 147 case QETH_LINK_TYPE_FAST_ETH: 148 return "OSD_100"; 149 case QETH_LINK_TYPE_HSTR: 150 return "HSTR"; 151 case QETH_LINK_TYPE_GBIT_ETH: 152 return "OSD_1000"; 153 case QETH_LINK_TYPE_10GBIT_ETH: 154 return "OSD_10GIG"; 155 case QETH_LINK_TYPE_LANE_ETH100: 156 return "OSD_FE_LANE"; 157 case QETH_LINK_TYPE_LANE_TR: 158 return "OSD_TR_LANE"; 159 case QETH_LINK_TYPE_LANE_ETH1000: 160 return "OSD_GbE_LANE"; 161 case QETH_LINK_TYPE_LANE: 162 return "OSD_ATM_LANE"; 163 default: 164 return "OSD_Express"; 165 } 166 case QETH_CARD_TYPE_IQD: 167 return "HiperSockets"; 168 case QETH_CARD_TYPE_OSN: 169 return "OSN"; 170 case QETH_CARD_TYPE_OSM: 171 return "OSM_1000"; 172 case QETH_CARD_TYPE_OSX: 173 return "OSX_10GIG"; 174 default: 175 return "unknown"; 176 } 177 } 178 return "n/a"; 179 } 180 181 void qeth_set_recovery_task(struct qeth_card *card) 182 { 183 card->recovery_task = current; 184 } 185 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 186 187 void qeth_clear_recovery_task(struct qeth_card *card) 188 { 189 card->recovery_task = NULL; 190 } 191 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 192 193 static bool qeth_is_recovery_task(const struct qeth_card *card) 194 { 195 return card->recovery_task == current; 196 } 197 198 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 199 int clear_start_mask) 200 { 201 unsigned long flags; 202 203 spin_lock_irqsave(&card->thread_mask_lock, flags); 204 card->thread_allowed_mask = threads; 205 if (clear_start_mask) 206 card->thread_start_mask &= threads; 207 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 208 wake_up(&card->wait_q); 209 } 210 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 211 212 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 213 { 214 unsigned long flags; 215 int rc = 0; 216 217 spin_lock_irqsave(&card->thread_mask_lock, flags); 218 rc = (card->thread_running_mask & threads); 219 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 220 return rc; 221 } 222 EXPORT_SYMBOL_GPL(qeth_threads_running); 223 224 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 225 { 226 if (qeth_is_recovery_task(card)) 227 return 0; 228 return wait_event_interruptible(card->wait_q, 229 qeth_threads_running(card, threads) == 0); 230 } 231 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 232 233 void qeth_clear_working_pool_list(struct qeth_card *card) 234 { 235 struct qeth_buffer_pool_entry *pool_entry, *tmp; 236 237 QETH_CARD_TEXT(card, 5, "clwrklst"); 238 list_for_each_entry_safe(pool_entry, tmp, 239 &card->qdio.in_buf_pool.entry_list, list){ 240 list_del(&pool_entry->list); 241 } 242 } 243 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 244 245 static int qeth_alloc_buffer_pool(struct qeth_card *card) 246 { 247 struct qeth_buffer_pool_entry *pool_entry; 248 void *ptr; 249 int i, j; 250 251 QETH_CARD_TEXT(card, 5, "alocpool"); 252 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 253 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 254 if (!pool_entry) { 255 qeth_free_buffer_pool(card); 256 return -ENOMEM; 257 } 258 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 259 ptr = (void *) __get_free_page(GFP_KERNEL); 260 if (!ptr) { 261 while (j > 0) 262 free_page((unsigned long) 263 pool_entry->elements[--j]); 264 kfree(pool_entry); 265 qeth_free_buffer_pool(card); 266 return -ENOMEM; 267 } 268 pool_entry->elements[j] = ptr; 269 } 270 list_add(&pool_entry->init_list, 271 &card->qdio.init_pool.entry_list); 272 } 273 return 0; 274 } 275 276 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 277 { 278 QETH_CARD_TEXT(card, 2, "realcbp"); 279 280 if ((card->state != CARD_STATE_DOWN) && 281 (card->state != CARD_STATE_RECOVER)) 282 return -EPERM; 283 284 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 285 qeth_clear_working_pool_list(card); 286 qeth_free_buffer_pool(card); 287 card->qdio.in_buf_pool.buf_count = bufcnt; 288 card->qdio.init_pool.buf_count = bufcnt; 289 return qeth_alloc_buffer_pool(card); 290 } 291 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 292 293 static inline int qeth_cq_init(struct qeth_card *card) 294 { 295 int rc; 296 297 if (card->options.cq == QETH_CQ_ENABLED) { 298 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 299 memset(card->qdio.c_q->qdio_bufs, 0, 300 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 301 card->qdio.c_q->next_buf_to_init = 127; 302 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 303 card->qdio.no_in_queues - 1, 0, 304 127); 305 if (rc) { 306 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 307 goto out; 308 } 309 } 310 rc = 0; 311 out: 312 return rc; 313 } 314 315 static inline int qeth_alloc_cq(struct qeth_card *card) 316 { 317 int rc; 318 319 if (card->options.cq == QETH_CQ_ENABLED) { 320 int i; 321 struct qdio_outbuf_state *outbuf_states; 322 323 QETH_DBF_TEXT(SETUP, 2, "cqon"); 324 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 325 GFP_KERNEL); 326 if (!card->qdio.c_q) { 327 rc = -1; 328 goto kmsg_out; 329 } 330 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 331 332 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 333 card->qdio.c_q->bufs[i].buffer = 334 &card->qdio.c_q->qdio_bufs[i]; 335 } 336 337 card->qdio.no_in_queues = 2; 338 339 card->qdio.out_bufstates = 340 kzalloc(card->qdio.no_out_queues * 341 QDIO_MAX_BUFFERS_PER_Q * 342 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 343 outbuf_states = card->qdio.out_bufstates; 344 if (outbuf_states == NULL) { 345 rc = -1; 346 goto free_cq_out; 347 } 348 for (i = 0; i < card->qdio.no_out_queues; ++i) { 349 card->qdio.out_qs[i]->bufstates = outbuf_states; 350 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 351 } 352 } else { 353 QETH_DBF_TEXT(SETUP, 2, "nocq"); 354 card->qdio.c_q = NULL; 355 card->qdio.no_in_queues = 1; 356 } 357 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 358 rc = 0; 359 out: 360 return rc; 361 free_cq_out: 362 kfree(card->qdio.c_q); 363 card->qdio.c_q = NULL; 364 kmsg_out: 365 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 366 goto out; 367 } 368 369 static inline void qeth_free_cq(struct qeth_card *card) 370 { 371 if (card->qdio.c_q) { 372 --card->qdio.no_in_queues; 373 kfree(card->qdio.c_q); 374 card->qdio.c_q = NULL; 375 } 376 kfree(card->qdio.out_bufstates); 377 card->qdio.out_bufstates = NULL; 378 } 379 380 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 381 int delayed) { 382 enum iucv_tx_notify n; 383 384 switch (sbalf15) { 385 case 0: 386 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 387 break; 388 case 4: 389 case 16: 390 case 17: 391 case 18: 392 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 393 TX_NOTIFY_UNREACHABLE; 394 break; 395 default: 396 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 397 TX_NOTIFY_GENERALERROR; 398 break; 399 } 400 401 return n; 402 } 403 404 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 405 int bidx, int forced_cleanup) 406 { 407 if (q->card->options.cq != QETH_CQ_ENABLED) 408 return; 409 410 if (q->bufs[bidx]->next_pending != NULL) { 411 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 412 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 413 414 while (c) { 415 if (forced_cleanup || 416 atomic_read(&c->state) == 417 QETH_QDIO_BUF_HANDLED_DELAYED) { 418 struct qeth_qdio_out_buffer *f = c; 419 QETH_CARD_TEXT(f->q->card, 5, "fp"); 420 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 421 /* release here to avoid interleaving between 422 outbound tasklet and inbound tasklet 423 regarding notifications and lifecycle */ 424 qeth_release_skbs(c); 425 426 c = f->next_pending; 427 WARN_ON_ONCE(head->next_pending != f); 428 head->next_pending = c; 429 kmem_cache_free(qeth_qdio_outbuf_cache, f); 430 } else { 431 head = c; 432 c = c->next_pending; 433 } 434 435 } 436 } 437 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 438 QETH_QDIO_BUF_HANDLED_DELAYED)) { 439 /* for recovery situations */ 440 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 441 qeth_init_qdio_out_buf(q, bidx); 442 QETH_CARD_TEXT(q->card, 2, "clprecov"); 443 } 444 } 445 446 447 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 448 unsigned long phys_aob_addr) { 449 struct qaob *aob; 450 struct qeth_qdio_out_buffer *buffer; 451 enum iucv_tx_notify notification; 452 453 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 454 QETH_CARD_TEXT(card, 5, "haob"); 455 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 456 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 457 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 458 459 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 460 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 461 notification = TX_NOTIFY_OK; 462 } else { 463 WARN_ON_ONCE(atomic_read(&buffer->state) != 464 QETH_QDIO_BUF_PENDING); 465 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 466 notification = TX_NOTIFY_DELAYED_OK; 467 } 468 469 if (aob->aorc != 0) { 470 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 471 notification = qeth_compute_cq_notification(aob->aorc, 1); 472 } 473 qeth_notify_skbs(buffer->q, buffer, notification); 474 475 buffer->aob = NULL; 476 qeth_clear_output_buffer(buffer->q, buffer, 477 QETH_QDIO_BUF_HANDLED_DELAYED); 478 479 /* from here on: do not touch buffer anymore */ 480 qdio_release_aob(aob); 481 } 482 483 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 484 { 485 return card->options.cq == QETH_CQ_ENABLED && 486 card->qdio.c_q != NULL && 487 queue != 0 && 488 queue == card->qdio.no_in_queues - 1; 489 } 490 491 492 static int qeth_issue_next_read(struct qeth_card *card) 493 { 494 int rc; 495 struct qeth_cmd_buffer *iob; 496 497 QETH_CARD_TEXT(card, 5, "issnxrd"); 498 if (card->read.state != CH_STATE_UP) 499 return -EIO; 500 iob = qeth_get_buffer(&card->read); 501 if (!iob) { 502 dev_warn(&card->gdev->dev, "The qeth device driver " 503 "failed to recover an error on the device\n"); 504 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 505 "available\n", dev_name(&card->gdev->dev)); 506 return -ENOMEM; 507 } 508 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 509 QETH_CARD_TEXT(card, 6, "noirqpnd"); 510 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 511 (addr_t) iob, 0, 0); 512 if (rc) { 513 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 514 "rc=%i\n", dev_name(&card->gdev->dev), rc); 515 atomic_set(&card->read.irq_pending, 0); 516 card->read_or_write_problem = 1; 517 qeth_schedule_recovery(card); 518 wake_up(&card->wait_q); 519 } 520 return rc; 521 } 522 523 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 524 { 525 struct qeth_reply *reply; 526 527 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 528 if (reply) { 529 atomic_set(&reply->refcnt, 1); 530 atomic_set(&reply->received, 0); 531 reply->card = card; 532 } 533 return reply; 534 } 535 536 static void qeth_get_reply(struct qeth_reply *reply) 537 { 538 WARN_ON(atomic_read(&reply->refcnt) <= 0); 539 atomic_inc(&reply->refcnt); 540 } 541 542 static void qeth_put_reply(struct qeth_reply *reply) 543 { 544 WARN_ON(atomic_read(&reply->refcnt) <= 0); 545 if (atomic_dec_and_test(&reply->refcnt)) 546 kfree(reply); 547 } 548 549 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 550 struct qeth_card *card) 551 { 552 char *ipa_name; 553 int com = cmd->hdr.command; 554 ipa_name = qeth_get_ipa_cmd_name(com); 555 if (rc) 556 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 557 "x%X \"%s\"\n", 558 ipa_name, com, dev_name(&card->gdev->dev), 559 QETH_CARD_IFNAME(card), rc, 560 qeth_get_ipa_msg(rc)); 561 else 562 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 563 ipa_name, com, dev_name(&card->gdev->dev), 564 QETH_CARD_IFNAME(card)); 565 } 566 567 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 568 struct qeth_cmd_buffer *iob) 569 { 570 struct qeth_ipa_cmd *cmd = NULL; 571 572 QETH_CARD_TEXT(card, 5, "chkipad"); 573 if (IS_IPA(iob->data)) { 574 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 575 if (IS_IPA_REPLY(cmd)) { 576 if (cmd->hdr.command != IPA_CMD_SETCCID && 577 cmd->hdr.command != IPA_CMD_DELCCID && 578 cmd->hdr.command != IPA_CMD_MODCCID && 579 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 580 qeth_issue_ipa_msg(cmd, 581 cmd->hdr.return_code, card); 582 return cmd; 583 } else { 584 switch (cmd->hdr.command) { 585 case IPA_CMD_STOPLAN: 586 if (cmd->hdr.return_code == 587 IPA_RC_VEPA_TO_VEB_TRANSITION) { 588 dev_err(&card->gdev->dev, 589 "Interface %s is down because the " 590 "adjacent port is no longer in " 591 "reflective relay mode\n", 592 QETH_CARD_IFNAME(card)); 593 qeth_close_dev(card); 594 } else { 595 dev_warn(&card->gdev->dev, 596 "The link for interface %s on CHPID" 597 " 0x%X failed\n", 598 QETH_CARD_IFNAME(card), 599 card->info.chpid); 600 qeth_issue_ipa_msg(cmd, 601 cmd->hdr.return_code, card); 602 } 603 card->lan_online = 0; 604 if (card->dev && netif_carrier_ok(card->dev)) 605 netif_carrier_off(card->dev); 606 return NULL; 607 case IPA_CMD_STARTLAN: 608 dev_info(&card->gdev->dev, 609 "The link for %s on CHPID 0x%X has" 610 " been restored\n", 611 QETH_CARD_IFNAME(card), 612 card->info.chpid); 613 netif_carrier_on(card->dev); 614 card->lan_online = 1; 615 if (card->info.hwtrap) 616 card->info.hwtrap = 2; 617 qeth_schedule_recovery(card); 618 return NULL; 619 case IPA_CMD_SETBRIDGEPORT: 620 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 621 if (card->discipline->control_event_handler 622 (card, cmd)) 623 return cmd; 624 else 625 return NULL; 626 case IPA_CMD_MODCCID: 627 return cmd; 628 case IPA_CMD_REGISTER_LOCAL_ADDR: 629 QETH_CARD_TEXT(card, 3, "irla"); 630 break; 631 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 632 QETH_CARD_TEXT(card, 3, "urla"); 633 break; 634 default: 635 QETH_DBF_MESSAGE(2, "Received data is IPA " 636 "but not a reply!\n"); 637 break; 638 } 639 } 640 } 641 return cmd; 642 } 643 644 void qeth_clear_ipacmd_list(struct qeth_card *card) 645 { 646 struct qeth_reply *reply, *r; 647 unsigned long flags; 648 649 QETH_CARD_TEXT(card, 4, "clipalst"); 650 651 spin_lock_irqsave(&card->lock, flags); 652 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 653 qeth_get_reply(reply); 654 reply->rc = -EIO; 655 atomic_inc(&reply->received); 656 list_del_init(&reply->list); 657 wake_up(&reply->wait_q); 658 qeth_put_reply(reply); 659 } 660 spin_unlock_irqrestore(&card->lock, flags); 661 atomic_set(&card->write.irq_pending, 0); 662 } 663 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 664 665 static int qeth_check_idx_response(struct qeth_card *card, 666 unsigned char *buffer) 667 { 668 if (!buffer) 669 return 0; 670 671 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 672 if ((buffer[2] & 0xc0) == 0xc0) { 673 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 674 "with cause code 0x%02x%s\n", 675 buffer[4], 676 ((buffer[4] == 0x22) ? 677 " -- try another portname" : "")); 678 QETH_CARD_TEXT(card, 2, "ckidxres"); 679 QETH_CARD_TEXT(card, 2, " idxterm"); 680 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 681 if (buffer[4] == 0xf6) { 682 dev_err(&card->gdev->dev, 683 "The qeth device is not configured " 684 "for the OSI layer required by z/VM\n"); 685 return -EPERM; 686 } 687 return -EIO; 688 } 689 return 0; 690 } 691 692 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 693 __u32 len) 694 { 695 struct qeth_card *card; 696 697 card = CARD_FROM_CDEV(channel->ccwdev); 698 QETH_CARD_TEXT(card, 4, "setupccw"); 699 if (channel == &card->read) 700 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 701 else 702 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 703 channel->ccw.count = len; 704 channel->ccw.cda = (__u32) __pa(iob); 705 } 706 707 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 708 { 709 __u8 index; 710 711 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 712 index = channel->io_buf_no; 713 do { 714 if (channel->iob[index].state == BUF_STATE_FREE) { 715 channel->iob[index].state = BUF_STATE_LOCKED; 716 channel->io_buf_no = (channel->io_buf_no + 1) % 717 QETH_CMD_BUFFER_NO; 718 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 719 return channel->iob + index; 720 } 721 index = (index + 1) % QETH_CMD_BUFFER_NO; 722 } while (index != channel->io_buf_no); 723 724 return NULL; 725 } 726 727 void qeth_release_buffer(struct qeth_channel *channel, 728 struct qeth_cmd_buffer *iob) 729 { 730 unsigned long flags; 731 732 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 733 spin_lock_irqsave(&channel->iob_lock, flags); 734 memset(iob->data, 0, QETH_BUFSIZE); 735 iob->state = BUF_STATE_FREE; 736 iob->callback = qeth_send_control_data_cb; 737 iob->rc = 0; 738 spin_unlock_irqrestore(&channel->iob_lock, flags); 739 wake_up(&channel->wait_q); 740 } 741 EXPORT_SYMBOL_GPL(qeth_release_buffer); 742 743 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 744 { 745 struct qeth_cmd_buffer *buffer = NULL; 746 unsigned long flags; 747 748 spin_lock_irqsave(&channel->iob_lock, flags); 749 buffer = __qeth_get_buffer(channel); 750 spin_unlock_irqrestore(&channel->iob_lock, flags); 751 return buffer; 752 } 753 754 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 755 { 756 struct qeth_cmd_buffer *buffer; 757 wait_event(channel->wait_q, 758 ((buffer = qeth_get_buffer(channel)) != NULL)); 759 return buffer; 760 } 761 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 762 763 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 764 { 765 int cnt; 766 767 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 768 qeth_release_buffer(channel, &channel->iob[cnt]); 769 channel->buf_no = 0; 770 channel->io_buf_no = 0; 771 } 772 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 773 774 static void qeth_send_control_data_cb(struct qeth_channel *channel, 775 struct qeth_cmd_buffer *iob) 776 { 777 struct qeth_card *card; 778 struct qeth_reply *reply, *r; 779 struct qeth_ipa_cmd *cmd; 780 unsigned long flags; 781 int keep_reply; 782 int rc = 0; 783 784 card = CARD_FROM_CDEV(channel->ccwdev); 785 QETH_CARD_TEXT(card, 4, "sndctlcb"); 786 rc = qeth_check_idx_response(card, iob->data); 787 switch (rc) { 788 case 0: 789 break; 790 case -EIO: 791 qeth_clear_ipacmd_list(card); 792 qeth_schedule_recovery(card); 793 /* fall through */ 794 default: 795 goto out; 796 } 797 798 cmd = qeth_check_ipa_data(card, iob); 799 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 800 goto out; 801 /*in case of OSN : check if cmd is set */ 802 if (card->info.type == QETH_CARD_TYPE_OSN && 803 cmd && 804 cmd->hdr.command != IPA_CMD_STARTLAN && 805 card->osn_info.assist_cb != NULL) { 806 card->osn_info.assist_cb(card->dev, cmd); 807 goto out; 808 } 809 810 spin_lock_irqsave(&card->lock, flags); 811 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 812 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 813 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 814 qeth_get_reply(reply); 815 list_del_init(&reply->list); 816 spin_unlock_irqrestore(&card->lock, flags); 817 keep_reply = 0; 818 if (reply->callback != NULL) { 819 if (cmd) { 820 reply->offset = (__u16)((char *)cmd - 821 (char *)iob->data); 822 keep_reply = reply->callback(card, 823 reply, 824 (unsigned long)cmd); 825 } else 826 keep_reply = reply->callback(card, 827 reply, 828 (unsigned long)iob); 829 } 830 if (cmd) 831 reply->rc = (u16) cmd->hdr.return_code; 832 else if (iob->rc) 833 reply->rc = iob->rc; 834 if (keep_reply) { 835 spin_lock_irqsave(&card->lock, flags); 836 list_add_tail(&reply->list, 837 &card->cmd_waiter_list); 838 spin_unlock_irqrestore(&card->lock, flags); 839 } else { 840 atomic_inc(&reply->received); 841 wake_up(&reply->wait_q); 842 } 843 qeth_put_reply(reply); 844 goto out; 845 } 846 } 847 spin_unlock_irqrestore(&card->lock, flags); 848 out: 849 memcpy(&card->seqno.pdu_hdr_ack, 850 QETH_PDU_HEADER_SEQ_NO(iob->data), 851 QETH_SEQ_NO_LENGTH); 852 qeth_release_buffer(channel, iob); 853 } 854 855 static int qeth_setup_channel(struct qeth_channel *channel) 856 { 857 int cnt; 858 859 QETH_DBF_TEXT(SETUP, 2, "setupch"); 860 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 861 channel->iob[cnt].data = 862 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 863 if (channel->iob[cnt].data == NULL) 864 break; 865 channel->iob[cnt].state = BUF_STATE_FREE; 866 channel->iob[cnt].channel = channel; 867 channel->iob[cnt].callback = qeth_send_control_data_cb; 868 channel->iob[cnt].rc = 0; 869 } 870 if (cnt < QETH_CMD_BUFFER_NO) { 871 while (cnt-- > 0) 872 kfree(channel->iob[cnt].data); 873 return -ENOMEM; 874 } 875 channel->buf_no = 0; 876 channel->io_buf_no = 0; 877 atomic_set(&channel->irq_pending, 0); 878 spin_lock_init(&channel->iob_lock); 879 880 init_waitqueue_head(&channel->wait_q); 881 return 0; 882 } 883 884 static int qeth_set_thread_start_bit(struct qeth_card *card, 885 unsigned long thread) 886 { 887 unsigned long flags; 888 889 spin_lock_irqsave(&card->thread_mask_lock, flags); 890 if (!(card->thread_allowed_mask & thread) || 891 (card->thread_start_mask & thread)) { 892 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 893 return -EPERM; 894 } 895 card->thread_start_mask |= thread; 896 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 897 return 0; 898 } 899 900 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 901 { 902 unsigned long flags; 903 904 spin_lock_irqsave(&card->thread_mask_lock, flags); 905 card->thread_start_mask &= ~thread; 906 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 907 wake_up(&card->wait_q); 908 } 909 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 910 911 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 912 { 913 unsigned long flags; 914 915 spin_lock_irqsave(&card->thread_mask_lock, flags); 916 card->thread_running_mask &= ~thread; 917 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 918 wake_up(&card->wait_q); 919 } 920 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 921 922 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 923 { 924 unsigned long flags; 925 int rc = 0; 926 927 spin_lock_irqsave(&card->thread_mask_lock, flags); 928 if (card->thread_start_mask & thread) { 929 if ((card->thread_allowed_mask & thread) && 930 !(card->thread_running_mask & thread)) { 931 rc = 1; 932 card->thread_start_mask &= ~thread; 933 card->thread_running_mask |= thread; 934 } else 935 rc = -EPERM; 936 } 937 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 938 return rc; 939 } 940 941 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 942 { 943 int rc = 0; 944 945 wait_event(card->wait_q, 946 (rc = __qeth_do_run_thread(card, thread)) >= 0); 947 return rc; 948 } 949 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 950 951 void qeth_schedule_recovery(struct qeth_card *card) 952 { 953 QETH_CARD_TEXT(card, 2, "startrec"); 954 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 955 schedule_work(&card->kernel_thread_starter); 956 } 957 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 958 959 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 960 { 961 int dstat, cstat; 962 char *sense; 963 struct qeth_card *card; 964 965 sense = (char *) irb->ecw; 966 cstat = irb->scsw.cmd.cstat; 967 dstat = irb->scsw.cmd.dstat; 968 card = CARD_FROM_CDEV(cdev); 969 970 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 971 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 972 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 973 QETH_CARD_TEXT(card, 2, "CGENCHK"); 974 dev_warn(&cdev->dev, "The qeth device driver " 975 "failed to recover an error on the device\n"); 976 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 977 dev_name(&cdev->dev), dstat, cstat); 978 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 979 16, 1, irb, 64, 1); 980 return 1; 981 } 982 983 if (dstat & DEV_STAT_UNIT_CHECK) { 984 if (sense[SENSE_RESETTING_EVENT_BYTE] & 985 SENSE_RESETTING_EVENT_FLAG) { 986 QETH_CARD_TEXT(card, 2, "REVIND"); 987 return 1; 988 } 989 if (sense[SENSE_COMMAND_REJECT_BYTE] & 990 SENSE_COMMAND_REJECT_FLAG) { 991 QETH_CARD_TEXT(card, 2, "CMDREJi"); 992 return 1; 993 } 994 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 995 QETH_CARD_TEXT(card, 2, "AFFE"); 996 return 1; 997 } 998 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 999 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1000 return 0; 1001 } 1002 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1003 return 1; 1004 } 1005 return 0; 1006 } 1007 1008 static long __qeth_check_irb_error(struct ccw_device *cdev, 1009 unsigned long intparm, struct irb *irb) 1010 { 1011 struct qeth_card *card; 1012 1013 card = CARD_FROM_CDEV(cdev); 1014 1015 if (!IS_ERR(irb)) 1016 return 0; 1017 1018 switch (PTR_ERR(irb)) { 1019 case -EIO: 1020 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1021 dev_name(&cdev->dev)); 1022 QETH_CARD_TEXT(card, 2, "ckirberr"); 1023 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1024 break; 1025 case -ETIMEDOUT: 1026 dev_warn(&cdev->dev, "A hardware operation timed out" 1027 " on the device\n"); 1028 QETH_CARD_TEXT(card, 2, "ckirberr"); 1029 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1030 if (intparm == QETH_RCD_PARM) { 1031 if (card && (card->data.ccwdev == cdev)) { 1032 card->data.state = CH_STATE_DOWN; 1033 wake_up(&card->wait_q); 1034 } 1035 } 1036 break; 1037 default: 1038 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1039 dev_name(&cdev->dev), PTR_ERR(irb)); 1040 QETH_CARD_TEXT(card, 2, "ckirberr"); 1041 QETH_CARD_TEXT(card, 2, " rc???"); 1042 } 1043 return PTR_ERR(irb); 1044 } 1045 1046 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1047 struct irb *irb) 1048 { 1049 int rc; 1050 int cstat, dstat; 1051 struct qeth_cmd_buffer *buffer; 1052 struct qeth_channel *channel; 1053 struct qeth_card *card; 1054 struct qeth_cmd_buffer *iob; 1055 __u8 index; 1056 1057 if (__qeth_check_irb_error(cdev, intparm, irb)) 1058 return; 1059 cstat = irb->scsw.cmd.cstat; 1060 dstat = irb->scsw.cmd.dstat; 1061 1062 card = CARD_FROM_CDEV(cdev); 1063 if (!card) 1064 return; 1065 1066 QETH_CARD_TEXT(card, 5, "irq"); 1067 1068 if (card->read.ccwdev == cdev) { 1069 channel = &card->read; 1070 QETH_CARD_TEXT(card, 5, "read"); 1071 } else if (card->write.ccwdev == cdev) { 1072 channel = &card->write; 1073 QETH_CARD_TEXT(card, 5, "write"); 1074 } else { 1075 channel = &card->data; 1076 QETH_CARD_TEXT(card, 5, "data"); 1077 } 1078 atomic_set(&channel->irq_pending, 0); 1079 1080 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1081 channel->state = CH_STATE_STOPPED; 1082 1083 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1084 channel->state = CH_STATE_HALTED; 1085 1086 /*let's wake up immediately on data channel*/ 1087 if ((channel == &card->data) && (intparm != 0) && 1088 (intparm != QETH_RCD_PARM)) 1089 goto out; 1090 1091 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1092 QETH_CARD_TEXT(card, 6, "clrchpar"); 1093 /* we don't have to handle this further */ 1094 intparm = 0; 1095 } 1096 if (intparm == QETH_HALT_CHANNEL_PARM) { 1097 QETH_CARD_TEXT(card, 6, "hltchpar"); 1098 /* we don't have to handle this further */ 1099 intparm = 0; 1100 } 1101 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1102 (dstat & DEV_STAT_UNIT_CHECK) || 1103 (cstat)) { 1104 if (irb->esw.esw0.erw.cons) { 1105 dev_warn(&channel->ccwdev->dev, 1106 "The qeth device driver failed to recover " 1107 "an error on the device\n"); 1108 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1109 "0x%X dstat 0x%X\n", 1110 dev_name(&channel->ccwdev->dev), cstat, dstat); 1111 print_hex_dump(KERN_WARNING, "qeth: irb ", 1112 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1113 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1114 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1115 } 1116 if (intparm == QETH_RCD_PARM) { 1117 channel->state = CH_STATE_DOWN; 1118 goto out; 1119 } 1120 rc = qeth_get_problem(cdev, irb); 1121 if (rc) { 1122 qeth_clear_ipacmd_list(card); 1123 qeth_schedule_recovery(card); 1124 goto out; 1125 } 1126 } 1127 1128 if (intparm == QETH_RCD_PARM) { 1129 channel->state = CH_STATE_RCD_DONE; 1130 goto out; 1131 } 1132 if (intparm) { 1133 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1134 buffer->state = BUF_STATE_PROCESSED; 1135 } 1136 if (channel == &card->data) 1137 return; 1138 if (channel == &card->read && 1139 channel->state == CH_STATE_UP) 1140 qeth_issue_next_read(card); 1141 1142 iob = channel->iob; 1143 index = channel->buf_no; 1144 while (iob[index].state == BUF_STATE_PROCESSED) { 1145 if (iob[index].callback != NULL) 1146 iob[index].callback(channel, iob + index); 1147 1148 index = (index + 1) % QETH_CMD_BUFFER_NO; 1149 } 1150 channel->buf_no = index; 1151 out: 1152 wake_up(&card->wait_q); 1153 return; 1154 } 1155 1156 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1157 struct qeth_qdio_out_buffer *buf, 1158 enum iucv_tx_notify notification) 1159 { 1160 struct sk_buff *skb; 1161 1162 if (skb_queue_empty(&buf->skb_list)) 1163 goto out; 1164 skb = skb_peek(&buf->skb_list); 1165 while (skb) { 1166 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1167 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1168 if (skb->protocol == ETH_P_AF_IUCV) { 1169 if (skb->sk) { 1170 struct iucv_sock *iucv = iucv_sk(skb->sk); 1171 iucv->sk_txnotify(skb, notification); 1172 } 1173 } 1174 if (skb_queue_is_last(&buf->skb_list, skb)) 1175 skb = NULL; 1176 else 1177 skb = skb_queue_next(&buf->skb_list, skb); 1178 } 1179 out: 1180 return; 1181 } 1182 1183 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1184 { 1185 struct sk_buff *skb; 1186 struct iucv_sock *iucv; 1187 int notify_general_error = 0; 1188 1189 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1190 notify_general_error = 1; 1191 1192 /* release may never happen from within CQ tasklet scope */ 1193 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1194 1195 skb = skb_dequeue(&buf->skb_list); 1196 while (skb) { 1197 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1198 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1199 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1200 if (skb->sk) { 1201 iucv = iucv_sk(skb->sk); 1202 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1203 } 1204 } 1205 atomic_dec(&skb->users); 1206 dev_kfree_skb_any(skb); 1207 skb = skb_dequeue(&buf->skb_list); 1208 } 1209 } 1210 1211 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1212 struct qeth_qdio_out_buffer *buf, 1213 enum qeth_qdio_buffer_states newbufstate) 1214 { 1215 int i; 1216 1217 /* is PCI flag set on buffer? */ 1218 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1219 atomic_dec(&queue->set_pci_flags_count); 1220 1221 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1222 qeth_release_skbs(buf); 1223 } 1224 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1225 if (buf->buffer->element[i].addr && buf->is_header[i]) 1226 kmem_cache_free(qeth_core_header_cache, 1227 buf->buffer->element[i].addr); 1228 buf->is_header[i] = 0; 1229 buf->buffer->element[i].length = 0; 1230 buf->buffer->element[i].addr = NULL; 1231 buf->buffer->element[i].eflags = 0; 1232 buf->buffer->element[i].sflags = 0; 1233 } 1234 buf->buffer->element[15].eflags = 0; 1235 buf->buffer->element[15].sflags = 0; 1236 buf->next_element_to_fill = 0; 1237 atomic_set(&buf->state, newbufstate); 1238 } 1239 1240 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1241 { 1242 int j; 1243 1244 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1245 if (!q->bufs[j]) 1246 continue; 1247 qeth_cleanup_handled_pending(q, j, 1); 1248 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1249 if (free) { 1250 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1251 q->bufs[j] = NULL; 1252 } 1253 } 1254 } 1255 1256 void qeth_clear_qdio_buffers(struct qeth_card *card) 1257 { 1258 int i; 1259 1260 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1261 /* clear outbound buffers to free skbs */ 1262 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1263 if (card->qdio.out_qs[i]) { 1264 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1265 } 1266 } 1267 } 1268 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1269 1270 static void qeth_free_buffer_pool(struct qeth_card *card) 1271 { 1272 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1273 int i = 0; 1274 list_for_each_entry_safe(pool_entry, tmp, 1275 &card->qdio.init_pool.entry_list, init_list){ 1276 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1277 free_page((unsigned long)pool_entry->elements[i]); 1278 list_del(&pool_entry->init_list); 1279 kfree(pool_entry); 1280 } 1281 } 1282 1283 static void qeth_free_qdio_buffers(struct qeth_card *card) 1284 { 1285 int i, j; 1286 1287 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1288 QETH_QDIO_UNINITIALIZED) 1289 return; 1290 1291 qeth_free_cq(card); 1292 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1293 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1294 if (card->qdio.in_q->bufs[j].rx_skb) 1295 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1296 } 1297 kfree(card->qdio.in_q); 1298 card->qdio.in_q = NULL; 1299 /* inbound buffer pool */ 1300 qeth_free_buffer_pool(card); 1301 /* free outbound qdio_qs */ 1302 if (card->qdio.out_qs) { 1303 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1304 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1305 kfree(card->qdio.out_qs[i]); 1306 } 1307 kfree(card->qdio.out_qs); 1308 card->qdio.out_qs = NULL; 1309 } 1310 } 1311 1312 static void qeth_clean_channel(struct qeth_channel *channel) 1313 { 1314 int cnt; 1315 1316 QETH_DBF_TEXT(SETUP, 2, "freech"); 1317 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1318 kfree(channel->iob[cnt].data); 1319 } 1320 1321 static void qeth_set_single_write_queues(struct qeth_card *card) 1322 { 1323 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1324 (card->qdio.no_out_queues == 4)) 1325 qeth_free_qdio_buffers(card); 1326 1327 card->qdio.no_out_queues = 1; 1328 if (card->qdio.default_out_queue != 0) 1329 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1330 1331 card->qdio.default_out_queue = 0; 1332 } 1333 1334 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1335 { 1336 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1337 (card->qdio.no_out_queues == 1)) { 1338 qeth_free_qdio_buffers(card); 1339 card->qdio.default_out_queue = 2; 1340 } 1341 card->qdio.no_out_queues = 4; 1342 } 1343 1344 static void qeth_update_from_chp_desc(struct qeth_card *card) 1345 { 1346 struct ccw_device *ccwdev; 1347 struct channelPath_dsc { 1348 u8 flags; 1349 u8 lsn; 1350 u8 desc; 1351 u8 chpid; 1352 u8 swla; 1353 u8 zeroes; 1354 u8 chla; 1355 u8 chpp; 1356 } *chp_dsc; 1357 1358 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1359 1360 ccwdev = card->data.ccwdev; 1361 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1362 if (!chp_dsc) 1363 goto out; 1364 1365 card->info.func_level = 0x4100 + chp_dsc->desc; 1366 if (card->info.type == QETH_CARD_TYPE_IQD) 1367 goto out; 1368 1369 /* CHPP field bit 6 == 1 -> single queue */ 1370 if ((chp_dsc->chpp & 0x02) == 0x02) 1371 qeth_set_single_write_queues(card); 1372 else 1373 qeth_set_multiple_write_queues(card); 1374 out: 1375 kfree(chp_dsc); 1376 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1377 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1378 } 1379 1380 static void qeth_init_qdio_info(struct qeth_card *card) 1381 { 1382 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1383 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1384 /* inbound */ 1385 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1386 if (card->info.type == QETH_CARD_TYPE_IQD) 1387 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1388 else 1389 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1390 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1391 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1392 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1393 } 1394 1395 static void qeth_set_intial_options(struct qeth_card *card) 1396 { 1397 card->options.route4.type = NO_ROUTER; 1398 card->options.route6.type = NO_ROUTER; 1399 card->options.fake_broadcast = 0; 1400 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1401 card->options.performance_stats = 0; 1402 card->options.rx_sg_cb = QETH_RX_SG_CB; 1403 card->options.isolation = ISOLATION_MODE_NONE; 1404 card->options.cq = QETH_CQ_DISABLED; 1405 } 1406 1407 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1408 { 1409 unsigned long flags; 1410 int rc = 0; 1411 1412 spin_lock_irqsave(&card->thread_mask_lock, flags); 1413 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1414 (u8) card->thread_start_mask, 1415 (u8) card->thread_allowed_mask, 1416 (u8) card->thread_running_mask); 1417 rc = (card->thread_start_mask & thread); 1418 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1419 return rc; 1420 } 1421 1422 static void qeth_start_kernel_thread(struct work_struct *work) 1423 { 1424 struct task_struct *ts; 1425 struct qeth_card *card = container_of(work, struct qeth_card, 1426 kernel_thread_starter); 1427 QETH_CARD_TEXT(card , 2, "strthrd"); 1428 1429 if (card->read.state != CH_STATE_UP && 1430 card->write.state != CH_STATE_UP) 1431 return; 1432 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1433 ts = kthread_run(card->discipline->recover, (void *)card, 1434 "qeth_recover"); 1435 if (IS_ERR(ts)) { 1436 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1437 qeth_clear_thread_running_bit(card, 1438 QETH_RECOVER_THREAD); 1439 } 1440 } 1441 } 1442 1443 static int qeth_setup_card(struct qeth_card *card) 1444 { 1445 1446 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1447 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1448 1449 card->read.state = CH_STATE_DOWN; 1450 card->write.state = CH_STATE_DOWN; 1451 card->data.state = CH_STATE_DOWN; 1452 card->state = CARD_STATE_DOWN; 1453 card->lan_online = 0; 1454 card->read_or_write_problem = 0; 1455 card->dev = NULL; 1456 spin_lock_init(&card->vlanlock); 1457 spin_lock_init(&card->mclock); 1458 spin_lock_init(&card->lock); 1459 spin_lock_init(&card->ip_lock); 1460 spin_lock_init(&card->thread_mask_lock); 1461 mutex_init(&card->conf_mutex); 1462 mutex_init(&card->discipline_mutex); 1463 card->thread_start_mask = 0; 1464 card->thread_allowed_mask = 0; 1465 card->thread_running_mask = 0; 1466 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1467 INIT_LIST_HEAD(&card->ip_list); 1468 INIT_LIST_HEAD(card->ip_tbd_list); 1469 INIT_LIST_HEAD(&card->cmd_waiter_list); 1470 init_waitqueue_head(&card->wait_q); 1471 /* initial options */ 1472 qeth_set_intial_options(card); 1473 /* IP address takeover */ 1474 INIT_LIST_HEAD(&card->ipato.entries); 1475 card->ipato.enabled = 0; 1476 card->ipato.invert4 = 0; 1477 card->ipato.invert6 = 0; 1478 /* init QDIO stuff */ 1479 qeth_init_qdio_info(card); 1480 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1481 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1482 return 0; 1483 } 1484 1485 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1486 { 1487 struct qeth_card *card = container_of(slr, struct qeth_card, 1488 qeth_service_level); 1489 if (card->info.mcl_level[0]) 1490 seq_printf(m, "qeth: %s firmware level %s\n", 1491 CARD_BUS_ID(card), card->info.mcl_level); 1492 } 1493 1494 static struct qeth_card *qeth_alloc_card(void) 1495 { 1496 struct qeth_card *card; 1497 1498 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1499 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1500 if (!card) 1501 goto out; 1502 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1503 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1504 if (!card->ip_tbd_list) { 1505 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1506 goto out_card; 1507 } 1508 if (qeth_setup_channel(&card->read)) 1509 goto out_ip; 1510 if (qeth_setup_channel(&card->write)) 1511 goto out_channel; 1512 card->options.layer2 = -1; 1513 card->qeth_service_level.seq_print = qeth_core_sl_print; 1514 register_service_level(&card->qeth_service_level); 1515 return card; 1516 1517 out_channel: 1518 qeth_clean_channel(&card->read); 1519 out_ip: 1520 kfree(card->ip_tbd_list); 1521 out_card: 1522 kfree(card); 1523 out: 1524 return NULL; 1525 } 1526 1527 static int qeth_determine_card_type(struct qeth_card *card) 1528 { 1529 int i = 0; 1530 1531 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1532 1533 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1534 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1535 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1536 if ((CARD_RDEV(card)->id.dev_type == 1537 known_devices[i][QETH_DEV_TYPE_IND]) && 1538 (CARD_RDEV(card)->id.dev_model == 1539 known_devices[i][QETH_DEV_MODEL_IND])) { 1540 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1541 card->qdio.no_out_queues = 1542 known_devices[i][QETH_QUEUE_NO_IND]; 1543 card->qdio.no_in_queues = 1; 1544 card->info.is_multicast_different = 1545 known_devices[i][QETH_MULTICAST_IND]; 1546 qeth_update_from_chp_desc(card); 1547 return 0; 1548 } 1549 i++; 1550 } 1551 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1552 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1553 "unknown type\n"); 1554 return -ENOENT; 1555 } 1556 1557 static int qeth_clear_channel(struct qeth_channel *channel) 1558 { 1559 unsigned long flags; 1560 struct qeth_card *card; 1561 int rc; 1562 1563 card = CARD_FROM_CDEV(channel->ccwdev); 1564 QETH_CARD_TEXT(card, 3, "clearch"); 1565 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1566 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1567 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1568 1569 if (rc) 1570 return rc; 1571 rc = wait_event_interruptible_timeout(card->wait_q, 1572 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1573 if (rc == -ERESTARTSYS) 1574 return rc; 1575 if (channel->state != CH_STATE_STOPPED) 1576 return -ETIME; 1577 channel->state = CH_STATE_DOWN; 1578 return 0; 1579 } 1580 1581 static int qeth_halt_channel(struct qeth_channel *channel) 1582 { 1583 unsigned long flags; 1584 struct qeth_card *card; 1585 int rc; 1586 1587 card = CARD_FROM_CDEV(channel->ccwdev); 1588 QETH_CARD_TEXT(card, 3, "haltch"); 1589 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1590 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1591 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1592 1593 if (rc) 1594 return rc; 1595 rc = wait_event_interruptible_timeout(card->wait_q, 1596 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1597 if (rc == -ERESTARTSYS) 1598 return rc; 1599 if (channel->state != CH_STATE_HALTED) 1600 return -ETIME; 1601 return 0; 1602 } 1603 1604 static int qeth_halt_channels(struct qeth_card *card) 1605 { 1606 int rc1 = 0, rc2 = 0, rc3 = 0; 1607 1608 QETH_CARD_TEXT(card, 3, "haltchs"); 1609 rc1 = qeth_halt_channel(&card->read); 1610 rc2 = qeth_halt_channel(&card->write); 1611 rc3 = qeth_halt_channel(&card->data); 1612 if (rc1) 1613 return rc1; 1614 if (rc2) 1615 return rc2; 1616 return rc3; 1617 } 1618 1619 static int qeth_clear_channels(struct qeth_card *card) 1620 { 1621 int rc1 = 0, rc2 = 0, rc3 = 0; 1622 1623 QETH_CARD_TEXT(card, 3, "clearchs"); 1624 rc1 = qeth_clear_channel(&card->read); 1625 rc2 = qeth_clear_channel(&card->write); 1626 rc3 = qeth_clear_channel(&card->data); 1627 if (rc1) 1628 return rc1; 1629 if (rc2) 1630 return rc2; 1631 return rc3; 1632 } 1633 1634 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1635 { 1636 int rc = 0; 1637 1638 QETH_CARD_TEXT(card, 3, "clhacrd"); 1639 1640 if (halt) 1641 rc = qeth_halt_channels(card); 1642 if (rc) 1643 return rc; 1644 return qeth_clear_channels(card); 1645 } 1646 1647 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1648 { 1649 int rc = 0; 1650 1651 QETH_CARD_TEXT(card, 3, "qdioclr"); 1652 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1653 QETH_QDIO_CLEANING)) { 1654 case QETH_QDIO_ESTABLISHED: 1655 if (card->info.type == QETH_CARD_TYPE_IQD) 1656 rc = qdio_shutdown(CARD_DDEV(card), 1657 QDIO_FLAG_CLEANUP_USING_HALT); 1658 else 1659 rc = qdio_shutdown(CARD_DDEV(card), 1660 QDIO_FLAG_CLEANUP_USING_CLEAR); 1661 if (rc) 1662 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1663 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1664 break; 1665 case QETH_QDIO_CLEANING: 1666 return rc; 1667 default: 1668 break; 1669 } 1670 rc = qeth_clear_halt_card(card, use_halt); 1671 if (rc) 1672 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1673 card->state = CARD_STATE_DOWN; 1674 return rc; 1675 } 1676 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1677 1678 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1679 int *length) 1680 { 1681 struct ciw *ciw; 1682 char *rcd_buf; 1683 int ret; 1684 struct qeth_channel *channel = &card->data; 1685 unsigned long flags; 1686 1687 /* 1688 * scan for RCD command in extended SenseID data 1689 */ 1690 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1691 if (!ciw || ciw->cmd == 0) 1692 return -EOPNOTSUPP; 1693 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1694 if (!rcd_buf) 1695 return -ENOMEM; 1696 1697 channel->ccw.cmd_code = ciw->cmd; 1698 channel->ccw.cda = (__u32) __pa(rcd_buf); 1699 channel->ccw.count = ciw->count; 1700 channel->ccw.flags = CCW_FLAG_SLI; 1701 channel->state = CH_STATE_RCD; 1702 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1703 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1704 QETH_RCD_PARM, LPM_ANYPATH, 0, 1705 QETH_RCD_TIMEOUT); 1706 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1707 if (!ret) 1708 wait_event(card->wait_q, 1709 (channel->state == CH_STATE_RCD_DONE || 1710 channel->state == CH_STATE_DOWN)); 1711 if (channel->state == CH_STATE_DOWN) 1712 ret = -EIO; 1713 else 1714 channel->state = CH_STATE_DOWN; 1715 if (ret) { 1716 kfree(rcd_buf); 1717 *buffer = NULL; 1718 *length = 0; 1719 } else { 1720 *length = ciw->count; 1721 *buffer = rcd_buf; 1722 } 1723 return ret; 1724 } 1725 1726 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1727 { 1728 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1729 card->info.chpid = prcd[30]; 1730 card->info.unit_addr2 = prcd[31]; 1731 card->info.cula = prcd[63]; 1732 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1733 (prcd[0x11] == _ascebc['M'])); 1734 } 1735 1736 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1737 { 1738 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1739 1740 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1741 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1742 card->info.blkt.time_total = 0; 1743 card->info.blkt.inter_packet = 0; 1744 card->info.blkt.inter_packet_jumbo = 0; 1745 } else { 1746 card->info.blkt.time_total = 250; 1747 card->info.blkt.inter_packet = 5; 1748 card->info.blkt.inter_packet_jumbo = 15; 1749 } 1750 } 1751 1752 static void qeth_init_tokens(struct qeth_card *card) 1753 { 1754 card->token.issuer_rm_w = 0x00010103UL; 1755 card->token.cm_filter_w = 0x00010108UL; 1756 card->token.cm_connection_w = 0x0001010aUL; 1757 card->token.ulp_filter_w = 0x0001010bUL; 1758 card->token.ulp_connection_w = 0x0001010dUL; 1759 } 1760 1761 static void qeth_init_func_level(struct qeth_card *card) 1762 { 1763 switch (card->info.type) { 1764 case QETH_CARD_TYPE_IQD: 1765 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1766 break; 1767 case QETH_CARD_TYPE_OSD: 1768 case QETH_CARD_TYPE_OSN: 1769 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1770 break; 1771 default: 1772 break; 1773 } 1774 } 1775 1776 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1777 void (*idx_reply_cb)(struct qeth_channel *, 1778 struct qeth_cmd_buffer *)) 1779 { 1780 struct qeth_cmd_buffer *iob; 1781 unsigned long flags; 1782 int rc; 1783 struct qeth_card *card; 1784 1785 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1786 card = CARD_FROM_CDEV(channel->ccwdev); 1787 iob = qeth_get_buffer(channel); 1788 iob->callback = idx_reply_cb; 1789 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1790 channel->ccw.count = QETH_BUFSIZE; 1791 channel->ccw.cda = (__u32) __pa(iob->data); 1792 1793 wait_event(card->wait_q, 1794 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1795 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1796 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1797 rc = ccw_device_start(channel->ccwdev, 1798 &channel->ccw, (addr_t) iob, 0, 0); 1799 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1800 1801 if (rc) { 1802 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1803 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1804 atomic_set(&channel->irq_pending, 0); 1805 wake_up(&card->wait_q); 1806 return rc; 1807 } 1808 rc = wait_event_interruptible_timeout(card->wait_q, 1809 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1810 if (rc == -ERESTARTSYS) 1811 return rc; 1812 if (channel->state != CH_STATE_UP) { 1813 rc = -ETIME; 1814 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1815 qeth_clear_cmd_buffers(channel); 1816 } else 1817 rc = 0; 1818 return rc; 1819 } 1820 1821 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1822 void (*idx_reply_cb)(struct qeth_channel *, 1823 struct qeth_cmd_buffer *)) 1824 { 1825 struct qeth_card *card; 1826 struct qeth_cmd_buffer *iob; 1827 unsigned long flags; 1828 __u16 temp; 1829 __u8 tmp; 1830 int rc; 1831 struct ccw_dev_id temp_devid; 1832 1833 card = CARD_FROM_CDEV(channel->ccwdev); 1834 1835 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1836 1837 iob = qeth_get_buffer(channel); 1838 iob->callback = idx_reply_cb; 1839 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1840 channel->ccw.count = IDX_ACTIVATE_SIZE; 1841 channel->ccw.cda = (__u32) __pa(iob->data); 1842 if (channel == &card->write) { 1843 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1844 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1845 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1846 card->seqno.trans_hdr++; 1847 } else { 1848 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1849 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1850 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1851 } 1852 tmp = ((__u8)card->info.portno) | 0x80; 1853 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1854 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1855 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1856 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1857 &card->info.func_level, sizeof(__u16)); 1858 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1859 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1860 temp = (card->info.cula << 8) + card->info.unit_addr2; 1861 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1862 1863 wait_event(card->wait_q, 1864 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1865 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1866 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1867 rc = ccw_device_start(channel->ccwdev, 1868 &channel->ccw, (addr_t) iob, 0, 0); 1869 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1870 1871 if (rc) { 1872 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1873 rc); 1874 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1875 atomic_set(&channel->irq_pending, 0); 1876 wake_up(&card->wait_q); 1877 return rc; 1878 } 1879 rc = wait_event_interruptible_timeout(card->wait_q, 1880 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1881 if (rc == -ERESTARTSYS) 1882 return rc; 1883 if (channel->state != CH_STATE_ACTIVATING) { 1884 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1885 " failed to recover an error on the device\n"); 1886 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1887 dev_name(&channel->ccwdev->dev)); 1888 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1889 qeth_clear_cmd_buffers(channel); 1890 return -ETIME; 1891 } 1892 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1893 } 1894 1895 static int qeth_peer_func_level(int level) 1896 { 1897 if ((level & 0xff) == 8) 1898 return (level & 0xff) + 0x400; 1899 if (((level >> 8) & 3) == 1) 1900 return (level & 0xff) + 0x200; 1901 return level; 1902 } 1903 1904 static void qeth_idx_write_cb(struct qeth_channel *channel, 1905 struct qeth_cmd_buffer *iob) 1906 { 1907 struct qeth_card *card; 1908 __u16 temp; 1909 1910 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1911 1912 if (channel->state == CH_STATE_DOWN) { 1913 channel->state = CH_STATE_ACTIVATING; 1914 goto out; 1915 } 1916 card = CARD_FROM_CDEV(channel->ccwdev); 1917 1918 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1919 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1920 dev_err(&card->write.ccwdev->dev, 1921 "The adapter is used exclusively by another " 1922 "host\n"); 1923 else 1924 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1925 " negative reply\n", 1926 dev_name(&card->write.ccwdev->dev)); 1927 goto out; 1928 } 1929 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1930 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1931 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1932 "function level mismatch (sent: 0x%x, received: " 1933 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1934 card->info.func_level, temp); 1935 goto out; 1936 } 1937 channel->state = CH_STATE_UP; 1938 out: 1939 qeth_release_buffer(channel, iob); 1940 } 1941 1942 static void qeth_idx_read_cb(struct qeth_channel *channel, 1943 struct qeth_cmd_buffer *iob) 1944 { 1945 struct qeth_card *card; 1946 __u16 temp; 1947 1948 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1949 if (channel->state == CH_STATE_DOWN) { 1950 channel->state = CH_STATE_ACTIVATING; 1951 goto out; 1952 } 1953 1954 card = CARD_FROM_CDEV(channel->ccwdev); 1955 if (qeth_check_idx_response(card, iob->data)) 1956 goto out; 1957 1958 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1959 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1960 case QETH_IDX_ACT_ERR_EXCL: 1961 dev_err(&card->write.ccwdev->dev, 1962 "The adapter is used exclusively by another " 1963 "host\n"); 1964 break; 1965 case QETH_IDX_ACT_ERR_AUTH: 1966 case QETH_IDX_ACT_ERR_AUTH_USER: 1967 dev_err(&card->read.ccwdev->dev, 1968 "Setting the device online failed because of " 1969 "insufficient authorization\n"); 1970 break; 1971 default: 1972 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1973 " negative reply\n", 1974 dev_name(&card->read.ccwdev->dev)); 1975 } 1976 QETH_CARD_TEXT_(card, 2, "idxread%c", 1977 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1978 goto out; 1979 } 1980 1981 /** 1982 * * temporary fix for microcode bug 1983 * * to revert it,replace OR by AND 1984 * */ 1985 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1986 (card->info.type == QETH_CARD_TYPE_OSD)) 1987 card->info.portname_required = 1; 1988 1989 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1990 if (temp != qeth_peer_func_level(card->info.func_level)) { 1991 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1992 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1993 dev_name(&card->read.ccwdev->dev), 1994 card->info.func_level, temp); 1995 goto out; 1996 } 1997 memcpy(&card->token.issuer_rm_r, 1998 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1999 QETH_MPC_TOKEN_LENGTH); 2000 memcpy(&card->info.mcl_level[0], 2001 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 2002 channel->state = CH_STATE_UP; 2003 out: 2004 qeth_release_buffer(channel, iob); 2005 } 2006 2007 void qeth_prepare_control_data(struct qeth_card *card, int len, 2008 struct qeth_cmd_buffer *iob) 2009 { 2010 qeth_setup_ccw(&card->write, iob->data, len); 2011 iob->callback = qeth_release_buffer; 2012 2013 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2014 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2015 card->seqno.trans_hdr++; 2016 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2017 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2018 card->seqno.pdu_hdr++; 2019 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2020 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2021 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2022 } 2023 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2024 2025 int qeth_send_control_data(struct qeth_card *card, int len, 2026 struct qeth_cmd_buffer *iob, 2027 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 2028 unsigned long), 2029 void *reply_param) 2030 { 2031 int rc; 2032 unsigned long flags; 2033 struct qeth_reply *reply = NULL; 2034 unsigned long timeout, event_timeout; 2035 struct qeth_ipa_cmd *cmd; 2036 2037 QETH_CARD_TEXT(card, 2, "sendctl"); 2038 2039 if (card->read_or_write_problem) { 2040 qeth_release_buffer(iob->channel, iob); 2041 return -EIO; 2042 } 2043 reply = qeth_alloc_reply(card); 2044 if (!reply) { 2045 return -ENOMEM; 2046 } 2047 reply->callback = reply_cb; 2048 reply->param = reply_param; 2049 if (card->state == CARD_STATE_DOWN) 2050 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2051 else 2052 reply->seqno = card->seqno.ipa++; 2053 init_waitqueue_head(&reply->wait_q); 2054 spin_lock_irqsave(&card->lock, flags); 2055 list_add_tail(&reply->list, &card->cmd_waiter_list); 2056 spin_unlock_irqrestore(&card->lock, flags); 2057 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2058 2059 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2060 qeth_prepare_control_data(card, len, iob); 2061 2062 if (IS_IPA(iob->data)) 2063 event_timeout = QETH_IPA_TIMEOUT; 2064 else 2065 event_timeout = QETH_TIMEOUT; 2066 timeout = jiffies + event_timeout; 2067 2068 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2069 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2070 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2071 (addr_t) iob, 0, 0); 2072 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2073 if (rc) { 2074 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2075 "ccw_device_start rc = %i\n", 2076 dev_name(&card->write.ccwdev->dev), rc); 2077 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2078 spin_lock_irqsave(&card->lock, flags); 2079 list_del_init(&reply->list); 2080 qeth_put_reply(reply); 2081 spin_unlock_irqrestore(&card->lock, flags); 2082 qeth_release_buffer(iob->channel, iob); 2083 atomic_set(&card->write.irq_pending, 0); 2084 wake_up(&card->wait_q); 2085 return rc; 2086 } 2087 2088 /* we have only one long running ipassist, since we can ensure 2089 process context of this command we can sleep */ 2090 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2091 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2092 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2093 if (!wait_event_timeout(reply->wait_q, 2094 atomic_read(&reply->received), event_timeout)) 2095 goto time_err; 2096 } else { 2097 while (!atomic_read(&reply->received)) { 2098 if (time_after(jiffies, timeout)) 2099 goto time_err; 2100 cpu_relax(); 2101 } 2102 } 2103 2104 if (reply->rc == -EIO) 2105 goto error; 2106 rc = reply->rc; 2107 qeth_put_reply(reply); 2108 return rc; 2109 2110 time_err: 2111 reply->rc = -ETIME; 2112 spin_lock_irqsave(&reply->card->lock, flags); 2113 list_del_init(&reply->list); 2114 spin_unlock_irqrestore(&reply->card->lock, flags); 2115 atomic_inc(&reply->received); 2116 error: 2117 atomic_set(&card->write.irq_pending, 0); 2118 qeth_release_buffer(iob->channel, iob); 2119 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2120 rc = reply->rc; 2121 qeth_put_reply(reply); 2122 return rc; 2123 } 2124 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2125 2126 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2127 unsigned long data) 2128 { 2129 struct qeth_cmd_buffer *iob; 2130 2131 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2132 2133 iob = (struct qeth_cmd_buffer *) data; 2134 memcpy(&card->token.cm_filter_r, 2135 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2136 QETH_MPC_TOKEN_LENGTH); 2137 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2138 return 0; 2139 } 2140 2141 static int qeth_cm_enable(struct qeth_card *card) 2142 { 2143 int rc; 2144 struct qeth_cmd_buffer *iob; 2145 2146 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2147 2148 iob = qeth_wait_for_buffer(&card->write); 2149 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2150 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2151 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2152 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2153 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2154 2155 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2156 qeth_cm_enable_cb, NULL); 2157 return rc; 2158 } 2159 2160 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2161 unsigned long data) 2162 { 2163 2164 struct qeth_cmd_buffer *iob; 2165 2166 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2167 2168 iob = (struct qeth_cmd_buffer *) data; 2169 memcpy(&card->token.cm_connection_r, 2170 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2171 QETH_MPC_TOKEN_LENGTH); 2172 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2173 return 0; 2174 } 2175 2176 static int qeth_cm_setup(struct qeth_card *card) 2177 { 2178 int rc; 2179 struct qeth_cmd_buffer *iob; 2180 2181 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2182 2183 iob = qeth_wait_for_buffer(&card->write); 2184 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2185 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2186 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2187 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2188 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2189 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2190 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2191 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2192 qeth_cm_setup_cb, NULL); 2193 return rc; 2194 2195 } 2196 2197 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2198 { 2199 switch (card->info.type) { 2200 case QETH_CARD_TYPE_UNKNOWN: 2201 return 1500; 2202 case QETH_CARD_TYPE_IQD: 2203 return card->info.max_mtu; 2204 case QETH_CARD_TYPE_OSD: 2205 switch (card->info.link_type) { 2206 case QETH_LINK_TYPE_HSTR: 2207 case QETH_LINK_TYPE_LANE_TR: 2208 return 2000; 2209 default: 2210 return card->options.layer2 ? 1500 : 1492; 2211 } 2212 case QETH_CARD_TYPE_OSM: 2213 case QETH_CARD_TYPE_OSX: 2214 return card->options.layer2 ? 1500 : 1492; 2215 default: 2216 return 1500; 2217 } 2218 } 2219 2220 static inline int qeth_get_mtu_outof_framesize(int framesize) 2221 { 2222 switch (framesize) { 2223 case 0x4000: 2224 return 8192; 2225 case 0x6000: 2226 return 16384; 2227 case 0xa000: 2228 return 32768; 2229 case 0xffff: 2230 return 57344; 2231 default: 2232 return 0; 2233 } 2234 } 2235 2236 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2237 { 2238 switch (card->info.type) { 2239 case QETH_CARD_TYPE_OSD: 2240 case QETH_CARD_TYPE_OSM: 2241 case QETH_CARD_TYPE_OSX: 2242 case QETH_CARD_TYPE_IQD: 2243 return ((mtu >= 576) && 2244 (mtu <= card->info.max_mtu)); 2245 case QETH_CARD_TYPE_OSN: 2246 case QETH_CARD_TYPE_UNKNOWN: 2247 default: 2248 return 1; 2249 } 2250 } 2251 2252 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2253 unsigned long data) 2254 { 2255 2256 __u16 mtu, framesize; 2257 __u16 len; 2258 __u8 link_type; 2259 struct qeth_cmd_buffer *iob; 2260 2261 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2262 2263 iob = (struct qeth_cmd_buffer *) data; 2264 memcpy(&card->token.ulp_filter_r, 2265 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2266 QETH_MPC_TOKEN_LENGTH); 2267 if (card->info.type == QETH_CARD_TYPE_IQD) { 2268 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2269 mtu = qeth_get_mtu_outof_framesize(framesize); 2270 if (!mtu) { 2271 iob->rc = -EINVAL; 2272 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2273 return 0; 2274 } 2275 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2276 /* frame size has changed */ 2277 if (card->dev && 2278 ((card->dev->mtu == card->info.initial_mtu) || 2279 (card->dev->mtu > mtu))) 2280 card->dev->mtu = mtu; 2281 qeth_free_qdio_buffers(card); 2282 } 2283 card->info.initial_mtu = mtu; 2284 card->info.max_mtu = mtu; 2285 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2286 } else { 2287 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2288 iob->data); 2289 card->info.initial_mtu = min(card->info.max_mtu, 2290 qeth_get_initial_mtu_for_card(card)); 2291 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2292 } 2293 2294 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2295 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2296 memcpy(&link_type, 2297 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2298 card->info.link_type = link_type; 2299 } else 2300 card->info.link_type = 0; 2301 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2302 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2303 return 0; 2304 } 2305 2306 static int qeth_ulp_enable(struct qeth_card *card) 2307 { 2308 int rc; 2309 char prot_type; 2310 struct qeth_cmd_buffer *iob; 2311 2312 /*FIXME: trace view callbacks*/ 2313 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2314 2315 iob = qeth_wait_for_buffer(&card->write); 2316 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2317 2318 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2319 (__u8) card->info.portno; 2320 if (card->options.layer2) 2321 if (card->info.type == QETH_CARD_TYPE_OSN) 2322 prot_type = QETH_PROT_OSN2; 2323 else 2324 prot_type = QETH_PROT_LAYER2; 2325 else 2326 prot_type = QETH_PROT_TCPIP; 2327 2328 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2329 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2330 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2331 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2332 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2333 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2334 card->info.portname, 9); 2335 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2336 qeth_ulp_enable_cb, NULL); 2337 return rc; 2338 2339 } 2340 2341 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2342 unsigned long data) 2343 { 2344 struct qeth_cmd_buffer *iob; 2345 2346 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2347 2348 iob = (struct qeth_cmd_buffer *) data; 2349 memcpy(&card->token.ulp_connection_r, 2350 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2351 QETH_MPC_TOKEN_LENGTH); 2352 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2353 3)) { 2354 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2355 dev_err(&card->gdev->dev, "A connection could not be " 2356 "established because of an OLM limit\n"); 2357 iob->rc = -EMLINK; 2358 } 2359 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2360 return 0; 2361 } 2362 2363 static int qeth_ulp_setup(struct qeth_card *card) 2364 { 2365 int rc; 2366 __u16 temp; 2367 struct qeth_cmd_buffer *iob; 2368 struct ccw_dev_id dev_id; 2369 2370 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2371 2372 iob = qeth_wait_for_buffer(&card->write); 2373 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2374 2375 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2376 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2377 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2378 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2379 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2380 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2381 2382 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2383 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2384 temp = (card->info.cula << 8) + card->info.unit_addr2; 2385 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2386 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2387 qeth_ulp_setup_cb, NULL); 2388 return rc; 2389 } 2390 2391 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2392 { 2393 int rc; 2394 struct qeth_qdio_out_buffer *newbuf; 2395 2396 rc = 0; 2397 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2398 if (!newbuf) { 2399 rc = -ENOMEM; 2400 goto out; 2401 } 2402 newbuf->buffer = &q->qdio_bufs[bidx]; 2403 skb_queue_head_init(&newbuf->skb_list); 2404 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2405 newbuf->q = q; 2406 newbuf->aob = NULL; 2407 newbuf->next_pending = q->bufs[bidx]; 2408 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2409 q->bufs[bidx] = newbuf; 2410 if (q->bufstates) { 2411 q->bufstates[bidx].user = newbuf; 2412 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2413 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2414 QETH_CARD_TEXT_(q->card, 2, "%lx", 2415 (long) newbuf->next_pending); 2416 } 2417 out: 2418 return rc; 2419 } 2420 2421 2422 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2423 { 2424 int i, j; 2425 2426 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2427 2428 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2429 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2430 return 0; 2431 2432 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2433 GFP_KERNEL); 2434 if (!card->qdio.in_q) 2435 goto out_nomem; 2436 QETH_DBF_TEXT(SETUP, 2, "inq"); 2437 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2438 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2439 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2440 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2441 card->qdio.in_q->bufs[i].buffer = 2442 &card->qdio.in_q->qdio_bufs[i]; 2443 card->qdio.in_q->bufs[i].rx_skb = NULL; 2444 } 2445 /* inbound buffer pool */ 2446 if (qeth_alloc_buffer_pool(card)) 2447 goto out_freeinq; 2448 2449 /* outbound */ 2450 card->qdio.out_qs = 2451 kzalloc(card->qdio.no_out_queues * 2452 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2453 if (!card->qdio.out_qs) 2454 goto out_freepool; 2455 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2456 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2457 GFP_KERNEL); 2458 if (!card->qdio.out_qs[i]) 2459 goto out_freeoutq; 2460 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2461 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2462 card->qdio.out_qs[i]->queue_no = i; 2463 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2464 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2465 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2466 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2467 goto out_freeoutqbufs; 2468 } 2469 } 2470 2471 /* completion */ 2472 if (qeth_alloc_cq(card)) 2473 goto out_freeoutq; 2474 2475 return 0; 2476 2477 out_freeoutqbufs: 2478 while (j > 0) { 2479 --j; 2480 kmem_cache_free(qeth_qdio_outbuf_cache, 2481 card->qdio.out_qs[i]->bufs[j]); 2482 card->qdio.out_qs[i]->bufs[j] = NULL; 2483 } 2484 out_freeoutq: 2485 while (i > 0) { 2486 kfree(card->qdio.out_qs[--i]); 2487 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2488 } 2489 kfree(card->qdio.out_qs); 2490 card->qdio.out_qs = NULL; 2491 out_freepool: 2492 qeth_free_buffer_pool(card); 2493 out_freeinq: 2494 kfree(card->qdio.in_q); 2495 card->qdio.in_q = NULL; 2496 out_nomem: 2497 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2498 return -ENOMEM; 2499 } 2500 2501 static void qeth_create_qib_param_field(struct qeth_card *card, 2502 char *param_field) 2503 { 2504 2505 param_field[0] = _ascebc['P']; 2506 param_field[1] = _ascebc['C']; 2507 param_field[2] = _ascebc['I']; 2508 param_field[3] = _ascebc['T']; 2509 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2510 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2511 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2512 } 2513 2514 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2515 char *param_field) 2516 { 2517 param_field[16] = _ascebc['B']; 2518 param_field[17] = _ascebc['L']; 2519 param_field[18] = _ascebc['K']; 2520 param_field[19] = _ascebc['T']; 2521 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2522 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2523 *((unsigned int *) (¶m_field[28])) = 2524 card->info.blkt.inter_packet_jumbo; 2525 } 2526 2527 static int qeth_qdio_activate(struct qeth_card *card) 2528 { 2529 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2530 return qdio_activate(CARD_DDEV(card)); 2531 } 2532 2533 static int qeth_dm_act(struct qeth_card *card) 2534 { 2535 int rc; 2536 struct qeth_cmd_buffer *iob; 2537 2538 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2539 2540 iob = qeth_wait_for_buffer(&card->write); 2541 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2542 2543 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2544 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2545 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2546 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2547 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2548 return rc; 2549 } 2550 2551 static int qeth_mpc_initialize(struct qeth_card *card) 2552 { 2553 int rc; 2554 2555 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2556 2557 rc = qeth_issue_next_read(card); 2558 if (rc) { 2559 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2560 return rc; 2561 } 2562 rc = qeth_cm_enable(card); 2563 if (rc) { 2564 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2565 goto out_qdio; 2566 } 2567 rc = qeth_cm_setup(card); 2568 if (rc) { 2569 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2570 goto out_qdio; 2571 } 2572 rc = qeth_ulp_enable(card); 2573 if (rc) { 2574 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2575 goto out_qdio; 2576 } 2577 rc = qeth_ulp_setup(card); 2578 if (rc) { 2579 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2580 goto out_qdio; 2581 } 2582 rc = qeth_alloc_qdio_buffers(card); 2583 if (rc) { 2584 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2585 goto out_qdio; 2586 } 2587 rc = qeth_qdio_establish(card); 2588 if (rc) { 2589 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2590 qeth_free_qdio_buffers(card); 2591 goto out_qdio; 2592 } 2593 rc = qeth_qdio_activate(card); 2594 if (rc) { 2595 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2596 goto out_qdio; 2597 } 2598 rc = qeth_dm_act(card); 2599 if (rc) { 2600 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2601 goto out_qdio; 2602 } 2603 2604 return 0; 2605 out_qdio: 2606 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2607 qdio_free(CARD_DDEV(card)); 2608 return rc; 2609 } 2610 2611 static void qeth_print_status_with_portname(struct qeth_card *card) 2612 { 2613 char dbf_text[15]; 2614 int i; 2615 2616 sprintf(dbf_text, "%s", card->info.portname + 1); 2617 for (i = 0; i < 8; i++) 2618 dbf_text[i] = 2619 (char) _ebcasc[(__u8) dbf_text[i]]; 2620 dbf_text[8] = 0; 2621 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2622 "with link type %s (portname: %s)\n", 2623 qeth_get_cardname(card), 2624 (card->info.mcl_level[0]) ? " (level: " : "", 2625 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2626 (card->info.mcl_level[0]) ? ")" : "", 2627 qeth_get_cardname_short(card), 2628 dbf_text); 2629 2630 } 2631 2632 static void qeth_print_status_no_portname(struct qeth_card *card) 2633 { 2634 if (card->info.portname[0]) 2635 dev_info(&card->gdev->dev, "Device is a%s " 2636 "card%s%s%s\nwith link type %s " 2637 "(no portname needed by interface).\n", 2638 qeth_get_cardname(card), 2639 (card->info.mcl_level[0]) ? " (level: " : "", 2640 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2641 (card->info.mcl_level[0]) ? ")" : "", 2642 qeth_get_cardname_short(card)); 2643 else 2644 dev_info(&card->gdev->dev, "Device is a%s " 2645 "card%s%s%s\nwith link type %s.\n", 2646 qeth_get_cardname(card), 2647 (card->info.mcl_level[0]) ? " (level: " : "", 2648 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2649 (card->info.mcl_level[0]) ? ")" : "", 2650 qeth_get_cardname_short(card)); 2651 } 2652 2653 void qeth_print_status_message(struct qeth_card *card) 2654 { 2655 switch (card->info.type) { 2656 case QETH_CARD_TYPE_OSD: 2657 case QETH_CARD_TYPE_OSM: 2658 case QETH_CARD_TYPE_OSX: 2659 /* VM will use a non-zero first character 2660 * to indicate a HiperSockets like reporting 2661 * of the level OSA sets the first character to zero 2662 * */ 2663 if (!card->info.mcl_level[0]) { 2664 sprintf(card->info.mcl_level, "%02x%02x", 2665 card->info.mcl_level[2], 2666 card->info.mcl_level[3]); 2667 2668 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2669 break; 2670 } 2671 /* fallthrough */ 2672 case QETH_CARD_TYPE_IQD: 2673 if ((card->info.guestlan) || 2674 (card->info.mcl_level[0] & 0x80)) { 2675 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2676 card->info.mcl_level[0]]; 2677 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2678 card->info.mcl_level[1]]; 2679 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2680 card->info.mcl_level[2]]; 2681 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2682 card->info.mcl_level[3]]; 2683 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2684 } 2685 break; 2686 default: 2687 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2688 } 2689 if (card->info.portname_required) 2690 qeth_print_status_with_portname(card); 2691 else 2692 qeth_print_status_no_portname(card); 2693 } 2694 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2695 2696 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2697 { 2698 struct qeth_buffer_pool_entry *entry; 2699 2700 QETH_CARD_TEXT(card, 5, "inwrklst"); 2701 2702 list_for_each_entry(entry, 2703 &card->qdio.init_pool.entry_list, init_list) { 2704 qeth_put_buffer_pool_entry(card, entry); 2705 } 2706 } 2707 2708 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2709 struct qeth_card *card) 2710 { 2711 struct list_head *plh; 2712 struct qeth_buffer_pool_entry *entry; 2713 int i, free; 2714 struct page *page; 2715 2716 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2717 return NULL; 2718 2719 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2720 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2721 free = 1; 2722 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2723 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2724 free = 0; 2725 break; 2726 } 2727 } 2728 if (free) { 2729 list_del_init(&entry->list); 2730 return entry; 2731 } 2732 } 2733 2734 /* no free buffer in pool so take first one and swap pages */ 2735 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2736 struct qeth_buffer_pool_entry, list); 2737 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2738 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2739 page = alloc_page(GFP_ATOMIC); 2740 if (!page) { 2741 return NULL; 2742 } else { 2743 free_page((unsigned long)entry->elements[i]); 2744 entry->elements[i] = page_address(page); 2745 if (card->options.performance_stats) 2746 card->perf_stats.sg_alloc_page_rx++; 2747 } 2748 } 2749 } 2750 list_del_init(&entry->list); 2751 return entry; 2752 } 2753 2754 static int qeth_init_input_buffer(struct qeth_card *card, 2755 struct qeth_qdio_buffer *buf) 2756 { 2757 struct qeth_buffer_pool_entry *pool_entry; 2758 int i; 2759 2760 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2761 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2762 if (!buf->rx_skb) 2763 return 1; 2764 } 2765 2766 pool_entry = qeth_find_free_buffer_pool_entry(card); 2767 if (!pool_entry) 2768 return 1; 2769 2770 /* 2771 * since the buffer is accessed only from the input_tasklet 2772 * there shouldn't be a need to synchronize; also, since we use 2773 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2774 * buffers 2775 */ 2776 2777 buf->pool_entry = pool_entry; 2778 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2779 buf->buffer->element[i].length = PAGE_SIZE; 2780 buf->buffer->element[i].addr = pool_entry->elements[i]; 2781 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2782 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2783 else 2784 buf->buffer->element[i].eflags = 0; 2785 buf->buffer->element[i].sflags = 0; 2786 } 2787 return 0; 2788 } 2789 2790 int qeth_init_qdio_queues(struct qeth_card *card) 2791 { 2792 int i, j; 2793 int rc; 2794 2795 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2796 2797 /* inbound queue */ 2798 memset(card->qdio.in_q->qdio_bufs, 0, 2799 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2800 qeth_initialize_working_pool_list(card); 2801 /*give only as many buffers to hardware as we have buffer pool entries*/ 2802 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2803 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2804 card->qdio.in_q->next_buf_to_init = 2805 card->qdio.in_buf_pool.buf_count - 1; 2806 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2807 card->qdio.in_buf_pool.buf_count - 1); 2808 if (rc) { 2809 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2810 return rc; 2811 } 2812 2813 /* completion */ 2814 rc = qeth_cq_init(card); 2815 if (rc) { 2816 return rc; 2817 } 2818 2819 /* outbound queue */ 2820 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2821 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2822 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2823 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2824 qeth_clear_output_buffer(card->qdio.out_qs[i], 2825 card->qdio.out_qs[i]->bufs[j], 2826 QETH_QDIO_BUF_EMPTY); 2827 } 2828 card->qdio.out_qs[i]->card = card; 2829 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2830 card->qdio.out_qs[i]->do_pack = 0; 2831 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2832 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2833 atomic_set(&card->qdio.out_qs[i]->state, 2834 QETH_OUT_Q_UNLOCKED); 2835 } 2836 return 0; 2837 } 2838 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2839 2840 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2841 { 2842 switch (link_type) { 2843 case QETH_LINK_TYPE_HSTR: 2844 return 2; 2845 default: 2846 return 1; 2847 } 2848 } 2849 2850 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2851 struct qeth_ipa_cmd *cmd, __u8 command, 2852 enum qeth_prot_versions prot) 2853 { 2854 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2855 cmd->hdr.command = command; 2856 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2857 cmd->hdr.seqno = card->seqno.ipa; 2858 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2859 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2860 if (card->options.layer2) 2861 cmd->hdr.prim_version_no = 2; 2862 else 2863 cmd->hdr.prim_version_no = 1; 2864 cmd->hdr.param_count = 1; 2865 cmd->hdr.prot_version = prot; 2866 cmd->hdr.ipa_supported = 0; 2867 cmd->hdr.ipa_enabled = 0; 2868 } 2869 2870 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2871 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2872 { 2873 struct qeth_cmd_buffer *iob; 2874 struct qeth_ipa_cmd *cmd; 2875 2876 iob = qeth_wait_for_buffer(&card->write); 2877 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2878 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2879 2880 return iob; 2881 } 2882 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2883 2884 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2885 char prot_type) 2886 { 2887 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2888 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2889 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2890 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2891 } 2892 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2893 2894 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2895 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2896 unsigned long), 2897 void *reply_param) 2898 { 2899 int rc; 2900 char prot_type; 2901 2902 QETH_CARD_TEXT(card, 4, "sendipa"); 2903 2904 if (card->options.layer2) 2905 if (card->info.type == QETH_CARD_TYPE_OSN) 2906 prot_type = QETH_PROT_OSN2; 2907 else 2908 prot_type = QETH_PROT_LAYER2; 2909 else 2910 prot_type = QETH_PROT_TCPIP; 2911 qeth_prepare_ipa_cmd(card, iob, prot_type); 2912 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2913 iob, reply_cb, reply_param); 2914 if (rc == -ETIME) { 2915 qeth_clear_ipacmd_list(card); 2916 qeth_schedule_recovery(card); 2917 } 2918 return rc; 2919 } 2920 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2921 2922 int qeth_send_startlan(struct qeth_card *card) 2923 { 2924 int rc; 2925 struct qeth_cmd_buffer *iob; 2926 2927 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2928 2929 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2930 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2931 return rc; 2932 } 2933 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2934 2935 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2936 struct qeth_reply *reply, unsigned long data) 2937 { 2938 struct qeth_ipa_cmd *cmd; 2939 2940 QETH_CARD_TEXT(card, 4, "defadpcb"); 2941 2942 cmd = (struct qeth_ipa_cmd *) data; 2943 if (cmd->hdr.return_code == 0) 2944 cmd->hdr.return_code = 2945 cmd->data.setadapterparms.hdr.return_code; 2946 return 0; 2947 } 2948 2949 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2950 struct qeth_reply *reply, unsigned long data) 2951 { 2952 struct qeth_ipa_cmd *cmd; 2953 2954 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2955 2956 cmd = (struct qeth_ipa_cmd *) data; 2957 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2958 card->info.link_type = 2959 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2960 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2961 } 2962 card->options.adp.supported_funcs = 2963 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2964 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2965 } 2966 2967 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2968 __u32 command, __u32 cmdlen) 2969 { 2970 struct qeth_cmd_buffer *iob; 2971 struct qeth_ipa_cmd *cmd; 2972 2973 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2974 QETH_PROT_IPV4); 2975 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2976 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2977 cmd->data.setadapterparms.hdr.command_code = command; 2978 cmd->data.setadapterparms.hdr.used_total = 1; 2979 cmd->data.setadapterparms.hdr.seq_no = 1; 2980 2981 return iob; 2982 } 2983 2984 int qeth_query_setadapterparms(struct qeth_card *card) 2985 { 2986 int rc; 2987 struct qeth_cmd_buffer *iob; 2988 2989 QETH_CARD_TEXT(card, 3, "queryadp"); 2990 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2991 sizeof(struct qeth_ipacmd_setadpparms)); 2992 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2993 return rc; 2994 } 2995 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2996 2997 static int qeth_query_ipassists_cb(struct qeth_card *card, 2998 struct qeth_reply *reply, unsigned long data) 2999 { 3000 struct qeth_ipa_cmd *cmd; 3001 3002 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 3003 3004 cmd = (struct qeth_ipa_cmd *) data; 3005 3006 switch (cmd->hdr.return_code) { 3007 case IPA_RC_NOTSUPP: 3008 case IPA_RC_L2_UNSUPPORTED_CMD: 3009 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3010 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3011 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3012 return -0; 3013 default: 3014 if (cmd->hdr.return_code) { 3015 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3016 "rc=%d\n", 3017 dev_name(&card->gdev->dev), 3018 cmd->hdr.return_code); 3019 return 0; 3020 } 3021 } 3022 3023 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3024 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3025 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3026 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3027 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3028 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3029 } else 3030 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3031 "\n", dev_name(&card->gdev->dev)); 3032 return 0; 3033 } 3034 3035 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3036 { 3037 int rc; 3038 struct qeth_cmd_buffer *iob; 3039 3040 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3041 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3042 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3043 return rc; 3044 } 3045 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3046 3047 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3048 struct qeth_reply *reply, unsigned long data) 3049 { 3050 struct qeth_ipa_cmd *cmd; 3051 __u16 rc; 3052 3053 cmd = (struct qeth_ipa_cmd *)data; 3054 rc = cmd->hdr.return_code; 3055 if (rc) 3056 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3057 else 3058 card->info.diagass_support = cmd->data.diagass.ext; 3059 return 0; 3060 } 3061 3062 static int qeth_query_setdiagass(struct qeth_card *card) 3063 { 3064 struct qeth_cmd_buffer *iob; 3065 struct qeth_ipa_cmd *cmd; 3066 3067 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3068 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3069 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3070 cmd->data.diagass.subcmd_len = 16; 3071 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3072 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3073 } 3074 3075 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3076 { 3077 unsigned long info = get_zeroed_page(GFP_KERNEL); 3078 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3079 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3080 struct ccw_dev_id ccwid; 3081 int level; 3082 3083 tid->chpid = card->info.chpid; 3084 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3085 tid->ssid = ccwid.ssid; 3086 tid->devno = ccwid.devno; 3087 if (!info) 3088 return; 3089 level = stsi(NULL, 0, 0, 0); 3090 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3091 tid->lparnr = info222->lpar_number; 3092 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3093 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3094 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3095 } 3096 free_page(info); 3097 return; 3098 } 3099 3100 static int qeth_hw_trap_cb(struct qeth_card *card, 3101 struct qeth_reply *reply, unsigned long data) 3102 { 3103 struct qeth_ipa_cmd *cmd; 3104 __u16 rc; 3105 3106 cmd = (struct qeth_ipa_cmd *)data; 3107 rc = cmd->hdr.return_code; 3108 if (rc) 3109 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3110 return 0; 3111 } 3112 3113 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3114 { 3115 struct qeth_cmd_buffer *iob; 3116 struct qeth_ipa_cmd *cmd; 3117 3118 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3119 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3120 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3121 cmd->data.diagass.subcmd_len = 80; 3122 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3123 cmd->data.diagass.type = 1; 3124 cmd->data.diagass.action = action; 3125 switch (action) { 3126 case QETH_DIAGS_TRAP_ARM: 3127 cmd->data.diagass.options = 0x0003; 3128 cmd->data.diagass.ext = 0x00010000 + 3129 sizeof(struct qeth_trap_id); 3130 qeth_get_trap_id(card, 3131 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3132 break; 3133 case QETH_DIAGS_TRAP_DISARM: 3134 cmd->data.diagass.options = 0x0001; 3135 break; 3136 case QETH_DIAGS_TRAP_CAPTURE: 3137 break; 3138 } 3139 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3140 } 3141 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3142 3143 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3144 unsigned int qdio_error, const char *dbftext) 3145 { 3146 if (qdio_error) { 3147 QETH_CARD_TEXT(card, 2, dbftext); 3148 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3149 buf->element[15].sflags); 3150 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3151 buf->element[14].sflags); 3152 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3153 if ((buf->element[15].sflags) == 0x12) { 3154 card->stats.rx_dropped++; 3155 return 0; 3156 } else 3157 return 1; 3158 } 3159 return 0; 3160 } 3161 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3162 3163 void qeth_buffer_reclaim_work(struct work_struct *work) 3164 { 3165 struct qeth_card *card = container_of(work, struct qeth_card, 3166 buffer_reclaim_work.work); 3167 3168 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3169 qeth_queue_input_buffer(card, card->reclaim_index); 3170 } 3171 3172 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3173 { 3174 struct qeth_qdio_q *queue = card->qdio.in_q; 3175 struct list_head *lh; 3176 int count; 3177 int i; 3178 int rc; 3179 int newcount = 0; 3180 3181 count = (index < queue->next_buf_to_init)? 3182 card->qdio.in_buf_pool.buf_count - 3183 (queue->next_buf_to_init - index) : 3184 card->qdio.in_buf_pool.buf_count - 3185 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3186 /* only requeue at a certain threshold to avoid SIGAs */ 3187 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3188 for (i = queue->next_buf_to_init; 3189 i < queue->next_buf_to_init + count; ++i) { 3190 if (qeth_init_input_buffer(card, 3191 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3192 break; 3193 } else { 3194 newcount++; 3195 } 3196 } 3197 3198 if (newcount < count) { 3199 /* we are in memory shortage so we switch back to 3200 traditional skb allocation and drop packages */ 3201 atomic_set(&card->force_alloc_skb, 3); 3202 count = newcount; 3203 } else { 3204 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3205 } 3206 3207 if (!count) { 3208 i = 0; 3209 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3210 i++; 3211 if (i == card->qdio.in_buf_pool.buf_count) { 3212 QETH_CARD_TEXT(card, 2, "qsarbw"); 3213 card->reclaim_index = index; 3214 schedule_delayed_work( 3215 &card->buffer_reclaim_work, 3216 QETH_RECLAIM_WORK_TIME); 3217 } 3218 return; 3219 } 3220 3221 /* 3222 * according to old code it should be avoided to requeue all 3223 * 128 buffers in order to benefit from PCI avoidance. 3224 * this function keeps at least one buffer (the buffer at 3225 * 'index') un-requeued -> this buffer is the first buffer that 3226 * will be requeued the next time 3227 */ 3228 if (card->options.performance_stats) { 3229 card->perf_stats.inbound_do_qdio_cnt++; 3230 card->perf_stats.inbound_do_qdio_start_time = 3231 qeth_get_micros(); 3232 } 3233 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3234 queue->next_buf_to_init, count); 3235 if (card->options.performance_stats) 3236 card->perf_stats.inbound_do_qdio_time += 3237 qeth_get_micros() - 3238 card->perf_stats.inbound_do_qdio_start_time; 3239 if (rc) { 3240 QETH_CARD_TEXT(card, 2, "qinberr"); 3241 } 3242 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3243 QDIO_MAX_BUFFERS_PER_Q; 3244 } 3245 } 3246 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3247 3248 static int qeth_handle_send_error(struct qeth_card *card, 3249 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3250 { 3251 int sbalf15 = buffer->buffer->element[15].sflags; 3252 3253 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3254 if (card->info.type == QETH_CARD_TYPE_IQD) { 3255 if (sbalf15 == 0) { 3256 qdio_err = 0; 3257 } else { 3258 qdio_err = 1; 3259 } 3260 } 3261 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3262 3263 if (!qdio_err) 3264 return QETH_SEND_ERROR_NONE; 3265 3266 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3267 return QETH_SEND_ERROR_RETRY; 3268 3269 QETH_CARD_TEXT(card, 1, "lnkfail"); 3270 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3271 (u16)qdio_err, (u8)sbalf15); 3272 return QETH_SEND_ERROR_LINK_FAILURE; 3273 } 3274 3275 /* 3276 * Switched to packing state if the number of used buffers on a queue 3277 * reaches a certain limit. 3278 */ 3279 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3280 { 3281 if (!queue->do_pack) { 3282 if (atomic_read(&queue->used_buffers) 3283 >= QETH_HIGH_WATERMARK_PACK){ 3284 /* switch non-PACKING -> PACKING */ 3285 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3286 if (queue->card->options.performance_stats) 3287 queue->card->perf_stats.sc_dp_p++; 3288 queue->do_pack = 1; 3289 } 3290 } 3291 } 3292 3293 /* 3294 * Switches from packing to non-packing mode. If there is a packing 3295 * buffer on the queue this buffer will be prepared to be flushed. 3296 * In that case 1 is returned to inform the caller. If no buffer 3297 * has to be flushed, zero is returned. 3298 */ 3299 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3300 { 3301 struct qeth_qdio_out_buffer *buffer; 3302 int flush_count = 0; 3303 3304 if (queue->do_pack) { 3305 if (atomic_read(&queue->used_buffers) 3306 <= QETH_LOW_WATERMARK_PACK) { 3307 /* switch PACKING -> non-PACKING */ 3308 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3309 if (queue->card->options.performance_stats) 3310 queue->card->perf_stats.sc_p_dp++; 3311 queue->do_pack = 0; 3312 /* flush packing buffers */ 3313 buffer = queue->bufs[queue->next_buf_to_fill]; 3314 if ((atomic_read(&buffer->state) == 3315 QETH_QDIO_BUF_EMPTY) && 3316 (buffer->next_element_to_fill > 0)) { 3317 atomic_set(&buffer->state, 3318 QETH_QDIO_BUF_PRIMED); 3319 flush_count++; 3320 queue->next_buf_to_fill = 3321 (queue->next_buf_to_fill + 1) % 3322 QDIO_MAX_BUFFERS_PER_Q; 3323 } 3324 } 3325 } 3326 return flush_count; 3327 } 3328 3329 3330 /* 3331 * Called to flush a packing buffer if no more pci flags are on the queue. 3332 * Checks if there is a packing buffer and prepares it to be flushed. 3333 * In that case returns 1, otherwise zero. 3334 */ 3335 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3336 { 3337 struct qeth_qdio_out_buffer *buffer; 3338 3339 buffer = queue->bufs[queue->next_buf_to_fill]; 3340 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3341 (buffer->next_element_to_fill > 0)) { 3342 /* it's a packing buffer */ 3343 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3344 queue->next_buf_to_fill = 3345 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3346 return 1; 3347 } 3348 return 0; 3349 } 3350 3351 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3352 int count) 3353 { 3354 struct qeth_qdio_out_buffer *buf; 3355 int rc; 3356 int i; 3357 unsigned int qdio_flags; 3358 3359 for (i = index; i < index + count; ++i) { 3360 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3361 buf = queue->bufs[bidx]; 3362 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3363 SBAL_EFLAGS_LAST_ENTRY; 3364 3365 if (queue->bufstates) 3366 queue->bufstates[bidx].user = buf; 3367 3368 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3369 continue; 3370 3371 if (!queue->do_pack) { 3372 if ((atomic_read(&queue->used_buffers) >= 3373 (QETH_HIGH_WATERMARK_PACK - 3374 QETH_WATERMARK_PACK_FUZZ)) && 3375 !atomic_read(&queue->set_pci_flags_count)) { 3376 /* it's likely that we'll go to packing 3377 * mode soon */ 3378 atomic_inc(&queue->set_pci_flags_count); 3379 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3380 } 3381 } else { 3382 if (!atomic_read(&queue->set_pci_flags_count)) { 3383 /* 3384 * there's no outstanding PCI any more, so we 3385 * have to request a PCI to be sure the the PCI 3386 * will wake at some time in the future then we 3387 * can flush packed buffers that might still be 3388 * hanging around, which can happen if no 3389 * further send was requested by the stack 3390 */ 3391 atomic_inc(&queue->set_pci_flags_count); 3392 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3393 } 3394 } 3395 } 3396 3397 queue->card->dev->trans_start = jiffies; 3398 if (queue->card->options.performance_stats) { 3399 queue->card->perf_stats.outbound_do_qdio_cnt++; 3400 queue->card->perf_stats.outbound_do_qdio_start_time = 3401 qeth_get_micros(); 3402 } 3403 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3404 if (atomic_read(&queue->set_pci_flags_count)) 3405 qdio_flags |= QDIO_FLAG_PCI_OUT; 3406 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3407 queue->queue_no, index, count); 3408 if (queue->card->options.performance_stats) 3409 queue->card->perf_stats.outbound_do_qdio_time += 3410 qeth_get_micros() - 3411 queue->card->perf_stats.outbound_do_qdio_start_time; 3412 atomic_add(count, &queue->used_buffers); 3413 if (rc) { 3414 queue->card->stats.tx_errors += count; 3415 /* ignore temporary SIGA errors without busy condition */ 3416 if (rc == -ENOBUFS) 3417 return; 3418 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3419 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3420 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3421 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3422 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3423 3424 /* this must not happen under normal circumstances. if it 3425 * happens something is really wrong -> recover */ 3426 qeth_schedule_recovery(queue->card); 3427 return; 3428 } 3429 if (queue->card->options.performance_stats) 3430 queue->card->perf_stats.bufs_sent += count; 3431 } 3432 3433 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3434 { 3435 int index; 3436 int flush_cnt = 0; 3437 int q_was_packing = 0; 3438 3439 /* 3440 * check if weed have to switch to non-packing mode or if 3441 * we have to get a pci flag out on the queue 3442 */ 3443 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3444 !atomic_read(&queue->set_pci_flags_count)) { 3445 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3446 QETH_OUT_Q_UNLOCKED) { 3447 /* 3448 * If we get in here, there was no action in 3449 * do_send_packet. So, we check if there is a 3450 * packing buffer to be flushed here. 3451 */ 3452 netif_stop_queue(queue->card->dev); 3453 index = queue->next_buf_to_fill; 3454 q_was_packing = queue->do_pack; 3455 /* queue->do_pack may change */ 3456 barrier(); 3457 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3458 if (!flush_cnt && 3459 !atomic_read(&queue->set_pci_flags_count)) 3460 flush_cnt += 3461 qeth_flush_buffers_on_no_pci(queue); 3462 if (queue->card->options.performance_stats && 3463 q_was_packing) 3464 queue->card->perf_stats.bufs_sent_pack += 3465 flush_cnt; 3466 if (flush_cnt) 3467 qeth_flush_buffers(queue, index, flush_cnt); 3468 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3469 } 3470 } 3471 } 3472 3473 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3474 unsigned long card_ptr) 3475 { 3476 struct qeth_card *card = (struct qeth_card *)card_ptr; 3477 3478 if (card->dev && (card->dev->flags & IFF_UP)) 3479 napi_schedule(&card->napi); 3480 } 3481 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3482 3483 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3484 { 3485 int rc; 3486 3487 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3488 rc = -1; 3489 goto out; 3490 } else { 3491 if (card->options.cq == cq) { 3492 rc = 0; 3493 goto out; 3494 } 3495 3496 if (card->state != CARD_STATE_DOWN && 3497 card->state != CARD_STATE_RECOVER) { 3498 rc = -1; 3499 goto out; 3500 } 3501 3502 qeth_free_qdio_buffers(card); 3503 card->options.cq = cq; 3504 rc = 0; 3505 } 3506 out: 3507 return rc; 3508 3509 } 3510 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3511 3512 3513 static void qeth_qdio_cq_handler(struct qeth_card *card, 3514 unsigned int qdio_err, 3515 unsigned int queue, int first_element, int count) { 3516 struct qeth_qdio_q *cq = card->qdio.c_q; 3517 int i; 3518 int rc; 3519 3520 if (!qeth_is_cq(card, queue)) 3521 goto out; 3522 3523 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3524 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3525 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3526 3527 if (qdio_err) { 3528 netif_stop_queue(card->dev); 3529 qeth_schedule_recovery(card); 3530 goto out; 3531 } 3532 3533 if (card->options.performance_stats) { 3534 card->perf_stats.cq_cnt++; 3535 card->perf_stats.cq_start_time = qeth_get_micros(); 3536 } 3537 3538 for (i = first_element; i < first_element + count; ++i) { 3539 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3540 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3541 int e; 3542 3543 e = 0; 3544 while (buffer->element[e].addr) { 3545 unsigned long phys_aob_addr; 3546 3547 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3548 qeth_qdio_handle_aob(card, phys_aob_addr); 3549 buffer->element[e].addr = NULL; 3550 buffer->element[e].eflags = 0; 3551 buffer->element[e].sflags = 0; 3552 buffer->element[e].length = 0; 3553 3554 ++e; 3555 } 3556 3557 buffer->element[15].eflags = 0; 3558 buffer->element[15].sflags = 0; 3559 } 3560 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3561 card->qdio.c_q->next_buf_to_init, 3562 count); 3563 if (rc) { 3564 dev_warn(&card->gdev->dev, 3565 "QDIO reported an error, rc=%i\n", rc); 3566 QETH_CARD_TEXT(card, 2, "qcqherr"); 3567 } 3568 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3569 + count) % QDIO_MAX_BUFFERS_PER_Q; 3570 3571 netif_wake_queue(card->dev); 3572 3573 if (card->options.performance_stats) { 3574 int delta_t = qeth_get_micros(); 3575 delta_t -= card->perf_stats.cq_start_time; 3576 card->perf_stats.cq_time += delta_t; 3577 } 3578 out: 3579 return; 3580 } 3581 3582 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3583 unsigned int queue, int first_elem, int count, 3584 unsigned long card_ptr) 3585 { 3586 struct qeth_card *card = (struct qeth_card *)card_ptr; 3587 3588 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3589 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3590 3591 if (qeth_is_cq(card, queue)) 3592 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3593 else if (qdio_err) 3594 qeth_schedule_recovery(card); 3595 3596 3597 } 3598 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3599 3600 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3601 unsigned int qdio_error, int __queue, int first_element, 3602 int count, unsigned long card_ptr) 3603 { 3604 struct qeth_card *card = (struct qeth_card *) card_ptr; 3605 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3606 struct qeth_qdio_out_buffer *buffer; 3607 int i; 3608 3609 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3610 if (qdio_error & QDIO_ERROR_FATAL) { 3611 QETH_CARD_TEXT(card, 2, "achkcond"); 3612 netif_stop_queue(card->dev); 3613 qeth_schedule_recovery(card); 3614 return; 3615 } 3616 if (card->options.performance_stats) { 3617 card->perf_stats.outbound_handler_cnt++; 3618 card->perf_stats.outbound_handler_start_time = 3619 qeth_get_micros(); 3620 } 3621 for (i = first_element; i < (first_element + count); ++i) { 3622 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3623 buffer = queue->bufs[bidx]; 3624 qeth_handle_send_error(card, buffer, qdio_error); 3625 3626 if (queue->bufstates && 3627 (queue->bufstates[bidx].flags & 3628 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3629 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3630 3631 if (atomic_cmpxchg(&buffer->state, 3632 QETH_QDIO_BUF_PRIMED, 3633 QETH_QDIO_BUF_PENDING) == 3634 QETH_QDIO_BUF_PRIMED) { 3635 qeth_notify_skbs(queue, buffer, 3636 TX_NOTIFY_PENDING); 3637 } 3638 buffer->aob = queue->bufstates[bidx].aob; 3639 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3640 QETH_CARD_TEXT(queue->card, 5, "aob"); 3641 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3642 virt_to_phys(buffer->aob)); 3643 if (qeth_init_qdio_out_buf(queue, bidx)) { 3644 QETH_CARD_TEXT(card, 2, "outofbuf"); 3645 qeth_schedule_recovery(card); 3646 } 3647 } else { 3648 if (card->options.cq == QETH_CQ_ENABLED) { 3649 enum iucv_tx_notify n; 3650 3651 n = qeth_compute_cq_notification( 3652 buffer->buffer->element[15].sflags, 0); 3653 qeth_notify_skbs(queue, buffer, n); 3654 } 3655 3656 qeth_clear_output_buffer(queue, buffer, 3657 QETH_QDIO_BUF_EMPTY); 3658 } 3659 qeth_cleanup_handled_pending(queue, bidx, 0); 3660 } 3661 atomic_sub(count, &queue->used_buffers); 3662 /* check if we need to do something on this outbound queue */ 3663 if (card->info.type != QETH_CARD_TYPE_IQD) 3664 qeth_check_outbound_queue(queue); 3665 3666 netif_wake_queue(queue->card->dev); 3667 if (card->options.performance_stats) 3668 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3669 card->perf_stats.outbound_handler_start_time; 3670 } 3671 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3672 3673 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3674 int ipv, int cast_type) 3675 { 3676 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3677 card->info.type == QETH_CARD_TYPE_OSX)) 3678 return card->qdio.default_out_queue; 3679 switch (card->qdio.no_out_queues) { 3680 case 4: 3681 if (cast_type && card->info.is_multicast_different) 3682 return card->info.is_multicast_different & 3683 (card->qdio.no_out_queues - 1); 3684 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3685 const u8 tos = ip_hdr(skb)->tos; 3686 3687 if (card->qdio.do_prio_queueing == 3688 QETH_PRIO_Q_ING_TOS) { 3689 if (tos & IP_TOS_NOTIMPORTANT) 3690 return 3; 3691 if (tos & IP_TOS_HIGHRELIABILITY) 3692 return 2; 3693 if (tos & IP_TOS_HIGHTHROUGHPUT) 3694 return 1; 3695 if (tos & IP_TOS_LOWDELAY) 3696 return 0; 3697 } 3698 if (card->qdio.do_prio_queueing == 3699 QETH_PRIO_Q_ING_PREC) 3700 return 3 - (tos >> 6); 3701 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3702 /* TODO: IPv6!!! */ 3703 } 3704 return card->qdio.default_out_queue; 3705 case 1: /* fallthrough for single-out-queue 1920-device */ 3706 default: 3707 return card->qdio.default_out_queue; 3708 } 3709 } 3710 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3711 3712 int qeth_get_elements_for_frags(struct sk_buff *skb) 3713 { 3714 int cnt, length, e, elements = 0; 3715 struct skb_frag_struct *frag; 3716 char *data; 3717 3718 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3719 frag = &skb_shinfo(skb)->frags[cnt]; 3720 data = (char *)page_to_phys(skb_frag_page(frag)) + 3721 frag->page_offset; 3722 length = frag->size; 3723 e = PFN_UP((unsigned long)data + length - 1) - 3724 PFN_DOWN((unsigned long)data); 3725 elements += e; 3726 } 3727 return elements; 3728 } 3729 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3730 3731 int qeth_get_elements_no(struct qeth_card *card, 3732 struct sk_buff *skb, int elems) 3733 { 3734 int dlen = skb->len - skb->data_len; 3735 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3736 PFN_DOWN((unsigned long)skb->data); 3737 3738 elements_needed += qeth_get_elements_for_frags(skb); 3739 3740 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3741 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3742 "(Number=%d / Length=%d). Discarded.\n", 3743 (elements_needed+elems), skb->len); 3744 return 0; 3745 } 3746 return elements_needed; 3747 } 3748 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3749 3750 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3751 { 3752 int hroom, inpage, rest; 3753 3754 if (((unsigned long)skb->data & PAGE_MASK) != 3755 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3756 hroom = skb_headroom(skb); 3757 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3758 rest = len - inpage; 3759 if (rest > hroom) 3760 return 1; 3761 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3762 skb->data -= rest; 3763 skb->tail -= rest; 3764 *hdr = (struct qeth_hdr *)skb->data; 3765 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3766 } 3767 return 0; 3768 } 3769 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3770 3771 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3772 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3773 int offset) 3774 { 3775 int length = skb->len - skb->data_len; 3776 int length_here; 3777 int element; 3778 char *data; 3779 int first_lap, cnt; 3780 struct skb_frag_struct *frag; 3781 3782 element = *next_element_to_fill; 3783 data = skb->data; 3784 first_lap = (is_tso == 0 ? 1 : 0); 3785 3786 if (offset >= 0) { 3787 data = skb->data + offset; 3788 length -= offset; 3789 first_lap = 0; 3790 } 3791 3792 while (length > 0) { 3793 /* length_here is the remaining amount of data in this page */ 3794 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3795 if (length < length_here) 3796 length_here = length; 3797 3798 buffer->element[element].addr = data; 3799 buffer->element[element].length = length_here; 3800 length -= length_here; 3801 if (!length) { 3802 if (first_lap) 3803 if (skb_shinfo(skb)->nr_frags) 3804 buffer->element[element].eflags = 3805 SBAL_EFLAGS_FIRST_FRAG; 3806 else 3807 buffer->element[element].eflags = 0; 3808 else 3809 buffer->element[element].eflags = 3810 SBAL_EFLAGS_MIDDLE_FRAG; 3811 } else { 3812 if (first_lap) 3813 buffer->element[element].eflags = 3814 SBAL_EFLAGS_FIRST_FRAG; 3815 else 3816 buffer->element[element].eflags = 3817 SBAL_EFLAGS_MIDDLE_FRAG; 3818 } 3819 data += length_here; 3820 element++; 3821 first_lap = 0; 3822 } 3823 3824 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3825 frag = &skb_shinfo(skb)->frags[cnt]; 3826 data = (char *)page_to_phys(skb_frag_page(frag)) + 3827 frag->page_offset; 3828 length = frag->size; 3829 while (length > 0) { 3830 length_here = PAGE_SIZE - 3831 ((unsigned long) data % PAGE_SIZE); 3832 if (length < length_here) 3833 length_here = length; 3834 3835 buffer->element[element].addr = data; 3836 buffer->element[element].length = length_here; 3837 buffer->element[element].eflags = 3838 SBAL_EFLAGS_MIDDLE_FRAG; 3839 length -= length_here; 3840 data += length_here; 3841 element++; 3842 } 3843 } 3844 3845 if (buffer->element[element - 1].eflags) 3846 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3847 *next_element_to_fill = element; 3848 } 3849 3850 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3851 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3852 struct qeth_hdr *hdr, int offset, int hd_len) 3853 { 3854 struct qdio_buffer *buffer; 3855 int flush_cnt = 0, hdr_len, large_send = 0; 3856 3857 buffer = buf->buffer; 3858 atomic_inc(&skb->users); 3859 skb_queue_tail(&buf->skb_list, skb); 3860 3861 /*check first on TSO ....*/ 3862 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3863 int element = buf->next_element_to_fill; 3864 3865 hdr_len = sizeof(struct qeth_hdr_tso) + 3866 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3867 /*fill first buffer entry only with header information */ 3868 buffer->element[element].addr = skb->data; 3869 buffer->element[element].length = hdr_len; 3870 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3871 buf->next_element_to_fill++; 3872 skb->data += hdr_len; 3873 skb->len -= hdr_len; 3874 large_send = 1; 3875 } 3876 3877 if (offset >= 0) { 3878 int element = buf->next_element_to_fill; 3879 buffer->element[element].addr = hdr; 3880 buffer->element[element].length = sizeof(struct qeth_hdr) + 3881 hd_len; 3882 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3883 buf->is_header[element] = 1; 3884 buf->next_element_to_fill++; 3885 } 3886 3887 __qeth_fill_buffer(skb, buffer, large_send, 3888 (int *)&buf->next_element_to_fill, offset); 3889 3890 if (!queue->do_pack) { 3891 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3892 /* set state to PRIMED -> will be flushed */ 3893 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3894 flush_cnt = 1; 3895 } else { 3896 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3897 if (queue->card->options.performance_stats) 3898 queue->card->perf_stats.skbs_sent_pack++; 3899 if (buf->next_element_to_fill >= 3900 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3901 /* 3902 * packed buffer if full -> set state PRIMED 3903 * -> will be flushed 3904 */ 3905 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3906 flush_cnt = 1; 3907 } 3908 } 3909 return flush_cnt; 3910 } 3911 3912 int qeth_do_send_packet_fast(struct qeth_card *card, 3913 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3914 struct qeth_hdr *hdr, int elements_needed, 3915 int offset, int hd_len) 3916 { 3917 struct qeth_qdio_out_buffer *buffer; 3918 int index; 3919 3920 /* spin until we get the queue ... */ 3921 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3922 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3923 /* ... now we've got the queue */ 3924 index = queue->next_buf_to_fill; 3925 buffer = queue->bufs[queue->next_buf_to_fill]; 3926 /* 3927 * check if buffer is empty to make sure that we do not 'overtake' 3928 * ourselves and try to fill a buffer that is already primed 3929 */ 3930 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3931 goto out; 3932 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3933 QDIO_MAX_BUFFERS_PER_Q; 3934 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3935 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3936 qeth_flush_buffers(queue, index, 1); 3937 return 0; 3938 out: 3939 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3940 return -EBUSY; 3941 } 3942 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3943 3944 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3945 struct sk_buff *skb, struct qeth_hdr *hdr, 3946 int elements_needed) 3947 { 3948 struct qeth_qdio_out_buffer *buffer; 3949 int start_index; 3950 int flush_count = 0; 3951 int do_pack = 0; 3952 int tmp; 3953 int rc = 0; 3954 3955 /* spin until we get the queue ... */ 3956 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3957 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3958 start_index = queue->next_buf_to_fill; 3959 buffer = queue->bufs[queue->next_buf_to_fill]; 3960 /* 3961 * check if buffer is empty to make sure that we do not 'overtake' 3962 * ourselves and try to fill a buffer that is already primed 3963 */ 3964 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3965 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3966 return -EBUSY; 3967 } 3968 /* check if we need to switch packing state of this queue */ 3969 qeth_switch_to_packing_if_needed(queue); 3970 if (queue->do_pack) { 3971 do_pack = 1; 3972 /* does packet fit in current buffer? */ 3973 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3974 buffer->next_element_to_fill) < elements_needed) { 3975 /* ... no -> set state PRIMED */ 3976 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3977 flush_count++; 3978 queue->next_buf_to_fill = 3979 (queue->next_buf_to_fill + 1) % 3980 QDIO_MAX_BUFFERS_PER_Q; 3981 buffer = queue->bufs[queue->next_buf_to_fill]; 3982 /* we did a step forward, so check buffer state 3983 * again */ 3984 if (atomic_read(&buffer->state) != 3985 QETH_QDIO_BUF_EMPTY) { 3986 qeth_flush_buffers(queue, start_index, 3987 flush_count); 3988 atomic_set(&queue->state, 3989 QETH_OUT_Q_UNLOCKED); 3990 return -EBUSY; 3991 } 3992 } 3993 } 3994 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3995 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3996 QDIO_MAX_BUFFERS_PER_Q; 3997 flush_count += tmp; 3998 if (flush_count) 3999 qeth_flush_buffers(queue, start_index, flush_count); 4000 else if (!atomic_read(&queue->set_pci_flags_count)) 4001 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4002 /* 4003 * queue->state will go from LOCKED -> UNLOCKED or from 4004 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4005 * (switch packing state or flush buffer to get another pci flag out). 4006 * In that case we will enter this loop 4007 */ 4008 while (atomic_dec_return(&queue->state)) { 4009 flush_count = 0; 4010 start_index = queue->next_buf_to_fill; 4011 /* check if we can go back to non-packing state */ 4012 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4013 /* 4014 * check if we need to flush a packing buffer to get a pci 4015 * flag out on the queue 4016 */ 4017 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4018 flush_count += qeth_flush_buffers_on_no_pci(queue); 4019 if (flush_count) 4020 qeth_flush_buffers(queue, start_index, flush_count); 4021 } 4022 /* at this point the queue is UNLOCKED again */ 4023 if (queue->card->options.performance_stats && do_pack) 4024 queue->card->perf_stats.bufs_sent_pack += flush_count; 4025 4026 return rc; 4027 } 4028 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4029 4030 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4031 struct qeth_reply *reply, unsigned long data) 4032 { 4033 struct qeth_ipa_cmd *cmd; 4034 struct qeth_ipacmd_setadpparms *setparms; 4035 4036 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4037 4038 cmd = (struct qeth_ipa_cmd *) data; 4039 setparms = &(cmd->data.setadapterparms); 4040 4041 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4042 if (cmd->hdr.return_code) { 4043 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 4044 setparms->data.mode = SET_PROMISC_MODE_OFF; 4045 } 4046 card->info.promisc_mode = setparms->data.mode; 4047 return 0; 4048 } 4049 4050 void qeth_setadp_promisc_mode(struct qeth_card *card) 4051 { 4052 enum qeth_ipa_promisc_modes mode; 4053 struct net_device *dev = card->dev; 4054 struct qeth_cmd_buffer *iob; 4055 struct qeth_ipa_cmd *cmd; 4056 4057 QETH_CARD_TEXT(card, 4, "setprom"); 4058 4059 if (((dev->flags & IFF_PROMISC) && 4060 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4061 (!(dev->flags & IFF_PROMISC) && 4062 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4063 return; 4064 mode = SET_PROMISC_MODE_OFF; 4065 if (dev->flags & IFF_PROMISC) 4066 mode = SET_PROMISC_MODE_ON; 4067 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4068 4069 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4070 sizeof(struct qeth_ipacmd_setadpparms)); 4071 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4072 cmd->data.setadapterparms.data.mode = mode; 4073 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4074 } 4075 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4076 4077 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4078 { 4079 struct qeth_card *card; 4080 char dbf_text[15]; 4081 4082 card = dev->ml_priv; 4083 4084 QETH_CARD_TEXT(card, 4, "chgmtu"); 4085 sprintf(dbf_text, "%8x", new_mtu); 4086 QETH_CARD_TEXT(card, 4, dbf_text); 4087 4088 if (new_mtu < 64) 4089 return -EINVAL; 4090 if (new_mtu > 65535) 4091 return -EINVAL; 4092 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4093 (!qeth_mtu_is_valid(card, new_mtu))) 4094 return -EINVAL; 4095 dev->mtu = new_mtu; 4096 return 0; 4097 } 4098 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4099 4100 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4101 { 4102 struct qeth_card *card; 4103 4104 card = dev->ml_priv; 4105 4106 QETH_CARD_TEXT(card, 5, "getstat"); 4107 4108 return &card->stats; 4109 } 4110 EXPORT_SYMBOL_GPL(qeth_get_stats); 4111 4112 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4113 struct qeth_reply *reply, unsigned long data) 4114 { 4115 struct qeth_ipa_cmd *cmd; 4116 4117 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4118 4119 cmd = (struct qeth_ipa_cmd *) data; 4120 if (!card->options.layer2 || 4121 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4122 memcpy(card->dev->dev_addr, 4123 &cmd->data.setadapterparms.data.change_addr.addr, 4124 OSA_ADDR_LEN); 4125 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4126 } 4127 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4128 return 0; 4129 } 4130 4131 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4132 { 4133 int rc; 4134 struct qeth_cmd_buffer *iob; 4135 struct qeth_ipa_cmd *cmd; 4136 4137 QETH_CARD_TEXT(card, 4, "chgmac"); 4138 4139 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4140 sizeof(struct qeth_ipacmd_setadpparms)); 4141 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4142 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4143 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4144 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4145 card->dev->dev_addr, OSA_ADDR_LEN); 4146 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4147 NULL); 4148 return rc; 4149 } 4150 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4151 4152 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4153 struct qeth_reply *reply, unsigned long data) 4154 { 4155 struct qeth_ipa_cmd *cmd; 4156 struct qeth_set_access_ctrl *access_ctrl_req; 4157 int fallback = *(int *)reply->param; 4158 4159 QETH_CARD_TEXT(card, 4, "setaccb"); 4160 4161 cmd = (struct qeth_ipa_cmd *) data; 4162 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4163 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4164 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4165 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4166 cmd->data.setadapterparms.hdr.return_code); 4167 if (cmd->data.setadapterparms.hdr.return_code != 4168 SET_ACCESS_CTRL_RC_SUCCESS) 4169 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4170 card->gdev->dev.kobj.name, 4171 access_ctrl_req->subcmd_code, 4172 cmd->data.setadapterparms.hdr.return_code); 4173 switch (cmd->data.setadapterparms.hdr.return_code) { 4174 case SET_ACCESS_CTRL_RC_SUCCESS: 4175 if (card->options.isolation == ISOLATION_MODE_NONE) { 4176 dev_info(&card->gdev->dev, 4177 "QDIO data connection isolation is deactivated\n"); 4178 } else { 4179 dev_info(&card->gdev->dev, 4180 "QDIO data connection isolation is activated\n"); 4181 } 4182 break; 4183 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4184 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4185 "deactivated\n", dev_name(&card->gdev->dev)); 4186 if (fallback) 4187 card->options.isolation = card->options.prev_isolation; 4188 break; 4189 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4190 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4191 " activated\n", dev_name(&card->gdev->dev)); 4192 if (fallback) 4193 card->options.isolation = card->options.prev_isolation; 4194 break; 4195 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4196 dev_err(&card->gdev->dev, "Adapter does not " 4197 "support QDIO data connection isolation\n"); 4198 break; 4199 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4200 dev_err(&card->gdev->dev, 4201 "Adapter is dedicated. " 4202 "QDIO data connection isolation not supported\n"); 4203 if (fallback) 4204 card->options.isolation = card->options.prev_isolation; 4205 break; 4206 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4207 dev_err(&card->gdev->dev, 4208 "TSO does not permit QDIO data connection isolation\n"); 4209 if (fallback) 4210 card->options.isolation = card->options.prev_isolation; 4211 break; 4212 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4213 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4214 "support reflective relay mode\n"); 4215 if (fallback) 4216 card->options.isolation = card->options.prev_isolation; 4217 break; 4218 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4219 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4220 "enabled at the adjacent switch port"); 4221 if (fallback) 4222 card->options.isolation = card->options.prev_isolation; 4223 break; 4224 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4225 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4226 "at the adjacent switch failed\n"); 4227 break; 4228 default: 4229 /* this should never happen */ 4230 if (fallback) 4231 card->options.isolation = card->options.prev_isolation; 4232 break; 4233 } 4234 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4235 return 0; 4236 } 4237 4238 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4239 enum qeth_ipa_isolation_modes isolation, int fallback) 4240 { 4241 int rc; 4242 struct qeth_cmd_buffer *iob; 4243 struct qeth_ipa_cmd *cmd; 4244 struct qeth_set_access_ctrl *access_ctrl_req; 4245 4246 QETH_CARD_TEXT(card, 4, "setacctl"); 4247 4248 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4249 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4250 4251 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4252 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4253 sizeof(struct qeth_set_access_ctrl)); 4254 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4255 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4256 access_ctrl_req->subcmd_code = isolation; 4257 4258 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4259 &fallback); 4260 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4261 return rc; 4262 } 4263 4264 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4265 { 4266 int rc = 0; 4267 4268 QETH_CARD_TEXT(card, 4, "setactlo"); 4269 4270 if ((card->info.type == QETH_CARD_TYPE_OSD || 4271 card->info.type == QETH_CARD_TYPE_OSX) && 4272 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4273 rc = qeth_setadpparms_set_access_ctrl(card, 4274 card->options.isolation, fallback); 4275 if (rc) { 4276 QETH_DBF_MESSAGE(3, 4277 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4278 card->gdev->dev.kobj.name, 4279 rc); 4280 rc = -EOPNOTSUPP; 4281 } 4282 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4283 card->options.isolation = ISOLATION_MODE_NONE; 4284 4285 dev_err(&card->gdev->dev, "Adapter does not " 4286 "support QDIO data connection isolation\n"); 4287 rc = -EOPNOTSUPP; 4288 } 4289 return rc; 4290 } 4291 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4292 4293 void qeth_tx_timeout(struct net_device *dev) 4294 { 4295 struct qeth_card *card; 4296 4297 card = dev->ml_priv; 4298 QETH_CARD_TEXT(card, 4, "txtimeo"); 4299 card->stats.tx_errors++; 4300 qeth_schedule_recovery(card); 4301 } 4302 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4303 4304 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4305 { 4306 struct qeth_card *card = dev->ml_priv; 4307 int rc = 0; 4308 4309 switch (regnum) { 4310 case MII_BMCR: /* Basic mode control register */ 4311 rc = BMCR_FULLDPLX; 4312 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4313 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4314 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4315 rc |= BMCR_SPEED100; 4316 break; 4317 case MII_BMSR: /* Basic mode status register */ 4318 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4319 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4320 BMSR_100BASE4; 4321 break; 4322 case MII_PHYSID1: /* PHYS ID 1 */ 4323 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4324 dev->dev_addr[2]; 4325 rc = (rc >> 5) & 0xFFFF; 4326 break; 4327 case MII_PHYSID2: /* PHYS ID 2 */ 4328 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4329 break; 4330 case MII_ADVERTISE: /* Advertisement control reg */ 4331 rc = ADVERTISE_ALL; 4332 break; 4333 case MII_LPA: /* Link partner ability reg */ 4334 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4335 LPA_100BASE4 | LPA_LPACK; 4336 break; 4337 case MII_EXPANSION: /* Expansion register */ 4338 break; 4339 case MII_DCOUNTER: /* disconnect counter */ 4340 break; 4341 case MII_FCSCOUNTER: /* false carrier counter */ 4342 break; 4343 case MII_NWAYTEST: /* N-way auto-neg test register */ 4344 break; 4345 case MII_RERRCOUNTER: /* rx error counter */ 4346 rc = card->stats.rx_errors; 4347 break; 4348 case MII_SREVISION: /* silicon revision */ 4349 break; 4350 case MII_RESV1: /* reserved 1 */ 4351 break; 4352 case MII_LBRERROR: /* loopback, rx, bypass error */ 4353 break; 4354 case MII_PHYADDR: /* physical address */ 4355 break; 4356 case MII_RESV2: /* reserved 2 */ 4357 break; 4358 case MII_TPISTATUS: /* TPI status for 10mbps */ 4359 break; 4360 case MII_NCONFIG: /* network interface config */ 4361 break; 4362 default: 4363 break; 4364 } 4365 return rc; 4366 } 4367 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4368 4369 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4370 struct qeth_cmd_buffer *iob, int len, 4371 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4372 unsigned long), 4373 void *reply_param) 4374 { 4375 u16 s1, s2; 4376 4377 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4378 4379 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4380 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4381 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4382 /* adjust PDU length fields in IPA_PDU_HEADER */ 4383 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4384 s2 = (u32) len; 4385 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4386 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4387 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4388 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4389 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4390 reply_cb, reply_param); 4391 } 4392 4393 static int qeth_snmp_command_cb(struct qeth_card *card, 4394 struct qeth_reply *reply, unsigned long sdata) 4395 { 4396 struct qeth_ipa_cmd *cmd; 4397 struct qeth_arp_query_info *qinfo; 4398 struct qeth_snmp_cmd *snmp; 4399 unsigned char *data; 4400 __u16 data_len; 4401 4402 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4403 4404 cmd = (struct qeth_ipa_cmd *) sdata; 4405 data = (unsigned char *)((char *)cmd - reply->offset); 4406 qinfo = (struct qeth_arp_query_info *) reply->param; 4407 snmp = &cmd->data.setadapterparms.data.snmp; 4408 4409 if (cmd->hdr.return_code) { 4410 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4411 return 0; 4412 } 4413 if (cmd->data.setadapterparms.hdr.return_code) { 4414 cmd->hdr.return_code = 4415 cmd->data.setadapterparms.hdr.return_code; 4416 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4417 return 0; 4418 } 4419 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4420 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4421 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4422 else 4423 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4424 4425 /* check if there is enough room in userspace */ 4426 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4427 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4428 cmd->hdr.return_code = IPA_RC_ENOMEM; 4429 return 0; 4430 } 4431 QETH_CARD_TEXT_(card, 4, "snore%i", 4432 cmd->data.setadapterparms.hdr.used_total); 4433 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4434 cmd->data.setadapterparms.hdr.seq_no); 4435 /*copy entries to user buffer*/ 4436 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4437 memcpy(qinfo->udata + qinfo->udata_offset, 4438 (char *)snmp, 4439 data_len + offsetof(struct qeth_snmp_cmd, data)); 4440 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4441 } else { 4442 memcpy(qinfo->udata + qinfo->udata_offset, 4443 (char *)&snmp->request, data_len); 4444 } 4445 qinfo->udata_offset += data_len; 4446 /* check if all replies received ... */ 4447 QETH_CARD_TEXT_(card, 4, "srtot%i", 4448 cmd->data.setadapterparms.hdr.used_total); 4449 QETH_CARD_TEXT_(card, 4, "srseq%i", 4450 cmd->data.setadapterparms.hdr.seq_no); 4451 if (cmd->data.setadapterparms.hdr.seq_no < 4452 cmd->data.setadapterparms.hdr.used_total) 4453 return 1; 4454 return 0; 4455 } 4456 4457 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4458 { 4459 struct qeth_cmd_buffer *iob; 4460 struct qeth_ipa_cmd *cmd; 4461 struct qeth_snmp_ureq *ureq; 4462 unsigned int req_len; 4463 struct qeth_arp_query_info qinfo = {0, }; 4464 int rc = 0; 4465 4466 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4467 4468 if (card->info.guestlan) 4469 return -EOPNOTSUPP; 4470 4471 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4472 (!card->options.layer2)) { 4473 return -EOPNOTSUPP; 4474 } 4475 /* skip 4 bytes (data_len struct member) to get req_len */ 4476 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4477 return -EFAULT; 4478 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4479 sizeof(struct qeth_ipacmd_hdr) - 4480 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4481 return -EINVAL; 4482 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4483 if (IS_ERR(ureq)) { 4484 QETH_CARD_TEXT(card, 2, "snmpnome"); 4485 return PTR_ERR(ureq); 4486 } 4487 qinfo.udata_len = ureq->hdr.data_len; 4488 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4489 if (!qinfo.udata) { 4490 kfree(ureq); 4491 return -ENOMEM; 4492 } 4493 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4494 4495 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4496 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4497 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4498 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4499 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4500 qeth_snmp_command_cb, (void *)&qinfo); 4501 if (rc) 4502 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4503 QETH_CARD_IFNAME(card), rc); 4504 else { 4505 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4506 rc = -EFAULT; 4507 } 4508 4509 kfree(ureq); 4510 kfree(qinfo.udata); 4511 return rc; 4512 } 4513 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4514 4515 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4516 struct qeth_reply *reply, unsigned long data) 4517 { 4518 struct qeth_ipa_cmd *cmd; 4519 struct qeth_qoat_priv *priv; 4520 char *resdata; 4521 int resdatalen; 4522 4523 QETH_CARD_TEXT(card, 3, "qoatcb"); 4524 4525 cmd = (struct qeth_ipa_cmd *)data; 4526 priv = (struct qeth_qoat_priv *)reply->param; 4527 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4528 resdata = (char *)data + 28; 4529 4530 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4531 cmd->hdr.return_code = IPA_RC_FFFF; 4532 return 0; 4533 } 4534 4535 memcpy((priv->buffer + priv->response_len), resdata, 4536 resdatalen); 4537 priv->response_len += resdatalen; 4538 4539 if (cmd->data.setadapterparms.hdr.seq_no < 4540 cmd->data.setadapterparms.hdr.used_total) 4541 return 1; 4542 return 0; 4543 } 4544 4545 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4546 { 4547 int rc = 0; 4548 struct qeth_cmd_buffer *iob; 4549 struct qeth_ipa_cmd *cmd; 4550 struct qeth_query_oat *oat_req; 4551 struct qeth_query_oat_data oat_data; 4552 struct qeth_qoat_priv priv; 4553 void __user *tmp; 4554 4555 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4556 4557 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4558 rc = -EOPNOTSUPP; 4559 goto out; 4560 } 4561 4562 if (copy_from_user(&oat_data, udata, 4563 sizeof(struct qeth_query_oat_data))) { 4564 rc = -EFAULT; 4565 goto out; 4566 } 4567 4568 priv.buffer_len = oat_data.buffer_len; 4569 priv.response_len = 0; 4570 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4571 if (!priv.buffer) { 4572 rc = -ENOMEM; 4573 goto out; 4574 } 4575 4576 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4577 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4578 sizeof(struct qeth_query_oat)); 4579 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4580 oat_req = &cmd->data.setadapterparms.data.query_oat; 4581 oat_req->subcmd_code = oat_data.command; 4582 4583 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4584 &priv); 4585 if (!rc) { 4586 if (is_compat_task()) 4587 tmp = compat_ptr(oat_data.ptr); 4588 else 4589 tmp = (void __user *)(unsigned long)oat_data.ptr; 4590 4591 if (copy_to_user(tmp, priv.buffer, 4592 priv.response_len)) { 4593 rc = -EFAULT; 4594 goto out_free; 4595 } 4596 4597 oat_data.response_len = priv.response_len; 4598 4599 if (copy_to_user(udata, &oat_data, 4600 sizeof(struct qeth_query_oat_data))) 4601 rc = -EFAULT; 4602 } else 4603 if (rc == IPA_RC_FFFF) 4604 rc = -EFAULT; 4605 4606 out_free: 4607 kfree(priv.buffer); 4608 out: 4609 return rc; 4610 } 4611 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4612 4613 static int qeth_query_card_info_cb(struct qeth_card *card, 4614 struct qeth_reply *reply, unsigned long data) 4615 { 4616 struct qeth_ipa_cmd *cmd; 4617 struct qeth_query_card_info *card_info; 4618 struct carrier_info *carrier_info; 4619 4620 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4621 carrier_info = (struct carrier_info *)reply->param; 4622 cmd = (struct qeth_ipa_cmd *)data; 4623 card_info = &cmd->data.setadapterparms.data.card_info; 4624 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4625 carrier_info->card_type = card_info->card_type; 4626 carrier_info->port_mode = card_info->port_mode; 4627 carrier_info->port_speed = card_info->port_speed; 4628 } 4629 4630 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4631 return 0; 4632 } 4633 4634 int qeth_query_card_info(struct qeth_card *card, 4635 struct carrier_info *carrier_info) 4636 { 4637 struct qeth_cmd_buffer *iob; 4638 4639 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4640 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4641 return -EOPNOTSUPP; 4642 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4643 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4644 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4645 (void *)carrier_info); 4646 } 4647 EXPORT_SYMBOL_GPL(qeth_query_card_info); 4648 4649 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4650 { 4651 switch (card->info.type) { 4652 case QETH_CARD_TYPE_IQD: 4653 return 2; 4654 default: 4655 return 0; 4656 } 4657 } 4658 4659 static void qeth_determine_capabilities(struct qeth_card *card) 4660 { 4661 int rc; 4662 int length; 4663 char *prcd; 4664 struct ccw_device *ddev; 4665 int ddev_offline = 0; 4666 4667 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4668 ddev = CARD_DDEV(card); 4669 if (!ddev->online) { 4670 ddev_offline = 1; 4671 rc = ccw_device_set_online(ddev); 4672 if (rc) { 4673 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4674 goto out; 4675 } 4676 } 4677 4678 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4679 if (rc) { 4680 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4681 dev_name(&card->gdev->dev), rc); 4682 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4683 goto out_offline; 4684 } 4685 qeth_configure_unitaddr(card, prcd); 4686 if (ddev_offline) 4687 qeth_configure_blkt_default(card, prcd); 4688 kfree(prcd); 4689 4690 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4691 if (rc) 4692 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4693 4694 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4695 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4696 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4697 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4698 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4699 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4700 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4701 dev_info(&card->gdev->dev, 4702 "Completion Queueing supported\n"); 4703 } else { 4704 card->options.cq = QETH_CQ_NOTAVAILABLE; 4705 } 4706 4707 4708 out_offline: 4709 if (ddev_offline == 1) 4710 ccw_device_set_offline(ddev); 4711 out: 4712 return; 4713 } 4714 4715 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4716 struct qdio_buffer **in_sbal_ptrs, 4717 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4718 int i; 4719 4720 if (card->options.cq == QETH_CQ_ENABLED) { 4721 int offset = QDIO_MAX_BUFFERS_PER_Q * 4722 (card->qdio.no_in_queues - 1); 4723 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4724 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4725 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4726 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4727 } 4728 4729 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4730 } 4731 } 4732 4733 static int qeth_qdio_establish(struct qeth_card *card) 4734 { 4735 struct qdio_initialize init_data; 4736 char *qib_param_field; 4737 struct qdio_buffer **in_sbal_ptrs; 4738 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4739 struct qdio_buffer **out_sbal_ptrs; 4740 int i, j, k; 4741 int rc = 0; 4742 4743 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4744 4745 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4746 GFP_KERNEL); 4747 if (!qib_param_field) { 4748 rc = -ENOMEM; 4749 goto out_free_nothing; 4750 } 4751 4752 qeth_create_qib_param_field(card, qib_param_field); 4753 qeth_create_qib_param_field_blkt(card, qib_param_field); 4754 4755 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4756 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4757 GFP_KERNEL); 4758 if (!in_sbal_ptrs) { 4759 rc = -ENOMEM; 4760 goto out_free_qib_param; 4761 } 4762 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4763 in_sbal_ptrs[i] = (struct qdio_buffer *) 4764 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4765 } 4766 4767 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4768 GFP_KERNEL); 4769 if (!queue_start_poll) { 4770 rc = -ENOMEM; 4771 goto out_free_in_sbals; 4772 } 4773 for (i = 0; i < card->qdio.no_in_queues; ++i) 4774 queue_start_poll[i] = card->discipline->start_poll; 4775 4776 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4777 4778 out_sbal_ptrs = 4779 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4780 sizeof(void *), GFP_KERNEL); 4781 if (!out_sbal_ptrs) { 4782 rc = -ENOMEM; 4783 goto out_free_queue_start_poll; 4784 } 4785 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4786 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4787 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4788 card->qdio.out_qs[i]->bufs[j]->buffer); 4789 } 4790 4791 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4792 init_data.cdev = CARD_DDEV(card); 4793 init_data.q_format = qeth_get_qdio_q_format(card); 4794 init_data.qib_param_field_format = 0; 4795 init_data.qib_param_field = qib_param_field; 4796 init_data.no_input_qs = card->qdio.no_in_queues; 4797 init_data.no_output_qs = card->qdio.no_out_queues; 4798 init_data.input_handler = card->discipline->input_handler; 4799 init_data.output_handler = card->discipline->output_handler; 4800 init_data.queue_start_poll_array = queue_start_poll; 4801 init_data.int_parm = (unsigned long) card; 4802 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4803 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4804 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4805 init_data.scan_threshold = 4806 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4807 4808 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4809 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4810 rc = qdio_allocate(&init_data); 4811 if (rc) { 4812 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4813 goto out; 4814 } 4815 rc = qdio_establish(&init_data); 4816 if (rc) { 4817 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4818 qdio_free(CARD_DDEV(card)); 4819 } 4820 } 4821 4822 switch (card->options.cq) { 4823 case QETH_CQ_ENABLED: 4824 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4825 break; 4826 case QETH_CQ_DISABLED: 4827 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4828 break; 4829 default: 4830 break; 4831 } 4832 out: 4833 kfree(out_sbal_ptrs); 4834 out_free_queue_start_poll: 4835 kfree(queue_start_poll); 4836 out_free_in_sbals: 4837 kfree(in_sbal_ptrs); 4838 out_free_qib_param: 4839 kfree(qib_param_field); 4840 out_free_nothing: 4841 return rc; 4842 } 4843 4844 static void qeth_core_free_card(struct qeth_card *card) 4845 { 4846 4847 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4848 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4849 qeth_clean_channel(&card->read); 4850 qeth_clean_channel(&card->write); 4851 if (card->dev) 4852 free_netdev(card->dev); 4853 kfree(card->ip_tbd_list); 4854 qeth_free_qdio_buffers(card); 4855 unregister_service_level(&card->qeth_service_level); 4856 kfree(card); 4857 } 4858 4859 void qeth_trace_features(struct qeth_card *card) 4860 { 4861 QETH_CARD_TEXT(card, 2, "features"); 4862 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 4863 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 4864 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 4865 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 4866 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 4867 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 4868 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 4869 } 4870 EXPORT_SYMBOL_GPL(qeth_trace_features); 4871 4872 static struct ccw_device_id qeth_ids[] = { 4873 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4874 .driver_info = QETH_CARD_TYPE_OSD}, 4875 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4876 .driver_info = QETH_CARD_TYPE_IQD}, 4877 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4878 .driver_info = QETH_CARD_TYPE_OSN}, 4879 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4880 .driver_info = QETH_CARD_TYPE_OSM}, 4881 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4882 .driver_info = QETH_CARD_TYPE_OSX}, 4883 {}, 4884 }; 4885 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4886 4887 static struct ccw_driver qeth_ccw_driver = { 4888 .driver = { 4889 .owner = THIS_MODULE, 4890 .name = "qeth", 4891 }, 4892 .ids = qeth_ids, 4893 .probe = ccwgroup_probe_ccwdev, 4894 .remove = ccwgroup_remove_ccwdev, 4895 }; 4896 4897 int qeth_core_hardsetup_card(struct qeth_card *card) 4898 { 4899 int retries = 3; 4900 int rc; 4901 4902 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4903 atomic_set(&card->force_alloc_skb, 0); 4904 qeth_update_from_chp_desc(card); 4905 retry: 4906 if (retries < 3) 4907 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4908 dev_name(&card->gdev->dev)); 4909 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4910 ccw_device_set_offline(CARD_DDEV(card)); 4911 ccw_device_set_offline(CARD_WDEV(card)); 4912 ccw_device_set_offline(CARD_RDEV(card)); 4913 qdio_free(CARD_DDEV(card)); 4914 rc = ccw_device_set_online(CARD_RDEV(card)); 4915 if (rc) 4916 goto retriable; 4917 rc = ccw_device_set_online(CARD_WDEV(card)); 4918 if (rc) 4919 goto retriable; 4920 rc = ccw_device_set_online(CARD_DDEV(card)); 4921 if (rc) 4922 goto retriable; 4923 retriable: 4924 if (rc == -ERESTARTSYS) { 4925 QETH_DBF_TEXT(SETUP, 2, "break1"); 4926 return rc; 4927 } else if (rc) { 4928 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4929 if (--retries < 0) 4930 goto out; 4931 else 4932 goto retry; 4933 } 4934 qeth_determine_capabilities(card); 4935 qeth_init_tokens(card); 4936 qeth_init_func_level(card); 4937 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4938 if (rc == -ERESTARTSYS) { 4939 QETH_DBF_TEXT(SETUP, 2, "break2"); 4940 return rc; 4941 } else if (rc) { 4942 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4943 if (--retries < 0) 4944 goto out; 4945 else 4946 goto retry; 4947 } 4948 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4949 if (rc == -ERESTARTSYS) { 4950 QETH_DBF_TEXT(SETUP, 2, "break3"); 4951 return rc; 4952 } else if (rc) { 4953 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4954 if (--retries < 0) 4955 goto out; 4956 else 4957 goto retry; 4958 } 4959 card->read_or_write_problem = 0; 4960 rc = qeth_mpc_initialize(card); 4961 if (rc) { 4962 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4963 goto out; 4964 } 4965 4966 card->options.ipa4.supported_funcs = 0; 4967 card->options.adp.supported_funcs = 0; 4968 card->options.sbp.supported_funcs = 0; 4969 card->info.diagass_support = 0; 4970 qeth_query_ipassists(card, QETH_PROT_IPV4); 4971 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4972 qeth_query_setadapterparms(card); 4973 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4974 qeth_query_setdiagass(card); 4975 return 0; 4976 out: 4977 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4978 "an error on the device\n"); 4979 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4980 dev_name(&card->gdev->dev), rc); 4981 return rc; 4982 } 4983 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4984 4985 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4986 struct qdio_buffer_element *element, 4987 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4988 { 4989 struct page *page = virt_to_page(element->addr); 4990 if (*pskb == NULL) { 4991 if (qethbuffer->rx_skb) { 4992 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4993 *pskb = qethbuffer->rx_skb; 4994 qethbuffer->rx_skb = NULL; 4995 } else { 4996 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4997 if (!(*pskb)) 4998 return -ENOMEM; 4999 } 5000 5001 skb_reserve(*pskb, ETH_HLEN); 5002 if (data_len <= QETH_RX_PULL_LEN) { 5003 memcpy(skb_put(*pskb, data_len), element->addr + offset, 5004 data_len); 5005 } else { 5006 get_page(page); 5007 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 5008 element->addr + offset, QETH_RX_PULL_LEN); 5009 skb_fill_page_desc(*pskb, *pfrag, page, 5010 offset + QETH_RX_PULL_LEN, 5011 data_len - QETH_RX_PULL_LEN); 5012 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5013 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5014 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5015 (*pfrag)++; 5016 } 5017 } else { 5018 get_page(page); 5019 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5020 (*pskb)->data_len += data_len; 5021 (*pskb)->len += data_len; 5022 (*pskb)->truesize += data_len; 5023 (*pfrag)++; 5024 } 5025 5026 5027 return 0; 5028 } 5029 5030 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5031 struct qeth_qdio_buffer *qethbuffer, 5032 struct qdio_buffer_element **__element, int *__offset, 5033 struct qeth_hdr **hdr) 5034 { 5035 struct qdio_buffer_element *element = *__element; 5036 struct qdio_buffer *buffer = qethbuffer->buffer; 5037 int offset = *__offset; 5038 struct sk_buff *skb = NULL; 5039 int skb_len = 0; 5040 void *data_ptr; 5041 int data_len; 5042 int headroom = 0; 5043 int use_rx_sg = 0; 5044 int frag = 0; 5045 5046 /* qeth_hdr must not cross element boundaries */ 5047 if (element->length < offset + sizeof(struct qeth_hdr)) { 5048 if (qeth_is_last_sbale(element)) 5049 return NULL; 5050 element++; 5051 offset = 0; 5052 if (element->length < sizeof(struct qeth_hdr)) 5053 return NULL; 5054 } 5055 *hdr = element->addr + offset; 5056 5057 offset += sizeof(struct qeth_hdr); 5058 switch ((*hdr)->hdr.l2.id) { 5059 case QETH_HEADER_TYPE_LAYER2: 5060 skb_len = (*hdr)->hdr.l2.pkt_length; 5061 break; 5062 case QETH_HEADER_TYPE_LAYER3: 5063 skb_len = (*hdr)->hdr.l3.length; 5064 headroom = ETH_HLEN; 5065 break; 5066 case QETH_HEADER_TYPE_OSN: 5067 skb_len = (*hdr)->hdr.osn.pdu_length; 5068 headroom = sizeof(struct qeth_hdr); 5069 break; 5070 default: 5071 break; 5072 } 5073 5074 if (!skb_len) 5075 return NULL; 5076 5077 if (((skb_len >= card->options.rx_sg_cb) && 5078 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5079 (!atomic_read(&card->force_alloc_skb))) || 5080 (card->options.cq == QETH_CQ_ENABLED)) { 5081 use_rx_sg = 1; 5082 } else { 5083 skb = dev_alloc_skb(skb_len + headroom); 5084 if (!skb) 5085 goto no_mem; 5086 if (headroom) 5087 skb_reserve(skb, headroom); 5088 } 5089 5090 data_ptr = element->addr + offset; 5091 while (skb_len) { 5092 data_len = min(skb_len, (int)(element->length - offset)); 5093 if (data_len) { 5094 if (use_rx_sg) { 5095 if (qeth_create_skb_frag(qethbuffer, element, 5096 &skb, offset, &frag, data_len)) 5097 goto no_mem; 5098 } else { 5099 memcpy(skb_put(skb, data_len), data_ptr, 5100 data_len); 5101 } 5102 } 5103 skb_len -= data_len; 5104 if (skb_len) { 5105 if (qeth_is_last_sbale(element)) { 5106 QETH_CARD_TEXT(card, 4, "unexeob"); 5107 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5108 dev_kfree_skb_any(skb); 5109 card->stats.rx_errors++; 5110 return NULL; 5111 } 5112 element++; 5113 offset = 0; 5114 data_ptr = element->addr; 5115 } else { 5116 offset += data_len; 5117 } 5118 } 5119 *__element = element; 5120 *__offset = offset; 5121 if (use_rx_sg && card->options.performance_stats) { 5122 card->perf_stats.sg_skbs_rx++; 5123 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5124 } 5125 return skb; 5126 no_mem: 5127 if (net_ratelimit()) { 5128 QETH_CARD_TEXT(card, 2, "noskbmem"); 5129 } 5130 card->stats.rx_dropped++; 5131 return NULL; 5132 } 5133 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5134 5135 static void qeth_unregister_dbf_views(void) 5136 { 5137 int x; 5138 for (x = 0; x < QETH_DBF_INFOS; x++) { 5139 debug_unregister(qeth_dbf[x].id); 5140 qeth_dbf[x].id = NULL; 5141 } 5142 } 5143 5144 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5145 { 5146 char dbf_txt_buf[32]; 5147 va_list args; 5148 5149 if (!debug_level_enabled(id, level)) 5150 return; 5151 va_start(args, fmt); 5152 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5153 va_end(args); 5154 debug_text_event(id, level, dbf_txt_buf); 5155 } 5156 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5157 5158 static int qeth_register_dbf_views(void) 5159 { 5160 int ret; 5161 int x; 5162 5163 for (x = 0; x < QETH_DBF_INFOS; x++) { 5164 /* register the areas */ 5165 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5166 qeth_dbf[x].pages, 5167 qeth_dbf[x].areas, 5168 qeth_dbf[x].len); 5169 if (qeth_dbf[x].id == NULL) { 5170 qeth_unregister_dbf_views(); 5171 return -ENOMEM; 5172 } 5173 5174 /* register a view */ 5175 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5176 if (ret) { 5177 qeth_unregister_dbf_views(); 5178 return ret; 5179 } 5180 5181 /* set a passing level */ 5182 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5183 } 5184 5185 return 0; 5186 } 5187 5188 int qeth_core_load_discipline(struct qeth_card *card, 5189 enum qeth_discipline_id discipline) 5190 { 5191 int rc = 0; 5192 mutex_lock(&qeth_mod_mutex); 5193 switch (discipline) { 5194 case QETH_DISCIPLINE_LAYER3: 5195 card->discipline = try_then_request_module( 5196 symbol_get(qeth_l3_discipline), "qeth_l3"); 5197 break; 5198 case QETH_DISCIPLINE_LAYER2: 5199 card->discipline = try_then_request_module( 5200 symbol_get(qeth_l2_discipline), "qeth_l2"); 5201 break; 5202 } 5203 if (!card->discipline) { 5204 dev_err(&card->gdev->dev, "There is no kernel module to " 5205 "support discipline %d\n", discipline); 5206 rc = -EINVAL; 5207 } 5208 mutex_unlock(&qeth_mod_mutex); 5209 return rc; 5210 } 5211 5212 void qeth_core_free_discipline(struct qeth_card *card) 5213 { 5214 if (card->options.layer2) 5215 symbol_put(qeth_l2_discipline); 5216 else 5217 symbol_put(qeth_l3_discipline); 5218 card->discipline = NULL; 5219 } 5220 5221 static const struct device_type qeth_generic_devtype = { 5222 .name = "qeth_generic", 5223 .groups = qeth_generic_attr_groups, 5224 }; 5225 static const struct device_type qeth_osn_devtype = { 5226 .name = "qeth_osn", 5227 .groups = qeth_osn_attr_groups, 5228 }; 5229 5230 #define DBF_NAME_LEN 20 5231 5232 struct qeth_dbf_entry { 5233 char dbf_name[DBF_NAME_LEN]; 5234 debug_info_t *dbf_info; 5235 struct list_head dbf_list; 5236 }; 5237 5238 static LIST_HEAD(qeth_dbf_list); 5239 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5240 5241 static debug_info_t *qeth_get_dbf_entry(char *name) 5242 { 5243 struct qeth_dbf_entry *entry; 5244 debug_info_t *rc = NULL; 5245 5246 mutex_lock(&qeth_dbf_list_mutex); 5247 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5248 if (strcmp(entry->dbf_name, name) == 0) { 5249 rc = entry->dbf_info; 5250 break; 5251 } 5252 } 5253 mutex_unlock(&qeth_dbf_list_mutex); 5254 return rc; 5255 } 5256 5257 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5258 { 5259 struct qeth_dbf_entry *new_entry; 5260 5261 card->debug = debug_register(name, 2, 1, 8); 5262 if (!card->debug) { 5263 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5264 goto err; 5265 } 5266 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5267 goto err_dbg; 5268 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5269 if (!new_entry) 5270 goto err_dbg; 5271 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5272 new_entry->dbf_info = card->debug; 5273 mutex_lock(&qeth_dbf_list_mutex); 5274 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5275 mutex_unlock(&qeth_dbf_list_mutex); 5276 5277 return 0; 5278 5279 err_dbg: 5280 debug_unregister(card->debug); 5281 err: 5282 return -ENOMEM; 5283 } 5284 5285 static void qeth_clear_dbf_list(void) 5286 { 5287 struct qeth_dbf_entry *entry, *tmp; 5288 5289 mutex_lock(&qeth_dbf_list_mutex); 5290 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5291 list_del(&entry->dbf_list); 5292 debug_unregister(entry->dbf_info); 5293 kfree(entry); 5294 } 5295 mutex_unlock(&qeth_dbf_list_mutex); 5296 } 5297 5298 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5299 { 5300 struct qeth_card *card; 5301 struct device *dev; 5302 int rc; 5303 unsigned long flags; 5304 char dbf_name[DBF_NAME_LEN]; 5305 5306 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5307 5308 dev = &gdev->dev; 5309 if (!get_device(dev)) 5310 return -ENODEV; 5311 5312 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5313 5314 card = qeth_alloc_card(); 5315 if (!card) { 5316 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5317 rc = -ENOMEM; 5318 goto err_dev; 5319 } 5320 5321 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5322 dev_name(&gdev->dev)); 5323 card->debug = qeth_get_dbf_entry(dbf_name); 5324 if (!card->debug) { 5325 rc = qeth_add_dbf_entry(card, dbf_name); 5326 if (rc) 5327 goto err_card; 5328 } 5329 5330 card->read.ccwdev = gdev->cdev[0]; 5331 card->write.ccwdev = gdev->cdev[1]; 5332 card->data.ccwdev = gdev->cdev[2]; 5333 dev_set_drvdata(&gdev->dev, card); 5334 card->gdev = gdev; 5335 gdev->cdev[0]->handler = qeth_irq; 5336 gdev->cdev[1]->handler = qeth_irq; 5337 gdev->cdev[2]->handler = qeth_irq; 5338 5339 rc = qeth_determine_card_type(card); 5340 if (rc) { 5341 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5342 goto err_card; 5343 } 5344 rc = qeth_setup_card(card); 5345 if (rc) { 5346 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5347 goto err_card; 5348 } 5349 5350 if (card->info.type == QETH_CARD_TYPE_OSN) 5351 gdev->dev.type = &qeth_osn_devtype; 5352 else 5353 gdev->dev.type = &qeth_generic_devtype; 5354 5355 switch (card->info.type) { 5356 case QETH_CARD_TYPE_OSN: 5357 case QETH_CARD_TYPE_OSM: 5358 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5359 if (rc) 5360 goto err_card; 5361 rc = card->discipline->setup(card->gdev); 5362 if (rc) 5363 goto err_disc; 5364 case QETH_CARD_TYPE_OSD: 5365 case QETH_CARD_TYPE_OSX: 5366 default: 5367 break; 5368 } 5369 5370 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5371 list_add_tail(&card->list, &qeth_core_card_list.list); 5372 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5373 5374 qeth_determine_capabilities(card); 5375 return 0; 5376 5377 err_disc: 5378 qeth_core_free_discipline(card); 5379 err_card: 5380 qeth_core_free_card(card); 5381 err_dev: 5382 put_device(dev); 5383 return rc; 5384 } 5385 5386 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5387 { 5388 unsigned long flags; 5389 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5390 5391 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5392 5393 if (card->discipline) { 5394 card->discipline->remove(gdev); 5395 qeth_core_free_discipline(card); 5396 } 5397 5398 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5399 list_del(&card->list); 5400 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5401 qeth_core_free_card(card); 5402 dev_set_drvdata(&gdev->dev, NULL); 5403 put_device(&gdev->dev); 5404 return; 5405 } 5406 5407 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5408 { 5409 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5410 int rc = 0; 5411 int def_discipline; 5412 5413 if (!card->discipline) { 5414 if (card->info.type == QETH_CARD_TYPE_IQD) 5415 def_discipline = QETH_DISCIPLINE_LAYER3; 5416 else 5417 def_discipline = QETH_DISCIPLINE_LAYER2; 5418 rc = qeth_core_load_discipline(card, def_discipline); 5419 if (rc) 5420 goto err; 5421 rc = card->discipline->setup(card->gdev); 5422 if (rc) 5423 goto err; 5424 } 5425 rc = card->discipline->set_online(gdev); 5426 err: 5427 return rc; 5428 } 5429 5430 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5431 { 5432 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5433 return card->discipline->set_offline(gdev); 5434 } 5435 5436 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5437 { 5438 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5439 if (card->discipline && card->discipline->shutdown) 5440 card->discipline->shutdown(gdev); 5441 } 5442 5443 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5444 { 5445 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5446 if (card->discipline && card->discipline->prepare) 5447 return card->discipline->prepare(gdev); 5448 return 0; 5449 } 5450 5451 static void qeth_core_complete(struct ccwgroup_device *gdev) 5452 { 5453 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5454 if (card->discipline && card->discipline->complete) 5455 card->discipline->complete(gdev); 5456 } 5457 5458 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5459 { 5460 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5461 if (card->discipline && card->discipline->freeze) 5462 return card->discipline->freeze(gdev); 5463 return 0; 5464 } 5465 5466 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5467 { 5468 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5469 if (card->discipline && card->discipline->thaw) 5470 return card->discipline->thaw(gdev); 5471 return 0; 5472 } 5473 5474 static int qeth_core_restore(struct ccwgroup_device *gdev) 5475 { 5476 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5477 if (card->discipline && card->discipline->restore) 5478 return card->discipline->restore(gdev); 5479 return 0; 5480 } 5481 5482 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5483 .driver = { 5484 .owner = THIS_MODULE, 5485 .name = "qeth", 5486 }, 5487 .setup = qeth_core_probe_device, 5488 .remove = qeth_core_remove_device, 5489 .set_online = qeth_core_set_online, 5490 .set_offline = qeth_core_set_offline, 5491 .shutdown = qeth_core_shutdown, 5492 .prepare = qeth_core_prepare, 5493 .complete = qeth_core_complete, 5494 .freeze = qeth_core_freeze, 5495 .thaw = qeth_core_thaw, 5496 .restore = qeth_core_restore, 5497 }; 5498 5499 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5500 const char *buf, size_t count) 5501 { 5502 int err; 5503 5504 err = ccwgroup_create_dev(qeth_core_root_dev, 5505 &qeth_core_ccwgroup_driver, 3, buf); 5506 5507 return err ? err : count; 5508 } 5509 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5510 5511 static struct attribute *qeth_drv_attrs[] = { 5512 &driver_attr_group.attr, 5513 NULL, 5514 }; 5515 static struct attribute_group qeth_drv_attr_group = { 5516 .attrs = qeth_drv_attrs, 5517 }; 5518 static const struct attribute_group *qeth_drv_attr_groups[] = { 5519 &qeth_drv_attr_group, 5520 NULL, 5521 }; 5522 5523 static struct { 5524 const char str[ETH_GSTRING_LEN]; 5525 } qeth_ethtool_stats_keys[] = { 5526 /* 0 */{"rx skbs"}, 5527 {"rx buffers"}, 5528 {"tx skbs"}, 5529 {"tx buffers"}, 5530 {"tx skbs no packing"}, 5531 {"tx buffers no packing"}, 5532 {"tx skbs packing"}, 5533 {"tx buffers packing"}, 5534 {"tx sg skbs"}, 5535 {"tx sg frags"}, 5536 /* 10 */{"rx sg skbs"}, 5537 {"rx sg frags"}, 5538 {"rx sg page allocs"}, 5539 {"tx large kbytes"}, 5540 {"tx large count"}, 5541 {"tx pk state ch n->p"}, 5542 {"tx pk state ch p->n"}, 5543 {"tx pk watermark low"}, 5544 {"tx pk watermark high"}, 5545 {"queue 0 buffer usage"}, 5546 /* 20 */{"queue 1 buffer usage"}, 5547 {"queue 2 buffer usage"}, 5548 {"queue 3 buffer usage"}, 5549 {"rx poll time"}, 5550 {"rx poll count"}, 5551 {"rx do_QDIO time"}, 5552 {"rx do_QDIO count"}, 5553 {"tx handler time"}, 5554 {"tx handler count"}, 5555 {"tx time"}, 5556 /* 30 */{"tx count"}, 5557 {"tx do_QDIO time"}, 5558 {"tx do_QDIO count"}, 5559 {"tx csum"}, 5560 {"tx lin"}, 5561 {"cq handler count"}, 5562 {"cq handler time"} 5563 }; 5564 5565 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5566 { 5567 switch (stringset) { 5568 case ETH_SS_STATS: 5569 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5570 default: 5571 return -EINVAL; 5572 } 5573 } 5574 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5575 5576 void qeth_core_get_ethtool_stats(struct net_device *dev, 5577 struct ethtool_stats *stats, u64 *data) 5578 { 5579 struct qeth_card *card = dev->ml_priv; 5580 data[0] = card->stats.rx_packets - 5581 card->perf_stats.initial_rx_packets; 5582 data[1] = card->perf_stats.bufs_rec; 5583 data[2] = card->stats.tx_packets - 5584 card->perf_stats.initial_tx_packets; 5585 data[3] = card->perf_stats.bufs_sent; 5586 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5587 - card->perf_stats.skbs_sent_pack; 5588 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5589 data[6] = card->perf_stats.skbs_sent_pack; 5590 data[7] = card->perf_stats.bufs_sent_pack; 5591 data[8] = card->perf_stats.sg_skbs_sent; 5592 data[9] = card->perf_stats.sg_frags_sent; 5593 data[10] = card->perf_stats.sg_skbs_rx; 5594 data[11] = card->perf_stats.sg_frags_rx; 5595 data[12] = card->perf_stats.sg_alloc_page_rx; 5596 data[13] = (card->perf_stats.large_send_bytes >> 10); 5597 data[14] = card->perf_stats.large_send_cnt; 5598 data[15] = card->perf_stats.sc_dp_p; 5599 data[16] = card->perf_stats.sc_p_dp; 5600 data[17] = QETH_LOW_WATERMARK_PACK; 5601 data[18] = QETH_HIGH_WATERMARK_PACK; 5602 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5603 data[20] = (card->qdio.no_out_queues > 1) ? 5604 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5605 data[21] = (card->qdio.no_out_queues > 2) ? 5606 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5607 data[22] = (card->qdio.no_out_queues > 3) ? 5608 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5609 data[23] = card->perf_stats.inbound_time; 5610 data[24] = card->perf_stats.inbound_cnt; 5611 data[25] = card->perf_stats.inbound_do_qdio_time; 5612 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5613 data[27] = card->perf_stats.outbound_handler_time; 5614 data[28] = card->perf_stats.outbound_handler_cnt; 5615 data[29] = card->perf_stats.outbound_time; 5616 data[30] = card->perf_stats.outbound_cnt; 5617 data[31] = card->perf_stats.outbound_do_qdio_time; 5618 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5619 data[33] = card->perf_stats.tx_csum; 5620 data[34] = card->perf_stats.tx_lin; 5621 data[35] = card->perf_stats.cq_cnt; 5622 data[36] = card->perf_stats.cq_time; 5623 } 5624 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5625 5626 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5627 { 5628 switch (stringset) { 5629 case ETH_SS_STATS: 5630 memcpy(data, &qeth_ethtool_stats_keys, 5631 sizeof(qeth_ethtool_stats_keys)); 5632 break; 5633 default: 5634 WARN_ON(1); 5635 break; 5636 } 5637 } 5638 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5639 5640 void qeth_core_get_drvinfo(struct net_device *dev, 5641 struct ethtool_drvinfo *info) 5642 { 5643 struct qeth_card *card = dev->ml_priv; 5644 5645 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5646 sizeof(info->driver)); 5647 strlcpy(info->version, "1.0", sizeof(info->version)); 5648 strlcpy(info->fw_version, card->info.mcl_level, 5649 sizeof(info->fw_version)); 5650 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5651 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5652 } 5653 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5654 5655 /* Helper function to fill 'advertizing' and 'supported' which are the same. */ 5656 /* Autoneg and full-duplex are supported and advertized uncondionally. */ 5657 /* Always advertize and support all speeds up to specified, and only one */ 5658 /* specified port type. */ 5659 static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd, 5660 int maxspeed, int porttype) 5661 { 5662 int port_sup, port_adv, spd_sup, spd_adv; 5663 5664 switch (porttype) { 5665 case PORT_TP: 5666 port_sup = SUPPORTED_TP; 5667 port_adv = ADVERTISED_TP; 5668 break; 5669 case PORT_FIBRE: 5670 port_sup = SUPPORTED_FIBRE; 5671 port_adv = ADVERTISED_FIBRE; 5672 break; 5673 default: 5674 port_sup = SUPPORTED_TP; 5675 port_adv = ADVERTISED_TP; 5676 WARN_ON_ONCE(1); 5677 } 5678 5679 /* "Fallthrough" case'es ordered from high to low result in setting */ 5680 /* flags cumulatively, starting from the specified speed and down to */ 5681 /* the lowest possible. */ 5682 spd_sup = 0; 5683 spd_adv = 0; 5684 switch (maxspeed) { 5685 case SPEED_10000: 5686 spd_sup |= SUPPORTED_10000baseT_Full; 5687 spd_adv |= ADVERTISED_10000baseT_Full; 5688 case SPEED_1000: 5689 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; 5690 spd_adv |= ADVERTISED_1000baseT_Half | 5691 ADVERTISED_1000baseT_Full; 5692 case SPEED_100: 5693 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full; 5694 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; 5695 case SPEED_10: 5696 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5697 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5698 break; 5699 default: 5700 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5701 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5702 WARN_ON_ONCE(1); 5703 } 5704 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv; 5705 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup; 5706 } 5707 5708 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5709 struct ethtool_cmd *ecmd) 5710 { 5711 struct qeth_card *card = netdev->ml_priv; 5712 enum qeth_link_types link_type; 5713 struct carrier_info carrier_info; 5714 5715 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5716 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5717 else 5718 link_type = card->info.link_type; 5719 5720 ecmd->transceiver = XCVR_INTERNAL; 5721 ecmd->duplex = DUPLEX_FULL; 5722 ecmd->autoneg = AUTONEG_ENABLE; 5723 5724 switch (link_type) { 5725 case QETH_LINK_TYPE_FAST_ETH: 5726 case QETH_LINK_TYPE_LANE_ETH100: 5727 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP); 5728 ecmd->speed = SPEED_100; 5729 ecmd->port = PORT_TP; 5730 break; 5731 5732 case QETH_LINK_TYPE_GBIT_ETH: 5733 case QETH_LINK_TYPE_LANE_ETH1000: 5734 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5735 ecmd->speed = SPEED_1000; 5736 ecmd->port = PORT_FIBRE; 5737 break; 5738 5739 case QETH_LINK_TYPE_10GBIT_ETH: 5740 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5741 ecmd->speed = SPEED_10000; 5742 ecmd->port = PORT_FIBRE; 5743 break; 5744 5745 default: 5746 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP); 5747 ecmd->speed = SPEED_10; 5748 ecmd->port = PORT_TP; 5749 } 5750 5751 /* Check if we can obtain more accurate information. */ 5752 /* If QUERY_CARD_INFO command is not supported or fails, */ 5753 /* just return the heuristics that was filled above. */ 5754 if (qeth_query_card_info(card, &carrier_info) != 0) 5755 return 0; 5756 5757 netdev_dbg(netdev, 5758 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 5759 carrier_info.card_type, 5760 carrier_info.port_mode, 5761 carrier_info.port_speed); 5762 5763 /* Update attributes for which we've obtained more authoritative */ 5764 /* information, leave the rest the way they where filled above. */ 5765 switch (carrier_info.card_type) { 5766 case CARD_INFO_TYPE_1G_COPPER_A: 5767 case CARD_INFO_TYPE_1G_COPPER_B: 5768 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP); 5769 ecmd->port = PORT_TP; 5770 break; 5771 case CARD_INFO_TYPE_1G_FIBRE_A: 5772 case CARD_INFO_TYPE_1G_FIBRE_B: 5773 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5774 ecmd->port = PORT_FIBRE; 5775 break; 5776 case CARD_INFO_TYPE_10G_FIBRE_A: 5777 case CARD_INFO_TYPE_10G_FIBRE_B: 5778 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5779 ecmd->port = PORT_FIBRE; 5780 break; 5781 } 5782 5783 switch (carrier_info.port_mode) { 5784 case CARD_INFO_PORTM_FULLDUPLEX: 5785 ecmd->duplex = DUPLEX_FULL; 5786 break; 5787 case CARD_INFO_PORTM_HALFDUPLEX: 5788 ecmd->duplex = DUPLEX_HALF; 5789 break; 5790 } 5791 5792 switch (carrier_info.port_speed) { 5793 case CARD_INFO_PORTS_10M: 5794 ecmd->speed = SPEED_10; 5795 break; 5796 case CARD_INFO_PORTS_100M: 5797 ecmd->speed = SPEED_100; 5798 break; 5799 case CARD_INFO_PORTS_1G: 5800 ecmd->speed = SPEED_1000; 5801 break; 5802 case CARD_INFO_PORTS_10G: 5803 ecmd->speed = SPEED_10000; 5804 break; 5805 } 5806 5807 return 0; 5808 } 5809 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5810 5811 static int __init qeth_core_init(void) 5812 { 5813 int rc; 5814 5815 pr_info("loading core functions\n"); 5816 INIT_LIST_HEAD(&qeth_core_card_list.list); 5817 INIT_LIST_HEAD(&qeth_dbf_list); 5818 rwlock_init(&qeth_core_card_list.rwlock); 5819 mutex_init(&qeth_mod_mutex); 5820 5821 qeth_wq = create_singlethread_workqueue("qeth_wq"); 5822 5823 rc = qeth_register_dbf_views(); 5824 if (rc) 5825 goto out_err; 5826 qeth_core_root_dev = root_device_register("qeth"); 5827 rc = PTR_RET(qeth_core_root_dev); 5828 if (rc) 5829 goto register_err; 5830 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5831 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5832 if (!qeth_core_header_cache) { 5833 rc = -ENOMEM; 5834 goto slab_err; 5835 } 5836 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5837 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5838 if (!qeth_qdio_outbuf_cache) { 5839 rc = -ENOMEM; 5840 goto cqslab_err; 5841 } 5842 rc = ccw_driver_register(&qeth_ccw_driver); 5843 if (rc) 5844 goto ccw_err; 5845 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5846 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5847 if (rc) 5848 goto ccwgroup_err; 5849 5850 return 0; 5851 5852 ccwgroup_err: 5853 ccw_driver_unregister(&qeth_ccw_driver); 5854 ccw_err: 5855 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5856 cqslab_err: 5857 kmem_cache_destroy(qeth_core_header_cache); 5858 slab_err: 5859 root_device_unregister(qeth_core_root_dev); 5860 register_err: 5861 qeth_unregister_dbf_views(); 5862 out_err: 5863 pr_err("Initializing the qeth device driver failed\n"); 5864 return rc; 5865 } 5866 5867 static void __exit qeth_core_exit(void) 5868 { 5869 qeth_clear_dbf_list(); 5870 destroy_workqueue(qeth_wq); 5871 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5872 ccw_driver_unregister(&qeth_ccw_driver); 5873 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5874 kmem_cache_destroy(qeth_core_header_cache); 5875 root_device_unregister(qeth_core_root_dev); 5876 qeth_unregister_dbf_views(); 5877 pr_info("core functions removed\n"); 5878 } 5879 5880 module_init(qeth_core_init); 5881 module_exit(qeth_core_exit); 5882 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5883 MODULE_DESCRIPTION("qeth core functions"); 5884 MODULE_LICENSE("GPL"); 5885