1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/io.h> 26 27 #include "qeth_core.h" 28 29 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 30 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 31 /* N P A M L V H */ 32 [QETH_DBF_SETUP] = {"qeth_setup", 33 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 34 [QETH_DBF_QERR] = {"qeth_qerr", 35 2, 1, 8, 2, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_TRACE] = {"qeth_trace", 37 4, 1, 8, 3, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 39 8, 1, 128, 3, &debug_sprintf_view, NULL}, 40 [QETH_DBF_SENSE] = {"qeth_sense", 41 2, 1, 64, 2, &debug_hex_ascii_view, NULL}, 42 [QETH_DBF_MISC] = {"qeth_misc", 43 2, 1, 256, 2, &debug_hex_ascii_view, NULL}, 44 [QETH_DBF_CTRL] = {"qeth_control", 45 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 46 }; 47 EXPORT_SYMBOL_GPL(qeth_dbf); 48 49 struct qeth_card_list_struct qeth_core_card_list; 50 EXPORT_SYMBOL_GPL(qeth_core_card_list); 51 struct kmem_cache *qeth_core_header_cache; 52 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 53 54 static struct device *qeth_core_root_dev; 55 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY; 56 static struct lock_class_key qdio_out_skb_queue_key; 57 58 static void qeth_send_control_data_cb(struct qeth_channel *, 59 struct qeth_cmd_buffer *); 60 static int qeth_issue_next_read(struct qeth_card *); 61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 63 static void qeth_free_buffer_pool(struct qeth_card *); 64 static int qeth_qdio_establish(struct qeth_card *); 65 66 67 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb, 68 struct qdio_buffer *buffer, int is_tso, 69 int *next_element_to_fill) 70 { 71 struct skb_frag_struct *frag; 72 int fragno; 73 unsigned long addr; 74 int element, cnt, dlen; 75 76 fragno = skb_shinfo(skb)->nr_frags; 77 element = *next_element_to_fill; 78 dlen = 0; 79 80 if (is_tso) 81 buffer->element[element].flags = 82 SBAL_FLAGS_MIDDLE_FRAG; 83 else 84 buffer->element[element].flags = 85 SBAL_FLAGS_FIRST_FRAG; 86 dlen = skb->len - skb->data_len; 87 if (dlen) { 88 buffer->element[element].addr = skb->data; 89 buffer->element[element].length = dlen; 90 element++; 91 } 92 for (cnt = 0; cnt < fragno; cnt++) { 93 frag = &skb_shinfo(skb)->frags[cnt]; 94 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) + 95 frag->page_offset; 96 buffer->element[element].addr = (char *)addr; 97 buffer->element[element].length = frag->size; 98 if (cnt < (fragno - 1)) 99 buffer->element[element].flags = 100 SBAL_FLAGS_MIDDLE_FRAG; 101 else 102 buffer->element[element].flags = 103 SBAL_FLAGS_LAST_FRAG; 104 element++; 105 } 106 *next_element_to_fill = element; 107 } 108 109 static inline const char *qeth_get_cardname(struct qeth_card *card) 110 { 111 if (card->info.guestlan) { 112 switch (card->info.type) { 113 case QETH_CARD_TYPE_OSAE: 114 return " Guest LAN QDIO"; 115 case QETH_CARD_TYPE_IQD: 116 return " Guest LAN Hiper"; 117 default: 118 return " unknown"; 119 } 120 } else { 121 switch (card->info.type) { 122 case QETH_CARD_TYPE_OSAE: 123 return " OSD Express"; 124 case QETH_CARD_TYPE_IQD: 125 return " HiperSockets"; 126 case QETH_CARD_TYPE_OSN: 127 return " OSN QDIO"; 128 default: 129 return " unknown"; 130 } 131 } 132 return " n/a"; 133 } 134 135 /* max length to be returned: 14 */ 136 const char *qeth_get_cardname_short(struct qeth_card *card) 137 { 138 if (card->info.guestlan) { 139 switch (card->info.type) { 140 case QETH_CARD_TYPE_OSAE: 141 return "GuestLAN QDIO"; 142 case QETH_CARD_TYPE_IQD: 143 return "GuestLAN Hiper"; 144 default: 145 return "unknown"; 146 } 147 } else { 148 switch (card->info.type) { 149 case QETH_CARD_TYPE_OSAE: 150 switch (card->info.link_type) { 151 case QETH_LINK_TYPE_FAST_ETH: 152 return "OSD_100"; 153 case QETH_LINK_TYPE_HSTR: 154 return "HSTR"; 155 case QETH_LINK_TYPE_GBIT_ETH: 156 return "OSD_1000"; 157 case QETH_LINK_TYPE_10GBIT_ETH: 158 return "OSD_10GIG"; 159 case QETH_LINK_TYPE_LANE_ETH100: 160 return "OSD_FE_LANE"; 161 case QETH_LINK_TYPE_LANE_TR: 162 return "OSD_TR_LANE"; 163 case QETH_LINK_TYPE_LANE_ETH1000: 164 return "OSD_GbE_LANE"; 165 case QETH_LINK_TYPE_LANE: 166 return "OSD_ATM_LANE"; 167 default: 168 return "OSD_Express"; 169 } 170 case QETH_CARD_TYPE_IQD: 171 return "HiperSockets"; 172 case QETH_CARD_TYPE_OSN: 173 return "OSN"; 174 default: 175 return "unknown"; 176 } 177 } 178 return "n/a"; 179 } 180 181 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 182 int clear_start_mask) 183 { 184 unsigned long flags; 185 186 spin_lock_irqsave(&card->thread_mask_lock, flags); 187 card->thread_allowed_mask = threads; 188 if (clear_start_mask) 189 card->thread_start_mask &= threads; 190 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 191 wake_up(&card->wait_q); 192 } 193 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 194 195 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 196 { 197 unsigned long flags; 198 int rc = 0; 199 200 spin_lock_irqsave(&card->thread_mask_lock, flags); 201 rc = (card->thread_running_mask & threads); 202 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 203 return rc; 204 } 205 EXPORT_SYMBOL_GPL(qeth_threads_running); 206 207 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 208 { 209 return wait_event_interruptible(card->wait_q, 210 qeth_threads_running(card, threads) == 0); 211 } 212 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 213 214 void qeth_clear_working_pool_list(struct qeth_card *card) 215 { 216 struct qeth_buffer_pool_entry *pool_entry, *tmp; 217 218 QETH_DBF_TEXT(TRACE, 5, "clwrklst"); 219 list_for_each_entry_safe(pool_entry, tmp, 220 &card->qdio.in_buf_pool.entry_list, list){ 221 list_del(&pool_entry->list); 222 } 223 } 224 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 225 226 static int qeth_alloc_buffer_pool(struct qeth_card *card) 227 { 228 struct qeth_buffer_pool_entry *pool_entry; 229 void *ptr; 230 int i, j; 231 232 QETH_DBF_TEXT(TRACE, 5, "alocpool"); 233 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 234 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 235 if (!pool_entry) { 236 qeth_free_buffer_pool(card); 237 return -ENOMEM; 238 } 239 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 240 ptr = (void *) __get_free_page(GFP_KERNEL); 241 if (!ptr) { 242 while (j > 0) 243 free_page((unsigned long) 244 pool_entry->elements[--j]); 245 kfree(pool_entry); 246 qeth_free_buffer_pool(card); 247 return -ENOMEM; 248 } 249 pool_entry->elements[j] = ptr; 250 } 251 list_add(&pool_entry->init_list, 252 &card->qdio.init_pool.entry_list); 253 } 254 return 0; 255 } 256 257 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 258 { 259 QETH_DBF_TEXT(TRACE, 2, "realcbp"); 260 261 if ((card->state != CARD_STATE_DOWN) && 262 (card->state != CARD_STATE_RECOVER)) 263 return -EPERM; 264 265 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 266 qeth_clear_working_pool_list(card); 267 qeth_free_buffer_pool(card); 268 card->qdio.in_buf_pool.buf_count = bufcnt; 269 card->qdio.init_pool.buf_count = bufcnt; 270 return qeth_alloc_buffer_pool(card); 271 } 272 273 static int qeth_issue_next_read(struct qeth_card *card) 274 { 275 int rc; 276 struct qeth_cmd_buffer *iob; 277 278 QETH_DBF_TEXT(TRACE, 5, "issnxrd"); 279 if (card->read.state != CH_STATE_UP) 280 return -EIO; 281 iob = qeth_get_buffer(&card->read); 282 if (!iob) { 283 dev_warn(&card->gdev->dev, "The qeth device driver " 284 "failed to recover an error on the device\n"); 285 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 286 "available\n", dev_name(&card->gdev->dev)); 287 return -ENOMEM; 288 } 289 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 290 QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); 291 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 292 (addr_t) iob, 0, 0); 293 if (rc) { 294 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 295 "rc=%i\n", dev_name(&card->gdev->dev), rc); 296 atomic_set(&card->read.irq_pending, 0); 297 qeth_schedule_recovery(card); 298 wake_up(&card->wait_q); 299 } 300 return rc; 301 } 302 303 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 304 { 305 struct qeth_reply *reply; 306 307 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 308 if (reply) { 309 atomic_set(&reply->refcnt, 1); 310 atomic_set(&reply->received, 0); 311 reply->card = card; 312 }; 313 return reply; 314 } 315 316 static void qeth_get_reply(struct qeth_reply *reply) 317 { 318 WARN_ON(atomic_read(&reply->refcnt) <= 0); 319 atomic_inc(&reply->refcnt); 320 } 321 322 static void qeth_put_reply(struct qeth_reply *reply) 323 { 324 WARN_ON(atomic_read(&reply->refcnt) <= 0); 325 if (atomic_dec_and_test(&reply->refcnt)) 326 kfree(reply); 327 } 328 329 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 330 struct qeth_card *card) 331 { 332 char *ipa_name; 333 int com = cmd->hdr.command; 334 ipa_name = qeth_get_ipa_cmd_name(com); 335 if (rc) 336 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n", 337 ipa_name, com, QETH_CARD_IFNAME(card), 338 rc, qeth_get_ipa_msg(rc)); 339 else 340 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n", 341 ipa_name, com, QETH_CARD_IFNAME(card)); 342 } 343 344 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 345 struct qeth_cmd_buffer *iob) 346 { 347 struct qeth_ipa_cmd *cmd = NULL; 348 349 QETH_DBF_TEXT(TRACE, 5, "chkipad"); 350 if (IS_IPA(iob->data)) { 351 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 352 if (IS_IPA_REPLY(cmd)) { 353 if (cmd->hdr.command < IPA_CMD_SETCCID || 354 cmd->hdr.command > IPA_CMD_MODCCID) 355 qeth_issue_ipa_msg(cmd, 356 cmd->hdr.return_code, card); 357 return cmd; 358 } else { 359 switch (cmd->hdr.command) { 360 case IPA_CMD_STOPLAN: 361 dev_warn(&card->gdev->dev, 362 "The link for interface %s on CHPID" 363 " 0x%X failed\n", 364 QETH_CARD_IFNAME(card), 365 card->info.chpid); 366 card->lan_online = 0; 367 if (card->dev && netif_carrier_ok(card->dev)) 368 netif_carrier_off(card->dev); 369 return NULL; 370 case IPA_CMD_STARTLAN: 371 dev_info(&card->gdev->dev, 372 "The link for %s on CHPID 0x%X has" 373 " been restored\n", 374 QETH_CARD_IFNAME(card), 375 card->info.chpid); 376 netif_carrier_on(card->dev); 377 card->lan_online = 1; 378 qeth_schedule_recovery(card); 379 return NULL; 380 case IPA_CMD_MODCCID: 381 return cmd; 382 case IPA_CMD_REGISTER_LOCAL_ADDR: 383 QETH_DBF_TEXT(TRACE, 3, "irla"); 384 break; 385 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 386 QETH_DBF_TEXT(TRACE, 3, "urla"); 387 break; 388 default: 389 QETH_DBF_MESSAGE(2, "Received data is IPA " 390 "but not a reply!\n"); 391 break; 392 } 393 } 394 } 395 return cmd; 396 } 397 398 void qeth_clear_ipacmd_list(struct qeth_card *card) 399 { 400 struct qeth_reply *reply, *r; 401 unsigned long flags; 402 403 QETH_DBF_TEXT(TRACE, 4, "clipalst"); 404 405 spin_lock_irqsave(&card->lock, flags); 406 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 407 qeth_get_reply(reply); 408 reply->rc = -EIO; 409 atomic_inc(&reply->received); 410 list_del_init(&reply->list); 411 wake_up(&reply->wait_q); 412 qeth_put_reply(reply); 413 } 414 spin_unlock_irqrestore(&card->lock, flags); 415 } 416 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 417 418 static int qeth_check_idx_response(unsigned char *buffer) 419 { 420 if (!buffer) 421 return 0; 422 423 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 424 if ((buffer[2] & 0xc0) == 0xc0) { 425 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 426 "with cause code 0x%02x%s\n", 427 buffer[4], 428 ((buffer[4] == 0x22) ? 429 " -- try another portname" : "")); 430 QETH_DBF_TEXT(TRACE, 2, "ckidxres"); 431 QETH_DBF_TEXT(TRACE, 2, " idxterm"); 432 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); 433 return -EIO; 434 } 435 return 0; 436 } 437 438 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 439 __u32 len) 440 { 441 struct qeth_card *card; 442 443 QETH_DBF_TEXT(TRACE, 4, "setupccw"); 444 card = CARD_FROM_CDEV(channel->ccwdev); 445 if (channel == &card->read) 446 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 447 else 448 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 449 channel->ccw.count = len; 450 channel->ccw.cda = (__u32) __pa(iob); 451 } 452 453 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 454 { 455 __u8 index; 456 457 QETH_DBF_TEXT(TRACE, 6, "getbuff"); 458 index = channel->io_buf_no; 459 do { 460 if (channel->iob[index].state == BUF_STATE_FREE) { 461 channel->iob[index].state = BUF_STATE_LOCKED; 462 channel->io_buf_no = (channel->io_buf_no + 1) % 463 QETH_CMD_BUFFER_NO; 464 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 465 return channel->iob + index; 466 } 467 index = (index + 1) % QETH_CMD_BUFFER_NO; 468 } while (index != channel->io_buf_no); 469 470 return NULL; 471 } 472 473 void qeth_release_buffer(struct qeth_channel *channel, 474 struct qeth_cmd_buffer *iob) 475 { 476 unsigned long flags; 477 478 QETH_DBF_TEXT(TRACE, 6, "relbuff"); 479 spin_lock_irqsave(&channel->iob_lock, flags); 480 memset(iob->data, 0, QETH_BUFSIZE); 481 iob->state = BUF_STATE_FREE; 482 iob->callback = qeth_send_control_data_cb; 483 iob->rc = 0; 484 spin_unlock_irqrestore(&channel->iob_lock, flags); 485 } 486 EXPORT_SYMBOL_GPL(qeth_release_buffer); 487 488 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 489 { 490 struct qeth_cmd_buffer *buffer = NULL; 491 unsigned long flags; 492 493 spin_lock_irqsave(&channel->iob_lock, flags); 494 buffer = __qeth_get_buffer(channel); 495 spin_unlock_irqrestore(&channel->iob_lock, flags); 496 return buffer; 497 } 498 499 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 500 { 501 struct qeth_cmd_buffer *buffer; 502 wait_event(channel->wait_q, 503 ((buffer = qeth_get_buffer(channel)) != NULL)); 504 return buffer; 505 } 506 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 507 508 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 509 { 510 int cnt; 511 512 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 513 qeth_release_buffer(channel, &channel->iob[cnt]); 514 channel->buf_no = 0; 515 channel->io_buf_no = 0; 516 } 517 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 518 519 static void qeth_send_control_data_cb(struct qeth_channel *channel, 520 struct qeth_cmd_buffer *iob) 521 { 522 struct qeth_card *card; 523 struct qeth_reply *reply, *r; 524 struct qeth_ipa_cmd *cmd; 525 unsigned long flags; 526 int keep_reply; 527 528 QETH_DBF_TEXT(TRACE, 4, "sndctlcb"); 529 530 card = CARD_FROM_CDEV(channel->ccwdev); 531 if (qeth_check_idx_response(iob->data)) { 532 qeth_clear_ipacmd_list(card); 533 if (((iob->data[2] & 0xc0) == 0xc0) && iob->data[4] == 0xf6) 534 dev_err(&card->gdev->dev, 535 "The qeth device is not configured " 536 "for the OSI layer required by z/VM\n"); 537 qeth_schedule_recovery(card); 538 goto out; 539 } 540 541 cmd = qeth_check_ipa_data(card, iob); 542 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 543 goto out; 544 /*in case of OSN : check if cmd is set */ 545 if (card->info.type == QETH_CARD_TYPE_OSN && 546 cmd && 547 cmd->hdr.command != IPA_CMD_STARTLAN && 548 card->osn_info.assist_cb != NULL) { 549 card->osn_info.assist_cb(card->dev, cmd); 550 goto out; 551 } 552 553 spin_lock_irqsave(&card->lock, flags); 554 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 555 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 556 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 557 qeth_get_reply(reply); 558 list_del_init(&reply->list); 559 spin_unlock_irqrestore(&card->lock, flags); 560 keep_reply = 0; 561 if (reply->callback != NULL) { 562 if (cmd) { 563 reply->offset = (__u16)((char *)cmd - 564 (char *)iob->data); 565 keep_reply = reply->callback(card, 566 reply, 567 (unsigned long)cmd); 568 } else 569 keep_reply = reply->callback(card, 570 reply, 571 (unsigned long)iob); 572 } 573 if (cmd) 574 reply->rc = (u16) cmd->hdr.return_code; 575 else if (iob->rc) 576 reply->rc = iob->rc; 577 if (keep_reply) { 578 spin_lock_irqsave(&card->lock, flags); 579 list_add_tail(&reply->list, 580 &card->cmd_waiter_list); 581 spin_unlock_irqrestore(&card->lock, flags); 582 } else { 583 atomic_inc(&reply->received); 584 wake_up(&reply->wait_q); 585 } 586 qeth_put_reply(reply); 587 goto out; 588 } 589 } 590 spin_unlock_irqrestore(&card->lock, flags); 591 out: 592 memcpy(&card->seqno.pdu_hdr_ack, 593 QETH_PDU_HEADER_SEQ_NO(iob->data), 594 QETH_SEQ_NO_LENGTH); 595 qeth_release_buffer(channel, iob); 596 } 597 598 static int qeth_setup_channel(struct qeth_channel *channel) 599 { 600 int cnt; 601 602 QETH_DBF_TEXT(SETUP, 2, "setupch"); 603 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 604 channel->iob[cnt].data = (char *) 605 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 606 if (channel->iob[cnt].data == NULL) 607 break; 608 channel->iob[cnt].state = BUF_STATE_FREE; 609 channel->iob[cnt].channel = channel; 610 channel->iob[cnt].callback = qeth_send_control_data_cb; 611 channel->iob[cnt].rc = 0; 612 } 613 if (cnt < QETH_CMD_BUFFER_NO) { 614 while (cnt-- > 0) 615 kfree(channel->iob[cnt].data); 616 return -ENOMEM; 617 } 618 channel->buf_no = 0; 619 channel->io_buf_no = 0; 620 atomic_set(&channel->irq_pending, 0); 621 spin_lock_init(&channel->iob_lock); 622 623 init_waitqueue_head(&channel->wait_q); 624 return 0; 625 } 626 627 static int qeth_set_thread_start_bit(struct qeth_card *card, 628 unsigned long thread) 629 { 630 unsigned long flags; 631 632 spin_lock_irqsave(&card->thread_mask_lock, flags); 633 if (!(card->thread_allowed_mask & thread) || 634 (card->thread_start_mask & thread)) { 635 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 636 return -EPERM; 637 } 638 card->thread_start_mask |= thread; 639 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 640 return 0; 641 } 642 643 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 644 { 645 unsigned long flags; 646 647 spin_lock_irqsave(&card->thread_mask_lock, flags); 648 card->thread_start_mask &= ~thread; 649 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 650 wake_up(&card->wait_q); 651 } 652 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 653 654 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 655 { 656 unsigned long flags; 657 658 spin_lock_irqsave(&card->thread_mask_lock, flags); 659 card->thread_running_mask &= ~thread; 660 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 661 wake_up(&card->wait_q); 662 } 663 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 664 665 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 666 { 667 unsigned long flags; 668 int rc = 0; 669 670 spin_lock_irqsave(&card->thread_mask_lock, flags); 671 if (card->thread_start_mask & thread) { 672 if ((card->thread_allowed_mask & thread) && 673 !(card->thread_running_mask & thread)) { 674 rc = 1; 675 card->thread_start_mask &= ~thread; 676 card->thread_running_mask |= thread; 677 } else 678 rc = -EPERM; 679 } 680 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 681 return rc; 682 } 683 684 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 685 { 686 int rc = 0; 687 688 wait_event(card->wait_q, 689 (rc = __qeth_do_run_thread(card, thread)) >= 0); 690 return rc; 691 } 692 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 693 694 void qeth_schedule_recovery(struct qeth_card *card) 695 { 696 QETH_DBF_TEXT(TRACE, 2, "startrec"); 697 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 698 schedule_work(&card->kernel_thread_starter); 699 } 700 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 701 702 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 703 { 704 int dstat, cstat; 705 char *sense; 706 707 sense = (char *) irb->ecw; 708 cstat = irb->scsw.cmd.cstat; 709 dstat = irb->scsw.cmd.dstat; 710 711 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 712 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 713 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 714 QETH_DBF_TEXT(TRACE, 2, "CGENCHK"); 715 dev_warn(&cdev->dev, "The qeth device driver " 716 "failed to recover an error on the device\n"); 717 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ", 718 dev_name(&cdev->dev), dstat, cstat); 719 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 720 16, 1, irb, 64, 1); 721 return 1; 722 } 723 724 if (dstat & DEV_STAT_UNIT_CHECK) { 725 if (sense[SENSE_RESETTING_EVENT_BYTE] & 726 SENSE_RESETTING_EVENT_FLAG) { 727 QETH_DBF_TEXT(TRACE, 2, "REVIND"); 728 return 1; 729 } 730 if (sense[SENSE_COMMAND_REJECT_BYTE] & 731 SENSE_COMMAND_REJECT_FLAG) { 732 QETH_DBF_TEXT(TRACE, 2, "CMDREJi"); 733 return 1; 734 } 735 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 736 QETH_DBF_TEXT(TRACE, 2, "AFFE"); 737 return 1; 738 } 739 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 740 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN"); 741 return 0; 742 } 743 QETH_DBF_TEXT(TRACE, 2, "DGENCHK"); 744 return 1; 745 } 746 return 0; 747 } 748 749 static long __qeth_check_irb_error(struct ccw_device *cdev, 750 unsigned long intparm, struct irb *irb) 751 { 752 if (!IS_ERR(irb)) 753 return 0; 754 755 switch (PTR_ERR(irb)) { 756 case -EIO: 757 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 758 dev_name(&cdev->dev)); 759 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 760 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO); 761 break; 762 case -ETIMEDOUT: 763 dev_warn(&cdev->dev, "A hardware operation timed out" 764 " on the device\n"); 765 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 766 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT); 767 if (intparm == QETH_RCD_PARM) { 768 struct qeth_card *card = CARD_FROM_CDEV(cdev); 769 770 if (card && (card->data.ccwdev == cdev)) { 771 card->data.state = CH_STATE_DOWN; 772 wake_up(&card->wait_q); 773 } 774 } 775 break; 776 default: 777 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 778 dev_name(&cdev->dev), PTR_ERR(irb)); 779 QETH_DBF_TEXT(TRACE, 2, "ckirberr"); 780 QETH_DBF_TEXT(TRACE, 2, " rc???"); 781 } 782 return PTR_ERR(irb); 783 } 784 785 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 786 struct irb *irb) 787 { 788 int rc; 789 int cstat, dstat; 790 struct qeth_cmd_buffer *buffer; 791 struct qeth_channel *channel; 792 struct qeth_card *card; 793 struct qeth_cmd_buffer *iob; 794 __u8 index; 795 796 QETH_DBF_TEXT(TRACE, 5, "irq"); 797 798 if (__qeth_check_irb_error(cdev, intparm, irb)) 799 return; 800 cstat = irb->scsw.cmd.cstat; 801 dstat = irb->scsw.cmd.dstat; 802 803 card = CARD_FROM_CDEV(cdev); 804 if (!card) 805 return; 806 807 if (card->read.ccwdev == cdev) { 808 channel = &card->read; 809 QETH_DBF_TEXT(TRACE, 5, "read"); 810 } else if (card->write.ccwdev == cdev) { 811 channel = &card->write; 812 QETH_DBF_TEXT(TRACE, 5, "write"); 813 } else { 814 channel = &card->data; 815 QETH_DBF_TEXT(TRACE, 5, "data"); 816 } 817 atomic_set(&channel->irq_pending, 0); 818 819 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 820 channel->state = CH_STATE_STOPPED; 821 822 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 823 channel->state = CH_STATE_HALTED; 824 825 /*let's wake up immediately on data channel*/ 826 if ((channel == &card->data) && (intparm != 0) && 827 (intparm != QETH_RCD_PARM)) 828 goto out; 829 830 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 831 QETH_DBF_TEXT(TRACE, 6, "clrchpar"); 832 /* we don't have to handle this further */ 833 intparm = 0; 834 } 835 if (intparm == QETH_HALT_CHANNEL_PARM) { 836 QETH_DBF_TEXT(TRACE, 6, "hltchpar"); 837 /* we don't have to handle this further */ 838 intparm = 0; 839 } 840 if ((dstat & DEV_STAT_UNIT_EXCEP) || 841 (dstat & DEV_STAT_UNIT_CHECK) || 842 (cstat)) { 843 if (irb->esw.esw0.erw.cons) { 844 dev_warn(&channel->ccwdev->dev, 845 "The qeth device driver failed to recover " 846 "an error on the device\n"); 847 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 848 "0x%X dstat 0x%X\n", 849 dev_name(&channel->ccwdev->dev), cstat, dstat); 850 print_hex_dump(KERN_WARNING, "qeth: irb ", 851 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 852 print_hex_dump(KERN_WARNING, "qeth: sense data ", 853 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 854 } 855 if (intparm == QETH_RCD_PARM) { 856 channel->state = CH_STATE_DOWN; 857 goto out; 858 } 859 rc = qeth_get_problem(cdev, irb); 860 if (rc) { 861 qeth_clear_ipacmd_list(card); 862 qeth_schedule_recovery(card); 863 goto out; 864 } 865 } 866 867 if (intparm == QETH_RCD_PARM) { 868 channel->state = CH_STATE_RCD_DONE; 869 goto out; 870 } 871 if (intparm) { 872 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 873 buffer->state = BUF_STATE_PROCESSED; 874 } 875 if (channel == &card->data) 876 return; 877 if (channel == &card->read && 878 channel->state == CH_STATE_UP) 879 qeth_issue_next_read(card); 880 881 iob = channel->iob; 882 index = channel->buf_no; 883 while (iob[index].state == BUF_STATE_PROCESSED) { 884 if (iob[index].callback != NULL) 885 iob[index].callback(channel, iob + index); 886 887 index = (index + 1) % QETH_CMD_BUFFER_NO; 888 } 889 channel->buf_no = index; 890 out: 891 wake_up(&card->wait_q); 892 return; 893 } 894 895 static void __qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 896 struct qeth_qdio_out_buffer *buf, unsigned int qeth_skip_skb) 897 { 898 int i; 899 struct sk_buff *skb; 900 901 /* is PCI flag set on buffer? */ 902 if (buf->buffer->element[0].flags & 0x40) 903 atomic_dec(&queue->set_pci_flags_count); 904 905 if (!qeth_skip_skb) { 906 skb = skb_dequeue(&buf->skb_list); 907 while (skb) { 908 atomic_dec(&skb->users); 909 dev_kfree_skb_any(skb); 910 skb = skb_dequeue(&buf->skb_list); 911 } 912 } 913 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 914 if (buf->buffer->element[i].addr && buf->is_header[i]) 915 kmem_cache_free(qeth_core_header_cache, 916 buf->buffer->element[i].addr); 917 buf->is_header[i] = 0; 918 buf->buffer->element[i].length = 0; 919 buf->buffer->element[i].addr = NULL; 920 buf->buffer->element[i].flags = 0; 921 } 922 buf->buffer->element[15].flags = 0; 923 buf->next_element_to_fill = 0; 924 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 925 } 926 927 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 928 struct qeth_qdio_out_buffer *buf) 929 { 930 __qeth_clear_output_buffer(queue, buf, 0); 931 } 932 933 void qeth_clear_qdio_buffers(struct qeth_card *card) 934 { 935 int i, j; 936 937 QETH_DBF_TEXT(TRACE, 2, "clearqdbf"); 938 /* clear outbound buffers to free skbs */ 939 for (i = 0; i < card->qdio.no_out_queues; ++i) 940 if (card->qdio.out_qs[i]) { 941 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 942 qeth_clear_output_buffer(card->qdio.out_qs[i], 943 &card->qdio.out_qs[i]->bufs[j]); 944 } 945 } 946 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 947 948 static void qeth_free_buffer_pool(struct qeth_card *card) 949 { 950 struct qeth_buffer_pool_entry *pool_entry, *tmp; 951 int i = 0; 952 QETH_DBF_TEXT(TRACE, 5, "freepool"); 953 list_for_each_entry_safe(pool_entry, tmp, 954 &card->qdio.init_pool.entry_list, init_list){ 955 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 956 free_page((unsigned long)pool_entry->elements[i]); 957 list_del(&pool_entry->init_list); 958 kfree(pool_entry); 959 } 960 } 961 962 static void qeth_free_qdio_buffers(struct qeth_card *card) 963 { 964 int i, j; 965 966 QETH_DBF_TEXT(TRACE, 2, "freeqdbf"); 967 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 968 QETH_QDIO_UNINITIALIZED) 969 return; 970 kfree(card->qdio.in_q); 971 card->qdio.in_q = NULL; 972 /* inbound buffer pool */ 973 qeth_free_buffer_pool(card); 974 /* free outbound qdio_qs */ 975 if (card->qdio.out_qs) { 976 for (i = 0; i < card->qdio.no_out_queues; ++i) { 977 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 978 qeth_clear_output_buffer(card->qdio.out_qs[i], 979 &card->qdio.out_qs[i]->bufs[j]); 980 kfree(card->qdio.out_qs[i]); 981 } 982 kfree(card->qdio.out_qs); 983 card->qdio.out_qs = NULL; 984 } 985 } 986 987 static void qeth_clean_channel(struct qeth_channel *channel) 988 { 989 int cnt; 990 991 QETH_DBF_TEXT(SETUP, 2, "freech"); 992 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 993 kfree(channel->iob[cnt].data); 994 } 995 996 static int qeth_is_1920_device(struct qeth_card *card) 997 { 998 int single_queue = 0; 999 struct ccw_device *ccwdev; 1000 struct channelPath_dsc { 1001 u8 flags; 1002 u8 lsn; 1003 u8 desc; 1004 u8 chpid; 1005 u8 swla; 1006 u8 zeroes; 1007 u8 chla; 1008 u8 chpp; 1009 } *chp_dsc; 1010 1011 QETH_DBF_TEXT(SETUP, 2, "chk_1920"); 1012 1013 ccwdev = card->data.ccwdev; 1014 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 1015 if (chp_dsc != NULL) { 1016 /* CHPP field bit 6 == 1 -> single queue */ 1017 single_queue = ((chp_dsc->chpp & 0x02) == 0x02); 1018 kfree(chp_dsc); 1019 } 1020 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue); 1021 return single_queue; 1022 } 1023 1024 static void qeth_init_qdio_info(struct qeth_card *card) 1025 { 1026 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1027 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1028 /* inbound */ 1029 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1030 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1031 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1032 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1033 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1034 } 1035 1036 static void qeth_set_intial_options(struct qeth_card *card) 1037 { 1038 card->options.route4.type = NO_ROUTER; 1039 card->options.route6.type = NO_ROUTER; 1040 card->options.checksum_type = QETH_CHECKSUM_DEFAULT; 1041 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1042 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1043 card->options.fake_broadcast = 0; 1044 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1045 card->options.performance_stats = 0; 1046 card->options.rx_sg_cb = QETH_RX_SG_CB; 1047 card->options.isolation = ISOLATION_MODE_NONE; 1048 } 1049 1050 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1051 { 1052 unsigned long flags; 1053 int rc = 0; 1054 1055 spin_lock_irqsave(&card->thread_mask_lock, flags); 1056 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x", 1057 (u8) card->thread_start_mask, 1058 (u8) card->thread_allowed_mask, 1059 (u8) card->thread_running_mask); 1060 rc = (card->thread_start_mask & thread); 1061 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1062 return rc; 1063 } 1064 1065 static void qeth_start_kernel_thread(struct work_struct *work) 1066 { 1067 struct qeth_card *card = container_of(work, struct qeth_card, 1068 kernel_thread_starter); 1069 QETH_DBF_TEXT(TRACE , 2, "strthrd"); 1070 1071 if (card->read.state != CH_STATE_UP && 1072 card->write.state != CH_STATE_UP) 1073 return; 1074 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1075 kthread_run(card->discipline.recover, (void *) card, 1076 "qeth_recover"); 1077 } 1078 1079 static int qeth_setup_card(struct qeth_card *card) 1080 { 1081 1082 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1083 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1084 1085 card->read.state = CH_STATE_DOWN; 1086 card->write.state = CH_STATE_DOWN; 1087 card->data.state = CH_STATE_DOWN; 1088 card->state = CARD_STATE_DOWN; 1089 card->lan_online = 0; 1090 card->use_hard_stop = 0; 1091 card->dev = NULL; 1092 spin_lock_init(&card->vlanlock); 1093 spin_lock_init(&card->mclock); 1094 card->vlangrp = NULL; 1095 spin_lock_init(&card->lock); 1096 spin_lock_init(&card->ip_lock); 1097 spin_lock_init(&card->thread_mask_lock); 1098 card->thread_start_mask = 0; 1099 card->thread_allowed_mask = 0; 1100 card->thread_running_mask = 0; 1101 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1102 INIT_LIST_HEAD(&card->ip_list); 1103 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1104 if (!card->ip_tbd_list) { 1105 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1106 return -ENOMEM; 1107 } 1108 INIT_LIST_HEAD(card->ip_tbd_list); 1109 INIT_LIST_HEAD(&card->cmd_waiter_list); 1110 init_waitqueue_head(&card->wait_q); 1111 /* intial options */ 1112 qeth_set_intial_options(card); 1113 /* IP address takeover */ 1114 INIT_LIST_HEAD(&card->ipato.entries); 1115 card->ipato.enabled = 0; 1116 card->ipato.invert4 = 0; 1117 card->ipato.invert6 = 0; 1118 if (card->info.type == QETH_CARD_TYPE_IQD) 1119 card->options.checksum_type = NO_CHECKSUMMING; 1120 /* init QDIO stuff */ 1121 qeth_init_qdio_info(card); 1122 return 0; 1123 } 1124 1125 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1126 { 1127 struct qeth_card *card = container_of(slr, struct qeth_card, 1128 qeth_service_level); 1129 if (card->info.mcl_level[0]) 1130 seq_printf(m, "qeth: %s firmware level %s\n", 1131 CARD_BUS_ID(card), card->info.mcl_level); 1132 } 1133 1134 static struct qeth_card *qeth_alloc_card(void) 1135 { 1136 struct qeth_card *card; 1137 1138 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1139 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1140 if (!card) 1141 return NULL; 1142 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1143 if (qeth_setup_channel(&card->read)) { 1144 kfree(card); 1145 return NULL; 1146 } 1147 if (qeth_setup_channel(&card->write)) { 1148 qeth_clean_channel(&card->read); 1149 kfree(card); 1150 return NULL; 1151 } 1152 card->options.layer2 = -1; 1153 card->qeth_service_level.seq_print = qeth_core_sl_print; 1154 register_service_level(&card->qeth_service_level); 1155 return card; 1156 } 1157 1158 static int qeth_determine_card_type(struct qeth_card *card) 1159 { 1160 int i = 0; 1161 1162 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1163 1164 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1165 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1166 while (known_devices[i][4]) { 1167 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) && 1168 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) { 1169 card->info.type = known_devices[i][4]; 1170 card->qdio.no_out_queues = known_devices[i][8]; 1171 card->info.is_multicast_different = known_devices[i][9]; 1172 if (qeth_is_1920_device(card)) { 1173 dev_info(&card->gdev->dev, 1174 "Priority Queueing not supported\n"); 1175 card->qdio.no_out_queues = 1; 1176 card->qdio.default_out_queue = 0; 1177 } 1178 return 0; 1179 } 1180 i++; 1181 } 1182 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1183 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1184 "unknown type\n"); 1185 return -ENOENT; 1186 } 1187 1188 static int qeth_clear_channel(struct qeth_channel *channel) 1189 { 1190 unsigned long flags; 1191 struct qeth_card *card; 1192 int rc; 1193 1194 QETH_DBF_TEXT(TRACE, 3, "clearch"); 1195 card = CARD_FROM_CDEV(channel->ccwdev); 1196 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1197 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1198 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1199 1200 if (rc) 1201 return rc; 1202 rc = wait_event_interruptible_timeout(card->wait_q, 1203 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1204 if (rc == -ERESTARTSYS) 1205 return rc; 1206 if (channel->state != CH_STATE_STOPPED) 1207 return -ETIME; 1208 channel->state = CH_STATE_DOWN; 1209 return 0; 1210 } 1211 1212 static int qeth_halt_channel(struct qeth_channel *channel) 1213 { 1214 unsigned long flags; 1215 struct qeth_card *card; 1216 int rc; 1217 1218 QETH_DBF_TEXT(TRACE, 3, "haltch"); 1219 card = CARD_FROM_CDEV(channel->ccwdev); 1220 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1221 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1222 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1223 1224 if (rc) 1225 return rc; 1226 rc = wait_event_interruptible_timeout(card->wait_q, 1227 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1228 if (rc == -ERESTARTSYS) 1229 return rc; 1230 if (channel->state != CH_STATE_HALTED) 1231 return -ETIME; 1232 return 0; 1233 } 1234 1235 static int qeth_halt_channels(struct qeth_card *card) 1236 { 1237 int rc1 = 0, rc2 = 0, rc3 = 0; 1238 1239 QETH_DBF_TEXT(TRACE, 3, "haltchs"); 1240 rc1 = qeth_halt_channel(&card->read); 1241 rc2 = qeth_halt_channel(&card->write); 1242 rc3 = qeth_halt_channel(&card->data); 1243 if (rc1) 1244 return rc1; 1245 if (rc2) 1246 return rc2; 1247 return rc3; 1248 } 1249 1250 static int qeth_clear_channels(struct qeth_card *card) 1251 { 1252 int rc1 = 0, rc2 = 0, rc3 = 0; 1253 1254 QETH_DBF_TEXT(TRACE, 3, "clearchs"); 1255 rc1 = qeth_clear_channel(&card->read); 1256 rc2 = qeth_clear_channel(&card->write); 1257 rc3 = qeth_clear_channel(&card->data); 1258 if (rc1) 1259 return rc1; 1260 if (rc2) 1261 return rc2; 1262 return rc3; 1263 } 1264 1265 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1266 { 1267 int rc = 0; 1268 1269 QETH_DBF_TEXT(TRACE, 3, "clhacrd"); 1270 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *)); 1271 1272 if (halt) 1273 rc = qeth_halt_channels(card); 1274 if (rc) 1275 return rc; 1276 return qeth_clear_channels(card); 1277 } 1278 1279 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1280 { 1281 int rc = 0; 1282 1283 QETH_DBF_TEXT(TRACE, 3, "qdioclr"); 1284 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1285 QETH_QDIO_CLEANING)) { 1286 case QETH_QDIO_ESTABLISHED: 1287 if (card->info.type == QETH_CARD_TYPE_IQD) 1288 rc = qdio_cleanup(CARD_DDEV(card), 1289 QDIO_FLAG_CLEANUP_USING_HALT); 1290 else 1291 rc = qdio_cleanup(CARD_DDEV(card), 1292 QDIO_FLAG_CLEANUP_USING_CLEAR); 1293 if (rc) 1294 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc); 1295 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1296 break; 1297 case QETH_QDIO_CLEANING: 1298 return rc; 1299 default: 1300 break; 1301 } 1302 rc = qeth_clear_halt_card(card, use_halt); 1303 if (rc) 1304 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc); 1305 card->state = CARD_STATE_DOWN; 1306 return rc; 1307 } 1308 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1309 1310 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1311 int *length) 1312 { 1313 struct ciw *ciw; 1314 char *rcd_buf; 1315 int ret; 1316 struct qeth_channel *channel = &card->data; 1317 unsigned long flags; 1318 1319 /* 1320 * scan for RCD command in extended SenseID data 1321 */ 1322 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1323 if (!ciw || ciw->cmd == 0) 1324 return -EOPNOTSUPP; 1325 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1326 if (!rcd_buf) 1327 return -ENOMEM; 1328 1329 channel->ccw.cmd_code = ciw->cmd; 1330 channel->ccw.cda = (__u32) __pa(rcd_buf); 1331 channel->ccw.count = ciw->count; 1332 channel->ccw.flags = CCW_FLAG_SLI; 1333 channel->state = CH_STATE_RCD; 1334 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1335 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1336 QETH_RCD_PARM, LPM_ANYPATH, 0, 1337 QETH_RCD_TIMEOUT); 1338 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1339 if (!ret) 1340 wait_event(card->wait_q, 1341 (channel->state == CH_STATE_RCD_DONE || 1342 channel->state == CH_STATE_DOWN)); 1343 if (channel->state == CH_STATE_DOWN) 1344 ret = -EIO; 1345 else 1346 channel->state = CH_STATE_DOWN; 1347 if (ret) { 1348 kfree(rcd_buf); 1349 *buffer = NULL; 1350 *length = 0; 1351 } else { 1352 *length = ciw->count; 1353 *buffer = rcd_buf; 1354 } 1355 return ret; 1356 } 1357 1358 static int qeth_get_unitaddr(struct qeth_card *card) 1359 { 1360 int length; 1361 char *prcd; 1362 int rc; 1363 1364 QETH_DBF_TEXT(SETUP, 2, "getunit"); 1365 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 1366 if (rc) { 1367 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 1368 dev_name(&card->gdev->dev), rc); 1369 return rc; 1370 } 1371 card->info.chpid = prcd[30]; 1372 card->info.unit_addr2 = prcd[31]; 1373 card->info.cula = prcd[63]; 1374 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1375 (prcd[0x11] == _ascebc['M'])); 1376 kfree(prcd); 1377 return 0; 1378 } 1379 1380 static void qeth_init_tokens(struct qeth_card *card) 1381 { 1382 card->token.issuer_rm_w = 0x00010103UL; 1383 card->token.cm_filter_w = 0x00010108UL; 1384 card->token.cm_connection_w = 0x0001010aUL; 1385 card->token.ulp_filter_w = 0x0001010bUL; 1386 card->token.ulp_connection_w = 0x0001010dUL; 1387 } 1388 1389 static void qeth_init_func_level(struct qeth_card *card) 1390 { 1391 if (card->ipato.enabled) { 1392 if (card->info.type == QETH_CARD_TYPE_IQD) 1393 card->info.func_level = 1394 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT; 1395 else 1396 card->info.func_level = 1397 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT; 1398 } else { 1399 if (card->info.type == QETH_CARD_TYPE_IQD) 1400 /*FIXME:why do we have same values for dis and ena for 1401 osae??? */ 1402 card->info.func_level = 1403 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT; 1404 else 1405 card->info.func_level = 1406 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT; 1407 } 1408 } 1409 1410 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1411 void (*idx_reply_cb)(struct qeth_channel *, 1412 struct qeth_cmd_buffer *)) 1413 { 1414 struct qeth_cmd_buffer *iob; 1415 unsigned long flags; 1416 int rc; 1417 struct qeth_card *card; 1418 1419 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1420 card = CARD_FROM_CDEV(channel->ccwdev); 1421 iob = qeth_get_buffer(channel); 1422 iob->callback = idx_reply_cb; 1423 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1424 channel->ccw.count = QETH_BUFSIZE; 1425 channel->ccw.cda = (__u32) __pa(iob->data); 1426 1427 wait_event(card->wait_q, 1428 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1429 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1430 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1431 rc = ccw_device_start(channel->ccwdev, 1432 &channel->ccw, (addr_t) iob, 0, 0); 1433 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1434 1435 if (rc) { 1436 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1437 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1438 atomic_set(&channel->irq_pending, 0); 1439 wake_up(&card->wait_q); 1440 return rc; 1441 } 1442 rc = wait_event_interruptible_timeout(card->wait_q, 1443 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1444 if (rc == -ERESTARTSYS) 1445 return rc; 1446 if (channel->state != CH_STATE_UP) { 1447 rc = -ETIME; 1448 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1449 qeth_clear_cmd_buffers(channel); 1450 } else 1451 rc = 0; 1452 return rc; 1453 } 1454 1455 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1456 void (*idx_reply_cb)(struct qeth_channel *, 1457 struct qeth_cmd_buffer *)) 1458 { 1459 struct qeth_card *card; 1460 struct qeth_cmd_buffer *iob; 1461 unsigned long flags; 1462 __u16 temp; 1463 __u8 tmp; 1464 int rc; 1465 struct ccw_dev_id temp_devid; 1466 1467 card = CARD_FROM_CDEV(channel->ccwdev); 1468 1469 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1470 1471 iob = qeth_get_buffer(channel); 1472 iob->callback = idx_reply_cb; 1473 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1474 channel->ccw.count = IDX_ACTIVATE_SIZE; 1475 channel->ccw.cda = (__u32) __pa(iob->data); 1476 if (channel == &card->write) { 1477 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1478 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1479 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1480 card->seqno.trans_hdr++; 1481 } else { 1482 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1483 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1484 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1485 } 1486 tmp = ((__u8)card->info.portno) | 0x80; 1487 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1488 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1489 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1490 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1491 &card->info.func_level, sizeof(__u16)); 1492 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1493 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1494 temp = (card->info.cula << 8) + card->info.unit_addr2; 1495 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1496 1497 wait_event(card->wait_q, 1498 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1499 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1500 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1501 rc = ccw_device_start(channel->ccwdev, 1502 &channel->ccw, (addr_t) iob, 0, 0); 1503 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1504 1505 if (rc) { 1506 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1507 rc); 1508 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1509 atomic_set(&channel->irq_pending, 0); 1510 wake_up(&card->wait_q); 1511 return rc; 1512 } 1513 rc = wait_event_interruptible_timeout(card->wait_q, 1514 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1515 if (rc == -ERESTARTSYS) 1516 return rc; 1517 if (channel->state != CH_STATE_ACTIVATING) { 1518 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1519 " failed to recover an error on the device\n"); 1520 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1521 dev_name(&channel->ccwdev->dev)); 1522 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1523 qeth_clear_cmd_buffers(channel); 1524 return -ETIME; 1525 } 1526 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1527 } 1528 1529 static int qeth_peer_func_level(int level) 1530 { 1531 if ((level & 0xff) == 8) 1532 return (level & 0xff) + 0x400; 1533 if (((level >> 8) & 3) == 1) 1534 return (level & 0xff) + 0x200; 1535 return level; 1536 } 1537 1538 static void qeth_idx_write_cb(struct qeth_channel *channel, 1539 struct qeth_cmd_buffer *iob) 1540 { 1541 struct qeth_card *card; 1542 __u16 temp; 1543 1544 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1545 1546 if (channel->state == CH_STATE_DOWN) { 1547 channel->state = CH_STATE_ACTIVATING; 1548 goto out; 1549 } 1550 card = CARD_FROM_CDEV(channel->ccwdev); 1551 1552 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1553 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) 1554 dev_err(&card->write.ccwdev->dev, 1555 "The adapter is used exclusively by another " 1556 "host\n"); 1557 else 1558 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1559 " negative reply\n", 1560 dev_name(&card->write.ccwdev->dev)); 1561 goto out; 1562 } 1563 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1564 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1565 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1566 "function level mismatch (sent: 0x%x, received: " 1567 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1568 card->info.func_level, temp); 1569 goto out; 1570 } 1571 channel->state = CH_STATE_UP; 1572 out: 1573 qeth_release_buffer(channel, iob); 1574 } 1575 1576 static void qeth_idx_read_cb(struct qeth_channel *channel, 1577 struct qeth_cmd_buffer *iob) 1578 { 1579 struct qeth_card *card; 1580 __u16 temp; 1581 1582 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1583 if (channel->state == CH_STATE_DOWN) { 1584 channel->state = CH_STATE_ACTIVATING; 1585 goto out; 1586 } 1587 1588 card = CARD_FROM_CDEV(channel->ccwdev); 1589 if (qeth_check_idx_response(iob->data)) 1590 goto out; 1591 1592 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1593 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19) 1594 dev_err(&card->write.ccwdev->dev, 1595 "The adapter is used exclusively by another " 1596 "host\n"); 1597 else 1598 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1599 " negative reply\n", 1600 dev_name(&card->read.ccwdev->dev)); 1601 goto out; 1602 } 1603 1604 /** 1605 * temporary fix for microcode bug 1606 * to revert it,replace OR by AND 1607 */ 1608 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1609 (card->info.type == QETH_CARD_TYPE_OSAE)) 1610 card->info.portname_required = 1; 1611 1612 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1613 if (temp != qeth_peer_func_level(card->info.func_level)) { 1614 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1615 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1616 dev_name(&card->read.ccwdev->dev), 1617 card->info.func_level, temp); 1618 goto out; 1619 } 1620 memcpy(&card->token.issuer_rm_r, 1621 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1622 QETH_MPC_TOKEN_LENGTH); 1623 memcpy(&card->info.mcl_level[0], 1624 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1625 channel->state = CH_STATE_UP; 1626 out: 1627 qeth_release_buffer(channel, iob); 1628 } 1629 1630 void qeth_prepare_control_data(struct qeth_card *card, int len, 1631 struct qeth_cmd_buffer *iob) 1632 { 1633 qeth_setup_ccw(&card->write, iob->data, len); 1634 iob->callback = qeth_release_buffer; 1635 1636 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1637 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1638 card->seqno.trans_hdr++; 1639 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1640 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1641 card->seqno.pdu_hdr++; 1642 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1643 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1644 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1645 } 1646 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1647 1648 int qeth_send_control_data(struct qeth_card *card, int len, 1649 struct qeth_cmd_buffer *iob, 1650 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1651 unsigned long), 1652 void *reply_param) 1653 { 1654 int rc; 1655 unsigned long flags; 1656 struct qeth_reply *reply = NULL; 1657 unsigned long timeout, event_timeout; 1658 struct qeth_ipa_cmd *cmd; 1659 1660 QETH_DBF_TEXT(TRACE, 2, "sendctl"); 1661 1662 reply = qeth_alloc_reply(card); 1663 if (!reply) { 1664 return -ENOMEM; 1665 } 1666 reply->callback = reply_cb; 1667 reply->param = reply_param; 1668 if (card->state == CARD_STATE_DOWN) 1669 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1670 else 1671 reply->seqno = card->seqno.ipa++; 1672 init_waitqueue_head(&reply->wait_q); 1673 spin_lock_irqsave(&card->lock, flags); 1674 list_add_tail(&reply->list, &card->cmd_waiter_list); 1675 spin_unlock_irqrestore(&card->lock, flags); 1676 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1677 1678 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1679 qeth_prepare_control_data(card, len, iob); 1680 1681 if (IS_IPA(iob->data)) 1682 event_timeout = QETH_IPA_TIMEOUT; 1683 else 1684 event_timeout = QETH_TIMEOUT; 1685 timeout = jiffies + event_timeout; 1686 1687 QETH_DBF_TEXT(TRACE, 6, "noirqpnd"); 1688 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1689 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1690 (addr_t) iob, 0, 0); 1691 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1692 if (rc) { 1693 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1694 "ccw_device_start rc = %i\n", 1695 dev_name(&card->write.ccwdev->dev), rc); 1696 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); 1697 spin_lock_irqsave(&card->lock, flags); 1698 list_del_init(&reply->list); 1699 qeth_put_reply(reply); 1700 spin_unlock_irqrestore(&card->lock, flags); 1701 qeth_release_buffer(iob->channel, iob); 1702 atomic_set(&card->write.irq_pending, 0); 1703 wake_up(&card->wait_q); 1704 return rc; 1705 } 1706 1707 /* we have only one long running ipassist, since we can ensure 1708 process context of this command we can sleep */ 1709 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1710 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1711 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1712 if (!wait_event_timeout(reply->wait_q, 1713 atomic_read(&reply->received), event_timeout)) 1714 goto time_err; 1715 } else { 1716 while (!atomic_read(&reply->received)) { 1717 if (time_after(jiffies, timeout)) 1718 goto time_err; 1719 cpu_relax(); 1720 }; 1721 } 1722 1723 rc = reply->rc; 1724 qeth_put_reply(reply); 1725 return rc; 1726 1727 time_err: 1728 spin_lock_irqsave(&reply->card->lock, flags); 1729 list_del_init(&reply->list); 1730 spin_unlock_irqrestore(&reply->card->lock, flags); 1731 reply->rc = -ETIME; 1732 atomic_inc(&reply->received); 1733 wake_up(&reply->wait_q); 1734 rc = reply->rc; 1735 qeth_put_reply(reply); 1736 return rc; 1737 } 1738 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1739 1740 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1741 unsigned long data) 1742 { 1743 struct qeth_cmd_buffer *iob; 1744 1745 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1746 1747 iob = (struct qeth_cmd_buffer *) data; 1748 memcpy(&card->token.cm_filter_r, 1749 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1750 QETH_MPC_TOKEN_LENGTH); 1751 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1752 return 0; 1753 } 1754 1755 static int qeth_cm_enable(struct qeth_card *card) 1756 { 1757 int rc; 1758 struct qeth_cmd_buffer *iob; 1759 1760 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1761 1762 iob = qeth_wait_for_buffer(&card->write); 1763 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1764 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1765 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1766 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1767 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1768 1769 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1770 qeth_cm_enable_cb, NULL); 1771 return rc; 1772 } 1773 1774 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1775 unsigned long data) 1776 { 1777 1778 struct qeth_cmd_buffer *iob; 1779 1780 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1781 1782 iob = (struct qeth_cmd_buffer *) data; 1783 memcpy(&card->token.cm_connection_r, 1784 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1785 QETH_MPC_TOKEN_LENGTH); 1786 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1787 return 0; 1788 } 1789 1790 static int qeth_cm_setup(struct qeth_card *card) 1791 { 1792 int rc; 1793 struct qeth_cmd_buffer *iob; 1794 1795 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1796 1797 iob = qeth_wait_for_buffer(&card->write); 1798 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1799 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1800 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1801 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1802 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1803 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1804 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1805 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1806 qeth_cm_setup_cb, NULL); 1807 return rc; 1808 1809 } 1810 1811 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1812 { 1813 switch (card->info.type) { 1814 case QETH_CARD_TYPE_UNKNOWN: 1815 return 1500; 1816 case QETH_CARD_TYPE_IQD: 1817 return card->info.max_mtu; 1818 case QETH_CARD_TYPE_OSAE: 1819 switch (card->info.link_type) { 1820 case QETH_LINK_TYPE_HSTR: 1821 case QETH_LINK_TYPE_LANE_TR: 1822 return 2000; 1823 default: 1824 return 1492; 1825 } 1826 default: 1827 return 1500; 1828 } 1829 } 1830 1831 static inline int qeth_get_max_mtu_for_card(int cardtype) 1832 { 1833 switch (cardtype) { 1834 1835 case QETH_CARD_TYPE_UNKNOWN: 1836 case QETH_CARD_TYPE_OSAE: 1837 case QETH_CARD_TYPE_OSN: 1838 return 61440; 1839 case QETH_CARD_TYPE_IQD: 1840 return 57344; 1841 default: 1842 return 1500; 1843 } 1844 } 1845 1846 static inline int qeth_get_mtu_out_of_mpc(int cardtype) 1847 { 1848 switch (cardtype) { 1849 case QETH_CARD_TYPE_IQD: 1850 return 1; 1851 default: 1852 return 0; 1853 } 1854 } 1855 1856 static inline int qeth_get_mtu_outof_framesize(int framesize) 1857 { 1858 switch (framesize) { 1859 case 0x4000: 1860 return 8192; 1861 case 0x6000: 1862 return 16384; 1863 case 0xa000: 1864 return 32768; 1865 case 0xffff: 1866 return 57344; 1867 default: 1868 return 0; 1869 } 1870 } 1871 1872 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1873 { 1874 switch (card->info.type) { 1875 case QETH_CARD_TYPE_OSAE: 1876 return ((mtu >= 576) && (mtu <= 61440)); 1877 case QETH_CARD_TYPE_IQD: 1878 return ((mtu >= 576) && 1879 (mtu <= card->info.max_mtu + 4096 - 32)); 1880 case QETH_CARD_TYPE_OSN: 1881 case QETH_CARD_TYPE_UNKNOWN: 1882 default: 1883 return 1; 1884 } 1885 } 1886 1887 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1888 unsigned long data) 1889 { 1890 1891 __u16 mtu, framesize; 1892 __u16 len; 1893 __u8 link_type; 1894 struct qeth_cmd_buffer *iob; 1895 1896 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1897 1898 iob = (struct qeth_cmd_buffer *) data; 1899 memcpy(&card->token.ulp_filter_r, 1900 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1901 QETH_MPC_TOKEN_LENGTH); 1902 if (qeth_get_mtu_out_of_mpc(card->info.type)) { 1903 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1904 mtu = qeth_get_mtu_outof_framesize(framesize); 1905 if (!mtu) { 1906 iob->rc = -EINVAL; 1907 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1908 return 0; 1909 } 1910 card->info.max_mtu = mtu; 1911 card->info.initial_mtu = mtu; 1912 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1913 } else { 1914 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1915 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); 1916 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1917 } 1918 1919 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1920 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1921 memcpy(&link_type, 1922 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1923 card->info.link_type = link_type; 1924 } else 1925 card->info.link_type = 0; 1926 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1927 return 0; 1928 } 1929 1930 static int qeth_ulp_enable(struct qeth_card *card) 1931 { 1932 int rc; 1933 char prot_type; 1934 struct qeth_cmd_buffer *iob; 1935 1936 /*FIXME: trace view callbacks*/ 1937 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1938 1939 iob = qeth_wait_for_buffer(&card->write); 1940 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1941 1942 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1943 (__u8) card->info.portno; 1944 if (card->options.layer2) 1945 if (card->info.type == QETH_CARD_TYPE_OSN) 1946 prot_type = QETH_PROT_OSN2; 1947 else 1948 prot_type = QETH_PROT_LAYER2; 1949 else 1950 prot_type = QETH_PROT_TCPIP; 1951 1952 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1953 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1954 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1955 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1956 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1957 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1958 card->info.portname, 9); 1959 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1960 qeth_ulp_enable_cb, NULL); 1961 return rc; 1962 1963 } 1964 1965 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1966 unsigned long data) 1967 { 1968 struct qeth_cmd_buffer *iob; 1969 1970 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1971 1972 iob = (struct qeth_cmd_buffer *) data; 1973 memcpy(&card->token.ulp_connection_r, 1974 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1975 QETH_MPC_TOKEN_LENGTH); 1976 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1977 return 0; 1978 } 1979 1980 static int qeth_ulp_setup(struct qeth_card *card) 1981 { 1982 int rc; 1983 __u16 temp; 1984 struct qeth_cmd_buffer *iob; 1985 struct ccw_dev_id dev_id; 1986 1987 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 1988 1989 iob = qeth_wait_for_buffer(&card->write); 1990 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 1991 1992 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 1993 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1994 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 1995 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 1996 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 1997 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 1998 1999 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2000 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2001 temp = (card->info.cula << 8) + card->info.unit_addr2; 2002 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2003 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2004 qeth_ulp_setup_cb, NULL); 2005 return rc; 2006 } 2007 2008 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2009 { 2010 int i, j; 2011 2012 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2013 2014 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2015 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2016 return 0; 2017 2018 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 2019 GFP_KERNEL); 2020 if (!card->qdio.in_q) 2021 goto out_nomem; 2022 QETH_DBF_TEXT(SETUP, 2, "inq"); 2023 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2024 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2025 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2026 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 2027 card->qdio.in_q->bufs[i].buffer = 2028 &card->qdio.in_q->qdio_bufs[i]; 2029 /* inbound buffer pool */ 2030 if (qeth_alloc_buffer_pool(card)) 2031 goto out_freeinq; 2032 /* outbound */ 2033 card->qdio.out_qs = 2034 kmalloc(card->qdio.no_out_queues * 2035 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2036 if (!card->qdio.out_qs) 2037 goto out_freepool; 2038 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2039 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2040 GFP_KERNEL); 2041 if (!card->qdio.out_qs[i]) 2042 goto out_freeoutq; 2043 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2044 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2045 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2046 card->qdio.out_qs[i]->queue_no = i; 2047 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2048 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2049 card->qdio.out_qs[i]->bufs[j].buffer = 2050 &card->qdio.out_qs[i]->qdio_bufs[j]; 2051 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2052 skb_list); 2053 lockdep_set_class( 2054 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2055 &qdio_out_skb_queue_key); 2056 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2057 } 2058 } 2059 return 0; 2060 2061 out_freeoutq: 2062 while (i > 0) 2063 kfree(card->qdio.out_qs[--i]); 2064 kfree(card->qdio.out_qs); 2065 card->qdio.out_qs = NULL; 2066 out_freepool: 2067 qeth_free_buffer_pool(card); 2068 out_freeinq: 2069 kfree(card->qdio.in_q); 2070 card->qdio.in_q = NULL; 2071 out_nomem: 2072 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2073 return -ENOMEM; 2074 } 2075 2076 static void qeth_create_qib_param_field(struct qeth_card *card, 2077 char *param_field) 2078 { 2079 2080 param_field[0] = _ascebc['P']; 2081 param_field[1] = _ascebc['C']; 2082 param_field[2] = _ascebc['I']; 2083 param_field[3] = _ascebc['T']; 2084 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2085 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2086 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2087 } 2088 2089 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2090 char *param_field) 2091 { 2092 param_field[16] = _ascebc['B']; 2093 param_field[17] = _ascebc['L']; 2094 param_field[18] = _ascebc['K']; 2095 param_field[19] = _ascebc['T']; 2096 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2097 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2098 *((unsigned int *) (¶m_field[28])) = 2099 card->info.blkt.inter_packet_jumbo; 2100 } 2101 2102 static int qeth_qdio_activate(struct qeth_card *card) 2103 { 2104 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2105 return qdio_activate(CARD_DDEV(card)); 2106 } 2107 2108 static int qeth_dm_act(struct qeth_card *card) 2109 { 2110 int rc; 2111 struct qeth_cmd_buffer *iob; 2112 2113 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2114 2115 iob = qeth_wait_for_buffer(&card->write); 2116 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2117 2118 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2119 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2120 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2121 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2122 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2123 return rc; 2124 } 2125 2126 static int qeth_mpc_initialize(struct qeth_card *card) 2127 { 2128 int rc; 2129 2130 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2131 2132 rc = qeth_issue_next_read(card); 2133 if (rc) { 2134 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2135 return rc; 2136 } 2137 rc = qeth_cm_enable(card); 2138 if (rc) { 2139 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2140 goto out_qdio; 2141 } 2142 rc = qeth_cm_setup(card); 2143 if (rc) { 2144 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2145 goto out_qdio; 2146 } 2147 rc = qeth_ulp_enable(card); 2148 if (rc) { 2149 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2150 goto out_qdio; 2151 } 2152 rc = qeth_ulp_setup(card); 2153 if (rc) { 2154 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2155 goto out_qdio; 2156 } 2157 rc = qeth_alloc_qdio_buffers(card); 2158 if (rc) { 2159 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2160 goto out_qdio; 2161 } 2162 rc = qeth_qdio_establish(card); 2163 if (rc) { 2164 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2165 qeth_free_qdio_buffers(card); 2166 goto out_qdio; 2167 } 2168 rc = qeth_qdio_activate(card); 2169 if (rc) { 2170 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2171 goto out_qdio; 2172 } 2173 rc = qeth_dm_act(card); 2174 if (rc) { 2175 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2176 goto out_qdio; 2177 } 2178 2179 return 0; 2180 out_qdio: 2181 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2182 return rc; 2183 } 2184 2185 static void qeth_print_status_with_portname(struct qeth_card *card) 2186 { 2187 char dbf_text[15]; 2188 int i; 2189 2190 sprintf(dbf_text, "%s", card->info.portname + 1); 2191 for (i = 0; i < 8; i++) 2192 dbf_text[i] = 2193 (char) _ebcasc[(__u8) dbf_text[i]]; 2194 dbf_text[8] = 0; 2195 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2196 "with link type %s (portname: %s)\n", 2197 qeth_get_cardname(card), 2198 (card->info.mcl_level[0]) ? " (level: " : "", 2199 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2200 (card->info.mcl_level[0]) ? ")" : "", 2201 qeth_get_cardname_short(card), 2202 dbf_text); 2203 2204 } 2205 2206 static void qeth_print_status_no_portname(struct qeth_card *card) 2207 { 2208 if (card->info.portname[0]) 2209 dev_info(&card->gdev->dev, "Device is a%s " 2210 "card%s%s%s\nwith link type %s " 2211 "(no portname needed by interface).\n", 2212 qeth_get_cardname(card), 2213 (card->info.mcl_level[0]) ? " (level: " : "", 2214 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2215 (card->info.mcl_level[0]) ? ")" : "", 2216 qeth_get_cardname_short(card)); 2217 else 2218 dev_info(&card->gdev->dev, "Device is a%s " 2219 "card%s%s%s\nwith link type %s.\n", 2220 qeth_get_cardname(card), 2221 (card->info.mcl_level[0]) ? " (level: " : "", 2222 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2223 (card->info.mcl_level[0]) ? ")" : "", 2224 qeth_get_cardname_short(card)); 2225 } 2226 2227 void qeth_print_status_message(struct qeth_card *card) 2228 { 2229 switch (card->info.type) { 2230 case QETH_CARD_TYPE_OSAE: 2231 /* VM will use a non-zero first character 2232 * to indicate a HiperSockets like reporting 2233 * of the level OSA sets the first character to zero 2234 * */ 2235 if (!card->info.mcl_level[0]) { 2236 sprintf(card->info.mcl_level, "%02x%02x", 2237 card->info.mcl_level[2], 2238 card->info.mcl_level[3]); 2239 2240 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2241 break; 2242 } 2243 /* fallthrough */ 2244 case QETH_CARD_TYPE_IQD: 2245 if ((card->info.guestlan) || 2246 (card->info.mcl_level[0] & 0x80)) { 2247 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2248 card->info.mcl_level[0]]; 2249 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2250 card->info.mcl_level[1]]; 2251 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2252 card->info.mcl_level[2]]; 2253 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2254 card->info.mcl_level[3]]; 2255 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2256 } 2257 break; 2258 default: 2259 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2260 } 2261 if (card->info.portname_required) 2262 qeth_print_status_with_portname(card); 2263 else 2264 qeth_print_status_no_portname(card); 2265 } 2266 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2267 2268 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2269 { 2270 struct qeth_buffer_pool_entry *entry; 2271 2272 QETH_DBF_TEXT(TRACE, 5, "inwrklst"); 2273 2274 list_for_each_entry(entry, 2275 &card->qdio.init_pool.entry_list, init_list) { 2276 qeth_put_buffer_pool_entry(card, entry); 2277 } 2278 } 2279 2280 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2281 struct qeth_card *card) 2282 { 2283 struct list_head *plh; 2284 struct qeth_buffer_pool_entry *entry; 2285 int i, free; 2286 struct page *page; 2287 2288 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2289 return NULL; 2290 2291 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2292 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2293 free = 1; 2294 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2295 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2296 free = 0; 2297 break; 2298 } 2299 } 2300 if (free) { 2301 list_del_init(&entry->list); 2302 return entry; 2303 } 2304 } 2305 2306 /* no free buffer in pool so take first one and swap pages */ 2307 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2308 struct qeth_buffer_pool_entry, list); 2309 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2310 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2311 page = alloc_page(GFP_ATOMIC); 2312 if (!page) { 2313 return NULL; 2314 } else { 2315 free_page((unsigned long)entry->elements[i]); 2316 entry->elements[i] = page_address(page); 2317 if (card->options.performance_stats) 2318 card->perf_stats.sg_alloc_page_rx++; 2319 } 2320 } 2321 } 2322 list_del_init(&entry->list); 2323 return entry; 2324 } 2325 2326 static int qeth_init_input_buffer(struct qeth_card *card, 2327 struct qeth_qdio_buffer *buf) 2328 { 2329 struct qeth_buffer_pool_entry *pool_entry; 2330 int i; 2331 2332 pool_entry = qeth_find_free_buffer_pool_entry(card); 2333 if (!pool_entry) 2334 return 1; 2335 2336 /* 2337 * since the buffer is accessed only from the input_tasklet 2338 * there shouldn't be a need to synchronize; also, since we use 2339 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2340 * buffers 2341 */ 2342 2343 buf->pool_entry = pool_entry; 2344 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2345 buf->buffer->element[i].length = PAGE_SIZE; 2346 buf->buffer->element[i].addr = pool_entry->elements[i]; 2347 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2348 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; 2349 else 2350 buf->buffer->element[i].flags = 0; 2351 } 2352 return 0; 2353 } 2354 2355 int qeth_init_qdio_queues(struct qeth_card *card) 2356 { 2357 int i, j; 2358 int rc; 2359 2360 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2361 2362 /* inbound queue */ 2363 memset(card->qdio.in_q->qdio_bufs, 0, 2364 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2365 qeth_initialize_working_pool_list(card); 2366 /*give only as many buffers to hardware as we have buffer pool entries*/ 2367 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2368 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2369 card->qdio.in_q->next_buf_to_init = 2370 card->qdio.in_buf_pool.buf_count - 1; 2371 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2372 card->qdio.in_buf_pool.buf_count - 1); 2373 if (rc) { 2374 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2375 return rc; 2376 } 2377 /* outbound queue */ 2378 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2379 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2380 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2381 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2382 qeth_clear_output_buffer(card->qdio.out_qs[i], 2383 &card->qdio.out_qs[i]->bufs[j]); 2384 } 2385 card->qdio.out_qs[i]->card = card; 2386 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2387 card->qdio.out_qs[i]->do_pack = 0; 2388 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2389 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2390 atomic_set(&card->qdio.out_qs[i]->state, 2391 QETH_OUT_Q_UNLOCKED); 2392 } 2393 return 0; 2394 } 2395 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2396 2397 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2398 { 2399 switch (link_type) { 2400 case QETH_LINK_TYPE_HSTR: 2401 return 2; 2402 default: 2403 return 1; 2404 } 2405 } 2406 2407 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2408 struct qeth_ipa_cmd *cmd, __u8 command, 2409 enum qeth_prot_versions prot) 2410 { 2411 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2412 cmd->hdr.command = command; 2413 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2414 cmd->hdr.seqno = card->seqno.ipa; 2415 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2416 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2417 if (card->options.layer2) 2418 cmd->hdr.prim_version_no = 2; 2419 else 2420 cmd->hdr.prim_version_no = 1; 2421 cmd->hdr.param_count = 1; 2422 cmd->hdr.prot_version = prot; 2423 cmd->hdr.ipa_supported = 0; 2424 cmd->hdr.ipa_enabled = 0; 2425 } 2426 2427 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2428 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2429 { 2430 struct qeth_cmd_buffer *iob; 2431 struct qeth_ipa_cmd *cmd; 2432 2433 iob = qeth_wait_for_buffer(&card->write); 2434 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2435 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2436 2437 return iob; 2438 } 2439 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2440 2441 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2442 char prot_type) 2443 { 2444 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2445 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2446 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2447 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2448 } 2449 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2450 2451 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2452 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2453 unsigned long), 2454 void *reply_param) 2455 { 2456 int rc; 2457 char prot_type; 2458 2459 QETH_DBF_TEXT(TRACE, 4, "sendipa"); 2460 2461 if (card->options.layer2) 2462 if (card->info.type == QETH_CARD_TYPE_OSN) 2463 prot_type = QETH_PROT_OSN2; 2464 else 2465 prot_type = QETH_PROT_LAYER2; 2466 else 2467 prot_type = QETH_PROT_TCPIP; 2468 qeth_prepare_ipa_cmd(card, iob, prot_type); 2469 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2470 iob, reply_cb, reply_param); 2471 return rc; 2472 } 2473 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2474 2475 static int qeth_send_startstoplan(struct qeth_card *card, 2476 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2477 { 2478 int rc; 2479 struct qeth_cmd_buffer *iob; 2480 2481 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot); 2482 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2483 2484 return rc; 2485 } 2486 2487 int qeth_send_startlan(struct qeth_card *card) 2488 { 2489 int rc; 2490 2491 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2492 2493 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0); 2494 return rc; 2495 } 2496 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2497 2498 int qeth_send_stoplan(struct qeth_card *card) 2499 { 2500 int rc = 0; 2501 2502 /* 2503 * TODO: according to the IPA format document page 14, 2504 * TCP/IP (we!) never issue a STOPLAN 2505 * is this right ?!? 2506 */ 2507 QETH_DBF_TEXT(SETUP, 2, "stoplan"); 2508 2509 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0); 2510 return rc; 2511 } 2512 EXPORT_SYMBOL_GPL(qeth_send_stoplan); 2513 2514 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2515 struct qeth_reply *reply, unsigned long data) 2516 { 2517 struct qeth_ipa_cmd *cmd; 2518 2519 QETH_DBF_TEXT(TRACE, 4, "defadpcb"); 2520 2521 cmd = (struct qeth_ipa_cmd *) data; 2522 if (cmd->hdr.return_code == 0) 2523 cmd->hdr.return_code = 2524 cmd->data.setadapterparms.hdr.return_code; 2525 return 0; 2526 } 2527 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2528 2529 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2530 struct qeth_reply *reply, unsigned long data) 2531 { 2532 struct qeth_ipa_cmd *cmd; 2533 2534 QETH_DBF_TEXT(TRACE, 3, "quyadpcb"); 2535 2536 cmd = (struct qeth_ipa_cmd *) data; 2537 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) 2538 card->info.link_type = 2539 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2540 card->options.adp.supported_funcs = 2541 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2542 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2543 } 2544 2545 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2546 __u32 command, __u32 cmdlen) 2547 { 2548 struct qeth_cmd_buffer *iob; 2549 struct qeth_ipa_cmd *cmd; 2550 2551 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2552 QETH_PROT_IPV4); 2553 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2554 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2555 cmd->data.setadapterparms.hdr.command_code = command; 2556 cmd->data.setadapterparms.hdr.used_total = 1; 2557 cmd->data.setadapterparms.hdr.seq_no = 1; 2558 2559 return iob; 2560 } 2561 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2562 2563 int qeth_query_setadapterparms(struct qeth_card *card) 2564 { 2565 int rc; 2566 struct qeth_cmd_buffer *iob; 2567 2568 QETH_DBF_TEXT(TRACE, 3, "queryadp"); 2569 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2570 sizeof(struct qeth_ipacmd_setadpparms)); 2571 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2572 return rc; 2573 } 2574 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2575 2576 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error, 2577 const char *dbftext) 2578 { 2579 if (qdio_error) { 2580 QETH_DBF_TEXT(TRACE, 2, dbftext); 2581 QETH_DBF_TEXT(QERR, 2, dbftext); 2582 QETH_DBF_TEXT_(QERR, 2, " F15=%02X", 2583 buf->element[15].flags & 0xff); 2584 QETH_DBF_TEXT_(QERR, 2, " F14=%02X", 2585 buf->element[14].flags & 0xff); 2586 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error); 2587 return 1; 2588 } 2589 return 0; 2590 } 2591 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2592 2593 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2594 { 2595 struct qeth_qdio_q *queue = card->qdio.in_q; 2596 int count; 2597 int i; 2598 int rc; 2599 int newcount = 0; 2600 2601 count = (index < queue->next_buf_to_init)? 2602 card->qdio.in_buf_pool.buf_count - 2603 (queue->next_buf_to_init - index) : 2604 card->qdio.in_buf_pool.buf_count - 2605 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2606 /* only requeue at a certain threshold to avoid SIGAs */ 2607 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2608 for (i = queue->next_buf_to_init; 2609 i < queue->next_buf_to_init + count; ++i) { 2610 if (qeth_init_input_buffer(card, 2611 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2612 break; 2613 } else { 2614 newcount++; 2615 } 2616 } 2617 2618 if (newcount < count) { 2619 /* we are in memory shortage so we switch back to 2620 traditional skb allocation and drop packages */ 2621 atomic_set(&card->force_alloc_skb, 3); 2622 count = newcount; 2623 } else { 2624 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2625 } 2626 2627 /* 2628 * according to old code it should be avoided to requeue all 2629 * 128 buffers in order to benefit from PCI avoidance. 2630 * this function keeps at least one buffer (the buffer at 2631 * 'index') un-requeued -> this buffer is the first buffer that 2632 * will be requeued the next time 2633 */ 2634 if (card->options.performance_stats) { 2635 card->perf_stats.inbound_do_qdio_cnt++; 2636 card->perf_stats.inbound_do_qdio_start_time = 2637 qeth_get_micros(); 2638 } 2639 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2640 queue->next_buf_to_init, count); 2641 if (card->options.performance_stats) 2642 card->perf_stats.inbound_do_qdio_time += 2643 qeth_get_micros() - 2644 card->perf_stats.inbound_do_qdio_start_time; 2645 if (rc) { 2646 dev_warn(&card->gdev->dev, 2647 "QDIO reported an error, rc=%i\n", rc); 2648 QETH_DBF_TEXT(TRACE, 2, "qinberr"); 2649 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 2650 } 2651 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2652 QDIO_MAX_BUFFERS_PER_Q; 2653 } 2654 } 2655 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2656 2657 static int qeth_handle_send_error(struct qeth_card *card, 2658 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2659 { 2660 int sbalf15 = buffer->buffer->element[15].flags & 0xff; 2661 2662 QETH_DBF_TEXT(TRACE, 6, "hdsnderr"); 2663 if (card->info.type == QETH_CARD_TYPE_IQD) { 2664 if (sbalf15 == 0) { 2665 qdio_err = 0; 2666 } else { 2667 qdio_err = 1; 2668 } 2669 } 2670 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr"); 2671 2672 if (!qdio_err) 2673 return QETH_SEND_ERROR_NONE; 2674 2675 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2676 return QETH_SEND_ERROR_RETRY; 2677 2678 QETH_DBF_TEXT(TRACE, 1, "lnkfail"); 2679 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card)); 2680 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x", 2681 (u16)qdio_err, (u8)sbalf15); 2682 return QETH_SEND_ERROR_LINK_FAILURE; 2683 } 2684 2685 /* 2686 * Switched to packing state if the number of used buffers on a queue 2687 * reaches a certain limit. 2688 */ 2689 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2690 { 2691 if (!queue->do_pack) { 2692 if (atomic_read(&queue->used_buffers) 2693 >= QETH_HIGH_WATERMARK_PACK){ 2694 /* switch non-PACKING -> PACKING */ 2695 QETH_DBF_TEXT(TRACE, 6, "np->pack"); 2696 if (queue->card->options.performance_stats) 2697 queue->card->perf_stats.sc_dp_p++; 2698 queue->do_pack = 1; 2699 } 2700 } 2701 } 2702 2703 /* 2704 * Switches from packing to non-packing mode. If there is a packing 2705 * buffer on the queue this buffer will be prepared to be flushed. 2706 * In that case 1 is returned to inform the caller. If no buffer 2707 * has to be flushed, zero is returned. 2708 */ 2709 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2710 { 2711 struct qeth_qdio_out_buffer *buffer; 2712 int flush_count = 0; 2713 2714 if (queue->do_pack) { 2715 if (atomic_read(&queue->used_buffers) 2716 <= QETH_LOW_WATERMARK_PACK) { 2717 /* switch PACKING -> non-PACKING */ 2718 QETH_DBF_TEXT(TRACE, 6, "pack->np"); 2719 if (queue->card->options.performance_stats) 2720 queue->card->perf_stats.sc_p_dp++; 2721 queue->do_pack = 0; 2722 /* flush packing buffers */ 2723 buffer = &queue->bufs[queue->next_buf_to_fill]; 2724 if ((atomic_read(&buffer->state) == 2725 QETH_QDIO_BUF_EMPTY) && 2726 (buffer->next_element_to_fill > 0)) { 2727 atomic_set(&buffer->state, 2728 QETH_QDIO_BUF_PRIMED); 2729 flush_count++; 2730 queue->next_buf_to_fill = 2731 (queue->next_buf_to_fill + 1) % 2732 QDIO_MAX_BUFFERS_PER_Q; 2733 } 2734 } 2735 } 2736 return flush_count; 2737 } 2738 2739 /* 2740 * Called to flush a packing buffer if no more pci flags are on the queue. 2741 * Checks if there is a packing buffer and prepares it to be flushed. 2742 * In that case returns 1, otherwise zero. 2743 */ 2744 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2745 { 2746 struct qeth_qdio_out_buffer *buffer; 2747 2748 buffer = &queue->bufs[queue->next_buf_to_fill]; 2749 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2750 (buffer->next_element_to_fill > 0)) { 2751 /* it's a packing buffer */ 2752 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2753 queue->next_buf_to_fill = 2754 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2755 return 1; 2756 } 2757 return 0; 2758 } 2759 2760 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2761 int count) 2762 { 2763 struct qeth_qdio_out_buffer *buf; 2764 int rc; 2765 int i; 2766 unsigned int qdio_flags; 2767 2768 for (i = index; i < index + count; ++i) { 2769 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2770 buf->buffer->element[buf->next_element_to_fill - 1].flags |= 2771 SBAL_FLAGS_LAST_ENTRY; 2772 2773 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2774 continue; 2775 2776 if (!queue->do_pack) { 2777 if ((atomic_read(&queue->used_buffers) >= 2778 (QETH_HIGH_WATERMARK_PACK - 2779 QETH_WATERMARK_PACK_FUZZ)) && 2780 !atomic_read(&queue->set_pci_flags_count)) { 2781 /* it's likely that we'll go to packing 2782 * mode soon */ 2783 atomic_inc(&queue->set_pci_flags_count); 2784 buf->buffer->element[0].flags |= 0x40; 2785 } 2786 } else { 2787 if (!atomic_read(&queue->set_pci_flags_count)) { 2788 /* 2789 * there's no outstanding PCI any more, so we 2790 * have to request a PCI to be sure the the PCI 2791 * will wake at some time in the future then we 2792 * can flush packed buffers that might still be 2793 * hanging around, which can happen if no 2794 * further send was requested by the stack 2795 */ 2796 atomic_inc(&queue->set_pci_flags_count); 2797 buf->buffer->element[0].flags |= 0x40; 2798 } 2799 } 2800 } 2801 2802 queue->sync_iqdio_error = 0; 2803 queue->card->dev->trans_start = jiffies; 2804 if (queue->card->options.performance_stats) { 2805 queue->card->perf_stats.outbound_do_qdio_cnt++; 2806 queue->card->perf_stats.outbound_do_qdio_start_time = 2807 qeth_get_micros(); 2808 } 2809 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2810 if (atomic_read(&queue->set_pci_flags_count)) 2811 qdio_flags |= QDIO_FLAG_PCI_OUT; 2812 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2813 queue->queue_no, index, count); 2814 if (queue->card->options.performance_stats) 2815 queue->card->perf_stats.outbound_do_qdio_time += 2816 qeth_get_micros() - 2817 queue->card->perf_stats.outbound_do_qdio_start_time; 2818 if (rc > 0) { 2819 if (!(rc & QDIO_ERROR_SIGA_BUSY)) 2820 queue->sync_iqdio_error = rc & 3; 2821 } 2822 if (rc) { 2823 queue->card->stats.tx_errors += count; 2824 /* ignore temporary SIGA errors without busy condition */ 2825 if (rc == QDIO_ERROR_SIGA_TARGET) 2826 return; 2827 QETH_DBF_TEXT(TRACE, 2, "flushbuf"); 2828 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc); 2829 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card)); 2830 2831 /* this must not happen under normal circumstances. if it 2832 * happens something is really wrong -> recover */ 2833 qeth_schedule_recovery(queue->card); 2834 return; 2835 } 2836 atomic_add(count, &queue->used_buffers); 2837 if (queue->card->options.performance_stats) 2838 queue->card->perf_stats.bufs_sent += count; 2839 } 2840 2841 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2842 { 2843 int index; 2844 int flush_cnt = 0; 2845 int q_was_packing = 0; 2846 2847 /* 2848 * check if weed have to switch to non-packing mode or if 2849 * we have to get a pci flag out on the queue 2850 */ 2851 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2852 !atomic_read(&queue->set_pci_flags_count)) { 2853 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2854 QETH_OUT_Q_UNLOCKED) { 2855 /* 2856 * If we get in here, there was no action in 2857 * do_send_packet. So, we check if there is a 2858 * packing buffer to be flushed here. 2859 */ 2860 netif_stop_queue(queue->card->dev); 2861 index = queue->next_buf_to_fill; 2862 q_was_packing = queue->do_pack; 2863 /* queue->do_pack may change */ 2864 barrier(); 2865 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 2866 if (!flush_cnt && 2867 !atomic_read(&queue->set_pci_flags_count)) 2868 flush_cnt += 2869 qeth_flush_buffers_on_no_pci(queue); 2870 if (queue->card->options.performance_stats && 2871 q_was_packing) 2872 queue->card->perf_stats.bufs_sent_pack += 2873 flush_cnt; 2874 if (flush_cnt) 2875 qeth_flush_buffers(queue, index, flush_cnt); 2876 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 2877 } 2878 } 2879 } 2880 2881 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 2882 unsigned int qdio_error, int __queue, int first_element, 2883 int count, unsigned long card_ptr) 2884 { 2885 struct qeth_card *card = (struct qeth_card *) card_ptr; 2886 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 2887 struct qeth_qdio_out_buffer *buffer; 2888 int i; 2889 unsigned qeth_send_err; 2890 2891 QETH_DBF_TEXT(TRACE, 6, "qdouhdl"); 2892 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 2893 QETH_DBF_TEXT(TRACE, 2, "achkcond"); 2894 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 2895 netif_stop_queue(card->dev); 2896 qeth_schedule_recovery(card); 2897 return; 2898 } 2899 if (card->options.performance_stats) { 2900 card->perf_stats.outbound_handler_cnt++; 2901 card->perf_stats.outbound_handler_start_time = 2902 qeth_get_micros(); 2903 } 2904 for (i = first_element; i < (first_element + count); ++i) { 2905 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2906 qeth_send_err = qeth_handle_send_error(card, buffer, qdio_error); 2907 __qeth_clear_output_buffer(queue, buffer, 2908 (qeth_send_err == QETH_SEND_ERROR_RETRY) ? 1 : 0); 2909 } 2910 atomic_sub(count, &queue->used_buffers); 2911 /* check if we need to do something on this outbound queue */ 2912 if (card->info.type != QETH_CARD_TYPE_IQD) 2913 qeth_check_outbound_queue(queue); 2914 2915 netif_wake_queue(queue->card->dev); 2916 if (card->options.performance_stats) 2917 card->perf_stats.outbound_handler_time += qeth_get_micros() - 2918 card->perf_stats.outbound_handler_start_time; 2919 } 2920 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 2921 2922 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 2923 int ipv, int cast_type) 2924 { 2925 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE)) 2926 return card->qdio.default_out_queue; 2927 switch (card->qdio.no_out_queues) { 2928 case 4: 2929 if (cast_type && card->info.is_multicast_different) 2930 return card->info.is_multicast_different & 2931 (card->qdio.no_out_queues - 1); 2932 if (card->qdio.do_prio_queueing && (ipv == 4)) { 2933 const u8 tos = ip_hdr(skb)->tos; 2934 2935 if (card->qdio.do_prio_queueing == 2936 QETH_PRIO_Q_ING_TOS) { 2937 if (tos & IP_TOS_NOTIMPORTANT) 2938 return 3; 2939 if (tos & IP_TOS_HIGHRELIABILITY) 2940 return 2; 2941 if (tos & IP_TOS_HIGHTHROUGHPUT) 2942 return 1; 2943 if (tos & IP_TOS_LOWDELAY) 2944 return 0; 2945 } 2946 if (card->qdio.do_prio_queueing == 2947 QETH_PRIO_Q_ING_PREC) 2948 return 3 - (tos >> 6); 2949 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 2950 /* TODO: IPv6!!! */ 2951 } 2952 return card->qdio.default_out_queue; 2953 case 1: /* fallthrough for single-out-queue 1920-device */ 2954 default: 2955 return card->qdio.default_out_queue; 2956 } 2957 } 2958 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 2959 2960 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 2961 struct sk_buff *skb, int elems) 2962 { 2963 int elements_needed = 0; 2964 2965 if (skb_shinfo(skb)->nr_frags > 0) 2966 elements_needed = (skb_shinfo(skb)->nr_frags + 1); 2967 if (elements_needed == 0) 2968 elements_needed = 1 + (((((unsigned long) skb->data) % 2969 PAGE_SIZE) + skb->len) >> PAGE_SHIFT); 2970 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 2971 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 2972 "(Number=%d / Length=%d). Discarded.\n", 2973 (elements_needed+elems), skb->len); 2974 return 0; 2975 } 2976 return elements_needed; 2977 } 2978 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 2979 2980 static inline void __qeth_fill_buffer(struct sk_buff *skb, 2981 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 2982 int offset) 2983 { 2984 int length = skb->len; 2985 int length_here; 2986 int element; 2987 char *data; 2988 int first_lap ; 2989 2990 element = *next_element_to_fill; 2991 data = skb->data; 2992 first_lap = (is_tso == 0 ? 1 : 0); 2993 2994 if (offset >= 0) { 2995 data = skb->data + offset; 2996 length -= offset; 2997 first_lap = 0; 2998 } 2999 3000 while (length > 0) { 3001 /* length_here is the remaining amount of data in this page */ 3002 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3003 if (length < length_here) 3004 length_here = length; 3005 3006 buffer->element[element].addr = data; 3007 buffer->element[element].length = length_here; 3008 length -= length_here; 3009 if (!length) { 3010 if (first_lap) 3011 buffer->element[element].flags = 0; 3012 else 3013 buffer->element[element].flags = 3014 SBAL_FLAGS_LAST_FRAG; 3015 } else { 3016 if (first_lap) 3017 buffer->element[element].flags = 3018 SBAL_FLAGS_FIRST_FRAG; 3019 else 3020 buffer->element[element].flags = 3021 SBAL_FLAGS_MIDDLE_FRAG; 3022 } 3023 data += length_here; 3024 element++; 3025 first_lap = 0; 3026 } 3027 *next_element_to_fill = element; 3028 } 3029 3030 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3031 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3032 struct qeth_hdr *hdr, int offset, int hd_len) 3033 { 3034 struct qdio_buffer *buffer; 3035 int flush_cnt = 0, hdr_len, large_send = 0; 3036 3037 buffer = buf->buffer; 3038 atomic_inc(&skb->users); 3039 skb_queue_tail(&buf->skb_list, skb); 3040 3041 /*check first on TSO ....*/ 3042 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3043 int element = buf->next_element_to_fill; 3044 3045 hdr_len = sizeof(struct qeth_hdr_tso) + 3046 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3047 /*fill first buffer entry only with header information */ 3048 buffer->element[element].addr = skb->data; 3049 buffer->element[element].length = hdr_len; 3050 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3051 buf->next_element_to_fill++; 3052 skb->data += hdr_len; 3053 skb->len -= hdr_len; 3054 large_send = 1; 3055 } 3056 3057 if (offset >= 0) { 3058 int element = buf->next_element_to_fill; 3059 buffer->element[element].addr = hdr; 3060 buffer->element[element].length = sizeof(struct qeth_hdr) + 3061 hd_len; 3062 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3063 buf->is_header[element] = 1; 3064 buf->next_element_to_fill++; 3065 } 3066 3067 if (skb_shinfo(skb)->nr_frags == 0) 3068 __qeth_fill_buffer(skb, buffer, large_send, 3069 (int *)&buf->next_element_to_fill, offset); 3070 else 3071 __qeth_fill_buffer_frag(skb, buffer, large_send, 3072 (int *)&buf->next_element_to_fill); 3073 3074 if (!queue->do_pack) { 3075 QETH_DBF_TEXT(TRACE, 6, "fillbfnp"); 3076 /* set state to PRIMED -> will be flushed */ 3077 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3078 flush_cnt = 1; 3079 } else { 3080 QETH_DBF_TEXT(TRACE, 6, "fillbfpa"); 3081 if (queue->card->options.performance_stats) 3082 queue->card->perf_stats.skbs_sent_pack++; 3083 if (buf->next_element_to_fill >= 3084 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3085 /* 3086 * packed buffer if full -> set state PRIMED 3087 * -> will be flushed 3088 */ 3089 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3090 flush_cnt = 1; 3091 } 3092 } 3093 return flush_cnt; 3094 } 3095 3096 int qeth_do_send_packet_fast(struct qeth_card *card, 3097 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3098 struct qeth_hdr *hdr, int elements_needed, 3099 int offset, int hd_len) 3100 { 3101 struct qeth_qdio_out_buffer *buffer; 3102 struct sk_buff *skb1; 3103 struct qeth_skb_data *retry_ctrl; 3104 int index; 3105 int rc; 3106 3107 /* spin until we get the queue ... */ 3108 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3109 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3110 /* ... now we've got the queue */ 3111 index = queue->next_buf_to_fill; 3112 buffer = &queue->bufs[queue->next_buf_to_fill]; 3113 /* 3114 * check if buffer is empty to make sure that we do not 'overtake' 3115 * ourselves and try to fill a buffer that is already primed 3116 */ 3117 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3118 goto out; 3119 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3120 QDIO_MAX_BUFFERS_PER_Q; 3121 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3122 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3123 qeth_flush_buffers(queue, index, 1); 3124 if (queue->sync_iqdio_error == 2) { 3125 skb1 = skb_dequeue(&buffer->skb_list); 3126 while (skb1) { 3127 atomic_dec(&skb1->users); 3128 skb1 = skb_dequeue(&buffer->skb_list); 3129 } 3130 retry_ctrl = (struct qeth_skb_data *) &skb->cb[16]; 3131 if (retry_ctrl->magic != QETH_SKB_MAGIC) { 3132 retry_ctrl->magic = QETH_SKB_MAGIC; 3133 retry_ctrl->count = 0; 3134 } 3135 if (retry_ctrl->count < QETH_SIGA_CC2_RETRIES) { 3136 retry_ctrl->count++; 3137 rc = dev_queue_xmit(skb); 3138 } else { 3139 dev_kfree_skb_any(skb); 3140 QETH_DBF_TEXT(QERR, 2, "qrdrop"); 3141 } 3142 } 3143 return 0; 3144 out: 3145 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3146 return -EBUSY; 3147 } 3148 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3149 3150 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3151 struct sk_buff *skb, struct qeth_hdr *hdr, 3152 int elements_needed) 3153 { 3154 struct qeth_qdio_out_buffer *buffer; 3155 int start_index; 3156 int flush_count = 0; 3157 int do_pack = 0; 3158 int tmp; 3159 int rc = 0; 3160 3161 /* spin until we get the queue ... */ 3162 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3163 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3164 start_index = queue->next_buf_to_fill; 3165 buffer = &queue->bufs[queue->next_buf_to_fill]; 3166 /* 3167 * check if buffer is empty to make sure that we do not 'overtake' 3168 * ourselves and try to fill a buffer that is already primed 3169 */ 3170 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3171 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3172 return -EBUSY; 3173 } 3174 /* check if we need to switch packing state of this queue */ 3175 qeth_switch_to_packing_if_needed(queue); 3176 if (queue->do_pack) { 3177 do_pack = 1; 3178 /* does packet fit in current buffer? */ 3179 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3180 buffer->next_element_to_fill) < elements_needed) { 3181 /* ... no -> set state PRIMED */ 3182 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3183 flush_count++; 3184 queue->next_buf_to_fill = 3185 (queue->next_buf_to_fill + 1) % 3186 QDIO_MAX_BUFFERS_PER_Q; 3187 buffer = &queue->bufs[queue->next_buf_to_fill]; 3188 /* we did a step forward, so check buffer state 3189 * again */ 3190 if (atomic_read(&buffer->state) != 3191 QETH_QDIO_BUF_EMPTY) { 3192 qeth_flush_buffers(queue, start_index, 3193 flush_count); 3194 atomic_set(&queue->state, 3195 QETH_OUT_Q_UNLOCKED); 3196 return -EBUSY; 3197 } 3198 } 3199 } 3200 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3201 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3202 QDIO_MAX_BUFFERS_PER_Q; 3203 flush_count += tmp; 3204 if (flush_count) 3205 qeth_flush_buffers(queue, start_index, flush_count); 3206 else if (!atomic_read(&queue->set_pci_flags_count)) 3207 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3208 /* 3209 * queue->state will go from LOCKED -> UNLOCKED or from 3210 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3211 * (switch packing state or flush buffer to get another pci flag out). 3212 * In that case we will enter this loop 3213 */ 3214 while (atomic_dec_return(&queue->state)) { 3215 flush_count = 0; 3216 start_index = queue->next_buf_to_fill; 3217 /* check if we can go back to non-packing state */ 3218 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3219 /* 3220 * check if we need to flush a packing buffer to get a pci 3221 * flag out on the queue 3222 */ 3223 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3224 flush_count += qeth_flush_buffers_on_no_pci(queue); 3225 if (flush_count) 3226 qeth_flush_buffers(queue, start_index, flush_count); 3227 } 3228 /* at this point the queue is UNLOCKED again */ 3229 if (queue->card->options.performance_stats && do_pack) 3230 queue->card->perf_stats.bufs_sent_pack += flush_count; 3231 3232 return rc; 3233 } 3234 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3235 3236 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3237 struct qeth_reply *reply, unsigned long data) 3238 { 3239 struct qeth_ipa_cmd *cmd; 3240 struct qeth_ipacmd_setadpparms *setparms; 3241 3242 QETH_DBF_TEXT(TRACE, 4, "prmadpcb"); 3243 3244 cmd = (struct qeth_ipa_cmd *) data; 3245 setparms = &(cmd->data.setadapterparms); 3246 3247 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3248 if (cmd->hdr.return_code) { 3249 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code); 3250 setparms->data.mode = SET_PROMISC_MODE_OFF; 3251 } 3252 card->info.promisc_mode = setparms->data.mode; 3253 return 0; 3254 } 3255 3256 void qeth_setadp_promisc_mode(struct qeth_card *card) 3257 { 3258 enum qeth_ipa_promisc_modes mode; 3259 struct net_device *dev = card->dev; 3260 struct qeth_cmd_buffer *iob; 3261 struct qeth_ipa_cmd *cmd; 3262 3263 QETH_DBF_TEXT(TRACE, 4, "setprom"); 3264 3265 if (((dev->flags & IFF_PROMISC) && 3266 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3267 (!(dev->flags & IFF_PROMISC) && 3268 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3269 return; 3270 mode = SET_PROMISC_MODE_OFF; 3271 if (dev->flags & IFF_PROMISC) 3272 mode = SET_PROMISC_MODE_ON; 3273 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode); 3274 3275 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3276 sizeof(struct qeth_ipacmd_setadpparms)); 3277 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3278 cmd->data.setadapterparms.data.mode = mode; 3279 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3280 } 3281 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3282 3283 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3284 { 3285 struct qeth_card *card; 3286 char dbf_text[15]; 3287 3288 card = dev->ml_priv; 3289 3290 QETH_DBF_TEXT(TRACE, 4, "chgmtu"); 3291 sprintf(dbf_text, "%8x", new_mtu); 3292 QETH_DBF_TEXT(TRACE, 4, dbf_text); 3293 3294 if (new_mtu < 64) 3295 return -EINVAL; 3296 if (new_mtu > 65535) 3297 return -EINVAL; 3298 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3299 (!qeth_mtu_is_valid(card, new_mtu))) 3300 return -EINVAL; 3301 dev->mtu = new_mtu; 3302 return 0; 3303 } 3304 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3305 3306 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3307 { 3308 struct qeth_card *card; 3309 3310 card = dev->ml_priv; 3311 3312 QETH_DBF_TEXT(TRACE, 5, "getstat"); 3313 3314 return &card->stats; 3315 } 3316 EXPORT_SYMBOL_GPL(qeth_get_stats); 3317 3318 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3319 struct qeth_reply *reply, unsigned long data) 3320 { 3321 struct qeth_ipa_cmd *cmd; 3322 3323 QETH_DBF_TEXT(TRACE, 4, "chgmaccb"); 3324 3325 cmd = (struct qeth_ipa_cmd *) data; 3326 if (!card->options.layer2 || 3327 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3328 memcpy(card->dev->dev_addr, 3329 &cmd->data.setadapterparms.data.change_addr.addr, 3330 OSA_ADDR_LEN); 3331 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3332 } 3333 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3334 return 0; 3335 } 3336 3337 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3338 { 3339 int rc; 3340 struct qeth_cmd_buffer *iob; 3341 struct qeth_ipa_cmd *cmd; 3342 3343 QETH_DBF_TEXT(TRACE, 4, "chgmac"); 3344 3345 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3346 sizeof(struct qeth_ipacmd_setadpparms)); 3347 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3348 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3349 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3350 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3351 card->dev->dev_addr, OSA_ADDR_LEN); 3352 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3353 NULL); 3354 return rc; 3355 } 3356 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3357 3358 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 3359 struct qeth_reply *reply, unsigned long data) 3360 { 3361 struct qeth_ipa_cmd *cmd; 3362 struct qeth_set_access_ctrl *access_ctrl_req; 3363 int rc; 3364 3365 QETH_DBF_TEXT(TRACE, 4, "setaccb"); 3366 3367 cmd = (struct qeth_ipa_cmd *) data; 3368 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3369 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 3370 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3371 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 3372 cmd->data.setadapterparms.hdr.return_code); 3373 switch (cmd->data.setadapterparms.hdr.return_code) { 3374 case SET_ACCESS_CTRL_RC_SUCCESS: 3375 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 3376 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 3377 { 3378 card->options.isolation = access_ctrl_req->subcmd_code; 3379 if (card->options.isolation == ISOLATION_MODE_NONE) { 3380 dev_info(&card->gdev->dev, 3381 "QDIO data connection isolation is deactivated\n"); 3382 } else { 3383 dev_info(&card->gdev->dev, 3384 "QDIO data connection isolation is activated\n"); 3385 } 3386 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 3387 card->gdev->dev.kobj.name, 3388 access_ctrl_req->subcmd_code, 3389 cmd->data.setadapterparms.hdr.return_code); 3390 rc = 0; 3391 break; 3392 } 3393 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 3394 { 3395 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 3396 card->gdev->dev.kobj.name, 3397 access_ctrl_req->subcmd_code, 3398 cmd->data.setadapterparms.hdr.return_code); 3399 dev_err(&card->gdev->dev, "Adapter does not " 3400 "support QDIO data connection isolation\n"); 3401 3402 /* ensure isolation mode is "none" */ 3403 card->options.isolation = ISOLATION_MODE_NONE; 3404 rc = -EOPNOTSUPP; 3405 break; 3406 } 3407 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 3408 { 3409 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3410 card->gdev->dev.kobj.name, 3411 access_ctrl_req->subcmd_code, 3412 cmd->data.setadapterparms.hdr.return_code); 3413 dev_err(&card->gdev->dev, 3414 "Adapter is dedicated. " 3415 "QDIO data connection isolation not supported\n"); 3416 3417 /* ensure isolation mode is "none" */ 3418 card->options.isolation = ISOLATION_MODE_NONE; 3419 rc = -EOPNOTSUPP; 3420 break; 3421 } 3422 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 3423 { 3424 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3425 card->gdev->dev.kobj.name, 3426 access_ctrl_req->subcmd_code, 3427 cmd->data.setadapterparms.hdr.return_code); 3428 dev_err(&card->gdev->dev, 3429 "TSO does not permit QDIO data connection isolation\n"); 3430 3431 /* ensure isolation mode is "none" */ 3432 card->options.isolation = ISOLATION_MODE_NONE; 3433 rc = -EPERM; 3434 break; 3435 } 3436 default: 3437 { 3438 /* this should never happen */ 3439 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 3440 "==UNKNOWN\n", 3441 card->gdev->dev.kobj.name, 3442 access_ctrl_req->subcmd_code, 3443 cmd->data.setadapterparms.hdr.return_code); 3444 3445 /* ensure isolation mode is "none" */ 3446 card->options.isolation = ISOLATION_MODE_NONE; 3447 rc = 0; 3448 break; 3449 } 3450 } 3451 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3452 return rc; 3453 } 3454 3455 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 3456 enum qeth_ipa_isolation_modes isolation) 3457 { 3458 int rc; 3459 struct qeth_cmd_buffer *iob; 3460 struct qeth_ipa_cmd *cmd; 3461 struct qeth_set_access_ctrl *access_ctrl_req; 3462 3463 QETH_DBF_TEXT(TRACE, 4, "setacctl"); 3464 3465 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 3466 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3467 3468 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 3469 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 3470 sizeof(struct qeth_set_access_ctrl)); 3471 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3472 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3473 access_ctrl_req->subcmd_code = isolation; 3474 3475 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 3476 NULL); 3477 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 3478 return rc; 3479 } 3480 3481 int qeth_set_access_ctrl_online(struct qeth_card *card) 3482 { 3483 int rc = 0; 3484 3485 QETH_DBF_TEXT(TRACE, 4, "setactlo"); 3486 3487 if (card->info.type == QETH_CARD_TYPE_OSAE && 3488 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 3489 rc = qeth_setadpparms_set_access_ctrl(card, 3490 card->options.isolation); 3491 if (rc) { 3492 QETH_DBF_MESSAGE(3, 3493 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed", 3494 card->gdev->dev.kobj.name, 3495 rc); 3496 } 3497 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 3498 card->options.isolation = ISOLATION_MODE_NONE; 3499 3500 dev_err(&card->gdev->dev, "Adapter does not " 3501 "support QDIO data connection isolation\n"); 3502 rc = -EOPNOTSUPP; 3503 } 3504 return rc; 3505 } 3506 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 3507 3508 void qeth_tx_timeout(struct net_device *dev) 3509 { 3510 struct qeth_card *card; 3511 3512 card = dev->ml_priv; 3513 card->stats.tx_errors++; 3514 qeth_schedule_recovery(card); 3515 } 3516 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3517 3518 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3519 { 3520 struct qeth_card *card = dev->ml_priv; 3521 int rc = 0; 3522 3523 switch (regnum) { 3524 case MII_BMCR: /* Basic mode control register */ 3525 rc = BMCR_FULLDPLX; 3526 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3527 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3528 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3529 rc |= BMCR_SPEED100; 3530 break; 3531 case MII_BMSR: /* Basic mode status register */ 3532 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3533 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3534 BMSR_100BASE4; 3535 break; 3536 case MII_PHYSID1: /* PHYS ID 1 */ 3537 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3538 dev->dev_addr[2]; 3539 rc = (rc >> 5) & 0xFFFF; 3540 break; 3541 case MII_PHYSID2: /* PHYS ID 2 */ 3542 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3543 break; 3544 case MII_ADVERTISE: /* Advertisement control reg */ 3545 rc = ADVERTISE_ALL; 3546 break; 3547 case MII_LPA: /* Link partner ability reg */ 3548 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3549 LPA_100BASE4 | LPA_LPACK; 3550 break; 3551 case MII_EXPANSION: /* Expansion register */ 3552 break; 3553 case MII_DCOUNTER: /* disconnect counter */ 3554 break; 3555 case MII_FCSCOUNTER: /* false carrier counter */ 3556 break; 3557 case MII_NWAYTEST: /* N-way auto-neg test register */ 3558 break; 3559 case MII_RERRCOUNTER: /* rx error counter */ 3560 rc = card->stats.rx_errors; 3561 break; 3562 case MII_SREVISION: /* silicon revision */ 3563 break; 3564 case MII_RESV1: /* reserved 1 */ 3565 break; 3566 case MII_LBRERROR: /* loopback, rx, bypass error */ 3567 break; 3568 case MII_PHYADDR: /* physical address */ 3569 break; 3570 case MII_RESV2: /* reserved 2 */ 3571 break; 3572 case MII_TPISTATUS: /* TPI status for 10mbps */ 3573 break; 3574 case MII_NCONFIG: /* network interface config */ 3575 break; 3576 default: 3577 break; 3578 } 3579 return rc; 3580 } 3581 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3582 3583 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3584 struct qeth_cmd_buffer *iob, int len, 3585 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3586 unsigned long), 3587 void *reply_param) 3588 { 3589 u16 s1, s2; 3590 3591 QETH_DBF_TEXT(TRACE, 4, "sendsnmp"); 3592 3593 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3594 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3595 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3596 /* adjust PDU length fields in IPA_PDU_HEADER */ 3597 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3598 s2 = (u32) len; 3599 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3600 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3601 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3602 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3603 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3604 reply_cb, reply_param); 3605 } 3606 3607 static int qeth_snmp_command_cb(struct qeth_card *card, 3608 struct qeth_reply *reply, unsigned long sdata) 3609 { 3610 struct qeth_ipa_cmd *cmd; 3611 struct qeth_arp_query_info *qinfo; 3612 struct qeth_snmp_cmd *snmp; 3613 unsigned char *data; 3614 __u16 data_len; 3615 3616 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb"); 3617 3618 cmd = (struct qeth_ipa_cmd *) sdata; 3619 data = (unsigned char *)((char *)cmd - reply->offset); 3620 qinfo = (struct qeth_arp_query_info *) reply->param; 3621 snmp = &cmd->data.setadapterparms.data.snmp; 3622 3623 if (cmd->hdr.return_code) { 3624 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code); 3625 return 0; 3626 } 3627 if (cmd->data.setadapterparms.hdr.return_code) { 3628 cmd->hdr.return_code = 3629 cmd->data.setadapterparms.hdr.return_code; 3630 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code); 3631 return 0; 3632 } 3633 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3634 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3635 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3636 else 3637 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3638 3639 /* check if there is enough room in userspace */ 3640 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3641 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM); 3642 cmd->hdr.return_code = -ENOMEM; 3643 return 0; 3644 } 3645 QETH_DBF_TEXT_(TRACE, 4, "snore%i", 3646 cmd->data.setadapterparms.hdr.used_total); 3647 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i", 3648 cmd->data.setadapterparms.hdr.seq_no); 3649 /*copy entries to user buffer*/ 3650 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3651 memcpy(qinfo->udata + qinfo->udata_offset, 3652 (char *)snmp, 3653 data_len + offsetof(struct qeth_snmp_cmd, data)); 3654 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3655 } else { 3656 memcpy(qinfo->udata + qinfo->udata_offset, 3657 (char *)&snmp->request, data_len); 3658 } 3659 qinfo->udata_offset += data_len; 3660 /* check if all replies received ... */ 3661 QETH_DBF_TEXT_(TRACE, 4, "srtot%i", 3662 cmd->data.setadapterparms.hdr.used_total); 3663 QETH_DBF_TEXT_(TRACE, 4, "srseq%i", 3664 cmd->data.setadapterparms.hdr.seq_no); 3665 if (cmd->data.setadapterparms.hdr.seq_no < 3666 cmd->data.setadapterparms.hdr.used_total) 3667 return 1; 3668 return 0; 3669 } 3670 3671 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3672 { 3673 struct qeth_cmd_buffer *iob; 3674 struct qeth_ipa_cmd *cmd; 3675 struct qeth_snmp_ureq *ureq; 3676 int req_len; 3677 struct qeth_arp_query_info qinfo = {0, }; 3678 int rc = 0; 3679 3680 QETH_DBF_TEXT(TRACE, 3, "snmpcmd"); 3681 3682 if (card->info.guestlan) 3683 return -EOPNOTSUPP; 3684 3685 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3686 (!card->options.layer2)) { 3687 return -EOPNOTSUPP; 3688 } 3689 /* skip 4 bytes (data_len struct member) to get req_len */ 3690 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3691 return -EFAULT; 3692 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL); 3693 if (!ureq) { 3694 QETH_DBF_TEXT(TRACE, 2, "snmpnome"); 3695 return -ENOMEM; 3696 } 3697 if (copy_from_user(ureq, udata, 3698 req_len + sizeof(struct qeth_snmp_ureq_hdr))) { 3699 kfree(ureq); 3700 return -EFAULT; 3701 } 3702 qinfo.udata_len = ureq->hdr.data_len; 3703 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3704 if (!qinfo.udata) { 3705 kfree(ureq); 3706 return -ENOMEM; 3707 } 3708 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3709 3710 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3711 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3712 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3713 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3714 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3715 qeth_snmp_command_cb, (void *)&qinfo); 3716 if (rc) 3717 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3718 QETH_CARD_IFNAME(card), rc); 3719 else { 3720 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3721 rc = -EFAULT; 3722 } 3723 3724 kfree(ureq); 3725 kfree(qinfo.udata); 3726 return rc; 3727 } 3728 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3729 3730 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3731 { 3732 switch (card->info.type) { 3733 case QETH_CARD_TYPE_IQD: 3734 return 2; 3735 default: 3736 return 0; 3737 } 3738 } 3739 3740 static int qeth_qdio_establish(struct qeth_card *card) 3741 { 3742 struct qdio_initialize init_data; 3743 char *qib_param_field; 3744 struct qdio_buffer **in_sbal_ptrs; 3745 struct qdio_buffer **out_sbal_ptrs; 3746 int i, j, k; 3747 int rc = 0; 3748 3749 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3750 3751 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3752 GFP_KERNEL); 3753 if (!qib_param_field) 3754 return -ENOMEM; 3755 3756 qeth_create_qib_param_field(card, qib_param_field); 3757 qeth_create_qib_param_field_blkt(card, qib_param_field); 3758 3759 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3760 GFP_KERNEL); 3761 if (!in_sbal_ptrs) { 3762 kfree(qib_param_field); 3763 return -ENOMEM; 3764 } 3765 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3766 in_sbal_ptrs[i] = (struct qdio_buffer *) 3767 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3768 3769 out_sbal_ptrs = 3770 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3771 sizeof(void *), GFP_KERNEL); 3772 if (!out_sbal_ptrs) { 3773 kfree(in_sbal_ptrs); 3774 kfree(qib_param_field); 3775 return -ENOMEM; 3776 } 3777 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3778 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3779 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3780 card->qdio.out_qs[i]->bufs[j].buffer); 3781 } 3782 3783 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3784 init_data.cdev = CARD_DDEV(card); 3785 init_data.q_format = qeth_get_qdio_q_format(card); 3786 init_data.qib_param_field_format = 0; 3787 init_data.qib_param_field = qib_param_field; 3788 init_data.no_input_qs = 1; 3789 init_data.no_output_qs = card->qdio.no_out_queues; 3790 init_data.input_handler = card->discipline.input_handler; 3791 init_data.output_handler = card->discipline.output_handler; 3792 init_data.int_parm = (unsigned long) card; 3793 init_data.flags = QDIO_INBOUND_0COPY_SBALS | 3794 QDIO_OUTBOUND_0COPY_SBALS | 3795 QDIO_USE_OUTBOUND_PCIS; 3796 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3797 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3798 3799 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3800 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3801 rc = qdio_initialize(&init_data); 3802 if (rc) 3803 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3804 } 3805 kfree(out_sbal_ptrs); 3806 kfree(in_sbal_ptrs); 3807 kfree(qib_param_field); 3808 return rc; 3809 } 3810 3811 static void qeth_core_free_card(struct qeth_card *card) 3812 { 3813 3814 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 3815 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 3816 qeth_clean_channel(&card->read); 3817 qeth_clean_channel(&card->write); 3818 if (card->dev) 3819 free_netdev(card->dev); 3820 kfree(card->ip_tbd_list); 3821 qeth_free_qdio_buffers(card); 3822 unregister_service_level(&card->qeth_service_level); 3823 kfree(card); 3824 } 3825 3826 static struct ccw_device_id qeth_ids[] = { 3827 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE}, 3828 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD}, 3829 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN}, 3830 {}, 3831 }; 3832 MODULE_DEVICE_TABLE(ccw, qeth_ids); 3833 3834 static struct ccw_driver qeth_ccw_driver = { 3835 .name = "qeth", 3836 .ids = qeth_ids, 3837 .probe = ccwgroup_probe_ccwdev, 3838 .remove = ccwgroup_remove_ccwdev, 3839 }; 3840 3841 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 3842 unsigned long driver_id) 3843 { 3844 return ccwgroup_create_from_string(root_dev, driver_id, 3845 &qeth_ccw_driver, 3, buf); 3846 } 3847 3848 int qeth_core_hardsetup_card(struct qeth_card *card) 3849 { 3850 struct qdio_ssqd_desc *ssqd; 3851 int retries = 0; 3852 int mpno = 0; 3853 int rc; 3854 3855 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 3856 atomic_set(&card->force_alloc_skb, 0); 3857 retry: 3858 if (retries) 3859 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 3860 dev_name(&card->gdev->dev)); 3861 ccw_device_set_offline(CARD_DDEV(card)); 3862 ccw_device_set_offline(CARD_WDEV(card)); 3863 ccw_device_set_offline(CARD_RDEV(card)); 3864 rc = ccw_device_set_online(CARD_RDEV(card)); 3865 if (rc) 3866 goto retriable; 3867 rc = ccw_device_set_online(CARD_WDEV(card)); 3868 if (rc) 3869 goto retriable; 3870 rc = ccw_device_set_online(CARD_DDEV(card)); 3871 if (rc) 3872 goto retriable; 3873 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 3874 retriable: 3875 if (rc == -ERESTARTSYS) { 3876 QETH_DBF_TEXT(SETUP, 2, "break1"); 3877 return rc; 3878 } else if (rc) { 3879 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 3880 if (++retries > 3) 3881 goto out; 3882 else 3883 goto retry; 3884 } 3885 3886 rc = qeth_get_unitaddr(card); 3887 if (rc) { 3888 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 3889 return rc; 3890 } 3891 3892 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL); 3893 if (!ssqd) { 3894 rc = -ENOMEM; 3895 goto out; 3896 } 3897 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd); 3898 if (rc == 0) 3899 mpno = ssqd->pcnt; 3900 kfree(ssqd); 3901 3902 if (mpno) 3903 mpno = min(mpno - 1, QETH_MAX_PORTNO); 3904 if (card->info.portno > mpno) { 3905 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d" 3906 "\n.", CARD_BUS_ID(card), card->info.portno); 3907 rc = -ENODEV; 3908 goto out; 3909 } 3910 qeth_init_tokens(card); 3911 qeth_init_func_level(card); 3912 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 3913 if (rc == -ERESTARTSYS) { 3914 QETH_DBF_TEXT(SETUP, 2, "break2"); 3915 return rc; 3916 } else if (rc) { 3917 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3918 if (--retries < 0) 3919 goto out; 3920 else 3921 goto retry; 3922 } 3923 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 3924 if (rc == -ERESTARTSYS) { 3925 QETH_DBF_TEXT(SETUP, 2, "break3"); 3926 return rc; 3927 } else if (rc) { 3928 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 3929 if (--retries < 0) 3930 goto out; 3931 else 3932 goto retry; 3933 } 3934 rc = qeth_mpc_initialize(card); 3935 if (rc) { 3936 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3937 goto out; 3938 } 3939 return 0; 3940 out: 3941 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 3942 "an error on the device\n"); 3943 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 3944 dev_name(&card->gdev->dev), rc); 3945 return rc; 3946 } 3947 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 3948 3949 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 3950 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 3951 { 3952 struct page *page = virt_to_page(element->addr); 3953 if (*pskb == NULL) { 3954 /* the upper protocol layers assume that there is data in the 3955 * skb itself. Copy a small amount (64 bytes) to make them 3956 * happy. */ 3957 *pskb = dev_alloc_skb(64 + ETH_HLEN); 3958 if (!(*pskb)) 3959 return -ENOMEM; 3960 skb_reserve(*pskb, ETH_HLEN); 3961 if (data_len <= 64) { 3962 memcpy(skb_put(*pskb, data_len), element->addr + offset, 3963 data_len); 3964 } else { 3965 get_page(page); 3966 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 3967 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 3968 data_len - 64); 3969 (*pskb)->data_len += data_len - 64; 3970 (*pskb)->len += data_len - 64; 3971 (*pskb)->truesize += data_len - 64; 3972 (*pfrag)++; 3973 } 3974 } else { 3975 get_page(page); 3976 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 3977 (*pskb)->data_len += data_len; 3978 (*pskb)->len += data_len; 3979 (*pskb)->truesize += data_len; 3980 (*pfrag)++; 3981 } 3982 return 0; 3983 } 3984 3985 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 3986 struct qdio_buffer *buffer, 3987 struct qdio_buffer_element **__element, int *__offset, 3988 struct qeth_hdr **hdr) 3989 { 3990 struct qdio_buffer_element *element = *__element; 3991 int offset = *__offset; 3992 struct sk_buff *skb = NULL; 3993 int skb_len; 3994 void *data_ptr; 3995 int data_len; 3996 int headroom = 0; 3997 int use_rx_sg = 0; 3998 int frag = 0; 3999 4000 /* qeth_hdr must not cross element boundaries */ 4001 if (element->length < offset + sizeof(struct qeth_hdr)) { 4002 if (qeth_is_last_sbale(element)) 4003 return NULL; 4004 element++; 4005 offset = 0; 4006 if (element->length < sizeof(struct qeth_hdr)) 4007 return NULL; 4008 } 4009 *hdr = element->addr + offset; 4010 4011 offset += sizeof(struct qeth_hdr); 4012 if (card->options.layer2) { 4013 if (card->info.type == QETH_CARD_TYPE_OSN) { 4014 skb_len = (*hdr)->hdr.osn.pdu_length; 4015 headroom = sizeof(struct qeth_hdr); 4016 } else { 4017 skb_len = (*hdr)->hdr.l2.pkt_length; 4018 } 4019 } else { 4020 skb_len = (*hdr)->hdr.l3.length; 4021 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4022 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4023 headroom = TR_HLEN; 4024 else 4025 headroom = ETH_HLEN; 4026 } 4027 4028 if (!skb_len) 4029 return NULL; 4030 4031 if ((skb_len >= card->options.rx_sg_cb) && 4032 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4033 (!atomic_read(&card->force_alloc_skb))) { 4034 use_rx_sg = 1; 4035 } else { 4036 skb = dev_alloc_skb(skb_len + headroom); 4037 if (!skb) 4038 goto no_mem; 4039 if (headroom) 4040 skb_reserve(skb, headroom); 4041 } 4042 4043 data_ptr = element->addr + offset; 4044 while (skb_len) { 4045 data_len = min(skb_len, (int)(element->length - offset)); 4046 if (data_len) { 4047 if (use_rx_sg) { 4048 if (qeth_create_skb_frag(element, &skb, offset, 4049 &frag, data_len)) 4050 goto no_mem; 4051 } else { 4052 memcpy(skb_put(skb, data_len), data_ptr, 4053 data_len); 4054 } 4055 } 4056 skb_len -= data_len; 4057 if (skb_len) { 4058 if (qeth_is_last_sbale(element)) { 4059 QETH_DBF_TEXT(TRACE, 4, "unexeob"); 4060 QETH_DBF_TEXT_(TRACE, 4, "%s", 4061 CARD_BUS_ID(card)); 4062 QETH_DBF_TEXT(QERR, 2, "unexeob"); 4063 QETH_DBF_TEXT_(QERR, 2, "%s", 4064 CARD_BUS_ID(card)); 4065 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer)); 4066 dev_kfree_skb_any(skb); 4067 card->stats.rx_errors++; 4068 return NULL; 4069 } 4070 element++; 4071 offset = 0; 4072 data_ptr = element->addr; 4073 } else { 4074 offset += data_len; 4075 } 4076 } 4077 *__element = element; 4078 *__offset = offset; 4079 if (use_rx_sg && card->options.performance_stats) { 4080 card->perf_stats.sg_skbs_rx++; 4081 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4082 } 4083 return skb; 4084 no_mem: 4085 if (net_ratelimit()) { 4086 QETH_DBF_TEXT(TRACE, 2, "noskbmem"); 4087 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card)); 4088 } 4089 card->stats.rx_dropped++; 4090 return NULL; 4091 } 4092 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4093 4094 static void qeth_unregister_dbf_views(void) 4095 { 4096 int x; 4097 for (x = 0; x < QETH_DBF_INFOS; x++) { 4098 debug_unregister(qeth_dbf[x].id); 4099 qeth_dbf[x].id = NULL; 4100 } 4101 } 4102 4103 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...) 4104 { 4105 char dbf_txt_buf[32]; 4106 va_list args; 4107 4108 if (level > (qeth_dbf[dbf_nix].id)->level) 4109 return; 4110 va_start(args, fmt); 4111 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4112 va_end(args); 4113 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf); 4114 } 4115 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4116 4117 static int qeth_register_dbf_views(void) 4118 { 4119 int ret; 4120 int x; 4121 4122 for (x = 0; x < QETH_DBF_INFOS; x++) { 4123 /* register the areas */ 4124 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4125 qeth_dbf[x].pages, 4126 qeth_dbf[x].areas, 4127 qeth_dbf[x].len); 4128 if (qeth_dbf[x].id == NULL) { 4129 qeth_unregister_dbf_views(); 4130 return -ENOMEM; 4131 } 4132 4133 /* register a view */ 4134 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4135 if (ret) { 4136 qeth_unregister_dbf_views(); 4137 return ret; 4138 } 4139 4140 /* set a passing level */ 4141 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4142 } 4143 4144 return 0; 4145 } 4146 4147 int qeth_core_load_discipline(struct qeth_card *card, 4148 enum qeth_discipline_id discipline) 4149 { 4150 int rc = 0; 4151 switch (discipline) { 4152 case QETH_DISCIPLINE_LAYER3: 4153 card->discipline.ccwgdriver = try_then_request_module( 4154 symbol_get(qeth_l3_ccwgroup_driver), 4155 "qeth_l3"); 4156 break; 4157 case QETH_DISCIPLINE_LAYER2: 4158 card->discipline.ccwgdriver = try_then_request_module( 4159 symbol_get(qeth_l2_ccwgroup_driver), 4160 "qeth_l2"); 4161 break; 4162 } 4163 if (!card->discipline.ccwgdriver) { 4164 dev_err(&card->gdev->dev, "There is no kernel module to " 4165 "support discipline %d\n", discipline); 4166 rc = -EINVAL; 4167 } 4168 return rc; 4169 } 4170 4171 void qeth_core_free_discipline(struct qeth_card *card) 4172 { 4173 if (card->options.layer2) 4174 symbol_put(qeth_l2_ccwgroup_driver); 4175 else 4176 symbol_put(qeth_l3_ccwgroup_driver); 4177 card->discipline.ccwgdriver = NULL; 4178 } 4179 4180 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4181 { 4182 struct qeth_card *card; 4183 struct device *dev; 4184 int rc; 4185 unsigned long flags; 4186 4187 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4188 4189 dev = &gdev->dev; 4190 if (!get_device(dev)) 4191 return -ENODEV; 4192 4193 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4194 4195 card = qeth_alloc_card(); 4196 if (!card) { 4197 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4198 rc = -ENOMEM; 4199 goto err_dev; 4200 } 4201 card->read.ccwdev = gdev->cdev[0]; 4202 card->write.ccwdev = gdev->cdev[1]; 4203 card->data.ccwdev = gdev->cdev[2]; 4204 dev_set_drvdata(&gdev->dev, card); 4205 card->gdev = gdev; 4206 gdev->cdev[0]->handler = qeth_irq; 4207 gdev->cdev[1]->handler = qeth_irq; 4208 gdev->cdev[2]->handler = qeth_irq; 4209 4210 rc = qeth_determine_card_type(card); 4211 if (rc) { 4212 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4213 goto err_card; 4214 } 4215 rc = qeth_setup_card(card); 4216 if (rc) { 4217 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4218 goto err_card; 4219 } 4220 4221 if (card->info.type == QETH_CARD_TYPE_OSN) { 4222 rc = qeth_core_create_osn_attributes(dev); 4223 if (rc) 4224 goto err_card; 4225 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4226 if (rc) { 4227 qeth_core_remove_osn_attributes(dev); 4228 goto err_card; 4229 } 4230 rc = card->discipline.ccwgdriver->probe(card->gdev); 4231 if (rc) { 4232 qeth_core_free_discipline(card); 4233 qeth_core_remove_osn_attributes(dev); 4234 goto err_card; 4235 } 4236 } else { 4237 rc = qeth_core_create_device_attributes(dev); 4238 if (rc) 4239 goto err_card; 4240 } 4241 4242 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4243 list_add_tail(&card->list, &qeth_core_card_list.list); 4244 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4245 return 0; 4246 4247 err_card: 4248 qeth_core_free_card(card); 4249 err_dev: 4250 put_device(dev); 4251 return rc; 4252 } 4253 4254 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4255 { 4256 unsigned long flags; 4257 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4258 4259 QETH_DBF_TEXT(SETUP, 2, "removedv"); 4260 if (card->discipline.ccwgdriver) { 4261 card->discipline.ccwgdriver->remove(gdev); 4262 qeth_core_free_discipline(card); 4263 } 4264 4265 if (card->info.type == QETH_CARD_TYPE_OSN) { 4266 qeth_core_remove_osn_attributes(&gdev->dev); 4267 } else { 4268 qeth_core_remove_device_attributes(&gdev->dev); 4269 } 4270 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4271 list_del(&card->list); 4272 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4273 qeth_core_free_card(card); 4274 dev_set_drvdata(&gdev->dev, NULL); 4275 put_device(&gdev->dev); 4276 return; 4277 } 4278 4279 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4280 { 4281 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4282 int rc = 0; 4283 int def_discipline; 4284 4285 if (!card->discipline.ccwgdriver) { 4286 if (card->info.type == QETH_CARD_TYPE_IQD) 4287 def_discipline = QETH_DISCIPLINE_LAYER3; 4288 else 4289 def_discipline = QETH_DISCIPLINE_LAYER2; 4290 rc = qeth_core_load_discipline(card, def_discipline); 4291 if (rc) 4292 goto err; 4293 rc = card->discipline.ccwgdriver->probe(card->gdev); 4294 if (rc) 4295 goto err; 4296 } 4297 rc = card->discipline.ccwgdriver->set_online(gdev); 4298 err: 4299 return rc; 4300 } 4301 4302 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4303 { 4304 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4305 return card->discipline.ccwgdriver->set_offline(gdev); 4306 } 4307 4308 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4309 { 4310 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4311 if (card->discipline.ccwgdriver && 4312 card->discipline.ccwgdriver->shutdown) 4313 card->discipline.ccwgdriver->shutdown(gdev); 4314 } 4315 4316 static int qeth_core_prepare(struct ccwgroup_device *gdev) 4317 { 4318 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4319 if (card->discipline.ccwgdriver && 4320 card->discipline.ccwgdriver->prepare) 4321 return card->discipline.ccwgdriver->prepare(gdev); 4322 return 0; 4323 } 4324 4325 static void qeth_core_complete(struct ccwgroup_device *gdev) 4326 { 4327 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4328 if (card->discipline.ccwgdriver && 4329 card->discipline.ccwgdriver->complete) 4330 card->discipline.ccwgdriver->complete(gdev); 4331 } 4332 4333 static int qeth_core_freeze(struct ccwgroup_device *gdev) 4334 { 4335 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4336 if (card->discipline.ccwgdriver && 4337 card->discipline.ccwgdriver->freeze) 4338 return card->discipline.ccwgdriver->freeze(gdev); 4339 return 0; 4340 } 4341 4342 static int qeth_core_thaw(struct ccwgroup_device *gdev) 4343 { 4344 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4345 if (card->discipline.ccwgdriver && 4346 card->discipline.ccwgdriver->thaw) 4347 return card->discipline.ccwgdriver->thaw(gdev); 4348 return 0; 4349 } 4350 4351 static int qeth_core_restore(struct ccwgroup_device *gdev) 4352 { 4353 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4354 if (card->discipline.ccwgdriver && 4355 card->discipline.ccwgdriver->restore) 4356 return card->discipline.ccwgdriver->restore(gdev); 4357 return 0; 4358 } 4359 4360 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4361 .owner = THIS_MODULE, 4362 .name = "qeth", 4363 .driver_id = 0xD8C5E3C8, 4364 .probe = qeth_core_probe_device, 4365 .remove = qeth_core_remove_device, 4366 .set_online = qeth_core_set_online, 4367 .set_offline = qeth_core_set_offline, 4368 .shutdown = qeth_core_shutdown, 4369 .prepare = qeth_core_prepare, 4370 .complete = qeth_core_complete, 4371 .freeze = qeth_core_freeze, 4372 .thaw = qeth_core_thaw, 4373 .restore = qeth_core_restore, 4374 }; 4375 4376 static ssize_t 4377 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4378 size_t count) 4379 { 4380 int err; 4381 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4382 qeth_core_ccwgroup_driver.driver_id); 4383 if (err) 4384 return err; 4385 else 4386 return count; 4387 } 4388 4389 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4390 4391 static struct { 4392 const char str[ETH_GSTRING_LEN]; 4393 } qeth_ethtool_stats_keys[] = { 4394 /* 0 */{"rx skbs"}, 4395 {"rx buffers"}, 4396 {"tx skbs"}, 4397 {"tx buffers"}, 4398 {"tx skbs no packing"}, 4399 {"tx buffers no packing"}, 4400 {"tx skbs packing"}, 4401 {"tx buffers packing"}, 4402 {"tx sg skbs"}, 4403 {"tx sg frags"}, 4404 /* 10 */{"rx sg skbs"}, 4405 {"rx sg frags"}, 4406 {"rx sg page allocs"}, 4407 {"tx large kbytes"}, 4408 {"tx large count"}, 4409 {"tx pk state ch n->p"}, 4410 {"tx pk state ch p->n"}, 4411 {"tx pk watermark low"}, 4412 {"tx pk watermark high"}, 4413 {"queue 0 buffer usage"}, 4414 /* 20 */{"queue 1 buffer usage"}, 4415 {"queue 2 buffer usage"}, 4416 {"queue 3 buffer usage"}, 4417 {"rx handler time"}, 4418 {"rx handler count"}, 4419 {"rx do_QDIO time"}, 4420 {"rx do_QDIO count"}, 4421 {"tx handler time"}, 4422 {"tx handler count"}, 4423 {"tx time"}, 4424 /* 30 */{"tx count"}, 4425 {"tx do_QDIO time"}, 4426 {"tx do_QDIO count"}, 4427 {"tx csum"}, 4428 {"tx lin"}, 4429 }; 4430 4431 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 4432 { 4433 switch (stringset) { 4434 case ETH_SS_STATS: 4435 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4436 default: 4437 return -EINVAL; 4438 } 4439 } 4440 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 4441 4442 void qeth_core_get_ethtool_stats(struct net_device *dev, 4443 struct ethtool_stats *stats, u64 *data) 4444 { 4445 struct qeth_card *card = dev->ml_priv; 4446 data[0] = card->stats.rx_packets - 4447 card->perf_stats.initial_rx_packets; 4448 data[1] = card->perf_stats.bufs_rec; 4449 data[2] = card->stats.tx_packets - 4450 card->perf_stats.initial_tx_packets; 4451 data[3] = card->perf_stats.bufs_sent; 4452 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4453 - card->perf_stats.skbs_sent_pack; 4454 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4455 data[6] = card->perf_stats.skbs_sent_pack; 4456 data[7] = card->perf_stats.bufs_sent_pack; 4457 data[8] = card->perf_stats.sg_skbs_sent; 4458 data[9] = card->perf_stats.sg_frags_sent; 4459 data[10] = card->perf_stats.sg_skbs_rx; 4460 data[11] = card->perf_stats.sg_frags_rx; 4461 data[12] = card->perf_stats.sg_alloc_page_rx; 4462 data[13] = (card->perf_stats.large_send_bytes >> 10); 4463 data[14] = card->perf_stats.large_send_cnt; 4464 data[15] = card->perf_stats.sc_dp_p; 4465 data[16] = card->perf_stats.sc_p_dp; 4466 data[17] = QETH_LOW_WATERMARK_PACK; 4467 data[18] = QETH_HIGH_WATERMARK_PACK; 4468 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4469 data[20] = (card->qdio.no_out_queues > 1) ? 4470 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4471 data[21] = (card->qdio.no_out_queues > 2) ? 4472 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4473 data[22] = (card->qdio.no_out_queues > 3) ? 4474 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4475 data[23] = card->perf_stats.inbound_time; 4476 data[24] = card->perf_stats.inbound_cnt; 4477 data[25] = card->perf_stats.inbound_do_qdio_time; 4478 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4479 data[27] = card->perf_stats.outbound_handler_time; 4480 data[28] = card->perf_stats.outbound_handler_cnt; 4481 data[29] = card->perf_stats.outbound_time; 4482 data[30] = card->perf_stats.outbound_cnt; 4483 data[31] = card->perf_stats.outbound_do_qdio_time; 4484 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4485 data[33] = card->perf_stats.tx_csum; 4486 data[34] = card->perf_stats.tx_lin; 4487 } 4488 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4489 4490 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4491 { 4492 switch (stringset) { 4493 case ETH_SS_STATS: 4494 memcpy(data, &qeth_ethtool_stats_keys, 4495 sizeof(qeth_ethtool_stats_keys)); 4496 break; 4497 default: 4498 WARN_ON(1); 4499 break; 4500 } 4501 } 4502 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4503 4504 void qeth_core_get_drvinfo(struct net_device *dev, 4505 struct ethtool_drvinfo *info) 4506 { 4507 struct qeth_card *card = dev->ml_priv; 4508 if (card->options.layer2) 4509 strcpy(info->driver, "qeth_l2"); 4510 else 4511 strcpy(info->driver, "qeth_l3"); 4512 4513 strcpy(info->version, "1.0"); 4514 strcpy(info->fw_version, card->info.mcl_level); 4515 sprintf(info->bus_info, "%s/%s/%s", 4516 CARD_RDEV_ID(card), 4517 CARD_WDEV_ID(card), 4518 CARD_DDEV_ID(card)); 4519 } 4520 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4521 4522 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4523 struct ethtool_cmd *ecmd) 4524 { 4525 struct qeth_card *card = netdev->ml_priv; 4526 enum qeth_link_types link_type; 4527 4528 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4529 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4530 else 4531 link_type = card->info.link_type; 4532 4533 ecmd->transceiver = XCVR_INTERNAL; 4534 ecmd->supported = SUPPORTED_Autoneg; 4535 ecmd->advertising = ADVERTISED_Autoneg; 4536 ecmd->duplex = DUPLEX_FULL; 4537 ecmd->autoneg = AUTONEG_ENABLE; 4538 4539 switch (link_type) { 4540 case QETH_LINK_TYPE_FAST_ETH: 4541 case QETH_LINK_TYPE_LANE_ETH100: 4542 ecmd->supported |= SUPPORTED_10baseT_Half | 4543 SUPPORTED_10baseT_Full | 4544 SUPPORTED_100baseT_Half | 4545 SUPPORTED_100baseT_Full | 4546 SUPPORTED_TP; 4547 ecmd->advertising |= ADVERTISED_10baseT_Half | 4548 ADVERTISED_10baseT_Full | 4549 ADVERTISED_100baseT_Half | 4550 ADVERTISED_100baseT_Full | 4551 ADVERTISED_TP; 4552 ecmd->speed = SPEED_100; 4553 ecmd->port = PORT_TP; 4554 break; 4555 4556 case QETH_LINK_TYPE_GBIT_ETH: 4557 case QETH_LINK_TYPE_LANE_ETH1000: 4558 ecmd->supported |= SUPPORTED_10baseT_Half | 4559 SUPPORTED_10baseT_Full | 4560 SUPPORTED_100baseT_Half | 4561 SUPPORTED_100baseT_Full | 4562 SUPPORTED_1000baseT_Half | 4563 SUPPORTED_1000baseT_Full | 4564 SUPPORTED_FIBRE; 4565 ecmd->advertising |= ADVERTISED_10baseT_Half | 4566 ADVERTISED_10baseT_Full | 4567 ADVERTISED_100baseT_Half | 4568 ADVERTISED_100baseT_Full | 4569 ADVERTISED_1000baseT_Half | 4570 ADVERTISED_1000baseT_Full | 4571 ADVERTISED_FIBRE; 4572 ecmd->speed = SPEED_1000; 4573 ecmd->port = PORT_FIBRE; 4574 break; 4575 4576 case QETH_LINK_TYPE_10GBIT_ETH: 4577 ecmd->supported |= SUPPORTED_10baseT_Half | 4578 SUPPORTED_10baseT_Full | 4579 SUPPORTED_100baseT_Half | 4580 SUPPORTED_100baseT_Full | 4581 SUPPORTED_1000baseT_Half | 4582 SUPPORTED_1000baseT_Full | 4583 SUPPORTED_10000baseT_Full | 4584 SUPPORTED_FIBRE; 4585 ecmd->advertising |= ADVERTISED_10baseT_Half | 4586 ADVERTISED_10baseT_Full | 4587 ADVERTISED_100baseT_Half | 4588 ADVERTISED_100baseT_Full | 4589 ADVERTISED_1000baseT_Half | 4590 ADVERTISED_1000baseT_Full | 4591 ADVERTISED_10000baseT_Full | 4592 ADVERTISED_FIBRE; 4593 ecmd->speed = SPEED_10000; 4594 ecmd->port = PORT_FIBRE; 4595 break; 4596 4597 default: 4598 ecmd->supported |= SUPPORTED_10baseT_Half | 4599 SUPPORTED_10baseT_Full | 4600 SUPPORTED_TP; 4601 ecmd->advertising |= ADVERTISED_10baseT_Half | 4602 ADVERTISED_10baseT_Full | 4603 ADVERTISED_TP; 4604 ecmd->speed = SPEED_10; 4605 ecmd->port = PORT_TP; 4606 } 4607 4608 return 0; 4609 } 4610 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4611 4612 static int __init qeth_core_init(void) 4613 { 4614 int rc; 4615 4616 pr_info("loading core functions\n"); 4617 INIT_LIST_HEAD(&qeth_core_card_list.list); 4618 rwlock_init(&qeth_core_card_list.rwlock); 4619 4620 rc = qeth_register_dbf_views(); 4621 if (rc) 4622 goto out_err; 4623 rc = ccw_driver_register(&qeth_ccw_driver); 4624 if (rc) 4625 goto ccw_err; 4626 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4627 if (rc) 4628 goto ccwgroup_err; 4629 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4630 &driver_attr_group); 4631 if (rc) 4632 goto driver_err; 4633 qeth_core_root_dev = root_device_register("qeth"); 4634 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4635 if (rc) 4636 goto register_err; 4637 4638 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 4639 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 4640 if (!qeth_core_header_cache) { 4641 rc = -ENOMEM; 4642 goto slab_err; 4643 } 4644 4645 return 0; 4646 slab_err: 4647 root_device_unregister(qeth_core_root_dev); 4648 register_err: 4649 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4650 &driver_attr_group); 4651 driver_err: 4652 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4653 ccwgroup_err: 4654 ccw_driver_unregister(&qeth_ccw_driver); 4655 ccw_err: 4656 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 4657 qeth_unregister_dbf_views(); 4658 out_err: 4659 pr_err("Initializing the qeth device driver failed\n"); 4660 return rc; 4661 } 4662 4663 static void __exit qeth_core_exit(void) 4664 { 4665 root_device_unregister(qeth_core_root_dev); 4666 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4667 &driver_attr_group); 4668 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4669 ccw_driver_unregister(&qeth_ccw_driver); 4670 kmem_cache_destroy(qeth_core_header_cache); 4671 qeth_unregister_dbf_views(); 4672 pr_info("core functions removed\n"); 4673 } 4674 4675 module_init(qeth_core_init); 4676 module_exit(qeth_core_exit); 4677 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4678 MODULE_DESCRIPTION("qeth core functions"); 4679 MODULE_LICENSE("GPL"); 4680