1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/io.h> 26 #include <asm/sysinfo.h> 27 #include <asm/compat.h> 28 29 #include "qeth_core.h" 30 31 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 32 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 33 /* N P A M L V H */ 34 [QETH_DBF_SETUP] = {"qeth_setup", 35 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 36 [QETH_DBF_MSG] = {"qeth_msg", 37 8, 1, 128, 3, &debug_sprintf_view, NULL}, 38 [QETH_DBF_CTRL] = {"qeth_control", 39 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 40 }; 41 EXPORT_SYMBOL_GPL(qeth_dbf); 42 43 struct qeth_card_list_struct qeth_core_card_list; 44 EXPORT_SYMBOL_GPL(qeth_core_card_list); 45 struct kmem_cache *qeth_core_header_cache; 46 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 47 static struct kmem_cache *qeth_qdio_outbuf_cache; 48 49 static struct device *qeth_core_root_dev; 50 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 51 static struct lock_class_key qdio_out_skb_queue_key; 52 static struct mutex qeth_mod_mutex; 53 54 static void qeth_send_control_data_cb(struct qeth_channel *, 55 struct qeth_cmd_buffer *); 56 static int qeth_issue_next_read(struct qeth_card *); 57 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 58 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 59 static void qeth_free_buffer_pool(struct qeth_card *); 60 static int qeth_qdio_establish(struct qeth_card *); 61 static void qeth_free_qdio_buffers(struct qeth_card *); 62 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 63 struct qeth_qdio_out_buffer *buf, 64 enum iucv_tx_notify notification); 65 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 66 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum qeth_qdio_buffer_states newbufstate); 69 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 70 71 static struct workqueue_struct *qeth_wq; 72 73 static void qeth_close_dev_handler(struct work_struct *work) 74 { 75 struct qeth_card *card; 76 77 card = container_of(work, struct qeth_card, close_dev_work); 78 QETH_CARD_TEXT(card, 2, "cldevhdl"); 79 rtnl_lock(); 80 dev_close(card->dev); 81 rtnl_unlock(); 82 ccwgroup_set_offline(card->gdev); 83 } 84 85 void qeth_close_dev(struct qeth_card *card) 86 { 87 QETH_CARD_TEXT(card, 2, "cldevsubm"); 88 queue_work(qeth_wq, &card->close_dev_work); 89 } 90 EXPORT_SYMBOL_GPL(qeth_close_dev); 91 92 static inline const char *qeth_get_cardname(struct qeth_card *card) 93 { 94 if (card->info.guestlan) { 95 switch (card->info.type) { 96 case QETH_CARD_TYPE_OSD: 97 return " Virtual NIC QDIO"; 98 case QETH_CARD_TYPE_IQD: 99 return " Virtual NIC Hiper"; 100 case QETH_CARD_TYPE_OSM: 101 return " Virtual NIC QDIO - OSM"; 102 case QETH_CARD_TYPE_OSX: 103 return " Virtual NIC QDIO - OSX"; 104 default: 105 return " unknown"; 106 } 107 } else { 108 switch (card->info.type) { 109 case QETH_CARD_TYPE_OSD: 110 return " OSD Express"; 111 case QETH_CARD_TYPE_IQD: 112 return " HiperSockets"; 113 case QETH_CARD_TYPE_OSN: 114 return " OSN QDIO"; 115 case QETH_CARD_TYPE_OSM: 116 return " OSM QDIO"; 117 case QETH_CARD_TYPE_OSX: 118 return " OSX QDIO"; 119 default: 120 return " unknown"; 121 } 122 } 123 return " n/a"; 124 } 125 126 /* max length to be returned: 14 */ 127 const char *qeth_get_cardname_short(struct qeth_card *card) 128 { 129 if (card->info.guestlan) { 130 switch (card->info.type) { 131 case QETH_CARD_TYPE_OSD: 132 return "Virt.NIC QDIO"; 133 case QETH_CARD_TYPE_IQD: 134 return "Virt.NIC Hiper"; 135 case QETH_CARD_TYPE_OSM: 136 return "Virt.NIC OSM"; 137 case QETH_CARD_TYPE_OSX: 138 return "Virt.NIC OSX"; 139 default: 140 return "unknown"; 141 } 142 } else { 143 switch (card->info.type) { 144 case QETH_CARD_TYPE_OSD: 145 switch (card->info.link_type) { 146 case QETH_LINK_TYPE_FAST_ETH: 147 return "OSD_100"; 148 case QETH_LINK_TYPE_HSTR: 149 return "HSTR"; 150 case QETH_LINK_TYPE_GBIT_ETH: 151 return "OSD_1000"; 152 case QETH_LINK_TYPE_10GBIT_ETH: 153 return "OSD_10GIG"; 154 case QETH_LINK_TYPE_LANE_ETH100: 155 return "OSD_FE_LANE"; 156 case QETH_LINK_TYPE_LANE_TR: 157 return "OSD_TR_LANE"; 158 case QETH_LINK_TYPE_LANE_ETH1000: 159 return "OSD_GbE_LANE"; 160 case QETH_LINK_TYPE_LANE: 161 return "OSD_ATM_LANE"; 162 default: 163 return "OSD_Express"; 164 } 165 case QETH_CARD_TYPE_IQD: 166 return "HiperSockets"; 167 case QETH_CARD_TYPE_OSN: 168 return "OSN"; 169 case QETH_CARD_TYPE_OSM: 170 return "OSM_1000"; 171 case QETH_CARD_TYPE_OSX: 172 return "OSX_10GIG"; 173 default: 174 return "unknown"; 175 } 176 } 177 return "n/a"; 178 } 179 180 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 181 int clear_start_mask) 182 { 183 unsigned long flags; 184 185 spin_lock_irqsave(&card->thread_mask_lock, flags); 186 card->thread_allowed_mask = threads; 187 if (clear_start_mask) 188 card->thread_start_mask &= threads; 189 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 190 wake_up(&card->wait_q); 191 } 192 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 193 194 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 195 { 196 unsigned long flags; 197 int rc = 0; 198 199 spin_lock_irqsave(&card->thread_mask_lock, flags); 200 rc = (card->thread_running_mask & threads); 201 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 202 return rc; 203 } 204 EXPORT_SYMBOL_GPL(qeth_threads_running); 205 206 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 207 { 208 return wait_event_interruptible(card->wait_q, 209 qeth_threads_running(card, threads) == 0); 210 } 211 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 212 213 void qeth_clear_working_pool_list(struct qeth_card *card) 214 { 215 struct qeth_buffer_pool_entry *pool_entry, *tmp; 216 217 QETH_CARD_TEXT(card, 5, "clwrklst"); 218 list_for_each_entry_safe(pool_entry, tmp, 219 &card->qdio.in_buf_pool.entry_list, list){ 220 list_del(&pool_entry->list); 221 } 222 } 223 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 224 225 static int qeth_alloc_buffer_pool(struct qeth_card *card) 226 { 227 struct qeth_buffer_pool_entry *pool_entry; 228 void *ptr; 229 int i, j; 230 231 QETH_CARD_TEXT(card, 5, "alocpool"); 232 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 233 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 234 if (!pool_entry) { 235 qeth_free_buffer_pool(card); 236 return -ENOMEM; 237 } 238 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 239 ptr = (void *) __get_free_page(GFP_KERNEL); 240 if (!ptr) { 241 while (j > 0) 242 free_page((unsigned long) 243 pool_entry->elements[--j]); 244 kfree(pool_entry); 245 qeth_free_buffer_pool(card); 246 return -ENOMEM; 247 } 248 pool_entry->elements[j] = ptr; 249 } 250 list_add(&pool_entry->init_list, 251 &card->qdio.init_pool.entry_list); 252 } 253 return 0; 254 } 255 256 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 257 { 258 QETH_CARD_TEXT(card, 2, "realcbp"); 259 260 if ((card->state != CARD_STATE_DOWN) && 261 (card->state != CARD_STATE_RECOVER)) 262 return -EPERM; 263 264 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 265 qeth_clear_working_pool_list(card); 266 qeth_free_buffer_pool(card); 267 card->qdio.in_buf_pool.buf_count = bufcnt; 268 card->qdio.init_pool.buf_count = bufcnt; 269 return qeth_alloc_buffer_pool(card); 270 } 271 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 272 273 static inline int qeth_cq_init(struct qeth_card *card) 274 { 275 int rc; 276 277 if (card->options.cq == QETH_CQ_ENABLED) { 278 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 279 memset(card->qdio.c_q->qdio_bufs, 0, 280 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 281 card->qdio.c_q->next_buf_to_init = 127; 282 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 283 card->qdio.no_in_queues - 1, 0, 284 127); 285 if (rc) { 286 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 287 goto out; 288 } 289 } 290 rc = 0; 291 out: 292 return rc; 293 } 294 295 static inline int qeth_alloc_cq(struct qeth_card *card) 296 { 297 int rc; 298 299 if (card->options.cq == QETH_CQ_ENABLED) { 300 int i; 301 struct qdio_outbuf_state *outbuf_states; 302 303 QETH_DBF_TEXT(SETUP, 2, "cqon"); 304 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 305 GFP_KERNEL); 306 if (!card->qdio.c_q) { 307 rc = -1; 308 goto kmsg_out; 309 } 310 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 311 312 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 313 card->qdio.c_q->bufs[i].buffer = 314 &card->qdio.c_q->qdio_bufs[i]; 315 } 316 317 card->qdio.no_in_queues = 2; 318 319 card->qdio.out_bufstates = (struct qdio_outbuf_state *) 320 kzalloc(card->qdio.no_out_queues * 321 QDIO_MAX_BUFFERS_PER_Q * 322 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 323 outbuf_states = card->qdio.out_bufstates; 324 if (outbuf_states == NULL) { 325 rc = -1; 326 goto free_cq_out; 327 } 328 for (i = 0; i < card->qdio.no_out_queues; ++i) { 329 card->qdio.out_qs[i]->bufstates = outbuf_states; 330 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 331 } 332 } else { 333 QETH_DBF_TEXT(SETUP, 2, "nocq"); 334 card->qdio.c_q = NULL; 335 card->qdio.no_in_queues = 1; 336 } 337 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 338 rc = 0; 339 out: 340 return rc; 341 free_cq_out: 342 kfree(card->qdio.c_q); 343 card->qdio.c_q = NULL; 344 kmsg_out: 345 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 346 goto out; 347 } 348 349 static inline void qeth_free_cq(struct qeth_card *card) 350 { 351 if (card->qdio.c_q) { 352 --card->qdio.no_in_queues; 353 kfree(card->qdio.c_q); 354 card->qdio.c_q = NULL; 355 } 356 kfree(card->qdio.out_bufstates); 357 card->qdio.out_bufstates = NULL; 358 } 359 360 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 361 int delayed) { 362 enum iucv_tx_notify n; 363 364 switch (sbalf15) { 365 case 0: 366 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 367 break; 368 case 4: 369 case 16: 370 case 17: 371 case 18: 372 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 373 TX_NOTIFY_UNREACHABLE; 374 break; 375 default: 376 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 377 TX_NOTIFY_GENERALERROR; 378 break; 379 } 380 381 return n; 382 } 383 384 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 385 int bidx, int forced_cleanup) 386 { 387 if (q->card->options.cq != QETH_CQ_ENABLED) 388 return; 389 390 if (q->bufs[bidx]->next_pending != NULL) { 391 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 392 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 393 394 while (c) { 395 if (forced_cleanup || 396 atomic_read(&c->state) == 397 QETH_QDIO_BUF_HANDLED_DELAYED) { 398 struct qeth_qdio_out_buffer *f = c; 399 QETH_CARD_TEXT(f->q->card, 5, "fp"); 400 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 401 /* release here to avoid interleaving between 402 outbound tasklet and inbound tasklet 403 regarding notifications and lifecycle */ 404 qeth_release_skbs(c); 405 406 c = f->next_pending; 407 WARN_ON_ONCE(head->next_pending != f); 408 head->next_pending = c; 409 kmem_cache_free(qeth_qdio_outbuf_cache, f); 410 } else { 411 head = c; 412 c = c->next_pending; 413 } 414 415 } 416 } 417 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 418 QETH_QDIO_BUF_HANDLED_DELAYED)) { 419 /* for recovery situations */ 420 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 421 qeth_init_qdio_out_buf(q, bidx); 422 QETH_CARD_TEXT(q->card, 2, "clprecov"); 423 } 424 } 425 426 427 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 428 unsigned long phys_aob_addr) { 429 struct qaob *aob; 430 struct qeth_qdio_out_buffer *buffer; 431 enum iucv_tx_notify notification; 432 433 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 434 QETH_CARD_TEXT(card, 5, "haob"); 435 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 436 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 437 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 438 439 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 440 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 441 notification = TX_NOTIFY_OK; 442 } else { 443 WARN_ON_ONCE(atomic_read(&buffer->state) != 444 QETH_QDIO_BUF_PENDING); 445 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 446 notification = TX_NOTIFY_DELAYED_OK; 447 } 448 449 if (aob->aorc != 0) { 450 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 451 notification = qeth_compute_cq_notification(aob->aorc, 1); 452 } 453 qeth_notify_skbs(buffer->q, buffer, notification); 454 455 buffer->aob = NULL; 456 qeth_clear_output_buffer(buffer->q, buffer, 457 QETH_QDIO_BUF_HANDLED_DELAYED); 458 459 /* from here on: do not touch buffer anymore */ 460 qdio_release_aob(aob); 461 } 462 463 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 464 { 465 return card->options.cq == QETH_CQ_ENABLED && 466 card->qdio.c_q != NULL && 467 queue != 0 && 468 queue == card->qdio.no_in_queues - 1; 469 } 470 471 472 static int qeth_issue_next_read(struct qeth_card *card) 473 { 474 int rc; 475 struct qeth_cmd_buffer *iob; 476 477 QETH_CARD_TEXT(card, 5, "issnxrd"); 478 if (card->read.state != CH_STATE_UP) 479 return -EIO; 480 iob = qeth_get_buffer(&card->read); 481 if (!iob) { 482 dev_warn(&card->gdev->dev, "The qeth device driver " 483 "failed to recover an error on the device\n"); 484 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 485 "available\n", dev_name(&card->gdev->dev)); 486 return -ENOMEM; 487 } 488 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 489 QETH_CARD_TEXT(card, 6, "noirqpnd"); 490 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 491 (addr_t) iob, 0, 0); 492 if (rc) { 493 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 494 "rc=%i\n", dev_name(&card->gdev->dev), rc); 495 atomic_set(&card->read.irq_pending, 0); 496 card->read_or_write_problem = 1; 497 qeth_schedule_recovery(card); 498 wake_up(&card->wait_q); 499 } 500 return rc; 501 } 502 503 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 504 { 505 struct qeth_reply *reply; 506 507 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 508 if (reply) { 509 atomic_set(&reply->refcnt, 1); 510 atomic_set(&reply->received, 0); 511 reply->card = card; 512 } 513 return reply; 514 } 515 516 static void qeth_get_reply(struct qeth_reply *reply) 517 { 518 WARN_ON(atomic_read(&reply->refcnt) <= 0); 519 atomic_inc(&reply->refcnt); 520 } 521 522 static void qeth_put_reply(struct qeth_reply *reply) 523 { 524 WARN_ON(atomic_read(&reply->refcnt) <= 0); 525 if (atomic_dec_and_test(&reply->refcnt)) 526 kfree(reply); 527 } 528 529 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 530 struct qeth_card *card) 531 { 532 char *ipa_name; 533 int com = cmd->hdr.command; 534 ipa_name = qeth_get_ipa_cmd_name(com); 535 if (rc) 536 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 537 "x%X \"%s\"\n", 538 ipa_name, com, dev_name(&card->gdev->dev), 539 QETH_CARD_IFNAME(card), rc, 540 qeth_get_ipa_msg(rc)); 541 else 542 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 543 ipa_name, com, dev_name(&card->gdev->dev), 544 QETH_CARD_IFNAME(card)); 545 } 546 547 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 548 struct qeth_cmd_buffer *iob) 549 { 550 struct qeth_ipa_cmd *cmd = NULL; 551 552 QETH_CARD_TEXT(card, 5, "chkipad"); 553 if (IS_IPA(iob->data)) { 554 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 555 if (IS_IPA_REPLY(cmd)) { 556 if (cmd->hdr.command != IPA_CMD_SETCCID && 557 cmd->hdr.command != IPA_CMD_DELCCID && 558 cmd->hdr.command != IPA_CMD_MODCCID && 559 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 560 qeth_issue_ipa_msg(cmd, 561 cmd->hdr.return_code, card); 562 return cmd; 563 } else { 564 switch (cmd->hdr.command) { 565 case IPA_CMD_STOPLAN: 566 if (cmd->hdr.return_code == 567 IPA_RC_VEPA_TO_VEB_TRANSITION) { 568 dev_err(&card->gdev->dev, 569 "Interface %s is down because the " 570 "adjacent port is no longer in " 571 "reflective relay mode\n", 572 QETH_CARD_IFNAME(card)); 573 qeth_close_dev(card); 574 } else { 575 dev_warn(&card->gdev->dev, 576 "The link for interface %s on CHPID" 577 " 0x%X failed\n", 578 QETH_CARD_IFNAME(card), 579 card->info.chpid); 580 qeth_issue_ipa_msg(cmd, 581 cmd->hdr.return_code, card); 582 } 583 card->lan_online = 0; 584 if (card->dev && netif_carrier_ok(card->dev)) 585 netif_carrier_off(card->dev); 586 return NULL; 587 case IPA_CMD_STARTLAN: 588 dev_info(&card->gdev->dev, 589 "The link for %s on CHPID 0x%X has" 590 " been restored\n", 591 QETH_CARD_IFNAME(card), 592 card->info.chpid); 593 netif_carrier_on(card->dev); 594 card->lan_online = 1; 595 if (card->info.hwtrap) 596 card->info.hwtrap = 2; 597 qeth_schedule_recovery(card); 598 return NULL; 599 case IPA_CMD_MODCCID: 600 return cmd; 601 case IPA_CMD_REGISTER_LOCAL_ADDR: 602 QETH_CARD_TEXT(card, 3, "irla"); 603 break; 604 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 605 QETH_CARD_TEXT(card, 3, "urla"); 606 break; 607 default: 608 QETH_DBF_MESSAGE(2, "Received data is IPA " 609 "but not a reply!\n"); 610 break; 611 } 612 } 613 } 614 return cmd; 615 } 616 617 void qeth_clear_ipacmd_list(struct qeth_card *card) 618 { 619 struct qeth_reply *reply, *r; 620 unsigned long flags; 621 622 QETH_CARD_TEXT(card, 4, "clipalst"); 623 624 spin_lock_irqsave(&card->lock, flags); 625 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 626 qeth_get_reply(reply); 627 reply->rc = -EIO; 628 atomic_inc(&reply->received); 629 list_del_init(&reply->list); 630 wake_up(&reply->wait_q); 631 qeth_put_reply(reply); 632 } 633 spin_unlock_irqrestore(&card->lock, flags); 634 atomic_set(&card->write.irq_pending, 0); 635 } 636 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 637 638 static int qeth_check_idx_response(struct qeth_card *card, 639 unsigned char *buffer) 640 { 641 if (!buffer) 642 return 0; 643 644 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 645 if ((buffer[2] & 0xc0) == 0xc0) { 646 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 647 "with cause code 0x%02x%s\n", 648 buffer[4], 649 ((buffer[4] == 0x22) ? 650 " -- try another portname" : "")); 651 QETH_CARD_TEXT(card, 2, "ckidxres"); 652 QETH_CARD_TEXT(card, 2, " idxterm"); 653 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 654 if (buffer[4] == 0xf6) { 655 dev_err(&card->gdev->dev, 656 "The qeth device is not configured " 657 "for the OSI layer required by z/VM\n"); 658 return -EPERM; 659 } 660 return -EIO; 661 } 662 return 0; 663 } 664 665 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 666 __u32 len) 667 { 668 struct qeth_card *card; 669 670 card = CARD_FROM_CDEV(channel->ccwdev); 671 QETH_CARD_TEXT(card, 4, "setupccw"); 672 if (channel == &card->read) 673 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 674 else 675 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 676 channel->ccw.count = len; 677 channel->ccw.cda = (__u32) __pa(iob); 678 } 679 680 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 681 { 682 __u8 index; 683 684 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 685 index = channel->io_buf_no; 686 do { 687 if (channel->iob[index].state == BUF_STATE_FREE) { 688 channel->iob[index].state = BUF_STATE_LOCKED; 689 channel->io_buf_no = (channel->io_buf_no + 1) % 690 QETH_CMD_BUFFER_NO; 691 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 692 return channel->iob + index; 693 } 694 index = (index + 1) % QETH_CMD_BUFFER_NO; 695 } while (index != channel->io_buf_no); 696 697 return NULL; 698 } 699 700 void qeth_release_buffer(struct qeth_channel *channel, 701 struct qeth_cmd_buffer *iob) 702 { 703 unsigned long flags; 704 705 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 706 spin_lock_irqsave(&channel->iob_lock, flags); 707 memset(iob->data, 0, QETH_BUFSIZE); 708 iob->state = BUF_STATE_FREE; 709 iob->callback = qeth_send_control_data_cb; 710 iob->rc = 0; 711 spin_unlock_irqrestore(&channel->iob_lock, flags); 712 wake_up(&channel->wait_q); 713 } 714 EXPORT_SYMBOL_GPL(qeth_release_buffer); 715 716 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 717 { 718 struct qeth_cmd_buffer *buffer = NULL; 719 unsigned long flags; 720 721 spin_lock_irqsave(&channel->iob_lock, flags); 722 buffer = __qeth_get_buffer(channel); 723 spin_unlock_irqrestore(&channel->iob_lock, flags); 724 return buffer; 725 } 726 727 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 728 { 729 struct qeth_cmd_buffer *buffer; 730 wait_event(channel->wait_q, 731 ((buffer = qeth_get_buffer(channel)) != NULL)); 732 return buffer; 733 } 734 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 735 736 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 737 { 738 int cnt; 739 740 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 741 qeth_release_buffer(channel, &channel->iob[cnt]); 742 channel->buf_no = 0; 743 channel->io_buf_no = 0; 744 } 745 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 746 747 static void qeth_send_control_data_cb(struct qeth_channel *channel, 748 struct qeth_cmd_buffer *iob) 749 { 750 struct qeth_card *card; 751 struct qeth_reply *reply, *r; 752 struct qeth_ipa_cmd *cmd; 753 unsigned long flags; 754 int keep_reply; 755 int rc = 0; 756 757 card = CARD_FROM_CDEV(channel->ccwdev); 758 QETH_CARD_TEXT(card, 4, "sndctlcb"); 759 rc = qeth_check_idx_response(card, iob->data); 760 switch (rc) { 761 case 0: 762 break; 763 case -EIO: 764 qeth_clear_ipacmd_list(card); 765 qeth_schedule_recovery(card); 766 /* fall through */ 767 default: 768 goto out; 769 } 770 771 cmd = qeth_check_ipa_data(card, iob); 772 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 773 goto out; 774 /*in case of OSN : check if cmd is set */ 775 if (card->info.type == QETH_CARD_TYPE_OSN && 776 cmd && 777 cmd->hdr.command != IPA_CMD_STARTLAN && 778 card->osn_info.assist_cb != NULL) { 779 card->osn_info.assist_cb(card->dev, cmd); 780 goto out; 781 } 782 783 spin_lock_irqsave(&card->lock, flags); 784 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 785 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 786 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 787 qeth_get_reply(reply); 788 list_del_init(&reply->list); 789 spin_unlock_irqrestore(&card->lock, flags); 790 keep_reply = 0; 791 if (reply->callback != NULL) { 792 if (cmd) { 793 reply->offset = (__u16)((char *)cmd - 794 (char *)iob->data); 795 keep_reply = reply->callback(card, 796 reply, 797 (unsigned long)cmd); 798 } else 799 keep_reply = reply->callback(card, 800 reply, 801 (unsigned long)iob); 802 } 803 if (cmd) 804 reply->rc = (u16) cmd->hdr.return_code; 805 else if (iob->rc) 806 reply->rc = iob->rc; 807 if (keep_reply) { 808 spin_lock_irqsave(&card->lock, flags); 809 list_add_tail(&reply->list, 810 &card->cmd_waiter_list); 811 spin_unlock_irqrestore(&card->lock, flags); 812 } else { 813 atomic_inc(&reply->received); 814 wake_up(&reply->wait_q); 815 } 816 qeth_put_reply(reply); 817 goto out; 818 } 819 } 820 spin_unlock_irqrestore(&card->lock, flags); 821 out: 822 memcpy(&card->seqno.pdu_hdr_ack, 823 QETH_PDU_HEADER_SEQ_NO(iob->data), 824 QETH_SEQ_NO_LENGTH); 825 qeth_release_buffer(channel, iob); 826 } 827 828 static int qeth_setup_channel(struct qeth_channel *channel) 829 { 830 int cnt; 831 832 QETH_DBF_TEXT(SETUP, 2, "setupch"); 833 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 834 channel->iob[cnt].data = 835 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 836 if (channel->iob[cnt].data == NULL) 837 break; 838 channel->iob[cnt].state = BUF_STATE_FREE; 839 channel->iob[cnt].channel = channel; 840 channel->iob[cnt].callback = qeth_send_control_data_cb; 841 channel->iob[cnt].rc = 0; 842 } 843 if (cnt < QETH_CMD_BUFFER_NO) { 844 while (cnt-- > 0) 845 kfree(channel->iob[cnt].data); 846 return -ENOMEM; 847 } 848 channel->buf_no = 0; 849 channel->io_buf_no = 0; 850 atomic_set(&channel->irq_pending, 0); 851 spin_lock_init(&channel->iob_lock); 852 853 init_waitqueue_head(&channel->wait_q); 854 return 0; 855 } 856 857 static int qeth_set_thread_start_bit(struct qeth_card *card, 858 unsigned long thread) 859 { 860 unsigned long flags; 861 862 spin_lock_irqsave(&card->thread_mask_lock, flags); 863 if (!(card->thread_allowed_mask & thread) || 864 (card->thread_start_mask & thread)) { 865 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 866 return -EPERM; 867 } 868 card->thread_start_mask |= thread; 869 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 870 return 0; 871 } 872 873 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 874 { 875 unsigned long flags; 876 877 spin_lock_irqsave(&card->thread_mask_lock, flags); 878 card->thread_start_mask &= ~thread; 879 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 880 wake_up(&card->wait_q); 881 } 882 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 883 884 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 885 { 886 unsigned long flags; 887 888 spin_lock_irqsave(&card->thread_mask_lock, flags); 889 card->thread_running_mask &= ~thread; 890 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 891 wake_up(&card->wait_q); 892 } 893 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 894 895 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 896 { 897 unsigned long flags; 898 int rc = 0; 899 900 spin_lock_irqsave(&card->thread_mask_lock, flags); 901 if (card->thread_start_mask & thread) { 902 if ((card->thread_allowed_mask & thread) && 903 !(card->thread_running_mask & thread)) { 904 rc = 1; 905 card->thread_start_mask &= ~thread; 906 card->thread_running_mask |= thread; 907 } else 908 rc = -EPERM; 909 } 910 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 911 return rc; 912 } 913 914 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 915 { 916 int rc = 0; 917 918 wait_event(card->wait_q, 919 (rc = __qeth_do_run_thread(card, thread)) >= 0); 920 return rc; 921 } 922 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 923 924 void qeth_schedule_recovery(struct qeth_card *card) 925 { 926 QETH_CARD_TEXT(card, 2, "startrec"); 927 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 928 schedule_work(&card->kernel_thread_starter); 929 } 930 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 931 932 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 933 { 934 int dstat, cstat; 935 char *sense; 936 struct qeth_card *card; 937 938 sense = (char *) irb->ecw; 939 cstat = irb->scsw.cmd.cstat; 940 dstat = irb->scsw.cmd.dstat; 941 card = CARD_FROM_CDEV(cdev); 942 943 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 944 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 945 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 946 QETH_CARD_TEXT(card, 2, "CGENCHK"); 947 dev_warn(&cdev->dev, "The qeth device driver " 948 "failed to recover an error on the device\n"); 949 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 950 dev_name(&cdev->dev), dstat, cstat); 951 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 952 16, 1, irb, 64, 1); 953 return 1; 954 } 955 956 if (dstat & DEV_STAT_UNIT_CHECK) { 957 if (sense[SENSE_RESETTING_EVENT_BYTE] & 958 SENSE_RESETTING_EVENT_FLAG) { 959 QETH_CARD_TEXT(card, 2, "REVIND"); 960 return 1; 961 } 962 if (sense[SENSE_COMMAND_REJECT_BYTE] & 963 SENSE_COMMAND_REJECT_FLAG) { 964 QETH_CARD_TEXT(card, 2, "CMDREJi"); 965 return 1; 966 } 967 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 968 QETH_CARD_TEXT(card, 2, "AFFE"); 969 return 1; 970 } 971 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 972 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 973 return 0; 974 } 975 QETH_CARD_TEXT(card, 2, "DGENCHK"); 976 return 1; 977 } 978 return 0; 979 } 980 981 static long __qeth_check_irb_error(struct ccw_device *cdev, 982 unsigned long intparm, struct irb *irb) 983 { 984 struct qeth_card *card; 985 986 card = CARD_FROM_CDEV(cdev); 987 988 if (!IS_ERR(irb)) 989 return 0; 990 991 switch (PTR_ERR(irb)) { 992 case -EIO: 993 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 994 dev_name(&cdev->dev)); 995 QETH_CARD_TEXT(card, 2, "ckirberr"); 996 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 997 break; 998 case -ETIMEDOUT: 999 dev_warn(&cdev->dev, "A hardware operation timed out" 1000 " on the device\n"); 1001 QETH_CARD_TEXT(card, 2, "ckirberr"); 1002 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1003 if (intparm == QETH_RCD_PARM) { 1004 if (card && (card->data.ccwdev == cdev)) { 1005 card->data.state = CH_STATE_DOWN; 1006 wake_up(&card->wait_q); 1007 } 1008 } 1009 break; 1010 default: 1011 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1012 dev_name(&cdev->dev), PTR_ERR(irb)); 1013 QETH_CARD_TEXT(card, 2, "ckirberr"); 1014 QETH_CARD_TEXT(card, 2, " rc???"); 1015 } 1016 return PTR_ERR(irb); 1017 } 1018 1019 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1020 struct irb *irb) 1021 { 1022 int rc; 1023 int cstat, dstat; 1024 struct qeth_cmd_buffer *buffer; 1025 struct qeth_channel *channel; 1026 struct qeth_card *card; 1027 struct qeth_cmd_buffer *iob; 1028 __u8 index; 1029 1030 if (__qeth_check_irb_error(cdev, intparm, irb)) 1031 return; 1032 cstat = irb->scsw.cmd.cstat; 1033 dstat = irb->scsw.cmd.dstat; 1034 1035 card = CARD_FROM_CDEV(cdev); 1036 if (!card) 1037 return; 1038 1039 QETH_CARD_TEXT(card, 5, "irq"); 1040 1041 if (card->read.ccwdev == cdev) { 1042 channel = &card->read; 1043 QETH_CARD_TEXT(card, 5, "read"); 1044 } else if (card->write.ccwdev == cdev) { 1045 channel = &card->write; 1046 QETH_CARD_TEXT(card, 5, "write"); 1047 } else { 1048 channel = &card->data; 1049 QETH_CARD_TEXT(card, 5, "data"); 1050 } 1051 atomic_set(&channel->irq_pending, 0); 1052 1053 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1054 channel->state = CH_STATE_STOPPED; 1055 1056 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1057 channel->state = CH_STATE_HALTED; 1058 1059 /*let's wake up immediately on data channel*/ 1060 if ((channel == &card->data) && (intparm != 0) && 1061 (intparm != QETH_RCD_PARM)) 1062 goto out; 1063 1064 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1065 QETH_CARD_TEXT(card, 6, "clrchpar"); 1066 /* we don't have to handle this further */ 1067 intparm = 0; 1068 } 1069 if (intparm == QETH_HALT_CHANNEL_PARM) { 1070 QETH_CARD_TEXT(card, 6, "hltchpar"); 1071 /* we don't have to handle this further */ 1072 intparm = 0; 1073 } 1074 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1075 (dstat & DEV_STAT_UNIT_CHECK) || 1076 (cstat)) { 1077 if (irb->esw.esw0.erw.cons) { 1078 dev_warn(&channel->ccwdev->dev, 1079 "The qeth device driver failed to recover " 1080 "an error on the device\n"); 1081 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1082 "0x%X dstat 0x%X\n", 1083 dev_name(&channel->ccwdev->dev), cstat, dstat); 1084 print_hex_dump(KERN_WARNING, "qeth: irb ", 1085 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1086 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1087 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1088 } 1089 if (intparm == QETH_RCD_PARM) { 1090 channel->state = CH_STATE_DOWN; 1091 goto out; 1092 } 1093 rc = qeth_get_problem(cdev, irb); 1094 if (rc) { 1095 qeth_clear_ipacmd_list(card); 1096 qeth_schedule_recovery(card); 1097 goto out; 1098 } 1099 } 1100 1101 if (intparm == QETH_RCD_PARM) { 1102 channel->state = CH_STATE_RCD_DONE; 1103 goto out; 1104 } 1105 if (intparm) { 1106 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1107 buffer->state = BUF_STATE_PROCESSED; 1108 } 1109 if (channel == &card->data) 1110 return; 1111 if (channel == &card->read && 1112 channel->state == CH_STATE_UP) 1113 qeth_issue_next_read(card); 1114 1115 iob = channel->iob; 1116 index = channel->buf_no; 1117 while (iob[index].state == BUF_STATE_PROCESSED) { 1118 if (iob[index].callback != NULL) 1119 iob[index].callback(channel, iob + index); 1120 1121 index = (index + 1) % QETH_CMD_BUFFER_NO; 1122 } 1123 channel->buf_no = index; 1124 out: 1125 wake_up(&card->wait_q); 1126 return; 1127 } 1128 1129 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1130 struct qeth_qdio_out_buffer *buf, 1131 enum iucv_tx_notify notification) 1132 { 1133 struct sk_buff *skb; 1134 1135 if (skb_queue_empty(&buf->skb_list)) 1136 goto out; 1137 skb = skb_peek(&buf->skb_list); 1138 while (skb) { 1139 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1140 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1141 if (skb->protocol == ETH_P_AF_IUCV) { 1142 if (skb->sk) { 1143 struct iucv_sock *iucv = iucv_sk(skb->sk); 1144 iucv->sk_txnotify(skb, notification); 1145 } 1146 } 1147 if (skb_queue_is_last(&buf->skb_list, skb)) 1148 skb = NULL; 1149 else 1150 skb = skb_queue_next(&buf->skb_list, skb); 1151 } 1152 out: 1153 return; 1154 } 1155 1156 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1157 { 1158 struct sk_buff *skb; 1159 struct iucv_sock *iucv; 1160 int notify_general_error = 0; 1161 1162 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1163 notify_general_error = 1; 1164 1165 /* release may never happen from within CQ tasklet scope */ 1166 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1167 1168 skb = skb_dequeue(&buf->skb_list); 1169 while (skb) { 1170 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1171 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1172 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1173 if (skb->sk) { 1174 iucv = iucv_sk(skb->sk); 1175 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1176 } 1177 } 1178 atomic_dec(&skb->users); 1179 dev_kfree_skb_any(skb); 1180 skb = skb_dequeue(&buf->skb_list); 1181 } 1182 } 1183 1184 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1185 struct qeth_qdio_out_buffer *buf, 1186 enum qeth_qdio_buffer_states newbufstate) 1187 { 1188 int i; 1189 1190 /* is PCI flag set on buffer? */ 1191 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1192 atomic_dec(&queue->set_pci_flags_count); 1193 1194 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1195 qeth_release_skbs(buf); 1196 } 1197 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1198 if (buf->buffer->element[i].addr && buf->is_header[i]) 1199 kmem_cache_free(qeth_core_header_cache, 1200 buf->buffer->element[i].addr); 1201 buf->is_header[i] = 0; 1202 buf->buffer->element[i].length = 0; 1203 buf->buffer->element[i].addr = NULL; 1204 buf->buffer->element[i].eflags = 0; 1205 buf->buffer->element[i].sflags = 0; 1206 } 1207 buf->buffer->element[15].eflags = 0; 1208 buf->buffer->element[15].sflags = 0; 1209 buf->next_element_to_fill = 0; 1210 atomic_set(&buf->state, newbufstate); 1211 } 1212 1213 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1214 { 1215 int j; 1216 1217 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1218 if (!q->bufs[j]) 1219 continue; 1220 qeth_cleanup_handled_pending(q, j, 1); 1221 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1222 if (free) { 1223 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1224 q->bufs[j] = NULL; 1225 } 1226 } 1227 } 1228 1229 void qeth_clear_qdio_buffers(struct qeth_card *card) 1230 { 1231 int i; 1232 1233 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1234 /* clear outbound buffers to free skbs */ 1235 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1236 if (card->qdio.out_qs[i]) { 1237 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1238 } 1239 } 1240 } 1241 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1242 1243 static void qeth_free_buffer_pool(struct qeth_card *card) 1244 { 1245 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1246 int i = 0; 1247 list_for_each_entry_safe(pool_entry, tmp, 1248 &card->qdio.init_pool.entry_list, init_list){ 1249 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1250 free_page((unsigned long)pool_entry->elements[i]); 1251 list_del(&pool_entry->init_list); 1252 kfree(pool_entry); 1253 } 1254 } 1255 1256 static void qeth_free_qdio_buffers(struct qeth_card *card) 1257 { 1258 int i, j; 1259 1260 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1261 QETH_QDIO_UNINITIALIZED) 1262 return; 1263 1264 qeth_free_cq(card); 1265 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1266 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 1267 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1268 kfree(card->qdio.in_q); 1269 card->qdio.in_q = NULL; 1270 /* inbound buffer pool */ 1271 qeth_free_buffer_pool(card); 1272 /* free outbound qdio_qs */ 1273 if (card->qdio.out_qs) { 1274 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1275 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1276 kfree(card->qdio.out_qs[i]); 1277 } 1278 kfree(card->qdio.out_qs); 1279 card->qdio.out_qs = NULL; 1280 } 1281 } 1282 1283 static void qeth_clean_channel(struct qeth_channel *channel) 1284 { 1285 int cnt; 1286 1287 QETH_DBF_TEXT(SETUP, 2, "freech"); 1288 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1289 kfree(channel->iob[cnt].data); 1290 } 1291 1292 static void qeth_set_single_write_queues(struct qeth_card *card) 1293 { 1294 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1295 (card->qdio.no_out_queues == 4)) 1296 qeth_free_qdio_buffers(card); 1297 1298 card->qdio.no_out_queues = 1; 1299 if (card->qdio.default_out_queue != 0) 1300 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1301 1302 card->qdio.default_out_queue = 0; 1303 } 1304 1305 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1306 { 1307 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1308 (card->qdio.no_out_queues == 1)) { 1309 qeth_free_qdio_buffers(card); 1310 card->qdio.default_out_queue = 2; 1311 } 1312 card->qdio.no_out_queues = 4; 1313 } 1314 1315 static void qeth_update_from_chp_desc(struct qeth_card *card) 1316 { 1317 struct ccw_device *ccwdev; 1318 struct channelPath_dsc { 1319 u8 flags; 1320 u8 lsn; 1321 u8 desc; 1322 u8 chpid; 1323 u8 swla; 1324 u8 zeroes; 1325 u8 chla; 1326 u8 chpp; 1327 } *chp_dsc; 1328 1329 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1330 1331 ccwdev = card->data.ccwdev; 1332 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1333 if (!chp_dsc) 1334 goto out; 1335 1336 card->info.func_level = 0x4100 + chp_dsc->desc; 1337 if (card->info.type == QETH_CARD_TYPE_IQD) 1338 goto out; 1339 1340 /* CHPP field bit 6 == 1 -> single queue */ 1341 if ((chp_dsc->chpp & 0x02) == 0x02) 1342 qeth_set_single_write_queues(card); 1343 else 1344 qeth_set_multiple_write_queues(card); 1345 out: 1346 kfree(chp_dsc); 1347 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1348 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1349 } 1350 1351 static void qeth_init_qdio_info(struct qeth_card *card) 1352 { 1353 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1354 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1355 /* inbound */ 1356 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1357 if (card->info.type == QETH_CARD_TYPE_IQD) 1358 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1359 else 1360 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1361 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1362 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1363 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1364 } 1365 1366 static void qeth_set_intial_options(struct qeth_card *card) 1367 { 1368 card->options.route4.type = NO_ROUTER; 1369 card->options.route6.type = NO_ROUTER; 1370 card->options.fake_broadcast = 0; 1371 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1372 card->options.performance_stats = 0; 1373 card->options.rx_sg_cb = QETH_RX_SG_CB; 1374 card->options.isolation = ISOLATION_MODE_NONE; 1375 card->options.cq = QETH_CQ_DISABLED; 1376 } 1377 1378 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1379 { 1380 unsigned long flags; 1381 int rc = 0; 1382 1383 spin_lock_irqsave(&card->thread_mask_lock, flags); 1384 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1385 (u8) card->thread_start_mask, 1386 (u8) card->thread_allowed_mask, 1387 (u8) card->thread_running_mask); 1388 rc = (card->thread_start_mask & thread); 1389 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1390 return rc; 1391 } 1392 1393 static void qeth_start_kernel_thread(struct work_struct *work) 1394 { 1395 struct task_struct *ts; 1396 struct qeth_card *card = container_of(work, struct qeth_card, 1397 kernel_thread_starter); 1398 QETH_CARD_TEXT(card , 2, "strthrd"); 1399 1400 if (card->read.state != CH_STATE_UP && 1401 card->write.state != CH_STATE_UP) 1402 return; 1403 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1404 ts = kthread_run(card->discipline->recover, (void *)card, 1405 "qeth_recover"); 1406 if (IS_ERR(ts)) { 1407 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1408 qeth_clear_thread_running_bit(card, 1409 QETH_RECOVER_THREAD); 1410 } 1411 } 1412 } 1413 1414 static int qeth_setup_card(struct qeth_card *card) 1415 { 1416 1417 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1418 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1419 1420 card->read.state = CH_STATE_DOWN; 1421 card->write.state = CH_STATE_DOWN; 1422 card->data.state = CH_STATE_DOWN; 1423 card->state = CARD_STATE_DOWN; 1424 card->lan_online = 0; 1425 card->read_or_write_problem = 0; 1426 card->dev = NULL; 1427 spin_lock_init(&card->vlanlock); 1428 spin_lock_init(&card->mclock); 1429 spin_lock_init(&card->lock); 1430 spin_lock_init(&card->ip_lock); 1431 spin_lock_init(&card->thread_mask_lock); 1432 mutex_init(&card->conf_mutex); 1433 mutex_init(&card->discipline_mutex); 1434 card->thread_start_mask = 0; 1435 card->thread_allowed_mask = 0; 1436 card->thread_running_mask = 0; 1437 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1438 INIT_LIST_HEAD(&card->ip_list); 1439 INIT_LIST_HEAD(card->ip_tbd_list); 1440 INIT_LIST_HEAD(&card->cmd_waiter_list); 1441 init_waitqueue_head(&card->wait_q); 1442 /* initial options */ 1443 qeth_set_intial_options(card); 1444 /* IP address takeover */ 1445 INIT_LIST_HEAD(&card->ipato.entries); 1446 card->ipato.enabled = 0; 1447 card->ipato.invert4 = 0; 1448 card->ipato.invert6 = 0; 1449 /* init QDIO stuff */ 1450 qeth_init_qdio_info(card); 1451 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1452 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1453 return 0; 1454 } 1455 1456 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1457 { 1458 struct qeth_card *card = container_of(slr, struct qeth_card, 1459 qeth_service_level); 1460 if (card->info.mcl_level[0]) 1461 seq_printf(m, "qeth: %s firmware level %s\n", 1462 CARD_BUS_ID(card), card->info.mcl_level); 1463 } 1464 1465 static struct qeth_card *qeth_alloc_card(void) 1466 { 1467 struct qeth_card *card; 1468 1469 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1470 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1471 if (!card) 1472 goto out; 1473 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1474 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1475 if (!card->ip_tbd_list) { 1476 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1477 goto out_card; 1478 } 1479 if (qeth_setup_channel(&card->read)) 1480 goto out_ip; 1481 if (qeth_setup_channel(&card->write)) 1482 goto out_channel; 1483 card->options.layer2 = -1; 1484 card->qeth_service_level.seq_print = qeth_core_sl_print; 1485 register_service_level(&card->qeth_service_level); 1486 return card; 1487 1488 out_channel: 1489 qeth_clean_channel(&card->read); 1490 out_ip: 1491 kfree(card->ip_tbd_list); 1492 out_card: 1493 kfree(card); 1494 out: 1495 return NULL; 1496 } 1497 1498 static int qeth_determine_card_type(struct qeth_card *card) 1499 { 1500 int i = 0; 1501 1502 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1503 1504 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1505 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1506 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1507 if ((CARD_RDEV(card)->id.dev_type == 1508 known_devices[i][QETH_DEV_TYPE_IND]) && 1509 (CARD_RDEV(card)->id.dev_model == 1510 known_devices[i][QETH_DEV_MODEL_IND])) { 1511 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1512 card->qdio.no_out_queues = 1513 known_devices[i][QETH_QUEUE_NO_IND]; 1514 card->qdio.no_in_queues = 1; 1515 card->info.is_multicast_different = 1516 known_devices[i][QETH_MULTICAST_IND]; 1517 qeth_update_from_chp_desc(card); 1518 return 0; 1519 } 1520 i++; 1521 } 1522 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1523 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1524 "unknown type\n"); 1525 return -ENOENT; 1526 } 1527 1528 static int qeth_clear_channel(struct qeth_channel *channel) 1529 { 1530 unsigned long flags; 1531 struct qeth_card *card; 1532 int rc; 1533 1534 card = CARD_FROM_CDEV(channel->ccwdev); 1535 QETH_CARD_TEXT(card, 3, "clearch"); 1536 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1537 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1538 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1539 1540 if (rc) 1541 return rc; 1542 rc = wait_event_interruptible_timeout(card->wait_q, 1543 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1544 if (rc == -ERESTARTSYS) 1545 return rc; 1546 if (channel->state != CH_STATE_STOPPED) 1547 return -ETIME; 1548 channel->state = CH_STATE_DOWN; 1549 return 0; 1550 } 1551 1552 static int qeth_halt_channel(struct qeth_channel *channel) 1553 { 1554 unsigned long flags; 1555 struct qeth_card *card; 1556 int rc; 1557 1558 card = CARD_FROM_CDEV(channel->ccwdev); 1559 QETH_CARD_TEXT(card, 3, "haltch"); 1560 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1561 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1562 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1563 1564 if (rc) 1565 return rc; 1566 rc = wait_event_interruptible_timeout(card->wait_q, 1567 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1568 if (rc == -ERESTARTSYS) 1569 return rc; 1570 if (channel->state != CH_STATE_HALTED) 1571 return -ETIME; 1572 return 0; 1573 } 1574 1575 static int qeth_halt_channels(struct qeth_card *card) 1576 { 1577 int rc1 = 0, rc2 = 0, rc3 = 0; 1578 1579 QETH_CARD_TEXT(card, 3, "haltchs"); 1580 rc1 = qeth_halt_channel(&card->read); 1581 rc2 = qeth_halt_channel(&card->write); 1582 rc3 = qeth_halt_channel(&card->data); 1583 if (rc1) 1584 return rc1; 1585 if (rc2) 1586 return rc2; 1587 return rc3; 1588 } 1589 1590 static int qeth_clear_channels(struct qeth_card *card) 1591 { 1592 int rc1 = 0, rc2 = 0, rc3 = 0; 1593 1594 QETH_CARD_TEXT(card, 3, "clearchs"); 1595 rc1 = qeth_clear_channel(&card->read); 1596 rc2 = qeth_clear_channel(&card->write); 1597 rc3 = qeth_clear_channel(&card->data); 1598 if (rc1) 1599 return rc1; 1600 if (rc2) 1601 return rc2; 1602 return rc3; 1603 } 1604 1605 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1606 { 1607 int rc = 0; 1608 1609 QETH_CARD_TEXT(card, 3, "clhacrd"); 1610 1611 if (halt) 1612 rc = qeth_halt_channels(card); 1613 if (rc) 1614 return rc; 1615 return qeth_clear_channels(card); 1616 } 1617 1618 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1619 { 1620 int rc = 0; 1621 1622 QETH_CARD_TEXT(card, 3, "qdioclr"); 1623 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1624 QETH_QDIO_CLEANING)) { 1625 case QETH_QDIO_ESTABLISHED: 1626 if (card->info.type == QETH_CARD_TYPE_IQD) 1627 rc = qdio_shutdown(CARD_DDEV(card), 1628 QDIO_FLAG_CLEANUP_USING_HALT); 1629 else 1630 rc = qdio_shutdown(CARD_DDEV(card), 1631 QDIO_FLAG_CLEANUP_USING_CLEAR); 1632 if (rc) 1633 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1634 qdio_free(CARD_DDEV(card)); 1635 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1636 break; 1637 case QETH_QDIO_CLEANING: 1638 return rc; 1639 default: 1640 break; 1641 } 1642 rc = qeth_clear_halt_card(card, use_halt); 1643 if (rc) 1644 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1645 card->state = CARD_STATE_DOWN; 1646 return rc; 1647 } 1648 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1649 1650 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1651 int *length) 1652 { 1653 struct ciw *ciw; 1654 char *rcd_buf; 1655 int ret; 1656 struct qeth_channel *channel = &card->data; 1657 unsigned long flags; 1658 1659 /* 1660 * scan for RCD command in extended SenseID data 1661 */ 1662 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1663 if (!ciw || ciw->cmd == 0) 1664 return -EOPNOTSUPP; 1665 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1666 if (!rcd_buf) 1667 return -ENOMEM; 1668 1669 channel->ccw.cmd_code = ciw->cmd; 1670 channel->ccw.cda = (__u32) __pa(rcd_buf); 1671 channel->ccw.count = ciw->count; 1672 channel->ccw.flags = CCW_FLAG_SLI; 1673 channel->state = CH_STATE_RCD; 1674 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1675 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1676 QETH_RCD_PARM, LPM_ANYPATH, 0, 1677 QETH_RCD_TIMEOUT); 1678 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1679 if (!ret) 1680 wait_event(card->wait_q, 1681 (channel->state == CH_STATE_RCD_DONE || 1682 channel->state == CH_STATE_DOWN)); 1683 if (channel->state == CH_STATE_DOWN) 1684 ret = -EIO; 1685 else 1686 channel->state = CH_STATE_DOWN; 1687 if (ret) { 1688 kfree(rcd_buf); 1689 *buffer = NULL; 1690 *length = 0; 1691 } else { 1692 *length = ciw->count; 1693 *buffer = rcd_buf; 1694 } 1695 return ret; 1696 } 1697 1698 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1699 { 1700 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1701 card->info.chpid = prcd[30]; 1702 card->info.unit_addr2 = prcd[31]; 1703 card->info.cula = prcd[63]; 1704 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1705 (prcd[0x11] == _ascebc['M'])); 1706 } 1707 1708 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1709 { 1710 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1711 1712 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1713 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) { 1714 card->info.blkt.time_total = 250; 1715 card->info.blkt.inter_packet = 5; 1716 card->info.blkt.inter_packet_jumbo = 15; 1717 } else { 1718 card->info.blkt.time_total = 0; 1719 card->info.blkt.inter_packet = 0; 1720 card->info.blkt.inter_packet_jumbo = 0; 1721 } 1722 } 1723 1724 static void qeth_init_tokens(struct qeth_card *card) 1725 { 1726 card->token.issuer_rm_w = 0x00010103UL; 1727 card->token.cm_filter_w = 0x00010108UL; 1728 card->token.cm_connection_w = 0x0001010aUL; 1729 card->token.ulp_filter_w = 0x0001010bUL; 1730 card->token.ulp_connection_w = 0x0001010dUL; 1731 } 1732 1733 static void qeth_init_func_level(struct qeth_card *card) 1734 { 1735 switch (card->info.type) { 1736 case QETH_CARD_TYPE_IQD: 1737 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1738 break; 1739 case QETH_CARD_TYPE_OSD: 1740 case QETH_CARD_TYPE_OSN: 1741 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1742 break; 1743 default: 1744 break; 1745 } 1746 } 1747 1748 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1749 void (*idx_reply_cb)(struct qeth_channel *, 1750 struct qeth_cmd_buffer *)) 1751 { 1752 struct qeth_cmd_buffer *iob; 1753 unsigned long flags; 1754 int rc; 1755 struct qeth_card *card; 1756 1757 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1758 card = CARD_FROM_CDEV(channel->ccwdev); 1759 iob = qeth_get_buffer(channel); 1760 iob->callback = idx_reply_cb; 1761 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1762 channel->ccw.count = QETH_BUFSIZE; 1763 channel->ccw.cda = (__u32) __pa(iob->data); 1764 1765 wait_event(card->wait_q, 1766 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1767 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1768 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1769 rc = ccw_device_start(channel->ccwdev, 1770 &channel->ccw, (addr_t) iob, 0, 0); 1771 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1772 1773 if (rc) { 1774 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1775 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1776 atomic_set(&channel->irq_pending, 0); 1777 wake_up(&card->wait_q); 1778 return rc; 1779 } 1780 rc = wait_event_interruptible_timeout(card->wait_q, 1781 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1782 if (rc == -ERESTARTSYS) 1783 return rc; 1784 if (channel->state != CH_STATE_UP) { 1785 rc = -ETIME; 1786 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1787 qeth_clear_cmd_buffers(channel); 1788 } else 1789 rc = 0; 1790 return rc; 1791 } 1792 1793 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1794 void (*idx_reply_cb)(struct qeth_channel *, 1795 struct qeth_cmd_buffer *)) 1796 { 1797 struct qeth_card *card; 1798 struct qeth_cmd_buffer *iob; 1799 unsigned long flags; 1800 __u16 temp; 1801 __u8 tmp; 1802 int rc; 1803 struct ccw_dev_id temp_devid; 1804 1805 card = CARD_FROM_CDEV(channel->ccwdev); 1806 1807 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1808 1809 iob = qeth_get_buffer(channel); 1810 iob->callback = idx_reply_cb; 1811 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1812 channel->ccw.count = IDX_ACTIVATE_SIZE; 1813 channel->ccw.cda = (__u32) __pa(iob->data); 1814 if (channel == &card->write) { 1815 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1816 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1817 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1818 card->seqno.trans_hdr++; 1819 } else { 1820 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1821 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1822 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1823 } 1824 tmp = ((__u8)card->info.portno) | 0x80; 1825 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1826 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1827 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1828 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1829 &card->info.func_level, sizeof(__u16)); 1830 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1831 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1832 temp = (card->info.cula << 8) + card->info.unit_addr2; 1833 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1834 1835 wait_event(card->wait_q, 1836 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1837 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1838 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1839 rc = ccw_device_start(channel->ccwdev, 1840 &channel->ccw, (addr_t) iob, 0, 0); 1841 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1842 1843 if (rc) { 1844 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1845 rc); 1846 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1847 atomic_set(&channel->irq_pending, 0); 1848 wake_up(&card->wait_q); 1849 return rc; 1850 } 1851 rc = wait_event_interruptible_timeout(card->wait_q, 1852 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1853 if (rc == -ERESTARTSYS) 1854 return rc; 1855 if (channel->state != CH_STATE_ACTIVATING) { 1856 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1857 " failed to recover an error on the device\n"); 1858 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1859 dev_name(&channel->ccwdev->dev)); 1860 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1861 qeth_clear_cmd_buffers(channel); 1862 return -ETIME; 1863 } 1864 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1865 } 1866 1867 static int qeth_peer_func_level(int level) 1868 { 1869 if ((level & 0xff) == 8) 1870 return (level & 0xff) + 0x400; 1871 if (((level >> 8) & 3) == 1) 1872 return (level & 0xff) + 0x200; 1873 return level; 1874 } 1875 1876 static void qeth_idx_write_cb(struct qeth_channel *channel, 1877 struct qeth_cmd_buffer *iob) 1878 { 1879 struct qeth_card *card; 1880 __u16 temp; 1881 1882 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1883 1884 if (channel->state == CH_STATE_DOWN) { 1885 channel->state = CH_STATE_ACTIVATING; 1886 goto out; 1887 } 1888 card = CARD_FROM_CDEV(channel->ccwdev); 1889 1890 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1891 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1892 dev_err(&card->write.ccwdev->dev, 1893 "The adapter is used exclusively by another " 1894 "host\n"); 1895 else 1896 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1897 " negative reply\n", 1898 dev_name(&card->write.ccwdev->dev)); 1899 goto out; 1900 } 1901 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1902 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1903 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1904 "function level mismatch (sent: 0x%x, received: " 1905 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1906 card->info.func_level, temp); 1907 goto out; 1908 } 1909 channel->state = CH_STATE_UP; 1910 out: 1911 qeth_release_buffer(channel, iob); 1912 } 1913 1914 static void qeth_idx_read_cb(struct qeth_channel *channel, 1915 struct qeth_cmd_buffer *iob) 1916 { 1917 struct qeth_card *card; 1918 __u16 temp; 1919 1920 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1921 if (channel->state == CH_STATE_DOWN) { 1922 channel->state = CH_STATE_ACTIVATING; 1923 goto out; 1924 } 1925 1926 card = CARD_FROM_CDEV(channel->ccwdev); 1927 if (qeth_check_idx_response(card, iob->data)) 1928 goto out; 1929 1930 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1931 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1932 case QETH_IDX_ACT_ERR_EXCL: 1933 dev_err(&card->write.ccwdev->dev, 1934 "The adapter is used exclusively by another " 1935 "host\n"); 1936 break; 1937 case QETH_IDX_ACT_ERR_AUTH: 1938 case QETH_IDX_ACT_ERR_AUTH_USER: 1939 dev_err(&card->read.ccwdev->dev, 1940 "Setting the device online failed because of " 1941 "insufficient authorization\n"); 1942 break; 1943 default: 1944 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1945 " negative reply\n", 1946 dev_name(&card->read.ccwdev->dev)); 1947 } 1948 QETH_CARD_TEXT_(card, 2, "idxread%c", 1949 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1950 goto out; 1951 } 1952 1953 /** 1954 * * temporary fix for microcode bug 1955 * * to revert it,replace OR by AND 1956 * */ 1957 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1958 (card->info.type == QETH_CARD_TYPE_OSD)) 1959 card->info.portname_required = 1; 1960 1961 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1962 if (temp != qeth_peer_func_level(card->info.func_level)) { 1963 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1964 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1965 dev_name(&card->read.ccwdev->dev), 1966 card->info.func_level, temp); 1967 goto out; 1968 } 1969 memcpy(&card->token.issuer_rm_r, 1970 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1971 QETH_MPC_TOKEN_LENGTH); 1972 memcpy(&card->info.mcl_level[0], 1973 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1974 channel->state = CH_STATE_UP; 1975 out: 1976 qeth_release_buffer(channel, iob); 1977 } 1978 1979 void qeth_prepare_control_data(struct qeth_card *card, int len, 1980 struct qeth_cmd_buffer *iob) 1981 { 1982 qeth_setup_ccw(&card->write, iob->data, len); 1983 iob->callback = qeth_release_buffer; 1984 1985 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1986 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1987 card->seqno.trans_hdr++; 1988 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1989 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1990 card->seqno.pdu_hdr++; 1991 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1992 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1993 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1994 } 1995 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1996 1997 int qeth_send_control_data(struct qeth_card *card, int len, 1998 struct qeth_cmd_buffer *iob, 1999 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 2000 unsigned long), 2001 void *reply_param) 2002 { 2003 int rc; 2004 unsigned long flags; 2005 struct qeth_reply *reply = NULL; 2006 unsigned long timeout, event_timeout; 2007 struct qeth_ipa_cmd *cmd; 2008 2009 QETH_CARD_TEXT(card, 2, "sendctl"); 2010 2011 if (card->read_or_write_problem) { 2012 qeth_release_buffer(iob->channel, iob); 2013 return -EIO; 2014 } 2015 reply = qeth_alloc_reply(card); 2016 if (!reply) { 2017 return -ENOMEM; 2018 } 2019 reply->callback = reply_cb; 2020 reply->param = reply_param; 2021 if (card->state == CARD_STATE_DOWN) 2022 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2023 else 2024 reply->seqno = card->seqno.ipa++; 2025 init_waitqueue_head(&reply->wait_q); 2026 spin_lock_irqsave(&card->lock, flags); 2027 list_add_tail(&reply->list, &card->cmd_waiter_list); 2028 spin_unlock_irqrestore(&card->lock, flags); 2029 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2030 2031 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2032 qeth_prepare_control_data(card, len, iob); 2033 2034 if (IS_IPA(iob->data)) 2035 event_timeout = QETH_IPA_TIMEOUT; 2036 else 2037 event_timeout = QETH_TIMEOUT; 2038 timeout = jiffies + event_timeout; 2039 2040 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2041 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2042 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2043 (addr_t) iob, 0, 0); 2044 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2045 if (rc) { 2046 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2047 "ccw_device_start rc = %i\n", 2048 dev_name(&card->write.ccwdev->dev), rc); 2049 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2050 spin_lock_irqsave(&card->lock, flags); 2051 list_del_init(&reply->list); 2052 qeth_put_reply(reply); 2053 spin_unlock_irqrestore(&card->lock, flags); 2054 qeth_release_buffer(iob->channel, iob); 2055 atomic_set(&card->write.irq_pending, 0); 2056 wake_up(&card->wait_q); 2057 return rc; 2058 } 2059 2060 /* we have only one long running ipassist, since we can ensure 2061 process context of this command we can sleep */ 2062 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2063 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2064 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2065 if (!wait_event_timeout(reply->wait_q, 2066 atomic_read(&reply->received), event_timeout)) 2067 goto time_err; 2068 } else { 2069 while (!atomic_read(&reply->received)) { 2070 if (time_after(jiffies, timeout)) 2071 goto time_err; 2072 cpu_relax(); 2073 } 2074 } 2075 2076 if (reply->rc == -EIO) 2077 goto error; 2078 rc = reply->rc; 2079 qeth_put_reply(reply); 2080 return rc; 2081 2082 time_err: 2083 reply->rc = -ETIME; 2084 spin_lock_irqsave(&reply->card->lock, flags); 2085 list_del_init(&reply->list); 2086 spin_unlock_irqrestore(&reply->card->lock, flags); 2087 atomic_inc(&reply->received); 2088 error: 2089 atomic_set(&card->write.irq_pending, 0); 2090 qeth_release_buffer(iob->channel, iob); 2091 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2092 rc = reply->rc; 2093 qeth_put_reply(reply); 2094 return rc; 2095 } 2096 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2097 2098 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2099 unsigned long data) 2100 { 2101 struct qeth_cmd_buffer *iob; 2102 2103 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2104 2105 iob = (struct qeth_cmd_buffer *) data; 2106 memcpy(&card->token.cm_filter_r, 2107 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2108 QETH_MPC_TOKEN_LENGTH); 2109 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2110 return 0; 2111 } 2112 2113 static int qeth_cm_enable(struct qeth_card *card) 2114 { 2115 int rc; 2116 struct qeth_cmd_buffer *iob; 2117 2118 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2119 2120 iob = qeth_wait_for_buffer(&card->write); 2121 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2122 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2123 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2124 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2125 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2126 2127 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2128 qeth_cm_enable_cb, NULL); 2129 return rc; 2130 } 2131 2132 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2133 unsigned long data) 2134 { 2135 2136 struct qeth_cmd_buffer *iob; 2137 2138 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2139 2140 iob = (struct qeth_cmd_buffer *) data; 2141 memcpy(&card->token.cm_connection_r, 2142 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2143 QETH_MPC_TOKEN_LENGTH); 2144 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2145 return 0; 2146 } 2147 2148 static int qeth_cm_setup(struct qeth_card *card) 2149 { 2150 int rc; 2151 struct qeth_cmd_buffer *iob; 2152 2153 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2154 2155 iob = qeth_wait_for_buffer(&card->write); 2156 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2157 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2158 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2159 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2160 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2161 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2162 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2163 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2164 qeth_cm_setup_cb, NULL); 2165 return rc; 2166 2167 } 2168 2169 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2170 { 2171 switch (card->info.type) { 2172 case QETH_CARD_TYPE_UNKNOWN: 2173 return 1500; 2174 case QETH_CARD_TYPE_IQD: 2175 return card->info.max_mtu; 2176 case QETH_CARD_TYPE_OSD: 2177 switch (card->info.link_type) { 2178 case QETH_LINK_TYPE_HSTR: 2179 case QETH_LINK_TYPE_LANE_TR: 2180 return 2000; 2181 default: 2182 return 1492; 2183 } 2184 case QETH_CARD_TYPE_OSM: 2185 case QETH_CARD_TYPE_OSX: 2186 return 1492; 2187 default: 2188 return 1500; 2189 } 2190 } 2191 2192 static inline int qeth_get_mtu_outof_framesize(int framesize) 2193 { 2194 switch (framesize) { 2195 case 0x4000: 2196 return 8192; 2197 case 0x6000: 2198 return 16384; 2199 case 0xa000: 2200 return 32768; 2201 case 0xffff: 2202 return 57344; 2203 default: 2204 return 0; 2205 } 2206 } 2207 2208 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2209 { 2210 switch (card->info.type) { 2211 case QETH_CARD_TYPE_OSD: 2212 case QETH_CARD_TYPE_OSM: 2213 case QETH_CARD_TYPE_OSX: 2214 case QETH_CARD_TYPE_IQD: 2215 return ((mtu >= 576) && 2216 (mtu <= card->info.max_mtu)); 2217 case QETH_CARD_TYPE_OSN: 2218 case QETH_CARD_TYPE_UNKNOWN: 2219 default: 2220 return 1; 2221 } 2222 } 2223 2224 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2225 unsigned long data) 2226 { 2227 2228 __u16 mtu, framesize; 2229 __u16 len; 2230 __u8 link_type; 2231 struct qeth_cmd_buffer *iob; 2232 2233 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2234 2235 iob = (struct qeth_cmd_buffer *) data; 2236 memcpy(&card->token.ulp_filter_r, 2237 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2238 QETH_MPC_TOKEN_LENGTH); 2239 if (card->info.type == QETH_CARD_TYPE_IQD) { 2240 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2241 mtu = qeth_get_mtu_outof_framesize(framesize); 2242 if (!mtu) { 2243 iob->rc = -EINVAL; 2244 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2245 return 0; 2246 } 2247 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2248 /* frame size has changed */ 2249 if (card->dev && 2250 ((card->dev->mtu == card->info.initial_mtu) || 2251 (card->dev->mtu > mtu))) 2252 card->dev->mtu = mtu; 2253 qeth_free_qdio_buffers(card); 2254 } 2255 card->info.initial_mtu = mtu; 2256 card->info.max_mtu = mtu; 2257 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2258 } else { 2259 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 2260 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2261 iob->data); 2262 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2263 } 2264 2265 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2266 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2267 memcpy(&link_type, 2268 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2269 card->info.link_type = link_type; 2270 } else 2271 card->info.link_type = 0; 2272 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2273 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2274 return 0; 2275 } 2276 2277 static int qeth_ulp_enable(struct qeth_card *card) 2278 { 2279 int rc; 2280 char prot_type; 2281 struct qeth_cmd_buffer *iob; 2282 2283 /*FIXME: trace view callbacks*/ 2284 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2285 2286 iob = qeth_wait_for_buffer(&card->write); 2287 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2288 2289 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2290 (__u8) card->info.portno; 2291 if (card->options.layer2) 2292 if (card->info.type == QETH_CARD_TYPE_OSN) 2293 prot_type = QETH_PROT_OSN2; 2294 else 2295 prot_type = QETH_PROT_LAYER2; 2296 else 2297 prot_type = QETH_PROT_TCPIP; 2298 2299 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2300 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2301 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2302 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2303 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2304 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2305 card->info.portname, 9); 2306 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2307 qeth_ulp_enable_cb, NULL); 2308 return rc; 2309 2310 } 2311 2312 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2313 unsigned long data) 2314 { 2315 struct qeth_cmd_buffer *iob; 2316 2317 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2318 2319 iob = (struct qeth_cmd_buffer *) data; 2320 memcpy(&card->token.ulp_connection_r, 2321 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2322 QETH_MPC_TOKEN_LENGTH); 2323 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2324 3)) { 2325 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2326 dev_err(&card->gdev->dev, "A connection could not be " 2327 "established because of an OLM limit\n"); 2328 iob->rc = -EMLINK; 2329 } 2330 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2331 return 0; 2332 } 2333 2334 static int qeth_ulp_setup(struct qeth_card *card) 2335 { 2336 int rc; 2337 __u16 temp; 2338 struct qeth_cmd_buffer *iob; 2339 struct ccw_dev_id dev_id; 2340 2341 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2342 2343 iob = qeth_wait_for_buffer(&card->write); 2344 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2345 2346 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2347 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2348 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2349 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2350 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2351 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2352 2353 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2354 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2355 temp = (card->info.cula << 8) + card->info.unit_addr2; 2356 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2357 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2358 qeth_ulp_setup_cb, NULL); 2359 return rc; 2360 } 2361 2362 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2363 { 2364 int rc; 2365 struct qeth_qdio_out_buffer *newbuf; 2366 2367 rc = 0; 2368 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2369 if (!newbuf) { 2370 rc = -ENOMEM; 2371 goto out; 2372 } 2373 newbuf->buffer = &q->qdio_bufs[bidx]; 2374 skb_queue_head_init(&newbuf->skb_list); 2375 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2376 newbuf->q = q; 2377 newbuf->aob = NULL; 2378 newbuf->next_pending = q->bufs[bidx]; 2379 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2380 q->bufs[bidx] = newbuf; 2381 if (q->bufstates) { 2382 q->bufstates[bidx].user = newbuf; 2383 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2384 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2385 QETH_CARD_TEXT_(q->card, 2, "%lx", 2386 (long) newbuf->next_pending); 2387 } 2388 out: 2389 return rc; 2390 } 2391 2392 2393 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2394 { 2395 int i, j; 2396 2397 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2398 2399 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2400 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2401 return 0; 2402 2403 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2404 GFP_KERNEL); 2405 if (!card->qdio.in_q) 2406 goto out_nomem; 2407 QETH_DBF_TEXT(SETUP, 2, "inq"); 2408 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2409 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2410 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2411 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2412 card->qdio.in_q->bufs[i].buffer = 2413 &card->qdio.in_q->qdio_bufs[i]; 2414 card->qdio.in_q->bufs[i].rx_skb = NULL; 2415 } 2416 /* inbound buffer pool */ 2417 if (qeth_alloc_buffer_pool(card)) 2418 goto out_freeinq; 2419 2420 /* outbound */ 2421 card->qdio.out_qs = 2422 kzalloc(card->qdio.no_out_queues * 2423 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2424 if (!card->qdio.out_qs) 2425 goto out_freepool; 2426 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2427 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2428 GFP_KERNEL); 2429 if (!card->qdio.out_qs[i]) 2430 goto out_freeoutq; 2431 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2432 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2433 card->qdio.out_qs[i]->queue_no = i; 2434 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2435 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2436 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2437 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2438 goto out_freeoutqbufs; 2439 } 2440 } 2441 2442 /* completion */ 2443 if (qeth_alloc_cq(card)) 2444 goto out_freeoutq; 2445 2446 return 0; 2447 2448 out_freeoutqbufs: 2449 while (j > 0) { 2450 --j; 2451 kmem_cache_free(qeth_qdio_outbuf_cache, 2452 card->qdio.out_qs[i]->bufs[j]); 2453 card->qdio.out_qs[i]->bufs[j] = NULL; 2454 } 2455 out_freeoutq: 2456 while (i > 0) { 2457 kfree(card->qdio.out_qs[--i]); 2458 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2459 } 2460 kfree(card->qdio.out_qs); 2461 card->qdio.out_qs = NULL; 2462 out_freepool: 2463 qeth_free_buffer_pool(card); 2464 out_freeinq: 2465 kfree(card->qdio.in_q); 2466 card->qdio.in_q = NULL; 2467 out_nomem: 2468 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2469 return -ENOMEM; 2470 } 2471 2472 static void qeth_create_qib_param_field(struct qeth_card *card, 2473 char *param_field) 2474 { 2475 2476 param_field[0] = _ascebc['P']; 2477 param_field[1] = _ascebc['C']; 2478 param_field[2] = _ascebc['I']; 2479 param_field[3] = _ascebc['T']; 2480 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2481 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2482 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2483 } 2484 2485 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2486 char *param_field) 2487 { 2488 param_field[16] = _ascebc['B']; 2489 param_field[17] = _ascebc['L']; 2490 param_field[18] = _ascebc['K']; 2491 param_field[19] = _ascebc['T']; 2492 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2493 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2494 *((unsigned int *) (¶m_field[28])) = 2495 card->info.blkt.inter_packet_jumbo; 2496 } 2497 2498 static int qeth_qdio_activate(struct qeth_card *card) 2499 { 2500 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2501 return qdio_activate(CARD_DDEV(card)); 2502 } 2503 2504 static int qeth_dm_act(struct qeth_card *card) 2505 { 2506 int rc; 2507 struct qeth_cmd_buffer *iob; 2508 2509 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2510 2511 iob = qeth_wait_for_buffer(&card->write); 2512 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2513 2514 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2515 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2516 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2517 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2518 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2519 return rc; 2520 } 2521 2522 static int qeth_mpc_initialize(struct qeth_card *card) 2523 { 2524 int rc; 2525 2526 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2527 2528 rc = qeth_issue_next_read(card); 2529 if (rc) { 2530 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2531 return rc; 2532 } 2533 rc = qeth_cm_enable(card); 2534 if (rc) { 2535 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2536 goto out_qdio; 2537 } 2538 rc = qeth_cm_setup(card); 2539 if (rc) { 2540 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2541 goto out_qdio; 2542 } 2543 rc = qeth_ulp_enable(card); 2544 if (rc) { 2545 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2546 goto out_qdio; 2547 } 2548 rc = qeth_ulp_setup(card); 2549 if (rc) { 2550 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2551 goto out_qdio; 2552 } 2553 rc = qeth_alloc_qdio_buffers(card); 2554 if (rc) { 2555 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2556 goto out_qdio; 2557 } 2558 rc = qeth_qdio_establish(card); 2559 if (rc) { 2560 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2561 qeth_free_qdio_buffers(card); 2562 goto out_qdio; 2563 } 2564 rc = qeth_qdio_activate(card); 2565 if (rc) { 2566 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2567 goto out_qdio; 2568 } 2569 rc = qeth_dm_act(card); 2570 if (rc) { 2571 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2572 goto out_qdio; 2573 } 2574 2575 return 0; 2576 out_qdio: 2577 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2578 return rc; 2579 } 2580 2581 static void qeth_print_status_with_portname(struct qeth_card *card) 2582 { 2583 char dbf_text[15]; 2584 int i; 2585 2586 sprintf(dbf_text, "%s", card->info.portname + 1); 2587 for (i = 0; i < 8; i++) 2588 dbf_text[i] = 2589 (char) _ebcasc[(__u8) dbf_text[i]]; 2590 dbf_text[8] = 0; 2591 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2592 "with link type %s (portname: %s)\n", 2593 qeth_get_cardname(card), 2594 (card->info.mcl_level[0]) ? " (level: " : "", 2595 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2596 (card->info.mcl_level[0]) ? ")" : "", 2597 qeth_get_cardname_short(card), 2598 dbf_text); 2599 2600 } 2601 2602 static void qeth_print_status_no_portname(struct qeth_card *card) 2603 { 2604 if (card->info.portname[0]) 2605 dev_info(&card->gdev->dev, "Device is a%s " 2606 "card%s%s%s\nwith link type %s " 2607 "(no portname needed by interface).\n", 2608 qeth_get_cardname(card), 2609 (card->info.mcl_level[0]) ? " (level: " : "", 2610 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2611 (card->info.mcl_level[0]) ? ")" : "", 2612 qeth_get_cardname_short(card)); 2613 else 2614 dev_info(&card->gdev->dev, "Device is a%s " 2615 "card%s%s%s\nwith link type %s.\n", 2616 qeth_get_cardname(card), 2617 (card->info.mcl_level[0]) ? " (level: " : "", 2618 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2619 (card->info.mcl_level[0]) ? ")" : "", 2620 qeth_get_cardname_short(card)); 2621 } 2622 2623 void qeth_print_status_message(struct qeth_card *card) 2624 { 2625 switch (card->info.type) { 2626 case QETH_CARD_TYPE_OSD: 2627 case QETH_CARD_TYPE_OSM: 2628 case QETH_CARD_TYPE_OSX: 2629 /* VM will use a non-zero first character 2630 * to indicate a HiperSockets like reporting 2631 * of the level OSA sets the first character to zero 2632 * */ 2633 if (!card->info.mcl_level[0]) { 2634 sprintf(card->info.mcl_level, "%02x%02x", 2635 card->info.mcl_level[2], 2636 card->info.mcl_level[3]); 2637 2638 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2639 break; 2640 } 2641 /* fallthrough */ 2642 case QETH_CARD_TYPE_IQD: 2643 if ((card->info.guestlan) || 2644 (card->info.mcl_level[0] & 0x80)) { 2645 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2646 card->info.mcl_level[0]]; 2647 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2648 card->info.mcl_level[1]]; 2649 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2650 card->info.mcl_level[2]]; 2651 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2652 card->info.mcl_level[3]]; 2653 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2654 } 2655 break; 2656 default: 2657 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2658 } 2659 if (card->info.portname_required) 2660 qeth_print_status_with_portname(card); 2661 else 2662 qeth_print_status_no_portname(card); 2663 } 2664 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2665 2666 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2667 { 2668 struct qeth_buffer_pool_entry *entry; 2669 2670 QETH_CARD_TEXT(card, 5, "inwrklst"); 2671 2672 list_for_each_entry(entry, 2673 &card->qdio.init_pool.entry_list, init_list) { 2674 qeth_put_buffer_pool_entry(card, entry); 2675 } 2676 } 2677 2678 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2679 struct qeth_card *card) 2680 { 2681 struct list_head *plh; 2682 struct qeth_buffer_pool_entry *entry; 2683 int i, free; 2684 struct page *page; 2685 2686 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2687 return NULL; 2688 2689 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2690 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2691 free = 1; 2692 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2693 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2694 free = 0; 2695 break; 2696 } 2697 } 2698 if (free) { 2699 list_del_init(&entry->list); 2700 return entry; 2701 } 2702 } 2703 2704 /* no free buffer in pool so take first one and swap pages */ 2705 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2706 struct qeth_buffer_pool_entry, list); 2707 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2708 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2709 page = alloc_page(GFP_ATOMIC); 2710 if (!page) { 2711 return NULL; 2712 } else { 2713 free_page((unsigned long)entry->elements[i]); 2714 entry->elements[i] = page_address(page); 2715 if (card->options.performance_stats) 2716 card->perf_stats.sg_alloc_page_rx++; 2717 } 2718 } 2719 } 2720 list_del_init(&entry->list); 2721 return entry; 2722 } 2723 2724 static int qeth_init_input_buffer(struct qeth_card *card, 2725 struct qeth_qdio_buffer *buf) 2726 { 2727 struct qeth_buffer_pool_entry *pool_entry; 2728 int i; 2729 2730 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2731 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2732 if (!buf->rx_skb) 2733 return 1; 2734 } 2735 2736 pool_entry = qeth_find_free_buffer_pool_entry(card); 2737 if (!pool_entry) 2738 return 1; 2739 2740 /* 2741 * since the buffer is accessed only from the input_tasklet 2742 * there shouldn't be a need to synchronize; also, since we use 2743 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2744 * buffers 2745 */ 2746 2747 buf->pool_entry = pool_entry; 2748 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2749 buf->buffer->element[i].length = PAGE_SIZE; 2750 buf->buffer->element[i].addr = pool_entry->elements[i]; 2751 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2752 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2753 else 2754 buf->buffer->element[i].eflags = 0; 2755 buf->buffer->element[i].sflags = 0; 2756 } 2757 return 0; 2758 } 2759 2760 int qeth_init_qdio_queues(struct qeth_card *card) 2761 { 2762 int i, j; 2763 int rc; 2764 2765 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2766 2767 /* inbound queue */ 2768 memset(card->qdio.in_q->qdio_bufs, 0, 2769 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2770 qeth_initialize_working_pool_list(card); 2771 /*give only as many buffers to hardware as we have buffer pool entries*/ 2772 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2773 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2774 card->qdio.in_q->next_buf_to_init = 2775 card->qdio.in_buf_pool.buf_count - 1; 2776 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2777 card->qdio.in_buf_pool.buf_count - 1); 2778 if (rc) { 2779 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2780 return rc; 2781 } 2782 2783 /* completion */ 2784 rc = qeth_cq_init(card); 2785 if (rc) { 2786 return rc; 2787 } 2788 2789 /* outbound queue */ 2790 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2791 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2792 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2793 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2794 qeth_clear_output_buffer(card->qdio.out_qs[i], 2795 card->qdio.out_qs[i]->bufs[j], 2796 QETH_QDIO_BUF_EMPTY); 2797 } 2798 card->qdio.out_qs[i]->card = card; 2799 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2800 card->qdio.out_qs[i]->do_pack = 0; 2801 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2802 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2803 atomic_set(&card->qdio.out_qs[i]->state, 2804 QETH_OUT_Q_UNLOCKED); 2805 } 2806 return 0; 2807 } 2808 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2809 2810 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2811 { 2812 switch (link_type) { 2813 case QETH_LINK_TYPE_HSTR: 2814 return 2; 2815 default: 2816 return 1; 2817 } 2818 } 2819 2820 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2821 struct qeth_ipa_cmd *cmd, __u8 command, 2822 enum qeth_prot_versions prot) 2823 { 2824 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2825 cmd->hdr.command = command; 2826 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2827 cmd->hdr.seqno = card->seqno.ipa; 2828 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2829 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2830 if (card->options.layer2) 2831 cmd->hdr.prim_version_no = 2; 2832 else 2833 cmd->hdr.prim_version_no = 1; 2834 cmd->hdr.param_count = 1; 2835 cmd->hdr.prot_version = prot; 2836 cmd->hdr.ipa_supported = 0; 2837 cmd->hdr.ipa_enabled = 0; 2838 } 2839 2840 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2841 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2842 { 2843 struct qeth_cmd_buffer *iob; 2844 struct qeth_ipa_cmd *cmd; 2845 2846 iob = qeth_wait_for_buffer(&card->write); 2847 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2848 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2849 2850 return iob; 2851 } 2852 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2853 2854 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2855 char prot_type) 2856 { 2857 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2858 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2859 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2860 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2861 } 2862 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2863 2864 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2865 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2866 unsigned long), 2867 void *reply_param) 2868 { 2869 int rc; 2870 char prot_type; 2871 2872 QETH_CARD_TEXT(card, 4, "sendipa"); 2873 2874 if (card->options.layer2) 2875 if (card->info.type == QETH_CARD_TYPE_OSN) 2876 prot_type = QETH_PROT_OSN2; 2877 else 2878 prot_type = QETH_PROT_LAYER2; 2879 else 2880 prot_type = QETH_PROT_TCPIP; 2881 qeth_prepare_ipa_cmd(card, iob, prot_type); 2882 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2883 iob, reply_cb, reply_param); 2884 if (rc == -ETIME) { 2885 qeth_clear_ipacmd_list(card); 2886 qeth_schedule_recovery(card); 2887 } 2888 return rc; 2889 } 2890 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2891 2892 int qeth_send_startlan(struct qeth_card *card) 2893 { 2894 int rc; 2895 struct qeth_cmd_buffer *iob; 2896 2897 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2898 2899 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2900 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2901 return rc; 2902 } 2903 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2904 2905 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2906 struct qeth_reply *reply, unsigned long data) 2907 { 2908 struct qeth_ipa_cmd *cmd; 2909 2910 QETH_CARD_TEXT(card, 4, "defadpcb"); 2911 2912 cmd = (struct qeth_ipa_cmd *) data; 2913 if (cmd->hdr.return_code == 0) 2914 cmd->hdr.return_code = 2915 cmd->data.setadapterparms.hdr.return_code; 2916 return 0; 2917 } 2918 2919 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2920 struct qeth_reply *reply, unsigned long data) 2921 { 2922 struct qeth_ipa_cmd *cmd; 2923 2924 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2925 2926 cmd = (struct qeth_ipa_cmd *) data; 2927 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2928 card->info.link_type = 2929 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2930 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2931 } 2932 card->options.adp.supported_funcs = 2933 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2934 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2935 } 2936 2937 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2938 __u32 command, __u32 cmdlen) 2939 { 2940 struct qeth_cmd_buffer *iob; 2941 struct qeth_ipa_cmd *cmd; 2942 2943 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2944 QETH_PROT_IPV4); 2945 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2946 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2947 cmd->data.setadapterparms.hdr.command_code = command; 2948 cmd->data.setadapterparms.hdr.used_total = 1; 2949 cmd->data.setadapterparms.hdr.seq_no = 1; 2950 2951 return iob; 2952 } 2953 2954 int qeth_query_setadapterparms(struct qeth_card *card) 2955 { 2956 int rc; 2957 struct qeth_cmd_buffer *iob; 2958 2959 QETH_CARD_TEXT(card, 3, "queryadp"); 2960 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2961 sizeof(struct qeth_ipacmd_setadpparms)); 2962 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2963 return rc; 2964 } 2965 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2966 2967 static int qeth_query_ipassists_cb(struct qeth_card *card, 2968 struct qeth_reply *reply, unsigned long data) 2969 { 2970 struct qeth_ipa_cmd *cmd; 2971 2972 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2973 2974 cmd = (struct qeth_ipa_cmd *) data; 2975 2976 switch (cmd->hdr.return_code) { 2977 case IPA_RC_NOTSUPP: 2978 case IPA_RC_L2_UNSUPPORTED_CMD: 2979 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 2980 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 2981 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 2982 return -0; 2983 default: 2984 if (cmd->hdr.return_code) { 2985 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 2986 "rc=%d\n", 2987 dev_name(&card->gdev->dev), 2988 cmd->hdr.return_code); 2989 return 0; 2990 } 2991 } 2992 2993 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 2994 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 2995 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 2996 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 2997 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 2998 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 2999 } else 3000 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3001 "\n", dev_name(&card->gdev->dev)); 3002 return 0; 3003 } 3004 3005 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3006 { 3007 int rc; 3008 struct qeth_cmd_buffer *iob; 3009 3010 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3011 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3012 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3013 return rc; 3014 } 3015 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3016 3017 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3018 struct qeth_reply *reply, unsigned long data) 3019 { 3020 struct qeth_ipa_cmd *cmd; 3021 __u16 rc; 3022 3023 cmd = (struct qeth_ipa_cmd *)data; 3024 rc = cmd->hdr.return_code; 3025 if (rc) 3026 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3027 else 3028 card->info.diagass_support = cmd->data.diagass.ext; 3029 return 0; 3030 } 3031 3032 static int qeth_query_setdiagass(struct qeth_card *card) 3033 { 3034 struct qeth_cmd_buffer *iob; 3035 struct qeth_ipa_cmd *cmd; 3036 3037 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3038 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3039 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3040 cmd->data.diagass.subcmd_len = 16; 3041 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3042 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3043 } 3044 3045 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3046 { 3047 unsigned long info = get_zeroed_page(GFP_KERNEL); 3048 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3049 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3050 struct ccw_dev_id ccwid; 3051 int level; 3052 3053 tid->chpid = card->info.chpid; 3054 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3055 tid->ssid = ccwid.ssid; 3056 tid->devno = ccwid.devno; 3057 if (!info) 3058 return; 3059 level = stsi(NULL, 0, 0, 0); 3060 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3061 tid->lparnr = info222->lpar_number; 3062 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3063 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3064 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3065 } 3066 free_page(info); 3067 return; 3068 } 3069 3070 static int qeth_hw_trap_cb(struct qeth_card *card, 3071 struct qeth_reply *reply, unsigned long data) 3072 { 3073 struct qeth_ipa_cmd *cmd; 3074 __u16 rc; 3075 3076 cmd = (struct qeth_ipa_cmd *)data; 3077 rc = cmd->hdr.return_code; 3078 if (rc) 3079 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3080 return 0; 3081 } 3082 3083 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3084 { 3085 struct qeth_cmd_buffer *iob; 3086 struct qeth_ipa_cmd *cmd; 3087 3088 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3089 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3090 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3091 cmd->data.diagass.subcmd_len = 80; 3092 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3093 cmd->data.diagass.type = 1; 3094 cmd->data.diagass.action = action; 3095 switch (action) { 3096 case QETH_DIAGS_TRAP_ARM: 3097 cmd->data.diagass.options = 0x0003; 3098 cmd->data.diagass.ext = 0x00010000 + 3099 sizeof(struct qeth_trap_id); 3100 qeth_get_trap_id(card, 3101 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3102 break; 3103 case QETH_DIAGS_TRAP_DISARM: 3104 cmd->data.diagass.options = 0x0001; 3105 break; 3106 case QETH_DIAGS_TRAP_CAPTURE: 3107 break; 3108 } 3109 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3110 } 3111 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3112 3113 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3114 unsigned int qdio_error, const char *dbftext) 3115 { 3116 if (qdio_error) { 3117 QETH_CARD_TEXT(card, 2, dbftext); 3118 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3119 buf->element[15].sflags); 3120 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3121 buf->element[14].sflags); 3122 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3123 if ((buf->element[15].sflags) == 0x12) { 3124 card->stats.rx_dropped++; 3125 return 0; 3126 } else 3127 return 1; 3128 } 3129 return 0; 3130 } 3131 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3132 3133 void qeth_buffer_reclaim_work(struct work_struct *work) 3134 { 3135 struct qeth_card *card = container_of(work, struct qeth_card, 3136 buffer_reclaim_work.work); 3137 3138 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3139 qeth_queue_input_buffer(card, card->reclaim_index); 3140 } 3141 3142 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3143 { 3144 struct qeth_qdio_q *queue = card->qdio.in_q; 3145 struct list_head *lh; 3146 int count; 3147 int i; 3148 int rc; 3149 int newcount = 0; 3150 3151 count = (index < queue->next_buf_to_init)? 3152 card->qdio.in_buf_pool.buf_count - 3153 (queue->next_buf_to_init - index) : 3154 card->qdio.in_buf_pool.buf_count - 3155 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3156 /* only requeue at a certain threshold to avoid SIGAs */ 3157 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3158 for (i = queue->next_buf_to_init; 3159 i < queue->next_buf_to_init + count; ++i) { 3160 if (qeth_init_input_buffer(card, 3161 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3162 break; 3163 } else { 3164 newcount++; 3165 } 3166 } 3167 3168 if (newcount < count) { 3169 /* we are in memory shortage so we switch back to 3170 traditional skb allocation and drop packages */ 3171 atomic_set(&card->force_alloc_skb, 3); 3172 count = newcount; 3173 } else { 3174 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3175 } 3176 3177 if (!count) { 3178 i = 0; 3179 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3180 i++; 3181 if (i == card->qdio.in_buf_pool.buf_count) { 3182 QETH_CARD_TEXT(card, 2, "qsarbw"); 3183 card->reclaim_index = index; 3184 schedule_delayed_work( 3185 &card->buffer_reclaim_work, 3186 QETH_RECLAIM_WORK_TIME); 3187 } 3188 return; 3189 } 3190 3191 /* 3192 * according to old code it should be avoided to requeue all 3193 * 128 buffers in order to benefit from PCI avoidance. 3194 * this function keeps at least one buffer (the buffer at 3195 * 'index') un-requeued -> this buffer is the first buffer that 3196 * will be requeued the next time 3197 */ 3198 if (card->options.performance_stats) { 3199 card->perf_stats.inbound_do_qdio_cnt++; 3200 card->perf_stats.inbound_do_qdio_start_time = 3201 qeth_get_micros(); 3202 } 3203 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3204 queue->next_buf_to_init, count); 3205 if (card->options.performance_stats) 3206 card->perf_stats.inbound_do_qdio_time += 3207 qeth_get_micros() - 3208 card->perf_stats.inbound_do_qdio_start_time; 3209 if (rc) { 3210 QETH_CARD_TEXT(card, 2, "qinberr"); 3211 } 3212 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3213 QDIO_MAX_BUFFERS_PER_Q; 3214 } 3215 } 3216 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3217 3218 static int qeth_handle_send_error(struct qeth_card *card, 3219 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3220 { 3221 int sbalf15 = buffer->buffer->element[15].sflags; 3222 3223 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3224 if (card->info.type == QETH_CARD_TYPE_IQD) { 3225 if (sbalf15 == 0) { 3226 qdio_err = 0; 3227 } else { 3228 qdio_err = 1; 3229 } 3230 } 3231 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3232 3233 if (!qdio_err) 3234 return QETH_SEND_ERROR_NONE; 3235 3236 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3237 return QETH_SEND_ERROR_RETRY; 3238 3239 QETH_CARD_TEXT(card, 1, "lnkfail"); 3240 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3241 (u16)qdio_err, (u8)sbalf15); 3242 return QETH_SEND_ERROR_LINK_FAILURE; 3243 } 3244 3245 /* 3246 * Switched to packing state if the number of used buffers on a queue 3247 * reaches a certain limit. 3248 */ 3249 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3250 { 3251 if (!queue->do_pack) { 3252 if (atomic_read(&queue->used_buffers) 3253 >= QETH_HIGH_WATERMARK_PACK){ 3254 /* switch non-PACKING -> PACKING */ 3255 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3256 if (queue->card->options.performance_stats) 3257 queue->card->perf_stats.sc_dp_p++; 3258 queue->do_pack = 1; 3259 } 3260 } 3261 } 3262 3263 /* 3264 * Switches from packing to non-packing mode. If there is a packing 3265 * buffer on the queue this buffer will be prepared to be flushed. 3266 * In that case 1 is returned to inform the caller. If no buffer 3267 * has to be flushed, zero is returned. 3268 */ 3269 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3270 { 3271 struct qeth_qdio_out_buffer *buffer; 3272 int flush_count = 0; 3273 3274 if (queue->do_pack) { 3275 if (atomic_read(&queue->used_buffers) 3276 <= QETH_LOW_WATERMARK_PACK) { 3277 /* switch PACKING -> non-PACKING */ 3278 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3279 if (queue->card->options.performance_stats) 3280 queue->card->perf_stats.sc_p_dp++; 3281 queue->do_pack = 0; 3282 /* flush packing buffers */ 3283 buffer = queue->bufs[queue->next_buf_to_fill]; 3284 if ((atomic_read(&buffer->state) == 3285 QETH_QDIO_BUF_EMPTY) && 3286 (buffer->next_element_to_fill > 0)) { 3287 atomic_set(&buffer->state, 3288 QETH_QDIO_BUF_PRIMED); 3289 flush_count++; 3290 queue->next_buf_to_fill = 3291 (queue->next_buf_to_fill + 1) % 3292 QDIO_MAX_BUFFERS_PER_Q; 3293 } 3294 } 3295 } 3296 return flush_count; 3297 } 3298 3299 3300 /* 3301 * Called to flush a packing buffer if no more pci flags are on the queue. 3302 * Checks if there is a packing buffer and prepares it to be flushed. 3303 * In that case returns 1, otherwise zero. 3304 */ 3305 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3306 { 3307 struct qeth_qdio_out_buffer *buffer; 3308 3309 buffer = queue->bufs[queue->next_buf_to_fill]; 3310 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3311 (buffer->next_element_to_fill > 0)) { 3312 /* it's a packing buffer */ 3313 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3314 queue->next_buf_to_fill = 3315 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3316 return 1; 3317 } 3318 return 0; 3319 } 3320 3321 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3322 int count) 3323 { 3324 struct qeth_qdio_out_buffer *buf; 3325 int rc; 3326 int i; 3327 unsigned int qdio_flags; 3328 3329 for (i = index; i < index + count; ++i) { 3330 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3331 buf = queue->bufs[bidx]; 3332 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3333 SBAL_EFLAGS_LAST_ENTRY; 3334 3335 if (queue->bufstates) 3336 queue->bufstates[bidx].user = buf; 3337 3338 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3339 continue; 3340 3341 if (!queue->do_pack) { 3342 if ((atomic_read(&queue->used_buffers) >= 3343 (QETH_HIGH_WATERMARK_PACK - 3344 QETH_WATERMARK_PACK_FUZZ)) && 3345 !atomic_read(&queue->set_pci_flags_count)) { 3346 /* it's likely that we'll go to packing 3347 * mode soon */ 3348 atomic_inc(&queue->set_pci_flags_count); 3349 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3350 } 3351 } else { 3352 if (!atomic_read(&queue->set_pci_flags_count)) { 3353 /* 3354 * there's no outstanding PCI any more, so we 3355 * have to request a PCI to be sure the the PCI 3356 * will wake at some time in the future then we 3357 * can flush packed buffers that might still be 3358 * hanging around, which can happen if no 3359 * further send was requested by the stack 3360 */ 3361 atomic_inc(&queue->set_pci_flags_count); 3362 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3363 } 3364 } 3365 } 3366 3367 queue->card->dev->trans_start = jiffies; 3368 if (queue->card->options.performance_stats) { 3369 queue->card->perf_stats.outbound_do_qdio_cnt++; 3370 queue->card->perf_stats.outbound_do_qdio_start_time = 3371 qeth_get_micros(); 3372 } 3373 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3374 if (atomic_read(&queue->set_pci_flags_count)) 3375 qdio_flags |= QDIO_FLAG_PCI_OUT; 3376 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3377 queue->queue_no, index, count); 3378 if (queue->card->options.performance_stats) 3379 queue->card->perf_stats.outbound_do_qdio_time += 3380 qeth_get_micros() - 3381 queue->card->perf_stats.outbound_do_qdio_start_time; 3382 atomic_add(count, &queue->used_buffers); 3383 if (rc) { 3384 queue->card->stats.tx_errors += count; 3385 /* ignore temporary SIGA errors without busy condition */ 3386 if (rc == -ENOBUFS) 3387 return; 3388 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3389 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3390 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3391 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3392 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3393 3394 /* this must not happen under normal circumstances. if it 3395 * happens something is really wrong -> recover */ 3396 qeth_schedule_recovery(queue->card); 3397 return; 3398 } 3399 if (queue->card->options.performance_stats) 3400 queue->card->perf_stats.bufs_sent += count; 3401 } 3402 3403 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3404 { 3405 int index; 3406 int flush_cnt = 0; 3407 int q_was_packing = 0; 3408 3409 /* 3410 * check if weed have to switch to non-packing mode or if 3411 * we have to get a pci flag out on the queue 3412 */ 3413 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3414 !atomic_read(&queue->set_pci_flags_count)) { 3415 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3416 QETH_OUT_Q_UNLOCKED) { 3417 /* 3418 * If we get in here, there was no action in 3419 * do_send_packet. So, we check if there is a 3420 * packing buffer to be flushed here. 3421 */ 3422 netif_stop_queue(queue->card->dev); 3423 index = queue->next_buf_to_fill; 3424 q_was_packing = queue->do_pack; 3425 /* queue->do_pack may change */ 3426 barrier(); 3427 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3428 if (!flush_cnt && 3429 !atomic_read(&queue->set_pci_flags_count)) 3430 flush_cnt += 3431 qeth_flush_buffers_on_no_pci(queue); 3432 if (queue->card->options.performance_stats && 3433 q_was_packing) 3434 queue->card->perf_stats.bufs_sent_pack += 3435 flush_cnt; 3436 if (flush_cnt) 3437 qeth_flush_buffers(queue, index, flush_cnt); 3438 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3439 } 3440 } 3441 } 3442 3443 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3444 unsigned long card_ptr) 3445 { 3446 struct qeth_card *card = (struct qeth_card *)card_ptr; 3447 3448 if (card->dev && (card->dev->flags & IFF_UP)) 3449 napi_schedule(&card->napi); 3450 } 3451 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3452 3453 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3454 { 3455 int rc; 3456 3457 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3458 rc = -1; 3459 goto out; 3460 } else { 3461 if (card->options.cq == cq) { 3462 rc = 0; 3463 goto out; 3464 } 3465 3466 if (card->state != CARD_STATE_DOWN && 3467 card->state != CARD_STATE_RECOVER) { 3468 rc = -1; 3469 goto out; 3470 } 3471 3472 qeth_free_qdio_buffers(card); 3473 card->options.cq = cq; 3474 rc = 0; 3475 } 3476 out: 3477 return rc; 3478 3479 } 3480 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3481 3482 3483 static void qeth_qdio_cq_handler(struct qeth_card *card, 3484 unsigned int qdio_err, 3485 unsigned int queue, int first_element, int count) { 3486 struct qeth_qdio_q *cq = card->qdio.c_q; 3487 int i; 3488 int rc; 3489 3490 if (!qeth_is_cq(card, queue)) 3491 goto out; 3492 3493 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3494 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3495 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3496 3497 if (qdio_err) { 3498 netif_stop_queue(card->dev); 3499 qeth_schedule_recovery(card); 3500 goto out; 3501 } 3502 3503 if (card->options.performance_stats) { 3504 card->perf_stats.cq_cnt++; 3505 card->perf_stats.cq_start_time = qeth_get_micros(); 3506 } 3507 3508 for (i = first_element; i < first_element + count; ++i) { 3509 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3510 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3511 int e; 3512 3513 e = 0; 3514 while (buffer->element[e].addr) { 3515 unsigned long phys_aob_addr; 3516 3517 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3518 qeth_qdio_handle_aob(card, phys_aob_addr); 3519 buffer->element[e].addr = NULL; 3520 buffer->element[e].eflags = 0; 3521 buffer->element[e].sflags = 0; 3522 buffer->element[e].length = 0; 3523 3524 ++e; 3525 } 3526 3527 buffer->element[15].eflags = 0; 3528 buffer->element[15].sflags = 0; 3529 } 3530 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3531 card->qdio.c_q->next_buf_to_init, 3532 count); 3533 if (rc) { 3534 dev_warn(&card->gdev->dev, 3535 "QDIO reported an error, rc=%i\n", rc); 3536 QETH_CARD_TEXT(card, 2, "qcqherr"); 3537 } 3538 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3539 + count) % QDIO_MAX_BUFFERS_PER_Q; 3540 3541 netif_wake_queue(card->dev); 3542 3543 if (card->options.performance_stats) { 3544 int delta_t = qeth_get_micros(); 3545 delta_t -= card->perf_stats.cq_start_time; 3546 card->perf_stats.cq_time += delta_t; 3547 } 3548 out: 3549 return; 3550 } 3551 3552 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3553 unsigned int queue, int first_elem, int count, 3554 unsigned long card_ptr) 3555 { 3556 struct qeth_card *card = (struct qeth_card *)card_ptr; 3557 3558 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3559 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3560 3561 if (qeth_is_cq(card, queue)) 3562 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3563 else if (qdio_err) 3564 qeth_schedule_recovery(card); 3565 3566 3567 } 3568 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3569 3570 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3571 unsigned int qdio_error, int __queue, int first_element, 3572 int count, unsigned long card_ptr) 3573 { 3574 struct qeth_card *card = (struct qeth_card *) card_ptr; 3575 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3576 struct qeth_qdio_out_buffer *buffer; 3577 int i; 3578 3579 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3580 if (qdio_error & QDIO_ERROR_FATAL) { 3581 QETH_CARD_TEXT(card, 2, "achkcond"); 3582 netif_stop_queue(card->dev); 3583 qeth_schedule_recovery(card); 3584 return; 3585 } 3586 if (card->options.performance_stats) { 3587 card->perf_stats.outbound_handler_cnt++; 3588 card->perf_stats.outbound_handler_start_time = 3589 qeth_get_micros(); 3590 } 3591 for (i = first_element; i < (first_element + count); ++i) { 3592 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3593 buffer = queue->bufs[bidx]; 3594 qeth_handle_send_error(card, buffer, qdio_error); 3595 3596 if (queue->bufstates && 3597 (queue->bufstates[bidx].flags & 3598 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3599 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3600 3601 if (atomic_cmpxchg(&buffer->state, 3602 QETH_QDIO_BUF_PRIMED, 3603 QETH_QDIO_BUF_PENDING) == 3604 QETH_QDIO_BUF_PRIMED) { 3605 qeth_notify_skbs(queue, buffer, 3606 TX_NOTIFY_PENDING); 3607 } 3608 buffer->aob = queue->bufstates[bidx].aob; 3609 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3610 QETH_CARD_TEXT(queue->card, 5, "aob"); 3611 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3612 virt_to_phys(buffer->aob)); 3613 if (qeth_init_qdio_out_buf(queue, bidx)) { 3614 QETH_CARD_TEXT(card, 2, "outofbuf"); 3615 qeth_schedule_recovery(card); 3616 } 3617 } else { 3618 if (card->options.cq == QETH_CQ_ENABLED) { 3619 enum iucv_tx_notify n; 3620 3621 n = qeth_compute_cq_notification( 3622 buffer->buffer->element[15].sflags, 0); 3623 qeth_notify_skbs(queue, buffer, n); 3624 } 3625 3626 qeth_clear_output_buffer(queue, buffer, 3627 QETH_QDIO_BUF_EMPTY); 3628 } 3629 qeth_cleanup_handled_pending(queue, bidx, 0); 3630 } 3631 atomic_sub(count, &queue->used_buffers); 3632 /* check if we need to do something on this outbound queue */ 3633 if (card->info.type != QETH_CARD_TYPE_IQD) 3634 qeth_check_outbound_queue(queue); 3635 3636 netif_wake_queue(queue->card->dev); 3637 if (card->options.performance_stats) 3638 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3639 card->perf_stats.outbound_handler_start_time; 3640 } 3641 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3642 3643 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3644 int ipv, int cast_type) 3645 { 3646 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3647 card->info.type == QETH_CARD_TYPE_OSX)) 3648 return card->qdio.default_out_queue; 3649 switch (card->qdio.no_out_queues) { 3650 case 4: 3651 if (cast_type && card->info.is_multicast_different) 3652 return card->info.is_multicast_different & 3653 (card->qdio.no_out_queues - 1); 3654 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3655 const u8 tos = ip_hdr(skb)->tos; 3656 3657 if (card->qdio.do_prio_queueing == 3658 QETH_PRIO_Q_ING_TOS) { 3659 if (tos & IP_TOS_NOTIMPORTANT) 3660 return 3; 3661 if (tos & IP_TOS_HIGHRELIABILITY) 3662 return 2; 3663 if (tos & IP_TOS_HIGHTHROUGHPUT) 3664 return 1; 3665 if (tos & IP_TOS_LOWDELAY) 3666 return 0; 3667 } 3668 if (card->qdio.do_prio_queueing == 3669 QETH_PRIO_Q_ING_PREC) 3670 return 3 - (tos >> 6); 3671 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3672 /* TODO: IPv6!!! */ 3673 } 3674 return card->qdio.default_out_queue; 3675 case 1: /* fallthrough for single-out-queue 1920-device */ 3676 default: 3677 return card->qdio.default_out_queue; 3678 } 3679 } 3680 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3681 3682 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3683 struct sk_buff *skb, int elems) 3684 { 3685 int dlen = skb->len - skb->data_len; 3686 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3687 PFN_DOWN((unsigned long)skb->data); 3688 3689 elements_needed += skb_shinfo(skb)->nr_frags; 3690 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3691 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3692 "(Number=%d / Length=%d). Discarded.\n", 3693 (elements_needed+elems), skb->len); 3694 return 0; 3695 } 3696 return elements_needed; 3697 } 3698 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3699 3700 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3701 { 3702 int hroom, inpage, rest; 3703 3704 if (((unsigned long)skb->data & PAGE_MASK) != 3705 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3706 hroom = skb_headroom(skb); 3707 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3708 rest = len - inpage; 3709 if (rest > hroom) 3710 return 1; 3711 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3712 skb->data -= rest; 3713 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3714 } 3715 return 0; 3716 } 3717 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3718 3719 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3720 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3721 int offset) 3722 { 3723 int length = skb->len - skb->data_len; 3724 int length_here; 3725 int element; 3726 char *data; 3727 int first_lap, cnt; 3728 struct skb_frag_struct *frag; 3729 3730 element = *next_element_to_fill; 3731 data = skb->data; 3732 first_lap = (is_tso == 0 ? 1 : 0); 3733 3734 if (offset >= 0) { 3735 data = skb->data + offset; 3736 length -= offset; 3737 first_lap = 0; 3738 } 3739 3740 while (length > 0) { 3741 /* length_here is the remaining amount of data in this page */ 3742 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3743 if (length < length_here) 3744 length_here = length; 3745 3746 buffer->element[element].addr = data; 3747 buffer->element[element].length = length_here; 3748 length -= length_here; 3749 if (!length) { 3750 if (first_lap) 3751 if (skb_shinfo(skb)->nr_frags) 3752 buffer->element[element].eflags = 3753 SBAL_EFLAGS_FIRST_FRAG; 3754 else 3755 buffer->element[element].eflags = 0; 3756 else 3757 buffer->element[element].eflags = 3758 SBAL_EFLAGS_MIDDLE_FRAG; 3759 } else { 3760 if (first_lap) 3761 buffer->element[element].eflags = 3762 SBAL_EFLAGS_FIRST_FRAG; 3763 else 3764 buffer->element[element].eflags = 3765 SBAL_EFLAGS_MIDDLE_FRAG; 3766 } 3767 data += length_here; 3768 element++; 3769 first_lap = 0; 3770 } 3771 3772 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3773 frag = &skb_shinfo(skb)->frags[cnt]; 3774 buffer->element[element].addr = (char *) 3775 page_to_phys(skb_frag_page(frag)) 3776 + frag->page_offset; 3777 buffer->element[element].length = frag->size; 3778 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; 3779 element++; 3780 } 3781 3782 if (buffer->element[element - 1].eflags) 3783 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3784 *next_element_to_fill = element; 3785 } 3786 3787 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3788 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3789 struct qeth_hdr *hdr, int offset, int hd_len) 3790 { 3791 struct qdio_buffer *buffer; 3792 int flush_cnt = 0, hdr_len, large_send = 0; 3793 3794 buffer = buf->buffer; 3795 atomic_inc(&skb->users); 3796 skb_queue_tail(&buf->skb_list, skb); 3797 3798 /*check first on TSO ....*/ 3799 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3800 int element = buf->next_element_to_fill; 3801 3802 hdr_len = sizeof(struct qeth_hdr_tso) + 3803 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3804 /*fill first buffer entry only with header information */ 3805 buffer->element[element].addr = skb->data; 3806 buffer->element[element].length = hdr_len; 3807 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3808 buf->next_element_to_fill++; 3809 skb->data += hdr_len; 3810 skb->len -= hdr_len; 3811 large_send = 1; 3812 } 3813 3814 if (offset >= 0) { 3815 int element = buf->next_element_to_fill; 3816 buffer->element[element].addr = hdr; 3817 buffer->element[element].length = sizeof(struct qeth_hdr) + 3818 hd_len; 3819 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3820 buf->is_header[element] = 1; 3821 buf->next_element_to_fill++; 3822 } 3823 3824 __qeth_fill_buffer(skb, buffer, large_send, 3825 (int *)&buf->next_element_to_fill, offset); 3826 3827 if (!queue->do_pack) { 3828 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3829 /* set state to PRIMED -> will be flushed */ 3830 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3831 flush_cnt = 1; 3832 } else { 3833 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3834 if (queue->card->options.performance_stats) 3835 queue->card->perf_stats.skbs_sent_pack++; 3836 if (buf->next_element_to_fill >= 3837 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3838 /* 3839 * packed buffer if full -> set state PRIMED 3840 * -> will be flushed 3841 */ 3842 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3843 flush_cnt = 1; 3844 } 3845 } 3846 return flush_cnt; 3847 } 3848 3849 int qeth_do_send_packet_fast(struct qeth_card *card, 3850 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3851 struct qeth_hdr *hdr, int elements_needed, 3852 int offset, int hd_len) 3853 { 3854 struct qeth_qdio_out_buffer *buffer; 3855 int index; 3856 3857 /* spin until we get the queue ... */ 3858 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3859 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3860 /* ... now we've got the queue */ 3861 index = queue->next_buf_to_fill; 3862 buffer = queue->bufs[queue->next_buf_to_fill]; 3863 /* 3864 * check if buffer is empty to make sure that we do not 'overtake' 3865 * ourselves and try to fill a buffer that is already primed 3866 */ 3867 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3868 goto out; 3869 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3870 QDIO_MAX_BUFFERS_PER_Q; 3871 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3872 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3873 qeth_flush_buffers(queue, index, 1); 3874 return 0; 3875 out: 3876 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3877 return -EBUSY; 3878 } 3879 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3880 3881 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3882 struct sk_buff *skb, struct qeth_hdr *hdr, 3883 int elements_needed) 3884 { 3885 struct qeth_qdio_out_buffer *buffer; 3886 int start_index; 3887 int flush_count = 0; 3888 int do_pack = 0; 3889 int tmp; 3890 int rc = 0; 3891 3892 /* spin until we get the queue ... */ 3893 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3894 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3895 start_index = queue->next_buf_to_fill; 3896 buffer = queue->bufs[queue->next_buf_to_fill]; 3897 /* 3898 * check if buffer is empty to make sure that we do not 'overtake' 3899 * ourselves and try to fill a buffer that is already primed 3900 */ 3901 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3902 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3903 return -EBUSY; 3904 } 3905 /* check if we need to switch packing state of this queue */ 3906 qeth_switch_to_packing_if_needed(queue); 3907 if (queue->do_pack) { 3908 do_pack = 1; 3909 /* does packet fit in current buffer? */ 3910 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3911 buffer->next_element_to_fill) < elements_needed) { 3912 /* ... no -> set state PRIMED */ 3913 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3914 flush_count++; 3915 queue->next_buf_to_fill = 3916 (queue->next_buf_to_fill + 1) % 3917 QDIO_MAX_BUFFERS_PER_Q; 3918 buffer = queue->bufs[queue->next_buf_to_fill]; 3919 /* we did a step forward, so check buffer state 3920 * again */ 3921 if (atomic_read(&buffer->state) != 3922 QETH_QDIO_BUF_EMPTY) { 3923 qeth_flush_buffers(queue, start_index, 3924 flush_count); 3925 atomic_set(&queue->state, 3926 QETH_OUT_Q_UNLOCKED); 3927 return -EBUSY; 3928 } 3929 } 3930 } 3931 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3932 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3933 QDIO_MAX_BUFFERS_PER_Q; 3934 flush_count += tmp; 3935 if (flush_count) 3936 qeth_flush_buffers(queue, start_index, flush_count); 3937 else if (!atomic_read(&queue->set_pci_flags_count)) 3938 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3939 /* 3940 * queue->state will go from LOCKED -> UNLOCKED or from 3941 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3942 * (switch packing state or flush buffer to get another pci flag out). 3943 * In that case we will enter this loop 3944 */ 3945 while (atomic_dec_return(&queue->state)) { 3946 flush_count = 0; 3947 start_index = queue->next_buf_to_fill; 3948 /* check if we can go back to non-packing state */ 3949 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3950 /* 3951 * check if we need to flush a packing buffer to get a pci 3952 * flag out on the queue 3953 */ 3954 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3955 flush_count += qeth_flush_buffers_on_no_pci(queue); 3956 if (flush_count) 3957 qeth_flush_buffers(queue, start_index, flush_count); 3958 } 3959 /* at this point the queue is UNLOCKED again */ 3960 if (queue->card->options.performance_stats && do_pack) 3961 queue->card->perf_stats.bufs_sent_pack += flush_count; 3962 3963 return rc; 3964 } 3965 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3966 3967 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3968 struct qeth_reply *reply, unsigned long data) 3969 { 3970 struct qeth_ipa_cmd *cmd; 3971 struct qeth_ipacmd_setadpparms *setparms; 3972 3973 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3974 3975 cmd = (struct qeth_ipa_cmd *) data; 3976 setparms = &(cmd->data.setadapterparms); 3977 3978 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3979 if (cmd->hdr.return_code) { 3980 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3981 setparms->data.mode = SET_PROMISC_MODE_OFF; 3982 } 3983 card->info.promisc_mode = setparms->data.mode; 3984 return 0; 3985 } 3986 3987 void qeth_setadp_promisc_mode(struct qeth_card *card) 3988 { 3989 enum qeth_ipa_promisc_modes mode; 3990 struct net_device *dev = card->dev; 3991 struct qeth_cmd_buffer *iob; 3992 struct qeth_ipa_cmd *cmd; 3993 3994 QETH_CARD_TEXT(card, 4, "setprom"); 3995 3996 if (((dev->flags & IFF_PROMISC) && 3997 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3998 (!(dev->flags & IFF_PROMISC) && 3999 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4000 return; 4001 mode = SET_PROMISC_MODE_OFF; 4002 if (dev->flags & IFF_PROMISC) 4003 mode = SET_PROMISC_MODE_ON; 4004 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4005 4006 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4007 sizeof(struct qeth_ipacmd_setadpparms)); 4008 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4009 cmd->data.setadapterparms.data.mode = mode; 4010 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4011 } 4012 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4013 4014 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4015 { 4016 struct qeth_card *card; 4017 char dbf_text[15]; 4018 4019 card = dev->ml_priv; 4020 4021 QETH_CARD_TEXT(card, 4, "chgmtu"); 4022 sprintf(dbf_text, "%8x", new_mtu); 4023 QETH_CARD_TEXT(card, 4, dbf_text); 4024 4025 if (new_mtu < 64) 4026 return -EINVAL; 4027 if (new_mtu > 65535) 4028 return -EINVAL; 4029 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4030 (!qeth_mtu_is_valid(card, new_mtu))) 4031 return -EINVAL; 4032 dev->mtu = new_mtu; 4033 return 0; 4034 } 4035 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4036 4037 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4038 { 4039 struct qeth_card *card; 4040 4041 card = dev->ml_priv; 4042 4043 QETH_CARD_TEXT(card, 5, "getstat"); 4044 4045 return &card->stats; 4046 } 4047 EXPORT_SYMBOL_GPL(qeth_get_stats); 4048 4049 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4050 struct qeth_reply *reply, unsigned long data) 4051 { 4052 struct qeth_ipa_cmd *cmd; 4053 4054 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4055 4056 cmd = (struct qeth_ipa_cmd *) data; 4057 if (!card->options.layer2 || 4058 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4059 memcpy(card->dev->dev_addr, 4060 &cmd->data.setadapterparms.data.change_addr.addr, 4061 OSA_ADDR_LEN); 4062 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4063 } 4064 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4065 return 0; 4066 } 4067 4068 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4069 { 4070 int rc; 4071 struct qeth_cmd_buffer *iob; 4072 struct qeth_ipa_cmd *cmd; 4073 4074 QETH_CARD_TEXT(card, 4, "chgmac"); 4075 4076 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4077 sizeof(struct qeth_ipacmd_setadpparms)); 4078 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4079 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4080 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4081 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4082 card->dev->dev_addr, OSA_ADDR_LEN); 4083 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4084 NULL); 4085 return rc; 4086 } 4087 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4088 4089 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4090 struct qeth_reply *reply, unsigned long data) 4091 { 4092 struct qeth_ipa_cmd *cmd; 4093 struct qeth_set_access_ctrl *access_ctrl_req; 4094 int fallback = *(int *)reply->param; 4095 4096 QETH_CARD_TEXT(card, 4, "setaccb"); 4097 4098 cmd = (struct qeth_ipa_cmd *) data; 4099 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4100 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4101 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4102 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4103 cmd->data.setadapterparms.hdr.return_code); 4104 if (cmd->data.setadapterparms.hdr.return_code != 4105 SET_ACCESS_CTRL_RC_SUCCESS) 4106 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4107 card->gdev->dev.kobj.name, 4108 access_ctrl_req->subcmd_code, 4109 cmd->data.setadapterparms.hdr.return_code); 4110 switch (cmd->data.setadapterparms.hdr.return_code) { 4111 case SET_ACCESS_CTRL_RC_SUCCESS: 4112 if (card->options.isolation == ISOLATION_MODE_NONE) { 4113 dev_info(&card->gdev->dev, 4114 "QDIO data connection isolation is deactivated\n"); 4115 } else { 4116 dev_info(&card->gdev->dev, 4117 "QDIO data connection isolation is activated\n"); 4118 } 4119 break; 4120 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4121 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4122 "deactivated\n", dev_name(&card->gdev->dev)); 4123 if (fallback) 4124 card->options.isolation = card->options.prev_isolation; 4125 break; 4126 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4127 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4128 " activated\n", dev_name(&card->gdev->dev)); 4129 if (fallback) 4130 card->options.isolation = card->options.prev_isolation; 4131 break; 4132 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4133 dev_err(&card->gdev->dev, "Adapter does not " 4134 "support QDIO data connection isolation\n"); 4135 break; 4136 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4137 dev_err(&card->gdev->dev, 4138 "Adapter is dedicated. " 4139 "QDIO data connection isolation not supported\n"); 4140 if (fallback) 4141 card->options.isolation = card->options.prev_isolation; 4142 break; 4143 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4144 dev_err(&card->gdev->dev, 4145 "TSO does not permit QDIO data connection isolation\n"); 4146 if (fallback) 4147 card->options.isolation = card->options.prev_isolation; 4148 break; 4149 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4150 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4151 "support reflective relay mode\n"); 4152 if (fallback) 4153 card->options.isolation = card->options.prev_isolation; 4154 break; 4155 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4156 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4157 "enabled at the adjacent switch port"); 4158 if (fallback) 4159 card->options.isolation = card->options.prev_isolation; 4160 break; 4161 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4162 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4163 "at the adjacent switch failed\n"); 4164 break; 4165 default: 4166 /* this should never happen */ 4167 if (fallback) 4168 card->options.isolation = card->options.prev_isolation; 4169 break; 4170 } 4171 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4172 return 0; 4173 } 4174 4175 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4176 enum qeth_ipa_isolation_modes isolation, int fallback) 4177 { 4178 int rc; 4179 struct qeth_cmd_buffer *iob; 4180 struct qeth_ipa_cmd *cmd; 4181 struct qeth_set_access_ctrl *access_ctrl_req; 4182 4183 QETH_CARD_TEXT(card, 4, "setacctl"); 4184 4185 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4186 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4187 4188 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4189 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4190 sizeof(struct qeth_set_access_ctrl)); 4191 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4192 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4193 access_ctrl_req->subcmd_code = isolation; 4194 4195 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4196 &fallback); 4197 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4198 return rc; 4199 } 4200 4201 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4202 { 4203 int rc = 0; 4204 4205 QETH_CARD_TEXT(card, 4, "setactlo"); 4206 4207 if ((card->info.type == QETH_CARD_TYPE_OSD || 4208 card->info.type == QETH_CARD_TYPE_OSX) && 4209 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4210 rc = qeth_setadpparms_set_access_ctrl(card, 4211 card->options.isolation, fallback); 4212 if (rc) { 4213 QETH_DBF_MESSAGE(3, 4214 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4215 card->gdev->dev.kobj.name, 4216 rc); 4217 rc = -EOPNOTSUPP; 4218 } 4219 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4220 card->options.isolation = ISOLATION_MODE_NONE; 4221 4222 dev_err(&card->gdev->dev, "Adapter does not " 4223 "support QDIO data connection isolation\n"); 4224 rc = -EOPNOTSUPP; 4225 } 4226 return rc; 4227 } 4228 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4229 4230 void qeth_tx_timeout(struct net_device *dev) 4231 { 4232 struct qeth_card *card; 4233 4234 card = dev->ml_priv; 4235 QETH_CARD_TEXT(card, 4, "txtimeo"); 4236 card->stats.tx_errors++; 4237 qeth_schedule_recovery(card); 4238 } 4239 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4240 4241 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4242 { 4243 struct qeth_card *card = dev->ml_priv; 4244 int rc = 0; 4245 4246 switch (regnum) { 4247 case MII_BMCR: /* Basic mode control register */ 4248 rc = BMCR_FULLDPLX; 4249 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4250 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4251 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4252 rc |= BMCR_SPEED100; 4253 break; 4254 case MII_BMSR: /* Basic mode status register */ 4255 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4256 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4257 BMSR_100BASE4; 4258 break; 4259 case MII_PHYSID1: /* PHYS ID 1 */ 4260 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4261 dev->dev_addr[2]; 4262 rc = (rc >> 5) & 0xFFFF; 4263 break; 4264 case MII_PHYSID2: /* PHYS ID 2 */ 4265 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4266 break; 4267 case MII_ADVERTISE: /* Advertisement control reg */ 4268 rc = ADVERTISE_ALL; 4269 break; 4270 case MII_LPA: /* Link partner ability reg */ 4271 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4272 LPA_100BASE4 | LPA_LPACK; 4273 break; 4274 case MII_EXPANSION: /* Expansion register */ 4275 break; 4276 case MII_DCOUNTER: /* disconnect counter */ 4277 break; 4278 case MII_FCSCOUNTER: /* false carrier counter */ 4279 break; 4280 case MII_NWAYTEST: /* N-way auto-neg test register */ 4281 break; 4282 case MII_RERRCOUNTER: /* rx error counter */ 4283 rc = card->stats.rx_errors; 4284 break; 4285 case MII_SREVISION: /* silicon revision */ 4286 break; 4287 case MII_RESV1: /* reserved 1 */ 4288 break; 4289 case MII_LBRERROR: /* loopback, rx, bypass error */ 4290 break; 4291 case MII_PHYADDR: /* physical address */ 4292 break; 4293 case MII_RESV2: /* reserved 2 */ 4294 break; 4295 case MII_TPISTATUS: /* TPI status for 10mbps */ 4296 break; 4297 case MII_NCONFIG: /* network interface config */ 4298 break; 4299 default: 4300 break; 4301 } 4302 return rc; 4303 } 4304 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4305 4306 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4307 struct qeth_cmd_buffer *iob, int len, 4308 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4309 unsigned long), 4310 void *reply_param) 4311 { 4312 u16 s1, s2; 4313 4314 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4315 4316 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4317 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4318 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4319 /* adjust PDU length fields in IPA_PDU_HEADER */ 4320 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4321 s2 = (u32) len; 4322 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4323 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4324 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4325 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4326 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4327 reply_cb, reply_param); 4328 } 4329 4330 static int qeth_snmp_command_cb(struct qeth_card *card, 4331 struct qeth_reply *reply, unsigned long sdata) 4332 { 4333 struct qeth_ipa_cmd *cmd; 4334 struct qeth_arp_query_info *qinfo; 4335 struct qeth_snmp_cmd *snmp; 4336 unsigned char *data; 4337 __u16 data_len; 4338 4339 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4340 4341 cmd = (struct qeth_ipa_cmd *) sdata; 4342 data = (unsigned char *)((char *)cmd - reply->offset); 4343 qinfo = (struct qeth_arp_query_info *) reply->param; 4344 snmp = &cmd->data.setadapterparms.data.snmp; 4345 4346 if (cmd->hdr.return_code) { 4347 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4348 return 0; 4349 } 4350 if (cmd->data.setadapterparms.hdr.return_code) { 4351 cmd->hdr.return_code = 4352 cmd->data.setadapterparms.hdr.return_code; 4353 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4354 return 0; 4355 } 4356 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4357 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4358 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4359 else 4360 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4361 4362 /* check if there is enough room in userspace */ 4363 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4364 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4365 cmd->hdr.return_code = IPA_RC_ENOMEM; 4366 return 0; 4367 } 4368 QETH_CARD_TEXT_(card, 4, "snore%i", 4369 cmd->data.setadapterparms.hdr.used_total); 4370 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4371 cmd->data.setadapterparms.hdr.seq_no); 4372 /*copy entries to user buffer*/ 4373 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4374 memcpy(qinfo->udata + qinfo->udata_offset, 4375 (char *)snmp, 4376 data_len + offsetof(struct qeth_snmp_cmd, data)); 4377 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4378 } else { 4379 memcpy(qinfo->udata + qinfo->udata_offset, 4380 (char *)&snmp->request, data_len); 4381 } 4382 qinfo->udata_offset += data_len; 4383 /* check if all replies received ... */ 4384 QETH_CARD_TEXT_(card, 4, "srtot%i", 4385 cmd->data.setadapterparms.hdr.used_total); 4386 QETH_CARD_TEXT_(card, 4, "srseq%i", 4387 cmd->data.setadapterparms.hdr.seq_no); 4388 if (cmd->data.setadapterparms.hdr.seq_no < 4389 cmd->data.setadapterparms.hdr.used_total) 4390 return 1; 4391 return 0; 4392 } 4393 4394 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4395 { 4396 struct qeth_cmd_buffer *iob; 4397 struct qeth_ipa_cmd *cmd; 4398 struct qeth_snmp_ureq *ureq; 4399 int req_len; 4400 struct qeth_arp_query_info qinfo = {0, }; 4401 int rc = 0; 4402 4403 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4404 4405 if (card->info.guestlan) 4406 return -EOPNOTSUPP; 4407 4408 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4409 (!card->options.layer2)) { 4410 return -EOPNOTSUPP; 4411 } 4412 /* skip 4 bytes (data_len struct member) to get req_len */ 4413 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4414 return -EFAULT; 4415 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4416 if (IS_ERR(ureq)) { 4417 QETH_CARD_TEXT(card, 2, "snmpnome"); 4418 return PTR_ERR(ureq); 4419 } 4420 qinfo.udata_len = ureq->hdr.data_len; 4421 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4422 if (!qinfo.udata) { 4423 kfree(ureq); 4424 return -ENOMEM; 4425 } 4426 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4427 4428 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4429 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4430 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4431 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4432 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4433 qeth_snmp_command_cb, (void *)&qinfo); 4434 if (rc) 4435 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4436 QETH_CARD_IFNAME(card), rc); 4437 else { 4438 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4439 rc = -EFAULT; 4440 } 4441 4442 kfree(ureq); 4443 kfree(qinfo.udata); 4444 return rc; 4445 } 4446 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4447 4448 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4449 struct qeth_reply *reply, unsigned long data) 4450 { 4451 struct qeth_ipa_cmd *cmd; 4452 struct qeth_qoat_priv *priv; 4453 char *resdata; 4454 int resdatalen; 4455 4456 QETH_CARD_TEXT(card, 3, "qoatcb"); 4457 4458 cmd = (struct qeth_ipa_cmd *)data; 4459 priv = (struct qeth_qoat_priv *)reply->param; 4460 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4461 resdata = (char *)data + 28; 4462 4463 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4464 cmd->hdr.return_code = IPA_RC_FFFF; 4465 return 0; 4466 } 4467 4468 memcpy((priv->buffer + priv->response_len), resdata, 4469 resdatalen); 4470 priv->response_len += resdatalen; 4471 4472 if (cmd->data.setadapterparms.hdr.seq_no < 4473 cmd->data.setadapterparms.hdr.used_total) 4474 return 1; 4475 return 0; 4476 } 4477 4478 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4479 { 4480 int rc = 0; 4481 struct qeth_cmd_buffer *iob; 4482 struct qeth_ipa_cmd *cmd; 4483 struct qeth_query_oat *oat_req; 4484 struct qeth_query_oat_data oat_data; 4485 struct qeth_qoat_priv priv; 4486 void __user *tmp; 4487 4488 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4489 4490 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4491 rc = -EOPNOTSUPP; 4492 goto out; 4493 } 4494 4495 if (copy_from_user(&oat_data, udata, 4496 sizeof(struct qeth_query_oat_data))) { 4497 rc = -EFAULT; 4498 goto out; 4499 } 4500 4501 priv.buffer_len = oat_data.buffer_len; 4502 priv.response_len = 0; 4503 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4504 if (!priv.buffer) { 4505 rc = -ENOMEM; 4506 goto out; 4507 } 4508 4509 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4510 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4511 sizeof(struct qeth_query_oat)); 4512 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4513 oat_req = &cmd->data.setadapterparms.data.query_oat; 4514 oat_req->subcmd_code = oat_data.command; 4515 4516 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4517 &priv); 4518 if (!rc) { 4519 if (is_compat_task()) 4520 tmp = compat_ptr(oat_data.ptr); 4521 else 4522 tmp = (void __user *)(unsigned long)oat_data.ptr; 4523 4524 if (copy_to_user(tmp, priv.buffer, 4525 priv.response_len)) { 4526 rc = -EFAULT; 4527 goto out_free; 4528 } 4529 4530 oat_data.response_len = priv.response_len; 4531 4532 if (copy_to_user(udata, &oat_data, 4533 sizeof(struct qeth_query_oat_data))) 4534 rc = -EFAULT; 4535 } else 4536 if (rc == IPA_RC_FFFF) 4537 rc = -EFAULT; 4538 4539 out_free: 4540 kfree(priv.buffer); 4541 out: 4542 return rc; 4543 } 4544 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4545 4546 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4547 { 4548 switch (card->info.type) { 4549 case QETH_CARD_TYPE_IQD: 4550 return 2; 4551 default: 4552 return 0; 4553 } 4554 } 4555 4556 static void qeth_determine_capabilities(struct qeth_card *card) 4557 { 4558 int rc; 4559 int length; 4560 char *prcd; 4561 struct ccw_device *ddev; 4562 int ddev_offline = 0; 4563 4564 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4565 ddev = CARD_DDEV(card); 4566 if (!ddev->online) { 4567 ddev_offline = 1; 4568 rc = ccw_device_set_online(ddev); 4569 if (rc) { 4570 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4571 goto out; 4572 } 4573 } 4574 4575 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4576 if (rc) { 4577 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4578 dev_name(&card->gdev->dev), rc); 4579 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4580 goto out_offline; 4581 } 4582 qeth_configure_unitaddr(card, prcd); 4583 if (ddev_offline) 4584 qeth_configure_blkt_default(card, prcd); 4585 kfree(prcd); 4586 4587 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4588 if (rc) 4589 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4590 4591 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4592 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4593 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4594 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4595 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4596 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4597 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4598 dev_info(&card->gdev->dev, 4599 "Completion Queueing supported\n"); 4600 } else { 4601 card->options.cq = QETH_CQ_NOTAVAILABLE; 4602 } 4603 4604 4605 out_offline: 4606 if (ddev_offline == 1) 4607 ccw_device_set_offline(ddev); 4608 out: 4609 return; 4610 } 4611 4612 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4613 struct qdio_buffer **in_sbal_ptrs, 4614 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4615 int i; 4616 4617 if (card->options.cq == QETH_CQ_ENABLED) { 4618 int offset = QDIO_MAX_BUFFERS_PER_Q * 4619 (card->qdio.no_in_queues - 1); 4620 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4621 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4622 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4623 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4624 } 4625 4626 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4627 } 4628 } 4629 4630 static int qeth_qdio_establish(struct qeth_card *card) 4631 { 4632 struct qdio_initialize init_data; 4633 char *qib_param_field; 4634 struct qdio_buffer **in_sbal_ptrs; 4635 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4636 struct qdio_buffer **out_sbal_ptrs; 4637 int i, j, k; 4638 int rc = 0; 4639 4640 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4641 4642 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4643 GFP_KERNEL); 4644 if (!qib_param_field) { 4645 rc = -ENOMEM; 4646 goto out_free_nothing; 4647 } 4648 4649 qeth_create_qib_param_field(card, qib_param_field); 4650 qeth_create_qib_param_field_blkt(card, qib_param_field); 4651 4652 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4653 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4654 GFP_KERNEL); 4655 if (!in_sbal_ptrs) { 4656 rc = -ENOMEM; 4657 goto out_free_qib_param; 4658 } 4659 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4660 in_sbal_ptrs[i] = (struct qdio_buffer *) 4661 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4662 } 4663 4664 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4665 GFP_KERNEL); 4666 if (!queue_start_poll) { 4667 rc = -ENOMEM; 4668 goto out_free_in_sbals; 4669 } 4670 for (i = 0; i < card->qdio.no_in_queues; ++i) 4671 queue_start_poll[i] = card->discipline->start_poll; 4672 4673 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4674 4675 out_sbal_ptrs = 4676 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4677 sizeof(void *), GFP_KERNEL); 4678 if (!out_sbal_ptrs) { 4679 rc = -ENOMEM; 4680 goto out_free_queue_start_poll; 4681 } 4682 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4683 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4684 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4685 card->qdio.out_qs[i]->bufs[j]->buffer); 4686 } 4687 4688 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4689 init_data.cdev = CARD_DDEV(card); 4690 init_data.q_format = qeth_get_qdio_q_format(card); 4691 init_data.qib_param_field_format = 0; 4692 init_data.qib_param_field = qib_param_field; 4693 init_data.no_input_qs = card->qdio.no_in_queues; 4694 init_data.no_output_qs = card->qdio.no_out_queues; 4695 init_data.input_handler = card->discipline->input_handler; 4696 init_data.output_handler = card->discipline->output_handler; 4697 init_data.queue_start_poll_array = queue_start_poll; 4698 init_data.int_parm = (unsigned long) card; 4699 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4700 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4701 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4702 init_data.scan_threshold = 4703 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4704 4705 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4706 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4707 rc = qdio_allocate(&init_data); 4708 if (rc) { 4709 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4710 goto out; 4711 } 4712 rc = qdio_establish(&init_data); 4713 if (rc) { 4714 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4715 qdio_free(CARD_DDEV(card)); 4716 } 4717 } 4718 4719 switch (card->options.cq) { 4720 case QETH_CQ_ENABLED: 4721 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4722 break; 4723 case QETH_CQ_DISABLED: 4724 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4725 break; 4726 default: 4727 break; 4728 } 4729 out: 4730 kfree(out_sbal_ptrs); 4731 out_free_queue_start_poll: 4732 kfree(queue_start_poll); 4733 out_free_in_sbals: 4734 kfree(in_sbal_ptrs); 4735 out_free_qib_param: 4736 kfree(qib_param_field); 4737 out_free_nothing: 4738 return rc; 4739 } 4740 4741 static void qeth_core_free_card(struct qeth_card *card) 4742 { 4743 4744 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4745 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4746 qeth_clean_channel(&card->read); 4747 qeth_clean_channel(&card->write); 4748 if (card->dev) 4749 free_netdev(card->dev); 4750 kfree(card->ip_tbd_list); 4751 qeth_free_qdio_buffers(card); 4752 unregister_service_level(&card->qeth_service_level); 4753 kfree(card); 4754 } 4755 4756 void qeth_trace_features(struct qeth_card *card) 4757 { 4758 QETH_CARD_TEXT(card, 2, "features"); 4759 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 4760 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 4761 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 4762 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 4763 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 4764 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 4765 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 4766 } 4767 EXPORT_SYMBOL_GPL(qeth_trace_features); 4768 4769 static struct ccw_device_id qeth_ids[] = { 4770 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4771 .driver_info = QETH_CARD_TYPE_OSD}, 4772 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4773 .driver_info = QETH_CARD_TYPE_IQD}, 4774 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4775 .driver_info = QETH_CARD_TYPE_OSN}, 4776 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4777 .driver_info = QETH_CARD_TYPE_OSM}, 4778 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4779 .driver_info = QETH_CARD_TYPE_OSX}, 4780 {}, 4781 }; 4782 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4783 4784 static struct ccw_driver qeth_ccw_driver = { 4785 .driver = { 4786 .owner = THIS_MODULE, 4787 .name = "qeth", 4788 }, 4789 .ids = qeth_ids, 4790 .probe = ccwgroup_probe_ccwdev, 4791 .remove = ccwgroup_remove_ccwdev, 4792 }; 4793 4794 int qeth_core_hardsetup_card(struct qeth_card *card) 4795 { 4796 int retries = 3; 4797 int rc; 4798 4799 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4800 atomic_set(&card->force_alloc_skb, 0); 4801 qeth_update_from_chp_desc(card); 4802 retry: 4803 if (retries < 3) 4804 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4805 dev_name(&card->gdev->dev)); 4806 ccw_device_set_offline(CARD_DDEV(card)); 4807 ccw_device_set_offline(CARD_WDEV(card)); 4808 ccw_device_set_offline(CARD_RDEV(card)); 4809 rc = ccw_device_set_online(CARD_RDEV(card)); 4810 if (rc) 4811 goto retriable; 4812 rc = ccw_device_set_online(CARD_WDEV(card)); 4813 if (rc) 4814 goto retriable; 4815 rc = ccw_device_set_online(CARD_DDEV(card)); 4816 if (rc) 4817 goto retriable; 4818 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4819 retriable: 4820 if (rc == -ERESTARTSYS) { 4821 QETH_DBF_TEXT(SETUP, 2, "break1"); 4822 return rc; 4823 } else if (rc) { 4824 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4825 if (--retries < 0) 4826 goto out; 4827 else 4828 goto retry; 4829 } 4830 qeth_determine_capabilities(card); 4831 qeth_init_tokens(card); 4832 qeth_init_func_level(card); 4833 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4834 if (rc == -ERESTARTSYS) { 4835 QETH_DBF_TEXT(SETUP, 2, "break2"); 4836 return rc; 4837 } else if (rc) { 4838 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4839 if (--retries < 0) 4840 goto out; 4841 else 4842 goto retry; 4843 } 4844 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4845 if (rc == -ERESTARTSYS) { 4846 QETH_DBF_TEXT(SETUP, 2, "break3"); 4847 return rc; 4848 } else if (rc) { 4849 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4850 if (--retries < 0) 4851 goto out; 4852 else 4853 goto retry; 4854 } 4855 card->read_or_write_problem = 0; 4856 rc = qeth_mpc_initialize(card); 4857 if (rc) { 4858 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4859 goto out; 4860 } 4861 4862 card->options.ipa4.supported_funcs = 0; 4863 card->options.adp.supported_funcs = 0; 4864 card->info.diagass_support = 0; 4865 qeth_query_ipassists(card, QETH_PROT_IPV4); 4866 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4867 qeth_query_setadapterparms(card); 4868 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4869 qeth_query_setdiagass(card); 4870 return 0; 4871 out: 4872 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4873 "an error on the device\n"); 4874 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4875 dev_name(&card->gdev->dev), rc); 4876 return rc; 4877 } 4878 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4879 4880 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4881 struct qdio_buffer_element *element, 4882 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4883 { 4884 struct page *page = virt_to_page(element->addr); 4885 if (*pskb == NULL) { 4886 if (qethbuffer->rx_skb) { 4887 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4888 *pskb = qethbuffer->rx_skb; 4889 qethbuffer->rx_skb = NULL; 4890 } else { 4891 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4892 if (!(*pskb)) 4893 return -ENOMEM; 4894 } 4895 4896 skb_reserve(*pskb, ETH_HLEN); 4897 if (data_len <= QETH_RX_PULL_LEN) { 4898 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4899 data_len); 4900 } else { 4901 get_page(page); 4902 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 4903 element->addr + offset, QETH_RX_PULL_LEN); 4904 skb_fill_page_desc(*pskb, *pfrag, page, 4905 offset + QETH_RX_PULL_LEN, 4906 data_len - QETH_RX_PULL_LEN); 4907 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 4908 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 4909 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 4910 (*pfrag)++; 4911 } 4912 } else { 4913 get_page(page); 4914 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4915 (*pskb)->data_len += data_len; 4916 (*pskb)->len += data_len; 4917 (*pskb)->truesize += data_len; 4918 (*pfrag)++; 4919 } 4920 4921 4922 return 0; 4923 } 4924 4925 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4926 struct qeth_qdio_buffer *qethbuffer, 4927 struct qdio_buffer_element **__element, int *__offset, 4928 struct qeth_hdr **hdr) 4929 { 4930 struct qdio_buffer_element *element = *__element; 4931 struct qdio_buffer *buffer = qethbuffer->buffer; 4932 int offset = *__offset; 4933 struct sk_buff *skb = NULL; 4934 int skb_len = 0; 4935 void *data_ptr; 4936 int data_len; 4937 int headroom = 0; 4938 int use_rx_sg = 0; 4939 int frag = 0; 4940 4941 /* qeth_hdr must not cross element boundaries */ 4942 if (element->length < offset + sizeof(struct qeth_hdr)) { 4943 if (qeth_is_last_sbale(element)) 4944 return NULL; 4945 element++; 4946 offset = 0; 4947 if (element->length < sizeof(struct qeth_hdr)) 4948 return NULL; 4949 } 4950 *hdr = element->addr + offset; 4951 4952 offset += sizeof(struct qeth_hdr); 4953 switch ((*hdr)->hdr.l2.id) { 4954 case QETH_HEADER_TYPE_LAYER2: 4955 skb_len = (*hdr)->hdr.l2.pkt_length; 4956 break; 4957 case QETH_HEADER_TYPE_LAYER3: 4958 skb_len = (*hdr)->hdr.l3.length; 4959 headroom = ETH_HLEN; 4960 break; 4961 case QETH_HEADER_TYPE_OSN: 4962 skb_len = (*hdr)->hdr.osn.pdu_length; 4963 headroom = sizeof(struct qeth_hdr); 4964 break; 4965 default: 4966 break; 4967 } 4968 4969 if (!skb_len) 4970 return NULL; 4971 4972 if (((skb_len >= card->options.rx_sg_cb) && 4973 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4974 (!atomic_read(&card->force_alloc_skb))) || 4975 (card->options.cq == QETH_CQ_ENABLED)) { 4976 use_rx_sg = 1; 4977 } else { 4978 skb = dev_alloc_skb(skb_len + headroom); 4979 if (!skb) 4980 goto no_mem; 4981 if (headroom) 4982 skb_reserve(skb, headroom); 4983 } 4984 4985 data_ptr = element->addr + offset; 4986 while (skb_len) { 4987 data_len = min(skb_len, (int)(element->length - offset)); 4988 if (data_len) { 4989 if (use_rx_sg) { 4990 if (qeth_create_skb_frag(qethbuffer, element, 4991 &skb, offset, &frag, data_len)) 4992 goto no_mem; 4993 } else { 4994 memcpy(skb_put(skb, data_len), data_ptr, 4995 data_len); 4996 } 4997 } 4998 skb_len -= data_len; 4999 if (skb_len) { 5000 if (qeth_is_last_sbale(element)) { 5001 QETH_CARD_TEXT(card, 4, "unexeob"); 5002 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5003 dev_kfree_skb_any(skb); 5004 card->stats.rx_errors++; 5005 return NULL; 5006 } 5007 element++; 5008 offset = 0; 5009 data_ptr = element->addr; 5010 } else { 5011 offset += data_len; 5012 } 5013 } 5014 *__element = element; 5015 *__offset = offset; 5016 if (use_rx_sg && card->options.performance_stats) { 5017 card->perf_stats.sg_skbs_rx++; 5018 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5019 } 5020 return skb; 5021 no_mem: 5022 if (net_ratelimit()) { 5023 QETH_CARD_TEXT(card, 2, "noskbmem"); 5024 } 5025 card->stats.rx_dropped++; 5026 return NULL; 5027 } 5028 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5029 5030 static void qeth_unregister_dbf_views(void) 5031 { 5032 int x; 5033 for (x = 0; x < QETH_DBF_INFOS; x++) { 5034 debug_unregister(qeth_dbf[x].id); 5035 qeth_dbf[x].id = NULL; 5036 } 5037 } 5038 5039 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5040 { 5041 char dbf_txt_buf[32]; 5042 va_list args; 5043 5044 if (level > id->level) 5045 return; 5046 va_start(args, fmt); 5047 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5048 va_end(args); 5049 debug_text_event(id, level, dbf_txt_buf); 5050 } 5051 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5052 5053 static int qeth_register_dbf_views(void) 5054 { 5055 int ret; 5056 int x; 5057 5058 for (x = 0; x < QETH_DBF_INFOS; x++) { 5059 /* register the areas */ 5060 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5061 qeth_dbf[x].pages, 5062 qeth_dbf[x].areas, 5063 qeth_dbf[x].len); 5064 if (qeth_dbf[x].id == NULL) { 5065 qeth_unregister_dbf_views(); 5066 return -ENOMEM; 5067 } 5068 5069 /* register a view */ 5070 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5071 if (ret) { 5072 qeth_unregister_dbf_views(); 5073 return ret; 5074 } 5075 5076 /* set a passing level */ 5077 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5078 } 5079 5080 return 0; 5081 } 5082 5083 int qeth_core_load_discipline(struct qeth_card *card, 5084 enum qeth_discipline_id discipline) 5085 { 5086 int rc = 0; 5087 mutex_lock(&qeth_mod_mutex); 5088 switch (discipline) { 5089 case QETH_DISCIPLINE_LAYER3: 5090 card->discipline = try_then_request_module( 5091 symbol_get(qeth_l3_discipline), "qeth_l3"); 5092 break; 5093 case QETH_DISCIPLINE_LAYER2: 5094 card->discipline = try_then_request_module( 5095 symbol_get(qeth_l2_discipline), "qeth_l2"); 5096 break; 5097 } 5098 if (!card->discipline) { 5099 dev_err(&card->gdev->dev, "There is no kernel module to " 5100 "support discipline %d\n", discipline); 5101 rc = -EINVAL; 5102 } 5103 mutex_unlock(&qeth_mod_mutex); 5104 return rc; 5105 } 5106 5107 void qeth_core_free_discipline(struct qeth_card *card) 5108 { 5109 if (card->options.layer2) 5110 symbol_put(qeth_l2_discipline); 5111 else 5112 symbol_put(qeth_l3_discipline); 5113 card->discipline = NULL; 5114 } 5115 5116 static const struct device_type qeth_generic_devtype = { 5117 .name = "qeth_generic", 5118 .groups = qeth_generic_attr_groups, 5119 }; 5120 static const struct device_type qeth_osn_devtype = { 5121 .name = "qeth_osn", 5122 .groups = qeth_osn_attr_groups, 5123 }; 5124 5125 #define DBF_NAME_LEN 20 5126 5127 struct qeth_dbf_entry { 5128 char dbf_name[DBF_NAME_LEN]; 5129 debug_info_t *dbf_info; 5130 struct list_head dbf_list; 5131 }; 5132 5133 static LIST_HEAD(qeth_dbf_list); 5134 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5135 5136 static debug_info_t *qeth_get_dbf_entry(char *name) 5137 { 5138 struct qeth_dbf_entry *entry; 5139 debug_info_t *rc = NULL; 5140 5141 mutex_lock(&qeth_dbf_list_mutex); 5142 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5143 if (strcmp(entry->dbf_name, name) == 0) { 5144 rc = entry->dbf_info; 5145 break; 5146 } 5147 } 5148 mutex_unlock(&qeth_dbf_list_mutex); 5149 return rc; 5150 } 5151 5152 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5153 { 5154 struct qeth_dbf_entry *new_entry; 5155 5156 card->debug = debug_register(name, 2, 1, 8); 5157 if (!card->debug) { 5158 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5159 goto err; 5160 } 5161 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5162 goto err_dbg; 5163 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5164 if (!new_entry) 5165 goto err_dbg; 5166 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5167 new_entry->dbf_info = card->debug; 5168 mutex_lock(&qeth_dbf_list_mutex); 5169 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5170 mutex_unlock(&qeth_dbf_list_mutex); 5171 5172 return 0; 5173 5174 err_dbg: 5175 debug_unregister(card->debug); 5176 err: 5177 return -ENOMEM; 5178 } 5179 5180 static void qeth_clear_dbf_list(void) 5181 { 5182 struct qeth_dbf_entry *entry, *tmp; 5183 5184 mutex_lock(&qeth_dbf_list_mutex); 5185 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5186 list_del(&entry->dbf_list); 5187 debug_unregister(entry->dbf_info); 5188 kfree(entry); 5189 } 5190 mutex_unlock(&qeth_dbf_list_mutex); 5191 } 5192 5193 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5194 { 5195 struct qeth_card *card; 5196 struct device *dev; 5197 int rc; 5198 unsigned long flags; 5199 char dbf_name[DBF_NAME_LEN]; 5200 5201 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5202 5203 dev = &gdev->dev; 5204 if (!get_device(dev)) 5205 return -ENODEV; 5206 5207 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5208 5209 card = qeth_alloc_card(); 5210 if (!card) { 5211 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5212 rc = -ENOMEM; 5213 goto err_dev; 5214 } 5215 5216 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5217 dev_name(&gdev->dev)); 5218 card->debug = qeth_get_dbf_entry(dbf_name); 5219 if (!card->debug) { 5220 rc = qeth_add_dbf_entry(card, dbf_name); 5221 if (rc) 5222 goto err_card; 5223 } 5224 5225 card->read.ccwdev = gdev->cdev[0]; 5226 card->write.ccwdev = gdev->cdev[1]; 5227 card->data.ccwdev = gdev->cdev[2]; 5228 dev_set_drvdata(&gdev->dev, card); 5229 card->gdev = gdev; 5230 gdev->cdev[0]->handler = qeth_irq; 5231 gdev->cdev[1]->handler = qeth_irq; 5232 gdev->cdev[2]->handler = qeth_irq; 5233 5234 rc = qeth_determine_card_type(card); 5235 if (rc) { 5236 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5237 goto err_card; 5238 } 5239 rc = qeth_setup_card(card); 5240 if (rc) { 5241 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5242 goto err_card; 5243 } 5244 5245 if (card->info.type == QETH_CARD_TYPE_OSN) 5246 gdev->dev.type = &qeth_osn_devtype; 5247 else 5248 gdev->dev.type = &qeth_generic_devtype; 5249 5250 switch (card->info.type) { 5251 case QETH_CARD_TYPE_OSN: 5252 case QETH_CARD_TYPE_OSM: 5253 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5254 if (rc) 5255 goto err_card; 5256 rc = card->discipline->setup(card->gdev); 5257 if (rc) 5258 goto err_disc; 5259 case QETH_CARD_TYPE_OSD: 5260 case QETH_CARD_TYPE_OSX: 5261 default: 5262 break; 5263 } 5264 5265 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5266 list_add_tail(&card->list, &qeth_core_card_list.list); 5267 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5268 5269 qeth_determine_capabilities(card); 5270 return 0; 5271 5272 err_disc: 5273 qeth_core_free_discipline(card); 5274 err_card: 5275 qeth_core_free_card(card); 5276 err_dev: 5277 put_device(dev); 5278 return rc; 5279 } 5280 5281 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5282 { 5283 unsigned long flags; 5284 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5285 5286 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5287 5288 if (card->discipline) { 5289 card->discipline->remove(gdev); 5290 qeth_core_free_discipline(card); 5291 } 5292 5293 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5294 list_del(&card->list); 5295 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5296 qeth_core_free_card(card); 5297 dev_set_drvdata(&gdev->dev, NULL); 5298 put_device(&gdev->dev); 5299 return; 5300 } 5301 5302 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5303 { 5304 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5305 int rc = 0; 5306 int def_discipline; 5307 5308 if (!card->discipline) { 5309 if (card->info.type == QETH_CARD_TYPE_IQD) 5310 def_discipline = QETH_DISCIPLINE_LAYER3; 5311 else 5312 def_discipline = QETH_DISCIPLINE_LAYER2; 5313 rc = qeth_core_load_discipline(card, def_discipline); 5314 if (rc) 5315 goto err; 5316 rc = card->discipline->setup(card->gdev); 5317 if (rc) 5318 goto err; 5319 } 5320 rc = card->discipline->set_online(gdev); 5321 err: 5322 return rc; 5323 } 5324 5325 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5326 { 5327 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5328 return card->discipline->set_offline(gdev); 5329 } 5330 5331 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5332 { 5333 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5334 if (card->discipline && card->discipline->shutdown) 5335 card->discipline->shutdown(gdev); 5336 } 5337 5338 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5339 { 5340 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5341 if (card->discipline && card->discipline->prepare) 5342 return card->discipline->prepare(gdev); 5343 return 0; 5344 } 5345 5346 static void qeth_core_complete(struct ccwgroup_device *gdev) 5347 { 5348 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5349 if (card->discipline && card->discipline->complete) 5350 card->discipline->complete(gdev); 5351 } 5352 5353 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5354 { 5355 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5356 if (card->discipline && card->discipline->freeze) 5357 return card->discipline->freeze(gdev); 5358 return 0; 5359 } 5360 5361 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5362 { 5363 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5364 if (card->discipline && card->discipline->thaw) 5365 return card->discipline->thaw(gdev); 5366 return 0; 5367 } 5368 5369 static int qeth_core_restore(struct ccwgroup_device *gdev) 5370 { 5371 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5372 if (card->discipline && card->discipline->restore) 5373 return card->discipline->restore(gdev); 5374 return 0; 5375 } 5376 5377 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5378 .driver = { 5379 .owner = THIS_MODULE, 5380 .name = "qeth", 5381 }, 5382 .setup = qeth_core_probe_device, 5383 .remove = qeth_core_remove_device, 5384 .set_online = qeth_core_set_online, 5385 .set_offline = qeth_core_set_offline, 5386 .shutdown = qeth_core_shutdown, 5387 .prepare = qeth_core_prepare, 5388 .complete = qeth_core_complete, 5389 .freeze = qeth_core_freeze, 5390 .thaw = qeth_core_thaw, 5391 .restore = qeth_core_restore, 5392 }; 5393 5394 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5395 const char *buf, size_t count) 5396 { 5397 int err; 5398 5399 err = ccwgroup_create_dev(qeth_core_root_dev, 5400 &qeth_core_ccwgroup_driver, 3, buf); 5401 5402 return err ? err : count; 5403 } 5404 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5405 5406 static struct attribute *qeth_drv_attrs[] = { 5407 &driver_attr_group.attr, 5408 NULL, 5409 }; 5410 static struct attribute_group qeth_drv_attr_group = { 5411 .attrs = qeth_drv_attrs, 5412 }; 5413 static const struct attribute_group *qeth_drv_attr_groups[] = { 5414 &qeth_drv_attr_group, 5415 NULL, 5416 }; 5417 5418 static struct { 5419 const char str[ETH_GSTRING_LEN]; 5420 } qeth_ethtool_stats_keys[] = { 5421 /* 0 */{"rx skbs"}, 5422 {"rx buffers"}, 5423 {"tx skbs"}, 5424 {"tx buffers"}, 5425 {"tx skbs no packing"}, 5426 {"tx buffers no packing"}, 5427 {"tx skbs packing"}, 5428 {"tx buffers packing"}, 5429 {"tx sg skbs"}, 5430 {"tx sg frags"}, 5431 /* 10 */{"rx sg skbs"}, 5432 {"rx sg frags"}, 5433 {"rx sg page allocs"}, 5434 {"tx large kbytes"}, 5435 {"tx large count"}, 5436 {"tx pk state ch n->p"}, 5437 {"tx pk state ch p->n"}, 5438 {"tx pk watermark low"}, 5439 {"tx pk watermark high"}, 5440 {"queue 0 buffer usage"}, 5441 /* 20 */{"queue 1 buffer usage"}, 5442 {"queue 2 buffer usage"}, 5443 {"queue 3 buffer usage"}, 5444 {"rx poll time"}, 5445 {"rx poll count"}, 5446 {"rx do_QDIO time"}, 5447 {"rx do_QDIO count"}, 5448 {"tx handler time"}, 5449 {"tx handler count"}, 5450 {"tx time"}, 5451 /* 30 */{"tx count"}, 5452 {"tx do_QDIO time"}, 5453 {"tx do_QDIO count"}, 5454 {"tx csum"}, 5455 {"tx lin"}, 5456 {"cq handler count"}, 5457 {"cq handler time"} 5458 }; 5459 5460 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5461 { 5462 switch (stringset) { 5463 case ETH_SS_STATS: 5464 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5465 default: 5466 return -EINVAL; 5467 } 5468 } 5469 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5470 5471 void qeth_core_get_ethtool_stats(struct net_device *dev, 5472 struct ethtool_stats *stats, u64 *data) 5473 { 5474 struct qeth_card *card = dev->ml_priv; 5475 data[0] = card->stats.rx_packets - 5476 card->perf_stats.initial_rx_packets; 5477 data[1] = card->perf_stats.bufs_rec; 5478 data[2] = card->stats.tx_packets - 5479 card->perf_stats.initial_tx_packets; 5480 data[3] = card->perf_stats.bufs_sent; 5481 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5482 - card->perf_stats.skbs_sent_pack; 5483 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5484 data[6] = card->perf_stats.skbs_sent_pack; 5485 data[7] = card->perf_stats.bufs_sent_pack; 5486 data[8] = card->perf_stats.sg_skbs_sent; 5487 data[9] = card->perf_stats.sg_frags_sent; 5488 data[10] = card->perf_stats.sg_skbs_rx; 5489 data[11] = card->perf_stats.sg_frags_rx; 5490 data[12] = card->perf_stats.sg_alloc_page_rx; 5491 data[13] = (card->perf_stats.large_send_bytes >> 10); 5492 data[14] = card->perf_stats.large_send_cnt; 5493 data[15] = card->perf_stats.sc_dp_p; 5494 data[16] = card->perf_stats.sc_p_dp; 5495 data[17] = QETH_LOW_WATERMARK_PACK; 5496 data[18] = QETH_HIGH_WATERMARK_PACK; 5497 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5498 data[20] = (card->qdio.no_out_queues > 1) ? 5499 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5500 data[21] = (card->qdio.no_out_queues > 2) ? 5501 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5502 data[22] = (card->qdio.no_out_queues > 3) ? 5503 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5504 data[23] = card->perf_stats.inbound_time; 5505 data[24] = card->perf_stats.inbound_cnt; 5506 data[25] = card->perf_stats.inbound_do_qdio_time; 5507 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5508 data[27] = card->perf_stats.outbound_handler_time; 5509 data[28] = card->perf_stats.outbound_handler_cnt; 5510 data[29] = card->perf_stats.outbound_time; 5511 data[30] = card->perf_stats.outbound_cnt; 5512 data[31] = card->perf_stats.outbound_do_qdio_time; 5513 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5514 data[33] = card->perf_stats.tx_csum; 5515 data[34] = card->perf_stats.tx_lin; 5516 data[35] = card->perf_stats.cq_cnt; 5517 data[36] = card->perf_stats.cq_time; 5518 } 5519 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5520 5521 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5522 { 5523 switch (stringset) { 5524 case ETH_SS_STATS: 5525 memcpy(data, &qeth_ethtool_stats_keys, 5526 sizeof(qeth_ethtool_stats_keys)); 5527 break; 5528 default: 5529 WARN_ON(1); 5530 break; 5531 } 5532 } 5533 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5534 5535 void qeth_core_get_drvinfo(struct net_device *dev, 5536 struct ethtool_drvinfo *info) 5537 { 5538 struct qeth_card *card = dev->ml_priv; 5539 5540 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5541 sizeof(info->driver)); 5542 strlcpy(info->version, "1.0", sizeof(info->version)); 5543 strlcpy(info->fw_version, card->info.mcl_level, 5544 sizeof(info->fw_version)); 5545 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5546 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5547 } 5548 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5549 5550 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5551 struct ethtool_cmd *ecmd) 5552 { 5553 struct qeth_card *card = netdev->ml_priv; 5554 enum qeth_link_types link_type; 5555 5556 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5557 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5558 else 5559 link_type = card->info.link_type; 5560 5561 ecmd->transceiver = XCVR_INTERNAL; 5562 ecmd->supported = SUPPORTED_Autoneg; 5563 ecmd->advertising = ADVERTISED_Autoneg; 5564 ecmd->duplex = DUPLEX_FULL; 5565 ecmd->autoneg = AUTONEG_ENABLE; 5566 5567 switch (link_type) { 5568 case QETH_LINK_TYPE_FAST_ETH: 5569 case QETH_LINK_TYPE_LANE_ETH100: 5570 ecmd->supported |= SUPPORTED_10baseT_Half | 5571 SUPPORTED_10baseT_Full | 5572 SUPPORTED_100baseT_Half | 5573 SUPPORTED_100baseT_Full | 5574 SUPPORTED_TP; 5575 ecmd->advertising |= ADVERTISED_10baseT_Half | 5576 ADVERTISED_10baseT_Full | 5577 ADVERTISED_100baseT_Half | 5578 ADVERTISED_100baseT_Full | 5579 ADVERTISED_TP; 5580 ecmd->speed = SPEED_100; 5581 ecmd->port = PORT_TP; 5582 break; 5583 5584 case QETH_LINK_TYPE_GBIT_ETH: 5585 case QETH_LINK_TYPE_LANE_ETH1000: 5586 ecmd->supported |= SUPPORTED_10baseT_Half | 5587 SUPPORTED_10baseT_Full | 5588 SUPPORTED_100baseT_Half | 5589 SUPPORTED_100baseT_Full | 5590 SUPPORTED_1000baseT_Half | 5591 SUPPORTED_1000baseT_Full | 5592 SUPPORTED_FIBRE; 5593 ecmd->advertising |= ADVERTISED_10baseT_Half | 5594 ADVERTISED_10baseT_Full | 5595 ADVERTISED_100baseT_Half | 5596 ADVERTISED_100baseT_Full | 5597 ADVERTISED_1000baseT_Half | 5598 ADVERTISED_1000baseT_Full | 5599 ADVERTISED_FIBRE; 5600 ecmd->speed = SPEED_1000; 5601 ecmd->port = PORT_FIBRE; 5602 break; 5603 5604 case QETH_LINK_TYPE_10GBIT_ETH: 5605 ecmd->supported |= SUPPORTED_10baseT_Half | 5606 SUPPORTED_10baseT_Full | 5607 SUPPORTED_100baseT_Half | 5608 SUPPORTED_100baseT_Full | 5609 SUPPORTED_1000baseT_Half | 5610 SUPPORTED_1000baseT_Full | 5611 SUPPORTED_10000baseT_Full | 5612 SUPPORTED_FIBRE; 5613 ecmd->advertising |= ADVERTISED_10baseT_Half | 5614 ADVERTISED_10baseT_Full | 5615 ADVERTISED_100baseT_Half | 5616 ADVERTISED_100baseT_Full | 5617 ADVERTISED_1000baseT_Half | 5618 ADVERTISED_1000baseT_Full | 5619 ADVERTISED_10000baseT_Full | 5620 ADVERTISED_FIBRE; 5621 ecmd->speed = SPEED_10000; 5622 ecmd->port = PORT_FIBRE; 5623 break; 5624 5625 default: 5626 ecmd->supported |= SUPPORTED_10baseT_Half | 5627 SUPPORTED_10baseT_Full | 5628 SUPPORTED_TP; 5629 ecmd->advertising |= ADVERTISED_10baseT_Half | 5630 ADVERTISED_10baseT_Full | 5631 ADVERTISED_TP; 5632 ecmd->speed = SPEED_10; 5633 ecmd->port = PORT_TP; 5634 } 5635 5636 return 0; 5637 } 5638 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5639 5640 static int __init qeth_core_init(void) 5641 { 5642 int rc; 5643 5644 pr_info("loading core functions\n"); 5645 INIT_LIST_HEAD(&qeth_core_card_list.list); 5646 INIT_LIST_HEAD(&qeth_dbf_list); 5647 rwlock_init(&qeth_core_card_list.rwlock); 5648 mutex_init(&qeth_mod_mutex); 5649 5650 qeth_wq = create_singlethread_workqueue("qeth_wq"); 5651 5652 rc = qeth_register_dbf_views(); 5653 if (rc) 5654 goto out_err; 5655 qeth_core_root_dev = root_device_register("qeth"); 5656 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 5657 if (rc) 5658 goto register_err; 5659 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5660 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5661 if (!qeth_core_header_cache) { 5662 rc = -ENOMEM; 5663 goto slab_err; 5664 } 5665 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5666 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5667 if (!qeth_qdio_outbuf_cache) { 5668 rc = -ENOMEM; 5669 goto cqslab_err; 5670 } 5671 rc = ccw_driver_register(&qeth_ccw_driver); 5672 if (rc) 5673 goto ccw_err; 5674 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5675 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5676 if (rc) 5677 goto ccwgroup_err; 5678 5679 return 0; 5680 5681 ccwgroup_err: 5682 ccw_driver_unregister(&qeth_ccw_driver); 5683 ccw_err: 5684 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5685 cqslab_err: 5686 kmem_cache_destroy(qeth_core_header_cache); 5687 slab_err: 5688 root_device_unregister(qeth_core_root_dev); 5689 register_err: 5690 qeth_unregister_dbf_views(); 5691 out_err: 5692 pr_err("Initializing the qeth device driver failed\n"); 5693 return rc; 5694 } 5695 5696 static void __exit qeth_core_exit(void) 5697 { 5698 qeth_clear_dbf_list(); 5699 destroy_workqueue(qeth_wq); 5700 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5701 ccw_driver_unregister(&qeth_ccw_driver); 5702 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5703 kmem_cache_destroy(qeth_core_header_cache); 5704 root_device_unregister(qeth_core_root_dev); 5705 qeth_unregister_dbf_views(); 5706 pr_info("core functions removed\n"); 5707 } 5708 5709 module_init(qeth_core_init); 5710 module_exit(qeth_core_exit); 5711 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5712 MODULE_DESCRIPTION("qeth core functions"); 5713 MODULE_LICENSE("GPL"); 5714