1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 24 #include <asm/ebcdic.h> 25 #include <asm/chpid.h> 26 #include <asm/io.h> 27 #include <asm/sysinfo.h> 28 #include <asm/compat.h> 29 30 #include "qeth_core.h" 31 32 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 34 /* N P A M L V H */ 35 [QETH_DBF_SETUP] = {"qeth_setup", 36 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 37 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 38 &debug_sprintf_view, NULL}, 39 [QETH_DBF_CTRL] = {"qeth_control", 40 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 41 }; 42 EXPORT_SYMBOL_GPL(qeth_dbf); 43 44 struct qeth_card_list_struct qeth_core_card_list; 45 EXPORT_SYMBOL_GPL(qeth_core_card_list); 46 struct kmem_cache *qeth_core_header_cache; 47 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 48 static struct kmem_cache *qeth_qdio_outbuf_cache; 49 50 static struct device *qeth_core_root_dev; 51 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 52 static struct lock_class_key qdio_out_skb_queue_key; 53 static struct mutex qeth_mod_mutex; 54 55 static void qeth_send_control_data_cb(struct qeth_channel *, 56 struct qeth_cmd_buffer *); 57 static int qeth_issue_next_read(struct qeth_card *); 58 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 59 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 60 static void qeth_free_buffer_pool(struct qeth_card *); 61 static int qeth_qdio_establish(struct qeth_card *); 62 static void qeth_free_qdio_buffers(struct qeth_card *); 63 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 64 struct qeth_qdio_out_buffer *buf, 65 enum iucv_tx_notify notification); 66 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 67 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 68 struct qeth_qdio_out_buffer *buf, 69 enum qeth_qdio_buffer_states newbufstate); 70 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 71 72 struct workqueue_struct *qeth_wq; 73 EXPORT_SYMBOL_GPL(qeth_wq); 74 75 static void qeth_close_dev_handler(struct work_struct *work) 76 { 77 struct qeth_card *card; 78 79 card = container_of(work, struct qeth_card, close_dev_work); 80 QETH_CARD_TEXT(card, 2, "cldevhdl"); 81 rtnl_lock(); 82 dev_close(card->dev); 83 rtnl_unlock(); 84 ccwgroup_set_offline(card->gdev); 85 } 86 87 void qeth_close_dev(struct qeth_card *card) 88 { 89 QETH_CARD_TEXT(card, 2, "cldevsubm"); 90 queue_work(qeth_wq, &card->close_dev_work); 91 } 92 EXPORT_SYMBOL_GPL(qeth_close_dev); 93 94 static inline const char *qeth_get_cardname(struct qeth_card *card) 95 { 96 if (card->info.guestlan) { 97 switch (card->info.type) { 98 case QETH_CARD_TYPE_OSD: 99 return " Virtual NIC QDIO"; 100 case QETH_CARD_TYPE_IQD: 101 return " Virtual NIC Hiper"; 102 case QETH_CARD_TYPE_OSM: 103 return " Virtual NIC QDIO - OSM"; 104 case QETH_CARD_TYPE_OSX: 105 return " Virtual NIC QDIO - OSX"; 106 default: 107 return " unknown"; 108 } 109 } else { 110 switch (card->info.type) { 111 case QETH_CARD_TYPE_OSD: 112 return " OSD Express"; 113 case QETH_CARD_TYPE_IQD: 114 return " HiperSockets"; 115 case QETH_CARD_TYPE_OSN: 116 return " OSN QDIO"; 117 case QETH_CARD_TYPE_OSM: 118 return " OSM QDIO"; 119 case QETH_CARD_TYPE_OSX: 120 return " OSX QDIO"; 121 default: 122 return " unknown"; 123 } 124 } 125 return " n/a"; 126 } 127 128 /* max length to be returned: 14 */ 129 const char *qeth_get_cardname_short(struct qeth_card *card) 130 { 131 if (card->info.guestlan) { 132 switch (card->info.type) { 133 case QETH_CARD_TYPE_OSD: 134 return "Virt.NIC QDIO"; 135 case QETH_CARD_TYPE_IQD: 136 return "Virt.NIC Hiper"; 137 case QETH_CARD_TYPE_OSM: 138 return "Virt.NIC OSM"; 139 case QETH_CARD_TYPE_OSX: 140 return "Virt.NIC OSX"; 141 default: 142 return "unknown"; 143 } 144 } else { 145 switch (card->info.type) { 146 case QETH_CARD_TYPE_OSD: 147 switch (card->info.link_type) { 148 case QETH_LINK_TYPE_FAST_ETH: 149 return "OSD_100"; 150 case QETH_LINK_TYPE_HSTR: 151 return "HSTR"; 152 case QETH_LINK_TYPE_GBIT_ETH: 153 return "OSD_1000"; 154 case QETH_LINK_TYPE_10GBIT_ETH: 155 return "OSD_10GIG"; 156 case QETH_LINK_TYPE_LANE_ETH100: 157 return "OSD_FE_LANE"; 158 case QETH_LINK_TYPE_LANE_TR: 159 return "OSD_TR_LANE"; 160 case QETH_LINK_TYPE_LANE_ETH1000: 161 return "OSD_GbE_LANE"; 162 case QETH_LINK_TYPE_LANE: 163 return "OSD_ATM_LANE"; 164 default: 165 return "OSD_Express"; 166 } 167 case QETH_CARD_TYPE_IQD: 168 return "HiperSockets"; 169 case QETH_CARD_TYPE_OSN: 170 return "OSN"; 171 case QETH_CARD_TYPE_OSM: 172 return "OSM_1000"; 173 case QETH_CARD_TYPE_OSX: 174 return "OSX_10GIG"; 175 default: 176 return "unknown"; 177 } 178 } 179 return "n/a"; 180 } 181 182 void qeth_set_recovery_task(struct qeth_card *card) 183 { 184 card->recovery_task = current; 185 } 186 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 187 188 void qeth_clear_recovery_task(struct qeth_card *card) 189 { 190 card->recovery_task = NULL; 191 } 192 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 193 194 static bool qeth_is_recovery_task(const struct qeth_card *card) 195 { 196 return card->recovery_task == current; 197 } 198 199 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 200 int clear_start_mask) 201 { 202 unsigned long flags; 203 204 spin_lock_irqsave(&card->thread_mask_lock, flags); 205 card->thread_allowed_mask = threads; 206 if (clear_start_mask) 207 card->thread_start_mask &= threads; 208 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 209 wake_up(&card->wait_q); 210 } 211 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 212 213 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 214 { 215 unsigned long flags; 216 int rc = 0; 217 218 spin_lock_irqsave(&card->thread_mask_lock, flags); 219 rc = (card->thread_running_mask & threads); 220 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 221 return rc; 222 } 223 EXPORT_SYMBOL_GPL(qeth_threads_running); 224 225 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 226 { 227 if (qeth_is_recovery_task(card)) 228 return 0; 229 return wait_event_interruptible(card->wait_q, 230 qeth_threads_running(card, threads) == 0); 231 } 232 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 233 234 void qeth_clear_working_pool_list(struct qeth_card *card) 235 { 236 struct qeth_buffer_pool_entry *pool_entry, *tmp; 237 238 QETH_CARD_TEXT(card, 5, "clwrklst"); 239 list_for_each_entry_safe(pool_entry, tmp, 240 &card->qdio.in_buf_pool.entry_list, list){ 241 list_del(&pool_entry->list); 242 } 243 } 244 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 245 246 static int qeth_alloc_buffer_pool(struct qeth_card *card) 247 { 248 struct qeth_buffer_pool_entry *pool_entry; 249 void *ptr; 250 int i, j; 251 252 QETH_CARD_TEXT(card, 5, "alocpool"); 253 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 254 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 255 if (!pool_entry) { 256 qeth_free_buffer_pool(card); 257 return -ENOMEM; 258 } 259 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 260 ptr = (void *) __get_free_page(GFP_KERNEL); 261 if (!ptr) { 262 while (j > 0) 263 free_page((unsigned long) 264 pool_entry->elements[--j]); 265 kfree(pool_entry); 266 qeth_free_buffer_pool(card); 267 return -ENOMEM; 268 } 269 pool_entry->elements[j] = ptr; 270 } 271 list_add(&pool_entry->init_list, 272 &card->qdio.init_pool.entry_list); 273 } 274 return 0; 275 } 276 277 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 278 { 279 QETH_CARD_TEXT(card, 2, "realcbp"); 280 281 if ((card->state != CARD_STATE_DOWN) && 282 (card->state != CARD_STATE_RECOVER)) 283 return -EPERM; 284 285 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 286 qeth_clear_working_pool_list(card); 287 qeth_free_buffer_pool(card); 288 card->qdio.in_buf_pool.buf_count = bufcnt; 289 card->qdio.init_pool.buf_count = bufcnt; 290 return qeth_alloc_buffer_pool(card); 291 } 292 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 293 294 static inline int qeth_cq_init(struct qeth_card *card) 295 { 296 int rc; 297 298 if (card->options.cq == QETH_CQ_ENABLED) { 299 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 300 memset(card->qdio.c_q->qdio_bufs, 0, 301 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 302 card->qdio.c_q->next_buf_to_init = 127; 303 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 304 card->qdio.no_in_queues - 1, 0, 305 127); 306 if (rc) { 307 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 308 goto out; 309 } 310 } 311 rc = 0; 312 out: 313 return rc; 314 } 315 316 static inline int qeth_alloc_cq(struct qeth_card *card) 317 { 318 int rc; 319 320 if (card->options.cq == QETH_CQ_ENABLED) { 321 int i; 322 struct qdio_outbuf_state *outbuf_states; 323 324 QETH_DBF_TEXT(SETUP, 2, "cqon"); 325 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 326 GFP_KERNEL); 327 if (!card->qdio.c_q) { 328 rc = -1; 329 goto kmsg_out; 330 } 331 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 332 333 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 334 card->qdio.c_q->bufs[i].buffer = 335 &card->qdio.c_q->qdio_bufs[i]; 336 } 337 338 card->qdio.no_in_queues = 2; 339 340 card->qdio.out_bufstates = 341 kzalloc(card->qdio.no_out_queues * 342 QDIO_MAX_BUFFERS_PER_Q * 343 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 344 outbuf_states = card->qdio.out_bufstates; 345 if (outbuf_states == NULL) { 346 rc = -1; 347 goto free_cq_out; 348 } 349 for (i = 0; i < card->qdio.no_out_queues; ++i) { 350 card->qdio.out_qs[i]->bufstates = outbuf_states; 351 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 352 } 353 } else { 354 QETH_DBF_TEXT(SETUP, 2, "nocq"); 355 card->qdio.c_q = NULL; 356 card->qdio.no_in_queues = 1; 357 } 358 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 359 rc = 0; 360 out: 361 return rc; 362 free_cq_out: 363 kfree(card->qdio.c_q); 364 card->qdio.c_q = NULL; 365 kmsg_out: 366 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 367 goto out; 368 } 369 370 static inline void qeth_free_cq(struct qeth_card *card) 371 { 372 if (card->qdio.c_q) { 373 --card->qdio.no_in_queues; 374 kfree(card->qdio.c_q); 375 card->qdio.c_q = NULL; 376 } 377 kfree(card->qdio.out_bufstates); 378 card->qdio.out_bufstates = NULL; 379 } 380 381 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 382 int delayed) { 383 enum iucv_tx_notify n; 384 385 switch (sbalf15) { 386 case 0: 387 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 388 break; 389 case 4: 390 case 16: 391 case 17: 392 case 18: 393 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 394 TX_NOTIFY_UNREACHABLE; 395 break; 396 default: 397 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 398 TX_NOTIFY_GENERALERROR; 399 break; 400 } 401 402 return n; 403 } 404 405 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 406 int bidx, int forced_cleanup) 407 { 408 if (q->card->options.cq != QETH_CQ_ENABLED) 409 return; 410 411 if (q->bufs[bidx]->next_pending != NULL) { 412 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 413 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 414 415 while (c) { 416 if (forced_cleanup || 417 atomic_read(&c->state) == 418 QETH_QDIO_BUF_HANDLED_DELAYED) { 419 struct qeth_qdio_out_buffer *f = c; 420 QETH_CARD_TEXT(f->q->card, 5, "fp"); 421 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 422 /* release here to avoid interleaving between 423 outbound tasklet and inbound tasklet 424 regarding notifications and lifecycle */ 425 qeth_release_skbs(c); 426 427 c = f->next_pending; 428 WARN_ON_ONCE(head->next_pending != f); 429 head->next_pending = c; 430 kmem_cache_free(qeth_qdio_outbuf_cache, f); 431 } else { 432 head = c; 433 c = c->next_pending; 434 } 435 436 } 437 } 438 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 439 QETH_QDIO_BUF_HANDLED_DELAYED)) { 440 /* for recovery situations */ 441 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 442 qeth_init_qdio_out_buf(q, bidx); 443 QETH_CARD_TEXT(q->card, 2, "clprecov"); 444 } 445 } 446 447 448 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 449 unsigned long phys_aob_addr) { 450 struct qaob *aob; 451 struct qeth_qdio_out_buffer *buffer; 452 enum iucv_tx_notify notification; 453 454 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 455 QETH_CARD_TEXT(card, 5, "haob"); 456 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 457 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 458 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 459 460 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 461 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 462 notification = TX_NOTIFY_OK; 463 } else { 464 WARN_ON_ONCE(atomic_read(&buffer->state) != 465 QETH_QDIO_BUF_PENDING); 466 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 467 notification = TX_NOTIFY_DELAYED_OK; 468 } 469 470 if (aob->aorc != 0) { 471 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 472 notification = qeth_compute_cq_notification(aob->aorc, 1); 473 } 474 qeth_notify_skbs(buffer->q, buffer, notification); 475 476 buffer->aob = NULL; 477 qeth_clear_output_buffer(buffer->q, buffer, 478 QETH_QDIO_BUF_HANDLED_DELAYED); 479 480 /* from here on: do not touch buffer anymore */ 481 qdio_release_aob(aob); 482 } 483 484 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 485 { 486 return card->options.cq == QETH_CQ_ENABLED && 487 card->qdio.c_q != NULL && 488 queue != 0 && 489 queue == card->qdio.no_in_queues - 1; 490 } 491 492 493 static int qeth_issue_next_read(struct qeth_card *card) 494 { 495 int rc; 496 struct qeth_cmd_buffer *iob; 497 498 QETH_CARD_TEXT(card, 5, "issnxrd"); 499 if (card->read.state != CH_STATE_UP) 500 return -EIO; 501 iob = qeth_get_buffer(&card->read); 502 if (!iob) { 503 dev_warn(&card->gdev->dev, "The qeth device driver " 504 "failed to recover an error on the device\n"); 505 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 506 "available\n", dev_name(&card->gdev->dev)); 507 return -ENOMEM; 508 } 509 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 510 QETH_CARD_TEXT(card, 6, "noirqpnd"); 511 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 512 (addr_t) iob, 0, 0); 513 if (rc) { 514 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 515 "rc=%i\n", dev_name(&card->gdev->dev), rc); 516 atomic_set(&card->read.irq_pending, 0); 517 card->read_or_write_problem = 1; 518 qeth_schedule_recovery(card); 519 wake_up(&card->wait_q); 520 } 521 return rc; 522 } 523 524 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 525 { 526 struct qeth_reply *reply; 527 528 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 529 if (reply) { 530 atomic_set(&reply->refcnt, 1); 531 atomic_set(&reply->received, 0); 532 reply->card = card; 533 } 534 return reply; 535 } 536 537 static void qeth_get_reply(struct qeth_reply *reply) 538 { 539 WARN_ON(atomic_read(&reply->refcnt) <= 0); 540 atomic_inc(&reply->refcnt); 541 } 542 543 static void qeth_put_reply(struct qeth_reply *reply) 544 { 545 WARN_ON(atomic_read(&reply->refcnt) <= 0); 546 if (atomic_dec_and_test(&reply->refcnt)) 547 kfree(reply); 548 } 549 550 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 551 struct qeth_card *card) 552 { 553 char *ipa_name; 554 int com = cmd->hdr.command; 555 ipa_name = qeth_get_ipa_cmd_name(com); 556 if (rc) 557 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 558 "x%X \"%s\"\n", 559 ipa_name, com, dev_name(&card->gdev->dev), 560 QETH_CARD_IFNAME(card), rc, 561 qeth_get_ipa_msg(rc)); 562 else 563 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 564 ipa_name, com, dev_name(&card->gdev->dev), 565 QETH_CARD_IFNAME(card)); 566 } 567 568 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 569 struct qeth_cmd_buffer *iob) 570 { 571 struct qeth_ipa_cmd *cmd = NULL; 572 573 QETH_CARD_TEXT(card, 5, "chkipad"); 574 if (IS_IPA(iob->data)) { 575 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 576 if (IS_IPA_REPLY(cmd)) { 577 if (cmd->hdr.command != IPA_CMD_SETCCID && 578 cmd->hdr.command != IPA_CMD_DELCCID && 579 cmd->hdr.command != IPA_CMD_MODCCID && 580 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 581 qeth_issue_ipa_msg(cmd, 582 cmd->hdr.return_code, card); 583 return cmd; 584 } else { 585 switch (cmd->hdr.command) { 586 case IPA_CMD_STOPLAN: 587 if (cmd->hdr.return_code == 588 IPA_RC_VEPA_TO_VEB_TRANSITION) { 589 dev_err(&card->gdev->dev, 590 "Interface %s is down because the " 591 "adjacent port is no longer in " 592 "reflective relay mode\n", 593 QETH_CARD_IFNAME(card)); 594 qeth_close_dev(card); 595 } else { 596 dev_warn(&card->gdev->dev, 597 "The link for interface %s on CHPID" 598 " 0x%X failed\n", 599 QETH_CARD_IFNAME(card), 600 card->info.chpid); 601 qeth_issue_ipa_msg(cmd, 602 cmd->hdr.return_code, card); 603 } 604 card->lan_online = 0; 605 if (card->dev && netif_carrier_ok(card->dev)) 606 netif_carrier_off(card->dev); 607 return NULL; 608 case IPA_CMD_STARTLAN: 609 dev_info(&card->gdev->dev, 610 "The link for %s on CHPID 0x%X has" 611 " been restored\n", 612 QETH_CARD_IFNAME(card), 613 card->info.chpid); 614 netif_carrier_on(card->dev); 615 card->lan_online = 1; 616 if (card->info.hwtrap) 617 card->info.hwtrap = 2; 618 qeth_schedule_recovery(card); 619 return NULL; 620 case IPA_CMD_SETBRIDGEPORT: 621 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 622 if (card->discipline->control_event_handler 623 (card, cmd)) 624 return cmd; 625 else 626 return NULL; 627 case IPA_CMD_MODCCID: 628 return cmd; 629 case IPA_CMD_REGISTER_LOCAL_ADDR: 630 QETH_CARD_TEXT(card, 3, "irla"); 631 break; 632 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 633 QETH_CARD_TEXT(card, 3, "urla"); 634 break; 635 default: 636 QETH_DBF_MESSAGE(2, "Received data is IPA " 637 "but not a reply!\n"); 638 break; 639 } 640 } 641 } 642 return cmd; 643 } 644 645 void qeth_clear_ipacmd_list(struct qeth_card *card) 646 { 647 struct qeth_reply *reply, *r; 648 unsigned long flags; 649 650 QETH_CARD_TEXT(card, 4, "clipalst"); 651 652 spin_lock_irqsave(&card->lock, flags); 653 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 654 qeth_get_reply(reply); 655 reply->rc = -EIO; 656 atomic_inc(&reply->received); 657 list_del_init(&reply->list); 658 wake_up(&reply->wait_q); 659 qeth_put_reply(reply); 660 } 661 spin_unlock_irqrestore(&card->lock, flags); 662 atomic_set(&card->write.irq_pending, 0); 663 } 664 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 665 666 static int qeth_check_idx_response(struct qeth_card *card, 667 unsigned char *buffer) 668 { 669 if (!buffer) 670 return 0; 671 672 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 673 if ((buffer[2] & 0xc0) == 0xc0) { 674 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 675 "with cause code 0x%02x%s\n", 676 buffer[4], 677 ((buffer[4] == 0x22) ? 678 " -- try another portname" : "")); 679 QETH_CARD_TEXT(card, 2, "ckidxres"); 680 QETH_CARD_TEXT(card, 2, " idxterm"); 681 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 682 if (buffer[4] == 0xf6) { 683 dev_err(&card->gdev->dev, 684 "The qeth device is not configured " 685 "for the OSI layer required by z/VM\n"); 686 return -EPERM; 687 } 688 return -EIO; 689 } 690 return 0; 691 } 692 693 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 694 __u32 len) 695 { 696 struct qeth_card *card; 697 698 card = CARD_FROM_CDEV(channel->ccwdev); 699 QETH_CARD_TEXT(card, 4, "setupccw"); 700 if (channel == &card->read) 701 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 702 else 703 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 704 channel->ccw.count = len; 705 channel->ccw.cda = (__u32) __pa(iob); 706 } 707 708 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 709 { 710 __u8 index; 711 712 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 713 index = channel->io_buf_no; 714 do { 715 if (channel->iob[index].state == BUF_STATE_FREE) { 716 channel->iob[index].state = BUF_STATE_LOCKED; 717 channel->io_buf_no = (channel->io_buf_no + 1) % 718 QETH_CMD_BUFFER_NO; 719 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 720 return channel->iob + index; 721 } 722 index = (index + 1) % QETH_CMD_BUFFER_NO; 723 } while (index != channel->io_buf_no); 724 725 return NULL; 726 } 727 728 void qeth_release_buffer(struct qeth_channel *channel, 729 struct qeth_cmd_buffer *iob) 730 { 731 unsigned long flags; 732 733 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 734 spin_lock_irqsave(&channel->iob_lock, flags); 735 memset(iob->data, 0, QETH_BUFSIZE); 736 iob->state = BUF_STATE_FREE; 737 iob->callback = qeth_send_control_data_cb; 738 iob->rc = 0; 739 spin_unlock_irqrestore(&channel->iob_lock, flags); 740 wake_up(&channel->wait_q); 741 } 742 EXPORT_SYMBOL_GPL(qeth_release_buffer); 743 744 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 745 { 746 struct qeth_cmd_buffer *buffer = NULL; 747 unsigned long flags; 748 749 spin_lock_irqsave(&channel->iob_lock, flags); 750 buffer = __qeth_get_buffer(channel); 751 spin_unlock_irqrestore(&channel->iob_lock, flags); 752 return buffer; 753 } 754 755 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 756 { 757 struct qeth_cmd_buffer *buffer; 758 wait_event(channel->wait_q, 759 ((buffer = qeth_get_buffer(channel)) != NULL)); 760 return buffer; 761 } 762 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 763 764 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 765 { 766 int cnt; 767 768 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 769 qeth_release_buffer(channel, &channel->iob[cnt]); 770 channel->buf_no = 0; 771 channel->io_buf_no = 0; 772 } 773 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 774 775 static void qeth_send_control_data_cb(struct qeth_channel *channel, 776 struct qeth_cmd_buffer *iob) 777 { 778 struct qeth_card *card; 779 struct qeth_reply *reply, *r; 780 struct qeth_ipa_cmd *cmd; 781 unsigned long flags; 782 int keep_reply; 783 int rc = 0; 784 785 card = CARD_FROM_CDEV(channel->ccwdev); 786 QETH_CARD_TEXT(card, 4, "sndctlcb"); 787 rc = qeth_check_idx_response(card, iob->data); 788 switch (rc) { 789 case 0: 790 break; 791 case -EIO: 792 qeth_clear_ipacmd_list(card); 793 qeth_schedule_recovery(card); 794 /* fall through */ 795 default: 796 goto out; 797 } 798 799 cmd = qeth_check_ipa_data(card, iob); 800 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 801 goto out; 802 /*in case of OSN : check if cmd is set */ 803 if (card->info.type == QETH_CARD_TYPE_OSN && 804 cmd && 805 cmd->hdr.command != IPA_CMD_STARTLAN && 806 card->osn_info.assist_cb != NULL) { 807 card->osn_info.assist_cb(card->dev, cmd); 808 goto out; 809 } 810 811 spin_lock_irqsave(&card->lock, flags); 812 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 813 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 814 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 815 qeth_get_reply(reply); 816 list_del_init(&reply->list); 817 spin_unlock_irqrestore(&card->lock, flags); 818 keep_reply = 0; 819 if (reply->callback != NULL) { 820 if (cmd) { 821 reply->offset = (__u16)((char *)cmd - 822 (char *)iob->data); 823 keep_reply = reply->callback(card, 824 reply, 825 (unsigned long)cmd); 826 } else 827 keep_reply = reply->callback(card, 828 reply, 829 (unsigned long)iob); 830 } 831 if (cmd) 832 reply->rc = (u16) cmd->hdr.return_code; 833 else if (iob->rc) 834 reply->rc = iob->rc; 835 if (keep_reply) { 836 spin_lock_irqsave(&card->lock, flags); 837 list_add_tail(&reply->list, 838 &card->cmd_waiter_list); 839 spin_unlock_irqrestore(&card->lock, flags); 840 } else { 841 atomic_inc(&reply->received); 842 wake_up(&reply->wait_q); 843 } 844 qeth_put_reply(reply); 845 goto out; 846 } 847 } 848 spin_unlock_irqrestore(&card->lock, flags); 849 out: 850 memcpy(&card->seqno.pdu_hdr_ack, 851 QETH_PDU_HEADER_SEQ_NO(iob->data), 852 QETH_SEQ_NO_LENGTH); 853 qeth_release_buffer(channel, iob); 854 } 855 856 static int qeth_setup_channel(struct qeth_channel *channel) 857 { 858 int cnt; 859 860 QETH_DBF_TEXT(SETUP, 2, "setupch"); 861 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 862 channel->iob[cnt].data = 863 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 864 if (channel->iob[cnt].data == NULL) 865 break; 866 channel->iob[cnt].state = BUF_STATE_FREE; 867 channel->iob[cnt].channel = channel; 868 channel->iob[cnt].callback = qeth_send_control_data_cb; 869 channel->iob[cnt].rc = 0; 870 } 871 if (cnt < QETH_CMD_BUFFER_NO) { 872 while (cnt-- > 0) 873 kfree(channel->iob[cnt].data); 874 return -ENOMEM; 875 } 876 channel->buf_no = 0; 877 channel->io_buf_no = 0; 878 atomic_set(&channel->irq_pending, 0); 879 spin_lock_init(&channel->iob_lock); 880 881 init_waitqueue_head(&channel->wait_q); 882 return 0; 883 } 884 885 static int qeth_set_thread_start_bit(struct qeth_card *card, 886 unsigned long thread) 887 { 888 unsigned long flags; 889 890 spin_lock_irqsave(&card->thread_mask_lock, flags); 891 if (!(card->thread_allowed_mask & thread) || 892 (card->thread_start_mask & thread)) { 893 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 894 return -EPERM; 895 } 896 card->thread_start_mask |= thread; 897 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 898 return 0; 899 } 900 901 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 902 { 903 unsigned long flags; 904 905 spin_lock_irqsave(&card->thread_mask_lock, flags); 906 card->thread_start_mask &= ~thread; 907 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 908 wake_up(&card->wait_q); 909 } 910 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 911 912 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 913 { 914 unsigned long flags; 915 916 spin_lock_irqsave(&card->thread_mask_lock, flags); 917 card->thread_running_mask &= ~thread; 918 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 919 wake_up(&card->wait_q); 920 } 921 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 922 923 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 924 { 925 unsigned long flags; 926 int rc = 0; 927 928 spin_lock_irqsave(&card->thread_mask_lock, flags); 929 if (card->thread_start_mask & thread) { 930 if ((card->thread_allowed_mask & thread) && 931 !(card->thread_running_mask & thread)) { 932 rc = 1; 933 card->thread_start_mask &= ~thread; 934 card->thread_running_mask |= thread; 935 } else 936 rc = -EPERM; 937 } 938 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 939 return rc; 940 } 941 942 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 943 { 944 int rc = 0; 945 946 wait_event(card->wait_q, 947 (rc = __qeth_do_run_thread(card, thread)) >= 0); 948 return rc; 949 } 950 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 951 952 void qeth_schedule_recovery(struct qeth_card *card) 953 { 954 QETH_CARD_TEXT(card, 2, "startrec"); 955 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 956 schedule_work(&card->kernel_thread_starter); 957 } 958 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 959 960 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 961 { 962 int dstat, cstat; 963 char *sense; 964 struct qeth_card *card; 965 966 sense = (char *) irb->ecw; 967 cstat = irb->scsw.cmd.cstat; 968 dstat = irb->scsw.cmd.dstat; 969 card = CARD_FROM_CDEV(cdev); 970 971 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 972 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 973 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 974 QETH_CARD_TEXT(card, 2, "CGENCHK"); 975 dev_warn(&cdev->dev, "The qeth device driver " 976 "failed to recover an error on the device\n"); 977 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 978 dev_name(&cdev->dev), dstat, cstat); 979 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 980 16, 1, irb, 64, 1); 981 return 1; 982 } 983 984 if (dstat & DEV_STAT_UNIT_CHECK) { 985 if (sense[SENSE_RESETTING_EVENT_BYTE] & 986 SENSE_RESETTING_EVENT_FLAG) { 987 QETH_CARD_TEXT(card, 2, "REVIND"); 988 return 1; 989 } 990 if (sense[SENSE_COMMAND_REJECT_BYTE] & 991 SENSE_COMMAND_REJECT_FLAG) { 992 QETH_CARD_TEXT(card, 2, "CMDREJi"); 993 return 1; 994 } 995 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 996 QETH_CARD_TEXT(card, 2, "AFFE"); 997 return 1; 998 } 999 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1000 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1001 return 0; 1002 } 1003 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1004 return 1; 1005 } 1006 return 0; 1007 } 1008 1009 static long __qeth_check_irb_error(struct ccw_device *cdev, 1010 unsigned long intparm, struct irb *irb) 1011 { 1012 struct qeth_card *card; 1013 1014 card = CARD_FROM_CDEV(cdev); 1015 1016 if (!IS_ERR(irb)) 1017 return 0; 1018 1019 switch (PTR_ERR(irb)) { 1020 case -EIO: 1021 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1022 dev_name(&cdev->dev)); 1023 QETH_CARD_TEXT(card, 2, "ckirberr"); 1024 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1025 break; 1026 case -ETIMEDOUT: 1027 dev_warn(&cdev->dev, "A hardware operation timed out" 1028 " on the device\n"); 1029 QETH_CARD_TEXT(card, 2, "ckirberr"); 1030 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1031 if (intparm == QETH_RCD_PARM) { 1032 if (card && (card->data.ccwdev == cdev)) { 1033 card->data.state = CH_STATE_DOWN; 1034 wake_up(&card->wait_q); 1035 } 1036 } 1037 break; 1038 default: 1039 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1040 dev_name(&cdev->dev), PTR_ERR(irb)); 1041 QETH_CARD_TEXT(card, 2, "ckirberr"); 1042 QETH_CARD_TEXT(card, 2, " rc???"); 1043 } 1044 return PTR_ERR(irb); 1045 } 1046 1047 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1048 struct irb *irb) 1049 { 1050 int rc; 1051 int cstat, dstat; 1052 struct qeth_cmd_buffer *buffer; 1053 struct qeth_channel *channel; 1054 struct qeth_card *card; 1055 struct qeth_cmd_buffer *iob; 1056 __u8 index; 1057 1058 if (__qeth_check_irb_error(cdev, intparm, irb)) 1059 return; 1060 cstat = irb->scsw.cmd.cstat; 1061 dstat = irb->scsw.cmd.dstat; 1062 1063 card = CARD_FROM_CDEV(cdev); 1064 if (!card) 1065 return; 1066 1067 QETH_CARD_TEXT(card, 5, "irq"); 1068 1069 if (card->read.ccwdev == cdev) { 1070 channel = &card->read; 1071 QETH_CARD_TEXT(card, 5, "read"); 1072 } else if (card->write.ccwdev == cdev) { 1073 channel = &card->write; 1074 QETH_CARD_TEXT(card, 5, "write"); 1075 } else { 1076 channel = &card->data; 1077 QETH_CARD_TEXT(card, 5, "data"); 1078 } 1079 atomic_set(&channel->irq_pending, 0); 1080 1081 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1082 channel->state = CH_STATE_STOPPED; 1083 1084 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1085 channel->state = CH_STATE_HALTED; 1086 1087 /*let's wake up immediately on data channel*/ 1088 if ((channel == &card->data) && (intparm != 0) && 1089 (intparm != QETH_RCD_PARM)) 1090 goto out; 1091 1092 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1093 QETH_CARD_TEXT(card, 6, "clrchpar"); 1094 /* we don't have to handle this further */ 1095 intparm = 0; 1096 } 1097 if (intparm == QETH_HALT_CHANNEL_PARM) { 1098 QETH_CARD_TEXT(card, 6, "hltchpar"); 1099 /* we don't have to handle this further */ 1100 intparm = 0; 1101 } 1102 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1103 (dstat & DEV_STAT_UNIT_CHECK) || 1104 (cstat)) { 1105 if (irb->esw.esw0.erw.cons) { 1106 dev_warn(&channel->ccwdev->dev, 1107 "The qeth device driver failed to recover " 1108 "an error on the device\n"); 1109 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1110 "0x%X dstat 0x%X\n", 1111 dev_name(&channel->ccwdev->dev), cstat, dstat); 1112 print_hex_dump(KERN_WARNING, "qeth: irb ", 1113 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1114 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1115 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1116 } 1117 if (intparm == QETH_RCD_PARM) { 1118 channel->state = CH_STATE_DOWN; 1119 goto out; 1120 } 1121 rc = qeth_get_problem(cdev, irb); 1122 if (rc) { 1123 qeth_clear_ipacmd_list(card); 1124 qeth_schedule_recovery(card); 1125 goto out; 1126 } 1127 } 1128 1129 if (intparm == QETH_RCD_PARM) { 1130 channel->state = CH_STATE_RCD_DONE; 1131 goto out; 1132 } 1133 if (intparm) { 1134 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1135 buffer->state = BUF_STATE_PROCESSED; 1136 } 1137 if (channel == &card->data) 1138 return; 1139 if (channel == &card->read && 1140 channel->state == CH_STATE_UP) 1141 qeth_issue_next_read(card); 1142 1143 iob = channel->iob; 1144 index = channel->buf_no; 1145 while (iob[index].state == BUF_STATE_PROCESSED) { 1146 if (iob[index].callback != NULL) 1147 iob[index].callback(channel, iob + index); 1148 1149 index = (index + 1) % QETH_CMD_BUFFER_NO; 1150 } 1151 channel->buf_no = index; 1152 out: 1153 wake_up(&card->wait_q); 1154 return; 1155 } 1156 1157 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1158 struct qeth_qdio_out_buffer *buf, 1159 enum iucv_tx_notify notification) 1160 { 1161 struct sk_buff *skb; 1162 1163 if (skb_queue_empty(&buf->skb_list)) 1164 goto out; 1165 skb = skb_peek(&buf->skb_list); 1166 while (skb) { 1167 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1168 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1169 if (skb->protocol == ETH_P_AF_IUCV) { 1170 if (skb->sk) { 1171 struct iucv_sock *iucv = iucv_sk(skb->sk); 1172 iucv->sk_txnotify(skb, notification); 1173 } 1174 } 1175 if (skb_queue_is_last(&buf->skb_list, skb)) 1176 skb = NULL; 1177 else 1178 skb = skb_queue_next(&buf->skb_list, skb); 1179 } 1180 out: 1181 return; 1182 } 1183 1184 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1185 { 1186 struct sk_buff *skb; 1187 struct iucv_sock *iucv; 1188 int notify_general_error = 0; 1189 1190 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1191 notify_general_error = 1; 1192 1193 /* release may never happen from within CQ tasklet scope */ 1194 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1195 1196 skb = skb_dequeue(&buf->skb_list); 1197 while (skb) { 1198 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1199 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1200 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1201 if (skb->sk) { 1202 iucv = iucv_sk(skb->sk); 1203 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1204 } 1205 } 1206 atomic_dec(&skb->users); 1207 dev_kfree_skb_any(skb); 1208 skb = skb_dequeue(&buf->skb_list); 1209 } 1210 } 1211 1212 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1213 struct qeth_qdio_out_buffer *buf, 1214 enum qeth_qdio_buffer_states newbufstate) 1215 { 1216 int i; 1217 1218 /* is PCI flag set on buffer? */ 1219 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1220 atomic_dec(&queue->set_pci_flags_count); 1221 1222 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1223 qeth_release_skbs(buf); 1224 } 1225 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1226 if (buf->buffer->element[i].addr && buf->is_header[i]) 1227 kmem_cache_free(qeth_core_header_cache, 1228 buf->buffer->element[i].addr); 1229 buf->is_header[i] = 0; 1230 buf->buffer->element[i].length = 0; 1231 buf->buffer->element[i].addr = NULL; 1232 buf->buffer->element[i].eflags = 0; 1233 buf->buffer->element[i].sflags = 0; 1234 } 1235 buf->buffer->element[15].eflags = 0; 1236 buf->buffer->element[15].sflags = 0; 1237 buf->next_element_to_fill = 0; 1238 atomic_set(&buf->state, newbufstate); 1239 } 1240 1241 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1242 { 1243 int j; 1244 1245 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1246 if (!q->bufs[j]) 1247 continue; 1248 qeth_cleanup_handled_pending(q, j, 1); 1249 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1250 if (free) { 1251 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1252 q->bufs[j] = NULL; 1253 } 1254 } 1255 } 1256 1257 void qeth_clear_qdio_buffers(struct qeth_card *card) 1258 { 1259 int i; 1260 1261 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1262 /* clear outbound buffers to free skbs */ 1263 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1264 if (card->qdio.out_qs[i]) { 1265 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1266 } 1267 } 1268 } 1269 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1270 1271 static void qeth_free_buffer_pool(struct qeth_card *card) 1272 { 1273 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1274 int i = 0; 1275 list_for_each_entry_safe(pool_entry, tmp, 1276 &card->qdio.init_pool.entry_list, init_list){ 1277 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1278 free_page((unsigned long)pool_entry->elements[i]); 1279 list_del(&pool_entry->init_list); 1280 kfree(pool_entry); 1281 } 1282 } 1283 1284 static void qeth_free_qdio_buffers(struct qeth_card *card) 1285 { 1286 int i, j; 1287 1288 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1289 QETH_QDIO_UNINITIALIZED) 1290 return; 1291 1292 qeth_free_cq(card); 1293 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1294 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1295 if (card->qdio.in_q->bufs[j].rx_skb) 1296 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1297 } 1298 kfree(card->qdio.in_q); 1299 card->qdio.in_q = NULL; 1300 /* inbound buffer pool */ 1301 qeth_free_buffer_pool(card); 1302 /* free outbound qdio_qs */ 1303 if (card->qdio.out_qs) { 1304 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1305 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1306 kfree(card->qdio.out_qs[i]); 1307 } 1308 kfree(card->qdio.out_qs); 1309 card->qdio.out_qs = NULL; 1310 } 1311 } 1312 1313 static void qeth_clean_channel(struct qeth_channel *channel) 1314 { 1315 int cnt; 1316 1317 QETH_DBF_TEXT(SETUP, 2, "freech"); 1318 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1319 kfree(channel->iob[cnt].data); 1320 } 1321 1322 static void qeth_set_single_write_queues(struct qeth_card *card) 1323 { 1324 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1325 (card->qdio.no_out_queues == 4)) 1326 qeth_free_qdio_buffers(card); 1327 1328 card->qdio.no_out_queues = 1; 1329 if (card->qdio.default_out_queue != 0) 1330 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1331 1332 card->qdio.default_out_queue = 0; 1333 } 1334 1335 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1336 { 1337 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1338 (card->qdio.no_out_queues == 1)) { 1339 qeth_free_qdio_buffers(card); 1340 card->qdio.default_out_queue = 2; 1341 } 1342 card->qdio.no_out_queues = 4; 1343 } 1344 1345 static void qeth_update_from_chp_desc(struct qeth_card *card) 1346 { 1347 struct ccw_device *ccwdev; 1348 struct channel_path_desc *chp_dsc; 1349 1350 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1351 1352 ccwdev = card->data.ccwdev; 1353 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1354 if (!chp_dsc) 1355 goto out; 1356 1357 card->info.func_level = 0x4100 + chp_dsc->desc; 1358 if (card->info.type == QETH_CARD_TYPE_IQD) 1359 goto out; 1360 1361 /* CHPP field bit 6 == 1 -> single queue */ 1362 if ((chp_dsc->chpp & 0x02) == 0x02) 1363 qeth_set_single_write_queues(card); 1364 else 1365 qeth_set_multiple_write_queues(card); 1366 out: 1367 kfree(chp_dsc); 1368 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1369 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1370 } 1371 1372 static void qeth_init_qdio_info(struct qeth_card *card) 1373 { 1374 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1375 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1376 /* inbound */ 1377 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1378 if (card->info.type == QETH_CARD_TYPE_IQD) 1379 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1380 else 1381 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1382 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1383 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1384 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1385 } 1386 1387 static void qeth_set_intial_options(struct qeth_card *card) 1388 { 1389 card->options.route4.type = NO_ROUTER; 1390 card->options.route6.type = NO_ROUTER; 1391 card->options.fake_broadcast = 0; 1392 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1393 card->options.performance_stats = 0; 1394 card->options.rx_sg_cb = QETH_RX_SG_CB; 1395 card->options.isolation = ISOLATION_MODE_NONE; 1396 card->options.cq = QETH_CQ_DISABLED; 1397 } 1398 1399 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1400 { 1401 unsigned long flags; 1402 int rc = 0; 1403 1404 spin_lock_irqsave(&card->thread_mask_lock, flags); 1405 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1406 (u8) card->thread_start_mask, 1407 (u8) card->thread_allowed_mask, 1408 (u8) card->thread_running_mask); 1409 rc = (card->thread_start_mask & thread); 1410 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1411 return rc; 1412 } 1413 1414 static void qeth_start_kernel_thread(struct work_struct *work) 1415 { 1416 struct task_struct *ts; 1417 struct qeth_card *card = container_of(work, struct qeth_card, 1418 kernel_thread_starter); 1419 QETH_CARD_TEXT(card , 2, "strthrd"); 1420 1421 if (card->read.state != CH_STATE_UP && 1422 card->write.state != CH_STATE_UP) 1423 return; 1424 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1425 ts = kthread_run(card->discipline->recover, (void *)card, 1426 "qeth_recover"); 1427 if (IS_ERR(ts)) { 1428 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1429 qeth_clear_thread_running_bit(card, 1430 QETH_RECOVER_THREAD); 1431 } 1432 } 1433 } 1434 1435 static int qeth_setup_card(struct qeth_card *card) 1436 { 1437 1438 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1439 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1440 1441 card->read.state = CH_STATE_DOWN; 1442 card->write.state = CH_STATE_DOWN; 1443 card->data.state = CH_STATE_DOWN; 1444 card->state = CARD_STATE_DOWN; 1445 card->lan_online = 0; 1446 card->read_or_write_problem = 0; 1447 card->dev = NULL; 1448 spin_lock_init(&card->vlanlock); 1449 spin_lock_init(&card->mclock); 1450 spin_lock_init(&card->lock); 1451 spin_lock_init(&card->ip_lock); 1452 spin_lock_init(&card->thread_mask_lock); 1453 mutex_init(&card->conf_mutex); 1454 mutex_init(&card->discipline_mutex); 1455 card->thread_start_mask = 0; 1456 card->thread_allowed_mask = 0; 1457 card->thread_running_mask = 0; 1458 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1459 INIT_LIST_HEAD(&card->ip_list); 1460 INIT_LIST_HEAD(card->ip_tbd_list); 1461 INIT_LIST_HEAD(&card->cmd_waiter_list); 1462 init_waitqueue_head(&card->wait_q); 1463 /* initial options */ 1464 qeth_set_intial_options(card); 1465 /* IP address takeover */ 1466 INIT_LIST_HEAD(&card->ipato.entries); 1467 card->ipato.enabled = 0; 1468 card->ipato.invert4 = 0; 1469 card->ipato.invert6 = 0; 1470 /* init QDIO stuff */ 1471 qeth_init_qdio_info(card); 1472 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1473 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1474 return 0; 1475 } 1476 1477 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1478 { 1479 struct qeth_card *card = container_of(slr, struct qeth_card, 1480 qeth_service_level); 1481 if (card->info.mcl_level[0]) 1482 seq_printf(m, "qeth: %s firmware level %s\n", 1483 CARD_BUS_ID(card), card->info.mcl_level); 1484 } 1485 1486 static struct qeth_card *qeth_alloc_card(void) 1487 { 1488 struct qeth_card *card; 1489 1490 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1491 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1492 if (!card) 1493 goto out; 1494 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1495 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1496 if (!card->ip_tbd_list) { 1497 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1498 goto out_card; 1499 } 1500 if (qeth_setup_channel(&card->read)) 1501 goto out_ip; 1502 if (qeth_setup_channel(&card->write)) 1503 goto out_channel; 1504 card->options.layer2 = -1; 1505 card->qeth_service_level.seq_print = qeth_core_sl_print; 1506 register_service_level(&card->qeth_service_level); 1507 return card; 1508 1509 out_channel: 1510 qeth_clean_channel(&card->read); 1511 out_ip: 1512 kfree(card->ip_tbd_list); 1513 out_card: 1514 kfree(card); 1515 out: 1516 return NULL; 1517 } 1518 1519 static int qeth_determine_card_type(struct qeth_card *card) 1520 { 1521 int i = 0; 1522 1523 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1524 1525 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1526 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1527 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1528 if ((CARD_RDEV(card)->id.dev_type == 1529 known_devices[i][QETH_DEV_TYPE_IND]) && 1530 (CARD_RDEV(card)->id.dev_model == 1531 known_devices[i][QETH_DEV_MODEL_IND])) { 1532 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1533 card->qdio.no_out_queues = 1534 known_devices[i][QETH_QUEUE_NO_IND]; 1535 card->qdio.no_in_queues = 1; 1536 card->info.is_multicast_different = 1537 known_devices[i][QETH_MULTICAST_IND]; 1538 qeth_update_from_chp_desc(card); 1539 return 0; 1540 } 1541 i++; 1542 } 1543 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1544 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1545 "unknown type\n"); 1546 return -ENOENT; 1547 } 1548 1549 static int qeth_clear_channel(struct qeth_channel *channel) 1550 { 1551 unsigned long flags; 1552 struct qeth_card *card; 1553 int rc; 1554 1555 card = CARD_FROM_CDEV(channel->ccwdev); 1556 QETH_CARD_TEXT(card, 3, "clearch"); 1557 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1558 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1559 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1560 1561 if (rc) 1562 return rc; 1563 rc = wait_event_interruptible_timeout(card->wait_q, 1564 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1565 if (rc == -ERESTARTSYS) 1566 return rc; 1567 if (channel->state != CH_STATE_STOPPED) 1568 return -ETIME; 1569 channel->state = CH_STATE_DOWN; 1570 return 0; 1571 } 1572 1573 static int qeth_halt_channel(struct qeth_channel *channel) 1574 { 1575 unsigned long flags; 1576 struct qeth_card *card; 1577 int rc; 1578 1579 card = CARD_FROM_CDEV(channel->ccwdev); 1580 QETH_CARD_TEXT(card, 3, "haltch"); 1581 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1582 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1583 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1584 1585 if (rc) 1586 return rc; 1587 rc = wait_event_interruptible_timeout(card->wait_q, 1588 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1589 if (rc == -ERESTARTSYS) 1590 return rc; 1591 if (channel->state != CH_STATE_HALTED) 1592 return -ETIME; 1593 return 0; 1594 } 1595 1596 static int qeth_halt_channels(struct qeth_card *card) 1597 { 1598 int rc1 = 0, rc2 = 0, rc3 = 0; 1599 1600 QETH_CARD_TEXT(card, 3, "haltchs"); 1601 rc1 = qeth_halt_channel(&card->read); 1602 rc2 = qeth_halt_channel(&card->write); 1603 rc3 = qeth_halt_channel(&card->data); 1604 if (rc1) 1605 return rc1; 1606 if (rc2) 1607 return rc2; 1608 return rc3; 1609 } 1610 1611 static int qeth_clear_channels(struct qeth_card *card) 1612 { 1613 int rc1 = 0, rc2 = 0, rc3 = 0; 1614 1615 QETH_CARD_TEXT(card, 3, "clearchs"); 1616 rc1 = qeth_clear_channel(&card->read); 1617 rc2 = qeth_clear_channel(&card->write); 1618 rc3 = qeth_clear_channel(&card->data); 1619 if (rc1) 1620 return rc1; 1621 if (rc2) 1622 return rc2; 1623 return rc3; 1624 } 1625 1626 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1627 { 1628 int rc = 0; 1629 1630 QETH_CARD_TEXT(card, 3, "clhacrd"); 1631 1632 if (halt) 1633 rc = qeth_halt_channels(card); 1634 if (rc) 1635 return rc; 1636 return qeth_clear_channels(card); 1637 } 1638 1639 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1640 { 1641 int rc = 0; 1642 1643 QETH_CARD_TEXT(card, 3, "qdioclr"); 1644 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1645 QETH_QDIO_CLEANING)) { 1646 case QETH_QDIO_ESTABLISHED: 1647 if (card->info.type == QETH_CARD_TYPE_IQD) 1648 rc = qdio_shutdown(CARD_DDEV(card), 1649 QDIO_FLAG_CLEANUP_USING_HALT); 1650 else 1651 rc = qdio_shutdown(CARD_DDEV(card), 1652 QDIO_FLAG_CLEANUP_USING_CLEAR); 1653 if (rc) 1654 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1655 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1656 break; 1657 case QETH_QDIO_CLEANING: 1658 return rc; 1659 default: 1660 break; 1661 } 1662 rc = qeth_clear_halt_card(card, use_halt); 1663 if (rc) 1664 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1665 card->state = CARD_STATE_DOWN; 1666 return rc; 1667 } 1668 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1669 1670 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1671 int *length) 1672 { 1673 struct ciw *ciw; 1674 char *rcd_buf; 1675 int ret; 1676 struct qeth_channel *channel = &card->data; 1677 unsigned long flags; 1678 1679 /* 1680 * scan for RCD command in extended SenseID data 1681 */ 1682 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1683 if (!ciw || ciw->cmd == 0) 1684 return -EOPNOTSUPP; 1685 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1686 if (!rcd_buf) 1687 return -ENOMEM; 1688 1689 channel->ccw.cmd_code = ciw->cmd; 1690 channel->ccw.cda = (__u32) __pa(rcd_buf); 1691 channel->ccw.count = ciw->count; 1692 channel->ccw.flags = CCW_FLAG_SLI; 1693 channel->state = CH_STATE_RCD; 1694 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1695 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1696 QETH_RCD_PARM, LPM_ANYPATH, 0, 1697 QETH_RCD_TIMEOUT); 1698 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1699 if (!ret) 1700 wait_event(card->wait_q, 1701 (channel->state == CH_STATE_RCD_DONE || 1702 channel->state == CH_STATE_DOWN)); 1703 if (channel->state == CH_STATE_DOWN) 1704 ret = -EIO; 1705 else 1706 channel->state = CH_STATE_DOWN; 1707 if (ret) { 1708 kfree(rcd_buf); 1709 *buffer = NULL; 1710 *length = 0; 1711 } else { 1712 *length = ciw->count; 1713 *buffer = rcd_buf; 1714 } 1715 return ret; 1716 } 1717 1718 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1719 { 1720 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1721 card->info.chpid = prcd[30]; 1722 card->info.unit_addr2 = prcd[31]; 1723 card->info.cula = prcd[63]; 1724 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1725 (prcd[0x11] == _ascebc['M'])); 1726 } 1727 1728 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1729 { 1730 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1731 1732 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1733 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1734 card->info.blkt.time_total = 0; 1735 card->info.blkt.inter_packet = 0; 1736 card->info.blkt.inter_packet_jumbo = 0; 1737 } else { 1738 card->info.blkt.time_total = 250; 1739 card->info.blkt.inter_packet = 5; 1740 card->info.blkt.inter_packet_jumbo = 15; 1741 } 1742 } 1743 1744 static void qeth_init_tokens(struct qeth_card *card) 1745 { 1746 card->token.issuer_rm_w = 0x00010103UL; 1747 card->token.cm_filter_w = 0x00010108UL; 1748 card->token.cm_connection_w = 0x0001010aUL; 1749 card->token.ulp_filter_w = 0x0001010bUL; 1750 card->token.ulp_connection_w = 0x0001010dUL; 1751 } 1752 1753 static void qeth_init_func_level(struct qeth_card *card) 1754 { 1755 switch (card->info.type) { 1756 case QETH_CARD_TYPE_IQD: 1757 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1758 break; 1759 case QETH_CARD_TYPE_OSD: 1760 case QETH_CARD_TYPE_OSN: 1761 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1762 break; 1763 default: 1764 break; 1765 } 1766 } 1767 1768 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1769 void (*idx_reply_cb)(struct qeth_channel *, 1770 struct qeth_cmd_buffer *)) 1771 { 1772 struct qeth_cmd_buffer *iob; 1773 unsigned long flags; 1774 int rc; 1775 struct qeth_card *card; 1776 1777 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1778 card = CARD_FROM_CDEV(channel->ccwdev); 1779 iob = qeth_get_buffer(channel); 1780 iob->callback = idx_reply_cb; 1781 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1782 channel->ccw.count = QETH_BUFSIZE; 1783 channel->ccw.cda = (__u32) __pa(iob->data); 1784 1785 wait_event(card->wait_q, 1786 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1787 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1788 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1789 rc = ccw_device_start(channel->ccwdev, 1790 &channel->ccw, (addr_t) iob, 0, 0); 1791 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1792 1793 if (rc) { 1794 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1795 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1796 atomic_set(&channel->irq_pending, 0); 1797 wake_up(&card->wait_q); 1798 return rc; 1799 } 1800 rc = wait_event_interruptible_timeout(card->wait_q, 1801 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1802 if (rc == -ERESTARTSYS) 1803 return rc; 1804 if (channel->state != CH_STATE_UP) { 1805 rc = -ETIME; 1806 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1807 qeth_clear_cmd_buffers(channel); 1808 } else 1809 rc = 0; 1810 return rc; 1811 } 1812 1813 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1814 void (*idx_reply_cb)(struct qeth_channel *, 1815 struct qeth_cmd_buffer *)) 1816 { 1817 struct qeth_card *card; 1818 struct qeth_cmd_buffer *iob; 1819 unsigned long flags; 1820 __u16 temp; 1821 __u8 tmp; 1822 int rc; 1823 struct ccw_dev_id temp_devid; 1824 1825 card = CARD_FROM_CDEV(channel->ccwdev); 1826 1827 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1828 1829 iob = qeth_get_buffer(channel); 1830 iob->callback = idx_reply_cb; 1831 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1832 channel->ccw.count = IDX_ACTIVATE_SIZE; 1833 channel->ccw.cda = (__u32) __pa(iob->data); 1834 if (channel == &card->write) { 1835 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1836 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1837 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1838 card->seqno.trans_hdr++; 1839 } else { 1840 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1841 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1842 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1843 } 1844 tmp = ((__u8)card->info.portno) | 0x80; 1845 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1846 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1847 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1848 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1849 &card->info.func_level, sizeof(__u16)); 1850 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1851 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1852 temp = (card->info.cula << 8) + card->info.unit_addr2; 1853 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1854 1855 wait_event(card->wait_q, 1856 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1857 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1858 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1859 rc = ccw_device_start(channel->ccwdev, 1860 &channel->ccw, (addr_t) iob, 0, 0); 1861 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1862 1863 if (rc) { 1864 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1865 rc); 1866 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1867 atomic_set(&channel->irq_pending, 0); 1868 wake_up(&card->wait_q); 1869 return rc; 1870 } 1871 rc = wait_event_interruptible_timeout(card->wait_q, 1872 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1873 if (rc == -ERESTARTSYS) 1874 return rc; 1875 if (channel->state != CH_STATE_ACTIVATING) { 1876 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1877 " failed to recover an error on the device\n"); 1878 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1879 dev_name(&channel->ccwdev->dev)); 1880 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1881 qeth_clear_cmd_buffers(channel); 1882 return -ETIME; 1883 } 1884 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1885 } 1886 1887 static int qeth_peer_func_level(int level) 1888 { 1889 if ((level & 0xff) == 8) 1890 return (level & 0xff) + 0x400; 1891 if (((level >> 8) & 3) == 1) 1892 return (level & 0xff) + 0x200; 1893 return level; 1894 } 1895 1896 static void qeth_idx_write_cb(struct qeth_channel *channel, 1897 struct qeth_cmd_buffer *iob) 1898 { 1899 struct qeth_card *card; 1900 __u16 temp; 1901 1902 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1903 1904 if (channel->state == CH_STATE_DOWN) { 1905 channel->state = CH_STATE_ACTIVATING; 1906 goto out; 1907 } 1908 card = CARD_FROM_CDEV(channel->ccwdev); 1909 1910 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1911 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1912 dev_err(&card->write.ccwdev->dev, 1913 "The adapter is used exclusively by another " 1914 "host\n"); 1915 else 1916 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1917 " negative reply\n", 1918 dev_name(&card->write.ccwdev->dev)); 1919 goto out; 1920 } 1921 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1922 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1923 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1924 "function level mismatch (sent: 0x%x, received: " 1925 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1926 card->info.func_level, temp); 1927 goto out; 1928 } 1929 channel->state = CH_STATE_UP; 1930 out: 1931 qeth_release_buffer(channel, iob); 1932 } 1933 1934 static void qeth_idx_read_cb(struct qeth_channel *channel, 1935 struct qeth_cmd_buffer *iob) 1936 { 1937 struct qeth_card *card; 1938 __u16 temp; 1939 1940 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1941 if (channel->state == CH_STATE_DOWN) { 1942 channel->state = CH_STATE_ACTIVATING; 1943 goto out; 1944 } 1945 1946 card = CARD_FROM_CDEV(channel->ccwdev); 1947 if (qeth_check_idx_response(card, iob->data)) 1948 goto out; 1949 1950 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1951 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1952 case QETH_IDX_ACT_ERR_EXCL: 1953 dev_err(&card->write.ccwdev->dev, 1954 "The adapter is used exclusively by another " 1955 "host\n"); 1956 break; 1957 case QETH_IDX_ACT_ERR_AUTH: 1958 case QETH_IDX_ACT_ERR_AUTH_USER: 1959 dev_err(&card->read.ccwdev->dev, 1960 "Setting the device online failed because of " 1961 "insufficient authorization\n"); 1962 break; 1963 default: 1964 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1965 " negative reply\n", 1966 dev_name(&card->read.ccwdev->dev)); 1967 } 1968 QETH_CARD_TEXT_(card, 2, "idxread%c", 1969 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1970 goto out; 1971 } 1972 1973 /** 1974 * * temporary fix for microcode bug 1975 * * to revert it,replace OR by AND 1976 * */ 1977 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1978 (card->info.type == QETH_CARD_TYPE_OSD)) 1979 card->info.portname_required = 1; 1980 1981 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1982 if (temp != qeth_peer_func_level(card->info.func_level)) { 1983 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1984 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1985 dev_name(&card->read.ccwdev->dev), 1986 card->info.func_level, temp); 1987 goto out; 1988 } 1989 memcpy(&card->token.issuer_rm_r, 1990 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1991 QETH_MPC_TOKEN_LENGTH); 1992 memcpy(&card->info.mcl_level[0], 1993 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1994 channel->state = CH_STATE_UP; 1995 out: 1996 qeth_release_buffer(channel, iob); 1997 } 1998 1999 void qeth_prepare_control_data(struct qeth_card *card, int len, 2000 struct qeth_cmd_buffer *iob) 2001 { 2002 qeth_setup_ccw(&card->write, iob->data, len); 2003 iob->callback = qeth_release_buffer; 2004 2005 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2006 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2007 card->seqno.trans_hdr++; 2008 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2009 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2010 card->seqno.pdu_hdr++; 2011 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2012 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2013 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2014 } 2015 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2016 2017 int qeth_send_control_data(struct qeth_card *card, int len, 2018 struct qeth_cmd_buffer *iob, 2019 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 2020 unsigned long), 2021 void *reply_param) 2022 { 2023 int rc; 2024 unsigned long flags; 2025 struct qeth_reply *reply = NULL; 2026 unsigned long timeout, event_timeout; 2027 struct qeth_ipa_cmd *cmd; 2028 2029 QETH_CARD_TEXT(card, 2, "sendctl"); 2030 2031 if (card->read_or_write_problem) { 2032 qeth_release_buffer(iob->channel, iob); 2033 return -EIO; 2034 } 2035 reply = qeth_alloc_reply(card); 2036 if (!reply) { 2037 return -ENOMEM; 2038 } 2039 reply->callback = reply_cb; 2040 reply->param = reply_param; 2041 if (card->state == CARD_STATE_DOWN) 2042 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2043 else 2044 reply->seqno = card->seqno.ipa++; 2045 init_waitqueue_head(&reply->wait_q); 2046 spin_lock_irqsave(&card->lock, flags); 2047 list_add_tail(&reply->list, &card->cmd_waiter_list); 2048 spin_unlock_irqrestore(&card->lock, flags); 2049 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2050 2051 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2052 qeth_prepare_control_data(card, len, iob); 2053 2054 if (IS_IPA(iob->data)) 2055 event_timeout = QETH_IPA_TIMEOUT; 2056 else 2057 event_timeout = QETH_TIMEOUT; 2058 timeout = jiffies + event_timeout; 2059 2060 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2061 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2062 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2063 (addr_t) iob, 0, 0); 2064 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2065 if (rc) { 2066 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2067 "ccw_device_start rc = %i\n", 2068 dev_name(&card->write.ccwdev->dev), rc); 2069 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2070 spin_lock_irqsave(&card->lock, flags); 2071 list_del_init(&reply->list); 2072 qeth_put_reply(reply); 2073 spin_unlock_irqrestore(&card->lock, flags); 2074 qeth_release_buffer(iob->channel, iob); 2075 atomic_set(&card->write.irq_pending, 0); 2076 wake_up(&card->wait_q); 2077 return rc; 2078 } 2079 2080 /* we have only one long running ipassist, since we can ensure 2081 process context of this command we can sleep */ 2082 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2083 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2084 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2085 if (!wait_event_timeout(reply->wait_q, 2086 atomic_read(&reply->received), event_timeout)) 2087 goto time_err; 2088 } else { 2089 while (!atomic_read(&reply->received)) { 2090 if (time_after(jiffies, timeout)) 2091 goto time_err; 2092 cpu_relax(); 2093 } 2094 } 2095 2096 if (reply->rc == -EIO) 2097 goto error; 2098 rc = reply->rc; 2099 qeth_put_reply(reply); 2100 return rc; 2101 2102 time_err: 2103 reply->rc = -ETIME; 2104 spin_lock_irqsave(&reply->card->lock, flags); 2105 list_del_init(&reply->list); 2106 spin_unlock_irqrestore(&reply->card->lock, flags); 2107 atomic_inc(&reply->received); 2108 error: 2109 atomic_set(&card->write.irq_pending, 0); 2110 qeth_release_buffer(iob->channel, iob); 2111 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2112 rc = reply->rc; 2113 qeth_put_reply(reply); 2114 return rc; 2115 } 2116 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2117 2118 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2119 unsigned long data) 2120 { 2121 struct qeth_cmd_buffer *iob; 2122 2123 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2124 2125 iob = (struct qeth_cmd_buffer *) data; 2126 memcpy(&card->token.cm_filter_r, 2127 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2128 QETH_MPC_TOKEN_LENGTH); 2129 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2130 return 0; 2131 } 2132 2133 static int qeth_cm_enable(struct qeth_card *card) 2134 { 2135 int rc; 2136 struct qeth_cmd_buffer *iob; 2137 2138 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2139 2140 iob = qeth_wait_for_buffer(&card->write); 2141 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2142 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2143 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2144 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2145 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2146 2147 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2148 qeth_cm_enable_cb, NULL); 2149 return rc; 2150 } 2151 2152 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2153 unsigned long data) 2154 { 2155 2156 struct qeth_cmd_buffer *iob; 2157 2158 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2159 2160 iob = (struct qeth_cmd_buffer *) data; 2161 memcpy(&card->token.cm_connection_r, 2162 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2163 QETH_MPC_TOKEN_LENGTH); 2164 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2165 return 0; 2166 } 2167 2168 static int qeth_cm_setup(struct qeth_card *card) 2169 { 2170 int rc; 2171 struct qeth_cmd_buffer *iob; 2172 2173 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2174 2175 iob = qeth_wait_for_buffer(&card->write); 2176 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2177 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2178 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2179 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2180 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2181 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2182 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2183 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2184 qeth_cm_setup_cb, NULL); 2185 return rc; 2186 2187 } 2188 2189 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2190 { 2191 switch (card->info.type) { 2192 case QETH_CARD_TYPE_UNKNOWN: 2193 return 1500; 2194 case QETH_CARD_TYPE_IQD: 2195 return card->info.max_mtu; 2196 case QETH_CARD_TYPE_OSD: 2197 switch (card->info.link_type) { 2198 case QETH_LINK_TYPE_HSTR: 2199 case QETH_LINK_TYPE_LANE_TR: 2200 return 2000; 2201 default: 2202 return card->options.layer2 ? 1500 : 1492; 2203 } 2204 case QETH_CARD_TYPE_OSM: 2205 case QETH_CARD_TYPE_OSX: 2206 return card->options.layer2 ? 1500 : 1492; 2207 default: 2208 return 1500; 2209 } 2210 } 2211 2212 static inline int qeth_get_mtu_outof_framesize(int framesize) 2213 { 2214 switch (framesize) { 2215 case 0x4000: 2216 return 8192; 2217 case 0x6000: 2218 return 16384; 2219 case 0xa000: 2220 return 32768; 2221 case 0xffff: 2222 return 57344; 2223 default: 2224 return 0; 2225 } 2226 } 2227 2228 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2229 { 2230 switch (card->info.type) { 2231 case QETH_CARD_TYPE_OSD: 2232 case QETH_CARD_TYPE_OSM: 2233 case QETH_CARD_TYPE_OSX: 2234 case QETH_CARD_TYPE_IQD: 2235 return ((mtu >= 576) && 2236 (mtu <= card->info.max_mtu)); 2237 case QETH_CARD_TYPE_OSN: 2238 case QETH_CARD_TYPE_UNKNOWN: 2239 default: 2240 return 1; 2241 } 2242 } 2243 2244 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2245 unsigned long data) 2246 { 2247 2248 __u16 mtu, framesize; 2249 __u16 len; 2250 __u8 link_type; 2251 struct qeth_cmd_buffer *iob; 2252 2253 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2254 2255 iob = (struct qeth_cmd_buffer *) data; 2256 memcpy(&card->token.ulp_filter_r, 2257 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2258 QETH_MPC_TOKEN_LENGTH); 2259 if (card->info.type == QETH_CARD_TYPE_IQD) { 2260 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2261 mtu = qeth_get_mtu_outof_framesize(framesize); 2262 if (!mtu) { 2263 iob->rc = -EINVAL; 2264 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2265 return 0; 2266 } 2267 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2268 /* frame size has changed */ 2269 if (card->dev && 2270 ((card->dev->mtu == card->info.initial_mtu) || 2271 (card->dev->mtu > mtu))) 2272 card->dev->mtu = mtu; 2273 qeth_free_qdio_buffers(card); 2274 } 2275 card->info.initial_mtu = mtu; 2276 card->info.max_mtu = mtu; 2277 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2278 } else { 2279 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2280 iob->data); 2281 card->info.initial_mtu = min(card->info.max_mtu, 2282 qeth_get_initial_mtu_for_card(card)); 2283 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2284 } 2285 2286 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2287 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2288 memcpy(&link_type, 2289 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2290 card->info.link_type = link_type; 2291 } else 2292 card->info.link_type = 0; 2293 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2294 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2295 return 0; 2296 } 2297 2298 static int qeth_ulp_enable(struct qeth_card *card) 2299 { 2300 int rc; 2301 char prot_type; 2302 struct qeth_cmd_buffer *iob; 2303 2304 /*FIXME: trace view callbacks*/ 2305 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2306 2307 iob = qeth_wait_for_buffer(&card->write); 2308 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2309 2310 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2311 (__u8) card->info.portno; 2312 if (card->options.layer2) 2313 if (card->info.type == QETH_CARD_TYPE_OSN) 2314 prot_type = QETH_PROT_OSN2; 2315 else 2316 prot_type = QETH_PROT_LAYER2; 2317 else 2318 prot_type = QETH_PROT_TCPIP; 2319 2320 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2321 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2322 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2323 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2324 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2325 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2326 card->info.portname, 9); 2327 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2328 qeth_ulp_enable_cb, NULL); 2329 return rc; 2330 2331 } 2332 2333 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2334 unsigned long data) 2335 { 2336 struct qeth_cmd_buffer *iob; 2337 2338 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2339 2340 iob = (struct qeth_cmd_buffer *) data; 2341 memcpy(&card->token.ulp_connection_r, 2342 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2343 QETH_MPC_TOKEN_LENGTH); 2344 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2345 3)) { 2346 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2347 dev_err(&card->gdev->dev, "A connection could not be " 2348 "established because of an OLM limit\n"); 2349 iob->rc = -EMLINK; 2350 } 2351 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2352 return 0; 2353 } 2354 2355 static int qeth_ulp_setup(struct qeth_card *card) 2356 { 2357 int rc; 2358 __u16 temp; 2359 struct qeth_cmd_buffer *iob; 2360 struct ccw_dev_id dev_id; 2361 2362 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2363 2364 iob = qeth_wait_for_buffer(&card->write); 2365 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2366 2367 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2368 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2369 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2370 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2371 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2372 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2373 2374 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2375 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2376 temp = (card->info.cula << 8) + card->info.unit_addr2; 2377 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2378 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2379 qeth_ulp_setup_cb, NULL); 2380 return rc; 2381 } 2382 2383 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2384 { 2385 int rc; 2386 struct qeth_qdio_out_buffer *newbuf; 2387 2388 rc = 0; 2389 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2390 if (!newbuf) { 2391 rc = -ENOMEM; 2392 goto out; 2393 } 2394 newbuf->buffer = &q->qdio_bufs[bidx]; 2395 skb_queue_head_init(&newbuf->skb_list); 2396 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2397 newbuf->q = q; 2398 newbuf->aob = NULL; 2399 newbuf->next_pending = q->bufs[bidx]; 2400 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2401 q->bufs[bidx] = newbuf; 2402 if (q->bufstates) { 2403 q->bufstates[bidx].user = newbuf; 2404 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2405 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2406 QETH_CARD_TEXT_(q->card, 2, "%lx", 2407 (long) newbuf->next_pending); 2408 } 2409 out: 2410 return rc; 2411 } 2412 2413 2414 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2415 { 2416 int i, j; 2417 2418 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2419 2420 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2421 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2422 return 0; 2423 2424 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2425 GFP_KERNEL); 2426 if (!card->qdio.in_q) 2427 goto out_nomem; 2428 QETH_DBF_TEXT(SETUP, 2, "inq"); 2429 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2430 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2431 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2432 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2433 card->qdio.in_q->bufs[i].buffer = 2434 &card->qdio.in_q->qdio_bufs[i]; 2435 card->qdio.in_q->bufs[i].rx_skb = NULL; 2436 } 2437 /* inbound buffer pool */ 2438 if (qeth_alloc_buffer_pool(card)) 2439 goto out_freeinq; 2440 2441 /* outbound */ 2442 card->qdio.out_qs = 2443 kzalloc(card->qdio.no_out_queues * 2444 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2445 if (!card->qdio.out_qs) 2446 goto out_freepool; 2447 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2448 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2449 GFP_KERNEL); 2450 if (!card->qdio.out_qs[i]) 2451 goto out_freeoutq; 2452 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2453 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2454 card->qdio.out_qs[i]->queue_no = i; 2455 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2456 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2457 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2458 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2459 goto out_freeoutqbufs; 2460 } 2461 } 2462 2463 /* completion */ 2464 if (qeth_alloc_cq(card)) 2465 goto out_freeoutq; 2466 2467 return 0; 2468 2469 out_freeoutqbufs: 2470 while (j > 0) { 2471 --j; 2472 kmem_cache_free(qeth_qdio_outbuf_cache, 2473 card->qdio.out_qs[i]->bufs[j]); 2474 card->qdio.out_qs[i]->bufs[j] = NULL; 2475 } 2476 out_freeoutq: 2477 while (i > 0) { 2478 kfree(card->qdio.out_qs[--i]); 2479 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2480 } 2481 kfree(card->qdio.out_qs); 2482 card->qdio.out_qs = NULL; 2483 out_freepool: 2484 qeth_free_buffer_pool(card); 2485 out_freeinq: 2486 kfree(card->qdio.in_q); 2487 card->qdio.in_q = NULL; 2488 out_nomem: 2489 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2490 return -ENOMEM; 2491 } 2492 2493 static void qeth_create_qib_param_field(struct qeth_card *card, 2494 char *param_field) 2495 { 2496 2497 param_field[0] = _ascebc['P']; 2498 param_field[1] = _ascebc['C']; 2499 param_field[2] = _ascebc['I']; 2500 param_field[3] = _ascebc['T']; 2501 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2502 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2503 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2504 } 2505 2506 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2507 char *param_field) 2508 { 2509 param_field[16] = _ascebc['B']; 2510 param_field[17] = _ascebc['L']; 2511 param_field[18] = _ascebc['K']; 2512 param_field[19] = _ascebc['T']; 2513 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2514 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2515 *((unsigned int *) (¶m_field[28])) = 2516 card->info.blkt.inter_packet_jumbo; 2517 } 2518 2519 static int qeth_qdio_activate(struct qeth_card *card) 2520 { 2521 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2522 return qdio_activate(CARD_DDEV(card)); 2523 } 2524 2525 static int qeth_dm_act(struct qeth_card *card) 2526 { 2527 int rc; 2528 struct qeth_cmd_buffer *iob; 2529 2530 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2531 2532 iob = qeth_wait_for_buffer(&card->write); 2533 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2534 2535 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2536 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2537 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2538 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2539 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2540 return rc; 2541 } 2542 2543 static int qeth_mpc_initialize(struct qeth_card *card) 2544 { 2545 int rc; 2546 2547 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2548 2549 rc = qeth_issue_next_read(card); 2550 if (rc) { 2551 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2552 return rc; 2553 } 2554 rc = qeth_cm_enable(card); 2555 if (rc) { 2556 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2557 goto out_qdio; 2558 } 2559 rc = qeth_cm_setup(card); 2560 if (rc) { 2561 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2562 goto out_qdio; 2563 } 2564 rc = qeth_ulp_enable(card); 2565 if (rc) { 2566 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2567 goto out_qdio; 2568 } 2569 rc = qeth_ulp_setup(card); 2570 if (rc) { 2571 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2572 goto out_qdio; 2573 } 2574 rc = qeth_alloc_qdio_buffers(card); 2575 if (rc) { 2576 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2577 goto out_qdio; 2578 } 2579 rc = qeth_qdio_establish(card); 2580 if (rc) { 2581 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2582 qeth_free_qdio_buffers(card); 2583 goto out_qdio; 2584 } 2585 rc = qeth_qdio_activate(card); 2586 if (rc) { 2587 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2588 goto out_qdio; 2589 } 2590 rc = qeth_dm_act(card); 2591 if (rc) { 2592 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2593 goto out_qdio; 2594 } 2595 2596 return 0; 2597 out_qdio: 2598 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2599 qdio_free(CARD_DDEV(card)); 2600 return rc; 2601 } 2602 2603 static void qeth_print_status_with_portname(struct qeth_card *card) 2604 { 2605 char dbf_text[15]; 2606 int i; 2607 2608 sprintf(dbf_text, "%s", card->info.portname + 1); 2609 for (i = 0; i < 8; i++) 2610 dbf_text[i] = 2611 (char) _ebcasc[(__u8) dbf_text[i]]; 2612 dbf_text[8] = 0; 2613 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2614 "with link type %s (portname: %s)\n", 2615 qeth_get_cardname(card), 2616 (card->info.mcl_level[0]) ? " (level: " : "", 2617 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2618 (card->info.mcl_level[0]) ? ")" : "", 2619 qeth_get_cardname_short(card), 2620 dbf_text); 2621 2622 } 2623 2624 static void qeth_print_status_no_portname(struct qeth_card *card) 2625 { 2626 if (card->info.portname[0]) 2627 dev_info(&card->gdev->dev, "Device is a%s " 2628 "card%s%s%s\nwith link type %s " 2629 "(no portname needed by interface).\n", 2630 qeth_get_cardname(card), 2631 (card->info.mcl_level[0]) ? " (level: " : "", 2632 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2633 (card->info.mcl_level[0]) ? ")" : "", 2634 qeth_get_cardname_short(card)); 2635 else 2636 dev_info(&card->gdev->dev, "Device is a%s " 2637 "card%s%s%s\nwith link type %s.\n", 2638 qeth_get_cardname(card), 2639 (card->info.mcl_level[0]) ? " (level: " : "", 2640 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2641 (card->info.mcl_level[0]) ? ")" : "", 2642 qeth_get_cardname_short(card)); 2643 } 2644 2645 void qeth_print_status_message(struct qeth_card *card) 2646 { 2647 switch (card->info.type) { 2648 case QETH_CARD_TYPE_OSD: 2649 case QETH_CARD_TYPE_OSM: 2650 case QETH_CARD_TYPE_OSX: 2651 /* VM will use a non-zero first character 2652 * to indicate a HiperSockets like reporting 2653 * of the level OSA sets the first character to zero 2654 * */ 2655 if (!card->info.mcl_level[0]) { 2656 sprintf(card->info.mcl_level, "%02x%02x", 2657 card->info.mcl_level[2], 2658 card->info.mcl_level[3]); 2659 2660 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2661 break; 2662 } 2663 /* fallthrough */ 2664 case QETH_CARD_TYPE_IQD: 2665 if ((card->info.guestlan) || 2666 (card->info.mcl_level[0] & 0x80)) { 2667 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2668 card->info.mcl_level[0]]; 2669 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2670 card->info.mcl_level[1]]; 2671 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2672 card->info.mcl_level[2]]; 2673 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2674 card->info.mcl_level[3]]; 2675 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2676 } 2677 break; 2678 default: 2679 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2680 } 2681 if (card->info.portname_required) 2682 qeth_print_status_with_portname(card); 2683 else 2684 qeth_print_status_no_portname(card); 2685 } 2686 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2687 2688 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2689 { 2690 struct qeth_buffer_pool_entry *entry; 2691 2692 QETH_CARD_TEXT(card, 5, "inwrklst"); 2693 2694 list_for_each_entry(entry, 2695 &card->qdio.init_pool.entry_list, init_list) { 2696 qeth_put_buffer_pool_entry(card, entry); 2697 } 2698 } 2699 2700 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2701 struct qeth_card *card) 2702 { 2703 struct list_head *plh; 2704 struct qeth_buffer_pool_entry *entry; 2705 int i, free; 2706 struct page *page; 2707 2708 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2709 return NULL; 2710 2711 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2712 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2713 free = 1; 2714 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2715 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2716 free = 0; 2717 break; 2718 } 2719 } 2720 if (free) { 2721 list_del_init(&entry->list); 2722 return entry; 2723 } 2724 } 2725 2726 /* no free buffer in pool so take first one and swap pages */ 2727 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2728 struct qeth_buffer_pool_entry, list); 2729 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2730 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2731 page = alloc_page(GFP_ATOMIC); 2732 if (!page) { 2733 return NULL; 2734 } else { 2735 free_page((unsigned long)entry->elements[i]); 2736 entry->elements[i] = page_address(page); 2737 if (card->options.performance_stats) 2738 card->perf_stats.sg_alloc_page_rx++; 2739 } 2740 } 2741 } 2742 list_del_init(&entry->list); 2743 return entry; 2744 } 2745 2746 static int qeth_init_input_buffer(struct qeth_card *card, 2747 struct qeth_qdio_buffer *buf) 2748 { 2749 struct qeth_buffer_pool_entry *pool_entry; 2750 int i; 2751 2752 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2753 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2754 if (!buf->rx_skb) 2755 return 1; 2756 } 2757 2758 pool_entry = qeth_find_free_buffer_pool_entry(card); 2759 if (!pool_entry) 2760 return 1; 2761 2762 /* 2763 * since the buffer is accessed only from the input_tasklet 2764 * there shouldn't be a need to synchronize; also, since we use 2765 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2766 * buffers 2767 */ 2768 2769 buf->pool_entry = pool_entry; 2770 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2771 buf->buffer->element[i].length = PAGE_SIZE; 2772 buf->buffer->element[i].addr = pool_entry->elements[i]; 2773 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2774 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2775 else 2776 buf->buffer->element[i].eflags = 0; 2777 buf->buffer->element[i].sflags = 0; 2778 } 2779 return 0; 2780 } 2781 2782 int qeth_init_qdio_queues(struct qeth_card *card) 2783 { 2784 int i, j; 2785 int rc; 2786 2787 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2788 2789 /* inbound queue */ 2790 memset(card->qdio.in_q->qdio_bufs, 0, 2791 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2792 qeth_initialize_working_pool_list(card); 2793 /*give only as many buffers to hardware as we have buffer pool entries*/ 2794 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2795 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2796 card->qdio.in_q->next_buf_to_init = 2797 card->qdio.in_buf_pool.buf_count - 1; 2798 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2799 card->qdio.in_buf_pool.buf_count - 1); 2800 if (rc) { 2801 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2802 return rc; 2803 } 2804 2805 /* completion */ 2806 rc = qeth_cq_init(card); 2807 if (rc) { 2808 return rc; 2809 } 2810 2811 /* outbound queue */ 2812 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2813 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2814 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2815 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2816 qeth_clear_output_buffer(card->qdio.out_qs[i], 2817 card->qdio.out_qs[i]->bufs[j], 2818 QETH_QDIO_BUF_EMPTY); 2819 } 2820 card->qdio.out_qs[i]->card = card; 2821 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2822 card->qdio.out_qs[i]->do_pack = 0; 2823 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2824 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2825 atomic_set(&card->qdio.out_qs[i]->state, 2826 QETH_OUT_Q_UNLOCKED); 2827 } 2828 return 0; 2829 } 2830 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2831 2832 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2833 { 2834 switch (link_type) { 2835 case QETH_LINK_TYPE_HSTR: 2836 return 2; 2837 default: 2838 return 1; 2839 } 2840 } 2841 2842 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2843 struct qeth_ipa_cmd *cmd, __u8 command, 2844 enum qeth_prot_versions prot) 2845 { 2846 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2847 cmd->hdr.command = command; 2848 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2849 cmd->hdr.seqno = card->seqno.ipa; 2850 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2851 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2852 if (card->options.layer2) 2853 cmd->hdr.prim_version_no = 2; 2854 else 2855 cmd->hdr.prim_version_no = 1; 2856 cmd->hdr.param_count = 1; 2857 cmd->hdr.prot_version = prot; 2858 cmd->hdr.ipa_supported = 0; 2859 cmd->hdr.ipa_enabled = 0; 2860 } 2861 2862 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2863 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2864 { 2865 struct qeth_cmd_buffer *iob; 2866 struct qeth_ipa_cmd *cmd; 2867 2868 iob = qeth_wait_for_buffer(&card->write); 2869 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2870 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2871 2872 return iob; 2873 } 2874 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2875 2876 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2877 char prot_type) 2878 { 2879 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2880 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2881 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2882 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2883 } 2884 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2885 2886 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2887 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2888 unsigned long), 2889 void *reply_param) 2890 { 2891 int rc; 2892 char prot_type; 2893 2894 QETH_CARD_TEXT(card, 4, "sendipa"); 2895 2896 if (card->options.layer2) 2897 if (card->info.type == QETH_CARD_TYPE_OSN) 2898 prot_type = QETH_PROT_OSN2; 2899 else 2900 prot_type = QETH_PROT_LAYER2; 2901 else 2902 prot_type = QETH_PROT_TCPIP; 2903 qeth_prepare_ipa_cmd(card, iob, prot_type); 2904 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2905 iob, reply_cb, reply_param); 2906 if (rc == -ETIME) { 2907 qeth_clear_ipacmd_list(card); 2908 qeth_schedule_recovery(card); 2909 } 2910 return rc; 2911 } 2912 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2913 2914 int qeth_send_startlan(struct qeth_card *card) 2915 { 2916 int rc; 2917 struct qeth_cmd_buffer *iob; 2918 2919 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2920 2921 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2922 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2923 return rc; 2924 } 2925 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2926 2927 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2928 struct qeth_reply *reply, unsigned long data) 2929 { 2930 struct qeth_ipa_cmd *cmd; 2931 2932 QETH_CARD_TEXT(card, 4, "defadpcb"); 2933 2934 cmd = (struct qeth_ipa_cmd *) data; 2935 if (cmd->hdr.return_code == 0) 2936 cmd->hdr.return_code = 2937 cmd->data.setadapterparms.hdr.return_code; 2938 return 0; 2939 } 2940 2941 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2942 struct qeth_reply *reply, unsigned long data) 2943 { 2944 struct qeth_ipa_cmd *cmd; 2945 2946 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2947 2948 cmd = (struct qeth_ipa_cmd *) data; 2949 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2950 card->info.link_type = 2951 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2952 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2953 } 2954 card->options.adp.supported_funcs = 2955 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2956 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2957 } 2958 2959 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2960 __u32 command, __u32 cmdlen) 2961 { 2962 struct qeth_cmd_buffer *iob; 2963 struct qeth_ipa_cmd *cmd; 2964 2965 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2966 QETH_PROT_IPV4); 2967 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2968 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2969 cmd->data.setadapterparms.hdr.command_code = command; 2970 cmd->data.setadapterparms.hdr.used_total = 1; 2971 cmd->data.setadapterparms.hdr.seq_no = 1; 2972 2973 return iob; 2974 } 2975 2976 int qeth_query_setadapterparms(struct qeth_card *card) 2977 { 2978 int rc; 2979 struct qeth_cmd_buffer *iob; 2980 2981 QETH_CARD_TEXT(card, 3, "queryadp"); 2982 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2983 sizeof(struct qeth_ipacmd_setadpparms)); 2984 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2985 return rc; 2986 } 2987 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2988 2989 static int qeth_query_ipassists_cb(struct qeth_card *card, 2990 struct qeth_reply *reply, unsigned long data) 2991 { 2992 struct qeth_ipa_cmd *cmd; 2993 2994 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2995 2996 cmd = (struct qeth_ipa_cmd *) data; 2997 2998 switch (cmd->hdr.return_code) { 2999 case IPA_RC_NOTSUPP: 3000 case IPA_RC_L2_UNSUPPORTED_CMD: 3001 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3002 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3003 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3004 return -0; 3005 default: 3006 if (cmd->hdr.return_code) { 3007 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3008 "rc=%d\n", 3009 dev_name(&card->gdev->dev), 3010 cmd->hdr.return_code); 3011 return 0; 3012 } 3013 } 3014 3015 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3016 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3017 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3018 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3019 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3020 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3021 } else 3022 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3023 "\n", dev_name(&card->gdev->dev)); 3024 return 0; 3025 } 3026 3027 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3028 { 3029 int rc; 3030 struct qeth_cmd_buffer *iob; 3031 3032 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3033 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3034 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3035 return rc; 3036 } 3037 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3038 3039 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3040 struct qeth_reply *reply, unsigned long data) 3041 { 3042 struct qeth_ipa_cmd *cmd; 3043 __u16 rc; 3044 3045 cmd = (struct qeth_ipa_cmd *)data; 3046 rc = cmd->hdr.return_code; 3047 if (rc) 3048 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3049 else 3050 card->info.diagass_support = cmd->data.diagass.ext; 3051 return 0; 3052 } 3053 3054 static int qeth_query_setdiagass(struct qeth_card *card) 3055 { 3056 struct qeth_cmd_buffer *iob; 3057 struct qeth_ipa_cmd *cmd; 3058 3059 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3060 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3061 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3062 cmd->data.diagass.subcmd_len = 16; 3063 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3064 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3065 } 3066 3067 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3068 { 3069 unsigned long info = get_zeroed_page(GFP_KERNEL); 3070 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3071 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3072 struct ccw_dev_id ccwid; 3073 int level; 3074 3075 tid->chpid = card->info.chpid; 3076 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3077 tid->ssid = ccwid.ssid; 3078 tid->devno = ccwid.devno; 3079 if (!info) 3080 return; 3081 level = stsi(NULL, 0, 0, 0); 3082 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3083 tid->lparnr = info222->lpar_number; 3084 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3085 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3086 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3087 } 3088 free_page(info); 3089 return; 3090 } 3091 3092 static int qeth_hw_trap_cb(struct qeth_card *card, 3093 struct qeth_reply *reply, unsigned long data) 3094 { 3095 struct qeth_ipa_cmd *cmd; 3096 __u16 rc; 3097 3098 cmd = (struct qeth_ipa_cmd *)data; 3099 rc = cmd->hdr.return_code; 3100 if (rc) 3101 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3102 return 0; 3103 } 3104 3105 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3106 { 3107 struct qeth_cmd_buffer *iob; 3108 struct qeth_ipa_cmd *cmd; 3109 3110 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3111 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3112 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3113 cmd->data.diagass.subcmd_len = 80; 3114 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3115 cmd->data.diagass.type = 1; 3116 cmd->data.diagass.action = action; 3117 switch (action) { 3118 case QETH_DIAGS_TRAP_ARM: 3119 cmd->data.diagass.options = 0x0003; 3120 cmd->data.diagass.ext = 0x00010000 + 3121 sizeof(struct qeth_trap_id); 3122 qeth_get_trap_id(card, 3123 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3124 break; 3125 case QETH_DIAGS_TRAP_DISARM: 3126 cmd->data.diagass.options = 0x0001; 3127 break; 3128 case QETH_DIAGS_TRAP_CAPTURE: 3129 break; 3130 } 3131 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3132 } 3133 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3134 3135 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3136 unsigned int qdio_error, const char *dbftext) 3137 { 3138 if (qdio_error) { 3139 QETH_CARD_TEXT(card, 2, dbftext); 3140 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3141 buf->element[15].sflags); 3142 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3143 buf->element[14].sflags); 3144 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3145 if ((buf->element[15].sflags) == 0x12) { 3146 card->stats.rx_dropped++; 3147 return 0; 3148 } else 3149 return 1; 3150 } 3151 return 0; 3152 } 3153 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3154 3155 void qeth_buffer_reclaim_work(struct work_struct *work) 3156 { 3157 struct qeth_card *card = container_of(work, struct qeth_card, 3158 buffer_reclaim_work.work); 3159 3160 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3161 qeth_queue_input_buffer(card, card->reclaim_index); 3162 } 3163 3164 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3165 { 3166 struct qeth_qdio_q *queue = card->qdio.in_q; 3167 struct list_head *lh; 3168 int count; 3169 int i; 3170 int rc; 3171 int newcount = 0; 3172 3173 count = (index < queue->next_buf_to_init)? 3174 card->qdio.in_buf_pool.buf_count - 3175 (queue->next_buf_to_init - index) : 3176 card->qdio.in_buf_pool.buf_count - 3177 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3178 /* only requeue at a certain threshold to avoid SIGAs */ 3179 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3180 for (i = queue->next_buf_to_init; 3181 i < queue->next_buf_to_init + count; ++i) { 3182 if (qeth_init_input_buffer(card, 3183 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3184 break; 3185 } else { 3186 newcount++; 3187 } 3188 } 3189 3190 if (newcount < count) { 3191 /* we are in memory shortage so we switch back to 3192 traditional skb allocation and drop packages */ 3193 atomic_set(&card->force_alloc_skb, 3); 3194 count = newcount; 3195 } else { 3196 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3197 } 3198 3199 if (!count) { 3200 i = 0; 3201 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3202 i++; 3203 if (i == card->qdio.in_buf_pool.buf_count) { 3204 QETH_CARD_TEXT(card, 2, "qsarbw"); 3205 card->reclaim_index = index; 3206 schedule_delayed_work( 3207 &card->buffer_reclaim_work, 3208 QETH_RECLAIM_WORK_TIME); 3209 } 3210 return; 3211 } 3212 3213 /* 3214 * according to old code it should be avoided to requeue all 3215 * 128 buffers in order to benefit from PCI avoidance. 3216 * this function keeps at least one buffer (the buffer at 3217 * 'index') un-requeued -> this buffer is the first buffer that 3218 * will be requeued the next time 3219 */ 3220 if (card->options.performance_stats) { 3221 card->perf_stats.inbound_do_qdio_cnt++; 3222 card->perf_stats.inbound_do_qdio_start_time = 3223 qeth_get_micros(); 3224 } 3225 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3226 queue->next_buf_to_init, count); 3227 if (card->options.performance_stats) 3228 card->perf_stats.inbound_do_qdio_time += 3229 qeth_get_micros() - 3230 card->perf_stats.inbound_do_qdio_start_time; 3231 if (rc) { 3232 QETH_CARD_TEXT(card, 2, "qinberr"); 3233 } 3234 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3235 QDIO_MAX_BUFFERS_PER_Q; 3236 } 3237 } 3238 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3239 3240 static int qeth_handle_send_error(struct qeth_card *card, 3241 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3242 { 3243 int sbalf15 = buffer->buffer->element[15].sflags; 3244 3245 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3246 if (card->info.type == QETH_CARD_TYPE_IQD) { 3247 if (sbalf15 == 0) { 3248 qdio_err = 0; 3249 } else { 3250 qdio_err = 1; 3251 } 3252 } 3253 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3254 3255 if (!qdio_err) 3256 return QETH_SEND_ERROR_NONE; 3257 3258 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3259 return QETH_SEND_ERROR_RETRY; 3260 3261 QETH_CARD_TEXT(card, 1, "lnkfail"); 3262 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3263 (u16)qdio_err, (u8)sbalf15); 3264 return QETH_SEND_ERROR_LINK_FAILURE; 3265 } 3266 3267 /* 3268 * Switched to packing state if the number of used buffers on a queue 3269 * reaches a certain limit. 3270 */ 3271 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3272 { 3273 if (!queue->do_pack) { 3274 if (atomic_read(&queue->used_buffers) 3275 >= QETH_HIGH_WATERMARK_PACK){ 3276 /* switch non-PACKING -> PACKING */ 3277 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3278 if (queue->card->options.performance_stats) 3279 queue->card->perf_stats.sc_dp_p++; 3280 queue->do_pack = 1; 3281 } 3282 } 3283 } 3284 3285 /* 3286 * Switches from packing to non-packing mode. If there is a packing 3287 * buffer on the queue this buffer will be prepared to be flushed. 3288 * In that case 1 is returned to inform the caller. If no buffer 3289 * has to be flushed, zero is returned. 3290 */ 3291 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3292 { 3293 struct qeth_qdio_out_buffer *buffer; 3294 int flush_count = 0; 3295 3296 if (queue->do_pack) { 3297 if (atomic_read(&queue->used_buffers) 3298 <= QETH_LOW_WATERMARK_PACK) { 3299 /* switch PACKING -> non-PACKING */ 3300 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3301 if (queue->card->options.performance_stats) 3302 queue->card->perf_stats.sc_p_dp++; 3303 queue->do_pack = 0; 3304 /* flush packing buffers */ 3305 buffer = queue->bufs[queue->next_buf_to_fill]; 3306 if ((atomic_read(&buffer->state) == 3307 QETH_QDIO_BUF_EMPTY) && 3308 (buffer->next_element_to_fill > 0)) { 3309 atomic_set(&buffer->state, 3310 QETH_QDIO_BUF_PRIMED); 3311 flush_count++; 3312 queue->next_buf_to_fill = 3313 (queue->next_buf_to_fill + 1) % 3314 QDIO_MAX_BUFFERS_PER_Q; 3315 } 3316 } 3317 } 3318 return flush_count; 3319 } 3320 3321 3322 /* 3323 * Called to flush a packing buffer if no more pci flags are on the queue. 3324 * Checks if there is a packing buffer and prepares it to be flushed. 3325 * In that case returns 1, otherwise zero. 3326 */ 3327 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3328 { 3329 struct qeth_qdio_out_buffer *buffer; 3330 3331 buffer = queue->bufs[queue->next_buf_to_fill]; 3332 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3333 (buffer->next_element_to_fill > 0)) { 3334 /* it's a packing buffer */ 3335 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3336 queue->next_buf_to_fill = 3337 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3338 return 1; 3339 } 3340 return 0; 3341 } 3342 3343 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3344 int count) 3345 { 3346 struct qeth_qdio_out_buffer *buf; 3347 int rc; 3348 int i; 3349 unsigned int qdio_flags; 3350 3351 for (i = index; i < index + count; ++i) { 3352 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3353 buf = queue->bufs[bidx]; 3354 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3355 SBAL_EFLAGS_LAST_ENTRY; 3356 3357 if (queue->bufstates) 3358 queue->bufstates[bidx].user = buf; 3359 3360 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3361 continue; 3362 3363 if (!queue->do_pack) { 3364 if ((atomic_read(&queue->used_buffers) >= 3365 (QETH_HIGH_WATERMARK_PACK - 3366 QETH_WATERMARK_PACK_FUZZ)) && 3367 !atomic_read(&queue->set_pci_flags_count)) { 3368 /* it's likely that we'll go to packing 3369 * mode soon */ 3370 atomic_inc(&queue->set_pci_flags_count); 3371 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3372 } 3373 } else { 3374 if (!atomic_read(&queue->set_pci_flags_count)) { 3375 /* 3376 * there's no outstanding PCI any more, so we 3377 * have to request a PCI to be sure the the PCI 3378 * will wake at some time in the future then we 3379 * can flush packed buffers that might still be 3380 * hanging around, which can happen if no 3381 * further send was requested by the stack 3382 */ 3383 atomic_inc(&queue->set_pci_flags_count); 3384 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3385 } 3386 } 3387 } 3388 3389 queue->card->dev->trans_start = jiffies; 3390 if (queue->card->options.performance_stats) { 3391 queue->card->perf_stats.outbound_do_qdio_cnt++; 3392 queue->card->perf_stats.outbound_do_qdio_start_time = 3393 qeth_get_micros(); 3394 } 3395 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3396 if (atomic_read(&queue->set_pci_flags_count)) 3397 qdio_flags |= QDIO_FLAG_PCI_OUT; 3398 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3399 queue->queue_no, index, count); 3400 if (queue->card->options.performance_stats) 3401 queue->card->perf_stats.outbound_do_qdio_time += 3402 qeth_get_micros() - 3403 queue->card->perf_stats.outbound_do_qdio_start_time; 3404 atomic_add(count, &queue->used_buffers); 3405 if (rc) { 3406 queue->card->stats.tx_errors += count; 3407 /* ignore temporary SIGA errors without busy condition */ 3408 if (rc == -ENOBUFS) 3409 return; 3410 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3411 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3412 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3413 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3414 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3415 3416 /* this must not happen under normal circumstances. if it 3417 * happens something is really wrong -> recover */ 3418 qeth_schedule_recovery(queue->card); 3419 return; 3420 } 3421 if (queue->card->options.performance_stats) 3422 queue->card->perf_stats.bufs_sent += count; 3423 } 3424 3425 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3426 { 3427 int index; 3428 int flush_cnt = 0; 3429 int q_was_packing = 0; 3430 3431 /* 3432 * check if weed have to switch to non-packing mode or if 3433 * we have to get a pci flag out on the queue 3434 */ 3435 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3436 !atomic_read(&queue->set_pci_flags_count)) { 3437 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3438 QETH_OUT_Q_UNLOCKED) { 3439 /* 3440 * If we get in here, there was no action in 3441 * do_send_packet. So, we check if there is a 3442 * packing buffer to be flushed here. 3443 */ 3444 netif_stop_queue(queue->card->dev); 3445 index = queue->next_buf_to_fill; 3446 q_was_packing = queue->do_pack; 3447 /* queue->do_pack may change */ 3448 barrier(); 3449 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3450 if (!flush_cnt && 3451 !atomic_read(&queue->set_pci_flags_count)) 3452 flush_cnt += 3453 qeth_flush_buffers_on_no_pci(queue); 3454 if (queue->card->options.performance_stats && 3455 q_was_packing) 3456 queue->card->perf_stats.bufs_sent_pack += 3457 flush_cnt; 3458 if (flush_cnt) 3459 qeth_flush_buffers(queue, index, flush_cnt); 3460 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3461 } 3462 } 3463 } 3464 3465 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3466 unsigned long card_ptr) 3467 { 3468 struct qeth_card *card = (struct qeth_card *)card_ptr; 3469 3470 if (card->dev && (card->dev->flags & IFF_UP)) 3471 napi_schedule(&card->napi); 3472 } 3473 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3474 3475 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3476 { 3477 int rc; 3478 3479 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3480 rc = -1; 3481 goto out; 3482 } else { 3483 if (card->options.cq == cq) { 3484 rc = 0; 3485 goto out; 3486 } 3487 3488 if (card->state != CARD_STATE_DOWN && 3489 card->state != CARD_STATE_RECOVER) { 3490 rc = -1; 3491 goto out; 3492 } 3493 3494 qeth_free_qdio_buffers(card); 3495 card->options.cq = cq; 3496 rc = 0; 3497 } 3498 out: 3499 return rc; 3500 3501 } 3502 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3503 3504 3505 static void qeth_qdio_cq_handler(struct qeth_card *card, 3506 unsigned int qdio_err, 3507 unsigned int queue, int first_element, int count) { 3508 struct qeth_qdio_q *cq = card->qdio.c_q; 3509 int i; 3510 int rc; 3511 3512 if (!qeth_is_cq(card, queue)) 3513 goto out; 3514 3515 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3516 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3517 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3518 3519 if (qdio_err) { 3520 netif_stop_queue(card->dev); 3521 qeth_schedule_recovery(card); 3522 goto out; 3523 } 3524 3525 if (card->options.performance_stats) { 3526 card->perf_stats.cq_cnt++; 3527 card->perf_stats.cq_start_time = qeth_get_micros(); 3528 } 3529 3530 for (i = first_element; i < first_element + count; ++i) { 3531 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3532 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3533 int e; 3534 3535 e = 0; 3536 while (buffer->element[e].addr) { 3537 unsigned long phys_aob_addr; 3538 3539 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3540 qeth_qdio_handle_aob(card, phys_aob_addr); 3541 buffer->element[e].addr = NULL; 3542 buffer->element[e].eflags = 0; 3543 buffer->element[e].sflags = 0; 3544 buffer->element[e].length = 0; 3545 3546 ++e; 3547 } 3548 3549 buffer->element[15].eflags = 0; 3550 buffer->element[15].sflags = 0; 3551 } 3552 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3553 card->qdio.c_q->next_buf_to_init, 3554 count); 3555 if (rc) { 3556 dev_warn(&card->gdev->dev, 3557 "QDIO reported an error, rc=%i\n", rc); 3558 QETH_CARD_TEXT(card, 2, "qcqherr"); 3559 } 3560 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3561 + count) % QDIO_MAX_BUFFERS_PER_Q; 3562 3563 netif_wake_queue(card->dev); 3564 3565 if (card->options.performance_stats) { 3566 int delta_t = qeth_get_micros(); 3567 delta_t -= card->perf_stats.cq_start_time; 3568 card->perf_stats.cq_time += delta_t; 3569 } 3570 out: 3571 return; 3572 } 3573 3574 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3575 unsigned int queue, int first_elem, int count, 3576 unsigned long card_ptr) 3577 { 3578 struct qeth_card *card = (struct qeth_card *)card_ptr; 3579 3580 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3581 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3582 3583 if (qeth_is_cq(card, queue)) 3584 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3585 else if (qdio_err) 3586 qeth_schedule_recovery(card); 3587 3588 3589 } 3590 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3591 3592 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3593 unsigned int qdio_error, int __queue, int first_element, 3594 int count, unsigned long card_ptr) 3595 { 3596 struct qeth_card *card = (struct qeth_card *) card_ptr; 3597 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3598 struct qeth_qdio_out_buffer *buffer; 3599 int i; 3600 3601 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3602 if (qdio_error & QDIO_ERROR_FATAL) { 3603 QETH_CARD_TEXT(card, 2, "achkcond"); 3604 netif_stop_queue(card->dev); 3605 qeth_schedule_recovery(card); 3606 return; 3607 } 3608 if (card->options.performance_stats) { 3609 card->perf_stats.outbound_handler_cnt++; 3610 card->perf_stats.outbound_handler_start_time = 3611 qeth_get_micros(); 3612 } 3613 for (i = first_element; i < (first_element + count); ++i) { 3614 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3615 buffer = queue->bufs[bidx]; 3616 qeth_handle_send_error(card, buffer, qdio_error); 3617 3618 if (queue->bufstates && 3619 (queue->bufstates[bidx].flags & 3620 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3621 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3622 3623 if (atomic_cmpxchg(&buffer->state, 3624 QETH_QDIO_BUF_PRIMED, 3625 QETH_QDIO_BUF_PENDING) == 3626 QETH_QDIO_BUF_PRIMED) { 3627 qeth_notify_skbs(queue, buffer, 3628 TX_NOTIFY_PENDING); 3629 } 3630 buffer->aob = queue->bufstates[bidx].aob; 3631 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3632 QETH_CARD_TEXT(queue->card, 5, "aob"); 3633 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3634 virt_to_phys(buffer->aob)); 3635 if (qeth_init_qdio_out_buf(queue, bidx)) { 3636 QETH_CARD_TEXT(card, 2, "outofbuf"); 3637 qeth_schedule_recovery(card); 3638 } 3639 } else { 3640 if (card->options.cq == QETH_CQ_ENABLED) { 3641 enum iucv_tx_notify n; 3642 3643 n = qeth_compute_cq_notification( 3644 buffer->buffer->element[15].sflags, 0); 3645 qeth_notify_skbs(queue, buffer, n); 3646 } 3647 3648 qeth_clear_output_buffer(queue, buffer, 3649 QETH_QDIO_BUF_EMPTY); 3650 } 3651 qeth_cleanup_handled_pending(queue, bidx, 0); 3652 } 3653 atomic_sub(count, &queue->used_buffers); 3654 /* check if we need to do something on this outbound queue */ 3655 if (card->info.type != QETH_CARD_TYPE_IQD) 3656 qeth_check_outbound_queue(queue); 3657 3658 netif_wake_queue(queue->card->dev); 3659 if (card->options.performance_stats) 3660 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3661 card->perf_stats.outbound_handler_start_time; 3662 } 3663 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3664 3665 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3666 int ipv, int cast_type) 3667 { 3668 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3669 card->info.type == QETH_CARD_TYPE_OSX)) 3670 return card->qdio.default_out_queue; 3671 switch (card->qdio.no_out_queues) { 3672 case 4: 3673 if (cast_type && card->info.is_multicast_different) 3674 return card->info.is_multicast_different & 3675 (card->qdio.no_out_queues - 1); 3676 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3677 const u8 tos = ip_hdr(skb)->tos; 3678 3679 if (card->qdio.do_prio_queueing == 3680 QETH_PRIO_Q_ING_TOS) { 3681 if (tos & IP_TOS_NOTIMPORTANT) 3682 return 3; 3683 if (tos & IP_TOS_HIGHRELIABILITY) 3684 return 2; 3685 if (tos & IP_TOS_HIGHTHROUGHPUT) 3686 return 1; 3687 if (tos & IP_TOS_LOWDELAY) 3688 return 0; 3689 } 3690 if (card->qdio.do_prio_queueing == 3691 QETH_PRIO_Q_ING_PREC) 3692 return 3 - (tos >> 6); 3693 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3694 /* TODO: IPv6!!! */ 3695 } 3696 return card->qdio.default_out_queue; 3697 case 1: /* fallthrough for single-out-queue 1920-device */ 3698 default: 3699 return card->qdio.default_out_queue; 3700 } 3701 } 3702 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3703 3704 int qeth_get_elements_for_frags(struct sk_buff *skb) 3705 { 3706 int cnt, length, e, elements = 0; 3707 struct skb_frag_struct *frag; 3708 char *data; 3709 3710 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3711 frag = &skb_shinfo(skb)->frags[cnt]; 3712 data = (char *)page_to_phys(skb_frag_page(frag)) + 3713 frag->page_offset; 3714 length = frag->size; 3715 e = PFN_UP((unsigned long)data + length - 1) - 3716 PFN_DOWN((unsigned long)data); 3717 elements += e; 3718 } 3719 return elements; 3720 } 3721 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3722 3723 int qeth_get_elements_no(struct qeth_card *card, 3724 struct sk_buff *skb, int elems) 3725 { 3726 int dlen = skb->len - skb->data_len; 3727 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3728 PFN_DOWN((unsigned long)skb->data); 3729 3730 elements_needed += qeth_get_elements_for_frags(skb); 3731 3732 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3733 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3734 "(Number=%d / Length=%d). Discarded.\n", 3735 (elements_needed+elems), skb->len); 3736 return 0; 3737 } 3738 return elements_needed; 3739 } 3740 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3741 3742 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3743 { 3744 int hroom, inpage, rest; 3745 3746 if (((unsigned long)skb->data & PAGE_MASK) != 3747 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3748 hroom = skb_headroom(skb); 3749 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3750 rest = len - inpage; 3751 if (rest > hroom) 3752 return 1; 3753 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3754 skb->data -= rest; 3755 skb->tail -= rest; 3756 *hdr = (struct qeth_hdr *)skb->data; 3757 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3758 } 3759 return 0; 3760 } 3761 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3762 3763 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3764 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3765 int offset) 3766 { 3767 int length = skb->len - skb->data_len; 3768 int length_here; 3769 int element; 3770 char *data; 3771 int first_lap, cnt; 3772 struct skb_frag_struct *frag; 3773 3774 element = *next_element_to_fill; 3775 data = skb->data; 3776 first_lap = (is_tso == 0 ? 1 : 0); 3777 3778 if (offset >= 0) { 3779 data = skb->data + offset; 3780 length -= offset; 3781 first_lap = 0; 3782 } 3783 3784 while (length > 0) { 3785 /* length_here is the remaining amount of data in this page */ 3786 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3787 if (length < length_here) 3788 length_here = length; 3789 3790 buffer->element[element].addr = data; 3791 buffer->element[element].length = length_here; 3792 length -= length_here; 3793 if (!length) { 3794 if (first_lap) 3795 if (skb_shinfo(skb)->nr_frags) 3796 buffer->element[element].eflags = 3797 SBAL_EFLAGS_FIRST_FRAG; 3798 else 3799 buffer->element[element].eflags = 0; 3800 else 3801 buffer->element[element].eflags = 3802 SBAL_EFLAGS_MIDDLE_FRAG; 3803 } else { 3804 if (first_lap) 3805 buffer->element[element].eflags = 3806 SBAL_EFLAGS_FIRST_FRAG; 3807 else 3808 buffer->element[element].eflags = 3809 SBAL_EFLAGS_MIDDLE_FRAG; 3810 } 3811 data += length_here; 3812 element++; 3813 first_lap = 0; 3814 } 3815 3816 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3817 frag = &skb_shinfo(skb)->frags[cnt]; 3818 data = (char *)page_to_phys(skb_frag_page(frag)) + 3819 frag->page_offset; 3820 length = frag->size; 3821 while (length > 0) { 3822 length_here = PAGE_SIZE - 3823 ((unsigned long) data % PAGE_SIZE); 3824 if (length < length_here) 3825 length_here = length; 3826 3827 buffer->element[element].addr = data; 3828 buffer->element[element].length = length_here; 3829 buffer->element[element].eflags = 3830 SBAL_EFLAGS_MIDDLE_FRAG; 3831 length -= length_here; 3832 data += length_here; 3833 element++; 3834 } 3835 } 3836 3837 if (buffer->element[element - 1].eflags) 3838 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3839 *next_element_to_fill = element; 3840 } 3841 3842 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3843 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3844 struct qeth_hdr *hdr, int offset, int hd_len) 3845 { 3846 struct qdio_buffer *buffer; 3847 int flush_cnt = 0, hdr_len, large_send = 0; 3848 3849 buffer = buf->buffer; 3850 atomic_inc(&skb->users); 3851 skb_queue_tail(&buf->skb_list, skb); 3852 3853 /*check first on TSO ....*/ 3854 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3855 int element = buf->next_element_to_fill; 3856 3857 hdr_len = sizeof(struct qeth_hdr_tso) + 3858 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3859 /*fill first buffer entry only with header information */ 3860 buffer->element[element].addr = skb->data; 3861 buffer->element[element].length = hdr_len; 3862 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3863 buf->next_element_to_fill++; 3864 skb->data += hdr_len; 3865 skb->len -= hdr_len; 3866 large_send = 1; 3867 } 3868 3869 if (offset >= 0) { 3870 int element = buf->next_element_to_fill; 3871 buffer->element[element].addr = hdr; 3872 buffer->element[element].length = sizeof(struct qeth_hdr) + 3873 hd_len; 3874 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3875 buf->is_header[element] = 1; 3876 buf->next_element_to_fill++; 3877 } 3878 3879 __qeth_fill_buffer(skb, buffer, large_send, 3880 (int *)&buf->next_element_to_fill, offset); 3881 3882 if (!queue->do_pack) { 3883 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3884 /* set state to PRIMED -> will be flushed */ 3885 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3886 flush_cnt = 1; 3887 } else { 3888 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3889 if (queue->card->options.performance_stats) 3890 queue->card->perf_stats.skbs_sent_pack++; 3891 if (buf->next_element_to_fill >= 3892 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3893 /* 3894 * packed buffer if full -> set state PRIMED 3895 * -> will be flushed 3896 */ 3897 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3898 flush_cnt = 1; 3899 } 3900 } 3901 return flush_cnt; 3902 } 3903 3904 int qeth_do_send_packet_fast(struct qeth_card *card, 3905 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3906 struct qeth_hdr *hdr, int elements_needed, 3907 int offset, int hd_len) 3908 { 3909 struct qeth_qdio_out_buffer *buffer; 3910 int index; 3911 3912 /* spin until we get the queue ... */ 3913 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3914 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3915 /* ... now we've got the queue */ 3916 index = queue->next_buf_to_fill; 3917 buffer = queue->bufs[queue->next_buf_to_fill]; 3918 /* 3919 * check if buffer is empty to make sure that we do not 'overtake' 3920 * ourselves and try to fill a buffer that is already primed 3921 */ 3922 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3923 goto out; 3924 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3925 QDIO_MAX_BUFFERS_PER_Q; 3926 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3927 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3928 qeth_flush_buffers(queue, index, 1); 3929 return 0; 3930 out: 3931 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3932 return -EBUSY; 3933 } 3934 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3935 3936 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3937 struct sk_buff *skb, struct qeth_hdr *hdr, 3938 int elements_needed) 3939 { 3940 struct qeth_qdio_out_buffer *buffer; 3941 int start_index; 3942 int flush_count = 0; 3943 int do_pack = 0; 3944 int tmp; 3945 int rc = 0; 3946 3947 /* spin until we get the queue ... */ 3948 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3949 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3950 start_index = queue->next_buf_to_fill; 3951 buffer = queue->bufs[queue->next_buf_to_fill]; 3952 /* 3953 * check if buffer is empty to make sure that we do not 'overtake' 3954 * ourselves and try to fill a buffer that is already primed 3955 */ 3956 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3957 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3958 return -EBUSY; 3959 } 3960 /* check if we need to switch packing state of this queue */ 3961 qeth_switch_to_packing_if_needed(queue); 3962 if (queue->do_pack) { 3963 do_pack = 1; 3964 /* does packet fit in current buffer? */ 3965 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3966 buffer->next_element_to_fill) < elements_needed) { 3967 /* ... no -> set state PRIMED */ 3968 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3969 flush_count++; 3970 queue->next_buf_to_fill = 3971 (queue->next_buf_to_fill + 1) % 3972 QDIO_MAX_BUFFERS_PER_Q; 3973 buffer = queue->bufs[queue->next_buf_to_fill]; 3974 /* we did a step forward, so check buffer state 3975 * again */ 3976 if (atomic_read(&buffer->state) != 3977 QETH_QDIO_BUF_EMPTY) { 3978 qeth_flush_buffers(queue, start_index, 3979 flush_count); 3980 atomic_set(&queue->state, 3981 QETH_OUT_Q_UNLOCKED); 3982 return -EBUSY; 3983 } 3984 } 3985 } 3986 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3987 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3988 QDIO_MAX_BUFFERS_PER_Q; 3989 flush_count += tmp; 3990 if (flush_count) 3991 qeth_flush_buffers(queue, start_index, flush_count); 3992 else if (!atomic_read(&queue->set_pci_flags_count)) 3993 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3994 /* 3995 * queue->state will go from LOCKED -> UNLOCKED or from 3996 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3997 * (switch packing state or flush buffer to get another pci flag out). 3998 * In that case we will enter this loop 3999 */ 4000 while (atomic_dec_return(&queue->state)) { 4001 flush_count = 0; 4002 start_index = queue->next_buf_to_fill; 4003 /* check if we can go back to non-packing state */ 4004 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 4005 /* 4006 * check if we need to flush a packing buffer to get a pci 4007 * flag out on the queue 4008 */ 4009 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 4010 flush_count += qeth_flush_buffers_on_no_pci(queue); 4011 if (flush_count) 4012 qeth_flush_buffers(queue, start_index, flush_count); 4013 } 4014 /* at this point the queue is UNLOCKED again */ 4015 if (queue->card->options.performance_stats && do_pack) 4016 queue->card->perf_stats.bufs_sent_pack += flush_count; 4017 4018 return rc; 4019 } 4020 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4021 4022 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4023 struct qeth_reply *reply, unsigned long data) 4024 { 4025 struct qeth_ipa_cmd *cmd; 4026 struct qeth_ipacmd_setadpparms *setparms; 4027 4028 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4029 4030 cmd = (struct qeth_ipa_cmd *) data; 4031 setparms = &(cmd->data.setadapterparms); 4032 4033 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4034 if (cmd->hdr.return_code) { 4035 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 4036 setparms->data.mode = SET_PROMISC_MODE_OFF; 4037 } 4038 card->info.promisc_mode = setparms->data.mode; 4039 return 0; 4040 } 4041 4042 void qeth_setadp_promisc_mode(struct qeth_card *card) 4043 { 4044 enum qeth_ipa_promisc_modes mode; 4045 struct net_device *dev = card->dev; 4046 struct qeth_cmd_buffer *iob; 4047 struct qeth_ipa_cmd *cmd; 4048 4049 QETH_CARD_TEXT(card, 4, "setprom"); 4050 4051 if (((dev->flags & IFF_PROMISC) && 4052 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4053 (!(dev->flags & IFF_PROMISC) && 4054 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4055 return; 4056 mode = SET_PROMISC_MODE_OFF; 4057 if (dev->flags & IFF_PROMISC) 4058 mode = SET_PROMISC_MODE_ON; 4059 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4060 4061 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4062 sizeof(struct qeth_ipacmd_setadpparms)); 4063 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4064 cmd->data.setadapterparms.data.mode = mode; 4065 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4066 } 4067 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4068 4069 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4070 { 4071 struct qeth_card *card; 4072 char dbf_text[15]; 4073 4074 card = dev->ml_priv; 4075 4076 QETH_CARD_TEXT(card, 4, "chgmtu"); 4077 sprintf(dbf_text, "%8x", new_mtu); 4078 QETH_CARD_TEXT(card, 4, dbf_text); 4079 4080 if (new_mtu < 64) 4081 return -EINVAL; 4082 if (new_mtu > 65535) 4083 return -EINVAL; 4084 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 4085 (!qeth_mtu_is_valid(card, new_mtu))) 4086 return -EINVAL; 4087 dev->mtu = new_mtu; 4088 return 0; 4089 } 4090 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4091 4092 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4093 { 4094 struct qeth_card *card; 4095 4096 card = dev->ml_priv; 4097 4098 QETH_CARD_TEXT(card, 5, "getstat"); 4099 4100 return &card->stats; 4101 } 4102 EXPORT_SYMBOL_GPL(qeth_get_stats); 4103 4104 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4105 struct qeth_reply *reply, unsigned long data) 4106 { 4107 struct qeth_ipa_cmd *cmd; 4108 4109 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4110 4111 cmd = (struct qeth_ipa_cmd *) data; 4112 if (!card->options.layer2 || 4113 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4114 memcpy(card->dev->dev_addr, 4115 &cmd->data.setadapterparms.data.change_addr.addr, 4116 OSA_ADDR_LEN); 4117 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4118 } 4119 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4120 return 0; 4121 } 4122 4123 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4124 { 4125 int rc; 4126 struct qeth_cmd_buffer *iob; 4127 struct qeth_ipa_cmd *cmd; 4128 4129 QETH_CARD_TEXT(card, 4, "chgmac"); 4130 4131 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4132 sizeof(struct qeth_ipacmd_setadpparms)); 4133 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4134 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4135 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4136 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4137 card->dev->dev_addr, OSA_ADDR_LEN); 4138 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4139 NULL); 4140 return rc; 4141 } 4142 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4143 4144 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4145 struct qeth_reply *reply, unsigned long data) 4146 { 4147 struct qeth_ipa_cmd *cmd; 4148 struct qeth_set_access_ctrl *access_ctrl_req; 4149 int fallback = *(int *)reply->param; 4150 4151 QETH_CARD_TEXT(card, 4, "setaccb"); 4152 4153 cmd = (struct qeth_ipa_cmd *) data; 4154 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4155 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4156 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4157 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4158 cmd->data.setadapterparms.hdr.return_code); 4159 if (cmd->data.setadapterparms.hdr.return_code != 4160 SET_ACCESS_CTRL_RC_SUCCESS) 4161 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4162 card->gdev->dev.kobj.name, 4163 access_ctrl_req->subcmd_code, 4164 cmd->data.setadapterparms.hdr.return_code); 4165 switch (cmd->data.setadapterparms.hdr.return_code) { 4166 case SET_ACCESS_CTRL_RC_SUCCESS: 4167 if (card->options.isolation == ISOLATION_MODE_NONE) { 4168 dev_info(&card->gdev->dev, 4169 "QDIO data connection isolation is deactivated\n"); 4170 } else { 4171 dev_info(&card->gdev->dev, 4172 "QDIO data connection isolation is activated\n"); 4173 } 4174 break; 4175 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4176 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4177 "deactivated\n", dev_name(&card->gdev->dev)); 4178 if (fallback) 4179 card->options.isolation = card->options.prev_isolation; 4180 break; 4181 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4182 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4183 " activated\n", dev_name(&card->gdev->dev)); 4184 if (fallback) 4185 card->options.isolation = card->options.prev_isolation; 4186 break; 4187 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4188 dev_err(&card->gdev->dev, "Adapter does not " 4189 "support QDIO data connection isolation\n"); 4190 break; 4191 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4192 dev_err(&card->gdev->dev, 4193 "Adapter is dedicated. " 4194 "QDIO data connection isolation not supported\n"); 4195 if (fallback) 4196 card->options.isolation = card->options.prev_isolation; 4197 break; 4198 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4199 dev_err(&card->gdev->dev, 4200 "TSO does not permit QDIO data connection isolation\n"); 4201 if (fallback) 4202 card->options.isolation = card->options.prev_isolation; 4203 break; 4204 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4205 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4206 "support reflective relay mode\n"); 4207 if (fallback) 4208 card->options.isolation = card->options.prev_isolation; 4209 break; 4210 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4211 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4212 "enabled at the adjacent switch port"); 4213 if (fallback) 4214 card->options.isolation = card->options.prev_isolation; 4215 break; 4216 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4217 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4218 "at the adjacent switch failed\n"); 4219 break; 4220 default: 4221 /* this should never happen */ 4222 if (fallback) 4223 card->options.isolation = card->options.prev_isolation; 4224 break; 4225 } 4226 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4227 return 0; 4228 } 4229 4230 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4231 enum qeth_ipa_isolation_modes isolation, int fallback) 4232 { 4233 int rc; 4234 struct qeth_cmd_buffer *iob; 4235 struct qeth_ipa_cmd *cmd; 4236 struct qeth_set_access_ctrl *access_ctrl_req; 4237 4238 QETH_CARD_TEXT(card, 4, "setacctl"); 4239 4240 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4241 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4242 4243 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4244 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4245 sizeof(struct qeth_set_access_ctrl)); 4246 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4247 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4248 access_ctrl_req->subcmd_code = isolation; 4249 4250 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4251 &fallback); 4252 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4253 return rc; 4254 } 4255 4256 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4257 { 4258 int rc = 0; 4259 4260 QETH_CARD_TEXT(card, 4, "setactlo"); 4261 4262 if ((card->info.type == QETH_CARD_TYPE_OSD || 4263 card->info.type == QETH_CARD_TYPE_OSX) && 4264 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4265 rc = qeth_setadpparms_set_access_ctrl(card, 4266 card->options.isolation, fallback); 4267 if (rc) { 4268 QETH_DBF_MESSAGE(3, 4269 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4270 card->gdev->dev.kobj.name, 4271 rc); 4272 rc = -EOPNOTSUPP; 4273 } 4274 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4275 card->options.isolation = ISOLATION_MODE_NONE; 4276 4277 dev_err(&card->gdev->dev, "Adapter does not " 4278 "support QDIO data connection isolation\n"); 4279 rc = -EOPNOTSUPP; 4280 } 4281 return rc; 4282 } 4283 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4284 4285 void qeth_tx_timeout(struct net_device *dev) 4286 { 4287 struct qeth_card *card; 4288 4289 card = dev->ml_priv; 4290 QETH_CARD_TEXT(card, 4, "txtimeo"); 4291 card->stats.tx_errors++; 4292 qeth_schedule_recovery(card); 4293 } 4294 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4295 4296 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4297 { 4298 struct qeth_card *card = dev->ml_priv; 4299 int rc = 0; 4300 4301 switch (regnum) { 4302 case MII_BMCR: /* Basic mode control register */ 4303 rc = BMCR_FULLDPLX; 4304 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4305 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4306 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4307 rc |= BMCR_SPEED100; 4308 break; 4309 case MII_BMSR: /* Basic mode status register */ 4310 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4311 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4312 BMSR_100BASE4; 4313 break; 4314 case MII_PHYSID1: /* PHYS ID 1 */ 4315 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4316 dev->dev_addr[2]; 4317 rc = (rc >> 5) & 0xFFFF; 4318 break; 4319 case MII_PHYSID2: /* PHYS ID 2 */ 4320 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4321 break; 4322 case MII_ADVERTISE: /* Advertisement control reg */ 4323 rc = ADVERTISE_ALL; 4324 break; 4325 case MII_LPA: /* Link partner ability reg */ 4326 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4327 LPA_100BASE4 | LPA_LPACK; 4328 break; 4329 case MII_EXPANSION: /* Expansion register */ 4330 break; 4331 case MII_DCOUNTER: /* disconnect counter */ 4332 break; 4333 case MII_FCSCOUNTER: /* false carrier counter */ 4334 break; 4335 case MII_NWAYTEST: /* N-way auto-neg test register */ 4336 break; 4337 case MII_RERRCOUNTER: /* rx error counter */ 4338 rc = card->stats.rx_errors; 4339 break; 4340 case MII_SREVISION: /* silicon revision */ 4341 break; 4342 case MII_RESV1: /* reserved 1 */ 4343 break; 4344 case MII_LBRERROR: /* loopback, rx, bypass error */ 4345 break; 4346 case MII_PHYADDR: /* physical address */ 4347 break; 4348 case MII_RESV2: /* reserved 2 */ 4349 break; 4350 case MII_TPISTATUS: /* TPI status for 10mbps */ 4351 break; 4352 case MII_NCONFIG: /* network interface config */ 4353 break; 4354 default: 4355 break; 4356 } 4357 return rc; 4358 } 4359 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4360 4361 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4362 struct qeth_cmd_buffer *iob, int len, 4363 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4364 unsigned long), 4365 void *reply_param) 4366 { 4367 u16 s1, s2; 4368 4369 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4370 4371 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4372 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4373 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4374 /* adjust PDU length fields in IPA_PDU_HEADER */ 4375 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4376 s2 = (u32) len; 4377 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4378 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4379 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4380 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4381 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4382 reply_cb, reply_param); 4383 } 4384 4385 static int qeth_snmp_command_cb(struct qeth_card *card, 4386 struct qeth_reply *reply, unsigned long sdata) 4387 { 4388 struct qeth_ipa_cmd *cmd; 4389 struct qeth_arp_query_info *qinfo; 4390 struct qeth_snmp_cmd *snmp; 4391 unsigned char *data; 4392 __u16 data_len; 4393 4394 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4395 4396 cmd = (struct qeth_ipa_cmd *) sdata; 4397 data = (unsigned char *)((char *)cmd - reply->offset); 4398 qinfo = (struct qeth_arp_query_info *) reply->param; 4399 snmp = &cmd->data.setadapterparms.data.snmp; 4400 4401 if (cmd->hdr.return_code) { 4402 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4403 return 0; 4404 } 4405 if (cmd->data.setadapterparms.hdr.return_code) { 4406 cmd->hdr.return_code = 4407 cmd->data.setadapterparms.hdr.return_code; 4408 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4409 return 0; 4410 } 4411 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4412 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4413 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4414 else 4415 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4416 4417 /* check if there is enough room in userspace */ 4418 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4419 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4420 cmd->hdr.return_code = IPA_RC_ENOMEM; 4421 return 0; 4422 } 4423 QETH_CARD_TEXT_(card, 4, "snore%i", 4424 cmd->data.setadapterparms.hdr.used_total); 4425 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4426 cmd->data.setadapterparms.hdr.seq_no); 4427 /*copy entries to user buffer*/ 4428 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4429 memcpy(qinfo->udata + qinfo->udata_offset, 4430 (char *)snmp, 4431 data_len + offsetof(struct qeth_snmp_cmd, data)); 4432 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4433 } else { 4434 memcpy(qinfo->udata + qinfo->udata_offset, 4435 (char *)&snmp->request, data_len); 4436 } 4437 qinfo->udata_offset += data_len; 4438 /* check if all replies received ... */ 4439 QETH_CARD_TEXT_(card, 4, "srtot%i", 4440 cmd->data.setadapterparms.hdr.used_total); 4441 QETH_CARD_TEXT_(card, 4, "srseq%i", 4442 cmd->data.setadapterparms.hdr.seq_no); 4443 if (cmd->data.setadapterparms.hdr.seq_no < 4444 cmd->data.setadapterparms.hdr.used_total) 4445 return 1; 4446 return 0; 4447 } 4448 4449 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4450 { 4451 struct qeth_cmd_buffer *iob; 4452 struct qeth_ipa_cmd *cmd; 4453 struct qeth_snmp_ureq *ureq; 4454 unsigned int req_len; 4455 struct qeth_arp_query_info qinfo = {0, }; 4456 int rc = 0; 4457 4458 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4459 4460 if (card->info.guestlan) 4461 return -EOPNOTSUPP; 4462 4463 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4464 (!card->options.layer2)) { 4465 return -EOPNOTSUPP; 4466 } 4467 /* skip 4 bytes (data_len struct member) to get req_len */ 4468 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4469 return -EFAULT; 4470 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4471 sizeof(struct qeth_ipacmd_hdr) - 4472 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4473 return -EINVAL; 4474 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4475 if (IS_ERR(ureq)) { 4476 QETH_CARD_TEXT(card, 2, "snmpnome"); 4477 return PTR_ERR(ureq); 4478 } 4479 qinfo.udata_len = ureq->hdr.data_len; 4480 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4481 if (!qinfo.udata) { 4482 kfree(ureq); 4483 return -ENOMEM; 4484 } 4485 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4486 4487 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4488 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4489 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4490 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4491 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4492 qeth_snmp_command_cb, (void *)&qinfo); 4493 if (rc) 4494 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4495 QETH_CARD_IFNAME(card), rc); 4496 else { 4497 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4498 rc = -EFAULT; 4499 } 4500 4501 kfree(ureq); 4502 kfree(qinfo.udata); 4503 return rc; 4504 } 4505 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4506 4507 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4508 struct qeth_reply *reply, unsigned long data) 4509 { 4510 struct qeth_ipa_cmd *cmd; 4511 struct qeth_qoat_priv *priv; 4512 char *resdata; 4513 int resdatalen; 4514 4515 QETH_CARD_TEXT(card, 3, "qoatcb"); 4516 4517 cmd = (struct qeth_ipa_cmd *)data; 4518 priv = (struct qeth_qoat_priv *)reply->param; 4519 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4520 resdata = (char *)data + 28; 4521 4522 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4523 cmd->hdr.return_code = IPA_RC_FFFF; 4524 return 0; 4525 } 4526 4527 memcpy((priv->buffer + priv->response_len), resdata, 4528 resdatalen); 4529 priv->response_len += resdatalen; 4530 4531 if (cmd->data.setadapterparms.hdr.seq_no < 4532 cmd->data.setadapterparms.hdr.used_total) 4533 return 1; 4534 return 0; 4535 } 4536 4537 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4538 { 4539 int rc = 0; 4540 struct qeth_cmd_buffer *iob; 4541 struct qeth_ipa_cmd *cmd; 4542 struct qeth_query_oat *oat_req; 4543 struct qeth_query_oat_data oat_data; 4544 struct qeth_qoat_priv priv; 4545 void __user *tmp; 4546 4547 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4548 4549 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4550 rc = -EOPNOTSUPP; 4551 goto out; 4552 } 4553 4554 if (copy_from_user(&oat_data, udata, 4555 sizeof(struct qeth_query_oat_data))) { 4556 rc = -EFAULT; 4557 goto out; 4558 } 4559 4560 priv.buffer_len = oat_data.buffer_len; 4561 priv.response_len = 0; 4562 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4563 if (!priv.buffer) { 4564 rc = -ENOMEM; 4565 goto out; 4566 } 4567 4568 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4569 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4570 sizeof(struct qeth_query_oat)); 4571 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4572 oat_req = &cmd->data.setadapterparms.data.query_oat; 4573 oat_req->subcmd_code = oat_data.command; 4574 4575 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4576 &priv); 4577 if (!rc) { 4578 if (is_compat_task()) 4579 tmp = compat_ptr(oat_data.ptr); 4580 else 4581 tmp = (void __user *)(unsigned long)oat_data.ptr; 4582 4583 if (copy_to_user(tmp, priv.buffer, 4584 priv.response_len)) { 4585 rc = -EFAULT; 4586 goto out_free; 4587 } 4588 4589 oat_data.response_len = priv.response_len; 4590 4591 if (copy_to_user(udata, &oat_data, 4592 sizeof(struct qeth_query_oat_data))) 4593 rc = -EFAULT; 4594 } else 4595 if (rc == IPA_RC_FFFF) 4596 rc = -EFAULT; 4597 4598 out_free: 4599 kfree(priv.buffer); 4600 out: 4601 return rc; 4602 } 4603 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4604 4605 static int qeth_query_card_info_cb(struct qeth_card *card, 4606 struct qeth_reply *reply, unsigned long data) 4607 { 4608 struct qeth_ipa_cmd *cmd; 4609 struct qeth_query_card_info *card_info; 4610 struct carrier_info *carrier_info; 4611 4612 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4613 carrier_info = (struct carrier_info *)reply->param; 4614 cmd = (struct qeth_ipa_cmd *)data; 4615 card_info = &cmd->data.setadapterparms.data.card_info; 4616 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4617 carrier_info->card_type = card_info->card_type; 4618 carrier_info->port_mode = card_info->port_mode; 4619 carrier_info->port_speed = card_info->port_speed; 4620 } 4621 4622 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4623 return 0; 4624 } 4625 4626 int qeth_query_card_info(struct qeth_card *card, 4627 struct carrier_info *carrier_info) 4628 { 4629 struct qeth_cmd_buffer *iob; 4630 4631 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4632 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4633 return -EOPNOTSUPP; 4634 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4635 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4636 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4637 (void *)carrier_info); 4638 } 4639 EXPORT_SYMBOL_GPL(qeth_query_card_info); 4640 4641 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4642 { 4643 switch (card->info.type) { 4644 case QETH_CARD_TYPE_IQD: 4645 return 2; 4646 default: 4647 return 0; 4648 } 4649 } 4650 4651 static void qeth_determine_capabilities(struct qeth_card *card) 4652 { 4653 int rc; 4654 int length; 4655 char *prcd; 4656 struct ccw_device *ddev; 4657 int ddev_offline = 0; 4658 4659 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4660 ddev = CARD_DDEV(card); 4661 if (!ddev->online) { 4662 ddev_offline = 1; 4663 rc = ccw_device_set_online(ddev); 4664 if (rc) { 4665 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4666 goto out; 4667 } 4668 } 4669 4670 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4671 if (rc) { 4672 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4673 dev_name(&card->gdev->dev), rc); 4674 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4675 goto out_offline; 4676 } 4677 qeth_configure_unitaddr(card, prcd); 4678 if (ddev_offline) 4679 qeth_configure_blkt_default(card, prcd); 4680 kfree(prcd); 4681 4682 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4683 if (rc) 4684 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4685 4686 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4687 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4688 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4689 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4690 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4691 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4692 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4693 dev_info(&card->gdev->dev, 4694 "Completion Queueing supported\n"); 4695 } else { 4696 card->options.cq = QETH_CQ_NOTAVAILABLE; 4697 } 4698 4699 4700 out_offline: 4701 if (ddev_offline == 1) 4702 ccw_device_set_offline(ddev); 4703 out: 4704 return; 4705 } 4706 4707 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4708 struct qdio_buffer **in_sbal_ptrs, 4709 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4710 int i; 4711 4712 if (card->options.cq == QETH_CQ_ENABLED) { 4713 int offset = QDIO_MAX_BUFFERS_PER_Q * 4714 (card->qdio.no_in_queues - 1); 4715 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4716 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4717 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4718 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4719 } 4720 4721 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4722 } 4723 } 4724 4725 static int qeth_qdio_establish(struct qeth_card *card) 4726 { 4727 struct qdio_initialize init_data; 4728 char *qib_param_field; 4729 struct qdio_buffer **in_sbal_ptrs; 4730 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4731 struct qdio_buffer **out_sbal_ptrs; 4732 int i, j, k; 4733 int rc = 0; 4734 4735 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4736 4737 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4738 GFP_KERNEL); 4739 if (!qib_param_field) { 4740 rc = -ENOMEM; 4741 goto out_free_nothing; 4742 } 4743 4744 qeth_create_qib_param_field(card, qib_param_field); 4745 qeth_create_qib_param_field_blkt(card, qib_param_field); 4746 4747 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4748 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4749 GFP_KERNEL); 4750 if (!in_sbal_ptrs) { 4751 rc = -ENOMEM; 4752 goto out_free_qib_param; 4753 } 4754 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4755 in_sbal_ptrs[i] = (struct qdio_buffer *) 4756 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4757 } 4758 4759 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4760 GFP_KERNEL); 4761 if (!queue_start_poll) { 4762 rc = -ENOMEM; 4763 goto out_free_in_sbals; 4764 } 4765 for (i = 0; i < card->qdio.no_in_queues; ++i) 4766 queue_start_poll[i] = card->discipline->start_poll; 4767 4768 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4769 4770 out_sbal_ptrs = 4771 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4772 sizeof(void *), GFP_KERNEL); 4773 if (!out_sbal_ptrs) { 4774 rc = -ENOMEM; 4775 goto out_free_queue_start_poll; 4776 } 4777 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4778 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4779 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4780 card->qdio.out_qs[i]->bufs[j]->buffer); 4781 } 4782 4783 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4784 init_data.cdev = CARD_DDEV(card); 4785 init_data.q_format = qeth_get_qdio_q_format(card); 4786 init_data.qib_param_field_format = 0; 4787 init_data.qib_param_field = qib_param_field; 4788 init_data.no_input_qs = card->qdio.no_in_queues; 4789 init_data.no_output_qs = card->qdio.no_out_queues; 4790 init_data.input_handler = card->discipline->input_handler; 4791 init_data.output_handler = card->discipline->output_handler; 4792 init_data.queue_start_poll_array = queue_start_poll; 4793 init_data.int_parm = (unsigned long) card; 4794 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4795 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4796 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4797 init_data.scan_threshold = 4798 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 4799 4800 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4801 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4802 rc = qdio_allocate(&init_data); 4803 if (rc) { 4804 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4805 goto out; 4806 } 4807 rc = qdio_establish(&init_data); 4808 if (rc) { 4809 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4810 qdio_free(CARD_DDEV(card)); 4811 } 4812 } 4813 4814 switch (card->options.cq) { 4815 case QETH_CQ_ENABLED: 4816 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4817 break; 4818 case QETH_CQ_DISABLED: 4819 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4820 break; 4821 default: 4822 break; 4823 } 4824 out: 4825 kfree(out_sbal_ptrs); 4826 out_free_queue_start_poll: 4827 kfree(queue_start_poll); 4828 out_free_in_sbals: 4829 kfree(in_sbal_ptrs); 4830 out_free_qib_param: 4831 kfree(qib_param_field); 4832 out_free_nothing: 4833 return rc; 4834 } 4835 4836 static void qeth_core_free_card(struct qeth_card *card) 4837 { 4838 4839 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4840 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4841 qeth_clean_channel(&card->read); 4842 qeth_clean_channel(&card->write); 4843 if (card->dev) 4844 free_netdev(card->dev); 4845 kfree(card->ip_tbd_list); 4846 qeth_free_qdio_buffers(card); 4847 unregister_service_level(&card->qeth_service_level); 4848 kfree(card); 4849 } 4850 4851 void qeth_trace_features(struct qeth_card *card) 4852 { 4853 QETH_CARD_TEXT(card, 2, "features"); 4854 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.supported_funcs); 4855 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa4.enabled_funcs); 4856 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.supported_funcs); 4857 QETH_CARD_TEXT_(card, 2, "%x", card->options.ipa6.enabled_funcs); 4858 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.supported_funcs); 4859 QETH_CARD_TEXT_(card, 2, "%x", card->options.adp.enabled_funcs); 4860 QETH_CARD_TEXT_(card, 2, "%x", card->info.diagass_support); 4861 } 4862 EXPORT_SYMBOL_GPL(qeth_trace_features); 4863 4864 static struct ccw_device_id qeth_ids[] = { 4865 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4866 .driver_info = QETH_CARD_TYPE_OSD}, 4867 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4868 .driver_info = QETH_CARD_TYPE_IQD}, 4869 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4870 .driver_info = QETH_CARD_TYPE_OSN}, 4871 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4872 .driver_info = QETH_CARD_TYPE_OSM}, 4873 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4874 .driver_info = QETH_CARD_TYPE_OSX}, 4875 {}, 4876 }; 4877 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4878 4879 static struct ccw_driver qeth_ccw_driver = { 4880 .driver = { 4881 .owner = THIS_MODULE, 4882 .name = "qeth", 4883 }, 4884 .ids = qeth_ids, 4885 .probe = ccwgroup_probe_ccwdev, 4886 .remove = ccwgroup_remove_ccwdev, 4887 }; 4888 4889 int qeth_core_hardsetup_card(struct qeth_card *card) 4890 { 4891 int retries = 3; 4892 int rc; 4893 4894 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4895 atomic_set(&card->force_alloc_skb, 0); 4896 qeth_update_from_chp_desc(card); 4897 retry: 4898 if (retries < 3) 4899 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4900 dev_name(&card->gdev->dev)); 4901 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4902 ccw_device_set_offline(CARD_DDEV(card)); 4903 ccw_device_set_offline(CARD_WDEV(card)); 4904 ccw_device_set_offline(CARD_RDEV(card)); 4905 qdio_free(CARD_DDEV(card)); 4906 rc = ccw_device_set_online(CARD_RDEV(card)); 4907 if (rc) 4908 goto retriable; 4909 rc = ccw_device_set_online(CARD_WDEV(card)); 4910 if (rc) 4911 goto retriable; 4912 rc = ccw_device_set_online(CARD_DDEV(card)); 4913 if (rc) 4914 goto retriable; 4915 retriable: 4916 if (rc == -ERESTARTSYS) { 4917 QETH_DBF_TEXT(SETUP, 2, "break1"); 4918 return rc; 4919 } else if (rc) { 4920 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4921 if (--retries < 0) 4922 goto out; 4923 else 4924 goto retry; 4925 } 4926 qeth_determine_capabilities(card); 4927 qeth_init_tokens(card); 4928 qeth_init_func_level(card); 4929 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4930 if (rc == -ERESTARTSYS) { 4931 QETH_DBF_TEXT(SETUP, 2, "break2"); 4932 return rc; 4933 } else if (rc) { 4934 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4935 if (--retries < 0) 4936 goto out; 4937 else 4938 goto retry; 4939 } 4940 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4941 if (rc == -ERESTARTSYS) { 4942 QETH_DBF_TEXT(SETUP, 2, "break3"); 4943 return rc; 4944 } else if (rc) { 4945 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4946 if (--retries < 0) 4947 goto out; 4948 else 4949 goto retry; 4950 } 4951 card->read_or_write_problem = 0; 4952 rc = qeth_mpc_initialize(card); 4953 if (rc) { 4954 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4955 goto out; 4956 } 4957 4958 card->options.ipa4.supported_funcs = 0; 4959 card->options.adp.supported_funcs = 0; 4960 card->options.sbp.supported_funcs = 0; 4961 card->info.diagass_support = 0; 4962 qeth_query_ipassists(card, QETH_PROT_IPV4); 4963 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4964 qeth_query_setadapterparms(card); 4965 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4966 qeth_query_setdiagass(card); 4967 return 0; 4968 out: 4969 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4970 "an error on the device\n"); 4971 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4972 dev_name(&card->gdev->dev), rc); 4973 return rc; 4974 } 4975 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4976 4977 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4978 struct qdio_buffer_element *element, 4979 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4980 { 4981 struct page *page = virt_to_page(element->addr); 4982 if (*pskb == NULL) { 4983 if (qethbuffer->rx_skb) { 4984 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4985 *pskb = qethbuffer->rx_skb; 4986 qethbuffer->rx_skb = NULL; 4987 } else { 4988 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4989 if (!(*pskb)) 4990 return -ENOMEM; 4991 } 4992 4993 skb_reserve(*pskb, ETH_HLEN); 4994 if (data_len <= QETH_RX_PULL_LEN) { 4995 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4996 data_len); 4997 } else { 4998 get_page(page); 4999 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 5000 element->addr + offset, QETH_RX_PULL_LEN); 5001 skb_fill_page_desc(*pskb, *pfrag, page, 5002 offset + QETH_RX_PULL_LEN, 5003 data_len - QETH_RX_PULL_LEN); 5004 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5005 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5006 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5007 (*pfrag)++; 5008 } 5009 } else { 5010 get_page(page); 5011 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5012 (*pskb)->data_len += data_len; 5013 (*pskb)->len += data_len; 5014 (*pskb)->truesize += data_len; 5015 (*pfrag)++; 5016 } 5017 5018 5019 return 0; 5020 } 5021 5022 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5023 struct qeth_qdio_buffer *qethbuffer, 5024 struct qdio_buffer_element **__element, int *__offset, 5025 struct qeth_hdr **hdr) 5026 { 5027 struct qdio_buffer_element *element = *__element; 5028 struct qdio_buffer *buffer = qethbuffer->buffer; 5029 int offset = *__offset; 5030 struct sk_buff *skb = NULL; 5031 int skb_len = 0; 5032 void *data_ptr; 5033 int data_len; 5034 int headroom = 0; 5035 int use_rx_sg = 0; 5036 int frag = 0; 5037 5038 /* qeth_hdr must not cross element boundaries */ 5039 if (element->length < offset + sizeof(struct qeth_hdr)) { 5040 if (qeth_is_last_sbale(element)) 5041 return NULL; 5042 element++; 5043 offset = 0; 5044 if (element->length < sizeof(struct qeth_hdr)) 5045 return NULL; 5046 } 5047 *hdr = element->addr + offset; 5048 5049 offset += sizeof(struct qeth_hdr); 5050 switch ((*hdr)->hdr.l2.id) { 5051 case QETH_HEADER_TYPE_LAYER2: 5052 skb_len = (*hdr)->hdr.l2.pkt_length; 5053 break; 5054 case QETH_HEADER_TYPE_LAYER3: 5055 skb_len = (*hdr)->hdr.l3.length; 5056 headroom = ETH_HLEN; 5057 break; 5058 case QETH_HEADER_TYPE_OSN: 5059 skb_len = (*hdr)->hdr.osn.pdu_length; 5060 headroom = sizeof(struct qeth_hdr); 5061 break; 5062 default: 5063 break; 5064 } 5065 5066 if (!skb_len) 5067 return NULL; 5068 5069 if (((skb_len >= card->options.rx_sg_cb) && 5070 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5071 (!atomic_read(&card->force_alloc_skb))) || 5072 (card->options.cq == QETH_CQ_ENABLED)) { 5073 use_rx_sg = 1; 5074 } else { 5075 skb = dev_alloc_skb(skb_len + headroom); 5076 if (!skb) 5077 goto no_mem; 5078 if (headroom) 5079 skb_reserve(skb, headroom); 5080 } 5081 5082 data_ptr = element->addr + offset; 5083 while (skb_len) { 5084 data_len = min(skb_len, (int)(element->length - offset)); 5085 if (data_len) { 5086 if (use_rx_sg) { 5087 if (qeth_create_skb_frag(qethbuffer, element, 5088 &skb, offset, &frag, data_len)) 5089 goto no_mem; 5090 } else { 5091 memcpy(skb_put(skb, data_len), data_ptr, 5092 data_len); 5093 } 5094 } 5095 skb_len -= data_len; 5096 if (skb_len) { 5097 if (qeth_is_last_sbale(element)) { 5098 QETH_CARD_TEXT(card, 4, "unexeob"); 5099 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5100 dev_kfree_skb_any(skb); 5101 card->stats.rx_errors++; 5102 return NULL; 5103 } 5104 element++; 5105 offset = 0; 5106 data_ptr = element->addr; 5107 } else { 5108 offset += data_len; 5109 } 5110 } 5111 *__element = element; 5112 *__offset = offset; 5113 if (use_rx_sg && card->options.performance_stats) { 5114 card->perf_stats.sg_skbs_rx++; 5115 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5116 } 5117 return skb; 5118 no_mem: 5119 if (net_ratelimit()) { 5120 QETH_CARD_TEXT(card, 2, "noskbmem"); 5121 } 5122 card->stats.rx_dropped++; 5123 return NULL; 5124 } 5125 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5126 5127 static void qeth_unregister_dbf_views(void) 5128 { 5129 int x; 5130 for (x = 0; x < QETH_DBF_INFOS; x++) { 5131 debug_unregister(qeth_dbf[x].id); 5132 qeth_dbf[x].id = NULL; 5133 } 5134 } 5135 5136 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5137 { 5138 char dbf_txt_buf[32]; 5139 va_list args; 5140 5141 if (!debug_level_enabled(id, level)) 5142 return; 5143 va_start(args, fmt); 5144 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5145 va_end(args); 5146 debug_text_event(id, level, dbf_txt_buf); 5147 } 5148 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5149 5150 static int qeth_register_dbf_views(void) 5151 { 5152 int ret; 5153 int x; 5154 5155 for (x = 0; x < QETH_DBF_INFOS; x++) { 5156 /* register the areas */ 5157 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5158 qeth_dbf[x].pages, 5159 qeth_dbf[x].areas, 5160 qeth_dbf[x].len); 5161 if (qeth_dbf[x].id == NULL) { 5162 qeth_unregister_dbf_views(); 5163 return -ENOMEM; 5164 } 5165 5166 /* register a view */ 5167 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5168 if (ret) { 5169 qeth_unregister_dbf_views(); 5170 return ret; 5171 } 5172 5173 /* set a passing level */ 5174 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5175 } 5176 5177 return 0; 5178 } 5179 5180 int qeth_core_load_discipline(struct qeth_card *card, 5181 enum qeth_discipline_id discipline) 5182 { 5183 int rc = 0; 5184 mutex_lock(&qeth_mod_mutex); 5185 switch (discipline) { 5186 case QETH_DISCIPLINE_LAYER3: 5187 card->discipline = try_then_request_module( 5188 symbol_get(qeth_l3_discipline), "qeth_l3"); 5189 break; 5190 case QETH_DISCIPLINE_LAYER2: 5191 card->discipline = try_then_request_module( 5192 symbol_get(qeth_l2_discipline), "qeth_l2"); 5193 break; 5194 } 5195 if (!card->discipline) { 5196 dev_err(&card->gdev->dev, "There is no kernel module to " 5197 "support discipline %d\n", discipline); 5198 rc = -EINVAL; 5199 } 5200 mutex_unlock(&qeth_mod_mutex); 5201 return rc; 5202 } 5203 5204 void qeth_core_free_discipline(struct qeth_card *card) 5205 { 5206 if (card->options.layer2) 5207 symbol_put(qeth_l2_discipline); 5208 else 5209 symbol_put(qeth_l3_discipline); 5210 card->discipline = NULL; 5211 } 5212 5213 static const struct device_type qeth_generic_devtype = { 5214 .name = "qeth_generic", 5215 .groups = qeth_generic_attr_groups, 5216 }; 5217 static const struct device_type qeth_osn_devtype = { 5218 .name = "qeth_osn", 5219 .groups = qeth_osn_attr_groups, 5220 }; 5221 5222 #define DBF_NAME_LEN 20 5223 5224 struct qeth_dbf_entry { 5225 char dbf_name[DBF_NAME_LEN]; 5226 debug_info_t *dbf_info; 5227 struct list_head dbf_list; 5228 }; 5229 5230 static LIST_HEAD(qeth_dbf_list); 5231 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5232 5233 static debug_info_t *qeth_get_dbf_entry(char *name) 5234 { 5235 struct qeth_dbf_entry *entry; 5236 debug_info_t *rc = NULL; 5237 5238 mutex_lock(&qeth_dbf_list_mutex); 5239 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5240 if (strcmp(entry->dbf_name, name) == 0) { 5241 rc = entry->dbf_info; 5242 break; 5243 } 5244 } 5245 mutex_unlock(&qeth_dbf_list_mutex); 5246 return rc; 5247 } 5248 5249 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5250 { 5251 struct qeth_dbf_entry *new_entry; 5252 5253 card->debug = debug_register(name, 2, 1, 8); 5254 if (!card->debug) { 5255 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5256 goto err; 5257 } 5258 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5259 goto err_dbg; 5260 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5261 if (!new_entry) 5262 goto err_dbg; 5263 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5264 new_entry->dbf_info = card->debug; 5265 mutex_lock(&qeth_dbf_list_mutex); 5266 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5267 mutex_unlock(&qeth_dbf_list_mutex); 5268 5269 return 0; 5270 5271 err_dbg: 5272 debug_unregister(card->debug); 5273 err: 5274 return -ENOMEM; 5275 } 5276 5277 static void qeth_clear_dbf_list(void) 5278 { 5279 struct qeth_dbf_entry *entry, *tmp; 5280 5281 mutex_lock(&qeth_dbf_list_mutex); 5282 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5283 list_del(&entry->dbf_list); 5284 debug_unregister(entry->dbf_info); 5285 kfree(entry); 5286 } 5287 mutex_unlock(&qeth_dbf_list_mutex); 5288 } 5289 5290 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5291 { 5292 struct qeth_card *card; 5293 struct device *dev; 5294 int rc; 5295 unsigned long flags; 5296 char dbf_name[DBF_NAME_LEN]; 5297 5298 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5299 5300 dev = &gdev->dev; 5301 if (!get_device(dev)) 5302 return -ENODEV; 5303 5304 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5305 5306 card = qeth_alloc_card(); 5307 if (!card) { 5308 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5309 rc = -ENOMEM; 5310 goto err_dev; 5311 } 5312 5313 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5314 dev_name(&gdev->dev)); 5315 card->debug = qeth_get_dbf_entry(dbf_name); 5316 if (!card->debug) { 5317 rc = qeth_add_dbf_entry(card, dbf_name); 5318 if (rc) 5319 goto err_card; 5320 } 5321 5322 card->read.ccwdev = gdev->cdev[0]; 5323 card->write.ccwdev = gdev->cdev[1]; 5324 card->data.ccwdev = gdev->cdev[2]; 5325 dev_set_drvdata(&gdev->dev, card); 5326 card->gdev = gdev; 5327 gdev->cdev[0]->handler = qeth_irq; 5328 gdev->cdev[1]->handler = qeth_irq; 5329 gdev->cdev[2]->handler = qeth_irq; 5330 5331 rc = qeth_determine_card_type(card); 5332 if (rc) { 5333 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5334 goto err_card; 5335 } 5336 rc = qeth_setup_card(card); 5337 if (rc) { 5338 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5339 goto err_card; 5340 } 5341 5342 if (card->info.type == QETH_CARD_TYPE_OSN) 5343 gdev->dev.type = &qeth_osn_devtype; 5344 else 5345 gdev->dev.type = &qeth_generic_devtype; 5346 5347 switch (card->info.type) { 5348 case QETH_CARD_TYPE_OSN: 5349 case QETH_CARD_TYPE_OSM: 5350 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5351 if (rc) 5352 goto err_card; 5353 rc = card->discipline->setup(card->gdev); 5354 if (rc) 5355 goto err_disc; 5356 case QETH_CARD_TYPE_OSD: 5357 case QETH_CARD_TYPE_OSX: 5358 default: 5359 break; 5360 } 5361 5362 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5363 list_add_tail(&card->list, &qeth_core_card_list.list); 5364 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5365 5366 qeth_determine_capabilities(card); 5367 return 0; 5368 5369 err_disc: 5370 qeth_core_free_discipline(card); 5371 err_card: 5372 qeth_core_free_card(card); 5373 err_dev: 5374 put_device(dev); 5375 return rc; 5376 } 5377 5378 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5379 { 5380 unsigned long flags; 5381 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5382 5383 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5384 5385 if (card->discipline) { 5386 card->discipline->remove(gdev); 5387 qeth_core_free_discipline(card); 5388 } 5389 5390 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5391 list_del(&card->list); 5392 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5393 qeth_core_free_card(card); 5394 dev_set_drvdata(&gdev->dev, NULL); 5395 put_device(&gdev->dev); 5396 return; 5397 } 5398 5399 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5400 { 5401 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5402 int rc = 0; 5403 int def_discipline; 5404 5405 if (!card->discipline) { 5406 if (card->info.type == QETH_CARD_TYPE_IQD) 5407 def_discipline = QETH_DISCIPLINE_LAYER3; 5408 else 5409 def_discipline = QETH_DISCIPLINE_LAYER2; 5410 rc = qeth_core_load_discipline(card, def_discipline); 5411 if (rc) 5412 goto err; 5413 rc = card->discipline->setup(card->gdev); 5414 if (rc) 5415 goto err; 5416 } 5417 rc = card->discipline->set_online(gdev); 5418 err: 5419 return rc; 5420 } 5421 5422 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5423 { 5424 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5425 return card->discipline->set_offline(gdev); 5426 } 5427 5428 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5429 { 5430 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5431 if (card->discipline && card->discipline->shutdown) 5432 card->discipline->shutdown(gdev); 5433 } 5434 5435 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5436 { 5437 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5438 if (card->discipline && card->discipline->prepare) 5439 return card->discipline->prepare(gdev); 5440 return 0; 5441 } 5442 5443 static void qeth_core_complete(struct ccwgroup_device *gdev) 5444 { 5445 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5446 if (card->discipline && card->discipline->complete) 5447 card->discipline->complete(gdev); 5448 } 5449 5450 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5451 { 5452 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5453 if (card->discipline && card->discipline->freeze) 5454 return card->discipline->freeze(gdev); 5455 return 0; 5456 } 5457 5458 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5459 { 5460 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5461 if (card->discipline && card->discipline->thaw) 5462 return card->discipline->thaw(gdev); 5463 return 0; 5464 } 5465 5466 static int qeth_core_restore(struct ccwgroup_device *gdev) 5467 { 5468 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5469 if (card->discipline && card->discipline->restore) 5470 return card->discipline->restore(gdev); 5471 return 0; 5472 } 5473 5474 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5475 .driver = { 5476 .owner = THIS_MODULE, 5477 .name = "qeth", 5478 }, 5479 .setup = qeth_core_probe_device, 5480 .remove = qeth_core_remove_device, 5481 .set_online = qeth_core_set_online, 5482 .set_offline = qeth_core_set_offline, 5483 .shutdown = qeth_core_shutdown, 5484 .prepare = qeth_core_prepare, 5485 .complete = qeth_core_complete, 5486 .freeze = qeth_core_freeze, 5487 .thaw = qeth_core_thaw, 5488 .restore = qeth_core_restore, 5489 }; 5490 5491 static ssize_t qeth_core_driver_group_store(struct device_driver *ddrv, 5492 const char *buf, size_t count) 5493 { 5494 int err; 5495 5496 err = ccwgroup_create_dev(qeth_core_root_dev, 5497 &qeth_core_ccwgroup_driver, 3, buf); 5498 5499 return err ? err : count; 5500 } 5501 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5502 5503 static struct attribute *qeth_drv_attrs[] = { 5504 &driver_attr_group.attr, 5505 NULL, 5506 }; 5507 static struct attribute_group qeth_drv_attr_group = { 5508 .attrs = qeth_drv_attrs, 5509 }; 5510 static const struct attribute_group *qeth_drv_attr_groups[] = { 5511 &qeth_drv_attr_group, 5512 NULL, 5513 }; 5514 5515 static struct { 5516 const char str[ETH_GSTRING_LEN]; 5517 } qeth_ethtool_stats_keys[] = { 5518 /* 0 */{"rx skbs"}, 5519 {"rx buffers"}, 5520 {"tx skbs"}, 5521 {"tx buffers"}, 5522 {"tx skbs no packing"}, 5523 {"tx buffers no packing"}, 5524 {"tx skbs packing"}, 5525 {"tx buffers packing"}, 5526 {"tx sg skbs"}, 5527 {"tx sg frags"}, 5528 /* 10 */{"rx sg skbs"}, 5529 {"rx sg frags"}, 5530 {"rx sg page allocs"}, 5531 {"tx large kbytes"}, 5532 {"tx large count"}, 5533 {"tx pk state ch n->p"}, 5534 {"tx pk state ch p->n"}, 5535 {"tx pk watermark low"}, 5536 {"tx pk watermark high"}, 5537 {"queue 0 buffer usage"}, 5538 /* 20 */{"queue 1 buffer usage"}, 5539 {"queue 2 buffer usage"}, 5540 {"queue 3 buffer usage"}, 5541 {"rx poll time"}, 5542 {"rx poll count"}, 5543 {"rx do_QDIO time"}, 5544 {"rx do_QDIO count"}, 5545 {"tx handler time"}, 5546 {"tx handler count"}, 5547 {"tx time"}, 5548 /* 30 */{"tx count"}, 5549 {"tx do_QDIO time"}, 5550 {"tx do_QDIO count"}, 5551 {"tx csum"}, 5552 {"tx lin"}, 5553 {"cq handler count"}, 5554 {"cq handler time"} 5555 }; 5556 5557 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5558 { 5559 switch (stringset) { 5560 case ETH_SS_STATS: 5561 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5562 default: 5563 return -EINVAL; 5564 } 5565 } 5566 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5567 5568 void qeth_core_get_ethtool_stats(struct net_device *dev, 5569 struct ethtool_stats *stats, u64 *data) 5570 { 5571 struct qeth_card *card = dev->ml_priv; 5572 data[0] = card->stats.rx_packets - 5573 card->perf_stats.initial_rx_packets; 5574 data[1] = card->perf_stats.bufs_rec; 5575 data[2] = card->stats.tx_packets - 5576 card->perf_stats.initial_tx_packets; 5577 data[3] = card->perf_stats.bufs_sent; 5578 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5579 - card->perf_stats.skbs_sent_pack; 5580 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5581 data[6] = card->perf_stats.skbs_sent_pack; 5582 data[7] = card->perf_stats.bufs_sent_pack; 5583 data[8] = card->perf_stats.sg_skbs_sent; 5584 data[9] = card->perf_stats.sg_frags_sent; 5585 data[10] = card->perf_stats.sg_skbs_rx; 5586 data[11] = card->perf_stats.sg_frags_rx; 5587 data[12] = card->perf_stats.sg_alloc_page_rx; 5588 data[13] = (card->perf_stats.large_send_bytes >> 10); 5589 data[14] = card->perf_stats.large_send_cnt; 5590 data[15] = card->perf_stats.sc_dp_p; 5591 data[16] = card->perf_stats.sc_p_dp; 5592 data[17] = QETH_LOW_WATERMARK_PACK; 5593 data[18] = QETH_HIGH_WATERMARK_PACK; 5594 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5595 data[20] = (card->qdio.no_out_queues > 1) ? 5596 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5597 data[21] = (card->qdio.no_out_queues > 2) ? 5598 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5599 data[22] = (card->qdio.no_out_queues > 3) ? 5600 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5601 data[23] = card->perf_stats.inbound_time; 5602 data[24] = card->perf_stats.inbound_cnt; 5603 data[25] = card->perf_stats.inbound_do_qdio_time; 5604 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5605 data[27] = card->perf_stats.outbound_handler_time; 5606 data[28] = card->perf_stats.outbound_handler_cnt; 5607 data[29] = card->perf_stats.outbound_time; 5608 data[30] = card->perf_stats.outbound_cnt; 5609 data[31] = card->perf_stats.outbound_do_qdio_time; 5610 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5611 data[33] = card->perf_stats.tx_csum; 5612 data[34] = card->perf_stats.tx_lin; 5613 data[35] = card->perf_stats.cq_cnt; 5614 data[36] = card->perf_stats.cq_time; 5615 } 5616 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5617 5618 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5619 { 5620 switch (stringset) { 5621 case ETH_SS_STATS: 5622 memcpy(data, &qeth_ethtool_stats_keys, 5623 sizeof(qeth_ethtool_stats_keys)); 5624 break; 5625 default: 5626 WARN_ON(1); 5627 break; 5628 } 5629 } 5630 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5631 5632 void qeth_core_get_drvinfo(struct net_device *dev, 5633 struct ethtool_drvinfo *info) 5634 { 5635 struct qeth_card *card = dev->ml_priv; 5636 5637 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 5638 sizeof(info->driver)); 5639 strlcpy(info->version, "1.0", sizeof(info->version)); 5640 strlcpy(info->fw_version, card->info.mcl_level, 5641 sizeof(info->fw_version)); 5642 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 5643 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 5644 } 5645 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5646 5647 /* Helper function to fill 'advertizing' and 'supported' which are the same. */ 5648 /* Autoneg and full-duplex are supported and advertized uncondionally. */ 5649 /* Always advertize and support all speeds up to specified, and only one */ 5650 /* specified port type. */ 5651 static void qeth_set_ecmd_adv_sup(struct ethtool_cmd *ecmd, 5652 int maxspeed, int porttype) 5653 { 5654 int port_sup, port_adv, spd_sup, spd_adv; 5655 5656 switch (porttype) { 5657 case PORT_TP: 5658 port_sup = SUPPORTED_TP; 5659 port_adv = ADVERTISED_TP; 5660 break; 5661 case PORT_FIBRE: 5662 port_sup = SUPPORTED_FIBRE; 5663 port_adv = ADVERTISED_FIBRE; 5664 break; 5665 default: 5666 port_sup = SUPPORTED_TP; 5667 port_adv = ADVERTISED_TP; 5668 WARN_ON_ONCE(1); 5669 } 5670 5671 /* "Fallthrough" case'es ordered from high to low result in setting */ 5672 /* flags cumulatively, starting from the specified speed and down to */ 5673 /* the lowest possible. */ 5674 spd_sup = 0; 5675 spd_adv = 0; 5676 switch (maxspeed) { 5677 case SPEED_10000: 5678 spd_sup |= SUPPORTED_10000baseT_Full; 5679 spd_adv |= ADVERTISED_10000baseT_Full; 5680 case SPEED_1000: 5681 spd_sup |= SUPPORTED_1000baseT_Half | SUPPORTED_1000baseT_Full; 5682 spd_adv |= ADVERTISED_1000baseT_Half | 5683 ADVERTISED_1000baseT_Full; 5684 case SPEED_100: 5685 spd_sup |= SUPPORTED_100baseT_Half | SUPPORTED_100baseT_Full; 5686 spd_adv |= ADVERTISED_100baseT_Half | ADVERTISED_100baseT_Full; 5687 case SPEED_10: 5688 spd_sup |= SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5689 spd_adv |= ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5690 break; 5691 default: 5692 spd_sup = SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full; 5693 spd_adv = ADVERTISED_10baseT_Half | ADVERTISED_10baseT_Full; 5694 WARN_ON_ONCE(1); 5695 } 5696 ecmd->advertising = ADVERTISED_Autoneg | port_adv | spd_adv; 5697 ecmd->supported = SUPPORTED_Autoneg | port_sup | spd_sup; 5698 } 5699 5700 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5701 struct ethtool_cmd *ecmd) 5702 { 5703 struct qeth_card *card = netdev->ml_priv; 5704 enum qeth_link_types link_type; 5705 struct carrier_info carrier_info; 5706 5707 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5708 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5709 else 5710 link_type = card->info.link_type; 5711 5712 ecmd->transceiver = XCVR_INTERNAL; 5713 ecmd->duplex = DUPLEX_FULL; 5714 ecmd->autoneg = AUTONEG_ENABLE; 5715 5716 switch (link_type) { 5717 case QETH_LINK_TYPE_FAST_ETH: 5718 case QETH_LINK_TYPE_LANE_ETH100: 5719 qeth_set_ecmd_adv_sup(ecmd, SPEED_100, PORT_TP); 5720 ecmd->speed = SPEED_100; 5721 ecmd->port = PORT_TP; 5722 break; 5723 5724 case QETH_LINK_TYPE_GBIT_ETH: 5725 case QETH_LINK_TYPE_LANE_ETH1000: 5726 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5727 ecmd->speed = SPEED_1000; 5728 ecmd->port = PORT_FIBRE; 5729 break; 5730 5731 case QETH_LINK_TYPE_10GBIT_ETH: 5732 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5733 ecmd->speed = SPEED_10000; 5734 ecmd->port = PORT_FIBRE; 5735 break; 5736 5737 default: 5738 qeth_set_ecmd_adv_sup(ecmd, SPEED_10, PORT_TP); 5739 ecmd->speed = SPEED_10; 5740 ecmd->port = PORT_TP; 5741 } 5742 5743 /* Check if we can obtain more accurate information. */ 5744 /* If QUERY_CARD_INFO command is not supported or fails, */ 5745 /* just return the heuristics that was filled above. */ 5746 if (qeth_query_card_info(card, &carrier_info) != 0) 5747 return 0; 5748 5749 netdev_dbg(netdev, 5750 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 5751 carrier_info.card_type, 5752 carrier_info.port_mode, 5753 carrier_info.port_speed); 5754 5755 /* Update attributes for which we've obtained more authoritative */ 5756 /* information, leave the rest the way they where filled above. */ 5757 switch (carrier_info.card_type) { 5758 case CARD_INFO_TYPE_1G_COPPER_A: 5759 case CARD_INFO_TYPE_1G_COPPER_B: 5760 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_TP); 5761 ecmd->port = PORT_TP; 5762 break; 5763 case CARD_INFO_TYPE_1G_FIBRE_A: 5764 case CARD_INFO_TYPE_1G_FIBRE_B: 5765 qeth_set_ecmd_adv_sup(ecmd, SPEED_1000, PORT_FIBRE); 5766 ecmd->port = PORT_FIBRE; 5767 break; 5768 case CARD_INFO_TYPE_10G_FIBRE_A: 5769 case CARD_INFO_TYPE_10G_FIBRE_B: 5770 qeth_set_ecmd_adv_sup(ecmd, SPEED_10000, PORT_FIBRE); 5771 ecmd->port = PORT_FIBRE; 5772 break; 5773 } 5774 5775 switch (carrier_info.port_mode) { 5776 case CARD_INFO_PORTM_FULLDUPLEX: 5777 ecmd->duplex = DUPLEX_FULL; 5778 break; 5779 case CARD_INFO_PORTM_HALFDUPLEX: 5780 ecmd->duplex = DUPLEX_HALF; 5781 break; 5782 } 5783 5784 switch (carrier_info.port_speed) { 5785 case CARD_INFO_PORTS_10M: 5786 ecmd->speed = SPEED_10; 5787 break; 5788 case CARD_INFO_PORTS_100M: 5789 ecmd->speed = SPEED_100; 5790 break; 5791 case CARD_INFO_PORTS_1G: 5792 ecmd->speed = SPEED_1000; 5793 break; 5794 case CARD_INFO_PORTS_10G: 5795 ecmd->speed = SPEED_10000; 5796 break; 5797 } 5798 5799 return 0; 5800 } 5801 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5802 5803 static int __init qeth_core_init(void) 5804 { 5805 int rc; 5806 5807 pr_info("loading core functions\n"); 5808 INIT_LIST_HEAD(&qeth_core_card_list.list); 5809 INIT_LIST_HEAD(&qeth_dbf_list); 5810 rwlock_init(&qeth_core_card_list.rwlock); 5811 mutex_init(&qeth_mod_mutex); 5812 5813 qeth_wq = create_singlethread_workqueue("qeth_wq"); 5814 5815 rc = qeth_register_dbf_views(); 5816 if (rc) 5817 goto out_err; 5818 qeth_core_root_dev = root_device_register("qeth"); 5819 rc = PTR_RET(qeth_core_root_dev); 5820 if (rc) 5821 goto register_err; 5822 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5823 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5824 if (!qeth_core_header_cache) { 5825 rc = -ENOMEM; 5826 goto slab_err; 5827 } 5828 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5829 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5830 if (!qeth_qdio_outbuf_cache) { 5831 rc = -ENOMEM; 5832 goto cqslab_err; 5833 } 5834 rc = ccw_driver_register(&qeth_ccw_driver); 5835 if (rc) 5836 goto ccw_err; 5837 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 5838 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5839 if (rc) 5840 goto ccwgroup_err; 5841 5842 return 0; 5843 5844 ccwgroup_err: 5845 ccw_driver_unregister(&qeth_ccw_driver); 5846 ccw_err: 5847 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5848 cqslab_err: 5849 kmem_cache_destroy(qeth_core_header_cache); 5850 slab_err: 5851 root_device_unregister(qeth_core_root_dev); 5852 register_err: 5853 qeth_unregister_dbf_views(); 5854 out_err: 5855 pr_err("Initializing the qeth device driver failed\n"); 5856 return rc; 5857 } 5858 5859 static void __exit qeth_core_exit(void) 5860 { 5861 qeth_clear_dbf_list(); 5862 destroy_workqueue(qeth_wq); 5863 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5864 ccw_driver_unregister(&qeth_ccw_driver); 5865 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5866 kmem_cache_destroy(qeth_core_header_cache); 5867 root_device_unregister(qeth_core_root_dev); 5868 qeth_unregister_dbf_views(); 5869 pr_info("core functions removed\n"); 5870 } 5871 5872 module_init(qeth_core_init); 5873 module_exit(qeth_core_exit); 5874 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5875 MODULE_DESCRIPTION("qeth core functions"); 5876 MODULE_LICENSE("GPL"); 5877