1 /* 2 * Copyright IBM Corp. 2007, 2009 3 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 4 * Frank Pavlic <fpavlic@de.ibm.com>, 5 * Thomas Spatzier <tspat@de.ibm.com>, 6 * Frank Blaschka <frank.blaschka@de.ibm.com> 7 */ 8 9 #define KMSG_COMPONENT "qeth" 10 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 11 12 #include <linux/module.h> 13 #include <linux/moduleparam.h> 14 #include <linux/string.h> 15 #include <linux/errno.h> 16 #include <linux/kernel.h> 17 #include <linux/ip.h> 18 #include <linux/tcp.h> 19 #include <linux/mii.h> 20 #include <linux/kthread.h> 21 #include <linux/slab.h> 22 #include <net/iucv/af_iucv.h> 23 #include <net/dsfield.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/chpid.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 #include <asm/compat.h> 30 #include <asm/diag.h> 31 #include <asm/cio.h> 32 #include <asm/ccwdev.h> 33 34 #include "qeth_core.h" 35 36 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 37 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 38 /* N P A M L V H */ 39 [QETH_DBF_SETUP] = {"qeth_setup", 40 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 41 [QETH_DBF_MSG] = {"qeth_msg", 8, 1, 11 * sizeof(long), 3, 42 &debug_sprintf_view, NULL}, 43 [QETH_DBF_CTRL] = {"qeth_control", 44 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 45 }; 46 EXPORT_SYMBOL_GPL(qeth_dbf); 47 48 struct qeth_card_list_struct qeth_core_card_list; 49 EXPORT_SYMBOL_GPL(qeth_core_card_list); 50 struct kmem_cache *qeth_core_header_cache; 51 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 52 static struct kmem_cache *qeth_qdio_outbuf_cache; 53 54 static struct device *qeth_core_root_dev; 55 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 56 static struct lock_class_key qdio_out_skb_queue_key; 57 static struct mutex qeth_mod_mutex; 58 59 static void qeth_send_control_data_cb(struct qeth_channel *, 60 struct qeth_cmd_buffer *); 61 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 62 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 63 static void qeth_free_buffer_pool(struct qeth_card *); 64 static int qeth_qdio_establish(struct qeth_card *); 65 static void qeth_free_qdio_buffers(struct qeth_card *); 66 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 67 struct qeth_qdio_out_buffer *buf, 68 enum iucv_tx_notify notification); 69 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 70 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 71 struct qeth_qdio_out_buffer *buf, 72 enum qeth_qdio_buffer_states newbufstate); 73 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 74 75 struct workqueue_struct *qeth_wq; 76 EXPORT_SYMBOL_GPL(qeth_wq); 77 78 int qeth_card_hw_is_reachable(struct qeth_card *card) 79 { 80 return (card->state == CARD_STATE_SOFTSETUP) || 81 (card->state == CARD_STATE_UP); 82 } 83 EXPORT_SYMBOL_GPL(qeth_card_hw_is_reachable); 84 85 static void qeth_close_dev_handler(struct work_struct *work) 86 { 87 struct qeth_card *card; 88 89 card = container_of(work, struct qeth_card, close_dev_work); 90 QETH_CARD_TEXT(card, 2, "cldevhdl"); 91 rtnl_lock(); 92 dev_close(card->dev); 93 rtnl_unlock(); 94 ccwgroup_set_offline(card->gdev); 95 } 96 97 void qeth_close_dev(struct qeth_card *card) 98 { 99 QETH_CARD_TEXT(card, 2, "cldevsubm"); 100 queue_work(qeth_wq, &card->close_dev_work); 101 } 102 EXPORT_SYMBOL_GPL(qeth_close_dev); 103 104 static const char *qeth_get_cardname(struct qeth_card *card) 105 { 106 if (card->info.guestlan) { 107 switch (card->info.type) { 108 case QETH_CARD_TYPE_OSD: 109 return " Virtual NIC QDIO"; 110 case QETH_CARD_TYPE_IQD: 111 return " Virtual NIC Hiper"; 112 case QETH_CARD_TYPE_OSM: 113 return " Virtual NIC QDIO - OSM"; 114 case QETH_CARD_TYPE_OSX: 115 return " Virtual NIC QDIO - OSX"; 116 default: 117 return " unknown"; 118 } 119 } else { 120 switch (card->info.type) { 121 case QETH_CARD_TYPE_OSD: 122 return " OSD Express"; 123 case QETH_CARD_TYPE_IQD: 124 return " HiperSockets"; 125 case QETH_CARD_TYPE_OSN: 126 return " OSN QDIO"; 127 case QETH_CARD_TYPE_OSM: 128 return " OSM QDIO"; 129 case QETH_CARD_TYPE_OSX: 130 return " OSX QDIO"; 131 default: 132 return " unknown"; 133 } 134 } 135 return " n/a"; 136 } 137 138 /* max length to be returned: 14 */ 139 const char *qeth_get_cardname_short(struct qeth_card *card) 140 { 141 if (card->info.guestlan) { 142 switch (card->info.type) { 143 case QETH_CARD_TYPE_OSD: 144 return "Virt.NIC QDIO"; 145 case QETH_CARD_TYPE_IQD: 146 return "Virt.NIC Hiper"; 147 case QETH_CARD_TYPE_OSM: 148 return "Virt.NIC OSM"; 149 case QETH_CARD_TYPE_OSX: 150 return "Virt.NIC OSX"; 151 default: 152 return "unknown"; 153 } 154 } else { 155 switch (card->info.type) { 156 case QETH_CARD_TYPE_OSD: 157 switch (card->info.link_type) { 158 case QETH_LINK_TYPE_FAST_ETH: 159 return "OSD_100"; 160 case QETH_LINK_TYPE_HSTR: 161 return "HSTR"; 162 case QETH_LINK_TYPE_GBIT_ETH: 163 return "OSD_1000"; 164 case QETH_LINK_TYPE_10GBIT_ETH: 165 return "OSD_10GIG"; 166 case QETH_LINK_TYPE_LANE_ETH100: 167 return "OSD_FE_LANE"; 168 case QETH_LINK_TYPE_LANE_TR: 169 return "OSD_TR_LANE"; 170 case QETH_LINK_TYPE_LANE_ETH1000: 171 return "OSD_GbE_LANE"; 172 case QETH_LINK_TYPE_LANE: 173 return "OSD_ATM_LANE"; 174 default: 175 return "OSD_Express"; 176 } 177 case QETH_CARD_TYPE_IQD: 178 return "HiperSockets"; 179 case QETH_CARD_TYPE_OSN: 180 return "OSN"; 181 case QETH_CARD_TYPE_OSM: 182 return "OSM_1000"; 183 case QETH_CARD_TYPE_OSX: 184 return "OSX_10GIG"; 185 default: 186 return "unknown"; 187 } 188 } 189 return "n/a"; 190 } 191 192 void qeth_set_recovery_task(struct qeth_card *card) 193 { 194 card->recovery_task = current; 195 } 196 EXPORT_SYMBOL_GPL(qeth_set_recovery_task); 197 198 void qeth_clear_recovery_task(struct qeth_card *card) 199 { 200 card->recovery_task = NULL; 201 } 202 EXPORT_SYMBOL_GPL(qeth_clear_recovery_task); 203 204 static bool qeth_is_recovery_task(const struct qeth_card *card) 205 { 206 return card->recovery_task == current; 207 } 208 209 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 210 int clear_start_mask) 211 { 212 unsigned long flags; 213 214 spin_lock_irqsave(&card->thread_mask_lock, flags); 215 card->thread_allowed_mask = threads; 216 if (clear_start_mask) 217 card->thread_start_mask &= threads; 218 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 219 wake_up(&card->wait_q); 220 } 221 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 222 223 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 224 { 225 unsigned long flags; 226 int rc = 0; 227 228 spin_lock_irqsave(&card->thread_mask_lock, flags); 229 rc = (card->thread_running_mask & threads); 230 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 231 return rc; 232 } 233 EXPORT_SYMBOL_GPL(qeth_threads_running); 234 235 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 236 { 237 if (qeth_is_recovery_task(card)) 238 return 0; 239 return wait_event_interruptible(card->wait_q, 240 qeth_threads_running(card, threads) == 0); 241 } 242 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 243 244 void qeth_clear_working_pool_list(struct qeth_card *card) 245 { 246 struct qeth_buffer_pool_entry *pool_entry, *tmp; 247 248 QETH_CARD_TEXT(card, 5, "clwrklst"); 249 list_for_each_entry_safe(pool_entry, tmp, 250 &card->qdio.in_buf_pool.entry_list, list){ 251 list_del(&pool_entry->list); 252 } 253 } 254 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 255 256 static int qeth_alloc_buffer_pool(struct qeth_card *card) 257 { 258 struct qeth_buffer_pool_entry *pool_entry; 259 void *ptr; 260 int i, j; 261 262 QETH_CARD_TEXT(card, 5, "alocpool"); 263 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 264 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 265 if (!pool_entry) { 266 qeth_free_buffer_pool(card); 267 return -ENOMEM; 268 } 269 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 270 ptr = (void *) __get_free_page(GFP_KERNEL); 271 if (!ptr) { 272 while (j > 0) 273 free_page((unsigned long) 274 pool_entry->elements[--j]); 275 kfree(pool_entry); 276 qeth_free_buffer_pool(card); 277 return -ENOMEM; 278 } 279 pool_entry->elements[j] = ptr; 280 } 281 list_add(&pool_entry->init_list, 282 &card->qdio.init_pool.entry_list); 283 } 284 return 0; 285 } 286 287 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 288 { 289 QETH_CARD_TEXT(card, 2, "realcbp"); 290 291 if ((card->state != CARD_STATE_DOWN) && 292 (card->state != CARD_STATE_RECOVER)) 293 return -EPERM; 294 295 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 296 qeth_clear_working_pool_list(card); 297 qeth_free_buffer_pool(card); 298 card->qdio.in_buf_pool.buf_count = bufcnt; 299 card->qdio.init_pool.buf_count = bufcnt; 300 return qeth_alloc_buffer_pool(card); 301 } 302 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 303 304 static void qeth_free_qdio_queue(struct qeth_qdio_q *q) 305 { 306 if (!q) 307 return; 308 309 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 310 kfree(q); 311 } 312 313 static struct qeth_qdio_q *qeth_alloc_qdio_queue(void) 314 { 315 struct qeth_qdio_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 316 int i; 317 318 if (!q) 319 return NULL; 320 321 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 322 kfree(q); 323 return NULL; 324 } 325 326 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 327 q->bufs[i].buffer = q->qdio_bufs[i]; 328 329 QETH_DBF_HEX(SETUP, 2, &q, sizeof(void *)); 330 return q; 331 } 332 333 static int qeth_cq_init(struct qeth_card *card) 334 { 335 int rc; 336 337 if (card->options.cq == QETH_CQ_ENABLED) { 338 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 339 qdio_reset_buffers(card->qdio.c_q->qdio_bufs, 340 QDIO_MAX_BUFFERS_PER_Q); 341 card->qdio.c_q->next_buf_to_init = 127; 342 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 343 card->qdio.no_in_queues - 1, 0, 344 127); 345 if (rc) { 346 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 347 goto out; 348 } 349 } 350 rc = 0; 351 out: 352 return rc; 353 } 354 355 static int qeth_alloc_cq(struct qeth_card *card) 356 { 357 int rc; 358 359 if (card->options.cq == QETH_CQ_ENABLED) { 360 int i; 361 struct qdio_outbuf_state *outbuf_states; 362 363 QETH_DBF_TEXT(SETUP, 2, "cqon"); 364 card->qdio.c_q = qeth_alloc_qdio_queue(); 365 if (!card->qdio.c_q) { 366 rc = -1; 367 goto kmsg_out; 368 } 369 card->qdio.no_in_queues = 2; 370 card->qdio.out_bufstates = 371 kzalloc(card->qdio.no_out_queues * 372 QDIO_MAX_BUFFERS_PER_Q * 373 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 374 outbuf_states = card->qdio.out_bufstates; 375 if (outbuf_states == NULL) { 376 rc = -1; 377 goto free_cq_out; 378 } 379 for (i = 0; i < card->qdio.no_out_queues; ++i) { 380 card->qdio.out_qs[i]->bufstates = outbuf_states; 381 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 382 } 383 } else { 384 QETH_DBF_TEXT(SETUP, 2, "nocq"); 385 card->qdio.c_q = NULL; 386 card->qdio.no_in_queues = 1; 387 } 388 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 389 rc = 0; 390 out: 391 return rc; 392 free_cq_out: 393 qeth_free_qdio_queue(card->qdio.c_q); 394 card->qdio.c_q = NULL; 395 kmsg_out: 396 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 397 goto out; 398 } 399 400 static void qeth_free_cq(struct qeth_card *card) 401 { 402 if (card->qdio.c_q) { 403 --card->qdio.no_in_queues; 404 qeth_free_qdio_queue(card->qdio.c_q); 405 card->qdio.c_q = NULL; 406 } 407 kfree(card->qdio.out_bufstates); 408 card->qdio.out_bufstates = NULL; 409 } 410 411 static enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 412 int delayed) 413 { 414 enum iucv_tx_notify n; 415 416 switch (sbalf15) { 417 case 0: 418 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 419 break; 420 case 4: 421 case 16: 422 case 17: 423 case 18: 424 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 425 TX_NOTIFY_UNREACHABLE; 426 break; 427 default: 428 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 429 TX_NOTIFY_GENERALERROR; 430 break; 431 } 432 433 return n; 434 } 435 436 static void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, int bidx, 437 int forced_cleanup) 438 { 439 if (q->card->options.cq != QETH_CQ_ENABLED) 440 return; 441 442 if (q->bufs[bidx]->next_pending != NULL) { 443 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 444 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 445 446 while (c) { 447 if (forced_cleanup || 448 atomic_read(&c->state) == 449 QETH_QDIO_BUF_HANDLED_DELAYED) { 450 struct qeth_qdio_out_buffer *f = c; 451 QETH_CARD_TEXT(f->q->card, 5, "fp"); 452 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 453 /* release here to avoid interleaving between 454 outbound tasklet and inbound tasklet 455 regarding notifications and lifecycle */ 456 qeth_release_skbs(c); 457 458 c = f->next_pending; 459 WARN_ON_ONCE(head->next_pending != f); 460 head->next_pending = c; 461 kmem_cache_free(qeth_qdio_outbuf_cache, f); 462 } else { 463 head = c; 464 c = c->next_pending; 465 } 466 467 } 468 } 469 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 470 QETH_QDIO_BUF_HANDLED_DELAYED)) { 471 /* for recovery situations */ 472 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 473 qeth_init_qdio_out_buf(q, bidx); 474 QETH_CARD_TEXT(q->card, 2, "clprecov"); 475 } 476 } 477 478 479 static void qeth_qdio_handle_aob(struct qeth_card *card, 480 unsigned long phys_aob_addr) 481 { 482 struct qaob *aob; 483 struct qeth_qdio_out_buffer *buffer; 484 enum iucv_tx_notify notification; 485 486 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 487 QETH_CARD_TEXT(card, 5, "haob"); 488 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 489 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 490 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 491 492 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 493 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 494 notification = TX_NOTIFY_OK; 495 } else { 496 WARN_ON_ONCE(atomic_read(&buffer->state) != 497 QETH_QDIO_BUF_PENDING); 498 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 499 notification = TX_NOTIFY_DELAYED_OK; 500 } 501 502 if (aob->aorc != 0) { 503 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 504 notification = qeth_compute_cq_notification(aob->aorc, 1); 505 } 506 qeth_notify_skbs(buffer->q, buffer, notification); 507 508 buffer->aob = NULL; 509 qeth_clear_output_buffer(buffer->q, buffer, 510 QETH_QDIO_BUF_HANDLED_DELAYED); 511 512 /* from here on: do not touch buffer anymore */ 513 qdio_release_aob(aob); 514 } 515 516 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 517 { 518 return card->options.cq == QETH_CQ_ENABLED && 519 card->qdio.c_q != NULL && 520 queue != 0 && 521 queue == card->qdio.no_in_queues - 1; 522 } 523 524 525 static int qeth_issue_next_read(struct qeth_card *card) 526 { 527 int rc; 528 struct qeth_cmd_buffer *iob; 529 530 QETH_CARD_TEXT(card, 5, "issnxrd"); 531 if (card->read.state != CH_STATE_UP) 532 return -EIO; 533 iob = qeth_get_buffer(&card->read); 534 if (!iob) { 535 dev_warn(&card->gdev->dev, "The qeth device driver " 536 "failed to recover an error on the device\n"); 537 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 538 "available\n", dev_name(&card->gdev->dev)); 539 return -ENOMEM; 540 } 541 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 542 QETH_CARD_TEXT(card, 6, "noirqpnd"); 543 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 544 (addr_t) iob, 0, 0); 545 if (rc) { 546 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 547 "rc=%i\n", dev_name(&card->gdev->dev), rc); 548 atomic_set(&card->read.irq_pending, 0); 549 card->read_or_write_problem = 1; 550 qeth_schedule_recovery(card); 551 wake_up(&card->wait_q); 552 } 553 return rc; 554 } 555 556 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 557 { 558 struct qeth_reply *reply; 559 560 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 561 if (reply) { 562 atomic_set(&reply->refcnt, 1); 563 atomic_set(&reply->received, 0); 564 reply->card = card; 565 } 566 return reply; 567 } 568 569 static void qeth_get_reply(struct qeth_reply *reply) 570 { 571 WARN_ON(atomic_read(&reply->refcnt) <= 0); 572 atomic_inc(&reply->refcnt); 573 } 574 575 static void qeth_put_reply(struct qeth_reply *reply) 576 { 577 WARN_ON(atomic_read(&reply->refcnt) <= 0); 578 if (atomic_dec_and_test(&reply->refcnt)) 579 kfree(reply); 580 } 581 582 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 583 struct qeth_card *card) 584 { 585 char *ipa_name; 586 int com = cmd->hdr.command; 587 ipa_name = qeth_get_ipa_cmd_name(com); 588 if (rc) 589 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 590 "x%X \"%s\"\n", 591 ipa_name, com, dev_name(&card->gdev->dev), 592 QETH_CARD_IFNAME(card), rc, 593 qeth_get_ipa_msg(rc)); 594 else 595 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 596 ipa_name, com, dev_name(&card->gdev->dev), 597 QETH_CARD_IFNAME(card)); 598 } 599 600 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 601 struct qeth_cmd_buffer *iob) 602 { 603 struct qeth_ipa_cmd *cmd = NULL; 604 605 QETH_CARD_TEXT(card, 5, "chkipad"); 606 if (IS_IPA(iob->data)) { 607 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 608 if (IS_IPA_REPLY(cmd)) { 609 if (cmd->hdr.command != IPA_CMD_SETCCID && 610 cmd->hdr.command != IPA_CMD_DELCCID && 611 cmd->hdr.command != IPA_CMD_MODCCID && 612 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 613 qeth_issue_ipa_msg(cmd, 614 cmd->hdr.return_code, card); 615 return cmd; 616 } else { 617 switch (cmd->hdr.command) { 618 case IPA_CMD_STOPLAN: 619 if (cmd->hdr.return_code == 620 IPA_RC_VEPA_TO_VEB_TRANSITION) { 621 dev_err(&card->gdev->dev, 622 "Interface %s is down because the " 623 "adjacent port is no longer in " 624 "reflective relay mode\n", 625 QETH_CARD_IFNAME(card)); 626 qeth_close_dev(card); 627 } else { 628 dev_warn(&card->gdev->dev, 629 "The link for interface %s on CHPID" 630 " 0x%X failed\n", 631 QETH_CARD_IFNAME(card), 632 card->info.chpid); 633 qeth_issue_ipa_msg(cmd, 634 cmd->hdr.return_code, card); 635 } 636 card->lan_online = 0; 637 if (card->dev && netif_carrier_ok(card->dev)) 638 netif_carrier_off(card->dev); 639 return NULL; 640 case IPA_CMD_STARTLAN: 641 dev_info(&card->gdev->dev, 642 "The link for %s on CHPID 0x%X has" 643 " been restored\n", 644 QETH_CARD_IFNAME(card), 645 card->info.chpid); 646 netif_carrier_on(card->dev); 647 card->lan_online = 1; 648 if (card->info.hwtrap) 649 card->info.hwtrap = 2; 650 qeth_schedule_recovery(card); 651 return NULL; 652 case IPA_CMD_SETBRIDGEPORT_IQD: 653 case IPA_CMD_SETBRIDGEPORT_OSA: 654 case IPA_CMD_ADDRESS_CHANGE_NOTIF: 655 if (card->discipline->control_event_handler 656 (card, cmd)) 657 return cmd; 658 else 659 return NULL; 660 case IPA_CMD_MODCCID: 661 return cmd; 662 case IPA_CMD_REGISTER_LOCAL_ADDR: 663 QETH_CARD_TEXT(card, 3, "irla"); 664 break; 665 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 666 QETH_CARD_TEXT(card, 3, "urla"); 667 break; 668 default: 669 QETH_DBF_MESSAGE(2, "Received data is IPA " 670 "but not a reply!\n"); 671 break; 672 } 673 } 674 } 675 return cmd; 676 } 677 678 void qeth_clear_ipacmd_list(struct qeth_card *card) 679 { 680 struct qeth_reply *reply, *r; 681 unsigned long flags; 682 683 QETH_CARD_TEXT(card, 4, "clipalst"); 684 685 spin_lock_irqsave(&card->lock, flags); 686 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 687 qeth_get_reply(reply); 688 reply->rc = -EIO; 689 atomic_inc(&reply->received); 690 list_del_init(&reply->list); 691 wake_up(&reply->wait_q); 692 qeth_put_reply(reply); 693 } 694 spin_unlock_irqrestore(&card->lock, flags); 695 atomic_set(&card->write.irq_pending, 0); 696 } 697 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 698 699 static int qeth_check_idx_response(struct qeth_card *card, 700 unsigned char *buffer) 701 { 702 if (!buffer) 703 return 0; 704 705 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 706 if ((buffer[2] & 0xc0) == 0xc0) { 707 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 708 "with cause code 0x%02x%s\n", 709 buffer[4], 710 ((buffer[4] == 0x22) ? 711 " -- try another portname" : "")); 712 QETH_CARD_TEXT(card, 2, "ckidxres"); 713 QETH_CARD_TEXT(card, 2, " idxterm"); 714 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 715 if (buffer[4] == 0xf6) { 716 dev_err(&card->gdev->dev, 717 "The qeth device is not configured " 718 "for the OSI layer required by z/VM\n"); 719 return -EPERM; 720 } 721 return -EIO; 722 } 723 return 0; 724 } 725 726 static struct qeth_card *CARD_FROM_CDEV(struct ccw_device *cdev) 727 { 728 struct qeth_card *card = dev_get_drvdata(&((struct ccwgroup_device *) 729 dev_get_drvdata(&cdev->dev))->dev); 730 return card; 731 } 732 733 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 734 __u32 len) 735 { 736 struct qeth_card *card; 737 738 card = CARD_FROM_CDEV(channel->ccwdev); 739 QETH_CARD_TEXT(card, 4, "setupccw"); 740 if (channel == &card->read) 741 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 742 else 743 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 744 channel->ccw.count = len; 745 channel->ccw.cda = (__u32) __pa(iob); 746 } 747 748 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 749 { 750 __u8 index; 751 752 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 753 index = channel->io_buf_no; 754 do { 755 if (channel->iob[index].state == BUF_STATE_FREE) { 756 channel->iob[index].state = BUF_STATE_LOCKED; 757 channel->io_buf_no = (channel->io_buf_no + 1) % 758 QETH_CMD_BUFFER_NO; 759 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 760 return channel->iob + index; 761 } 762 index = (index + 1) % QETH_CMD_BUFFER_NO; 763 } while (index != channel->io_buf_no); 764 765 return NULL; 766 } 767 768 void qeth_release_buffer(struct qeth_channel *channel, 769 struct qeth_cmd_buffer *iob) 770 { 771 unsigned long flags; 772 773 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 774 spin_lock_irqsave(&channel->iob_lock, flags); 775 memset(iob->data, 0, QETH_BUFSIZE); 776 iob->state = BUF_STATE_FREE; 777 iob->callback = qeth_send_control_data_cb; 778 iob->rc = 0; 779 spin_unlock_irqrestore(&channel->iob_lock, flags); 780 wake_up(&channel->wait_q); 781 } 782 EXPORT_SYMBOL_GPL(qeth_release_buffer); 783 784 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 785 { 786 struct qeth_cmd_buffer *buffer = NULL; 787 unsigned long flags; 788 789 spin_lock_irqsave(&channel->iob_lock, flags); 790 buffer = __qeth_get_buffer(channel); 791 spin_unlock_irqrestore(&channel->iob_lock, flags); 792 return buffer; 793 } 794 795 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 796 { 797 struct qeth_cmd_buffer *buffer; 798 wait_event(channel->wait_q, 799 ((buffer = qeth_get_buffer(channel)) != NULL)); 800 return buffer; 801 } 802 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 803 804 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 805 { 806 int cnt; 807 808 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 809 qeth_release_buffer(channel, &channel->iob[cnt]); 810 channel->buf_no = 0; 811 channel->io_buf_no = 0; 812 } 813 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 814 815 static void qeth_send_control_data_cb(struct qeth_channel *channel, 816 struct qeth_cmd_buffer *iob) 817 { 818 struct qeth_card *card; 819 struct qeth_reply *reply, *r; 820 struct qeth_ipa_cmd *cmd; 821 unsigned long flags; 822 int keep_reply; 823 int rc = 0; 824 825 card = CARD_FROM_CDEV(channel->ccwdev); 826 QETH_CARD_TEXT(card, 4, "sndctlcb"); 827 rc = qeth_check_idx_response(card, iob->data); 828 switch (rc) { 829 case 0: 830 break; 831 case -EIO: 832 qeth_clear_ipacmd_list(card); 833 qeth_schedule_recovery(card); 834 /* fall through */ 835 default: 836 goto out; 837 } 838 839 cmd = qeth_check_ipa_data(card, iob); 840 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 841 goto out; 842 /*in case of OSN : check if cmd is set */ 843 if (card->info.type == QETH_CARD_TYPE_OSN && 844 cmd && 845 cmd->hdr.command != IPA_CMD_STARTLAN && 846 card->osn_info.assist_cb != NULL) { 847 card->osn_info.assist_cb(card->dev, cmd); 848 goto out; 849 } 850 851 spin_lock_irqsave(&card->lock, flags); 852 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 853 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 854 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 855 qeth_get_reply(reply); 856 list_del_init(&reply->list); 857 spin_unlock_irqrestore(&card->lock, flags); 858 keep_reply = 0; 859 if (reply->callback != NULL) { 860 if (cmd) { 861 reply->offset = (__u16)((char *)cmd - 862 (char *)iob->data); 863 keep_reply = reply->callback(card, 864 reply, 865 (unsigned long)cmd); 866 } else 867 keep_reply = reply->callback(card, 868 reply, 869 (unsigned long)iob); 870 } 871 if (cmd) 872 reply->rc = (u16) cmd->hdr.return_code; 873 else if (iob->rc) 874 reply->rc = iob->rc; 875 if (keep_reply) { 876 spin_lock_irqsave(&card->lock, flags); 877 list_add_tail(&reply->list, 878 &card->cmd_waiter_list); 879 spin_unlock_irqrestore(&card->lock, flags); 880 } else { 881 atomic_inc(&reply->received); 882 wake_up(&reply->wait_q); 883 } 884 qeth_put_reply(reply); 885 goto out; 886 } 887 } 888 spin_unlock_irqrestore(&card->lock, flags); 889 out: 890 memcpy(&card->seqno.pdu_hdr_ack, 891 QETH_PDU_HEADER_SEQ_NO(iob->data), 892 QETH_SEQ_NO_LENGTH); 893 qeth_release_buffer(channel, iob); 894 } 895 896 static int qeth_setup_channel(struct qeth_channel *channel) 897 { 898 int cnt; 899 900 QETH_DBF_TEXT(SETUP, 2, "setupch"); 901 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 902 channel->iob[cnt].data = 903 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 904 if (channel->iob[cnt].data == NULL) 905 break; 906 channel->iob[cnt].state = BUF_STATE_FREE; 907 channel->iob[cnt].channel = channel; 908 channel->iob[cnt].callback = qeth_send_control_data_cb; 909 channel->iob[cnt].rc = 0; 910 } 911 if (cnt < QETH_CMD_BUFFER_NO) { 912 while (cnt-- > 0) 913 kfree(channel->iob[cnt].data); 914 return -ENOMEM; 915 } 916 channel->buf_no = 0; 917 channel->io_buf_no = 0; 918 atomic_set(&channel->irq_pending, 0); 919 spin_lock_init(&channel->iob_lock); 920 921 init_waitqueue_head(&channel->wait_q); 922 return 0; 923 } 924 925 static int qeth_set_thread_start_bit(struct qeth_card *card, 926 unsigned long thread) 927 { 928 unsigned long flags; 929 930 spin_lock_irqsave(&card->thread_mask_lock, flags); 931 if (!(card->thread_allowed_mask & thread) || 932 (card->thread_start_mask & thread)) { 933 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 934 return -EPERM; 935 } 936 card->thread_start_mask |= thread; 937 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 938 return 0; 939 } 940 941 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 942 { 943 unsigned long flags; 944 945 spin_lock_irqsave(&card->thread_mask_lock, flags); 946 card->thread_start_mask &= ~thread; 947 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 948 wake_up(&card->wait_q); 949 } 950 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 951 952 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 953 { 954 unsigned long flags; 955 956 spin_lock_irqsave(&card->thread_mask_lock, flags); 957 card->thread_running_mask &= ~thread; 958 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 959 wake_up(&card->wait_q); 960 } 961 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 962 963 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 964 { 965 unsigned long flags; 966 int rc = 0; 967 968 spin_lock_irqsave(&card->thread_mask_lock, flags); 969 if (card->thread_start_mask & thread) { 970 if ((card->thread_allowed_mask & thread) && 971 !(card->thread_running_mask & thread)) { 972 rc = 1; 973 card->thread_start_mask &= ~thread; 974 card->thread_running_mask |= thread; 975 } else 976 rc = -EPERM; 977 } 978 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 979 return rc; 980 } 981 982 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 983 { 984 int rc = 0; 985 986 wait_event(card->wait_q, 987 (rc = __qeth_do_run_thread(card, thread)) >= 0); 988 return rc; 989 } 990 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 991 992 void qeth_schedule_recovery(struct qeth_card *card) 993 { 994 QETH_CARD_TEXT(card, 2, "startrec"); 995 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 996 schedule_work(&card->kernel_thread_starter); 997 } 998 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 999 1000 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 1001 { 1002 int dstat, cstat; 1003 char *sense; 1004 struct qeth_card *card; 1005 1006 sense = (char *) irb->ecw; 1007 cstat = irb->scsw.cmd.cstat; 1008 dstat = irb->scsw.cmd.dstat; 1009 card = CARD_FROM_CDEV(cdev); 1010 1011 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 1012 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 1013 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 1014 QETH_CARD_TEXT(card, 2, "CGENCHK"); 1015 dev_warn(&cdev->dev, "The qeth device driver " 1016 "failed to recover an error on the device\n"); 1017 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 1018 dev_name(&cdev->dev), dstat, cstat); 1019 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 1020 16, 1, irb, 64, 1); 1021 return 1; 1022 } 1023 1024 if (dstat & DEV_STAT_UNIT_CHECK) { 1025 if (sense[SENSE_RESETTING_EVENT_BYTE] & 1026 SENSE_RESETTING_EVENT_FLAG) { 1027 QETH_CARD_TEXT(card, 2, "REVIND"); 1028 return 1; 1029 } 1030 if (sense[SENSE_COMMAND_REJECT_BYTE] & 1031 SENSE_COMMAND_REJECT_FLAG) { 1032 QETH_CARD_TEXT(card, 2, "CMDREJi"); 1033 return 1; 1034 } 1035 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 1036 QETH_CARD_TEXT(card, 2, "AFFE"); 1037 return 1; 1038 } 1039 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 1040 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 1041 return 0; 1042 } 1043 QETH_CARD_TEXT(card, 2, "DGENCHK"); 1044 return 1; 1045 } 1046 return 0; 1047 } 1048 1049 static long __qeth_check_irb_error(struct ccw_device *cdev, 1050 unsigned long intparm, struct irb *irb) 1051 { 1052 struct qeth_card *card; 1053 1054 card = CARD_FROM_CDEV(cdev); 1055 1056 if (!card || !IS_ERR(irb)) 1057 return 0; 1058 1059 switch (PTR_ERR(irb)) { 1060 case -EIO: 1061 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 1062 dev_name(&cdev->dev)); 1063 QETH_CARD_TEXT(card, 2, "ckirberr"); 1064 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 1065 break; 1066 case -ETIMEDOUT: 1067 dev_warn(&cdev->dev, "A hardware operation timed out" 1068 " on the device\n"); 1069 QETH_CARD_TEXT(card, 2, "ckirberr"); 1070 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 1071 if (intparm == QETH_RCD_PARM) { 1072 if (card->data.ccwdev == cdev) { 1073 card->data.state = CH_STATE_DOWN; 1074 wake_up(&card->wait_q); 1075 } 1076 } 1077 break; 1078 default: 1079 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 1080 dev_name(&cdev->dev), PTR_ERR(irb)); 1081 QETH_CARD_TEXT(card, 2, "ckirberr"); 1082 QETH_CARD_TEXT(card, 2, " rc???"); 1083 } 1084 return PTR_ERR(irb); 1085 } 1086 1087 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 1088 struct irb *irb) 1089 { 1090 int rc; 1091 int cstat, dstat; 1092 struct qeth_cmd_buffer *buffer; 1093 struct qeth_channel *channel; 1094 struct qeth_card *card; 1095 struct qeth_cmd_buffer *iob; 1096 __u8 index; 1097 1098 if (__qeth_check_irb_error(cdev, intparm, irb)) 1099 return; 1100 cstat = irb->scsw.cmd.cstat; 1101 dstat = irb->scsw.cmd.dstat; 1102 1103 card = CARD_FROM_CDEV(cdev); 1104 if (!card) 1105 return; 1106 1107 QETH_CARD_TEXT(card, 5, "irq"); 1108 1109 if (card->read.ccwdev == cdev) { 1110 channel = &card->read; 1111 QETH_CARD_TEXT(card, 5, "read"); 1112 } else if (card->write.ccwdev == cdev) { 1113 channel = &card->write; 1114 QETH_CARD_TEXT(card, 5, "write"); 1115 } else { 1116 channel = &card->data; 1117 QETH_CARD_TEXT(card, 5, "data"); 1118 } 1119 atomic_set(&channel->irq_pending, 0); 1120 1121 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1122 channel->state = CH_STATE_STOPPED; 1123 1124 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1125 channel->state = CH_STATE_HALTED; 1126 1127 /*let's wake up immediately on data channel*/ 1128 if ((channel == &card->data) && (intparm != 0) && 1129 (intparm != QETH_RCD_PARM)) 1130 goto out; 1131 1132 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1133 QETH_CARD_TEXT(card, 6, "clrchpar"); 1134 /* we don't have to handle this further */ 1135 intparm = 0; 1136 } 1137 if (intparm == QETH_HALT_CHANNEL_PARM) { 1138 QETH_CARD_TEXT(card, 6, "hltchpar"); 1139 /* we don't have to handle this further */ 1140 intparm = 0; 1141 } 1142 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1143 (dstat & DEV_STAT_UNIT_CHECK) || 1144 (cstat)) { 1145 if (irb->esw.esw0.erw.cons) { 1146 dev_warn(&channel->ccwdev->dev, 1147 "The qeth device driver failed to recover " 1148 "an error on the device\n"); 1149 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1150 "0x%X dstat 0x%X\n", 1151 dev_name(&channel->ccwdev->dev), cstat, dstat); 1152 print_hex_dump(KERN_WARNING, "qeth: irb ", 1153 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1154 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1155 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1156 } 1157 if (intparm == QETH_RCD_PARM) { 1158 channel->state = CH_STATE_DOWN; 1159 goto out; 1160 } 1161 rc = qeth_get_problem(cdev, irb); 1162 if (rc) { 1163 qeth_clear_ipacmd_list(card); 1164 qeth_schedule_recovery(card); 1165 goto out; 1166 } 1167 } 1168 1169 if (intparm == QETH_RCD_PARM) { 1170 channel->state = CH_STATE_RCD_DONE; 1171 goto out; 1172 } 1173 if (intparm) { 1174 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1175 buffer->state = BUF_STATE_PROCESSED; 1176 } 1177 if (channel == &card->data) 1178 return; 1179 if (channel == &card->read && 1180 channel->state == CH_STATE_UP) 1181 qeth_issue_next_read(card); 1182 1183 iob = channel->iob; 1184 index = channel->buf_no; 1185 while (iob[index].state == BUF_STATE_PROCESSED) { 1186 if (iob[index].callback != NULL) 1187 iob[index].callback(channel, iob + index); 1188 1189 index = (index + 1) % QETH_CMD_BUFFER_NO; 1190 } 1191 channel->buf_no = index; 1192 out: 1193 wake_up(&card->wait_q); 1194 return; 1195 } 1196 1197 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1198 struct qeth_qdio_out_buffer *buf, 1199 enum iucv_tx_notify notification) 1200 { 1201 struct sk_buff *skb; 1202 1203 if (skb_queue_empty(&buf->skb_list)) 1204 goto out; 1205 skb = skb_peek(&buf->skb_list); 1206 while (skb) { 1207 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1208 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1209 if (be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) { 1210 if (skb->sk) { 1211 struct iucv_sock *iucv = iucv_sk(skb->sk); 1212 iucv->sk_txnotify(skb, notification); 1213 } 1214 } 1215 if (skb_queue_is_last(&buf->skb_list, skb)) 1216 skb = NULL; 1217 else 1218 skb = skb_queue_next(&buf->skb_list, skb); 1219 } 1220 out: 1221 return; 1222 } 1223 1224 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1225 { 1226 struct sk_buff *skb; 1227 struct iucv_sock *iucv; 1228 int notify_general_error = 0; 1229 1230 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1231 notify_general_error = 1; 1232 1233 /* release may never happen from within CQ tasklet scope */ 1234 WARN_ON_ONCE(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1235 1236 skb = skb_dequeue(&buf->skb_list); 1237 while (skb) { 1238 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1239 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1240 if (notify_general_error && 1241 be16_to_cpu(skb->protocol) == ETH_P_AF_IUCV) { 1242 if (skb->sk) { 1243 iucv = iucv_sk(skb->sk); 1244 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1245 } 1246 } 1247 refcount_dec(&skb->users); 1248 dev_kfree_skb_any(skb); 1249 skb = skb_dequeue(&buf->skb_list); 1250 } 1251 } 1252 1253 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1254 struct qeth_qdio_out_buffer *buf, 1255 enum qeth_qdio_buffer_states newbufstate) 1256 { 1257 int i; 1258 1259 /* is PCI flag set on buffer? */ 1260 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1261 atomic_dec(&queue->set_pci_flags_count); 1262 1263 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1264 qeth_release_skbs(buf); 1265 } 1266 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1267 if (buf->buffer->element[i].addr && buf->is_header[i]) 1268 kmem_cache_free(qeth_core_header_cache, 1269 buf->buffer->element[i].addr); 1270 buf->is_header[i] = 0; 1271 buf->buffer->element[i].length = 0; 1272 buf->buffer->element[i].addr = NULL; 1273 buf->buffer->element[i].eflags = 0; 1274 buf->buffer->element[i].sflags = 0; 1275 } 1276 buf->buffer->element[15].eflags = 0; 1277 buf->buffer->element[15].sflags = 0; 1278 buf->next_element_to_fill = 0; 1279 atomic_set(&buf->state, newbufstate); 1280 } 1281 1282 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1283 { 1284 int j; 1285 1286 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1287 if (!q->bufs[j]) 1288 continue; 1289 qeth_cleanup_handled_pending(q, j, 1); 1290 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1291 if (free) { 1292 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1293 q->bufs[j] = NULL; 1294 } 1295 } 1296 } 1297 1298 void qeth_clear_qdio_buffers(struct qeth_card *card) 1299 { 1300 int i; 1301 1302 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1303 /* clear outbound buffers to free skbs */ 1304 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1305 if (card->qdio.out_qs[i]) { 1306 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1307 } 1308 } 1309 } 1310 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1311 1312 static void qeth_free_buffer_pool(struct qeth_card *card) 1313 { 1314 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1315 int i = 0; 1316 list_for_each_entry_safe(pool_entry, tmp, 1317 &card->qdio.init_pool.entry_list, init_list){ 1318 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1319 free_page((unsigned long)pool_entry->elements[i]); 1320 list_del(&pool_entry->init_list); 1321 kfree(pool_entry); 1322 } 1323 } 1324 1325 static void qeth_clean_channel(struct qeth_channel *channel) 1326 { 1327 int cnt; 1328 1329 QETH_DBF_TEXT(SETUP, 2, "freech"); 1330 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1331 kfree(channel->iob[cnt].data); 1332 } 1333 1334 static void qeth_set_single_write_queues(struct qeth_card *card) 1335 { 1336 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1337 (card->qdio.no_out_queues == 4)) 1338 qeth_free_qdio_buffers(card); 1339 1340 card->qdio.no_out_queues = 1; 1341 if (card->qdio.default_out_queue != 0) 1342 dev_info(&card->gdev->dev, "Priority Queueing not supported\n"); 1343 1344 card->qdio.default_out_queue = 0; 1345 } 1346 1347 static void qeth_set_multiple_write_queues(struct qeth_card *card) 1348 { 1349 if ((atomic_read(&card->qdio.state) != QETH_QDIO_UNINITIALIZED) && 1350 (card->qdio.no_out_queues == 1)) { 1351 qeth_free_qdio_buffers(card); 1352 card->qdio.default_out_queue = 2; 1353 } 1354 card->qdio.no_out_queues = 4; 1355 } 1356 1357 static void qeth_update_from_chp_desc(struct qeth_card *card) 1358 { 1359 struct ccw_device *ccwdev; 1360 struct channel_path_desc *chp_dsc; 1361 1362 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1363 1364 ccwdev = card->data.ccwdev; 1365 chp_dsc = ccw_device_get_chp_desc(ccwdev, 0); 1366 if (!chp_dsc) 1367 goto out; 1368 1369 card->info.func_level = 0x4100 + chp_dsc->desc; 1370 if (card->info.type == QETH_CARD_TYPE_IQD) 1371 goto out; 1372 1373 /* CHPP field bit 6 == 1 -> single queue */ 1374 if ((chp_dsc->chpp & 0x02) == 0x02) 1375 qeth_set_single_write_queues(card); 1376 else 1377 qeth_set_multiple_write_queues(card); 1378 out: 1379 kfree(chp_dsc); 1380 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1381 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1382 } 1383 1384 static void qeth_init_qdio_info(struct qeth_card *card) 1385 { 1386 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1387 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1388 /* inbound */ 1389 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1390 if (card->info.type == QETH_CARD_TYPE_IQD) 1391 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1392 else 1393 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1394 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1395 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1396 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1397 } 1398 1399 static void qeth_set_intial_options(struct qeth_card *card) 1400 { 1401 card->options.route4.type = NO_ROUTER; 1402 card->options.route6.type = NO_ROUTER; 1403 card->options.fake_broadcast = 0; 1404 card->options.performance_stats = 0; 1405 card->options.rx_sg_cb = QETH_RX_SG_CB; 1406 card->options.isolation = ISOLATION_MODE_NONE; 1407 card->options.cq = QETH_CQ_DISABLED; 1408 } 1409 1410 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1411 { 1412 unsigned long flags; 1413 int rc = 0; 1414 1415 spin_lock_irqsave(&card->thread_mask_lock, flags); 1416 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1417 (u8) card->thread_start_mask, 1418 (u8) card->thread_allowed_mask, 1419 (u8) card->thread_running_mask); 1420 rc = (card->thread_start_mask & thread); 1421 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1422 return rc; 1423 } 1424 1425 static void qeth_start_kernel_thread(struct work_struct *work) 1426 { 1427 struct task_struct *ts; 1428 struct qeth_card *card = container_of(work, struct qeth_card, 1429 kernel_thread_starter); 1430 QETH_CARD_TEXT(card , 2, "strthrd"); 1431 1432 if (card->read.state != CH_STATE_UP && 1433 card->write.state != CH_STATE_UP) 1434 return; 1435 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1436 ts = kthread_run(card->discipline->recover, (void *)card, 1437 "qeth_recover"); 1438 if (IS_ERR(ts)) { 1439 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1440 qeth_clear_thread_running_bit(card, 1441 QETH_RECOVER_THREAD); 1442 } 1443 } 1444 } 1445 1446 static void qeth_buffer_reclaim_work(struct work_struct *); 1447 static int qeth_setup_card(struct qeth_card *card) 1448 { 1449 1450 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1451 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1452 1453 card->read.state = CH_STATE_DOWN; 1454 card->write.state = CH_STATE_DOWN; 1455 card->data.state = CH_STATE_DOWN; 1456 card->state = CARD_STATE_DOWN; 1457 card->lan_online = 0; 1458 card->read_or_write_problem = 0; 1459 card->dev = NULL; 1460 spin_lock_init(&card->vlanlock); 1461 spin_lock_init(&card->mclock); 1462 spin_lock_init(&card->lock); 1463 spin_lock_init(&card->ip_lock); 1464 spin_lock_init(&card->thread_mask_lock); 1465 mutex_init(&card->conf_mutex); 1466 mutex_init(&card->discipline_mutex); 1467 card->thread_start_mask = 0; 1468 card->thread_allowed_mask = 0; 1469 card->thread_running_mask = 0; 1470 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1471 INIT_LIST_HEAD(&card->cmd_waiter_list); 1472 init_waitqueue_head(&card->wait_q); 1473 /* initial options */ 1474 qeth_set_intial_options(card); 1475 /* IP address takeover */ 1476 INIT_LIST_HEAD(&card->ipato.entries); 1477 card->ipato.enabled = 0; 1478 card->ipato.invert4 = 0; 1479 card->ipato.invert6 = 0; 1480 /* init QDIO stuff */ 1481 qeth_init_qdio_info(card); 1482 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1483 INIT_WORK(&card->close_dev_work, qeth_close_dev_handler); 1484 return 0; 1485 } 1486 1487 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1488 { 1489 struct qeth_card *card = container_of(slr, struct qeth_card, 1490 qeth_service_level); 1491 if (card->info.mcl_level[0]) 1492 seq_printf(m, "qeth: %s firmware level %s\n", 1493 CARD_BUS_ID(card), card->info.mcl_level); 1494 } 1495 1496 static struct qeth_card *qeth_alloc_card(void) 1497 { 1498 struct qeth_card *card; 1499 1500 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1501 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1502 if (!card) 1503 goto out; 1504 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1505 if (qeth_setup_channel(&card->read)) 1506 goto out_ip; 1507 if (qeth_setup_channel(&card->write)) 1508 goto out_channel; 1509 card->options.layer2 = -1; 1510 card->qeth_service_level.seq_print = qeth_core_sl_print; 1511 register_service_level(&card->qeth_service_level); 1512 return card; 1513 1514 out_channel: 1515 qeth_clean_channel(&card->read); 1516 out_ip: 1517 kfree(card); 1518 out: 1519 return NULL; 1520 } 1521 1522 static int qeth_determine_card_type(struct qeth_card *card) 1523 { 1524 int i = 0; 1525 1526 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1527 1528 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1529 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1530 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1531 if ((CARD_RDEV(card)->id.dev_type == 1532 known_devices[i][QETH_DEV_TYPE_IND]) && 1533 (CARD_RDEV(card)->id.dev_model == 1534 known_devices[i][QETH_DEV_MODEL_IND])) { 1535 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1536 card->qdio.no_out_queues = 1537 known_devices[i][QETH_QUEUE_NO_IND]; 1538 card->qdio.no_in_queues = 1; 1539 card->info.is_multicast_different = 1540 known_devices[i][QETH_MULTICAST_IND]; 1541 qeth_update_from_chp_desc(card); 1542 return 0; 1543 } 1544 i++; 1545 } 1546 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1547 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1548 "unknown type\n"); 1549 return -ENOENT; 1550 } 1551 1552 static int qeth_clear_channel(struct qeth_channel *channel) 1553 { 1554 unsigned long flags; 1555 struct qeth_card *card; 1556 int rc; 1557 1558 card = CARD_FROM_CDEV(channel->ccwdev); 1559 QETH_CARD_TEXT(card, 3, "clearch"); 1560 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1561 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1562 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1563 1564 if (rc) 1565 return rc; 1566 rc = wait_event_interruptible_timeout(card->wait_q, 1567 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1568 if (rc == -ERESTARTSYS) 1569 return rc; 1570 if (channel->state != CH_STATE_STOPPED) 1571 return -ETIME; 1572 channel->state = CH_STATE_DOWN; 1573 return 0; 1574 } 1575 1576 static int qeth_halt_channel(struct qeth_channel *channel) 1577 { 1578 unsigned long flags; 1579 struct qeth_card *card; 1580 int rc; 1581 1582 card = CARD_FROM_CDEV(channel->ccwdev); 1583 QETH_CARD_TEXT(card, 3, "haltch"); 1584 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1585 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1586 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1587 1588 if (rc) 1589 return rc; 1590 rc = wait_event_interruptible_timeout(card->wait_q, 1591 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1592 if (rc == -ERESTARTSYS) 1593 return rc; 1594 if (channel->state != CH_STATE_HALTED) 1595 return -ETIME; 1596 return 0; 1597 } 1598 1599 static int qeth_halt_channels(struct qeth_card *card) 1600 { 1601 int rc1 = 0, rc2 = 0, rc3 = 0; 1602 1603 QETH_CARD_TEXT(card, 3, "haltchs"); 1604 rc1 = qeth_halt_channel(&card->read); 1605 rc2 = qeth_halt_channel(&card->write); 1606 rc3 = qeth_halt_channel(&card->data); 1607 if (rc1) 1608 return rc1; 1609 if (rc2) 1610 return rc2; 1611 return rc3; 1612 } 1613 1614 static int qeth_clear_channels(struct qeth_card *card) 1615 { 1616 int rc1 = 0, rc2 = 0, rc3 = 0; 1617 1618 QETH_CARD_TEXT(card, 3, "clearchs"); 1619 rc1 = qeth_clear_channel(&card->read); 1620 rc2 = qeth_clear_channel(&card->write); 1621 rc3 = qeth_clear_channel(&card->data); 1622 if (rc1) 1623 return rc1; 1624 if (rc2) 1625 return rc2; 1626 return rc3; 1627 } 1628 1629 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1630 { 1631 int rc = 0; 1632 1633 QETH_CARD_TEXT(card, 3, "clhacrd"); 1634 1635 if (halt) 1636 rc = qeth_halt_channels(card); 1637 if (rc) 1638 return rc; 1639 return qeth_clear_channels(card); 1640 } 1641 1642 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1643 { 1644 int rc = 0; 1645 1646 QETH_CARD_TEXT(card, 3, "qdioclr"); 1647 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1648 QETH_QDIO_CLEANING)) { 1649 case QETH_QDIO_ESTABLISHED: 1650 if (card->info.type == QETH_CARD_TYPE_IQD) 1651 rc = qdio_shutdown(CARD_DDEV(card), 1652 QDIO_FLAG_CLEANUP_USING_HALT); 1653 else 1654 rc = qdio_shutdown(CARD_DDEV(card), 1655 QDIO_FLAG_CLEANUP_USING_CLEAR); 1656 if (rc) 1657 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1658 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1659 break; 1660 case QETH_QDIO_CLEANING: 1661 return rc; 1662 default: 1663 break; 1664 } 1665 rc = qeth_clear_halt_card(card, use_halt); 1666 if (rc) 1667 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1668 card->state = CARD_STATE_DOWN; 1669 return rc; 1670 } 1671 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1672 1673 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1674 int *length) 1675 { 1676 struct ciw *ciw; 1677 char *rcd_buf; 1678 int ret; 1679 struct qeth_channel *channel = &card->data; 1680 unsigned long flags; 1681 1682 /* 1683 * scan for RCD command in extended SenseID data 1684 */ 1685 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1686 if (!ciw || ciw->cmd == 0) 1687 return -EOPNOTSUPP; 1688 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1689 if (!rcd_buf) 1690 return -ENOMEM; 1691 1692 channel->ccw.cmd_code = ciw->cmd; 1693 channel->ccw.cda = (__u32) __pa(rcd_buf); 1694 channel->ccw.count = ciw->count; 1695 channel->ccw.flags = CCW_FLAG_SLI; 1696 channel->state = CH_STATE_RCD; 1697 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1698 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1699 QETH_RCD_PARM, LPM_ANYPATH, 0, 1700 QETH_RCD_TIMEOUT); 1701 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1702 if (!ret) 1703 wait_event(card->wait_q, 1704 (channel->state == CH_STATE_RCD_DONE || 1705 channel->state == CH_STATE_DOWN)); 1706 if (channel->state == CH_STATE_DOWN) 1707 ret = -EIO; 1708 else 1709 channel->state = CH_STATE_DOWN; 1710 if (ret) { 1711 kfree(rcd_buf); 1712 *buffer = NULL; 1713 *length = 0; 1714 } else { 1715 *length = ciw->count; 1716 *buffer = rcd_buf; 1717 } 1718 return ret; 1719 } 1720 1721 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1722 { 1723 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1724 card->info.chpid = prcd[30]; 1725 card->info.unit_addr2 = prcd[31]; 1726 card->info.cula = prcd[63]; 1727 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1728 (prcd[0x11] == _ascebc['M'])); 1729 } 1730 1731 /* Determine whether the device requires a specific layer discipline */ 1732 static enum qeth_discipline_id qeth_enforce_discipline(struct qeth_card *card) 1733 { 1734 if (card->info.type == QETH_CARD_TYPE_OSM || 1735 card->info.type == QETH_CARD_TYPE_OSN) { 1736 QETH_DBF_TEXT(SETUP, 3, "force l2"); 1737 return QETH_DISCIPLINE_LAYER2; 1738 } 1739 1740 /* virtual HiperSocket is L3 only: */ 1741 if (card->info.guestlan && card->info.type == QETH_CARD_TYPE_IQD) { 1742 QETH_DBF_TEXT(SETUP, 3, "force l3"); 1743 return QETH_DISCIPLINE_LAYER3; 1744 } 1745 1746 QETH_DBF_TEXT(SETUP, 3, "force no"); 1747 return QETH_DISCIPLINE_UNDETERMINED; 1748 } 1749 1750 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1751 { 1752 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1753 1754 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1755 prcd[76] >= 0xF1 && prcd[76] <= 0xF4) { 1756 card->info.blkt.time_total = 0; 1757 card->info.blkt.inter_packet = 0; 1758 card->info.blkt.inter_packet_jumbo = 0; 1759 } else { 1760 card->info.blkt.time_total = 250; 1761 card->info.blkt.inter_packet = 5; 1762 card->info.blkt.inter_packet_jumbo = 15; 1763 } 1764 } 1765 1766 static void qeth_init_tokens(struct qeth_card *card) 1767 { 1768 card->token.issuer_rm_w = 0x00010103UL; 1769 card->token.cm_filter_w = 0x00010108UL; 1770 card->token.cm_connection_w = 0x0001010aUL; 1771 card->token.ulp_filter_w = 0x0001010bUL; 1772 card->token.ulp_connection_w = 0x0001010dUL; 1773 } 1774 1775 static void qeth_init_func_level(struct qeth_card *card) 1776 { 1777 switch (card->info.type) { 1778 case QETH_CARD_TYPE_IQD: 1779 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1780 break; 1781 case QETH_CARD_TYPE_OSD: 1782 case QETH_CARD_TYPE_OSN: 1783 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1784 break; 1785 default: 1786 break; 1787 } 1788 } 1789 1790 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1791 void (*idx_reply_cb)(struct qeth_channel *, 1792 struct qeth_cmd_buffer *)) 1793 { 1794 struct qeth_cmd_buffer *iob; 1795 unsigned long flags; 1796 int rc; 1797 struct qeth_card *card; 1798 1799 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1800 card = CARD_FROM_CDEV(channel->ccwdev); 1801 iob = qeth_get_buffer(channel); 1802 if (!iob) 1803 return -ENOMEM; 1804 iob->callback = idx_reply_cb; 1805 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1806 channel->ccw.count = QETH_BUFSIZE; 1807 channel->ccw.cda = (__u32) __pa(iob->data); 1808 1809 wait_event(card->wait_q, 1810 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1811 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1812 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1813 rc = ccw_device_start(channel->ccwdev, 1814 &channel->ccw, (addr_t) iob, 0, 0); 1815 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1816 1817 if (rc) { 1818 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1819 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1820 atomic_set(&channel->irq_pending, 0); 1821 wake_up(&card->wait_q); 1822 return rc; 1823 } 1824 rc = wait_event_interruptible_timeout(card->wait_q, 1825 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1826 if (rc == -ERESTARTSYS) 1827 return rc; 1828 if (channel->state != CH_STATE_UP) { 1829 rc = -ETIME; 1830 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1831 qeth_clear_cmd_buffers(channel); 1832 } else 1833 rc = 0; 1834 return rc; 1835 } 1836 1837 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1838 void (*idx_reply_cb)(struct qeth_channel *, 1839 struct qeth_cmd_buffer *)) 1840 { 1841 struct qeth_card *card; 1842 struct qeth_cmd_buffer *iob; 1843 unsigned long flags; 1844 __u16 temp; 1845 __u8 tmp; 1846 int rc; 1847 struct ccw_dev_id temp_devid; 1848 1849 card = CARD_FROM_CDEV(channel->ccwdev); 1850 1851 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1852 1853 iob = qeth_get_buffer(channel); 1854 if (!iob) 1855 return -ENOMEM; 1856 iob->callback = idx_reply_cb; 1857 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1858 channel->ccw.count = IDX_ACTIVATE_SIZE; 1859 channel->ccw.cda = (__u32) __pa(iob->data); 1860 if (channel == &card->write) { 1861 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1862 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1863 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1864 card->seqno.trans_hdr++; 1865 } else { 1866 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1867 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1868 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1869 } 1870 tmp = ((__u8)card->info.portno) | 0x80; 1871 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1872 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1873 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1874 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1875 &card->info.func_level, sizeof(__u16)); 1876 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1877 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1878 temp = (card->info.cula << 8) + card->info.unit_addr2; 1879 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1880 1881 wait_event(card->wait_q, 1882 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1883 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1884 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1885 rc = ccw_device_start(channel->ccwdev, 1886 &channel->ccw, (addr_t) iob, 0, 0); 1887 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1888 1889 if (rc) { 1890 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1891 rc); 1892 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1893 atomic_set(&channel->irq_pending, 0); 1894 wake_up(&card->wait_q); 1895 return rc; 1896 } 1897 rc = wait_event_interruptible_timeout(card->wait_q, 1898 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1899 if (rc == -ERESTARTSYS) 1900 return rc; 1901 if (channel->state != CH_STATE_ACTIVATING) { 1902 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1903 " failed to recover an error on the device\n"); 1904 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1905 dev_name(&channel->ccwdev->dev)); 1906 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1907 qeth_clear_cmd_buffers(channel); 1908 return -ETIME; 1909 } 1910 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1911 } 1912 1913 static int qeth_peer_func_level(int level) 1914 { 1915 if ((level & 0xff) == 8) 1916 return (level & 0xff) + 0x400; 1917 if (((level >> 8) & 3) == 1) 1918 return (level & 0xff) + 0x200; 1919 return level; 1920 } 1921 1922 static void qeth_idx_write_cb(struct qeth_channel *channel, 1923 struct qeth_cmd_buffer *iob) 1924 { 1925 struct qeth_card *card; 1926 __u16 temp; 1927 1928 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1929 1930 if (channel->state == CH_STATE_DOWN) { 1931 channel->state = CH_STATE_ACTIVATING; 1932 goto out; 1933 } 1934 card = CARD_FROM_CDEV(channel->ccwdev); 1935 1936 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1937 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1938 dev_err(&card->write.ccwdev->dev, 1939 "The adapter is used exclusively by another " 1940 "host\n"); 1941 else 1942 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1943 " negative reply\n", 1944 dev_name(&card->write.ccwdev->dev)); 1945 goto out; 1946 } 1947 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1948 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1949 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1950 "function level mismatch (sent: 0x%x, received: " 1951 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1952 card->info.func_level, temp); 1953 goto out; 1954 } 1955 channel->state = CH_STATE_UP; 1956 out: 1957 qeth_release_buffer(channel, iob); 1958 } 1959 1960 static void qeth_idx_read_cb(struct qeth_channel *channel, 1961 struct qeth_cmd_buffer *iob) 1962 { 1963 struct qeth_card *card; 1964 __u16 temp; 1965 1966 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1967 if (channel->state == CH_STATE_DOWN) { 1968 channel->state = CH_STATE_ACTIVATING; 1969 goto out; 1970 } 1971 1972 card = CARD_FROM_CDEV(channel->ccwdev); 1973 if (qeth_check_idx_response(card, iob->data)) 1974 goto out; 1975 1976 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1977 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1978 case QETH_IDX_ACT_ERR_EXCL: 1979 dev_err(&card->write.ccwdev->dev, 1980 "The adapter is used exclusively by another " 1981 "host\n"); 1982 break; 1983 case QETH_IDX_ACT_ERR_AUTH: 1984 case QETH_IDX_ACT_ERR_AUTH_USER: 1985 dev_err(&card->read.ccwdev->dev, 1986 "Setting the device online failed because of " 1987 "insufficient authorization\n"); 1988 break; 1989 default: 1990 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1991 " negative reply\n", 1992 dev_name(&card->read.ccwdev->dev)); 1993 } 1994 QETH_CARD_TEXT_(card, 2, "idxread%c", 1995 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1996 goto out; 1997 } 1998 1999 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 2000 if (temp != qeth_peer_func_level(card->info.func_level)) { 2001 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 2002 "level mismatch (sent: 0x%x, received: 0x%x)\n", 2003 dev_name(&card->read.ccwdev->dev), 2004 card->info.func_level, temp); 2005 goto out; 2006 } 2007 memcpy(&card->token.issuer_rm_r, 2008 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 2009 QETH_MPC_TOKEN_LENGTH); 2010 memcpy(&card->info.mcl_level[0], 2011 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 2012 channel->state = CH_STATE_UP; 2013 out: 2014 qeth_release_buffer(channel, iob); 2015 } 2016 2017 void qeth_prepare_control_data(struct qeth_card *card, int len, 2018 struct qeth_cmd_buffer *iob) 2019 { 2020 qeth_setup_ccw(&card->write, iob->data, len); 2021 iob->callback = qeth_release_buffer; 2022 2023 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 2024 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 2025 card->seqno.trans_hdr++; 2026 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 2027 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 2028 card->seqno.pdu_hdr++; 2029 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 2030 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 2031 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2032 } 2033 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 2034 2035 /** 2036 * qeth_send_control_data() - send control command to the card 2037 * @card: qeth_card structure pointer 2038 * @len: size of the command buffer 2039 * @iob: qeth_cmd_buffer pointer 2040 * @reply_cb: callback function pointer 2041 * @cb_card: pointer to the qeth_card structure 2042 * @cb_reply: pointer to the qeth_reply structure 2043 * @cb_cmd: pointer to the original iob for non-IPA 2044 * commands, or to the qeth_ipa_cmd structure 2045 * for the IPA commands. 2046 * @reply_param: private pointer passed to the callback 2047 * 2048 * Returns the value of the `return_code' field of the response 2049 * block returned from the hardware, or other error indication. 2050 * Value of zero indicates successful execution of the command. 2051 * 2052 * Callback function gets called one or more times, with cb_cmd 2053 * pointing to the response returned by the hardware. Callback 2054 * function must return non-zero if more reply blocks are expected, 2055 * and zero if the last or only reply block is received. Callback 2056 * function can get the value of the reply_param pointer from the 2057 * field 'param' of the structure qeth_reply. 2058 */ 2059 2060 int qeth_send_control_data(struct qeth_card *card, int len, 2061 struct qeth_cmd_buffer *iob, 2062 int (*reply_cb)(struct qeth_card *cb_card, 2063 struct qeth_reply *cb_reply, 2064 unsigned long cb_cmd), 2065 void *reply_param) 2066 { 2067 int rc; 2068 unsigned long flags; 2069 struct qeth_reply *reply = NULL; 2070 unsigned long timeout, event_timeout; 2071 struct qeth_ipa_cmd *cmd; 2072 2073 QETH_CARD_TEXT(card, 2, "sendctl"); 2074 2075 if (card->read_or_write_problem) { 2076 qeth_release_buffer(iob->channel, iob); 2077 return -EIO; 2078 } 2079 reply = qeth_alloc_reply(card); 2080 if (!reply) { 2081 return -ENOMEM; 2082 } 2083 reply->callback = reply_cb; 2084 reply->param = reply_param; 2085 if (card->state == CARD_STATE_DOWN) 2086 reply->seqno = QETH_IDX_COMMAND_SEQNO; 2087 else 2088 reply->seqno = card->seqno.ipa++; 2089 init_waitqueue_head(&reply->wait_q); 2090 spin_lock_irqsave(&card->lock, flags); 2091 list_add_tail(&reply->list, &card->cmd_waiter_list); 2092 spin_unlock_irqrestore(&card->lock, flags); 2093 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 2094 2095 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 2096 qeth_prepare_control_data(card, len, iob); 2097 2098 if (IS_IPA(iob->data)) 2099 event_timeout = QETH_IPA_TIMEOUT; 2100 else 2101 event_timeout = QETH_TIMEOUT; 2102 timeout = jiffies + event_timeout; 2103 2104 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2105 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2106 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2107 (addr_t) iob, 0, 0); 2108 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2109 if (rc) { 2110 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2111 "ccw_device_start rc = %i\n", 2112 dev_name(&card->write.ccwdev->dev), rc); 2113 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2114 spin_lock_irqsave(&card->lock, flags); 2115 list_del_init(&reply->list); 2116 qeth_put_reply(reply); 2117 spin_unlock_irqrestore(&card->lock, flags); 2118 qeth_release_buffer(iob->channel, iob); 2119 atomic_set(&card->write.irq_pending, 0); 2120 wake_up(&card->wait_q); 2121 return rc; 2122 } 2123 2124 /* we have only one long running ipassist, since we can ensure 2125 process context of this command we can sleep */ 2126 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2127 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2128 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2129 if (!wait_event_timeout(reply->wait_q, 2130 atomic_read(&reply->received), event_timeout)) 2131 goto time_err; 2132 } else { 2133 while (!atomic_read(&reply->received)) { 2134 if (time_after(jiffies, timeout)) 2135 goto time_err; 2136 cpu_relax(); 2137 } 2138 } 2139 2140 if (reply->rc == -EIO) 2141 goto error; 2142 rc = reply->rc; 2143 qeth_put_reply(reply); 2144 return rc; 2145 2146 time_err: 2147 reply->rc = -ETIME; 2148 spin_lock_irqsave(&reply->card->lock, flags); 2149 list_del_init(&reply->list); 2150 spin_unlock_irqrestore(&reply->card->lock, flags); 2151 atomic_inc(&reply->received); 2152 error: 2153 atomic_set(&card->write.irq_pending, 0); 2154 qeth_release_buffer(iob->channel, iob); 2155 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2156 rc = reply->rc; 2157 qeth_put_reply(reply); 2158 return rc; 2159 } 2160 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2161 2162 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2163 unsigned long data) 2164 { 2165 struct qeth_cmd_buffer *iob; 2166 2167 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2168 2169 iob = (struct qeth_cmd_buffer *) data; 2170 memcpy(&card->token.cm_filter_r, 2171 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2172 QETH_MPC_TOKEN_LENGTH); 2173 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2174 return 0; 2175 } 2176 2177 static int qeth_cm_enable(struct qeth_card *card) 2178 { 2179 int rc; 2180 struct qeth_cmd_buffer *iob; 2181 2182 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2183 2184 iob = qeth_wait_for_buffer(&card->write); 2185 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2186 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2187 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2188 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2189 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2190 2191 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2192 qeth_cm_enable_cb, NULL); 2193 return rc; 2194 } 2195 2196 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2197 unsigned long data) 2198 { 2199 2200 struct qeth_cmd_buffer *iob; 2201 2202 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2203 2204 iob = (struct qeth_cmd_buffer *) data; 2205 memcpy(&card->token.cm_connection_r, 2206 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2207 QETH_MPC_TOKEN_LENGTH); 2208 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2209 return 0; 2210 } 2211 2212 static int qeth_cm_setup(struct qeth_card *card) 2213 { 2214 int rc; 2215 struct qeth_cmd_buffer *iob; 2216 2217 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2218 2219 iob = qeth_wait_for_buffer(&card->write); 2220 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2221 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2222 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2223 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2224 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2225 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2226 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2227 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2228 qeth_cm_setup_cb, NULL); 2229 return rc; 2230 2231 } 2232 2233 static int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2234 { 2235 switch (card->info.type) { 2236 case QETH_CARD_TYPE_UNKNOWN: 2237 return 1500; 2238 case QETH_CARD_TYPE_IQD: 2239 return card->info.max_mtu; 2240 case QETH_CARD_TYPE_OSD: 2241 switch (card->info.link_type) { 2242 case QETH_LINK_TYPE_HSTR: 2243 case QETH_LINK_TYPE_LANE_TR: 2244 return 2000; 2245 default: 2246 return card->options.layer2 ? 1500 : 1492; 2247 } 2248 case QETH_CARD_TYPE_OSM: 2249 case QETH_CARD_TYPE_OSX: 2250 return card->options.layer2 ? 1500 : 1492; 2251 default: 2252 return 1500; 2253 } 2254 } 2255 2256 static int qeth_get_mtu_outof_framesize(int framesize) 2257 { 2258 switch (framesize) { 2259 case 0x4000: 2260 return 8192; 2261 case 0x6000: 2262 return 16384; 2263 case 0xa000: 2264 return 32768; 2265 case 0xffff: 2266 return 57344; 2267 default: 2268 return 0; 2269 } 2270 } 2271 2272 static int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2273 { 2274 switch (card->info.type) { 2275 case QETH_CARD_TYPE_OSD: 2276 case QETH_CARD_TYPE_OSM: 2277 case QETH_CARD_TYPE_OSX: 2278 case QETH_CARD_TYPE_IQD: 2279 return ((mtu >= 576) && 2280 (mtu <= card->info.max_mtu)); 2281 case QETH_CARD_TYPE_OSN: 2282 case QETH_CARD_TYPE_UNKNOWN: 2283 default: 2284 return 1; 2285 } 2286 } 2287 2288 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2289 unsigned long data) 2290 { 2291 2292 __u16 mtu, framesize; 2293 __u16 len; 2294 __u8 link_type; 2295 struct qeth_cmd_buffer *iob; 2296 2297 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2298 2299 iob = (struct qeth_cmd_buffer *) data; 2300 memcpy(&card->token.ulp_filter_r, 2301 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2302 QETH_MPC_TOKEN_LENGTH); 2303 if (card->info.type == QETH_CARD_TYPE_IQD) { 2304 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2305 mtu = qeth_get_mtu_outof_framesize(framesize); 2306 if (!mtu) { 2307 iob->rc = -EINVAL; 2308 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2309 return 0; 2310 } 2311 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2312 /* frame size has changed */ 2313 if (card->dev && 2314 ((card->dev->mtu == card->info.initial_mtu) || 2315 (card->dev->mtu > mtu))) 2316 card->dev->mtu = mtu; 2317 qeth_free_qdio_buffers(card); 2318 } 2319 card->info.initial_mtu = mtu; 2320 card->info.max_mtu = mtu; 2321 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2322 } else { 2323 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2324 iob->data); 2325 card->info.initial_mtu = min(card->info.max_mtu, 2326 qeth_get_initial_mtu_for_card(card)); 2327 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2328 } 2329 2330 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2331 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2332 memcpy(&link_type, 2333 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2334 card->info.link_type = link_type; 2335 } else 2336 card->info.link_type = 0; 2337 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2338 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2339 return 0; 2340 } 2341 2342 static int qeth_ulp_enable(struct qeth_card *card) 2343 { 2344 int rc; 2345 char prot_type; 2346 struct qeth_cmd_buffer *iob; 2347 2348 /*FIXME: trace view callbacks*/ 2349 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2350 2351 iob = qeth_wait_for_buffer(&card->write); 2352 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2353 2354 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2355 (__u8) card->info.portno; 2356 if (card->options.layer2) 2357 if (card->info.type == QETH_CARD_TYPE_OSN) 2358 prot_type = QETH_PROT_OSN2; 2359 else 2360 prot_type = QETH_PROT_LAYER2; 2361 else 2362 prot_type = QETH_PROT_TCPIP; 2363 2364 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2365 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2366 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2367 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2368 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2369 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2370 qeth_ulp_enable_cb, NULL); 2371 return rc; 2372 2373 } 2374 2375 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2376 unsigned long data) 2377 { 2378 struct qeth_cmd_buffer *iob; 2379 2380 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2381 2382 iob = (struct qeth_cmd_buffer *) data; 2383 memcpy(&card->token.ulp_connection_r, 2384 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2385 QETH_MPC_TOKEN_LENGTH); 2386 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2387 3)) { 2388 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2389 dev_err(&card->gdev->dev, "A connection could not be " 2390 "established because of an OLM limit\n"); 2391 iob->rc = -EMLINK; 2392 } 2393 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2394 return 0; 2395 } 2396 2397 static int qeth_ulp_setup(struct qeth_card *card) 2398 { 2399 int rc; 2400 __u16 temp; 2401 struct qeth_cmd_buffer *iob; 2402 struct ccw_dev_id dev_id; 2403 2404 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2405 2406 iob = qeth_wait_for_buffer(&card->write); 2407 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2408 2409 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2410 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2411 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2412 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2413 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2414 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2415 2416 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2417 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2418 temp = (card->info.cula << 8) + card->info.unit_addr2; 2419 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2420 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2421 qeth_ulp_setup_cb, NULL); 2422 return rc; 2423 } 2424 2425 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2426 { 2427 int rc; 2428 struct qeth_qdio_out_buffer *newbuf; 2429 2430 rc = 0; 2431 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2432 if (!newbuf) { 2433 rc = -ENOMEM; 2434 goto out; 2435 } 2436 newbuf->buffer = q->qdio_bufs[bidx]; 2437 skb_queue_head_init(&newbuf->skb_list); 2438 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2439 newbuf->q = q; 2440 newbuf->aob = NULL; 2441 newbuf->next_pending = q->bufs[bidx]; 2442 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2443 q->bufs[bidx] = newbuf; 2444 if (q->bufstates) { 2445 q->bufstates[bidx].user = newbuf; 2446 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2447 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2448 QETH_CARD_TEXT_(q->card, 2, "%lx", 2449 (long) newbuf->next_pending); 2450 } 2451 out: 2452 return rc; 2453 } 2454 2455 static void qeth_free_qdio_out_buf(struct qeth_qdio_out_q *q) 2456 { 2457 if (!q) 2458 return; 2459 2460 qdio_free_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q); 2461 kfree(q); 2462 } 2463 2464 static struct qeth_qdio_out_q *qeth_alloc_qdio_out_buf(void) 2465 { 2466 struct qeth_qdio_out_q *q = kzalloc(sizeof(*q), GFP_KERNEL); 2467 2468 if (!q) 2469 return NULL; 2470 2471 if (qdio_alloc_buffers(q->qdio_bufs, QDIO_MAX_BUFFERS_PER_Q)) { 2472 kfree(q); 2473 return NULL; 2474 } 2475 return q; 2476 } 2477 2478 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2479 { 2480 int i, j; 2481 2482 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2483 2484 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2485 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2486 return 0; 2487 2488 QETH_DBF_TEXT(SETUP, 2, "inq"); 2489 card->qdio.in_q = qeth_alloc_qdio_queue(); 2490 if (!card->qdio.in_q) 2491 goto out_nomem; 2492 2493 /* inbound buffer pool */ 2494 if (qeth_alloc_buffer_pool(card)) 2495 goto out_freeinq; 2496 2497 /* outbound */ 2498 card->qdio.out_qs = 2499 kzalloc(card->qdio.no_out_queues * 2500 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2501 if (!card->qdio.out_qs) 2502 goto out_freepool; 2503 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2504 card->qdio.out_qs[i] = qeth_alloc_qdio_out_buf(); 2505 if (!card->qdio.out_qs[i]) 2506 goto out_freeoutq; 2507 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2508 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2509 card->qdio.out_qs[i]->queue_no = i; 2510 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2511 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2512 WARN_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2513 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2514 goto out_freeoutqbufs; 2515 } 2516 } 2517 2518 /* completion */ 2519 if (qeth_alloc_cq(card)) 2520 goto out_freeoutq; 2521 2522 return 0; 2523 2524 out_freeoutqbufs: 2525 while (j > 0) { 2526 --j; 2527 kmem_cache_free(qeth_qdio_outbuf_cache, 2528 card->qdio.out_qs[i]->bufs[j]); 2529 card->qdio.out_qs[i]->bufs[j] = NULL; 2530 } 2531 out_freeoutq: 2532 while (i > 0) { 2533 qeth_free_qdio_out_buf(card->qdio.out_qs[--i]); 2534 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2535 } 2536 kfree(card->qdio.out_qs); 2537 card->qdio.out_qs = NULL; 2538 out_freepool: 2539 qeth_free_buffer_pool(card); 2540 out_freeinq: 2541 qeth_free_qdio_queue(card->qdio.in_q); 2542 card->qdio.in_q = NULL; 2543 out_nomem: 2544 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2545 return -ENOMEM; 2546 } 2547 2548 static void qeth_free_qdio_buffers(struct qeth_card *card) 2549 { 2550 int i, j; 2551 2552 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 2553 QETH_QDIO_UNINITIALIZED) 2554 return; 2555 2556 qeth_free_cq(card); 2557 cancel_delayed_work_sync(&card->buffer_reclaim_work); 2558 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2559 if (card->qdio.in_q->bufs[j].rx_skb) 2560 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 2561 } 2562 qeth_free_qdio_queue(card->qdio.in_q); 2563 card->qdio.in_q = NULL; 2564 /* inbound buffer pool */ 2565 qeth_free_buffer_pool(card); 2566 /* free outbound qdio_qs */ 2567 if (card->qdio.out_qs) { 2568 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2569 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2570 qeth_free_qdio_out_buf(card->qdio.out_qs[i]); 2571 } 2572 kfree(card->qdio.out_qs); 2573 card->qdio.out_qs = NULL; 2574 } 2575 } 2576 2577 static void qeth_create_qib_param_field(struct qeth_card *card, 2578 char *param_field) 2579 { 2580 2581 param_field[0] = _ascebc['P']; 2582 param_field[1] = _ascebc['C']; 2583 param_field[2] = _ascebc['I']; 2584 param_field[3] = _ascebc['T']; 2585 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2586 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2587 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2588 } 2589 2590 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2591 char *param_field) 2592 { 2593 param_field[16] = _ascebc['B']; 2594 param_field[17] = _ascebc['L']; 2595 param_field[18] = _ascebc['K']; 2596 param_field[19] = _ascebc['T']; 2597 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2598 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2599 *((unsigned int *) (¶m_field[28])) = 2600 card->info.blkt.inter_packet_jumbo; 2601 } 2602 2603 static int qeth_qdio_activate(struct qeth_card *card) 2604 { 2605 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2606 return qdio_activate(CARD_DDEV(card)); 2607 } 2608 2609 static int qeth_dm_act(struct qeth_card *card) 2610 { 2611 int rc; 2612 struct qeth_cmd_buffer *iob; 2613 2614 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2615 2616 iob = qeth_wait_for_buffer(&card->write); 2617 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2618 2619 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2620 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2621 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2622 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2623 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2624 return rc; 2625 } 2626 2627 static int qeth_mpc_initialize(struct qeth_card *card) 2628 { 2629 int rc; 2630 2631 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2632 2633 rc = qeth_issue_next_read(card); 2634 if (rc) { 2635 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2636 return rc; 2637 } 2638 rc = qeth_cm_enable(card); 2639 if (rc) { 2640 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2641 goto out_qdio; 2642 } 2643 rc = qeth_cm_setup(card); 2644 if (rc) { 2645 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2646 goto out_qdio; 2647 } 2648 rc = qeth_ulp_enable(card); 2649 if (rc) { 2650 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2651 goto out_qdio; 2652 } 2653 rc = qeth_ulp_setup(card); 2654 if (rc) { 2655 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2656 goto out_qdio; 2657 } 2658 rc = qeth_alloc_qdio_buffers(card); 2659 if (rc) { 2660 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2661 goto out_qdio; 2662 } 2663 rc = qeth_qdio_establish(card); 2664 if (rc) { 2665 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2666 qeth_free_qdio_buffers(card); 2667 goto out_qdio; 2668 } 2669 rc = qeth_qdio_activate(card); 2670 if (rc) { 2671 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2672 goto out_qdio; 2673 } 2674 rc = qeth_dm_act(card); 2675 if (rc) { 2676 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2677 goto out_qdio; 2678 } 2679 2680 return 0; 2681 out_qdio: 2682 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2683 qdio_free(CARD_DDEV(card)); 2684 return rc; 2685 } 2686 2687 void qeth_print_status_message(struct qeth_card *card) 2688 { 2689 switch (card->info.type) { 2690 case QETH_CARD_TYPE_OSD: 2691 case QETH_CARD_TYPE_OSM: 2692 case QETH_CARD_TYPE_OSX: 2693 /* VM will use a non-zero first character 2694 * to indicate a HiperSockets like reporting 2695 * of the level OSA sets the first character to zero 2696 * */ 2697 if (!card->info.mcl_level[0]) { 2698 sprintf(card->info.mcl_level, "%02x%02x", 2699 card->info.mcl_level[2], 2700 card->info.mcl_level[3]); 2701 break; 2702 } 2703 /* fallthrough */ 2704 case QETH_CARD_TYPE_IQD: 2705 if ((card->info.guestlan) || 2706 (card->info.mcl_level[0] & 0x80)) { 2707 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2708 card->info.mcl_level[0]]; 2709 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2710 card->info.mcl_level[1]]; 2711 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2712 card->info.mcl_level[2]]; 2713 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2714 card->info.mcl_level[3]]; 2715 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2716 } 2717 break; 2718 default: 2719 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2720 } 2721 dev_info(&card->gdev->dev, 2722 "Device is a%s card%s%s%s\nwith link type %s.\n", 2723 qeth_get_cardname(card), 2724 (card->info.mcl_level[0]) ? " (level: " : "", 2725 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2726 (card->info.mcl_level[0]) ? ")" : "", 2727 qeth_get_cardname_short(card)); 2728 } 2729 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2730 2731 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2732 { 2733 struct qeth_buffer_pool_entry *entry; 2734 2735 QETH_CARD_TEXT(card, 5, "inwrklst"); 2736 2737 list_for_each_entry(entry, 2738 &card->qdio.init_pool.entry_list, init_list) { 2739 qeth_put_buffer_pool_entry(card, entry); 2740 } 2741 } 2742 2743 static struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2744 struct qeth_card *card) 2745 { 2746 struct list_head *plh; 2747 struct qeth_buffer_pool_entry *entry; 2748 int i, free; 2749 struct page *page; 2750 2751 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2752 return NULL; 2753 2754 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2755 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2756 free = 1; 2757 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2758 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2759 free = 0; 2760 break; 2761 } 2762 } 2763 if (free) { 2764 list_del_init(&entry->list); 2765 return entry; 2766 } 2767 } 2768 2769 /* no free buffer in pool so take first one and swap pages */ 2770 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2771 struct qeth_buffer_pool_entry, list); 2772 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2773 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2774 page = alloc_page(GFP_ATOMIC); 2775 if (!page) { 2776 return NULL; 2777 } else { 2778 free_page((unsigned long)entry->elements[i]); 2779 entry->elements[i] = page_address(page); 2780 if (card->options.performance_stats) 2781 card->perf_stats.sg_alloc_page_rx++; 2782 } 2783 } 2784 } 2785 list_del_init(&entry->list); 2786 return entry; 2787 } 2788 2789 static int qeth_init_input_buffer(struct qeth_card *card, 2790 struct qeth_qdio_buffer *buf) 2791 { 2792 struct qeth_buffer_pool_entry *pool_entry; 2793 int i; 2794 2795 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2796 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2797 if (!buf->rx_skb) 2798 return 1; 2799 } 2800 2801 pool_entry = qeth_find_free_buffer_pool_entry(card); 2802 if (!pool_entry) 2803 return 1; 2804 2805 /* 2806 * since the buffer is accessed only from the input_tasklet 2807 * there shouldn't be a need to synchronize; also, since we use 2808 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2809 * buffers 2810 */ 2811 2812 buf->pool_entry = pool_entry; 2813 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2814 buf->buffer->element[i].length = PAGE_SIZE; 2815 buf->buffer->element[i].addr = pool_entry->elements[i]; 2816 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2817 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2818 else 2819 buf->buffer->element[i].eflags = 0; 2820 buf->buffer->element[i].sflags = 0; 2821 } 2822 return 0; 2823 } 2824 2825 int qeth_init_qdio_queues(struct qeth_card *card) 2826 { 2827 int i, j; 2828 int rc; 2829 2830 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2831 2832 /* inbound queue */ 2833 qdio_reset_buffers(card->qdio.in_q->qdio_bufs, 2834 QDIO_MAX_BUFFERS_PER_Q); 2835 qeth_initialize_working_pool_list(card); 2836 /*give only as many buffers to hardware as we have buffer pool entries*/ 2837 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2838 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2839 card->qdio.in_q->next_buf_to_init = 2840 card->qdio.in_buf_pool.buf_count - 1; 2841 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2842 card->qdio.in_buf_pool.buf_count - 1); 2843 if (rc) { 2844 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2845 return rc; 2846 } 2847 2848 /* completion */ 2849 rc = qeth_cq_init(card); 2850 if (rc) { 2851 return rc; 2852 } 2853 2854 /* outbound queue */ 2855 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2856 qdio_reset_buffers(card->qdio.out_qs[i]->qdio_bufs, 2857 QDIO_MAX_BUFFERS_PER_Q); 2858 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2859 qeth_clear_output_buffer(card->qdio.out_qs[i], 2860 card->qdio.out_qs[i]->bufs[j], 2861 QETH_QDIO_BUF_EMPTY); 2862 } 2863 card->qdio.out_qs[i]->card = card; 2864 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2865 card->qdio.out_qs[i]->do_pack = 0; 2866 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2867 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2868 atomic_set(&card->qdio.out_qs[i]->state, 2869 QETH_OUT_Q_UNLOCKED); 2870 } 2871 return 0; 2872 } 2873 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2874 2875 static __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2876 { 2877 switch (link_type) { 2878 case QETH_LINK_TYPE_HSTR: 2879 return 2; 2880 default: 2881 return 1; 2882 } 2883 } 2884 2885 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2886 struct qeth_ipa_cmd *cmd, __u8 command, 2887 enum qeth_prot_versions prot) 2888 { 2889 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2890 cmd->hdr.command = command; 2891 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2892 cmd->hdr.seqno = card->seqno.ipa; 2893 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2894 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2895 if (card->options.layer2) 2896 cmd->hdr.prim_version_no = 2; 2897 else 2898 cmd->hdr.prim_version_no = 1; 2899 cmd->hdr.param_count = 1; 2900 cmd->hdr.prot_version = prot; 2901 cmd->hdr.ipa_supported = 0; 2902 cmd->hdr.ipa_enabled = 0; 2903 } 2904 2905 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2906 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2907 { 2908 struct qeth_cmd_buffer *iob; 2909 struct qeth_ipa_cmd *cmd; 2910 2911 iob = qeth_get_buffer(&card->write); 2912 if (iob) { 2913 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2914 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2915 } else { 2916 dev_warn(&card->gdev->dev, 2917 "The qeth driver ran out of channel command buffers\n"); 2918 QETH_DBF_MESSAGE(1, "%s The qeth driver ran out of channel command buffers", 2919 dev_name(&card->gdev->dev)); 2920 } 2921 2922 return iob; 2923 } 2924 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2925 2926 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2927 char prot_type) 2928 { 2929 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2930 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2931 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2932 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2933 } 2934 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2935 2936 /** 2937 * qeth_send_ipa_cmd() - send an IPA command 2938 * 2939 * See qeth_send_control_data() for explanation of the arguments. 2940 */ 2941 2942 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2943 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2944 unsigned long), 2945 void *reply_param) 2946 { 2947 int rc; 2948 char prot_type; 2949 2950 QETH_CARD_TEXT(card, 4, "sendipa"); 2951 2952 if (card->options.layer2) 2953 if (card->info.type == QETH_CARD_TYPE_OSN) 2954 prot_type = QETH_PROT_OSN2; 2955 else 2956 prot_type = QETH_PROT_LAYER2; 2957 else 2958 prot_type = QETH_PROT_TCPIP; 2959 qeth_prepare_ipa_cmd(card, iob, prot_type); 2960 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2961 iob, reply_cb, reply_param); 2962 if (rc == -ETIME) { 2963 qeth_clear_ipacmd_list(card); 2964 qeth_schedule_recovery(card); 2965 } 2966 return rc; 2967 } 2968 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2969 2970 static int qeth_send_startlan(struct qeth_card *card) 2971 { 2972 int rc; 2973 struct qeth_cmd_buffer *iob; 2974 2975 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2976 2977 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2978 if (!iob) 2979 return -ENOMEM; 2980 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2981 return rc; 2982 } 2983 2984 static int qeth_default_setadapterparms_cb(struct qeth_card *card, 2985 struct qeth_reply *reply, unsigned long data) 2986 { 2987 struct qeth_ipa_cmd *cmd; 2988 2989 QETH_CARD_TEXT(card, 4, "defadpcb"); 2990 2991 cmd = (struct qeth_ipa_cmd *) data; 2992 if (cmd->hdr.return_code == 0) 2993 cmd->hdr.return_code = 2994 cmd->data.setadapterparms.hdr.return_code; 2995 return 0; 2996 } 2997 2998 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2999 struct qeth_reply *reply, unsigned long data) 3000 { 3001 struct qeth_ipa_cmd *cmd; 3002 3003 QETH_CARD_TEXT(card, 3, "quyadpcb"); 3004 3005 cmd = (struct qeth_ipa_cmd *) data; 3006 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 3007 card->info.link_type = 3008 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 3009 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 3010 } 3011 card->options.adp.supported_funcs = 3012 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 3013 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3014 } 3015 3016 static struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 3017 __u32 command, __u32 cmdlen) 3018 { 3019 struct qeth_cmd_buffer *iob; 3020 struct qeth_ipa_cmd *cmd; 3021 3022 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 3023 QETH_PROT_IPV4); 3024 if (iob) { 3025 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3026 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 3027 cmd->data.setadapterparms.hdr.command_code = command; 3028 cmd->data.setadapterparms.hdr.used_total = 1; 3029 cmd->data.setadapterparms.hdr.seq_no = 1; 3030 } 3031 3032 return iob; 3033 } 3034 3035 int qeth_query_setadapterparms(struct qeth_card *card) 3036 { 3037 int rc; 3038 struct qeth_cmd_buffer *iob; 3039 3040 QETH_CARD_TEXT(card, 3, "queryadp"); 3041 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 3042 sizeof(struct qeth_ipacmd_setadpparms)); 3043 if (!iob) 3044 return -ENOMEM; 3045 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 3046 return rc; 3047 } 3048 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 3049 3050 static int qeth_query_ipassists_cb(struct qeth_card *card, 3051 struct qeth_reply *reply, unsigned long data) 3052 { 3053 struct qeth_ipa_cmd *cmd; 3054 3055 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 3056 3057 cmd = (struct qeth_ipa_cmd *) data; 3058 3059 switch (cmd->hdr.return_code) { 3060 case IPA_RC_NOTSUPP: 3061 case IPA_RC_L2_UNSUPPORTED_CMD: 3062 QETH_DBF_TEXT(SETUP, 2, "ipaunsup"); 3063 card->options.ipa4.supported_funcs |= IPA_SETADAPTERPARMS; 3064 card->options.ipa6.supported_funcs |= IPA_SETADAPTERPARMS; 3065 return -0; 3066 default: 3067 if (cmd->hdr.return_code) { 3068 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Unhandled " 3069 "rc=%d\n", 3070 dev_name(&card->gdev->dev), 3071 cmd->hdr.return_code); 3072 return 0; 3073 } 3074 } 3075 3076 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 3077 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 3078 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 3079 } else if (cmd->hdr.prot_version == QETH_PROT_IPV6) { 3080 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 3081 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 3082 } else 3083 QETH_DBF_MESSAGE(1, "%s IPA_CMD_QIPASSIST: Flawed LIC detected" 3084 "\n", dev_name(&card->gdev->dev)); 3085 return 0; 3086 } 3087 3088 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 3089 { 3090 int rc; 3091 struct qeth_cmd_buffer *iob; 3092 3093 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 3094 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 3095 if (!iob) 3096 return -ENOMEM; 3097 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 3098 return rc; 3099 } 3100 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 3101 3102 static int qeth_query_switch_attributes_cb(struct qeth_card *card, 3103 struct qeth_reply *reply, unsigned long data) 3104 { 3105 struct qeth_ipa_cmd *cmd; 3106 struct qeth_switch_info *sw_info; 3107 struct qeth_query_switch_attributes *attrs; 3108 3109 QETH_CARD_TEXT(card, 2, "qswiatcb"); 3110 cmd = (struct qeth_ipa_cmd *) data; 3111 sw_info = (struct qeth_switch_info *)reply->param; 3112 if (cmd->data.setadapterparms.hdr.return_code == 0) { 3113 attrs = &cmd->data.setadapterparms.data.query_switch_attributes; 3114 sw_info->capabilities = attrs->capabilities; 3115 sw_info->settings = attrs->settings; 3116 QETH_CARD_TEXT_(card, 2, "%04x%04x", sw_info->capabilities, 3117 sw_info->settings); 3118 } 3119 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3120 3121 return 0; 3122 } 3123 3124 int qeth_query_switch_attributes(struct qeth_card *card, 3125 struct qeth_switch_info *sw_info) 3126 { 3127 struct qeth_cmd_buffer *iob; 3128 3129 QETH_CARD_TEXT(card, 2, "qswiattr"); 3130 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES)) 3131 return -EOPNOTSUPP; 3132 if (!netif_carrier_ok(card->dev)) 3133 return -ENOMEDIUM; 3134 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_SWITCH_ATTRIBUTES, 3135 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 3136 if (!iob) 3137 return -ENOMEM; 3138 return qeth_send_ipa_cmd(card, iob, 3139 qeth_query_switch_attributes_cb, sw_info); 3140 } 3141 EXPORT_SYMBOL_GPL(qeth_query_switch_attributes); 3142 3143 static int qeth_query_setdiagass_cb(struct qeth_card *card, 3144 struct qeth_reply *reply, unsigned long data) 3145 { 3146 struct qeth_ipa_cmd *cmd; 3147 __u16 rc; 3148 3149 cmd = (struct qeth_ipa_cmd *)data; 3150 rc = cmd->hdr.return_code; 3151 if (rc) 3152 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 3153 else 3154 card->info.diagass_support = cmd->data.diagass.ext; 3155 return 0; 3156 } 3157 3158 static int qeth_query_setdiagass(struct qeth_card *card) 3159 { 3160 struct qeth_cmd_buffer *iob; 3161 struct qeth_ipa_cmd *cmd; 3162 3163 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 3164 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3165 if (!iob) 3166 return -ENOMEM; 3167 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3168 cmd->data.diagass.subcmd_len = 16; 3169 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 3170 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 3171 } 3172 3173 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 3174 { 3175 unsigned long info = get_zeroed_page(GFP_KERNEL); 3176 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 3177 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 3178 struct ccw_dev_id ccwid; 3179 int level; 3180 3181 tid->chpid = card->info.chpid; 3182 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3183 tid->ssid = ccwid.ssid; 3184 tid->devno = ccwid.devno; 3185 if (!info) 3186 return; 3187 level = stsi(NULL, 0, 0, 0); 3188 if ((level >= 2) && (stsi(info222, 2, 2, 2) == 0)) 3189 tid->lparnr = info222->lpar_number; 3190 if ((level >= 3) && (stsi(info322, 3, 2, 2) == 0)) { 3191 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3192 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3193 } 3194 free_page(info); 3195 return; 3196 } 3197 3198 static int qeth_hw_trap_cb(struct qeth_card *card, 3199 struct qeth_reply *reply, unsigned long data) 3200 { 3201 struct qeth_ipa_cmd *cmd; 3202 __u16 rc; 3203 3204 cmd = (struct qeth_ipa_cmd *)data; 3205 rc = cmd->hdr.return_code; 3206 if (rc) 3207 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3208 return 0; 3209 } 3210 3211 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3212 { 3213 struct qeth_cmd_buffer *iob; 3214 struct qeth_ipa_cmd *cmd; 3215 3216 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3217 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3218 if (!iob) 3219 return -ENOMEM; 3220 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3221 cmd->data.diagass.subcmd_len = 80; 3222 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3223 cmd->data.diagass.type = 1; 3224 cmd->data.diagass.action = action; 3225 switch (action) { 3226 case QETH_DIAGS_TRAP_ARM: 3227 cmd->data.diagass.options = 0x0003; 3228 cmd->data.diagass.ext = 0x00010000 + 3229 sizeof(struct qeth_trap_id); 3230 qeth_get_trap_id(card, 3231 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3232 break; 3233 case QETH_DIAGS_TRAP_DISARM: 3234 cmd->data.diagass.options = 0x0001; 3235 break; 3236 case QETH_DIAGS_TRAP_CAPTURE: 3237 break; 3238 } 3239 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3240 } 3241 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3242 3243 static int qeth_check_qdio_errors(struct qeth_card *card, 3244 struct qdio_buffer *buf, 3245 unsigned int qdio_error, 3246 const char *dbftext) 3247 { 3248 if (qdio_error) { 3249 QETH_CARD_TEXT(card, 2, dbftext); 3250 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3251 buf->element[15].sflags); 3252 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3253 buf->element[14].sflags); 3254 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3255 if ((buf->element[15].sflags) == 0x12) { 3256 card->stats.rx_dropped++; 3257 return 0; 3258 } else 3259 return 1; 3260 } 3261 return 0; 3262 } 3263 3264 static void qeth_queue_input_buffer(struct qeth_card *card, int index) 3265 { 3266 struct qeth_qdio_q *queue = card->qdio.in_q; 3267 struct list_head *lh; 3268 int count; 3269 int i; 3270 int rc; 3271 int newcount = 0; 3272 3273 count = (index < queue->next_buf_to_init)? 3274 card->qdio.in_buf_pool.buf_count - 3275 (queue->next_buf_to_init - index) : 3276 card->qdio.in_buf_pool.buf_count - 3277 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3278 /* only requeue at a certain threshold to avoid SIGAs */ 3279 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3280 for (i = queue->next_buf_to_init; 3281 i < queue->next_buf_to_init + count; ++i) { 3282 if (qeth_init_input_buffer(card, 3283 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3284 break; 3285 } else { 3286 newcount++; 3287 } 3288 } 3289 3290 if (newcount < count) { 3291 /* we are in memory shortage so we switch back to 3292 traditional skb allocation and drop packages */ 3293 atomic_set(&card->force_alloc_skb, 3); 3294 count = newcount; 3295 } else { 3296 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3297 } 3298 3299 if (!count) { 3300 i = 0; 3301 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3302 i++; 3303 if (i == card->qdio.in_buf_pool.buf_count) { 3304 QETH_CARD_TEXT(card, 2, "qsarbw"); 3305 card->reclaim_index = index; 3306 schedule_delayed_work( 3307 &card->buffer_reclaim_work, 3308 QETH_RECLAIM_WORK_TIME); 3309 } 3310 return; 3311 } 3312 3313 /* 3314 * according to old code it should be avoided to requeue all 3315 * 128 buffers in order to benefit from PCI avoidance. 3316 * this function keeps at least one buffer (the buffer at 3317 * 'index') un-requeued -> this buffer is the first buffer that 3318 * will be requeued the next time 3319 */ 3320 if (card->options.performance_stats) { 3321 card->perf_stats.inbound_do_qdio_cnt++; 3322 card->perf_stats.inbound_do_qdio_start_time = 3323 qeth_get_micros(); 3324 } 3325 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3326 queue->next_buf_to_init, count); 3327 if (card->options.performance_stats) 3328 card->perf_stats.inbound_do_qdio_time += 3329 qeth_get_micros() - 3330 card->perf_stats.inbound_do_qdio_start_time; 3331 if (rc) { 3332 QETH_CARD_TEXT(card, 2, "qinberr"); 3333 } 3334 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3335 QDIO_MAX_BUFFERS_PER_Q; 3336 } 3337 } 3338 3339 static void qeth_buffer_reclaim_work(struct work_struct *work) 3340 { 3341 struct qeth_card *card = container_of(work, struct qeth_card, 3342 buffer_reclaim_work.work); 3343 3344 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3345 qeth_queue_input_buffer(card, card->reclaim_index); 3346 } 3347 3348 static void qeth_handle_send_error(struct qeth_card *card, 3349 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3350 { 3351 int sbalf15 = buffer->buffer->element[15].sflags; 3352 3353 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3354 if (card->info.type == QETH_CARD_TYPE_IQD) { 3355 if (sbalf15 == 0) { 3356 qdio_err = 0; 3357 } else { 3358 qdio_err = 1; 3359 } 3360 } 3361 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3362 3363 if (!qdio_err) 3364 return; 3365 3366 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3367 return; 3368 3369 QETH_CARD_TEXT(card, 1, "lnkfail"); 3370 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3371 (u16)qdio_err, (u8)sbalf15); 3372 } 3373 3374 /** 3375 * qeth_prep_flush_pack_buffer - Prepares flushing of a packing buffer. 3376 * @queue: queue to check for packing buffer 3377 * 3378 * Returns number of buffers that were prepared for flush. 3379 */ 3380 static int qeth_prep_flush_pack_buffer(struct qeth_qdio_out_q *queue) 3381 { 3382 struct qeth_qdio_out_buffer *buffer; 3383 3384 buffer = queue->bufs[queue->next_buf_to_fill]; 3385 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3386 (buffer->next_element_to_fill > 0)) { 3387 /* it's a packing buffer */ 3388 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3389 queue->next_buf_to_fill = 3390 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3391 return 1; 3392 } 3393 return 0; 3394 } 3395 3396 /* 3397 * Switched to packing state if the number of used buffers on a queue 3398 * reaches a certain limit. 3399 */ 3400 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3401 { 3402 if (!queue->do_pack) { 3403 if (atomic_read(&queue->used_buffers) 3404 >= QETH_HIGH_WATERMARK_PACK){ 3405 /* switch non-PACKING -> PACKING */ 3406 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3407 if (queue->card->options.performance_stats) 3408 queue->card->perf_stats.sc_dp_p++; 3409 queue->do_pack = 1; 3410 } 3411 } 3412 } 3413 3414 /* 3415 * Switches from packing to non-packing mode. If there is a packing 3416 * buffer on the queue this buffer will be prepared to be flushed. 3417 * In that case 1 is returned to inform the caller. If no buffer 3418 * has to be flushed, zero is returned. 3419 */ 3420 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3421 { 3422 if (queue->do_pack) { 3423 if (atomic_read(&queue->used_buffers) 3424 <= QETH_LOW_WATERMARK_PACK) { 3425 /* switch PACKING -> non-PACKING */ 3426 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3427 if (queue->card->options.performance_stats) 3428 queue->card->perf_stats.sc_p_dp++; 3429 queue->do_pack = 0; 3430 return qeth_prep_flush_pack_buffer(queue); 3431 } 3432 } 3433 return 0; 3434 } 3435 3436 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3437 int count) 3438 { 3439 struct qeth_qdio_out_buffer *buf; 3440 int rc; 3441 int i; 3442 unsigned int qdio_flags; 3443 3444 for (i = index; i < index + count; ++i) { 3445 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3446 buf = queue->bufs[bidx]; 3447 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3448 SBAL_EFLAGS_LAST_ENTRY; 3449 3450 if (queue->bufstates) 3451 queue->bufstates[bidx].user = buf; 3452 3453 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3454 continue; 3455 3456 if (!queue->do_pack) { 3457 if ((atomic_read(&queue->used_buffers) >= 3458 (QETH_HIGH_WATERMARK_PACK - 3459 QETH_WATERMARK_PACK_FUZZ)) && 3460 !atomic_read(&queue->set_pci_flags_count)) { 3461 /* it's likely that we'll go to packing 3462 * mode soon */ 3463 atomic_inc(&queue->set_pci_flags_count); 3464 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3465 } 3466 } else { 3467 if (!atomic_read(&queue->set_pci_flags_count)) { 3468 /* 3469 * there's no outstanding PCI any more, so we 3470 * have to request a PCI to be sure the the PCI 3471 * will wake at some time in the future then we 3472 * can flush packed buffers that might still be 3473 * hanging around, which can happen if no 3474 * further send was requested by the stack 3475 */ 3476 atomic_inc(&queue->set_pci_flags_count); 3477 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3478 } 3479 } 3480 } 3481 3482 netif_trans_update(queue->card->dev); 3483 if (queue->card->options.performance_stats) { 3484 queue->card->perf_stats.outbound_do_qdio_cnt++; 3485 queue->card->perf_stats.outbound_do_qdio_start_time = 3486 qeth_get_micros(); 3487 } 3488 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3489 if (atomic_read(&queue->set_pci_flags_count)) 3490 qdio_flags |= QDIO_FLAG_PCI_OUT; 3491 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3492 queue->queue_no, index, count); 3493 if (queue->card->options.performance_stats) 3494 queue->card->perf_stats.outbound_do_qdio_time += 3495 qeth_get_micros() - 3496 queue->card->perf_stats.outbound_do_qdio_start_time; 3497 atomic_add(count, &queue->used_buffers); 3498 if (rc) { 3499 queue->card->stats.tx_errors += count; 3500 /* ignore temporary SIGA errors without busy condition */ 3501 if (rc == -ENOBUFS) 3502 return; 3503 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3504 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3505 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3506 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3507 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3508 3509 /* this must not happen under normal circumstances. if it 3510 * happens something is really wrong -> recover */ 3511 qeth_schedule_recovery(queue->card); 3512 return; 3513 } 3514 if (queue->card->options.performance_stats) 3515 queue->card->perf_stats.bufs_sent += count; 3516 } 3517 3518 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3519 { 3520 int index; 3521 int flush_cnt = 0; 3522 int q_was_packing = 0; 3523 3524 /* 3525 * check if weed have to switch to non-packing mode or if 3526 * we have to get a pci flag out on the queue 3527 */ 3528 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3529 !atomic_read(&queue->set_pci_flags_count)) { 3530 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3531 QETH_OUT_Q_UNLOCKED) { 3532 /* 3533 * If we get in here, there was no action in 3534 * do_send_packet. So, we check if there is a 3535 * packing buffer to be flushed here. 3536 */ 3537 netif_stop_queue(queue->card->dev); 3538 index = queue->next_buf_to_fill; 3539 q_was_packing = queue->do_pack; 3540 /* queue->do_pack may change */ 3541 barrier(); 3542 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3543 if (!flush_cnt && 3544 !atomic_read(&queue->set_pci_flags_count)) 3545 flush_cnt += qeth_prep_flush_pack_buffer(queue); 3546 if (queue->card->options.performance_stats && 3547 q_was_packing) 3548 queue->card->perf_stats.bufs_sent_pack += 3549 flush_cnt; 3550 if (flush_cnt) 3551 qeth_flush_buffers(queue, index, flush_cnt); 3552 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3553 } 3554 } 3555 } 3556 3557 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3558 unsigned long card_ptr) 3559 { 3560 struct qeth_card *card = (struct qeth_card *)card_ptr; 3561 3562 if (card->dev && (card->dev->flags & IFF_UP)) 3563 napi_schedule(&card->napi); 3564 } 3565 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3566 3567 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3568 { 3569 int rc; 3570 3571 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3572 rc = -1; 3573 goto out; 3574 } else { 3575 if (card->options.cq == cq) { 3576 rc = 0; 3577 goto out; 3578 } 3579 3580 if (card->state != CARD_STATE_DOWN && 3581 card->state != CARD_STATE_RECOVER) { 3582 rc = -1; 3583 goto out; 3584 } 3585 3586 qeth_free_qdio_buffers(card); 3587 card->options.cq = cq; 3588 rc = 0; 3589 } 3590 out: 3591 return rc; 3592 3593 } 3594 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3595 3596 3597 static void qeth_qdio_cq_handler(struct qeth_card *card, 3598 unsigned int qdio_err, 3599 unsigned int queue, int first_element, int count) { 3600 struct qeth_qdio_q *cq = card->qdio.c_q; 3601 int i; 3602 int rc; 3603 3604 if (!qeth_is_cq(card, queue)) 3605 goto out; 3606 3607 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3608 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3609 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3610 3611 if (qdio_err) { 3612 netif_stop_queue(card->dev); 3613 qeth_schedule_recovery(card); 3614 goto out; 3615 } 3616 3617 if (card->options.performance_stats) { 3618 card->perf_stats.cq_cnt++; 3619 card->perf_stats.cq_start_time = qeth_get_micros(); 3620 } 3621 3622 for (i = first_element; i < first_element + count; ++i) { 3623 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3624 struct qdio_buffer *buffer = cq->qdio_bufs[bidx]; 3625 int e; 3626 3627 e = 0; 3628 while ((e < QDIO_MAX_ELEMENTS_PER_BUFFER) && 3629 buffer->element[e].addr) { 3630 unsigned long phys_aob_addr; 3631 3632 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3633 qeth_qdio_handle_aob(card, phys_aob_addr); 3634 buffer->element[e].addr = NULL; 3635 buffer->element[e].eflags = 0; 3636 buffer->element[e].sflags = 0; 3637 buffer->element[e].length = 0; 3638 3639 ++e; 3640 } 3641 3642 buffer->element[15].eflags = 0; 3643 buffer->element[15].sflags = 0; 3644 } 3645 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3646 card->qdio.c_q->next_buf_to_init, 3647 count); 3648 if (rc) { 3649 dev_warn(&card->gdev->dev, 3650 "QDIO reported an error, rc=%i\n", rc); 3651 QETH_CARD_TEXT(card, 2, "qcqherr"); 3652 } 3653 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3654 + count) % QDIO_MAX_BUFFERS_PER_Q; 3655 3656 netif_wake_queue(card->dev); 3657 3658 if (card->options.performance_stats) { 3659 int delta_t = qeth_get_micros(); 3660 delta_t -= card->perf_stats.cq_start_time; 3661 card->perf_stats.cq_time += delta_t; 3662 } 3663 out: 3664 return; 3665 } 3666 3667 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3668 unsigned int queue, int first_elem, int count, 3669 unsigned long card_ptr) 3670 { 3671 struct qeth_card *card = (struct qeth_card *)card_ptr; 3672 3673 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3674 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3675 3676 if (qeth_is_cq(card, queue)) 3677 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3678 else if (qdio_err) 3679 qeth_schedule_recovery(card); 3680 3681 3682 } 3683 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3684 3685 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3686 unsigned int qdio_error, int __queue, int first_element, 3687 int count, unsigned long card_ptr) 3688 { 3689 struct qeth_card *card = (struct qeth_card *) card_ptr; 3690 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3691 struct qeth_qdio_out_buffer *buffer; 3692 int i; 3693 3694 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3695 if (qdio_error & QDIO_ERROR_FATAL) { 3696 QETH_CARD_TEXT(card, 2, "achkcond"); 3697 netif_stop_queue(card->dev); 3698 qeth_schedule_recovery(card); 3699 return; 3700 } 3701 if (card->options.performance_stats) { 3702 card->perf_stats.outbound_handler_cnt++; 3703 card->perf_stats.outbound_handler_start_time = 3704 qeth_get_micros(); 3705 } 3706 for (i = first_element; i < (first_element + count); ++i) { 3707 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3708 buffer = queue->bufs[bidx]; 3709 qeth_handle_send_error(card, buffer, qdio_error); 3710 3711 if (queue->bufstates && 3712 (queue->bufstates[bidx].flags & 3713 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3714 WARN_ON_ONCE(card->options.cq != QETH_CQ_ENABLED); 3715 3716 if (atomic_cmpxchg(&buffer->state, 3717 QETH_QDIO_BUF_PRIMED, 3718 QETH_QDIO_BUF_PENDING) == 3719 QETH_QDIO_BUF_PRIMED) { 3720 qeth_notify_skbs(queue, buffer, 3721 TX_NOTIFY_PENDING); 3722 } 3723 buffer->aob = queue->bufstates[bidx].aob; 3724 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3725 QETH_CARD_TEXT(queue->card, 5, "aob"); 3726 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3727 virt_to_phys(buffer->aob)); 3728 if (qeth_init_qdio_out_buf(queue, bidx)) { 3729 QETH_CARD_TEXT(card, 2, "outofbuf"); 3730 qeth_schedule_recovery(card); 3731 } 3732 } else { 3733 if (card->options.cq == QETH_CQ_ENABLED) { 3734 enum iucv_tx_notify n; 3735 3736 n = qeth_compute_cq_notification( 3737 buffer->buffer->element[15].sflags, 0); 3738 qeth_notify_skbs(queue, buffer, n); 3739 } 3740 3741 qeth_clear_output_buffer(queue, buffer, 3742 QETH_QDIO_BUF_EMPTY); 3743 } 3744 qeth_cleanup_handled_pending(queue, bidx, 0); 3745 } 3746 atomic_sub(count, &queue->used_buffers); 3747 /* check if we need to do something on this outbound queue */ 3748 if (card->info.type != QETH_CARD_TYPE_IQD) 3749 qeth_check_outbound_queue(queue); 3750 3751 netif_wake_queue(queue->card->dev); 3752 if (card->options.performance_stats) 3753 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3754 card->perf_stats.outbound_handler_start_time; 3755 } 3756 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3757 3758 /* We cannot use outbound queue 3 for unicast packets on HiperSockets */ 3759 static inline int qeth_cut_iqd_prio(struct qeth_card *card, int queue_num) 3760 { 3761 if ((card->info.type == QETH_CARD_TYPE_IQD) && (queue_num == 3)) 3762 return 2; 3763 return queue_num; 3764 } 3765 3766 /** 3767 * Note: Function assumes that we have 4 outbound queues. 3768 */ 3769 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3770 int ipv, int cast_type) 3771 { 3772 __be16 *tci; 3773 u8 tos; 3774 3775 if (cast_type && card->info.is_multicast_different) 3776 return card->info.is_multicast_different & 3777 (card->qdio.no_out_queues - 1); 3778 3779 switch (card->qdio.do_prio_queueing) { 3780 case QETH_PRIO_Q_ING_TOS: 3781 case QETH_PRIO_Q_ING_PREC: 3782 switch (ipv) { 3783 case 4: 3784 tos = ipv4_get_dsfield(ip_hdr(skb)); 3785 break; 3786 case 6: 3787 tos = ipv6_get_dsfield(ipv6_hdr(skb)); 3788 break; 3789 default: 3790 return card->qdio.default_out_queue; 3791 } 3792 if (card->qdio.do_prio_queueing == QETH_PRIO_Q_ING_PREC) 3793 return qeth_cut_iqd_prio(card, ~tos >> 6 & 3); 3794 if (tos & IPTOS_MINCOST) 3795 return qeth_cut_iqd_prio(card, 3); 3796 if (tos & IPTOS_RELIABILITY) 3797 return 2; 3798 if (tos & IPTOS_THROUGHPUT) 3799 return 1; 3800 if (tos & IPTOS_LOWDELAY) 3801 return 0; 3802 break; 3803 case QETH_PRIO_Q_ING_SKB: 3804 if (skb->priority > 5) 3805 return 0; 3806 return qeth_cut_iqd_prio(card, ~skb->priority >> 1 & 3); 3807 case QETH_PRIO_Q_ING_VLAN: 3808 tci = &((struct ethhdr *)skb->data)->h_proto; 3809 if (be16_to_cpu(*tci) == ETH_P_8021Q) 3810 return qeth_cut_iqd_prio(card, 3811 ~be16_to_cpu(*(tci + 1)) >> (VLAN_PRIO_SHIFT + 1) & 3); 3812 break; 3813 default: 3814 break; 3815 } 3816 return card->qdio.default_out_queue; 3817 } 3818 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3819 3820 /** 3821 * qeth_get_elements_for_frags() - find number of SBALEs for skb frags. 3822 * @skb: SKB address 3823 * 3824 * Returns the number of pages, and thus QDIO buffer elements, needed to cover 3825 * fragmented part of the SKB. Returns zero for linear SKB. 3826 */ 3827 int qeth_get_elements_for_frags(struct sk_buff *skb) 3828 { 3829 int cnt, elements = 0; 3830 3831 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3832 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[cnt]; 3833 3834 elements += qeth_get_elements_for_range( 3835 (addr_t)skb_frag_address(frag), 3836 (addr_t)skb_frag_address(frag) + skb_frag_size(frag)); 3837 } 3838 return elements; 3839 } 3840 EXPORT_SYMBOL_GPL(qeth_get_elements_for_frags); 3841 3842 /** 3843 * qeth_get_elements_no() - find number of SBALEs for skb data, inc. frags. 3844 * @card: qeth card structure, to check max. elems. 3845 * @skb: SKB address 3846 * @extra_elems: extra elems needed, to check against max. 3847 * @data_offset: range starts at skb->data + data_offset 3848 * 3849 * Returns the number of pages, and thus QDIO buffer elements, needed to cover 3850 * skb data, including linear part and fragments. Checks if the result plus 3851 * extra_elems fits under the limit for the card. Returns 0 if it does not. 3852 * Note: extra_elems is not included in the returned result. 3853 */ 3854 int qeth_get_elements_no(struct qeth_card *card, 3855 struct sk_buff *skb, int extra_elems, int data_offset) 3856 { 3857 int elements = qeth_get_elements_for_range( 3858 (addr_t)skb->data + data_offset, 3859 (addr_t)skb->data + skb_headlen(skb)) + 3860 qeth_get_elements_for_frags(skb); 3861 3862 if ((elements + extra_elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3863 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3864 "(Number=%d / Length=%d). Discarded.\n", 3865 elements + extra_elems, skb->len); 3866 return 0; 3867 } 3868 return elements; 3869 } 3870 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3871 3872 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, struct qeth_hdr **hdr, int len) 3873 { 3874 int hroom, inpage, rest; 3875 3876 if (((unsigned long)skb->data & PAGE_MASK) != 3877 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3878 hroom = skb_headroom(skb); 3879 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3880 rest = len - inpage; 3881 if (rest > hroom) 3882 return 1; 3883 memmove(skb->data - rest, skb->data, skb_headlen(skb)); 3884 skb->data -= rest; 3885 skb->tail -= rest; 3886 *hdr = (struct qeth_hdr *)skb->data; 3887 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3888 } 3889 return 0; 3890 } 3891 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3892 3893 /** 3894 * qeth_push_hdr() - push a qeth_hdr onto an skb. 3895 * @skb: skb that the qeth_hdr should be pushed onto. 3896 * @hdr: double pointer to a qeth_hdr. When returning with >= 0, 3897 * it contains a valid pointer to a qeth_hdr. 3898 * @len: length of the hdr that needs to be pushed on. 3899 * 3900 * Returns the pushed length. If the header can't be pushed on 3901 * (eg. because it would cross a page boundary), it is allocated from 3902 * the cache instead and 0 is returned. 3903 * Error to create the hdr is indicated by returning with < 0. 3904 */ 3905 int qeth_push_hdr(struct sk_buff *skb, struct qeth_hdr **hdr, unsigned int len) 3906 { 3907 if (skb_headroom(skb) >= len && 3908 qeth_get_elements_for_range((addr_t)skb->data - len, 3909 (addr_t)skb->data) == 1) { 3910 *hdr = skb_push(skb, len); 3911 return len; 3912 } 3913 /* fall back */ 3914 *hdr = kmem_cache_alloc(qeth_core_header_cache, GFP_ATOMIC); 3915 if (!*hdr) 3916 return -ENOMEM; 3917 return 0; 3918 } 3919 EXPORT_SYMBOL_GPL(qeth_push_hdr); 3920 3921 static void __qeth_fill_buffer(struct sk_buff *skb, 3922 struct qeth_qdio_out_buffer *buf, 3923 bool is_first_elem, unsigned int offset) 3924 { 3925 struct qdio_buffer *buffer = buf->buffer; 3926 int element = buf->next_element_to_fill; 3927 int length = skb_headlen(skb) - offset; 3928 char *data = skb->data + offset; 3929 int length_here, cnt; 3930 3931 /* map linear part into buffer element(s) */ 3932 while (length > 0) { 3933 /* length_here is the remaining amount of data in this page */ 3934 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3935 if (length < length_here) 3936 length_here = length; 3937 3938 buffer->element[element].addr = data; 3939 buffer->element[element].length = length_here; 3940 length -= length_here; 3941 if (is_first_elem) { 3942 is_first_elem = false; 3943 if (length || skb_is_nonlinear(skb)) 3944 /* skb needs additional elements */ 3945 buffer->element[element].eflags = 3946 SBAL_EFLAGS_FIRST_FRAG; 3947 else 3948 buffer->element[element].eflags = 0; 3949 } else { 3950 buffer->element[element].eflags = 3951 SBAL_EFLAGS_MIDDLE_FRAG; 3952 } 3953 data += length_here; 3954 element++; 3955 } 3956 3957 /* map page frags into buffer element(s) */ 3958 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3959 skb_frag_t *frag = &skb_shinfo(skb)->frags[cnt]; 3960 3961 data = skb_frag_address(frag); 3962 length = skb_frag_size(frag); 3963 while (length > 0) { 3964 length_here = PAGE_SIZE - 3965 ((unsigned long) data % PAGE_SIZE); 3966 if (length < length_here) 3967 length_here = length; 3968 3969 buffer->element[element].addr = data; 3970 buffer->element[element].length = length_here; 3971 buffer->element[element].eflags = 3972 SBAL_EFLAGS_MIDDLE_FRAG; 3973 length -= length_here; 3974 data += length_here; 3975 element++; 3976 } 3977 } 3978 3979 if (buffer->element[element - 1].eflags) 3980 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3981 buf->next_element_to_fill = element; 3982 } 3983 3984 /** 3985 * qeth_fill_buffer() - map skb into an output buffer 3986 * @queue: QDIO queue to submit the buffer on 3987 * @buf: buffer to transport the skb 3988 * @skb: skb to map into the buffer 3989 * @hdr: qeth_hdr for this skb. Either at skb->data, or allocated 3990 * from qeth_core_header_cache. 3991 * @offset: when mapping the skb, start at skb->data + offset 3992 * @hd_len: if > 0, build a dedicated header element of this size 3993 */ 3994 static int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3995 struct qeth_qdio_out_buffer *buf, 3996 struct sk_buff *skb, struct qeth_hdr *hdr, 3997 unsigned int offset, unsigned int hd_len) 3998 { 3999 struct qdio_buffer *buffer = buf->buffer; 4000 bool is_first_elem = true; 4001 int flush_cnt = 0; 4002 4003 refcount_inc(&skb->users); 4004 skb_queue_tail(&buf->skb_list, skb); 4005 4006 /* build dedicated header element */ 4007 if (hd_len) { 4008 int element = buf->next_element_to_fill; 4009 is_first_elem = false; 4010 4011 buffer->element[element].addr = hdr; 4012 buffer->element[element].length = hd_len; 4013 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 4014 /* remember to free cache-allocated qeth_hdr: */ 4015 buf->is_header[element] = ((void *)hdr != skb->data); 4016 buf->next_element_to_fill++; 4017 } 4018 4019 __qeth_fill_buffer(skb, buf, is_first_elem, offset); 4020 4021 if (!queue->do_pack) { 4022 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 4023 /* set state to PRIMED -> will be flushed */ 4024 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4025 flush_cnt = 1; 4026 } else { 4027 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 4028 if (queue->card->options.performance_stats) 4029 queue->card->perf_stats.skbs_sent_pack++; 4030 if (buf->next_element_to_fill >= 4031 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 4032 /* 4033 * packed buffer if full -> set state PRIMED 4034 * -> will be flushed 4035 */ 4036 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 4037 flush_cnt = 1; 4038 } 4039 } 4040 return flush_cnt; 4041 } 4042 4043 int qeth_do_send_packet_fast(struct qeth_card *card, 4044 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 4045 struct qeth_hdr *hdr, unsigned int offset, 4046 unsigned int hd_len) 4047 { 4048 struct qeth_qdio_out_buffer *buffer; 4049 int index; 4050 4051 /* spin until we get the queue ... */ 4052 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4053 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4054 /* ... now we've got the queue */ 4055 index = queue->next_buf_to_fill; 4056 buffer = queue->bufs[queue->next_buf_to_fill]; 4057 /* 4058 * check if buffer is empty to make sure that we do not 'overtake' 4059 * ourselves and try to fill a buffer that is already primed 4060 */ 4061 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 4062 goto out; 4063 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 4064 QDIO_MAX_BUFFERS_PER_Q; 4065 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4066 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4067 qeth_flush_buffers(queue, index, 1); 4068 return 0; 4069 out: 4070 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4071 return -EBUSY; 4072 } 4073 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 4074 4075 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 4076 struct sk_buff *skb, struct qeth_hdr *hdr, 4077 unsigned int offset, unsigned int hd_len, 4078 int elements_needed) 4079 { 4080 struct qeth_qdio_out_buffer *buffer; 4081 int start_index; 4082 int flush_count = 0; 4083 int do_pack = 0; 4084 int tmp; 4085 int rc = 0; 4086 4087 /* spin until we get the queue ... */ 4088 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 4089 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 4090 start_index = queue->next_buf_to_fill; 4091 buffer = queue->bufs[queue->next_buf_to_fill]; 4092 /* 4093 * check if buffer is empty to make sure that we do not 'overtake' 4094 * ourselves and try to fill a buffer that is already primed 4095 */ 4096 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 4097 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 4098 return -EBUSY; 4099 } 4100 /* check if we need to switch packing state of this queue */ 4101 qeth_switch_to_packing_if_needed(queue); 4102 if (queue->do_pack) { 4103 do_pack = 1; 4104 /* does packet fit in current buffer? */ 4105 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 4106 buffer->next_element_to_fill) < elements_needed) { 4107 /* ... no -> set state PRIMED */ 4108 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 4109 flush_count++; 4110 queue->next_buf_to_fill = 4111 (queue->next_buf_to_fill + 1) % 4112 QDIO_MAX_BUFFERS_PER_Q; 4113 buffer = queue->bufs[queue->next_buf_to_fill]; 4114 /* we did a step forward, so check buffer state 4115 * again */ 4116 if (atomic_read(&buffer->state) != 4117 QETH_QDIO_BUF_EMPTY) { 4118 qeth_flush_buffers(queue, start_index, 4119 flush_count); 4120 atomic_set(&queue->state, 4121 QETH_OUT_Q_UNLOCKED); 4122 rc = -EBUSY; 4123 goto out; 4124 } 4125 } 4126 } 4127 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 4128 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 4129 QDIO_MAX_BUFFERS_PER_Q; 4130 flush_count += tmp; 4131 if (flush_count) 4132 qeth_flush_buffers(queue, start_index, flush_count); 4133 else if (!atomic_read(&queue->set_pci_flags_count)) 4134 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 4135 /* 4136 * queue->state will go from LOCKED -> UNLOCKED or from 4137 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 4138 * (switch packing state or flush buffer to get another pci flag out). 4139 * In that case we will enter this loop 4140 */ 4141 while (atomic_dec_return(&queue->state)) { 4142 start_index = queue->next_buf_to_fill; 4143 /* check if we can go back to non-packing state */ 4144 tmp = qeth_switch_to_nonpacking_if_needed(queue); 4145 /* 4146 * check if we need to flush a packing buffer to get a pci 4147 * flag out on the queue 4148 */ 4149 if (!tmp && !atomic_read(&queue->set_pci_flags_count)) 4150 tmp = qeth_prep_flush_pack_buffer(queue); 4151 if (tmp) { 4152 qeth_flush_buffers(queue, start_index, tmp); 4153 flush_count += tmp; 4154 } 4155 } 4156 out: 4157 /* at this point the queue is UNLOCKED again */ 4158 if (queue->card->options.performance_stats && do_pack) 4159 queue->card->perf_stats.bufs_sent_pack += flush_count; 4160 4161 return rc; 4162 } 4163 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 4164 4165 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 4166 struct qeth_reply *reply, unsigned long data) 4167 { 4168 struct qeth_ipa_cmd *cmd; 4169 struct qeth_ipacmd_setadpparms *setparms; 4170 4171 QETH_CARD_TEXT(card, 4, "prmadpcb"); 4172 4173 cmd = (struct qeth_ipa_cmd *) data; 4174 setparms = &(cmd->data.setadapterparms); 4175 4176 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 4177 if (cmd->hdr.return_code) { 4178 QETH_CARD_TEXT_(card, 4, "prmrc%x", cmd->hdr.return_code); 4179 setparms->data.mode = SET_PROMISC_MODE_OFF; 4180 } 4181 card->info.promisc_mode = setparms->data.mode; 4182 return 0; 4183 } 4184 4185 void qeth_setadp_promisc_mode(struct qeth_card *card) 4186 { 4187 enum qeth_ipa_promisc_modes mode; 4188 struct net_device *dev = card->dev; 4189 struct qeth_cmd_buffer *iob; 4190 struct qeth_ipa_cmd *cmd; 4191 4192 QETH_CARD_TEXT(card, 4, "setprom"); 4193 4194 if (((dev->flags & IFF_PROMISC) && 4195 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 4196 (!(dev->flags & IFF_PROMISC) && 4197 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 4198 return; 4199 mode = SET_PROMISC_MODE_OFF; 4200 if (dev->flags & IFF_PROMISC) 4201 mode = SET_PROMISC_MODE_ON; 4202 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 4203 4204 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 4205 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 8); 4206 if (!iob) 4207 return; 4208 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 4209 cmd->data.setadapterparms.data.mode = mode; 4210 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 4211 } 4212 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 4213 4214 int qeth_change_mtu(struct net_device *dev, int new_mtu) 4215 { 4216 struct qeth_card *card; 4217 char dbf_text[15]; 4218 4219 card = dev->ml_priv; 4220 4221 QETH_CARD_TEXT(card, 4, "chgmtu"); 4222 sprintf(dbf_text, "%8x", new_mtu); 4223 QETH_CARD_TEXT(card, 4, dbf_text); 4224 4225 if (!qeth_mtu_is_valid(card, new_mtu)) 4226 return -EINVAL; 4227 dev->mtu = new_mtu; 4228 return 0; 4229 } 4230 EXPORT_SYMBOL_GPL(qeth_change_mtu); 4231 4232 struct net_device_stats *qeth_get_stats(struct net_device *dev) 4233 { 4234 struct qeth_card *card; 4235 4236 card = dev->ml_priv; 4237 4238 QETH_CARD_TEXT(card, 5, "getstat"); 4239 4240 return &card->stats; 4241 } 4242 EXPORT_SYMBOL_GPL(qeth_get_stats); 4243 4244 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4245 struct qeth_reply *reply, unsigned long data) 4246 { 4247 struct qeth_ipa_cmd *cmd; 4248 4249 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4250 4251 cmd = (struct qeth_ipa_cmd *) data; 4252 if (!card->options.layer2 || 4253 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4254 memcpy(card->dev->dev_addr, 4255 &cmd->data.setadapterparms.data.change_addr.addr, 4256 OSA_ADDR_LEN); 4257 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4258 } 4259 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4260 return 0; 4261 } 4262 4263 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4264 { 4265 int rc; 4266 struct qeth_cmd_buffer *iob; 4267 struct qeth_ipa_cmd *cmd; 4268 4269 QETH_CARD_TEXT(card, 4, "chgmac"); 4270 4271 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4272 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4273 sizeof(struct qeth_change_addr)); 4274 if (!iob) 4275 return -ENOMEM; 4276 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4277 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4278 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4279 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4280 card->dev->dev_addr, OSA_ADDR_LEN); 4281 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4282 NULL); 4283 return rc; 4284 } 4285 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4286 4287 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4288 struct qeth_reply *reply, unsigned long data) 4289 { 4290 struct qeth_ipa_cmd *cmd; 4291 struct qeth_set_access_ctrl *access_ctrl_req; 4292 int fallback = *(int *)reply->param; 4293 4294 QETH_CARD_TEXT(card, 4, "setaccb"); 4295 4296 cmd = (struct qeth_ipa_cmd *) data; 4297 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4298 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4299 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4300 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4301 cmd->data.setadapterparms.hdr.return_code); 4302 if (cmd->data.setadapterparms.hdr.return_code != 4303 SET_ACCESS_CTRL_RC_SUCCESS) 4304 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4305 card->gdev->dev.kobj.name, 4306 access_ctrl_req->subcmd_code, 4307 cmd->data.setadapterparms.hdr.return_code); 4308 switch (cmd->data.setadapterparms.hdr.return_code) { 4309 case SET_ACCESS_CTRL_RC_SUCCESS: 4310 if (card->options.isolation == ISOLATION_MODE_NONE) { 4311 dev_info(&card->gdev->dev, 4312 "QDIO data connection isolation is deactivated\n"); 4313 } else { 4314 dev_info(&card->gdev->dev, 4315 "QDIO data connection isolation is activated\n"); 4316 } 4317 break; 4318 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4319 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already " 4320 "deactivated\n", dev_name(&card->gdev->dev)); 4321 if (fallback) 4322 card->options.isolation = card->options.prev_isolation; 4323 break; 4324 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4325 QETH_DBF_MESSAGE(2, "%s QDIO data connection isolation already" 4326 " activated\n", dev_name(&card->gdev->dev)); 4327 if (fallback) 4328 card->options.isolation = card->options.prev_isolation; 4329 break; 4330 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4331 dev_err(&card->gdev->dev, "Adapter does not " 4332 "support QDIO data connection isolation\n"); 4333 break; 4334 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4335 dev_err(&card->gdev->dev, 4336 "Adapter is dedicated. " 4337 "QDIO data connection isolation not supported\n"); 4338 if (fallback) 4339 card->options.isolation = card->options.prev_isolation; 4340 break; 4341 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4342 dev_err(&card->gdev->dev, 4343 "TSO does not permit QDIO data connection isolation\n"); 4344 if (fallback) 4345 card->options.isolation = card->options.prev_isolation; 4346 break; 4347 case SET_ACCESS_CTRL_RC_REFLREL_UNSUPPORTED: 4348 dev_err(&card->gdev->dev, "The adjacent switch port does not " 4349 "support reflective relay mode\n"); 4350 if (fallback) 4351 card->options.isolation = card->options.prev_isolation; 4352 break; 4353 case SET_ACCESS_CTRL_RC_REFLREL_FAILED: 4354 dev_err(&card->gdev->dev, "The reflective relay mode cannot be " 4355 "enabled at the adjacent switch port"); 4356 if (fallback) 4357 card->options.isolation = card->options.prev_isolation; 4358 break; 4359 case SET_ACCESS_CTRL_RC_REFLREL_DEACT_FAILED: 4360 dev_warn(&card->gdev->dev, "Turning off reflective relay mode " 4361 "at the adjacent switch failed\n"); 4362 break; 4363 default: 4364 /* this should never happen */ 4365 if (fallback) 4366 card->options.isolation = card->options.prev_isolation; 4367 break; 4368 } 4369 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4370 return 0; 4371 } 4372 4373 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4374 enum qeth_ipa_isolation_modes isolation, int fallback) 4375 { 4376 int rc; 4377 struct qeth_cmd_buffer *iob; 4378 struct qeth_ipa_cmd *cmd; 4379 struct qeth_set_access_ctrl *access_ctrl_req; 4380 4381 QETH_CARD_TEXT(card, 4, "setacctl"); 4382 4383 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4384 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4385 4386 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4387 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4388 sizeof(struct qeth_set_access_ctrl)); 4389 if (!iob) 4390 return -ENOMEM; 4391 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4392 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4393 access_ctrl_req->subcmd_code = isolation; 4394 4395 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4396 &fallback); 4397 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4398 return rc; 4399 } 4400 4401 int qeth_set_access_ctrl_online(struct qeth_card *card, int fallback) 4402 { 4403 int rc = 0; 4404 4405 QETH_CARD_TEXT(card, 4, "setactlo"); 4406 4407 if ((card->info.type == QETH_CARD_TYPE_OSD || 4408 card->info.type == QETH_CARD_TYPE_OSX) && 4409 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4410 rc = qeth_setadpparms_set_access_ctrl(card, 4411 card->options.isolation, fallback); 4412 if (rc) { 4413 QETH_DBF_MESSAGE(3, 4414 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4415 card->gdev->dev.kobj.name, 4416 rc); 4417 rc = -EOPNOTSUPP; 4418 } 4419 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4420 card->options.isolation = ISOLATION_MODE_NONE; 4421 4422 dev_err(&card->gdev->dev, "Adapter does not " 4423 "support QDIO data connection isolation\n"); 4424 rc = -EOPNOTSUPP; 4425 } 4426 return rc; 4427 } 4428 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4429 4430 void qeth_tx_timeout(struct net_device *dev) 4431 { 4432 struct qeth_card *card; 4433 4434 card = dev->ml_priv; 4435 QETH_CARD_TEXT(card, 4, "txtimeo"); 4436 card->stats.tx_errors++; 4437 qeth_schedule_recovery(card); 4438 } 4439 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4440 4441 static int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4442 { 4443 struct qeth_card *card = dev->ml_priv; 4444 int rc = 0; 4445 4446 switch (regnum) { 4447 case MII_BMCR: /* Basic mode control register */ 4448 rc = BMCR_FULLDPLX; 4449 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4450 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4451 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4452 rc |= BMCR_SPEED100; 4453 break; 4454 case MII_BMSR: /* Basic mode status register */ 4455 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4456 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4457 BMSR_100BASE4; 4458 break; 4459 case MII_PHYSID1: /* PHYS ID 1 */ 4460 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4461 dev->dev_addr[2]; 4462 rc = (rc >> 5) & 0xFFFF; 4463 break; 4464 case MII_PHYSID2: /* PHYS ID 2 */ 4465 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4466 break; 4467 case MII_ADVERTISE: /* Advertisement control reg */ 4468 rc = ADVERTISE_ALL; 4469 break; 4470 case MII_LPA: /* Link partner ability reg */ 4471 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4472 LPA_100BASE4 | LPA_LPACK; 4473 break; 4474 case MII_EXPANSION: /* Expansion register */ 4475 break; 4476 case MII_DCOUNTER: /* disconnect counter */ 4477 break; 4478 case MII_FCSCOUNTER: /* false carrier counter */ 4479 break; 4480 case MII_NWAYTEST: /* N-way auto-neg test register */ 4481 break; 4482 case MII_RERRCOUNTER: /* rx error counter */ 4483 rc = card->stats.rx_errors; 4484 break; 4485 case MII_SREVISION: /* silicon revision */ 4486 break; 4487 case MII_RESV1: /* reserved 1 */ 4488 break; 4489 case MII_LBRERROR: /* loopback, rx, bypass error */ 4490 break; 4491 case MII_PHYADDR: /* physical address */ 4492 break; 4493 case MII_RESV2: /* reserved 2 */ 4494 break; 4495 case MII_TPISTATUS: /* TPI status for 10mbps */ 4496 break; 4497 case MII_NCONFIG: /* network interface config */ 4498 break; 4499 default: 4500 break; 4501 } 4502 return rc; 4503 } 4504 4505 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4506 struct qeth_cmd_buffer *iob, int len, 4507 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4508 unsigned long), 4509 void *reply_param) 4510 { 4511 u16 s1, s2; 4512 4513 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4514 4515 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4516 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4517 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4518 /* adjust PDU length fields in IPA_PDU_HEADER */ 4519 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4520 s2 = (u32) len; 4521 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4522 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4523 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4524 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4525 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4526 reply_cb, reply_param); 4527 } 4528 4529 static int qeth_snmp_command_cb(struct qeth_card *card, 4530 struct qeth_reply *reply, unsigned long sdata) 4531 { 4532 struct qeth_ipa_cmd *cmd; 4533 struct qeth_arp_query_info *qinfo; 4534 struct qeth_snmp_cmd *snmp; 4535 unsigned char *data; 4536 __u16 data_len; 4537 4538 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4539 4540 cmd = (struct qeth_ipa_cmd *) sdata; 4541 data = (unsigned char *)((char *)cmd - reply->offset); 4542 qinfo = (struct qeth_arp_query_info *) reply->param; 4543 snmp = &cmd->data.setadapterparms.data.snmp; 4544 4545 if (cmd->hdr.return_code) { 4546 QETH_CARD_TEXT_(card, 4, "scer1%x", cmd->hdr.return_code); 4547 return 0; 4548 } 4549 if (cmd->data.setadapterparms.hdr.return_code) { 4550 cmd->hdr.return_code = 4551 cmd->data.setadapterparms.hdr.return_code; 4552 QETH_CARD_TEXT_(card, 4, "scer2%x", cmd->hdr.return_code); 4553 return 0; 4554 } 4555 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4556 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4557 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4558 else 4559 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4560 4561 /* check if there is enough room in userspace */ 4562 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4563 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4564 cmd->hdr.return_code = IPA_RC_ENOMEM; 4565 return 0; 4566 } 4567 QETH_CARD_TEXT_(card, 4, "snore%i", 4568 cmd->data.setadapterparms.hdr.used_total); 4569 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4570 cmd->data.setadapterparms.hdr.seq_no); 4571 /*copy entries to user buffer*/ 4572 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4573 memcpy(qinfo->udata + qinfo->udata_offset, 4574 (char *)snmp, 4575 data_len + offsetof(struct qeth_snmp_cmd, data)); 4576 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4577 } else { 4578 memcpy(qinfo->udata + qinfo->udata_offset, 4579 (char *)&snmp->request, data_len); 4580 } 4581 qinfo->udata_offset += data_len; 4582 /* check if all replies received ... */ 4583 QETH_CARD_TEXT_(card, 4, "srtot%i", 4584 cmd->data.setadapterparms.hdr.used_total); 4585 QETH_CARD_TEXT_(card, 4, "srseq%i", 4586 cmd->data.setadapterparms.hdr.seq_no); 4587 if (cmd->data.setadapterparms.hdr.seq_no < 4588 cmd->data.setadapterparms.hdr.used_total) 4589 return 1; 4590 return 0; 4591 } 4592 4593 static int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4594 { 4595 struct qeth_cmd_buffer *iob; 4596 struct qeth_ipa_cmd *cmd; 4597 struct qeth_snmp_ureq *ureq; 4598 unsigned int req_len; 4599 struct qeth_arp_query_info qinfo = {0, }; 4600 int rc = 0; 4601 4602 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4603 4604 if (card->info.guestlan) 4605 return -EOPNOTSUPP; 4606 4607 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4608 (!card->options.layer2)) { 4609 return -EOPNOTSUPP; 4610 } 4611 /* skip 4 bytes (data_len struct member) to get req_len */ 4612 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4613 return -EFAULT; 4614 if (req_len > (QETH_BUFSIZE - IPA_PDU_HEADER_SIZE - 4615 sizeof(struct qeth_ipacmd_hdr) - 4616 sizeof(struct qeth_ipacmd_setadpparms_hdr))) 4617 return -EINVAL; 4618 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4619 if (IS_ERR(ureq)) { 4620 QETH_CARD_TEXT(card, 2, "snmpnome"); 4621 return PTR_ERR(ureq); 4622 } 4623 qinfo.udata_len = ureq->hdr.data_len; 4624 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4625 if (!qinfo.udata) { 4626 kfree(ureq); 4627 return -ENOMEM; 4628 } 4629 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4630 4631 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4632 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4633 if (!iob) { 4634 rc = -ENOMEM; 4635 goto out; 4636 } 4637 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4638 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4639 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4640 qeth_snmp_command_cb, (void *)&qinfo); 4641 if (rc) 4642 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4643 QETH_CARD_IFNAME(card), rc); 4644 else { 4645 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4646 rc = -EFAULT; 4647 } 4648 out: 4649 kfree(ureq); 4650 kfree(qinfo.udata); 4651 return rc; 4652 } 4653 4654 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4655 struct qeth_reply *reply, unsigned long data) 4656 { 4657 struct qeth_ipa_cmd *cmd; 4658 struct qeth_qoat_priv *priv; 4659 char *resdata; 4660 int resdatalen; 4661 4662 QETH_CARD_TEXT(card, 3, "qoatcb"); 4663 4664 cmd = (struct qeth_ipa_cmd *)data; 4665 priv = (struct qeth_qoat_priv *)reply->param; 4666 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4667 resdata = (char *)data + 28; 4668 4669 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4670 cmd->hdr.return_code = IPA_RC_FFFF; 4671 return 0; 4672 } 4673 4674 memcpy((priv->buffer + priv->response_len), resdata, 4675 resdatalen); 4676 priv->response_len += resdatalen; 4677 4678 if (cmd->data.setadapterparms.hdr.seq_no < 4679 cmd->data.setadapterparms.hdr.used_total) 4680 return 1; 4681 return 0; 4682 } 4683 4684 static int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4685 { 4686 int rc = 0; 4687 struct qeth_cmd_buffer *iob; 4688 struct qeth_ipa_cmd *cmd; 4689 struct qeth_query_oat *oat_req; 4690 struct qeth_query_oat_data oat_data; 4691 struct qeth_qoat_priv priv; 4692 void __user *tmp; 4693 4694 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4695 4696 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4697 rc = -EOPNOTSUPP; 4698 goto out; 4699 } 4700 4701 if (copy_from_user(&oat_data, udata, 4702 sizeof(struct qeth_query_oat_data))) { 4703 rc = -EFAULT; 4704 goto out; 4705 } 4706 4707 priv.buffer_len = oat_data.buffer_len; 4708 priv.response_len = 0; 4709 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4710 if (!priv.buffer) { 4711 rc = -ENOMEM; 4712 goto out; 4713 } 4714 4715 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4716 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4717 sizeof(struct qeth_query_oat)); 4718 if (!iob) { 4719 rc = -ENOMEM; 4720 goto out_free; 4721 } 4722 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4723 oat_req = &cmd->data.setadapterparms.data.query_oat; 4724 oat_req->subcmd_code = oat_data.command; 4725 4726 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4727 &priv); 4728 if (!rc) { 4729 if (is_compat_task()) 4730 tmp = compat_ptr(oat_data.ptr); 4731 else 4732 tmp = (void __user *)(unsigned long)oat_data.ptr; 4733 4734 if (copy_to_user(tmp, priv.buffer, 4735 priv.response_len)) { 4736 rc = -EFAULT; 4737 goto out_free; 4738 } 4739 4740 oat_data.response_len = priv.response_len; 4741 4742 if (copy_to_user(udata, &oat_data, 4743 sizeof(struct qeth_query_oat_data))) 4744 rc = -EFAULT; 4745 } else 4746 if (rc == IPA_RC_FFFF) 4747 rc = -EFAULT; 4748 4749 out_free: 4750 kfree(priv.buffer); 4751 out: 4752 return rc; 4753 } 4754 4755 static int qeth_query_card_info_cb(struct qeth_card *card, 4756 struct qeth_reply *reply, unsigned long data) 4757 { 4758 struct qeth_ipa_cmd *cmd; 4759 struct qeth_query_card_info *card_info; 4760 struct carrier_info *carrier_info; 4761 4762 QETH_CARD_TEXT(card, 2, "qcrdincb"); 4763 carrier_info = (struct carrier_info *)reply->param; 4764 cmd = (struct qeth_ipa_cmd *)data; 4765 card_info = &cmd->data.setadapterparms.data.card_info; 4766 if (cmd->data.setadapterparms.hdr.return_code == 0) { 4767 carrier_info->card_type = card_info->card_type; 4768 carrier_info->port_mode = card_info->port_mode; 4769 carrier_info->port_speed = card_info->port_speed; 4770 } 4771 4772 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4773 return 0; 4774 } 4775 4776 static int qeth_query_card_info(struct qeth_card *card, 4777 struct carrier_info *carrier_info) 4778 { 4779 struct qeth_cmd_buffer *iob; 4780 4781 QETH_CARD_TEXT(card, 2, "qcrdinfo"); 4782 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_CARD_INFO)) 4783 return -EOPNOTSUPP; 4784 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_CARD_INFO, 4785 sizeof(struct qeth_ipacmd_setadpparms_hdr)); 4786 if (!iob) 4787 return -ENOMEM; 4788 return qeth_send_ipa_cmd(card, iob, qeth_query_card_info_cb, 4789 (void *)carrier_info); 4790 } 4791 4792 /** 4793 * qeth_vm_request_mac() - Request a hypervisor-managed MAC address 4794 * @card: pointer to a qeth_card 4795 * 4796 * Returns 4797 * 0, if a MAC address has been set for the card's netdevice 4798 * a return code, for various error conditions 4799 */ 4800 int qeth_vm_request_mac(struct qeth_card *card) 4801 { 4802 struct diag26c_mac_resp *response; 4803 struct diag26c_mac_req *request; 4804 struct ccw_dev_id id; 4805 int rc; 4806 4807 QETH_DBF_TEXT(SETUP, 2, "vmreqmac"); 4808 4809 if (!card->dev) 4810 return -ENODEV; 4811 4812 request = kzalloc(sizeof(*request), GFP_KERNEL | GFP_DMA); 4813 response = kzalloc(sizeof(*response), GFP_KERNEL | GFP_DMA); 4814 if (!request || !response) { 4815 rc = -ENOMEM; 4816 goto out; 4817 } 4818 4819 ccw_device_get_id(CARD_DDEV(card), &id); 4820 request->resp_buf_len = sizeof(*response); 4821 request->resp_version = DIAG26C_VERSION2; 4822 request->op_code = DIAG26C_GET_MAC; 4823 request->devno = id.devno; 4824 4825 rc = diag26c(request, response, DIAG26C_MAC_SERVICES); 4826 if (rc) 4827 goto out; 4828 4829 if (request->resp_buf_len < sizeof(*response) || 4830 response->version != request->resp_version) { 4831 rc = -EIO; 4832 QETH_DBF_TEXT(SETUP, 2, "badresp"); 4833 QETH_DBF_HEX(SETUP, 2, &request->resp_buf_len, 4834 sizeof(request->resp_buf_len)); 4835 } else if (!is_valid_ether_addr(response->mac)) { 4836 rc = -EINVAL; 4837 QETH_DBF_TEXT(SETUP, 2, "badmac"); 4838 QETH_DBF_HEX(SETUP, 2, response->mac, ETH_ALEN); 4839 } else { 4840 ether_addr_copy(card->dev->dev_addr, response->mac); 4841 } 4842 4843 out: 4844 kfree(response); 4845 kfree(request); 4846 return rc; 4847 } 4848 EXPORT_SYMBOL_GPL(qeth_vm_request_mac); 4849 4850 static int qeth_get_qdio_q_format(struct qeth_card *card) 4851 { 4852 if (card->info.type == QETH_CARD_TYPE_IQD) 4853 return QDIO_IQDIO_QFMT; 4854 else 4855 return QDIO_QETH_QFMT; 4856 } 4857 4858 static void qeth_determine_capabilities(struct qeth_card *card) 4859 { 4860 int rc; 4861 int length; 4862 char *prcd; 4863 struct ccw_device *ddev; 4864 int ddev_offline = 0; 4865 4866 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4867 ddev = CARD_DDEV(card); 4868 if (!ddev->online) { 4869 ddev_offline = 1; 4870 rc = ccw_device_set_online(ddev); 4871 if (rc) { 4872 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4873 goto out; 4874 } 4875 } 4876 4877 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4878 if (rc) { 4879 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4880 dev_name(&card->gdev->dev), rc); 4881 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4882 goto out_offline; 4883 } 4884 qeth_configure_unitaddr(card, prcd); 4885 if (ddev_offline) 4886 qeth_configure_blkt_default(card, prcd); 4887 kfree(prcd); 4888 4889 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4890 if (rc) 4891 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4892 4893 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4894 QETH_DBF_TEXT_(SETUP, 2, "ac1:%02x", card->ssqd.qdioac1); 4895 QETH_DBF_TEXT_(SETUP, 2, "ac2:%04x", card->ssqd.qdioac2); 4896 QETH_DBF_TEXT_(SETUP, 2, "ac3:%04x", card->ssqd.qdioac3); 4897 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4898 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4899 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4900 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4901 dev_info(&card->gdev->dev, 4902 "Completion Queueing supported\n"); 4903 } else { 4904 card->options.cq = QETH_CQ_NOTAVAILABLE; 4905 } 4906 4907 4908 out_offline: 4909 if (ddev_offline == 1) 4910 ccw_device_set_offline(ddev); 4911 out: 4912 return; 4913 } 4914 4915 static void qeth_qdio_establish_cq(struct qeth_card *card, 4916 struct qdio_buffer **in_sbal_ptrs, 4917 void (**queue_start_poll) 4918 (struct ccw_device *, int, 4919 unsigned long)) 4920 { 4921 int i; 4922 4923 if (card->options.cq == QETH_CQ_ENABLED) { 4924 int offset = QDIO_MAX_BUFFERS_PER_Q * 4925 (card->qdio.no_in_queues - 1); 4926 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4927 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4928 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4929 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4930 } 4931 4932 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4933 } 4934 } 4935 4936 static int qeth_qdio_establish(struct qeth_card *card) 4937 { 4938 struct qdio_initialize init_data; 4939 char *qib_param_field; 4940 struct qdio_buffer **in_sbal_ptrs; 4941 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4942 struct qdio_buffer **out_sbal_ptrs; 4943 int i, j, k; 4944 int rc = 0; 4945 4946 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4947 4948 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4949 GFP_KERNEL); 4950 if (!qib_param_field) { 4951 rc = -ENOMEM; 4952 goto out_free_nothing; 4953 } 4954 4955 qeth_create_qib_param_field(card, qib_param_field); 4956 qeth_create_qib_param_field_blkt(card, qib_param_field); 4957 4958 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4959 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4960 GFP_KERNEL); 4961 if (!in_sbal_ptrs) { 4962 rc = -ENOMEM; 4963 goto out_free_qib_param; 4964 } 4965 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4966 in_sbal_ptrs[i] = (struct qdio_buffer *) 4967 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4968 } 4969 4970 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4971 GFP_KERNEL); 4972 if (!queue_start_poll) { 4973 rc = -ENOMEM; 4974 goto out_free_in_sbals; 4975 } 4976 for (i = 0; i < card->qdio.no_in_queues; ++i) 4977 queue_start_poll[i] = card->discipline->start_poll; 4978 4979 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4980 4981 out_sbal_ptrs = 4982 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4983 sizeof(void *), GFP_KERNEL); 4984 if (!out_sbal_ptrs) { 4985 rc = -ENOMEM; 4986 goto out_free_queue_start_poll; 4987 } 4988 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4989 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4990 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4991 card->qdio.out_qs[i]->bufs[j]->buffer); 4992 } 4993 4994 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4995 init_data.cdev = CARD_DDEV(card); 4996 init_data.q_format = qeth_get_qdio_q_format(card); 4997 init_data.qib_param_field_format = 0; 4998 init_data.qib_param_field = qib_param_field; 4999 init_data.no_input_qs = card->qdio.no_in_queues; 5000 init_data.no_output_qs = card->qdio.no_out_queues; 5001 init_data.input_handler = card->discipline->input_handler; 5002 init_data.output_handler = card->discipline->output_handler; 5003 init_data.queue_start_poll_array = queue_start_poll; 5004 init_data.int_parm = (unsigned long) card; 5005 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 5006 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 5007 init_data.output_sbal_state_array = card->qdio.out_bufstates; 5008 init_data.scan_threshold = 5009 (card->info.type == QETH_CARD_TYPE_IQD) ? 1 : 32; 5010 5011 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 5012 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 5013 rc = qdio_allocate(&init_data); 5014 if (rc) { 5015 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 5016 goto out; 5017 } 5018 rc = qdio_establish(&init_data); 5019 if (rc) { 5020 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 5021 qdio_free(CARD_DDEV(card)); 5022 } 5023 } 5024 5025 switch (card->options.cq) { 5026 case QETH_CQ_ENABLED: 5027 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 5028 break; 5029 case QETH_CQ_DISABLED: 5030 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 5031 break; 5032 default: 5033 break; 5034 } 5035 out: 5036 kfree(out_sbal_ptrs); 5037 out_free_queue_start_poll: 5038 kfree(queue_start_poll); 5039 out_free_in_sbals: 5040 kfree(in_sbal_ptrs); 5041 out_free_qib_param: 5042 kfree(qib_param_field); 5043 out_free_nothing: 5044 return rc; 5045 } 5046 5047 static void qeth_core_free_card(struct qeth_card *card) 5048 { 5049 5050 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 5051 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 5052 qeth_clean_channel(&card->read); 5053 qeth_clean_channel(&card->write); 5054 if (card->dev) 5055 free_netdev(card->dev); 5056 qeth_free_qdio_buffers(card); 5057 unregister_service_level(&card->qeth_service_level); 5058 kfree(card); 5059 } 5060 5061 void qeth_trace_features(struct qeth_card *card) 5062 { 5063 QETH_CARD_TEXT(card, 2, "features"); 5064 QETH_CARD_HEX(card, 2, &card->options.ipa4, sizeof(card->options.ipa4)); 5065 QETH_CARD_HEX(card, 2, &card->options.ipa6, sizeof(card->options.ipa6)); 5066 QETH_CARD_HEX(card, 2, &card->options.adp, sizeof(card->options.adp)); 5067 QETH_CARD_HEX(card, 2, &card->info.diagass_support, 5068 sizeof(card->info.diagass_support)); 5069 } 5070 EXPORT_SYMBOL_GPL(qeth_trace_features); 5071 5072 static struct ccw_device_id qeth_ids[] = { 5073 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 5074 .driver_info = QETH_CARD_TYPE_OSD}, 5075 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 5076 .driver_info = QETH_CARD_TYPE_IQD}, 5077 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 5078 .driver_info = QETH_CARD_TYPE_OSN}, 5079 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 5080 .driver_info = QETH_CARD_TYPE_OSM}, 5081 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 5082 .driver_info = QETH_CARD_TYPE_OSX}, 5083 {}, 5084 }; 5085 MODULE_DEVICE_TABLE(ccw, qeth_ids); 5086 5087 static struct ccw_driver qeth_ccw_driver = { 5088 .driver = { 5089 .owner = THIS_MODULE, 5090 .name = "qeth", 5091 }, 5092 .ids = qeth_ids, 5093 .probe = ccwgroup_probe_ccwdev, 5094 .remove = ccwgroup_remove_ccwdev, 5095 }; 5096 5097 int qeth_core_hardsetup_card(struct qeth_card *card) 5098 { 5099 int retries = 3; 5100 int rc; 5101 5102 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 5103 atomic_set(&card->force_alloc_skb, 0); 5104 qeth_update_from_chp_desc(card); 5105 retry: 5106 if (retries < 3) 5107 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 5108 dev_name(&card->gdev->dev)); 5109 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 5110 ccw_device_set_offline(CARD_DDEV(card)); 5111 ccw_device_set_offline(CARD_WDEV(card)); 5112 ccw_device_set_offline(CARD_RDEV(card)); 5113 qdio_free(CARD_DDEV(card)); 5114 rc = ccw_device_set_online(CARD_RDEV(card)); 5115 if (rc) 5116 goto retriable; 5117 rc = ccw_device_set_online(CARD_WDEV(card)); 5118 if (rc) 5119 goto retriable; 5120 rc = ccw_device_set_online(CARD_DDEV(card)); 5121 if (rc) 5122 goto retriable; 5123 retriable: 5124 if (rc == -ERESTARTSYS) { 5125 QETH_DBF_TEXT(SETUP, 2, "break1"); 5126 return rc; 5127 } else if (rc) { 5128 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 5129 if (--retries < 0) 5130 goto out; 5131 else 5132 goto retry; 5133 } 5134 qeth_determine_capabilities(card); 5135 qeth_init_tokens(card); 5136 qeth_init_func_level(card); 5137 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 5138 if (rc == -ERESTARTSYS) { 5139 QETH_DBF_TEXT(SETUP, 2, "break2"); 5140 return rc; 5141 } else if (rc) { 5142 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5143 if (--retries < 0) 5144 goto out; 5145 else 5146 goto retry; 5147 } 5148 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 5149 if (rc == -ERESTARTSYS) { 5150 QETH_DBF_TEXT(SETUP, 2, "break3"); 5151 return rc; 5152 } else if (rc) { 5153 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 5154 if (--retries < 0) 5155 goto out; 5156 else 5157 goto retry; 5158 } 5159 card->read_or_write_problem = 0; 5160 rc = qeth_mpc_initialize(card); 5161 if (rc) { 5162 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 5163 goto out; 5164 } 5165 5166 rc = qeth_send_startlan(card); 5167 if (rc) { 5168 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 5169 if (rc == IPA_RC_LAN_OFFLINE) { 5170 dev_warn(&card->gdev->dev, 5171 "The LAN is offline\n"); 5172 card->lan_online = 0; 5173 } else { 5174 rc = -ENODEV; 5175 goto out; 5176 } 5177 } else 5178 card->lan_online = 1; 5179 5180 card->options.ipa4.supported_funcs = 0; 5181 card->options.ipa6.supported_funcs = 0; 5182 card->options.adp.supported_funcs = 0; 5183 card->options.sbp.supported_funcs = 0; 5184 card->info.diagass_support = 0; 5185 rc = qeth_query_ipassists(card, QETH_PROT_IPV4); 5186 if (rc == -ENOMEM) 5187 goto out; 5188 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) { 5189 rc = qeth_query_setadapterparms(card); 5190 if (rc < 0) { 5191 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 5192 goto out; 5193 } 5194 } 5195 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) { 5196 rc = qeth_query_setdiagass(card); 5197 if (rc < 0) { 5198 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 5199 goto out; 5200 } 5201 } 5202 return 0; 5203 out: 5204 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 5205 "an error on the device\n"); 5206 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 5207 dev_name(&card->gdev->dev), rc); 5208 return rc; 5209 } 5210 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 5211 5212 static int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 5213 struct qdio_buffer_element *element, 5214 struct sk_buff **pskb, int offset, int *pfrag, 5215 int data_len) 5216 { 5217 struct page *page = virt_to_page(element->addr); 5218 if (*pskb == NULL) { 5219 if (qethbuffer->rx_skb) { 5220 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 5221 *pskb = qethbuffer->rx_skb; 5222 qethbuffer->rx_skb = NULL; 5223 } else { 5224 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 5225 if (!(*pskb)) 5226 return -ENOMEM; 5227 } 5228 5229 skb_reserve(*pskb, ETH_HLEN); 5230 if (data_len <= QETH_RX_PULL_LEN) { 5231 skb_put_data(*pskb, element->addr + offset, data_len); 5232 } else { 5233 get_page(page); 5234 skb_put_data(*pskb, element->addr + offset, 5235 QETH_RX_PULL_LEN); 5236 skb_fill_page_desc(*pskb, *pfrag, page, 5237 offset + QETH_RX_PULL_LEN, 5238 data_len - QETH_RX_PULL_LEN); 5239 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 5240 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 5241 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 5242 (*pfrag)++; 5243 } 5244 } else { 5245 get_page(page); 5246 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 5247 (*pskb)->data_len += data_len; 5248 (*pskb)->len += data_len; 5249 (*pskb)->truesize += data_len; 5250 (*pfrag)++; 5251 } 5252 5253 5254 return 0; 5255 } 5256 5257 static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) 5258 { 5259 return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); 5260 } 5261 5262 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 5263 struct qeth_qdio_buffer *qethbuffer, 5264 struct qdio_buffer_element **__element, int *__offset, 5265 struct qeth_hdr **hdr) 5266 { 5267 struct qdio_buffer_element *element = *__element; 5268 struct qdio_buffer *buffer = qethbuffer->buffer; 5269 int offset = *__offset; 5270 struct sk_buff *skb = NULL; 5271 int skb_len = 0; 5272 void *data_ptr; 5273 int data_len; 5274 int headroom = 0; 5275 int use_rx_sg = 0; 5276 int frag = 0; 5277 5278 /* qeth_hdr must not cross element boundaries */ 5279 if (element->length < offset + sizeof(struct qeth_hdr)) { 5280 if (qeth_is_last_sbale(element)) 5281 return NULL; 5282 element++; 5283 offset = 0; 5284 if (element->length < sizeof(struct qeth_hdr)) 5285 return NULL; 5286 } 5287 *hdr = element->addr + offset; 5288 5289 offset += sizeof(struct qeth_hdr); 5290 switch ((*hdr)->hdr.l2.id) { 5291 case QETH_HEADER_TYPE_LAYER2: 5292 skb_len = (*hdr)->hdr.l2.pkt_length; 5293 break; 5294 case QETH_HEADER_TYPE_LAYER3: 5295 skb_len = (*hdr)->hdr.l3.length; 5296 headroom = ETH_HLEN; 5297 break; 5298 case QETH_HEADER_TYPE_OSN: 5299 skb_len = (*hdr)->hdr.osn.pdu_length; 5300 headroom = sizeof(struct qeth_hdr); 5301 break; 5302 default: 5303 break; 5304 } 5305 5306 if (!skb_len) 5307 return NULL; 5308 5309 if (((skb_len >= card->options.rx_sg_cb) && 5310 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 5311 (!atomic_read(&card->force_alloc_skb))) || 5312 (card->options.cq == QETH_CQ_ENABLED)) { 5313 use_rx_sg = 1; 5314 } else { 5315 skb = dev_alloc_skb(skb_len + headroom); 5316 if (!skb) 5317 goto no_mem; 5318 if (headroom) 5319 skb_reserve(skb, headroom); 5320 } 5321 5322 data_ptr = element->addr + offset; 5323 while (skb_len) { 5324 data_len = min(skb_len, (int)(element->length - offset)); 5325 if (data_len) { 5326 if (use_rx_sg) { 5327 if (qeth_create_skb_frag(qethbuffer, element, 5328 &skb, offset, &frag, data_len)) 5329 goto no_mem; 5330 } else { 5331 skb_put_data(skb, data_ptr, data_len); 5332 } 5333 } 5334 skb_len -= data_len; 5335 if (skb_len) { 5336 if (qeth_is_last_sbale(element)) { 5337 QETH_CARD_TEXT(card, 4, "unexeob"); 5338 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 5339 dev_kfree_skb_any(skb); 5340 card->stats.rx_errors++; 5341 return NULL; 5342 } 5343 element++; 5344 offset = 0; 5345 data_ptr = element->addr; 5346 } else { 5347 offset += data_len; 5348 } 5349 } 5350 *__element = element; 5351 *__offset = offset; 5352 if (use_rx_sg && card->options.performance_stats) { 5353 card->perf_stats.sg_skbs_rx++; 5354 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 5355 } 5356 return skb; 5357 no_mem: 5358 if (net_ratelimit()) { 5359 QETH_CARD_TEXT(card, 2, "noskbmem"); 5360 } 5361 card->stats.rx_dropped++; 5362 return NULL; 5363 } 5364 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 5365 5366 int qeth_poll(struct napi_struct *napi, int budget) 5367 { 5368 struct qeth_card *card = container_of(napi, struct qeth_card, napi); 5369 int work_done = 0; 5370 struct qeth_qdio_buffer *buffer; 5371 int done; 5372 int new_budget = budget; 5373 5374 if (card->options.performance_stats) { 5375 card->perf_stats.inbound_cnt++; 5376 card->perf_stats.inbound_start_time = qeth_get_micros(); 5377 } 5378 5379 while (1) { 5380 if (!card->rx.b_count) { 5381 card->rx.qdio_err = 0; 5382 card->rx.b_count = qdio_get_next_buffers( 5383 card->data.ccwdev, 0, &card->rx.b_index, 5384 &card->rx.qdio_err); 5385 if (card->rx.b_count <= 0) { 5386 card->rx.b_count = 0; 5387 break; 5388 } 5389 card->rx.b_element = 5390 &card->qdio.in_q->bufs[card->rx.b_index] 5391 .buffer->element[0]; 5392 card->rx.e_offset = 0; 5393 } 5394 5395 while (card->rx.b_count) { 5396 buffer = &card->qdio.in_q->bufs[card->rx.b_index]; 5397 if (!(card->rx.qdio_err && 5398 qeth_check_qdio_errors(card, buffer->buffer, 5399 card->rx.qdio_err, "qinerr"))) 5400 work_done += 5401 card->discipline->process_rx_buffer( 5402 card, new_budget, &done); 5403 else 5404 done = 1; 5405 5406 if (done) { 5407 if (card->options.performance_stats) 5408 card->perf_stats.bufs_rec++; 5409 qeth_put_buffer_pool_entry(card, 5410 buffer->pool_entry); 5411 qeth_queue_input_buffer(card, card->rx.b_index); 5412 card->rx.b_count--; 5413 if (card->rx.b_count) { 5414 card->rx.b_index = 5415 (card->rx.b_index + 1) % 5416 QDIO_MAX_BUFFERS_PER_Q; 5417 card->rx.b_element = 5418 &card->qdio.in_q 5419 ->bufs[card->rx.b_index] 5420 .buffer->element[0]; 5421 card->rx.e_offset = 0; 5422 } 5423 } 5424 5425 if (work_done >= budget) 5426 goto out; 5427 else 5428 new_budget = budget - work_done; 5429 } 5430 } 5431 5432 napi_complete(napi); 5433 if (qdio_start_irq(card->data.ccwdev, 0)) 5434 napi_schedule(&card->napi); 5435 out: 5436 if (card->options.performance_stats) 5437 card->perf_stats.inbound_time += qeth_get_micros() - 5438 card->perf_stats.inbound_start_time; 5439 return work_done; 5440 } 5441 EXPORT_SYMBOL_GPL(qeth_poll); 5442 5443 int qeth_setassparms_cb(struct qeth_card *card, 5444 struct qeth_reply *reply, unsigned long data) 5445 { 5446 struct qeth_ipa_cmd *cmd; 5447 5448 QETH_CARD_TEXT(card, 4, "defadpcb"); 5449 5450 cmd = (struct qeth_ipa_cmd *) data; 5451 if (cmd->hdr.return_code == 0) { 5452 cmd->hdr.return_code = cmd->data.setassparms.hdr.return_code; 5453 if (cmd->hdr.prot_version == QETH_PROT_IPV4) 5454 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 5455 if (cmd->hdr.prot_version == QETH_PROT_IPV6) 5456 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 5457 } 5458 return 0; 5459 } 5460 EXPORT_SYMBOL_GPL(qeth_setassparms_cb); 5461 5462 struct qeth_cmd_buffer *qeth_get_setassparms_cmd(struct qeth_card *card, 5463 enum qeth_ipa_funcs ipa_func, 5464 __u16 cmd_code, __u16 len, 5465 enum qeth_prot_versions prot) 5466 { 5467 struct qeth_cmd_buffer *iob; 5468 struct qeth_ipa_cmd *cmd; 5469 5470 QETH_CARD_TEXT(card, 4, "getasscm"); 5471 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETASSPARMS, prot); 5472 5473 if (iob) { 5474 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5475 cmd->data.setassparms.hdr.assist_no = ipa_func; 5476 cmd->data.setassparms.hdr.length = 8 + len; 5477 cmd->data.setassparms.hdr.command_code = cmd_code; 5478 cmd->data.setassparms.hdr.return_code = 0; 5479 cmd->data.setassparms.hdr.seq_no = 0; 5480 } 5481 5482 return iob; 5483 } 5484 EXPORT_SYMBOL_GPL(qeth_get_setassparms_cmd); 5485 5486 int qeth_send_setassparms(struct qeth_card *card, 5487 struct qeth_cmd_buffer *iob, __u16 len, long data, 5488 int (*reply_cb)(struct qeth_card *, 5489 struct qeth_reply *, unsigned long), 5490 void *reply_param) 5491 { 5492 int rc; 5493 struct qeth_ipa_cmd *cmd; 5494 5495 QETH_CARD_TEXT(card, 4, "sendassp"); 5496 5497 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 5498 if (len <= sizeof(__u32)) 5499 cmd->data.setassparms.data.flags_32bit = (__u32) data; 5500 else /* (len > sizeof(__u32)) */ 5501 memcpy(&cmd->data.setassparms.data, (void *) data, len); 5502 5503 rc = qeth_send_ipa_cmd(card, iob, reply_cb, reply_param); 5504 return rc; 5505 } 5506 EXPORT_SYMBOL_GPL(qeth_send_setassparms); 5507 5508 int qeth_send_simple_setassparms(struct qeth_card *card, 5509 enum qeth_ipa_funcs ipa_func, 5510 __u16 cmd_code, long data) 5511 { 5512 int rc; 5513 int length = 0; 5514 struct qeth_cmd_buffer *iob; 5515 5516 QETH_CARD_TEXT(card, 4, "simassp4"); 5517 if (data) 5518 length = sizeof(__u32); 5519 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, 5520 length, QETH_PROT_IPV4); 5521 if (!iob) 5522 return -ENOMEM; 5523 rc = qeth_send_setassparms(card, iob, length, data, 5524 qeth_setassparms_cb, NULL); 5525 return rc; 5526 } 5527 EXPORT_SYMBOL_GPL(qeth_send_simple_setassparms); 5528 5529 static void qeth_unregister_dbf_views(void) 5530 { 5531 int x; 5532 for (x = 0; x < QETH_DBF_INFOS; x++) { 5533 debug_unregister(qeth_dbf[x].id); 5534 qeth_dbf[x].id = NULL; 5535 } 5536 } 5537 5538 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 5539 { 5540 char dbf_txt_buf[32]; 5541 va_list args; 5542 5543 if (!debug_level_enabled(id, level)) 5544 return; 5545 va_start(args, fmt); 5546 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5547 va_end(args); 5548 debug_text_event(id, level, dbf_txt_buf); 5549 } 5550 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5551 5552 static int qeth_register_dbf_views(void) 5553 { 5554 int ret; 5555 int x; 5556 5557 for (x = 0; x < QETH_DBF_INFOS; x++) { 5558 /* register the areas */ 5559 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5560 qeth_dbf[x].pages, 5561 qeth_dbf[x].areas, 5562 qeth_dbf[x].len); 5563 if (qeth_dbf[x].id == NULL) { 5564 qeth_unregister_dbf_views(); 5565 return -ENOMEM; 5566 } 5567 5568 /* register a view */ 5569 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5570 if (ret) { 5571 qeth_unregister_dbf_views(); 5572 return ret; 5573 } 5574 5575 /* set a passing level */ 5576 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5577 } 5578 5579 return 0; 5580 } 5581 5582 int qeth_core_load_discipline(struct qeth_card *card, 5583 enum qeth_discipline_id discipline) 5584 { 5585 int rc = 0; 5586 5587 mutex_lock(&qeth_mod_mutex); 5588 switch (discipline) { 5589 case QETH_DISCIPLINE_LAYER3: 5590 card->discipline = try_then_request_module( 5591 symbol_get(qeth_l3_discipline), "qeth_l3"); 5592 break; 5593 case QETH_DISCIPLINE_LAYER2: 5594 card->discipline = try_then_request_module( 5595 symbol_get(qeth_l2_discipline), "qeth_l2"); 5596 break; 5597 default: 5598 break; 5599 } 5600 5601 if (!card->discipline) { 5602 dev_err(&card->gdev->dev, "There is no kernel module to " 5603 "support discipline %d\n", discipline); 5604 rc = -EINVAL; 5605 } 5606 mutex_unlock(&qeth_mod_mutex); 5607 return rc; 5608 } 5609 5610 void qeth_core_free_discipline(struct qeth_card *card) 5611 { 5612 if (card->options.layer2) 5613 symbol_put(qeth_l2_discipline); 5614 else 5615 symbol_put(qeth_l3_discipline); 5616 card->discipline = NULL; 5617 } 5618 5619 const struct device_type qeth_generic_devtype = { 5620 .name = "qeth_generic", 5621 .groups = qeth_generic_attr_groups, 5622 }; 5623 EXPORT_SYMBOL_GPL(qeth_generic_devtype); 5624 5625 static const struct device_type qeth_osn_devtype = { 5626 .name = "qeth_osn", 5627 .groups = qeth_osn_attr_groups, 5628 }; 5629 5630 #define DBF_NAME_LEN 20 5631 5632 struct qeth_dbf_entry { 5633 char dbf_name[DBF_NAME_LEN]; 5634 debug_info_t *dbf_info; 5635 struct list_head dbf_list; 5636 }; 5637 5638 static LIST_HEAD(qeth_dbf_list); 5639 static DEFINE_MUTEX(qeth_dbf_list_mutex); 5640 5641 static debug_info_t *qeth_get_dbf_entry(char *name) 5642 { 5643 struct qeth_dbf_entry *entry; 5644 debug_info_t *rc = NULL; 5645 5646 mutex_lock(&qeth_dbf_list_mutex); 5647 list_for_each_entry(entry, &qeth_dbf_list, dbf_list) { 5648 if (strcmp(entry->dbf_name, name) == 0) { 5649 rc = entry->dbf_info; 5650 break; 5651 } 5652 } 5653 mutex_unlock(&qeth_dbf_list_mutex); 5654 return rc; 5655 } 5656 5657 static int qeth_add_dbf_entry(struct qeth_card *card, char *name) 5658 { 5659 struct qeth_dbf_entry *new_entry; 5660 5661 card->debug = debug_register(name, 2, 1, 8); 5662 if (!card->debug) { 5663 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5664 goto err; 5665 } 5666 if (debug_register_view(card->debug, &debug_hex_ascii_view)) 5667 goto err_dbg; 5668 new_entry = kzalloc(sizeof(struct qeth_dbf_entry), GFP_KERNEL); 5669 if (!new_entry) 5670 goto err_dbg; 5671 strncpy(new_entry->dbf_name, name, DBF_NAME_LEN); 5672 new_entry->dbf_info = card->debug; 5673 mutex_lock(&qeth_dbf_list_mutex); 5674 list_add(&new_entry->dbf_list, &qeth_dbf_list); 5675 mutex_unlock(&qeth_dbf_list_mutex); 5676 5677 return 0; 5678 5679 err_dbg: 5680 debug_unregister(card->debug); 5681 err: 5682 return -ENOMEM; 5683 } 5684 5685 static void qeth_clear_dbf_list(void) 5686 { 5687 struct qeth_dbf_entry *entry, *tmp; 5688 5689 mutex_lock(&qeth_dbf_list_mutex); 5690 list_for_each_entry_safe(entry, tmp, &qeth_dbf_list, dbf_list) { 5691 list_del(&entry->dbf_list); 5692 debug_unregister(entry->dbf_info); 5693 kfree(entry); 5694 } 5695 mutex_unlock(&qeth_dbf_list_mutex); 5696 } 5697 5698 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5699 { 5700 struct qeth_card *card; 5701 struct device *dev; 5702 int rc; 5703 enum qeth_discipline_id enforced_disc; 5704 unsigned long flags; 5705 char dbf_name[DBF_NAME_LEN]; 5706 5707 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5708 5709 dev = &gdev->dev; 5710 if (!get_device(dev)) 5711 return -ENODEV; 5712 5713 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5714 5715 card = qeth_alloc_card(); 5716 if (!card) { 5717 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5718 rc = -ENOMEM; 5719 goto err_dev; 5720 } 5721 5722 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5723 dev_name(&gdev->dev)); 5724 card->debug = qeth_get_dbf_entry(dbf_name); 5725 if (!card->debug) { 5726 rc = qeth_add_dbf_entry(card, dbf_name); 5727 if (rc) 5728 goto err_card; 5729 } 5730 5731 card->read.ccwdev = gdev->cdev[0]; 5732 card->write.ccwdev = gdev->cdev[1]; 5733 card->data.ccwdev = gdev->cdev[2]; 5734 dev_set_drvdata(&gdev->dev, card); 5735 card->gdev = gdev; 5736 gdev->cdev[0]->handler = qeth_irq; 5737 gdev->cdev[1]->handler = qeth_irq; 5738 gdev->cdev[2]->handler = qeth_irq; 5739 5740 rc = qeth_determine_card_type(card); 5741 if (rc) { 5742 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5743 goto err_card; 5744 } 5745 rc = qeth_setup_card(card); 5746 if (rc) { 5747 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5748 goto err_card; 5749 } 5750 5751 qeth_determine_capabilities(card); 5752 enforced_disc = qeth_enforce_discipline(card); 5753 switch (enforced_disc) { 5754 case QETH_DISCIPLINE_UNDETERMINED: 5755 gdev->dev.type = &qeth_generic_devtype; 5756 break; 5757 default: 5758 card->info.layer_enforced = true; 5759 rc = qeth_core_load_discipline(card, enforced_disc); 5760 if (rc) 5761 goto err_card; 5762 5763 gdev->dev.type = (card->info.type != QETH_CARD_TYPE_OSN) 5764 ? card->discipline->devtype 5765 : &qeth_osn_devtype; 5766 rc = card->discipline->setup(card->gdev); 5767 if (rc) 5768 goto err_disc; 5769 break; 5770 } 5771 5772 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5773 list_add_tail(&card->list, &qeth_core_card_list.list); 5774 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5775 return 0; 5776 5777 err_disc: 5778 qeth_core_free_discipline(card); 5779 err_card: 5780 qeth_core_free_card(card); 5781 err_dev: 5782 put_device(dev); 5783 return rc; 5784 } 5785 5786 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5787 { 5788 unsigned long flags; 5789 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5790 5791 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5792 5793 if (card->discipline) { 5794 card->discipline->remove(gdev); 5795 qeth_core_free_discipline(card); 5796 } 5797 5798 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5799 list_del(&card->list); 5800 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5801 qeth_core_free_card(card); 5802 dev_set_drvdata(&gdev->dev, NULL); 5803 put_device(&gdev->dev); 5804 return; 5805 } 5806 5807 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5808 { 5809 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5810 int rc = 0; 5811 enum qeth_discipline_id def_discipline; 5812 5813 if (!card->discipline) { 5814 if (card->info.type == QETH_CARD_TYPE_IQD) 5815 def_discipline = QETH_DISCIPLINE_LAYER3; 5816 else 5817 def_discipline = QETH_DISCIPLINE_LAYER2; 5818 rc = qeth_core_load_discipline(card, def_discipline); 5819 if (rc) 5820 goto err; 5821 rc = card->discipline->setup(card->gdev); 5822 if (rc) { 5823 qeth_core_free_discipline(card); 5824 goto err; 5825 } 5826 } 5827 rc = card->discipline->set_online(gdev); 5828 err: 5829 return rc; 5830 } 5831 5832 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5833 { 5834 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5835 return card->discipline->set_offline(gdev); 5836 } 5837 5838 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5839 { 5840 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5841 qeth_set_allowed_threads(card, 0, 1); 5842 if ((gdev->state == CCWGROUP_ONLINE) && card->info.hwtrap) 5843 qeth_hw_trap(card, QETH_DIAGS_TRAP_DISARM); 5844 qeth_qdio_clear_card(card, 0); 5845 qeth_clear_qdio_buffers(card); 5846 qdio_free(CARD_DDEV(card)); 5847 } 5848 5849 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5850 { 5851 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5852 if (card->discipline && card->discipline->freeze) 5853 return card->discipline->freeze(gdev); 5854 return 0; 5855 } 5856 5857 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5858 { 5859 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5860 if (card->discipline && card->discipline->thaw) 5861 return card->discipline->thaw(gdev); 5862 return 0; 5863 } 5864 5865 static int qeth_core_restore(struct ccwgroup_device *gdev) 5866 { 5867 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5868 if (card->discipline && card->discipline->restore) 5869 return card->discipline->restore(gdev); 5870 return 0; 5871 } 5872 5873 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5874 .driver = { 5875 .owner = THIS_MODULE, 5876 .name = "qeth", 5877 }, 5878 .setup = qeth_core_probe_device, 5879 .remove = qeth_core_remove_device, 5880 .set_online = qeth_core_set_online, 5881 .set_offline = qeth_core_set_offline, 5882 .shutdown = qeth_core_shutdown, 5883 .prepare = NULL, 5884 .complete = NULL, 5885 .freeze = qeth_core_freeze, 5886 .thaw = qeth_core_thaw, 5887 .restore = qeth_core_restore, 5888 }; 5889 5890 static ssize_t group_store(struct device_driver *ddrv, const char *buf, 5891 size_t count) 5892 { 5893 int err; 5894 5895 err = ccwgroup_create_dev(qeth_core_root_dev, 5896 &qeth_core_ccwgroup_driver, 3, buf); 5897 5898 return err ? err : count; 5899 } 5900 static DRIVER_ATTR_WO(group); 5901 5902 static struct attribute *qeth_drv_attrs[] = { 5903 &driver_attr_group.attr, 5904 NULL, 5905 }; 5906 static struct attribute_group qeth_drv_attr_group = { 5907 .attrs = qeth_drv_attrs, 5908 }; 5909 static const struct attribute_group *qeth_drv_attr_groups[] = { 5910 &qeth_drv_attr_group, 5911 NULL, 5912 }; 5913 5914 int qeth_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 5915 { 5916 struct qeth_card *card = dev->ml_priv; 5917 struct mii_ioctl_data *mii_data; 5918 int rc = 0; 5919 5920 if (!card) 5921 return -ENODEV; 5922 5923 if (!qeth_card_hw_is_reachable(card)) 5924 return -ENODEV; 5925 5926 if (card->info.type == QETH_CARD_TYPE_OSN) 5927 return -EPERM; 5928 5929 switch (cmd) { 5930 case SIOC_QETH_ADP_SET_SNMP_CONTROL: 5931 rc = qeth_snmp_command(card, rq->ifr_ifru.ifru_data); 5932 break; 5933 case SIOC_QETH_GET_CARD_TYPE: 5934 if ((card->info.type == QETH_CARD_TYPE_OSD || 5935 card->info.type == QETH_CARD_TYPE_OSM || 5936 card->info.type == QETH_CARD_TYPE_OSX) && 5937 !card->info.guestlan) 5938 return 1; 5939 else 5940 return 0; 5941 case SIOCGMIIPHY: 5942 mii_data = if_mii(rq); 5943 mii_data->phy_id = 0; 5944 break; 5945 case SIOCGMIIREG: 5946 mii_data = if_mii(rq); 5947 if (mii_data->phy_id != 0) 5948 rc = -EINVAL; 5949 else 5950 mii_data->val_out = qeth_mdio_read(dev, 5951 mii_data->phy_id, mii_data->reg_num); 5952 break; 5953 case SIOC_QETH_QUERY_OAT: 5954 rc = qeth_query_oat_command(card, rq->ifr_ifru.ifru_data); 5955 break; 5956 default: 5957 if (card->discipline->do_ioctl) 5958 rc = card->discipline->do_ioctl(dev, rq, cmd); 5959 else 5960 rc = -EOPNOTSUPP; 5961 } 5962 if (rc) 5963 QETH_CARD_TEXT_(card, 2, "ioce%x", rc); 5964 return rc; 5965 } 5966 EXPORT_SYMBOL_GPL(qeth_do_ioctl); 5967 5968 static struct { 5969 const char str[ETH_GSTRING_LEN]; 5970 } qeth_ethtool_stats_keys[] = { 5971 /* 0 */{"rx skbs"}, 5972 {"rx buffers"}, 5973 {"tx skbs"}, 5974 {"tx buffers"}, 5975 {"tx skbs no packing"}, 5976 {"tx buffers no packing"}, 5977 {"tx skbs packing"}, 5978 {"tx buffers packing"}, 5979 {"tx sg skbs"}, 5980 {"tx sg frags"}, 5981 /* 10 */{"rx sg skbs"}, 5982 {"rx sg frags"}, 5983 {"rx sg page allocs"}, 5984 {"tx large kbytes"}, 5985 {"tx large count"}, 5986 {"tx pk state ch n->p"}, 5987 {"tx pk state ch p->n"}, 5988 {"tx pk watermark low"}, 5989 {"tx pk watermark high"}, 5990 {"queue 0 buffer usage"}, 5991 /* 20 */{"queue 1 buffer usage"}, 5992 {"queue 2 buffer usage"}, 5993 {"queue 3 buffer usage"}, 5994 {"rx poll time"}, 5995 {"rx poll count"}, 5996 {"rx do_QDIO time"}, 5997 {"rx do_QDIO count"}, 5998 {"tx handler time"}, 5999 {"tx handler count"}, 6000 {"tx time"}, 6001 /* 30 */{"tx count"}, 6002 {"tx do_QDIO time"}, 6003 {"tx do_QDIO count"}, 6004 {"tx csum"}, 6005 {"tx lin"}, 6006 {"tx linfail"}, 6007 {"cq handler count"}, 6008 {"cq handler time"} 6009 }; 6010 6011 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 6012 { 6013 switch (stringset) { 6014 case ETH_SS_STATS: 6015 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 6016 default: 6017 return -EINVAL; 6018 } 6019 } 6020 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 6021 6022 void qeth_core_get_ethtool_stats(struct net_device *dev, 6023 struct ethtool_stats *stats, u64 *data) 6024 { 6025 struct qeth_card *card = dev->ml_priv; 6026 data[0] = card->stats.rx_packets - 6027 card->perf_stats.initial_rx_packets; 6028 data[1] = card->perf_stats.bufs_rec; 6029 data[2] = card->stats.tx_packets - 6030 card->perf_stats.initial_tx_packets; 6031 data[3] = card->perf_stats.bufs_sent; 6032 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 6033 - card->perf_stats.skbs_sent_pack; 6034 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 6035 data[6] = card->perf_stats.skbs_sent_pack; 6036 data[7] = card->perf_stats.bufs_sent_pack; 6037 data[8] = card->perf_stats.sg_skbs_sent; 6038 data[9] = card->perf_stats.sg_frags_sent; 6039 data[10] = card->perf_stats.sg_skbs_rx; 6040 data[11] = card->perf_stats.sg_frags_rx; 6041 data[12] = card->perf_stats.sg_alloc_page_rx; 6042 data[13] = (card->perf_stats.large_send_bytes >> 10); 6043 data[14] = card->perf_stats.large_send_cnt; 6044 data[15] = card->perf_stats.sc_dp_p; 6045 data[16] = card->perf_stats.sc_p_dp; 6046 data[17] = QETH_LOW_WATERMARK_PACK; 6047 data[18] = QETH_HIGH_WATERMARK_PACK; 6048 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 6049 data[20] = (card->qdio.no_out_queues > 1) ? 6050 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 6051 data[21] = (card->qdio.no_out_queues > 2) ? 6052 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 6053 data[22] = (card->qdio.no_out_queues > 3) ? 6054 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 6055 data[23] = card->perf_stats.inbound_time; 6056 data[24] = card->perf_stats.inbound_cnt; 6057 data[25] = card->perf_stats.inbound_do_qdio_time; 6058 data[26] = card->perf_stats.inbound_do_qdio_cnt; 6059 data[27] = card->perf_stats.outbound_handler_time; 6060 data[28] = card->perf_stats.outbound_handler_cnt; 6061 data[29] = card->perf_stats.outbound_time; 6062 data[30] = card->perf_stats.outbound_cnt; 6063 data[31] = card->perf_stats.outbound_do_qdio_time; 6064 data[32] = card->perf_stats.outbound_do_qdio_cnt; 6065 data[33] = card->perf_stats.tx_csum; 6066 data[34] = card->perf_stats.tx_lin; 6067 data[35] = card->perf_stats.tx_linfail; 6068 data[36] = card->perf_stats.cq_cnt; 6069 data[37] = card->perf_stats.cq_time; 6070 } 6071 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 6072 6073 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 6074 { 6075 switch (stringset) { 6076 case ETH_SS_STATS: 6077 memcpy(data, &qeth_ethtool_stats_keys, 6078 sizeof(qeth_ethtool_stats_keys)); 6079 break; 6080 default: 6081 WARN_ON(1); 6082 break; 6083 } 6084 } 6085 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 6086 6087 void qeth_core_get_drvinfo(struct net_device *dev, 6088 struct ethtool_drvinfo *info) 6089 { 6090 struct qeth_card *card = dev->ml_priv; 6091 6092 strlcpy(info->driver, card->options.layer2 ? "qeth_l2" : "qeth_l3", 6093 sizeof(info->driver)); 6094 strlcpy(info->version, "1.0", sizeof(info->version)); 6095 strlcpy(info->fw_version, card->info.mcl_level, 6096 sizeof(info->fw_version)); 6097 snprintf(info->bus_info, sizeof(info->bus_info), "%s/%s/%s", 6098 CARD_RDEV_ID(card), CARD_WDEV_ID(card), CARD_DDEV_ID(card)); 6099 } 6100 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 6101 6102 /* Helper function to fill 'advertising' and 'supported' which are the same. */ 6103 /* Autoneg and full-duplex are supported and advertised unconditionally. */ 6104 /* Always advertise and support all speeds up to specified, and only one */ 6105 /* specified port type. */ 6106 static void qeth_set_cmd_adv_sup(struct ethtool_link_ksettings *cmd, 6107 int maxspeed, int porttype) 6108 { 6109 ethtool_link_ksettings_zero_link_mode(cmd, supported); 6110 ethtool_link_ksettings_zero_link_mode(cmd, advertising); 6111 ethtool_link_ksettings_zero_link_mode(cmd, lp_advertising); 6112 6113 ethtool_link_ksettings_add_link_mode(cmd, supported, Autoneg); 6114 ethtool_link_ksettings_add_link_mode(cmd, advertising, Autoneg); 6115 6116 switch (porttype) { 6117 case PORT_TP: 6118 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 6119 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 6120 break; 6121 case PORT_FIBRE: 6122 ethtool_link_ksettings_add_link_mode(cmd, supported, FIBRE); 6123 ethtool_link_ksettings_add_link_mode(cmd, advertising, FIBRE); 6124 break; 6125 default: 6126 ethtool_link_ksettings_add_link_mode(cmd, supported, TP); 6127 ethtool_link_ksettings_add_link_mode(cmd, advertising, TP); 6128 WARN_ON_ONCE(1); 6129 } 6130 6131 /* fallthrough from high to low, to select all legal speeds: */ 6132 switch (maxspeed) { 6133 case SPEED_10000: 6134 ethtool_link_ksettings_add_link_mode(cmd, supported, 6135 10000baseT_Full); 6136 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6137 10000baseT_Full); 6138 case SPEED_1000: 6139 ethtool_link_ksettings_add_link_mode(cmd, supported, 6140 1000baseT_Full); 6141 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6142 1000baseT_Full); 6143 ethtool_link_ksettings_add_link_mode(cmd, supported, 6144 1000baseT_Half); 6145 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6146 1000baseT_Half); 6147 case SPEED_100: 6148 ethtool_link_ksettings_add_link_mode(cmd, supported, 6149 100baseT_Full); 6150 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6151 100baseT_Full); 6152 ethtool_link_ksettings_add_link_mode(cmd, supported, 6153 100baseT_Half); 6154 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6155 100baseT_Half); 6156 case SPEED_10: 6157 ethtool_link_ksettings_add_link_mode(cmd, supported, 6158 10baseT_Full); 6159 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6160 10baseT_Full); 6161 ethtool_link_ksettings_add_link_mode(cmd, supported, 6162 10baseT_Half); 6163 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6164 10baseT_Half); 6165 /* end fallthrough */ 6166 break; 6167 default: 6168 ethtool_link_ksettings_add_link_mode(cmd, supported, 6169 10baseT_Full); 6170 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6171 10baseT_Full); 6172 ethtool_link_ksettings_add_link_mode(cmd, supported, 6173 10baseT_Half); 6174 ethtool_link_ksettings_add_link_mode(cmd, advertising, 6175 10baseT_Half); 6176 WARN_ON_ONCE(1); 6177 } 6178 } 6179 6180 int qeth_core_ethtool_get_link_ksettings(struct net_device *netdev, 6181 struct ethtool_link_ksettings *cmd) 6182 { 6183 struct qeth_card *card = netdev->ml_priv; 6184 enum qeth_link_types link_type; 6185 struct carrier_info carrier_info; 6186 int rc; 6187 6188 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 6189 link_type = QETH_LINK_TYPE_10GBIT_ETH; 6190 else 6191 link_type = card->info.link_type; 6192 6193 cmd->base.duplex = DUPLEX_FULL; 6194 cmd->base.autoneg = AUTONEG_ENABLE; 6195 cmd->base.phy_address = 0; 6196 cmd->base.mdio_support = 0; 6197 cmd->base.eth_tp_mdix = ETH_TP_MDI_INVALID; 6198 cmd->base.eth_tp_mdix_ctrl = ETH_TP_MDI_INVALID; 6199 6200 switch (link_type) { 6201 case QETH_LINK_TYPE_FAST_ETH: 6202 case QETH_LINK_TYPE_LANE_ETH100: 6203 cmd->base.speed = SPEED_100; 6204 cmd->base.port = PORT_TP; 6205 break; 6206 case QETH_LINK_TYPE_GBIT_ETH: 6207 case QETH_LINK_TYPE_LANE_ETH1000: 6208 cmd->base.speed = SPEED_1000; 6209 cmd->base.port = PORT_FIBRE; 6210 break; 6211 case QETH_LINK_TYPE_10GBIT_ETH: 6212 cmd->base.speed = SPEED_10000; 6213 cmd->base.port = PORT_FIBRE; 6214 break; 6215 default: 6216 cmd->base.speed = SPEED_10; 6217 cmd->base.port = PORT_TP; 6218 } 6219 qeth_set_cmd_adv_sup(cmd, cmd->base.speed, cmd->base.port); 6220 6221 /* Check if we can obtain more accurate information. */ 6222 /* If QUERY_CARD_INFO command is not supported or fails, */ 6223 /* just return the heuristics that was filled above. */ 6224 if (!qeth_card_hw_is_reachable(card)) 6225 return -ENODEV; 6226 rc = qeth_query_card_info(card, &carrier_info); 6227 if (rc == -EOPNOTSUPP) /* for old hardware, return heuristic */ 6228 return 0; 6229 if (rc) /* report error from the hardware operation */ 6230 return rc; 6231 /* on success, fill in the information got from the hardware */ 6232 6233 netdev_dbg(netdev, 6234 "card info: card_type=0x%02x, port_mode=0x%04x, port_speed=0x%08x\n", 6235 carrier_info.card_type, 6236 carrier_info.port_mode, 6237 carrier_info.port_speed); 6238 6239 /* Update attributes for which we've obtained more authoritative */ 6240 /* information, leave the rest the way they where filled above. */ 6241 switch (carrier_info.card_type) { 6242 case CARD_INFO_TYPE_1G_COPPER_A: 6243 case CARD_INFO_TYPE_1G_COPPER_B: 6244 cmd->base.port = PORT_TP; 6245 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port); 6246 break; 6247 case CARD_INFO_TYPE_1G_FIBRE_A: 6248 case CARD_INFO_TYPE_1G_FIBRE_B: 6249 cmd->base.port = PORT_FIBRE; 6250 qeth_set_cmd_adv_sup(cmd, SPEED_1000, cmd->base.port); 6251 break; 6252 case CARD_INFO_TYPE_10G_FIBRE_A: 6253 case CARD_INFO_TYPE_10G_FIBRE_B: 6254 cmd->base.port = PORT_FIBRE; 6255 qeth_set_cmd_adv_sup(cmd, SPEED_10000, cmd->base.port); 6256 break; 6257 } 6258 6259 switch (carrier_info.port_mode) { 6260 case CARD_INFO_PORTM_FULLDUPLEX: 6261 cmd->base.duplex = DUPLEX_FULL; 6262 break; 6263 case CARD_INFO_PORTM_HALFDUPLEX: 6264 cmd->base.duplex = DUPLEX_HALF; 6265 break; 6266 } 6267 6268 switch (carrier_info.port_speed) { 6269 case CARD_INFO_PORTS_10M: 6270 cmd->base.speed = SPEED_10; 6271 break; 6272 case CARD_INFO_PORTS_100M: 6273 cmd->base.speed = SPEED_100; 6274 break; 6275 case CARD_INFO_PORTS_1G: 6276 cmd->base.speed = SPEED_1000; 6277 break; 6278 case CARD_INFO_PORTS_10G: 6279 cmd->base.speed = SPEED_10000; 6280 break; 6281 } 6282 6283 return 0; 6284 } 6285 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_link_ksettings); 6286 6287 /* Callback to handle checksum offload command reply from OSA card. 6288 * Verify that required features have been enabled on the card. 6289 * Return error in hdr->return_code as this value is checked by caller. 6290 * 6291 * Always returns zero to indicate no further messages from the OSA card. 6292 */ 6293 static int qeth_ipa_checksum_run_cmd_cb(struct qeth_card *card, 6294 struct qeth_reply *reply, 6295 unsigned long data) 6296 { 6297 struct qeth_ipa_cmd *cmd = (struct qeth_ipa_cmd *) data; 6298 struct qeth_checksum_cmd *chksum_cb = 6299 (struct qeth_checksum_cmd *)reply->param; 6300 6301 QETH_CARD_TEXT(card, 4, "chkdoccb"); 6302 if (cmd->hdr.return_code) 6303 return 0; 6304 6305 memset(chksum_cb, 0, sizeof(*chksum_cb)); 6306 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_START) { 6307 chksum_cb->supported = 6308 cmd->data.setassparms.data.chksum.supported; 6309 QETH_CARD_TEXT_(card, 3, "strt:%x", chksum_cb->supported); 6310 } 6311 if (cmd->data.setassparms.hdr.command_code == IPA_CMD_ASS_ENABLE) { 6312 chksum_cb->supported = 6313 cmd->data.setassparms.data.chksum.supported; 6314 chksum_cb->enabled = 6315 cmd->data.setassparms.data.chksum.enabled; 6316 QETH_CARD_TEXT_(card, 3, "supp:%x", chksum_cb->supported); 6317 QETH_CARD_TEXT_(card, 3, "enab:%x", chksum_cb->enabled); 6318 } 6319 return 0; 6320 } 6321 6322 /* Send command to OSA card and check results. */ 6323 static int qeth_ipa_checksum_run_cmd(struct qeth_card *card, 6324 enum qeth_ipa_funcs ipa_func, 6325 __u16 cmd_code, long data, 6326 struct qeth_checksum_cmd *chksum_cb) 6327 { 6328 struct qeth_cmd_buffer *iob; 6329 int rc = -ENOMEM; 6330 6331 QETH_CARD_TEXT(card, 4, "chkdocmd"); 6332 iob = qeth_get_setassparms_cmd(card, ipa_func, cmd_code, 6333 sizeof(__u32), QETH_PROT_IPV4); 6334 if (iob) 6335 rc = qeth_send_setassparms(card, iob, sizeof(__u32), data, 6336 qeth_ipa_checksum_run_cmd_cb, 6337 chksum_cb); 6338 return rc; 6339 } 6340 6341 static int qeth_send_checksum_on(struct qeth_card *card, int cstype) 6342 { 6343 const __u32 required_features = QETH_IPA_CHECKSUM_IP_HDR | 6344 QETH_IPA_CHECKSUM_UDP | 6345 QETH_IPA_CHECKSUM_TCP; 6346 struct qeth_checksum_cmd chksum_cb; 6347 int rc; 6348 6349 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_START, 0, 6350 &chksum_cb); 6351 if (!rc) { 6352 if ((required_features & chksum_cb.supported) != 6353 required_features) 6354 rc = -EIO; 6355 else if (!(QETH_IPA_CHECKSUM_LP2LP & chksum_cb.supported) && 6356 cstype == IPA_INBOUND_CHECKSUM) 6357 dev_warn(&card->gdev->dev, 6358 "Hardware checksumming is performed only if %s and its peer use different OSA Express 3 ports\n", 6359 QETH_CARD_IFNAME(card)); 6360 } 6361 if (rc) { 6362 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0); 6363 dev_warn(&card->gdev->dev, 6364 "Starting HW checksumming for %s failed, using SW checksumming\n", 6365 QETH_CARD_IFNAME(card)); 6366 return rc; 6367 } 6368 rc = qeth_ipa_checksum_run_cmd(card, cstype, IPA_CMD_ASS_ENABLE, 6369 chksum_cb.supported, &chksum_cb); 6370 if (!rc) { 6371 if ((required_features & chksum_cb.enabled) != 6372 required_features) 6373 rc = -EIO; 6374 } 6375 if (rc) { 6376 qeth_send_simple_setassparms(card, cstype, IPA_CMD_ASS_STOP, 0); 6377 dev_warn(&card->gdev->dev, 6378 "Enabling HW checksumming for %s failed, using SW checksumming\n", 6379 QETH_CARD_IFNAME(card)); 6380 return rc; 6381 } 6382 6383 dev_info(&card->gdev->dev, "HW Checksumming (%sbound) enabled\n", 6384 cstype == IPA_INBOUND_CHECKSUM ? "in" : "out"); 6385 return 0; 6386 } 6387 6388 static int qeth_set_ipa_csum(struct qeth_card *card, int on, int cstype) 6389 { 6390 int rc = (on) ? qeth_send_checksum_on(card, cstype) 6391 : qeth_send_simple_setassparms(card, cstype, 6392 IPA_CMD_ASS_STOP, 0); 6393 return rc ? -EIO : 0; 6394 } 6395 6396 static int qeth_set_ipa_tso(struct qeth_card *card, int on) 6397 { 6398 int rc; 6399 6400 QETH_CARD_TEXT(card, 3, "sttso"); 6401 6402 if (on) { 6403 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO, 6404 IPA_CMD_ASS_START, 0); 6405 if (rc) { 6406 dev_warn(&card->gdev->dev, 6407 "Starting outbound TCP segmentation offload for %s failed\n", 6408 QETH_CARD_IFNAME(card)); 6409 return -EIO; 6410 } 6411 dev_info(&card->gdev->dev, "Outbound TSO enabled\n"); 6412 } else { 6413 rc = qeth_send_simple_setassparms(card, IPA_OUTBOUND_TSO, 6414 IPA_CMD_ASS_STOP, 0); 6415 } 6416 return rc; 6417 } 6418 6419 /* try to restore device features on a device after recovery */ 6420 int qeth_recover_features(struct net_device *dev) 6421 { 6422 struct qeth_card *card = dev->ml_priv; 6423 netdev_features_t recover = dev->features; 6424 6425 if (recover & NETIF_F_IP_CSUM) { 6426 if (qeth_set_ipa_csum(card, 1, IPA_OUTBOUND_CHECKSUM)) 6427 recover ^= NETIF_F_IP_CSUM; 6428 } 6429 if (recover & NETIF_F_RXCSUM) { 6430 if (qeth_set_ipa_csum(card, 1, IPA_INBOUND_CHECKSUM)) 6431 recover ^= NETIF_F_RXCSUM; 6432 } 6433 if (recover & NETIF_F_TSO) { 6434 if (qeth_set_ipa_tso(card, 1)) 6435 recover ^= NETIF_F_TSO; 6436 } 6437 6438 if (recover == dev->features) 6439 return 0; 6440 6441 dev_warn(&card->gdev->dev, 6442 "Device recovery failed to restore all offload features\n"); 6443 dev->features = recover; 6444 return -EIO; 6445 } 6446 EXPORT_SYMBOL_GPL(qeth_recover_features); 6447 6448 int qeth_set_features(struct net_device *dev, netdev_features_t features) 6449 { 6450 struct qeth_card *card = dev->ml_priv; 6451 netdev_features_t changed = dev->features ^ features; 6452 int rc = 0; 6453 6454 QETH_DBF_TEXT(SETUP, 2, "setfeat"); 6455 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features)); 6456 6457 if ((changed & NETIF_F_IP_CSUM)) { 6458 rc = qeth_set_ipa_csum(card, 6459 features & NETIF_F_IP_CSUM ? 1 : 0, 6460 IPA_OUTBOUND_CHECKSUM); 6461 if (rc) 6462 changed ^= NETIF_F_IP_CSUM; 6463 } 6464 if ((changed & NETIF_F_RXCSUM)) { 6465 rc = qeth_set_ipa_csum(card, 6466 features & NETIF_F_RXCSUM ? 1 : 0, 6467 IPA_INBOUND_CHECKSUM); 6468 if (rc) 6469 changed ^= NETIF_F_RXCSUM; 6470 } 6471 if ((changed & NETIF_F_TSO)) { 6472 rc = qeth_set_ipa_tso(card, features & NETIF_F_TSO ? 1 : 0); 6473 if (rc) 6474 changed ^= NETIF_F_TSO; 6475 } 6476 6477 /* everything changed successfully? */ 6478 if ((dev->features ^ features) == changed) 6479 return 0; 6480 /* something went wrong. save changed features and return error */ 6481 dev->features ^= changed; 6482 return -EIO; 6483 } 6484 EXPORT_SYMBOL_GPL(qeth_set_features); 6485 6486 netdev_features_t qeth_fix_features(struct net_device *dev, 6487 netdev_features_t features) 6488 { 6489 struct qeth_card *card = dev->ml_priv; 6490 6491 QETH_DBF_TEXT(SETUP, 2, "fixfeat"); 6492 if (!qeth_is_supported(card, IPA_OUTBOUND_CHECKSUM)) 6493 features &= ~NETIF_F_IP_CSUM; 6494 if (!qeth_is_supported(card, IPA_INBOUND_CHECKSUM)) 6495 features &= ~NETIF_F_RXCSUM; 6496 if (!qeth_is_supported(card, IPA_OUTBOUND_TSO)) 6497 features &= ~NETIF_F_TSO; 6498 /* if the card isn't up, remove features that require hw changes */ 6499 if (card->state == CARD_STATE_DOWN || 6500 card->state == CARD_STATE_RECOVER) 6501 features = features & ~(NETIF_F_IP_CSUM | NETIF_F_RXCSUM | 6502 NETIF_F_TSO); 6503 QETH_DBF_HEX(SETUP, 2, &features, sizeof(features)); 6504 return features; 6505 } 6506 EXPORT_SYMBOL_GPL(qeth_fix_features); 6507 6508 static int __init qeth_core_init(void) 6509 { 6510 int rc; 6511 6512 pr_info("loading core functions\n"); 6513 INIT_LIST_HEAD(&qeth_core_card_list.list); 6514 INIT_LIST_HEAD(&qeth_dbf_list); 6515 rwlock_init(&qeth_core_card_list.rwlock); 6516 mutex_init(&qeth_mod_mutex); 6517 6518 qeth_wq = create_singlethread_workqueue("qeth_wq"); 6519 6520 rc = qeth_register_dbf_views(); 6521 if (rc) 6522 goto out_err; 6523 qeth_core_root_dev = root_device_register("qeth"); 6524 rc = PTR_ERR_OR_ZERO(qeth_core_root_dev); 6525 if (rc) 6526 goto register_err; 6527 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 6528 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 6529 if (!qeth_core_header_cache) { 6530 rc = -ENOMEM; 6531 goto slab_err; 6532 } 6533 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 6534 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 6535 if (!qeth_qdio_outbuf_cache) { 6536 rc = -ENOMEM; 6537 goto cqslab_err; 6538 } 6539 rc = ccw_driver_register(&qeth_ccw_driver); 6540 if (rc) 6541 goto ccw_err; 6542 qeth_core_ccwgroup_driver.driver.groups = qeth_drv_attr_groups; 6543 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 6544 if (rc) 6545 goto ccwgroup_err; 6546 6547 return 0; 6548 6549 ccwgroup_err: 6550 ccw_driver_unregister(&qeth_ccw_driver); 6551 ccw_err: 6552 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6553 cqslab_err: 6554 kmem_cache_destroy(qeth_core_header_cache); 6555 slab_err: 6556 root_device_unregister(qeth_core_root_dev); 6557 register_err: 6558 qeth_unregister_dbf_views(); 6559 out_err: 6560 pr_err("Initializing the qeth device driver failed\n"); 6561 return rc; 6562 } 6563 6564 static void __exit qeth_core_exit(void) 6565 { 6566 qeth_clear_dbf_list(); 6567 destroy_workqueue(qeth_wq); 6568 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 6569 ccw_driver_unregister(&qeth_ccw_driver); 6570 kmem_cache_destroy(qeth_qdio_outbuf_cache); 6571 kmem_cache_destroy(qeth_core_header_cache); 6572 root_device_unregister(qeth_core_root_dev); 6573 qeth_unregister_dbf_views(); 6574 pr_info("core functions removed\n"); 6575 } 6576 6577 module_init(qeth_core_init); 6578 module_exit(qeth_core_exit); 6579 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 6580 MODULE_DESCRIPTION("qeth core functions"); 6581 MODULE_LICENSE("GPL"); 6582