1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 #include <net/iucv/af_iucv.h> 25 26 #include <asm/ebcdic.h> 27 #include <asm/io.h> 28 #include <asm/sysinfo.h> 29 #include <asm/compat.h> 30 31 #include "qeth_core.h" 32 33 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 34 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 35 /* N P A M L V H */ 36 [QETH_DBF_SETUP] = {"qeth_setup", 37 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 38 [QETH_DBF_MSG] = {"qeth_msg", 39 8, 1, 128, 3, &debug_sprintf_view, NULL}, 40 [QETH_DBF_CTRL] = {"qeth_control", 41 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 42 }; 43 EXPORT_SYMBOL_GPL(qeth_dbf); 44 45 struct qeth_card_list_struct qeth_core_card_list; 46 EXPORT_SYMBOL_GPL(qeth_core_card_list); 47 struct kmem_cache *qeth_core_header_cache; 48 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 49 static struct kmem_cache *qeth_qdio_outbuf_cache; 50 51 static struct device *qeth_core_root_dev; 52 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 53 static struct lock_class_key qdio_out_skb_queue_key; 54 static struct mutex qeth_mod_mutex; 55 56 static void qeth_send_control_data_cb(struct qeth_channel *, 57 struct qeth_cmd_buffer *); 58 static int qeth_issue_next_read(struct qeth_card *); 59 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 60 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 61 static void qeth_free_buffer_pool(struct qeth_card *); 62 static int qeth_qdio_establish(struct qeth_card *); 63 static void qeth_free_qdio_buffers(struct qeth_card *); 64 static void qeth_notify_skbs(struct qeth_qdio_out_q *queue, 65 struct qeth_qdio_out_buffer *buf, 66 enum iucv_tx_notify notification); 67 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf); 68 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 69 struct qeth_qdio_out_buffer *buf, 70 enum qeth_qdio_buffer_states newbufstate); 71 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *, int); 72 73 static inline const char *qeth_get_cardname(struct qeth_card *card) 74 { 75 if (card->info.guestlan) { 76 switch (card->info.type) { 77 case QETH_CARD_TYPE_OSD: 78 return " Guest LAN QDIO"; 79 case QETH_CARD_TYPE_IQD: 80 return " Guest LAN Hiper"; 81 case QETH_CARD_TYPE_OSM: 82 return " Guest LAN QDIO - OSM"; 83 case QETH_CARD_TYPE_OSX: 84 return " Guest LAN QDIO - OSX"; 85 default: 86 return " unknown"; 87 } 88 } else { 89 switch (card->info.type) { 90 case QETH_CARD_TYPE_OSD: 91 return " OSD Express"; 92 case QETH_CARD_TYPE_IQD: 93 return " HiperSockets"; 94 case QETH_CARD_TYPE_OSN: 95 return " OSN QDIO"; 96 case QETH_CARD_TYPE_OSM: 97 return " OSM QDIO"; 98 case QETH_CARD_TYPE_OSX: 99 return " OSX QDIO"; 100 default: 101 return " unknown"; 102 } 103 } 104 return " n/a"; 105 } 106 107 /* max length to be returned: 14 */ 108 const char *qeth_get_cardname_short(struct qeth_card *card) 109 { 110 if (card->info.guestlan) { 111 switch (card->info.type) { 112 case QETH_CARD_TYPE_OSD: 113 return "GuestLAN QDIO"; 114 case QETH_CARD_TYPE_IQD: 115 return "GuestLAN Hiper"; 116 case QETH_CARD_TYPE_OSM: 117 return "GuestLAN OSM"; 118 case QETH_CARD_TYPE_OSX: 119 return "GuestLAN OSX"; 120 default: 121 return "unknown"; 122 } 123 } else { 124 switch (card->info.type) { 125 case QETH_CARD_TYPE_OSD: 126 switch (card->info.link_type) { 127 case QETH_LINK_TYPE_FAST_ETH: 128 return "OSD_100"; 129 case QETH_LINK_TYPE_HSTR: 130 return "HSTR"; 131 case QETH_LINK_TYPE_GBIT_ETH: 132 return "OSD_1000"; 133 case QETH_LINK_TYPE_10GBIT_ETH: 134 return "OSD_10GIG"; 135 case QETH_LINK_TYPE_LANE_ETH100: 136 return "OSD_FE_LANE"; 137 case QETH_LINK_TYPE_LANE_TR: 138 return "OSD_TR_LANE"; 139 case QETH_LINK_TYPE_LANE_ETH1000: 140 return "OSD_GbE_LANE"; 141 case QETH_LINK_TYPE_LANE: 142 return "OSD_ATM_LANE"; 143 default: 144 return "OSD_Express"; 145 } 146 case QETH_CARD_TYPE_IQD: 147 return "HiperSockets"; 148 case QETH_CARD_TYPE_OSN: 149 return "OSN"; 150 case QETH_CARD_TYPE_OSM: 151 return "OSM_1000"; 152 case QETH_CARD_TYPE_OSX: 153 return "OSX_10GIG"; 154 default: 155 return "unknown"; 156 } 157 } 158 return "n/a"; 159 } 160 161 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 162 int clear_start_mask) 163 { 164 unsigned long flags; 165 166 spin_lock_irqsave(&card->thread_mask_lock, flags); 167 card->thread_allowed_mask = threads; 168 if (clear_start_mask) 169 card->thread_start_mask &= threads; 170 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 171 wake_up(&card->wait_q); 172 } 173 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 174 175 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 176 { 177 unsigned long flags; 178 int rc = 0; 179 180 spin_lock_irqsave(&card->thread_mask_lock, flags); 181 rc = (card->thread_running_mask & threads); 182 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 183 return rc; 184 } 185 EXPORT_SYMBOL_GPL(qeth_threads_running); 186 187 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 188 { 189 return wait_event_interruptible(card->wait_q, 190 qeth_threads_running(card, threads) == 0); 191 } 192 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 193 194 void qeth_clear_working_pool_list(struct qeth_card *card) 195 { 196 struct qeth_buffer_pool_entry *pool_entry, *tmp; 197 198 QETH_CARD_TEXT(card, 5, "clwrklst"); 199 list_for_each_entry_safe(pool_entry, tmp, 200 &card->qdio.in_buf_pool.entry_list, list){ 201 list_del(&pool_entry->list); 202 } 203 } 204 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 205 206 static int qeth_alloc_buffer_pool(struct qeth_card *card) 207 { 208 struct qeth_buffer_pool_entry *pool_entry; 209 void *ptr; 210 int i, j; 211 212 QETH_CARD_TEXT(card, 5, "alocpool"); 213 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 214 pool_entry = kzalloc(sizeof(*pool_entry), GFP_KERNEL); 215 if (!pool_entry) { 216 qeth_free_buffer_pool(card); 217 return -ENOMEM; 218 } 219 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 220 ptr = (void *) __get_free_page(GFP_KERNEL); 221 if (!ptr) { 222 while (j > 0) 223 free_page((unsigned long) 224 pool_entry->elements[--j]); 225 kfree(pool_entry); 226 qeth_free_buffer_pool(card); 227 return -ENOMEM; 228 } 229 pool_entry->elements[j] = ptr; 230 } 231 list_add(&pool_entry->init_list, 232 &card->qdio.init_pool.entry_list); 233 } 234 return 0; 235 } 236 237 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 238 { 239 QETH_CARD_TEXT(card, 2, "realcbp"); 240 241 if ((card->state != CARD_STATE_DOWN) && 242 (card->state != CARD_STATE_RECOVER)) 243 return -EPERM; 244 245 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 246 qeth_clear_working_pool_list(card); 247 qeth_free_buffer_pool(card); 248 card->qdio.in_buf_pool.buf_count = bufcnt; 249 card->qdio.init_pool.buf_count = bufcnt; 250 return qeth_alloc_buffer_pool(card); 251 } 252 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 253 254 static inline int qeth_cq_init(struct qeth_card *card) 255 { 256 int rc; 257 258 if (card->options.cq == QETH_CQ_ENABLED) { 259 QETH_DBF_TEXT(SETUP, 2, "cqinit"); 260 memset(card->qdio.c_q->qdio_bufs, 0, 261 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 262 card->qdio.c_q->next_buf_to_init = 127; 263 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 264 card->qdio.no_in_queues - 1, 0, 265 127); 266 if (rc) { 267 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 268 goto out; 269 } 270 } 271 rc = 0; 272 out: 273 return rc; 274 } 275 276 static inline int qeth_alloc_cq(struct qeth_card *card) 277 { 278 int rc; 279 280 if (card->options.cq == QETH_CQ_ENABLED) { 281 int i; 282 struct qdio_outbuf_state *outbuf_states; 283 284 QETH_DBF_TEXT(SETUP, 2, "cqon"); 285 card->qdio.c_q = kzalloc(sizeof(struct qeth_qdio_q), 286 GFP_KERNEL); 287 if (!card->qdio.c_q) { 288 rc = -1; 289 goto kmsg_out; 290 } 291 QETH_DBF_HEX(SETUP, 2, &card->qdio.c_q, sizeof(void *)); 292 293 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 294 card->qdio.c_q->bufs[i].buffer = 295 &card->qdio.c_q->qdio_bufs[i]; 296 } 297 298 card->qdio.no_in_queues = 2; 299 300 card->qdio.out_bufstates = (struct qdio_outbuf_state *) 301 kzalloc(card->qdio.no_out_queues * 302 QDIO_MAX_BUFFERS_PER_Q * 303 sizeof(struct qdio_outbuf_state), GFP_KERNEL); 304 outbuf_states = card->qdio.out_bufstates; 305 if (outbuf_states == NULL) { 306 rc = -1; 307 goto free_cq_out; 308 } 309 for (i = 0; i < card->qdio.no_out_queues; ++i) { 310 card->qdio.out_qs[i]->bufstates = outbuf_states; 311 outbuf_states += QDIO_MAX_BUFFERS_PER_Q; 312 } 313 } else { 314 QETH_DBF_TEXT(SETUP, 2, "nocq"); 315 card->qdio.c_q = NULL; 316 card->qdio.no_in_queues = 1; 317 } 318 QETH_DBF_TEXT_(SETUP, 2, "iqc%d", card->qdio.no_in_queues); 319 rc = 0; 320 out: 321 return rc; 322 free_cq_out: 323 kfree(card->qdio.c_q); 324 card->qdio.c_q = NULL; 325 kmsg_out: 326 dev_err(&card->gdev->dev, "Failed to create completion queue\n"); 327 goto out; 328 } 329 330 static inline void qeth_free_cq(struct qeth_card *card) 331 { 332 if (card->qdio.c_q) { 333 --card->qdio.no_in_queues; 334 kfree(card->qdio.c_q); 335 card->qdio.c_q = NULL; 336 } 337 kfree(card->qdio.out_bufstates); 338 card->qdio.out_bufstates = NULL; 339 } 340 341 static inline enum iucv_tx_notify qeth_compute_cq_notification(int sbalf15, 342 int delayed) { 343 enum iucv_tx_notify n; 344 345 switch (sbalf15) { 346 case 0: 347 n = delayed ? TX_NOTIFY_DELAYED_OK : TX_NOTIFY_OK; 348 break; 349 case 4: 350 case 16: 351 case 17: 352 case 18: 353 n = delayed ? TX_NOTIFY_DELAYED_UNREACHABLE : 354 TX_NOTIFY_UNREACHABLE; 355 break; 356 default: 357 n = delayed ? TX_NOTIFY_DELAYED_GENERALERROR : 358 TX_NOTIFY_GENERALERROR; 359 break; 360 } 361 362 return n; 363 } 364 365 static inline void qeth_cleanup_handled_pending(struct qeth_qdio_out_q *q, 366 int bidx, int forced_cleanup) 367 { 368 if (q->card->options.cq != QETH_CQ_ENABLED) 369 return; 370 371 if (q->bufs[bidx]->next_pending != NULL) { 372 struct qeth_qdio_out_buffer *head = q->bufs[bidx]; 373 struct qeth_qdio_out_buffer *c = q->bufs[bidx]->next_pending; 374 375 while (c) { 376 if (forced_cleanup || 377 atomic_read(&c->state) == 378 QETH_QDIO_BUF_HANDLED_DELAYED) { 379 struct qeth_qdio_out_buffer *f = c; 380 QETH_CARD_TEXT(f->q->card, 5, "fp"); 381 QETH_CARD_TEXT_(f->q->card, 5, "%lx", (long) f); 382 /* release here to avoid interleaving between 383 outbound tasklet and inbound tasklet 384 regarding notifications and lifecycle */ 385 qeth_release_skbs(c); 386 387 c = f->next_pending; 388 BUG_ON(head->next_pending != f); 389 head->next_pending = c; 390 kmem_cache_free(qeth_qdio_outbuf_cache, f); 391 } else { 392 head = c; 393 c = c->next_pending; 394 } 395 396 } 397 } 398 if (forced_cleanup && (atomic_read(&(q->bufs[bidx]->state)) == 399 QETH_QDIO_BUF_HANDLED_DELAYED)) { 400 /* for recovery situations */ 401 q->bufs[bidx]->aob = q->bufstates[bidx].aob; 402 qeth_init_qdio_out_buf(q, bidx); 403 QETH_CARD_TEXT(q->card, 2, "clprecov"); 404 } 405 } 406 407 408 static inline void qeth_qdio_handle_aob(struct qeth_card *card, 409 unsigned long phys_aob_addr) { 410 struct qaob *aob; 411 struct qeth_qdio_out_buffer *buffer; 412 enum iucv_tx_notify notification; 413 414 aob = (struct qaob *) phys_to_virt(phys_aob_addr); 415 QETH_CARD_TEXT(card, 5, "haob"); 416 QETH_CARD_TEXT_(card, 5, "%lx", phys_aob_addr); 417 buffer = (struct qeth_qdio_out_buffer *) aob->user1; 418 QETH_CARD_TEXT_(card, 5, "%lx", aob->user1); 419 420 BUG_ON(buffer == NULL); 421 422 if (atomic_cmpxchg(&buffer->state, QETH_QDIO_BUF_PRIMED, 423 QETH_QDIO_BUF_IN_CQ) == QETH_QDIO_BUF_PRIMED) { 424 notification = TX_NOTIFY_OK; 425 } else { 426 BUG_ON(atomic_read(&buffer->state) != QETH_QDIO_BUF_PENDING); 427 atomic_set(&buffer->state, QETH_QDIO_BUF_IN_CQ); 428 notification = TX_NOTIFY_DELAYED_OK; 429 } 430 431 if (aob->aorc != 0) { 432 QETH_CARD_TEXT_(card, 2, "aorc%02X", aob->aorc); 433 notification = qeth_compute_cq_notification(aob->aorc, 1); 434 } 435 qeth_notify_skbs(buffer->q, buffer, notification); 436 437 buffer->aob = NULL; 438 qeth_clear_output_buffer(buffer->q, buffer, 439 QETH_QDIO_BUF_HANDLED_DELAYED); 440 441 /* from here on: do not touch buffer anymore */ 442 qdio_release_aob(aob); 443 } 444 445 static inline int qeth_is_cq(struct qeth_card *card, unsigned int queue) 446 { 447 return card->options.cq == QETH_CQ_ENABLED && 448 card->qdio.c_q != NULL && 449 queue != 0 && 450 queue == card->qdio.no_in_queues - 1; 451 } 452 453 454 static int qeth_issue_next_read(struct qeth_card *card) 455 { 456 int rc; 457 struct qeth_cmd_buffer *iob; 458 459 QETH_CARD_TEXT(card, 5, "issnxrd"); 460 if (card->read.state != CH_STATE_UP) 461 return -EIO; 462 iob = qeth_get_buffer(&card->read); 463 if (!iob) { 464 dev_warn(&card->gdev->dev, "The qeth device driver " 465 "failed to recover an error on the device\n"); 466 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 467 "available\n", dev_name(&card->gdev->dev)); 468 return -ENOMEM; 469 } 470 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 471 QETH_CARD_TEXT(card, 6, "noirqpnd"); 472 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 473 (addr_t) iob, 0, 0); 474 if (rc) { 475 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 476 "rc=%i\n", dev_name(&card->gdev->dev), rc); 477 atomic_set(&card->read.irq_pending, 0); 478 card->read_or_write_problem = 1; 479 qeth_schedule_recovery(card); 480 wake_up(&card->wait_q); 481 } 482 return rc; 483 } 484 485 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 486 { 487 struct qeth_reply *reply; 488 489 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 490 if (reply) { 491 atomic_set(&reply->refcnt, 1); 492 atomic_set(&reply->received, 0); 493 reply->card = card; 494 }; 495 return reply; 496 } 497 498 static void qeth_get_reply(struct qeth_reply *reply) 499 { 500 WARN_ON(atomic_read(&reply->refcnt) <= 0); 501 atomic_inc(&reply->refcnt); 502 } 503 504 static void qeth_put_reply(struct qeth_reply *reply) 505 { 506 WARN_ON(atomic_read(&reply->refcnt) <= 0); 507 if (atomic_dec_and_test(&reply->refcnt)) 508 kfree(reply); 509 } 510 511 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 512 struct qeth_card *card) 513 { 514 char *ipa_name; 515 int com = cmd->hdr.command; 516 ipa_name = qeth_get_ipa_cmd_name(com); 517 if (rc) 518 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 519 "x%X \"%s\"\n", 520 ipa_name, com, dev_name(&card->gdev->dev), 521 QETH_CARD_IFNAME(card), rc, 522 qeth_get_ipa_msg(rc)); 523 else 524 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 525 ipa_name, com, dev_name(&card->gdev->dev), 526 QETH_CARD_IFNAME(card)); 527 } 528 529 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 530 struct qeth_cmd_buffer *iob) 531 { 532 struct qeth_ipa_cmd *cmd = NULL; 533 534 QETH_CARD_TEXT(card, 5, "chkipad"); 535 if (IS_IPA(iob->data)) { 536 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 537 if (IS_IPA_REPLY(cmd)) { 538 if (cmd->hdr.command != IPA_CMD_SETCCID && 539 cmd->hdr.command != IPA_CMD_DELCCID && 540 cmd->hdr.command != IPA_CMD_MODCCID && 541 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 542 qeth_issue_ipa_msg(cmd, 543 cmd->hdr.return_code, card); 544 return cmd; 545 } else { 546 switch (cmd->hdr.command) { 547 case IPA_CMD_STOPLAN: 548 dev_warn(&card->gdev->dev, 549 "The link for interface %s on CHPID" 550 " 0x%X failed\n", 551 QETH_CARD_IFNAME(card), 552 card->info.chpid); 553 card->lan_online = 0; 554 if (card->dev && netif_carrier_ok(card->dev)) 555 netif_carrier_off(card->dev); 556 return NULL; 557 case IPA_CMD_STARTLAN: 558 dev_info(&card->gdev->dev, 559 "The link for %s on CHPID 0x%X has" 560 " been restored\n", 561 QETH_CARD_IFNAME(card), 562 card->info.chpid); 563 netif_carrier_on(card->dev); 564 card->lan_online = 1; 565 if (card->info.hwtrap) 566 card->info.hwtrap = 2; 567 qeth_schedule_recovery(card); 568 return NULL; 569 case IPA_CMD_MODCCID: 570 return cmd; 571 case IPA_CMD_REGISTER_LOCAL_ADDR: 572 QETH_CARD_TEXT(card, 3, "irla"); 573 break; 574 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 575 QETH_CARD_TEXT(card, 3, "urla"); 576 break; 577 default: 578 QETH_DBF_MESSAGE(2, "Received data is IPA " 579 "but not a reply!\n"); 580 break; 581 } 582 } 583 } 584 return cmd; 585 } 586 587 void qeth_clear_ipacmd_list(struct qeth_card *card) 588 { 589 struct qeth_reply *reply, *r; 590 unsigned long flags; 591 592 QETH_CARD_TEXT(card, 4, "clipalst"); 593 594 spin_lock_irqsave(&card->lock, flags); 595 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 596 qeth_get_reply(reply); 597 reply->rc = -EIO; 598 atomic_inc(&reply->received); 599 list_del_init(&reply->list); 600 wake_up(&reply->wait_q); 601 qeth_put_reply(reply); 602 } 603 spin_unlock_irqrestore(&card->lock, flags); 604 atomic_set(&card->write.irq_pending, 0); 605 } 606 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 607 608 static int qeth_check_idx_response(struct qeth_card *card, 609 unsigned char *buffer) 610 { 611 if (!buffer) 612 return 0; 613 614 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 615 if ((buffer[2] & 0xc0) == 0xc0) { 616 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 617 "with cause code 0x%02x%s\n", 618 buffer[4], 619 ((buffer[4] == 0x22) ? 620 " -- try another portname" : "")); 621 QETH_CARD_TEXT(card, 2, "ckidxres"); 622 QETH_CARD_TEXT(card, 2, " idxterm"); 623 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 624 if (buffer[4] == 0xf6) { 625 dev_err(&card->gdev->dev, 626 "The qeth device is not configured " 627 "for the OSI layer required by z/VM\n"); 628 return -EPERM; 629 } 630 return -EIO; 631 } 632 return 0; 633 } 634 635 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 636 __u32 len) 637 { 638 struct qeth_card *card; 639 640 card = CARD_FROM_CDEV(channel->ccwdev); 641 QETH_CARD_TEXT(card, 4, "setupccw"); 642 if (channel == &card->read) 643 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 644 else 645 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 646 channel->ccw.count = len; 647 channel->ccw.cda = (__u32) __pa(iob); 648 } 649 650 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 651 { 652 __u8 index; 653 654 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 655 index = channel->io_buf_no; 656 do { 657 if (channel->iob[index].state == BUF_STATE_FREE) { 658 channel->iob[index].state = BUF_STATE_LOCKED; 659 channel->io_buf_no = (channel->io_buf_no + 1) % 660 QETH_CMD_BUFFER_NO; 661 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 662 return channel->iob + index; 663 } 664 index = (index + 1) % QETH_CMD_BUFFER_NO; 665 } while (index != channel->io_buf_no); 666 667 return NULL; 668 } 669 670 void qeth_release_buffer(struct qeth_channel *channel, 671 struct qeth_cmd_buffer *iob) 672 { 673 unsigned long flags; 674 675 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 676 spin_lock_irqsave(&channel->iob_lock, flags); 677 memset(iob->data, 0, QETH_BUFSIZE); 678 iob->state = BUF_STATE_FREE; 679 iob->callback = qeth_send_control_data_cb; 680 iob->rc = 0; 681 spin_unlock_irqrestore(&channel->iob_lock, flags); 682 wake_up(&channel->wait_q); 683 } 684 EXPORT_SYMBOL_GPL(qeth_release_buffer); 685 686 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 687 { 688 struct qeth_cmd_buffer *buffer = NULL; 689 unsigned long flags; 690 691 spin_lock_irqsave(&channel->iob_lock, flags); 692 buffer = __qeth_get_buffer(channel); 693 spin_unlock_irqrestore(&channel->iob_lock, flags); 694 return buffer; 695 } 696 697 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 698 { 699 struct qeth_cmd_buffer *buffer; 700 wait_event(channel->wait_q, 701 ((buffer = qeth_get_buffer(channel)) != NULL)); 702 return buffer; 703 } 704 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 705 706 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 707 { 708 int cnt; 709 710 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 711 qeth_release_buffer(channel, &channel->iob[cnt]); 712 channel->buf_no = 0; 713 channel->io_buf_no = 0; 714 } 715 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 716 717 static void qeth_send_control_data_cb(struct qeth_channel *channel, 718 struct qeth_cmd_buffer *iob) 719 { 720 struct qeth_card *card; 721 struct qeth_reply *reply, *r; 722 struct qeth_ipa_cmd *cmd; 723 unsigned long flags; 724 int keep_reply; 725 int rc = 0; 726 727 card = CARD_FROM_CDEV(channel->ccwdev); 728 QETH_CARD_TEXT(card, 4, "sndctlcb"); 729 rc = qeth_check_idx_response(card, iob->data); 730 switch (rc) { 731 case 0: 732 break; 733 case -EIO: 734 qeth_clear_ipacmd_list(card); 735 qeth_schedule_recovery(card); 736 /* fall through */ 737 default: 738 goto out; 739 } 740 741 cmd = qeth_check_ipa_data(card, iob); 742 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 743 goto out; 744 /*in case of OSN : check if cmd is set */ 745 if (card->info.type == QETH_CARD_TYPE_OSN && 746 cmd && 747 cmd->hdr.command != IPA_CMD_STARTLAN && 748 card->osn_info.assist_cb != NULL) { 749 card->osn_info.assist_cb(card->dev, cmd); 750 goto out; 751 } 752 753 spin_lock_irqsave(&card->lock, flags); 754 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 755 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 756 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 757 qeth_get_reply(reply); 758 list_del_init(&reply->list); 759 spin_unlock_irqrestore(&card->lock, flags); 760 keep_reply = 0; 761 if (reply->callback != NULL) { 762 if (cmd) { 763 reply->offset = (__u16)((char *)cmd - 764 (char *)iob->data); 765 keep_reply = reply->callback(card, 766 reply, 767 (unsigned long)cmd); 768 } else 769 keep_reply = reply->callback(card, 770 reply, 771 (unsigned long)iob); 772 } 773 if (cmd) 774 reply->rc = (u16) cmd->hdr.return_code; 775 else if (iob->rc) 776 reply->rc = iob->rc; 777 if (keep_reply) { 778 spin_lock_irqsave(&card->lock, flags); 779 list_add_tail(&reply->list, 780 &card->cmd_waiter_list); 781 spin_unlock_irqrestore(&card->lock, flags); 782 } else { 783 atomic_inc(&reply->received); 784 wake_up(&reply->wait_q); 785 } 786 qeth_put_reply(reply); 787 goto out; 788 } 789 } 790 spin_unlock_irqrestore(&card->lock, flags); 791 out: 792 memcpy(&card->seqno.pdu_hdr_ack, 793 QETH_PDU_HEADER_SEQ_NO(iob->data), 794 QETH_SEQ_NO_LENGTH); 795 qeth_release_buffer(channel, iob); 796 } 797 798 static int qeth_setup_channel(struct qeth_channel *channel) 799 { 800 int cnt; 801 802 QETH_DBF_TEXT(SETUP, 2, "setupch"); 803 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 804 channel->iob[cnt].data = 805 kzalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 806 if (channel->iob[cnt].data == NULL) 807 break; 808 channel->iob[cnt].state = BUF_STATE_FREE; 809 channel->iob[cnt].channel = channel; 810 channel->iob[cnt].callback = qeth_send_control_data_cb; 811 channel->iob[cnt].rc = 0; 812 } 813 if (cnt < QETH_CMD_BUFFER_NO) { 814 while (cnt-- > 0) 815 kfree(channel->iob[cnt].data); 816 return -ENOMEM; 817 } 818 channel->buf_no = 0; 819 channel->io_buf_no = 0; 820 atomic_set(&channel->irq_pending, 0); 821 spin_lock_init(&channel->iob_lock); 822 823 init_waitqueue_head(&channel->wait_q); 824 return 0; 825 } 826 827 static int qeth_set_thread_start_bit(struct qeth_card *card, 828 unsigned long thread) 829 { 830 unsigned long flags; 831 832 spin_lock_irqsave(&card->thread_mask_lock, flags); 833 if (!(card->thread_allowed_mask & thread) || 834 (card->thread_start_mask & thread)) { 835 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 836 return -EPERM; 837 } 838 card->thread_start_mask |= thread; 839 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 840 return 0; 841 } 842 843 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 844 { 845 unsigned long flags; 846 847 spin_lock_irqsave(&card->thread_mask_lock, flags); 848 card->thread_start_mask &= ~thread; 849 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 850 wake_up(&card->wait_q); 851 } 852 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 853 854 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 855 { 856 unsigned long flags; 857 858 spin_lock_irqsave(&card->thread_mask_lock, flags); 859 card->thread_running_mask &= ~thread; 860 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 861 wake_up(&card->wait_q); 862 } 863 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 864 865 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 866 { 867 unsigned long flags; 868 int rc = 0; 869 870 spin_lock_irqsave(&card->thread_mask_lock, flags); 871 if (card->thread_start_mask & thread) { 872 if ((card->thread_allowed_mask & thread) && 873 !(card->thread_running_mask & thread)) { 874 rc = 1; 875 card->thread_start_mask &= ~thread; 876 card->thread_running_mask |= thread; 877 } else 878 rc = -EPERM; 879 } 880 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 881 return rc; 882 } 883 884 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 885 { 886 int rc = 0; 887 888 wait_event(card->wait_q, 889 (rc = __qeth_do_run_thread(card, thread)) >= 0); 890 return rc; 891 } 892 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 893 894 void qeth_schedule_recovery(struct qeth_card *card) 895 { 896 QETH_CARD_TEXT(card, 2, "startrec"); 897 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 898 schedule_work(&card->kernel_thread_starter); 899 } 900 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 901 902 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 903 { 904 int dstat, cstat; 905 char *sense; 906 struct qeth_card *card; 907 908 sense = (char *) irb->ecw; 909 cstat = irb->scsw.cmd.cstat; 910 dstat = irb->scsw.cmd.dstat; 911 card = CARD_FROM_CDEV(cdev); 912 913 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 914 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 915 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 916 QETH_CARD_TEXT(card, 2, "CGENCHK"); 917 dev_warn(&cdev->dev, "The qeth device driver " 918 "failed to recover an error on the device\n"); 919 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 920 dev_name(&cdev->dev), dstat, cstat); 921 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 922 16, 1, irb, 64, 1); 923 return 1; 924 } 925 926 if (dstat & DEV_STAT_UNIT_CHECK) { 927 if (sense[SENSE_RESETTING_EVENT_BYTE] & 928 SENSE_RESETTING_EVENT_FLAG) { 929 QETH_CARD_TEXT(card, 2, "REVIND"); 930 return 1; 931 } 932 if (sense[SENSE_COMMAND_REJECT_BYTE] & 933 SENSE_COMMAND_REJECT_FLAG) { 934 QETH_CARD_TEXT(card, 2, "CMDREJi"); 935 return 1; 936 } 937 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 938 QETH_CARD_TEXT(card, 2, "AFFE"); 939 return 1; 940 } 941 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 942 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 943 return 0; 944 } 945 QETH_CARD_TEXT(card, 2, "DGENCHK"); 946 return 1; 947 } 948 return 0; 949 } 950 951 static long __qeth_check_irb_error(struct ccw_device *cdev, 952 unsigned long intparm, struct irb *irb) 953 { 954 struct qeth_card *card; 955 956 card = CARD_FROM_CDEV(cdev); 957 958 if (!IS_ERR(irb)) 959 return 0; 960 961 switch (PTR_ERR(irb)) { 962 case -EIO: 963 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 964 dev_name(&cdev->dev)); 965 QETH_CARD_TEXT(card, 2, "ckirberr"); 966 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 967 break; 968 case -ETIMEDOUT: 969 dev_warn(&cdev->dev, "A hardware operation timed out" 970 " on the device\n"); 971 QETH_CARD_TEXT(card, 2, "ckirberr"); 972 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 973 if (intparm == QETH_RCD_PARM) { 974 if (card && (card->data.ccwdev == cdev)) { 975 card->data.state = CH_STATE_DOWN; 976 wake_up(&card->wait_q); 977 } 978 } 979 break; 980 default: 981 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 982 dev_name(&cdev->dev), PTR_ERR(irb)); 983 QETH_CARD_TEXT(card, 2, "ckirberr"); 984 QETH_CARD_TEXT(card, 2, " rc???"); 985 } 986 return PTR_ERR(irb); 987 } 988 989 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 990 struct irb *irb) 991 { 992 int rc; 993 int cstat, dstat; 994 struct qeth_cmd_buffer *buffer; 995 struct qeth_channel *channel; 996 struct qeth_card *card; 997 struct qeth_cmd_buffer *iob; 998 __u8 index; 999 1000 if (__qeth_check_irb_error(cdev, intparm, irb)) 1001 return; 1002 cstat = irb->scsw.cmd.cstat; 1003 dstat = irb->scsw.cmd.dstat; 1004 1005 card = CARD_FROM_CDEV(cdev); 1006 if (!card) 1007 return; 1008 1009 QETH_CARD_TEXT(card, 5, "irq"); 1010 1011 if (card->read.ccwdev == cdev) { 1012 channel = &card->read; 1013 QETH_CARD_TEXT(card, 5, "read"); 1014 } else if (card->write.ccwdev == cdev) { 1015 channel = &card->write; 1016 QETH_CARD_TEXT(card, 5, "write"); 1017 } else { 1018 channel = &card->data; 1019 QETH_CARD_TEXT(card, 5, "data"); 1020 } 1021 atomic_set(&channel->irq_pending, 0); 1022 1023 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 1024 channel->state = CH_STATE_STOPPED; 1025 1026 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 1027 channel->state = CH_STATE_HALTED; 1028 1029 /*let's wake up immediately on data channel*/ 1030 if ((channel == &card->data) && (intparm != 0) && 1031 (intparm != QETH_RCD_PARM)) 1032 goto out; 1033 1034 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 1035 QETH_CARD_TEXT(card, 6, "clrchpar"); 1036 /* we don't have to handle this further */ 1037 intparm = 0; 1038 } 1039 if (intparm == QETH_HALT_CHANNEL_PARM) { 1040 QETH_CARD_TEXT(card, 6, "hltchpar"); 1041 /* we don't have to handle this further */ 1042 intparm = 0; 1043 } 1044 if ((dstat & DEV_STAT_UNIT_EXCEP) || 1045 (dstat & DEV_STAT_UNIT_CHECK) || 1046 (cstat)) { 1047 if (irb->esw.esw0.erw.cons) { 1048 dev_warn(&channel->ccwdev->dev, 1049 "The qeth device driver failed to recover " 1050 "an error on the device\n"); 1051 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 1052 "0x%X dstat 0x%X\n", 1053 dev_name(&channel->ccwdev->dev), cstat, dstat); 1054 print_hex_dump(KERN_WARNING, "qeth: irb ", 1055 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 1056 print_hex_dump(KERN_WARNING, "qeth: sense data ", 1057 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 1058 } 1059 if (intparm == QETH_RCD_PARM) { 1060 channel->state = CH_STATE_DOWN; 1061 goto out; 1062 } 1063 rc = qeth_get_problem(cdev, irb); 1064 if (rc) { 1065 qeth_clear_ipacmd_list(card); 1066 qeth_schedule_recovery(card); 1067 goto out; 1068 } 1069 } 1070 1071 if (intparm == QETH_RCD_PARM) { 1072 channel->state = CH_STATE_RCD_DONE; 1073 goto out; 1074 } 1075 if (intparm) { 1076 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 1077 buffer->state = BUF_STATE_PROCESSED; 1078 } 1079 if (channel == &card->data) 1080 return; 1081 if (channel == &card->read && 1082 channel->state == CH_STATE_UP) 1083 qeth_issue_next_read(card); 1084 1085 iob = channel->iob; 1086 index = channel->buf_no; 1087 while (iob[index].state == BUF_STATE_PROCESSED) { 1088 if (iob[index].callback != NULL) 1089 iob[index].callback(channel, iob + index); 1090 1091 index = (index + 1) % QETH_CMD_BUFFER_NO; 1092 } 1093 channel->buf_no = index; 1094 out: 1095 wake_up(&card->wait_q); 1096 return; 1097 } 1098 1099 static void qeth_notify_skbs(struct qeth_qdio_out_q *q, 1100 struct qeth_qdio_out_buffer *buf, 1101 enum iucv_tx_notify notification) 1102 { 1103 struct sk_buff *skb; 1104 1105 if (skb_queue_empty(&buf->skb_list)) 1106 goto out; 1107 skb = skb_peek(&buf->skb_list); 1108 while (skb) { 1109 QETH_CARD_TEXT_(q->card, 5, "skbn%d", notification); 1110 QETH_CARD_TEXT_(q->card, 5, "%lx", (long) skb); 1111 if (skb->protocol == ETH_P_AF_IUCV) { 1112 if (skb->sk) { 1113 struct iucv_sock *iucv = iucv_sk(skb->sk); 1114 iucv->sk_txnotify(skb, notification); 1115 } 1116 } 1117 if (skb_queue_is_last(&buf->skb_list, skb)) 1118 skb = NULL; 1119 else 1120 skb = skb_queue_next(&buf->skb_list, skb); 1121 } 1122 out: 1123 return; 1124 } 1125 1126 static void qeth_release_skbs(struct qeth_qdio_out_buffer *buf) 1127 { 1128 struct sk_buff *skb; 1129 struct iucv_sock *iucv; 1130 int notify_general_error = 0; 1131 1132 if (atomic_read(&buf->state) == QETH_QDIO_BUF_PENDING) 1133 notify_general_error = 1; 1134 1135 /* release may never happen from within CQ tasklet scope */ 1136 BUG_ON(atomic_read(&buf->state) == QETH_QDIO_BUF_IN_CQ); 1137 1138 skb = skb_dequeue(&buf->skb_list); 1139 while (skb) { 1140 QETH_CARD_TEXT(buf->q->card, 5, "skbr"); 1141 QETH_CARD_TEXT_(buf->q->card, 5, "%lx", (long) skb); 1142 if (notify_general_error && skb->protocol == ETH_P_AF_IUCV) { 1143 if (skb->sk) { 1144 iucv = iucv_sk(skb->sk); 1145 iucv->sk_txnotify(skb, TX_NOTIFY_GENERALERROR); 1146 } 1147 } 1148 atomic_dec(&skb->users); 1149 dev_kfree_skb_any(skb); 1150 skb = skb_dequeue(&buf->skb_list); 1151 } 1152 } 1153 1154 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 1155 struct qeth_qdio_out_buffer *buf, 1156 enum qeth_qdio_buffer_states newbufstate) 1157 { 1158 int i; 1159 1160 /* is PCI flag set on buffer? */ 1161 if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) 1162 atomic_dec(&queue->set_pci_flags_count); 1163 1164 if (newbufstate == QETH_QDIO_BUF_EMPTY) { 1165 qeth_release_skbs(buf); 1166 } 1167 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 1168 if (buf->buffer->element[i].addr && buf->is_header[i]) 1169 kmem_cache_free(qeth_core_header_cache, 1170 buf->buffer->element[i].addr); 1171 buf->is_header[i] = 0; 1172 buf->buffer->element[i].length = 0; 1173 buf->buffer->element[i].addr = NULL; 1174 buf->buffer->element[i].eflags = 0; 1175 buf->buffer->element[i].sflags = 0; 1176 } 1177 buf->buffer->element[15].eflags = 0; 1178 buf->buffer->element[15].sflags = 0; 1179 buf->next_element_to_fill = 0; 1180 atomic_set(&buf->state, newbufstate); 1181 } 1182 1183 static void qeth_clear_outq_buffers(struct qeth_qdio_out_q *q, int free) 1184 { 1185 int j; 1186 1187 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 1188 if (!q->bufs[j]) 1189 continue; 1190 qeth_cleanup_handled_pending(q, j, 1); 1191 qeth_clear_output_buffer(q, q->bufs[j], QETH_QDIO_BUF_EMPTY); 1192 if (free) { 1193 kmem_cache_free(qeth_qdio_outbuf_cache, q->bufs[j]); 1194 q->bufs[j] = NULL; 1195 } 1196 } 1197 } 1198 1199 void qeth_clear_qdio_buffers(struct qeth_card *card) 1200 { 1201 int i; 1202 1203 QETH_CARD_TEXT(card, 2, "clearqdbf"); 1204 /* clear outbound buffers to free skbs */ 1205 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1206 if (card->qdio.out_qs[i]) { 1207 qeth_clear_outq_buffers(card->qdio.out_qs[i], 0); 1208 } 1209 } 1210 } 1211 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 1212 1213 static void qeth_free_buffer_pool(struct qeth_card *card) 1214 { 1215 struct qeth_buffer_pool_entry *pool_entry, *tmp; 1216 int i = 0; 1217 list_for_each_entry_safe(pool_entry, tmp, 1218 &card->qdio.init_pool.entry_list, init_list){ 1219 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 1220 free_page((unsigned long)pool_entry->elements[i]); 1221 list_del(&pool_entry->init_list); 1222 kfree(pool_entry); 1223 } 1224 } 1225 1226 static void qeth_free_qdio_buffers(struct qeth_card *card) 1227 { 1228 int i, j; 1229 1230 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 1231 QETH_QDIO_UNINITIALIZED) 1232 return; 1233 1234 qeth_free_cq(card); 1235 cancel_delayed_work_sync(&card->buffer_reclaim_work); 1236 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 1237 dev_kfree_skb_any(card->qdio.in_q->bufs[j].rx_skb); 1238 kfree(card->qdio.in_q); 1239 card->qdio.in_q = NULL; 1240 /* inbound buffer pool */ 1241 qeth_free_buffer_pool(card); 1242 /* free outbound qdio_qs */ 1243 if (card->qdio.out_qs) { 1244 for (i = 0; i < card->qdio.no_out_queues; ++i) { 1245 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 1246 kfree(card->qdio.out_qs[i]); 1247 } 1248 kfree(card->qdio.out_qs); 1249 card->qdio.out_qs = NULL; 1250 } 1251 } 1252 1253 static void qeth_clean_channel(struct qeth_channel *channel) 1254 { 1255 int cnt; 1256 1257 QETH_DBF_TEXT(SETUP, 2, "freech"); 1258 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 1259 kfree(channel->iob[cnt].data); 1260 } 1261 1262 static void qeth_get_channel_path_desc(struct qeth_card *card) 1263 { 1264 struct ccw_device *ccwdev; 1265 struct channelPath_dsc { 1266 u8 flags; 1267 u8 lsn; 1268 u8 desc; 1269 u8 chpid; 1270 u8 swla; 1271 u8 zeroes; 1272 u8 chla; 1273 u8 chpp; 1274 } *chp_dsc; 1275 1276 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 1277 1278 ccwdev = card->data.ccwdev; 1279 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 1280 if (chp_dsc != NULL) { 1281 if (card->info.type != QETH_CARD_TYPE_IQD) { 1282 /* CHPP field bit 6 == 1 -> single queue */ 1283 if ((chp_dsc->chpp & 0x02) == 0x02) { 1284 if ((atomic_read(&card->qdio.state) != 1285 QETH_QDIO_UNINITIALIZED) && 1286 (card->qdio.no_out_queues == 4)) 1287 /* change from 4 to 1 outbound queues */ 1288 qeth_free_qdio_buffers(card); 1289 card->qdio.no_out_queues = 1; 1290 if (card->qdio.default_out_queue != 0) 1291 dev_info(&card->gdev->dev, 1292 "Priority Queueing not supported\n"); 1293 card->qdio.default_out_queue = 0; 1294 } else { 1295 if ((atomic_read(&card->qdio.state) != 1296 QETH_QDIO_UNINITIALIZED) && 1297 (card->qdio.no_out_queues == 1)) { 1298 /* change from 1 to 4 outbound queues */ 1299 qeth_free_qdio_buffers(card); 1300 card->qdio.default_out_queue = 2; 1301 } 1302 card->qdio.no_out_queues = 4; 1303 } 1304 } 1305 card->info.func_level = 0x4100 + chp_dsc->desc; 1306 kfree(chp_dsc); 1307 } 1308 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1309 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1310 return; 1311 } 1312 1313 static void qeth_init_qdio_info(struct qeth_card *card) 1314 { 1315 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1316 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1317 /* inbound */ 1318 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1319 if (card->info.type == QETH_CARD_TYPE_IQD) 1320 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1321 else 1322 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1323 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1324 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1325 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1326 } 1327 1328 static void qeth_set_intial_options(struct qeth_card *card) 1329 { 1330 card->options.route4.type = NO_ROUTER; 1331 card->options.route6.type = NO_ROUTER; 1332 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1333 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1334 card->options.fake_broadcast = 0; 1335 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1336 card->options.performance_stats = 0; 1337 card->options.rx_sg_cb = QETH_RX_SG_CB; 1338 card->options.isolation = ISOLATION_MODE_NONE; 1339 card->options.cq = QETH_CQ_DISABLED; 1340 } 1341 1342 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1343 { 1344 unsigned long flags; 1345 int rc = 0; 1346 1347 spin_lock_irqsave(&card->thread_mask_lock, flags); 1348 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1349 (u8) card->thread_start_mask, 1350 (u8) card->thread_allowed_mask, 1351 (u8) card->thread_running_mask); 1352 rc = (card->thread_start_mask & thread); 1353 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1354 return rc; 1355 } 1356 1357 static void qeth_start_kernel_thread(struct work_struct *work) 1358 { 1359 struct task_struct *ts; 1360 struct qeth_card *card = container_of(work, struct qeth_card, 1361 kernel_thread_starter); 1362 QETH_CARD_TEXT(card , 2, "strthrd"); 1363 1364 if (card->read.state != CH_STATE_UP && 1365 card->write.state != CH_STATE_UP) 1366 return; 1367 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) { 1368 ts = kthread_run(card->discipline.recover, (void *)card, 1369 "qeth_recover"); 1370 if (IS_ERR(ts)) { 1371 qeth_clear_thread_start_bit(card, QETH_RECOVER_THREAD); 1372 qeth_clear_thread_running_bit(card, 1373 QETH_RECOVER_THREAD); 1374 } 1375 } 1376 } 1377 1378 static int qeth_setup_card(struct qeth_card *card) 1379 { 1380 1381 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1382 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1383 1384 card->read.state = CH_STATE_DOWN; 1385 card->write.state = CH_STATE_DOWN; 1386 card->data.state = CH_STATE_DOWN; 1387 card->state = CARD_STATE_DOWN; 1388 card->lan_online = 0; 1389 card->read_or_write_problem = 0; 1390 card->dev = NULL; 1391 spin_lock_init(&card->vlanlock); 1392 spin_lock_init(&card->mclock); 1393 spin_lock_init(&card->lock); 1394 spin_lock_init(&card->ip_lock); 1395 spin_lock_init(&card->thread_mask_lock); 1396 mutex_init(&card->conf_mutex); 1397 mutex_init(&card->discipline_mutex); 1398 card->thread_start_mask = 0; 1399 card->thread_allowed_mask = 0; 1400 card->thread_running_mask = 0; 1401 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1402 INIT_LIST_HEAD(&card->ip_list); 1403 INIT_LIST_HEAD(card->ip_tbd_list); 1404 INIT_LIST_HEAD(&card->cmd_waiter_list); 1405 init_waitqueue_head(&card->wait_q); 1406 /* initial options */ 1407 qeth_set_intial_options(card); 1408 /* IP address takeover */ 1409 INIT_LIST_HEAD(&card->ipato.entries); 1410 card->ipato.enabled = 0; 1411 card->ipato.invert4 = 0; 1412 card->ipato.invert6 = 0; 1413 /* init QDIO stuff */ 1414 qeth_init_qdio_info(card); 1415 INIT_DELAYED_WORK(&card->buffer_reclaim_work, qeth_buffer_reclaim_work); 1416 return 0; 1417 } 1418 1419 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1420 { 1421 struct qeth_card *card = container_of(slr, struct qeth_card, 1422 qeth_service_level); 1423 if (card->info.mcl_level[0]) 1424 seq_printf(m, "qeth: %s firmware level %s\n", 1425 CARD_BUS_ID(card), card->info.mcl_level); 1426 } 1427 1428 static struct qeth_card *qeth_alloc_card(void) 1429 { 1430 struct qeth_card *card; 1431 1432 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1433 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1434 if (!card) 1435 goto out; 1436 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1437 card->ip_tbd_list = kzalloc(sizeof(struct list_head), GFP_KERNEL); 1438 if (!card->ip_tbd_list) { 1439 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1440 goto out_card; 1441 } 1442 if (qeth_setup_channel(&card->read)) 1443 goto out_ip; 1444 if (qeth_setup_channel(&card->write)) 1445 goto out_channel; 1446 card->options.layer2 = -1; 1447 card->qeth_service_level.seq_print = qeth_core_sl_print; 1448 register_service_level(&card->qeth_service_level); 1449 return card; 1450 1451 out_channel: 1452 qeth_clean_channel(&card->read); 1453 out_ip: 1454 kfree(card->ip_tbd_list); 1455 out_card: 1456 kfree(card); 1457 out: 1458 return NULL; 1459 } 1460 1461 static int qeth_determine_card_type(struct qeth_card *card) 1462 { 1463 int i = 0; 1464 1465 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1466 1467 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1468 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1469 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1470 if ((CARD_RDEV(card)->id.dev_type == 1471 known_devices[i][QETH_DEV_TYPE_IND]) && 1472 (CARD_RDEV(card)->id.dev_model == 1473 known_devices[i][QETH_DEV_MODEL_IND])) { 1474 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1475 card->qdio.no_out_queues = 1476 known_devices[i][QETH_QUEUE_NO_IND]; 1477 card->qdio.no_in_queues = 1; 1478 card->info.is_multicast_different = 1479 known_devices[i][QETH_MULTICAST_IND]; 1480 qeth_get_channel_path_desc(card); 1481 return 0; 1482 } 1483 i++; 1484 } 1485 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1486 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1487 "unknown type\n"); 1488 return -ENOENT; 1489 } 1490 1491 static int qeth_clear_channel(struct qeth_channel *channel) 1492 { 1493 unsigned long flags; 1494 struct qeth_card *card; 1495 int rc; 1496 1497 card = CARD_FROM_CDEV(channel->ccwdev); 1498 QETH_CARD_TEXT(card, 3, "clearch"); 1499 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1500 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1501 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1502 1503 if (rc) 1504 return rc; 1505 rc = wait_event_interruptible_timeout(card->wait_q, 1506 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1507 if (rc == -ERESTARTSYS) 1508 return rc; 1509 if (channel->state != CH_STATE_STOPPED) 1510 return -ETIME; 1511 channel->state = CH_STATE_DOWN; 1512 return 0; 1513 } 1514 1515 static int qeth_halt_channel(struct qeth_channel *channel) 1516 { 1517 unsigned long flags; 1518 struct qeth_card *card; 1519 int rc; 1520 1521 card = CARD_FROM_CDEV(channel->ccwdev); 1522 QETH_CARD_TEXT(card, 3, "haltch"); 1523 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1524 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1525 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1526 1527 if (rc) 1528 return rc; 1529 rc = wait_event_interruptible_timeout(card->wait_q, 1530 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1531 if (rc == -ERESTARTSYS) 1532 return rc; 1533 if (channel->state != CH_STATE_HALTED) 1534 return -ETIME; 1535 return 0; 1536 } 1537 1538 static int qeth_halt_channels(struct qeth_card *card) 1539 { 1540 int rc1 = 0, rc2 = 0, rc3 = 0; 1541 1542 QETH_CARD_TEXT(card, 3, "haltchs"); 1543 rc1 = qeth_halt_channel(&card->read); 1544 rc2 = qeth_halt_channel(&card->write); 1545 rc3 = qeth_halt_channel(&card->data); 1546 if (rc1) 1547 return rc1; 1548 if (rc2) 1549 return rc2; 1550 return rc3; 1551 } 1552 1553 static int qeth_clear_channels(struct qeth_card *card) 1554 { 1555 int rc1 = 0, rc2 = 0, rc3 = 0; 1556 1557 QETH_CARD_TEXT(card, 3, "clearchs"); 1558 rc1 = qeth_clear_channel(&card->read); 1559 rc2 = qeth_clear_channel(&card->write); 1560 rc3 = qeth_clear_channel(&card->data); 1561 if (rc1) 1562 return rc1; 1563 if (rc2) 1564 return rc2; 1565 return rc3; 1566 } 1567 1568 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1569 { 1570 int rc = 0; 1571 1572 QETH_CARD_TEXT(card, 3, "clhacrd"); 1573 1574 if (halt) 1575 rc = qeth_halt_channels(card); 1576 if (rc) 1577 return rc; 1578 return qeth_clear_channels(card); 1579 } 1580 1581 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1582 { 1583 int rc = 0; 1584 1585 QETH_CARD_TEXT(card, 3, "qdioclr"); 1586 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1587 QETH_QDIO_CLEANING)) { 1588 case QETH_QDIO_ESTABLISHED: 1589 if (card->info.type == QETH_CARD_TYPE_IQD) 1590 rc = qdio_shutdown(CARD_DDEV(card), 1591 QDIO_FLAG_CLEANUP_USING_HALT); 1592 else 1593 rc = qdio_shutdown(CARD_DDEV(card), 1594 QDIO_FLAG_CLEANUP_USING_CLEAR); 1595 if (rc) 1596 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1597 qdio_free(CARD_DDEV(card)); 1598 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1599 break; 1600 case QETH_QDIO_CLEANING: 1601 return rc; 1602 default: 1603 break; 1604 } 1605 rc = qeth_clear_halt_card(card, use_halt); 1606 if (rc) 1607 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1608 card->state = CARD_STATE_DOWN; 1609 return rc; 1610 } 1611 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1612 1613 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1614 int *length) 1615 { 1616 struct ciw *ciw; 1617 char *rcd_buf; 1618 int ret; 1619 struct qeth_channel *channel = &card->data; 1620 unsigned long flags; 1621 1622 /* 1623 * scan for RCD command in extended SenseID data 1624 */ 1625 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1626 if (!ciw || ciw->cmd == 0) 1627 return -EOPNOTSUPP; 1628 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1629 if (!rcd_buf) 1630 return -ENOMEM; 1631 1632 channel->ccw.cmd_code = ciw->cmd; 1633 channel->ccw.cda = (__u32) __pa(rcd_buf); 1634 channel->ccw.count = ciw->count; 1635 channel->ccw.flags = CCW_FLAG_SLI; 1636 channel->state = CH_STATE_RCD; 1637 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1638 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1639 QETH_RCD_PARM, LPM_ANYPATH, 0, 1640 QETH_RCD_TIMEOUT); 1641 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1642 if (!ret) 1643 wait_event(card->wait_q, 1644 (channel->state == CH_STATE_RCD_DONE || 1645 channel->state == CH_STATE_DOWN)); 1646 if (channel->state == CH_STATE_DOWN) 1647 ret = -EIO; 1648 else 1649 channel->state = CH_STATE_DOWN; 1650 if (ret) { 1651 kfree(rcd_buf); 1652 *buffer = NULL; 1653 *length = 0; 1654 } else { 1655 *length = ciw->count; 1656 *buffer = rcd_buf; 1657 } 1658 return ret; 1659 } 1660 1661 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1662 { 1663 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1664 card->info.chpid = prcd[30]; 1665 card->info.unit_addr2 = prcd[31]; 1666 card->info.cula = prcd[63]; 1667 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1668 (prcd[0x11] == _ascebc['M'])); 1669 } 1670 1671 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1672 { 1673 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1674 1675 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && 1676 (prcd[76] == 0xF5 || prcd[76] == 0xF6)) { 1677 card->info.blkt.time_total = 250; 1678 card->info.blkt.inter_packet = 5; 1679 card->info.blkt.inter_packet_jumbo = 15; 1680 } else { 1681 card->info.blkt.time_total = 0; 1682 card->info.blkt.inter_packet = 0; 1683 card->info.blkt.inter_packet_jumbo = 0; 1684 } 1685 } 1686 1687 static void qeth_init_tokens(struct qeth_card *card) 1688 { 1689 card->token.issuer_rm_w = 0x00010103UL; 1690 card->token.cm_filter_w = 0x00010108UL; 1691 card->token.cm_connection_w = 0x0001010aUL; 1692 card->token.ulp_filter_w = 0x0001010bUL; 1693 card->token.ulp_connection_w = 0x0001010dUL; 1694 } 1695 1696 static void qeth_init_func_level(struct qeth_card *card) 1697 { 1698 switch (card->info.type) { 1699 case QETH_CARD_TYPE_IQD: 1700 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1701 break; 1702 case QETH_CARD_TYPE_OSD: 1703 case QETH_CARD_TYPE_OSN: 1704 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1705 break; 1706 default: 1707 break; 1708 } 1709 } 1710 1711 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1712 void (*idx_reply_cb)(struct qeth_channel *, 1713 struct qeth_cmd_buffer *)) 1714 { 1715 struct qeth_cmd_buffer *iob; 1716 unsigned long flags; 1717 int rc; 1718 struct qeth_card *card; 1719 1720 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1721 card = CARD_FROM_CDEV(channel->ccwdev); 1722 iob = qeth_get_buffer(channel); 1723 iob->callback = idx_reply_cb; 1724 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1725 channel->ccw.count = QETH_BUFSIZE; 1726 channel->ccw.cda = (__u32) __pa(iob->data); 1727 1728 wait_event(card->wait_q, 1729 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1730 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1731 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1732 rc = ccw_device_start(channel->ccwdev, 1733 &channel->ccw, (addr_t) iob, 0, 0); 1734 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1735 1736 if (rc) { 1737 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1738 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1739 atomic_set(&channel->irq_pending, 0); 1740 wake_up(&card->wait_q); 1741 return rc; 1742 } 1743 rc = wait_event_interruptible_timeout(card->wait_q, 1744 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1745 if (rc == -ERESTARTSYS) 1746 return rc; 1747 if (channel->state != CH_STATE_UP) { 1748 rc = -ETIME; 1749 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1750 qeth_clear_cmd_buffers(channel); 1751 } else 1752 rc = 0; 1753 return rc; 1754 } 1755 1756 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1757 void (*idx_reply_cb)(struct qeth_channel *, 1758 struct qeth_cmd_buffer *)) 1759 { 1760 struct qeth_card *card; 1761 struct qeth_cmd_buffer *iob; 1762 unsigned long flags; 1763 __u16 temp; 1764 __u8 tmp; 1765 int rc; 1766 struct ccw_dev_id temp_devid; 1767 1768 card = CARD_FROM_CDEV(channel->ccwdev); 1769 1770 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1771 1772 iob = qeth_get_buffer(channel); 1773 iob->callback = idx_reply_cb; 1774 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1775 channel->ccw.count = IDX_ACTIVATE_SIZE; 1776 channel->ccw.cda = (__u32) __pa(iob->data); 1777 if (channel == &card->write) { 1778 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1779 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1780 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1781 card->seqno.trans_hdr++; 1782 } else { 1783 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1784 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1785 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1786 } 1787 tmp = ((__u8)card->info.portno) | 0x80; 1788 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1789 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1790 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1791 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1792 &card->info.func_level, sizeof(__u16)); 1793 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1794 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1795 temp = (card->info.cula << 8) + card->info.unit_addr2; 1796 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1797 1798 wait_event(card->wait_q, 1799 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1800 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1801 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1802 rc = ccw_device_start(channel->ccwdev, 1803 &channel->ccw, (addr_t) iob, 0, 0); 1804 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1805 1806 if (rc) { 1807 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1808 rc); 1809 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1810 atomic_set(&channel->irq_pending, 0); 1811 wake_up(&card->wait_q); 1812 return rc; 1813 } 1814 rc = wait_event_interruptible_timeout(card->wait_q, 1815 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1816 if (rc == -ERESTARTSYS) 1817 return rc; 1818 if (channel->state != CH_STATE_ACTIVATING) { 1819 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1820 " failed to recover an error on the device\n"); 1821 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1822 dev_name(&channel->ccwdev->dev)); 1823 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1824 qeth_clear_cmd_buffers(channel); 1825 return -ETIME; 1826 } 1827 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1828 } 1829 1830 static int qeth_peer_func_level(int level) 1831 { 1832 if ((level & 0xff) == 8) 1833 return (level & 0xff) + 0x400; 1834 if (((level >> 8) & 3) == 1) 1835 return (level & 0xff) + 0x200; 1836 return level; 1837 } 1838 1839 static void qeth_idx_write_cb(struct qeth_channel *channel, 1840 struct qeth_cmd_buffer *iob) 1841 { 1842 struct qeth_card *card; 1843 __u16 temp; 1844 1845 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1846 1847 if (channel->state == CH_STATE_DOWN) { 1848 channel->state = CH_STATE_ACTIVATING; 1849 goto out; 1850 } 1851 card = CARD_FROM_CDEV(channel->ccwdev); 1852 1853 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1854 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1855 dev_err(&card->write.ccwdev->dev, 1856 "The adapter is used exclusively by another " 1857 "host\n"); 1858 else 1859 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1860 " negative reply\n", 1861 dev_name(&card->write.ccwdev->dev)); 1862 goto out; 1863 } 1864 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1865 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1866 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1867 "function level mismatch (sent: 0x%x, received: " 1868 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1869 card->info.func_level, temp); 1870 goto out; 1871 } 1872 channel->state = CH_STATE_UP; 1873 out: 1874 qeth_release_buffer(channel, iob); 1875 } 1876 1877 static void qeth_idx_read_cb(struct qeth_channel *channel, 1878 struct qeth_cmd_buffer *iob) 1879 { 1880 struct qeth_card *card; 1881 __u16 temp; 1882 1883 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1884 if (channel->state == CH_STATE_DOWN) { 1885 channel->state = CH_STATE_ACTIVATING; 1886 goto out; 1887 } 1888 1889 card = CARD_FROM_CDEV(channel->ccwdev); 1890 if (qeth_check_idx_response(card, iob->data)) 1891 goto out; 1892 1893 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1894 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1895 case QETH_IDX_ACT_ERR_EXCL: 1896 dev_err(&card->write.ccwdev->dev, 1897 "The adapter is used exclusively by another " 1898 "host\n"); 1899 break; 1900 case QETH_IDX_ACT_ERR_AUTH: 1901 case QETH_IDX_ACT_ERR_AUTH_USER: 1902 dev_err(&card->read.ccwdev->dev, 1903 "Setting the device online failed because of " 1904 "insufficient authorization\n"); 1905 break; 1906 default: 1907 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1908 " negative reply\n", 1909 dev_name(&card->read.ccwdev->dev)); 1910 } 1911 QETH_CARD_TEXT_(card, 2, "idxread%c", 1912 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1913 goto out; 1914 } 1915 1916 /** 1917 * * temporary fix for microcode bug 1918 * * to revert it,replace OR by AND 1919 * */ 1920 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1921 (card->info.type == QETH_CARD_TYPE_OSD)) 1922 card->info.portname_required = 1; 1923 1924 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1925 if (temp != qeth_peer_func_level(card->info.func_level)) { 1926 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1927 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1928 dev_name(&card->read.ccwdev->dev), 1929 card->info.func_level, temp); 1930 goto out; 1931 } 1932 memcpy(&card->token.issuer_rm_r, 1933 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1934 QETH_MPC_TOKEN_LENGTH); 1935 memcpy(&card->info.mcl_level[0], 1936 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1937 channel->state = CH_STATE_UP; 1938 out: 1939 qeth_release_buffer(channel, iob); 1940 } 1941 1942 void qeth_prepare_control_data(struct qeth_card *card, int len, 1943 struct qeth_cmd_buffer *iob) 1944 { 1945 qeth_setup_ccw(&card->write, iob->data, len); 1946 iob->callback = qeth_release_buffer; 1947 1948 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1949 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1950 card->seqno.trans_hdr++; 1951 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1952 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1953 card->seqno.pdu_hdr++; 1954 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1955 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1956 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1957 } 1958 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1959 1960 int qeth_send_control_data(struct qeth_card *card, int len, 1961 struct qeth_cmd_buffer *iob, 1962 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1963 unsigned long), 1964 void *reply_param) 1965 { 1966 int rc; 1967 unsigned long flags; 1968 struct qeth_reply *reply = NULL; 1969 unsigned long timeout, event_timeout; 1970 struct qeth_ipa_cmd *cmd; 1971 1972 QETH_CARD_TEXT(card, 2, "sendctl"); 1973 1974 if (card->read_or_write_problem) { 1975 qeth_release_buffer(iob->channel, iob); 1976 return -EIO; 1977 } 1978 reply = qeth_alloc_reply(card); 1979 if (!reply) { 1980 return -ENOMEM; 1981 } 1982 reply->callback = reply_cb; 1983 reply->param = reply_param; 1984 if (card->state == CARD_STATE_DOWN) 1985 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1986 else 1987 reply->seqno = card->seqno.ipa++; 1988 init_waitqueue_head(&reply->wait_q); 1989 spin_lock_irqsave(&card->lock, flags); 1990 list_add_tail(&reply->list, &card->cmd_waiter_list); 1991 spin_unlock_irqrestore(&card->lock, flags); 1992 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1993 1994 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1995 qeth_prepare_control_data(card, len, iob); 1996 1997 if (IS_IPA(iob->data)) 1998 event_timeout = QETH_IPA_TIMEOUT; 1999 else 2000 event_timeout = QETH_TIMEOUT; 2001 timeout = jiffies + event_timeout; 2002 2003 QETH_CARD_TEXT(card, 6, "noirqpnd"); 2004 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 2005 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 2006 (addr_t) iob, 0, 0); 2007 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 2008 if (rc) { 2009 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 2010 "ccw_device_start rc = %i\n", 2011 dev_name(&card->write.ccwdev->dev), rc); 2012 QETH_CARD_TEXT_(card, 2, " err%d", rc); 2013 spin_lock_irqsave(&card->lock, flags); 2014 list_del_init(&reply->list); 2015 qeth_put_reply(reply); 2016 spin_unlock_irqrestore(&card->lock, flags); 2017 qeth_release_buffer(iob->channel, iob); 2018 atomic_set(&card->write.irq_pending, 0); 2019 wake_up(&card->wait_q); 2020 return rc; 2021 } 2022 2023 /* we have only one long running ipassist, since we can ensure 2024 process context of this command we can sleep */ 2025 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2026 if ((cmd->hdr.command == IPA_CMD_SETIP) && 2027 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 2028 if (!wait_event_timeout(reply->wait_q, 2029 atomic_read(&reply->received), event_timeout)) 2030 goto time_err; 2031 } else { 2032 while (!atomic_read(&reply->received)) { 2033 if (time_after(jiffies, timeout)) 2034 goto time_err; 2035 cpu_relax(); 2036 }; 2037 } 2038 2039 if (reply->rc == -EIO) 2040 goto error; 2041 rc = reply->rc; 2042 qeth_put_reply(reply); 2043 return rc; 2044 2045 time_err: 2046 reply->rc = -ETIME; 2047 spin_lock_irqsave(&reply->card->lock, flags); 2048 list_del_init(&reply->list); 2049 spin_unlock_irqrestore(&reply->card->lock, flags); 2050 atomic_inc(&reply->received); 2051 error: 2052 atomic_set(&card->write.irq_pending, 0); 2053 qeth_release_buffer(iob->channel, iob); 2054 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 2055 rc = reply->rc; 2056 qeth_put_reply(reply); 2057 return rc; 2058 } 2059 EXPORT_SYMBOL_GPL(qeth_send_control_data); 2060 2061 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2062 unsigned long data) 2063 { 2064 struct qeth_cmd_buffer *iob; 2065 2066 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 2067 2068 iob = (struct qeth_cmd_buffer *) data; 2069 memcpy(&card->token.cm_filter_r, 2070 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 2071 QETH_MPC_TOKEN_LENGTH); 2072 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2073 return 0; 2074 } 2075 2076 static int qeth_cm_enable(struct qeth_card *card) 2077 { 2078 int rc; 2079 struct qeth_cmd_buffer *iob; 2080 2081 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 2082 2083 iob = qeth_wait_for_buffer(&card->write); 2084 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 2085 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 2086 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2087 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 2088 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 2089 2090 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 2091 qeth_cm_enable_cb, NULL); 2092 return rc; 2093 } 2094 2095 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2096 unsigned long data) 2097 { 2098 2099 struct qeth_cmd_buffer *iob; 2100 2101 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 2102 2103 iob = (struct qeth_cmd_buffer *) data; 2104 memcpy(&card->token.cm_connection_r, 2105 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 2106 QETH_MPC_TOKEN_LENGTH); 2107 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2108 return 0; 2109 } 2110 2111 static int qeth_cm_setup(struct qeth_card *card) 2112 { 2113 int rc; 2114 struct qeth_cmd_buffer *iob; 2115 2116 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 2117 2118 iob = qeth_wait_for_buffer(&card->write); 2119 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 2120 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 2121 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 2122 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 2123 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 2124 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 2125 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 2126 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 2127 qeth_cm_setup_cb, NULL); 2128 return rc; 2129 2130 } 2131 2132 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 2133 { 2134 switch (card->info.type) { 2135 case QETH_CARD_TYPE_UNKNOWN: 2136 return 1500; 2137 case QETH_CARD_TYPE_IQD: 2138 return card->info.max_mtu; 2139 case QETH_CARD_TYPE_OSD: 2140 switch (card->info.link_type) { 2141 case QETH_LINK_TYPE_HSTR: 2142 case QETH_LINK_TYPE_LANE_TR: 2143 return 2000; 2144 default: 2145 return 1492; 2146 } 2147 case QETH_CARD_TYPE_OSM: 2148 case QETH_CARD_TYPE_OSX: 2149 return 1492; 2150 default: 2151 return 1500; 2152 } 2153 } 2154 2155 static inline int qeth_get_mtu_outof_framesize(int framesize) 2156 { 2157 switch (framesize) { 2158 case 0x4000: 2159 return 8192; 2160 case 0x6000: 2161 return 16384; 2162 case 0xa000: 2163 return 32768; 2164 case 0xffff: 2165 return 57344; 2166 default: 2167 return 0; 2168 } 2169 } 2170 2171 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 2172 { 2173 switch (card->info.type) { 2174 case QETH_CARD_TYPE_OSD: 2175 case QETH_CARD_TYPE_OSM: 2176 case QETH_CARD_TYPE_OSX: 2177 case QETH_CARD_TYPE_IQD: 2178 return ((mtu >= 576) && 2179 (mtu <= card->info.max_mtu)); 2180 case QETH_CARD_TYPE_OSN: 2181 case QETH_CARD_TYPE_UNKNOWN: 2182 default: 2183 return 1; 2184 } 2185 } 2186 2187 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 2188 unsigned long data) 2189 { 2190 2191 __u16 mtu, framesize; 2192 __u16 len; 2193 __u8 link_type; 2194 struct qeth_cmd_buffer *iob; 2195 2196 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 2197 2198 iob = (struct qeth_cmd_buffer *) data; 2199 memcpy(&card->token.ulp_filter_r, 2200 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 2201 QETH_MPC_TOKEN_LENGTH); 2202 if (card->info.type == QETH_CARD_TYPE_IQD) { 2203 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 2204 mtu = qeth_get_mtu_outof_framesize(framesize); 2205 if (!mtu) { 2206 iob->rc = -EINVAL; 2207 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2208 return 0; 2209 } 2210 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 2211 /* frame size has changed */ 2212 if (card->dev && 2213 ((card->dev->mtu == card->info.initial_mtu) || 2214 (card->dev->mtu > mtu))) 2215 card->dev->mtu = mtu; 2216 qeth_free_qdio_buffers(card); 2217 } 2218 card->info.initial_mtu = mtu; 2219 card->info.max_mtu = mtu; 2220 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 2221 } else { 2222 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 2223 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 2224 iob->data); 2225 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 2226 } 2227 2228 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 2229 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 2230 memcpy(&link_type, 2231 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 2232 card->info.link_type = link_type; 2233 } else 2234 card->info.link_type = 0; 2235 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 2236 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2237 return 0; 2238 } 2239 2240 static int qeth_ulp_enable(struct qeth_card *card) 2241 { 2242 int rc; 2243 char prot_type; 2244 struct qeth_cmd_buffer *iob; 2245 2246 /*FIXME: trace view callbacks*/ 2247 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 2248 2249 iob = qeth_wait_for_buffer(&card->write); 2250 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 2251 2252 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 2253 (__u8) card->info.portno; 2254 if (card->options.layer2) 2255 if (card->info.type == QETH_CARD_TYPE_OSN) 2256 prot_type = QETH_PROT_OSN2; 2257 else 2258 prot_type = QETH_PROT_LAYER2; 2259 else 2260 prot_type = QETH_PROT_TCPIP; 2261 2262 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 2263 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 2264 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2265 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 2266 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 2267 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 2268 card->info.portname, 9); 2269 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 2270 qeth_ulp_enable_cb, NULL); 2271 return rc; 2272 2273 } 2274 2275 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 2276 unsigned long data) 2277 { 2278 struct qeth_cmd_buffer *iob; 2279 int rc = 0; 2280 2281 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 2282 2283 iob = (struct qeth_cmd_buffer *) data; 2284 memcpy(&card->token.ulp_connection_r, 2285 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2286 QETH_MPC_TOKEN_LENGTH); 2287 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 2288 3)) { 2289 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 2290 dev_err(&card->gdev->dev, "A connection could not be " 2291 "established because of an OLM limit\n"); 2292 iob->rc = -EMLINK; 2293 } 2294 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 2295 return rc; 2296 } 2297 2298 static int qeth_ulp_setup(struct qeth_card *card) 2299 { 2300 int rc; 2301 __u16 temp; 2302 struct qeth_cmd_buffer *iob; 2303 struct ccw_dev_id dev_id; 2304 2305 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2306 2307 iob = qeth_wait_for_buffer(&card->write); 2308 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2309 2310 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2311 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2312 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2313 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2314 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2315 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2316 2317 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2318 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2319 temp = (card->info.cula << 8) + card->info.unit_addr2; 2320 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2321 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2322 qeth_ulp_setup_cb, NULL); 2323 return rc; 2324 } 2325 2326 static int qeth_init_qdio_out_buf(struct qeth_qdio_out_q *q, int bidx) 2327 { 2328 int rc; 2329 struct qeth_qdio_out_buffer *newbuf; 2330 2331 rc = 0; 2332 newbuf = kmem_cache_zalloc(qeth_qdio_outbuf_cache, GFP_ATOMIC); 2333 if (!newbuf) { 2334 rc = -ENOMEM; 2335 goto out; 2336 } 2337 newbuf->buffer = &q->qdio_bufs[bidx]; 2338 skb_queue_head_init(&newbuf->skb_list); 2339 lockdep_set_class(&newbuf->skb_list.lock, &qdio_out_skb_queue_key); 2340 newbuf->q = q; 2341 newbuf->aob = NULL; 2342 newbuf->next_pending = q->bufs[bidx]; 2343 atomic_set(&newbuf->state, QETH_QDIO_BUF_EMPTY); 2344 q->bufs[bidx] = newbuf; 2345 if (q->bufstates) { 2346 q->bufstates[bidx].user = newbuf; 2347 QETH_CARD_TEXT_(q->card, 2, "nbs%d", bidx); 2348 QETH_CARD_TEXT_(q->card, 2, "%lx", (long) newbuf); 2349 QETH_CARD_TEXT_(q->card, 2, "%lx", 2350 (long) newbuf->next_pending); 2351 } 2352 out: 2353 return rc; 2354 } 2355 2356 2357 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2358 { 2359 int i, j; 2360 2361 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2362 2363 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2364 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2365 return 0; 2366 2367 card->qdio.in_q = kzalloc(sizeof(struct qeth_qdio_q), 2368 GFP_KERNEL); 2369 if (!card->qdio.in_q) 2370 goto out_nomem; 2371 QETH_DBF_TEXT(SETUP, 2, "inq"); 2372 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2373 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2374 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2375 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 2376 card->qdio.in_q->bufs[i].buffer = 2377 &card->qdio.in_q->qdio_bufs[i]; 2378 card->qdio.in_q->bufs[i].rx_skb = NULL; 2379 } 2380 /* inbound buffer pool */ 2381 if (qeth_alloc_buffer_pool(card)) 2382 goto out_freeinq; 2383 2384 /* outbound */ 2385 card->qdio.out_qs = 2386 kzalloc(card->qdio.no_out_queues * 2387 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2388 if (!card->qdio.out_qs) 2389 goto out_freepool; 2390 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2391 card->qdio.out_qs[i] = kzalloc(sizeof(struct qeth_qdio_out_q), 2392 GFP_KERNEL); 2393 if (!card->qdio.out_qs[i]) 2394 goto out_freeoutq; 2395 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2396 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2397 card->qdio.out_qs[i]->queue_no = i; 2398 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2399 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2400 BUG_ON(card->qdio.out_qs[i]->bufs[j] != NULL); 2401 if (qeth_init_qdio_out_buf(card->qdio.out_qs[i], j)) 2402 goto out_freeoutqbufs; 2403 } 2404 } 2405 2406 /* completion */ 2407 if (qeth_alloc_cq(card)) 2408 goto out_freeoutq; 2409 2410 return 0; 2411 2412 out_freeoutqbufs: 2413 while (j > 0) { 2414 --j; 2415 kmem_cache_free(qeth_qdio_outbuf_cache, 2416 card->qdio.out_qs[i]->bufs[j]); 2417 card->qdio.out_qs[i]->bufs[j] = NULL; 2418 } 2419 out_freeoutq: 2420 while (i > 0) { 2421 kfree(card->qdio.out_qs[--i]); 2422 qeth_clear_outq_buffers(card->qdio.out_qs[i], 1); 2423 } 2424 kfree(card->qdio.out_qs); 2425 card->qdio.out_qs = NULL; 2426 out_freepool: 2427 qeth_free_buffer_pool(card); 2428 out_freeinq: 2429 kfree(card->qdio.in_q); 2430 card->qdio.in_q = NULL; 2431 out_nomem: 2432 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2433 return -ENOMEM; 2434 } 2435 2436 static void qeth_create_qib_param_field(struct qeth_card *card, 2437 char *param_field) 2438 { 2439 2440 param_field[0] = _ascebc['P']; 2441 param_field[1] = _ascebc['C']; 2442 param_field[2] = _ascebc['I']; 2443 param_field[3] = _ascebc['T']; 2444 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2445 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2446 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2447 } 2448 2449 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2450 char *param_field) 2451 { 2452 param_field[16] = _ascebc['B']; 2453 param_field[17] = _ascebc['L']; 2454 param_field[18] = _ascebc['K']; 2455 param_field[19] = _ascebc['T']; 2456 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2457 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2458 *((unsigned int *) (¶m_field[28])) = 2459 card->info.blkt.inter_packet_jumbo; 2460 } 2461 2462 static int qeth_qdio_activate(struct qeth_card *card) 2463 { 2464 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2465 return qdio_activate(CARD_DDEV(card)); 2466 } 2467 2468 static int qeth_dm_act(struct qeth_card *card) 2469 { 2470 int rc; 2471 struct qeth_cmd_buffer *iob; 2472 2473 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2474 2475 iob = qeth_wait_for_buffer(&card->write); 2476 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2477 2478 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2479 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2480 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2481 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2482 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2483 return rc; 2484 } 2485 2486 static int qeth_mpc_initialize(struct qeth_card *card) 2487 { 2488 int rc; 2489 2490 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2491 2492 rc = qeth_issue_next_read(card); 2493 if (rc) { 2494 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2495 return rc; 2496 } 2497 rc = qeth_cm_enable(card); 2498 if (rc) { 2499 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2500 goto out_qdio; 2501 } 2502 rc = qeth_cm_setup(card); 2503 if (rc) { 2504 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2505 goto out_qdio; 2506 } 2507 rc = qeth_ulp_enable(card); 2508 if (rc) { 2509 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2510 goto out_qdio; 2511 } 2512 rc = qeth_ulp_setup(card); 2513 if (rc) { 2514 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2515 goto out_qdio; 2516 } 2517 rc = qeth_alloc_qdio_buffers(card); 2518 if (rc) { 2519 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2520 goto out_qdio; 2521 } 2522 rc = qeth_qdio_establish(card); 2523 if (rc) { 2524 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2525 qeth_free_qdio_buffers(card); 2526 goto out_qdio; 2527 } 2528 rc = qeth_qdio_activate(card); 2529 if (rc) { 2530 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2531 goto out_qdio; 2532 } 2533 rc = qeth_dm_act(card); 2534 if (rc) { 2535 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2536 goto out_qdio; 2537 } 2538 2539 return 0; 2540 out_qdio: 2541 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2542 return rc; 2543 } 2544 2545 static void qeth_print_status_with_portname(struct qeth_card *card) 2546 { 2547 char dbf_text[15]; 2548 int i; 2549 2550 sprintf(dbf_text, "%s", card->info.portname + 1); 2551 for (i = 0; i < 8; i++) 2552 dbf_text[i] = 2553 (char) _ebcasc[(__u8) dbf_text[i]]; 2554 dbf_text[8] = 0; 2555 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2556 "with link type %s (portname: %s)\n", 2557 qeth_get_cardname(card), 2558 (card->info.mcl_level[0]) ? " (level: " : "", 2559 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2560 (card->info.mcl_level[0]) ? ")" : "", 2561 qeth_get_cardname_short(card), 2562 dbf_text); 2563 2564 } 2565 2566 static void qeth_print_status_no_portname(struct qeth_card *card) 2567 { 2568 if (card->info.portname[0]) 2569 dev_info(&card->gdev->dev, "Device is a%s " 2570 "card%s%s%s\nwith link type %s " 2571 "(no portname needed by interface).\n", 2572 qeth_get_cardname(card), 2573 (card->info.mcl_level[0]) ? " (level: " : "", 2574 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2575 (card->info.mcl_level[0]) ? ")" : "", 2576 qeth_get_cardname_short(card)); 2577 else 2578 dev_info(&card->gdev->dev, "Device is a%s " 2579 "card%s%s%s\nwith link type %s.\n", 2580 qeth_get_cardname(card), 2581 (card->info.mcl_level[0]) ? " (level: " : "", 2582 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2583 (card->info.mcl_level[0]) ? ")" : "", 2584 qeth_get_cardname_short(card)); 2585 } 2586 2587 void qeth_print_status_message(struct qeth_card *card) 2588 { 2589 switch (card->info.type) { 2590 case QETH_CARD_TYPE_OSD: 2591 case QETH_CARD_TYPE_OSM: 2592 case QETH_CARD_TYPE_OSX: 2593 /* VM will use a non-zero first character 2594 * to indicate a HiperSockets like reporting 2595 * of the level OSA sets the first character to zero 2596 * */ 2597 if (!card->info.mcl_level[0]) { 2598 sprintf(card->info.mcl_level, "%02x%02x", 2599 card->info.mcl_level[2], 2600 card->info.mcl_level[3]); 2601 2602 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2603 break; 2604 } 2605 /* fallthrough */ 2606 case QETH_CARD_TYPE_IQD: 2607 if ((card->info.guestlan) || 2608 (card->info.mcl_level[0] & 0x80)) { 2609 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2610 card->info.mcl_level[0]]; 2611 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2612 card->info.mcl_level[1]]; 2613 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2614 card->info.mcl_level[2]]; 2615 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2616 card->info.mcl_level[3]]; 2617 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2618 } 2619 break; 2620 default: 2621 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2622 } 2623 if (card->info.portname_required) 2624 qeth_print_status_with_portname(card); 2625 else 2626 qeth_print_status_no_portname(card); 2627 } 2628 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2629 2630 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2631 { 2632 struct qeth_buffer_pool_entry *entry; 2633 2634 QETH_CARD_TEXT(card, 5, "inwrklst"); 2635 2636 list_for_each_entry(entry, 2637 &card->qdio.init_pool.entry_list, init_list) { 2638 qeth_put_buffer_pool_entry(card, entry); 2639 } 2640 } 2641 2642 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2643 struct qeth_card *card) 2644 { 2645 struct list_head *plh; 2646 struct qeth_buffer_pool_entry *entry; 2647 int i, free; 2648 struct page *page; 2649 2650 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2651 return NULL; 2652 2653 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2654 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2655 free = 1; 2656 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2657 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2658 free = 0; 2659 break; 2660 } 2661 } 2662 if (free) { 2663 list_del_init(&entry->list); 2664 return entry; 2665 } 2666 } 2667 2668 /* no free buffer in pool so take first one and swap pages */ 2669 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2670 struct qeth_buffer_pool_entry, list); 2671 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2672 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2673 page = alloc_page(GFP_ATOMIC); 2674 if (!page) { 2675 return NULL; 2676 } else { 2677 free_page((unsigned long)entry->elements[i]); 2678 entry->elements[i] = page_address(page); 2679 if (card->options.performance_stats) 2680 card->perf_stats.sg_alloc_page_rx++; 2681 } 2682 } 2683 } 2684 list_del_init(&entry->list); 2685 return entry; 2686 } 2687 2688 static int qeth_init_input_buffer(struct qeth_card *card, 2689 struct qeth_qdio_buffer *buf) 2690 { 2691 struct qeth_buffer_pool_entry *pool_entry; 2692 int i; 2693 2694 if ((card->options.cq == QETH_CQ_ENABLED) && (!buf->rx_skb)) { 2695 buf->rx_skb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 2696 if (!buf->rx_skb) 2697 return 1; 2698 } 2699 2700 pool_entry = qeth_find_free_buffer_pool_entry(card); 2701 if (!pool_entry) 2702 return 1; 2703 2704 /* 2705 * since the buffer is accessed only from the input_tasklet 2706 * there shouldn't be a need to synchronize; also, since we use 2707 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2708 * buffers 2709 */ 2710 2711 buf->pool_entry = pool_entry; 2712 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2713 buf->buffer->element[i].length = PAGE_SIZE; 2714 buf->buffer->element[i].addr = pool_entry->elements[i]; 2715 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2716 buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; 2717 else 2718 buf->buffer->element[i].eflags = 0; 2719 buf->buffer->element[i].sflags = 0; 2720 } 2721 return 0; 2722 } 2723 2724 int qeth_init_qdio_queues(struct qeth_card *card) 2725 { 2726 int i, j; 2727 int rc; 2728 2729 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2730 2731 /* inbound queue */ 2732 memset(card->qdio.in_q->qdio_bufs, 0, 2733 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2734 qeth_initialize_working_pool_list(card); 2735 /*give only as many buffers to hardware as we have buffer pool entries*/ 2736 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2737 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2738 card->qdio.in_q->next_buf_to_init = 2739 card->qdio.in_buf_pool.buf_count - 1; 2740 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2741 card->qdio.in_buf_pool.buf_count - 1); 2742 if (rc) { 2743 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2744 return rc; 2745 } 2746 2747 /* completion */ 2748 rc = qeth_cq_init(card); 2749 if (rc) { 2750 return rc; 2751 } 2752 2753 /* outbound queue */ 2754 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2755 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2756 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2757 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2758 qeth_clear_output_buffer(card->qdio.out_qs[i], 2759 card->qdio.out_qs[i]->bufs[j], 2760 QETH_QDIO_BUF_EMPTY); 2761 } 2762 card->qdio.out_qs[i]->card = card; 2763 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2764 card->qdio.out_qs[i]->do_pack = 0; 2765 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2766 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2767 atomic_set(&card->qdio.out_qs[i]->state, 2768 QETH_OUT_Q_UNLOCKED); 2769 } 2770 return 0; 2771 } 2772 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2773 2774 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2775 { 2776 switch (link_type) { 2777 case QETH_LINK_TYPE_HSTR: 2778 return 2; 2779 default: 2780 return 1; 2781 } 2782 } 2783 2784 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2785 struct qeth_ipa_cmd *cmd, __u8 command, 2786 enum qeth_prot_versions prot) 2787 { 2788 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2789 cmd->hdr.command = command; 2790 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2791 cmd->hdr.seqno = card->seqno.ipa; 2792 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2793 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2794 if (card->options.layer2) 2795 cmd->hdr.prim_version_no = 2; 2796 else 2797 cmd->hdr.prim_version_no = 1; 2798 cmd->hdr.param_count = 1; 2799 cmd->hdr.prot_version = prot; 2800 cmd->hdr.ipa_supported = 0; 2801 cmd->hdr.ipa_enabled = 0; 2802 } 2803 2804 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2805 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2806 { 2807 struct qeth_cmd_buffer *iob; 2808 struct qeth_ipa_cmd *cmd; 2809 2810 iob = qeth_wait_for_buffer(&card->write); 2811 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2812 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2813 2814 return iob; 2815 } 2816 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2817 2818 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2819 char prot_type) 2820 { 2821 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2822 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2823 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2824 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2825 } 2826 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2827 2828 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2829 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2830 unsigned long), 2831 void *reply_param) 2832 { 2833 int rc; 2834 char prot_type; 2835 2836 QETH_CARD_TEXT(card, 4, "sendipa"); 2837 2838 if (card->options.layer2) 2839 if (card->info.type == QETH_CARD_TYPE_OSN) 2840 prot_type = QETH_PROT_OSN2; 2841 else 2842 prot_type = QETH_PROT_LAYER2; 2843 else 2844 prot_type = QETH_PROT_TCPIP; 2845 qeth_prepare_ipa_cmd(card, iob, prot_type); 2846 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2847 iob, reply_cb, reply_param); 2848 if (rc == -ETIME) { 2849 qeth_clear_ipacmd_list(card); 2850 qeth_schedule_recovery(card); 2851 } 2852 return rc; 2853 } 2854 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2855 2856 int qeth_send_startlan(struct qeth_card *card) 2857 { 2858 int rc; 2859 struct qeth_cmd_buffer *iob; 2860 2861 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2862 2863 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2864 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2865 return rc; 2866 } 2867 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2868 2869 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2870 struct qeth_reply *reply, unsigned long data) 2871 { 2872 struct qeth_ipa_cmd *cmd; 2873 2874 QETH_CARD_TEXT(card, 4, "defadpcb"); 2875 2876 cmd = (struct qeth_ipa_cmd *) data; 2877 if (cmd->hdr.return_code == 0) 2878 cmd->hdr.return_code = 2879 cmd->data.setadapterparms.hdr.return_code; 2880 return 0; 2881 } 2882 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2883 2884 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2885 struct qeth_reply *reply, unsigned long data) 2886 { 2887 struct qeth_ipa_cmd *cmd; 2888 2889 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2890 2891 cmd = (struct qeth_ipa_cmd *) data; 2892 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2893 card->info.link_type = 2894 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2895 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2896 } 2897 card->options.adp.supported_funcs = 2898 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2899 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2900 } 2901 2902 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2903 __u32 command, __u32 cmdlen) 2904 { 2905 struct qeth_cmd_buffer *iob; 2906 struct qeth_ipa_cmd *cmd; 2907 2908 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2909 QETH_PROT_IPV4); 2910 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2911 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2912 cmd->data.setadapterparms.hdr.command_code = command; 2913 cmd->data.setadapterparms.hdr.used_total = 1; 2914 cmd->data.setadapterparms.hdr.seq_no = 1; 2915 2916 return iob; 2917 } 2918 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2919 2920 int qeth_query_setadapterparms(struct qeth_card *card) 2921 { 2922 int rc; 2923 struct qeth_cmd_buffer *iob; 2924 2925 QETH_CARD_TEXT(card, 3, "queryadp"); 2926 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2927 sizeof(struct qeth_ipacmd_setadpparms)); 2928 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2929 return rc; 2930 } 2931 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2932 2933 static int qeth_query_ipassists_cb(struct qeth_card *card, 2934 struct qeth_reply *reply, unsigned long data) 2935 { 2936 struct qeth_ipa_cmd *cmd; 2937 2938 QETH_DBF_TEXT(SETUP, 2, "qipasscb"); 2939 2940 cmd = (struct qeth_ipa_cmd *) data; 2941 if (cmd->hdr.prot_version == QETH_PROT_IPV4) { 2942 card->options.ipa4.supported_funcs = cmd->hdr.ipa_supported; 2943 card->options.ipa4.enabled_funcs = cmd->hdr.ipa_enabled; 2944 } else { 2945 card->options.ipa6.supported_funcs = cmd->hdr.ipa_supported; 2946 card->options.ipa6.enabled_funcs = cmd->hdr.ipa_enabled; 2947 } 2948 QETH_DBF_TEXT(SETUP, 2, "suppenbl"); 2949 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_supported); 2950 QETH_DBF_TEXT_(SETUP, 2, "%08x", (__u32)cmd->hdr.ipa_enabled); 2951 return 0; 2952 } 2953 2954 int qeth_query_ipassists(struct qeth_card *card, enum qeth_prot_versions prot) 2955 { 2956 int rc; 2957 struct qeth_cmd_buffer *iob; 2958 2959 QETH_DBF_TEXT_(SETUP, 2, "qipassi%i", prot); 2960 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_QIPASSIST, prot); 2961 rc = qeth_send_ipa_cmd(card, iob, qeth_query_ipassists_cb, NULL); 2962 return rc; 2963 } 2964 EXPORT_SYMBOL_GPL(qeth_query_ipassists); 2965 2966 static int qeth_query_setdiagass_cb(struct qeth_card *card, 2967 struct qeth_reply *reply, unsigned long data) 2968 { 2969 struct qeth_ipa_cmd *cmd; 2970 __u16 rc; 2971 2972 cmd = (struct qeth_ipa_cmd *)data; 2973 rc = cmd->hdr.return_code; 2974 if (rc) 2975 QETH_CARD_TEXT_(card, 2, "diagq:%x", rc); 2976 else 2977 card->info.diagass_support = cmd->data.diagass.ext; 2978 return 0; 2979 } 2980 2981 static int qeth_query_setdiagass(struct qeth_card *card) 2982 { 2983 struct qeth_cmd_buffer *iob; 2984 struct qeth_ipa_cmd *cmd; 2985 2986 QETH_DBF_TEXT(SETUP, 2, "qdiagass"); 2987 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 2988 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2989 cmd->data.diagass.subcmd_len = 16; 2990 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_QUERY; 2991 return qeth_send_ipa_cmd(card, iob, qeth_query_setdiagass_cb, NULL); 2992 } 2993 2994 static void qeth_get_trap_id(struct qeth_card *card, struct qeth_trap_id *tid) 2995 { 2996 unsigned long info = get_zeroed_page(GFP_KERNEL); 2997 struct sysinfo_2_2_2 *info222 = (struct sysinfo_2_2_2 *)info; 2998 struct sysinfo_3_2_2 *info322 = (struct sysinfo_3_2_2 *)info; 2999 struct ccw_dev_id ccwid; 3000 int level, rc; 3001 3002 tid->chpid = card->info.chpid; 3003 ccw_device_get_id(CARD_RDEV(card), &ccwid); 3004 tid->ssid = ccwid.ssid; 3005 tid->devno = ccwid.devno; 3006 if (!info) 3007 return; 3008 3009 rc = stsi(NULL, 0, 0, 0); 3010 if (rc == -ENOSYS) 3011 level = rc; 3012 else 3013 level = (((unsigned int) rc) >> 28); 3014 3015 if ((level >= 2) && (stsi(info222, 2, 2, 2) != -ENOSYS)) 3016 tid->lparnr = info222->lpar_number; 3017 3018 if ((level >= 3) && (stsi(info322, 3, 2, 2) != -ENOSYS)) { 3019 EBCASC(info322->vm[0].name, sizeof(info322->vm[0].name)); 3020 memcpy(tid->vmname, info322->vm[0].name, sizeof(tid->vmname)); 3021 } 3022 free_page(info); 3023 return; 3024 } 3025 3026 static int qeth_hw_trap_cb(struct qeth_card *card, 3027 struct qeth_reply *reply, unsigned long data) 3028 { 3029 struct qeth_ipa_cmd *cmd; 3030 __u16 rc; 3031 3032 cmd = (struct qeth_ipa_cmd *)data; 3033 rc = cmd->hdr.return_code; 3034 if (rc) 3035 QETH_CARD_TEXT_(card, 2, "trapc:%x", rc); 3036 return 0; 3037 } 3038 3039 int qeth_hw_trap(struct qeth_card *card, enum qeth_diags_trap_action action) 3040 { 3041 struct qeth_cmd_buffer *iob; 3042 struct qeth_ipa_cmd *cmd; 3043 3044 QETH_DBF_TEXT(SETUP, 2, "diagtrap"); 3045 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SET_DIAG_ASS, 0); 3046 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3047 cmd->data.diagass.subcmd_len = 80; 3048 cmd->data.diagass.subcmd = QETH_DIAGS_CMD_TRAP; 3049 cmd->data.diagass.type = 1; 3050 cmd->data.diagass.action = action; 3051 switch (action) { 3052 case QETH_DIAGS_TRAP_ARM: 3053 cmd->data.diagass.options = 0x0003; 3054 cmd->data.diagass.ext = 0x00010000 + 3055 sizeof(struct qeth_trap_id); 3056 qeth_get_trap_id(card, 3057 (struct qeth_trap_id *)cmd->data.diagass.cdata); 3058 break; 3059 case QETH_DIAGS_TRAP_DISARM: 3060 cmd->data.diagass.options = 0x0001; 3061 break; 3062 case QETH_DIAGS_TRAP_CAPTURE: 3063 break; 3064 } 3065 return qeth_send_ipa_cmd(card, iob, qeth_hw_trap_cb, NULL); 3066 } 3067 EXPORT_SYMBOL_GPL(qeth_hw_trap); 3068 3069 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 3070 unsigned int qdio_error, const char *dbftext) 3071 { 3072 if (qdio_error) { 3073 QETH_CARD_TEXT(card, 2, dbftext); 3074 QETH_CARD_TEXT_(card, 2, " F15=%02X", 3075 buf->element[15].sflags); 3076 QETH_CARD_TEXT_(card, 2, " F14=%02X", 3077 buf->element[14].sflags); 3078 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 3079 if ((buf->element[15].sflags) == 0x12) { 3080 card->stats.rx_dropped++; 3081 return 0; 3082 } else 3083 return 1; 3084 } 3085 return 0; 3086 } 3087 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 3088 3089 void qeth_buffer_reclaim_work(struct work_struct *work) 3090 { 3091 struct qeth_card *card = container_of(work, struct qeth_card, 3092 buffer_reclaim_work.work); 3093 3094 QETH_CARD_TEXT_(card, 2, "brw:%x", card->reclaim_index); 3095 qeth_queue_input_buffer(card, card->reclaim_index); 3096 } 3097 3098 void qeth_queue_input_buffer(struct qeth_card *card, int index) 3099 { 3100 struct qeth_qdio_q *queue = card->qdio.in_q; 3101 struct list_head *lh; 3102 int count; 3103 int i; 3104 int rc; 3105 int newcount = 0; 3106 3107 count = (index < queue->next_buf_to_init)? 3108 card->qdio.in_buf_pool.buf_count - 3109 (queue->next_buf_to_init - index) : 3110 card->qdio.in_buf_pool.buf_count - 3111 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 3112 /* only requeue at a certain threshold to avoid SIGAs */ 3113 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 3114 for (i = queue->next_buf_to_init; 3115 i < queue->next_buf_to_init + count; ++i) { 3116 if (qeth_init_input_buffer(card, 3117 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 3118 break; 3119 } else { 3120 newcount++; 3121 } 3122 } 3123 3124 if (newcount < count) { 3125 /* we are in memory shortage so we switch back to 3126 traditional skb allocation and drop packages */ 3127 atomic_set(&card->force_alloc_skb, 3); 3128 count = newcount; 3129 } else { 3130 atomic_add_unless(&card->force_alloc_skb, -1, 0); 3131 } 3132 3133 if (!count) { 3134 i = 0; 3135 list_for_each(lh, &card->qdio.in_buf_pool.entry_list) 3136 i++; 3137 if (i == card->qdio.in_buf_pool.buf_count) { 3138 QETH_CARD_TEXT(card, 2, "qsarbw"); 3139 card->reclaim_index = index; 3140 schedule_delayed_work( 3141 &card->buffer_reclaim_work, 3142 QETH_RECLAIM_WORK_TIME); 3143 } 3144 return; 3145 } 3146 3147 /* 3148 * according to old code it should be avoided to requeue all 3149 * 128 buffers in order to benefit from PCI avoidance. 3150 * this function keeps at least one buffer (the buffer at 3151 * 'index') un-requeued -> this buffer is the first buffer that 3152 * will be requeued the next time 3153 */ 3154 if (card->options.performance_stats) { 3155 card->perf_stats.inbound_do_qdio_cnt++; 3156 card->perf_stats.inbound_do_qdio_start_time = 3157 qeth_get_micros(); 3158 } 3159 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 3160 queue->next_buf_to_init, count); 3161 if (card->options.performance_stats) 3162 card->perf_stats.inbound_do_qdio_time += 3163 qeth_get_micros() - 3164 card->perf_stats.inbound_do_qdio_start_time; 3165 if (rc) { 3166 QETH_CARD_TEXT(card, 2, "qinberr"); 3167 } 3168 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 3169 QDIO_MAX_BUFFERS_PER_Q; 3170 } 3171 } 3172 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 3173 3174 static int qeth_handle_send_error(struct qeth_card *card, 3175 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 3176 { 3177 int sbalf15 = buffer->buffer->element[15].sflags; 3178 3179 QETH_CARD_TEXT(card, 6, "hdsnderr"); 3180 if (card->info.type == QETH_CARD_TYPE_IQD) { 3181 if (sbalf15 == 0) { 3182 qdio_err = 0; 3183 } else { 3184 qdio_err = 1; 3185 } 3186 } 3187 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 3188 3189 if (!qdio_err) 3190 return QETH_SEND_ERROR_NONE; 3191 3192 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 3193 return QETH_SEND_ERROR_RETRY; 3194 3195 QETH_CARD_TEXT(card, 1, "lnkfail"); 3196 QETH_CARD_TEXT_(card, 1, "%04x %02x", 3197 (u16)qdio_err, (u8)sbalf15); 3198 return QETH_SEND_ERROR_LINK_FAILURE; 3199 } 3200 3201 /* 3202 * Switched to packing state if the number of used buffers on a queue 3203 * reaches a certain limit. 3204 */ 3205 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 3206 { 3207 if (!queue->do_pack) { 3208 if (atomic_read(&queue->used_buffers) 3209 >= QETH_HIGH_WATERMARK_PACK){ 3210 /* switch non-PACKING -> PACKING */ 3211 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 3212 if (queue->card->options.performance_stats) 3213 queue->card->perf_stats.sc_dp_p++; 3214 queue->do_pack = 1; 3215 } 3216 } 3217 } 3218 3219 /* 3220 * Switches from packing to non-packing mode. If there is a packing 3221 * buffer on the queue this buffer will be prepared to be flushed. 3222 * In that case 1 is returned to inform the caller. If no buffer 3223 * has to be flushed, zero is returned. 3224 */ 3225 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 3226 { 3227 struct qeth_qdio_out_buffer *buffer; 3228 int flush_count = 0; 3229 3230 if (queue->do_pack) { 3231 if (atomic_read(&queue->used_buffers) 3232 <= QETH_LOW_WATERMARK_PACK) { 3233 /* switch PACKING -> non-PACKING */ 3234 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 3235 if (queue->card->options.performance_stats) 3236 queue->card->perf_stats.sc_p_dp++; 3237 queue->do_pack = 0; 3238 /* flush packing buffers */ 3239 buffer = queue->bufs[queue->next_buf_to_fill]; 3240 if ((atomic_read(&buffer->state) == 3241 QETH_QDIO_BUF_EMPTY) && 3242 (buffer->next_element_to_fill > 0)) { 3243 atomic_set(&buffer->state, 3244 QETH_QDIO_BUF_PRIMED); 3245 flush_count++; 3246 queue->next_buf_to_fill = 3247 (queue->next_buf_to_fill + 1) % 3248 QDIO_MAX_BUFFERS_PER_Q; 3249 } 3250 } 3251 } 3252 return flush_count; 3253 } 3254 3255 3256 /* 3257 * Called to flush a packing buffer if no more pci flags are on the queue. 3258 * Checks if there is a packing buffer and prepares it to be flushed. 3259 * In that case returns 1, otherwise zero. 3260 */ 3261 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 3262 { 3263 struct qeth_qdio_out_buffer *buffer; 3264 3265 buffer = queue->bufs[queue->next_buf_to_fill]; 3266 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 3267 (buffer->next_element_to_fill > 0)) { 3268 /* it's a packing buffer */ 3269 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3270 queue->next_buf_to_fill = 3271 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 3272 return 1; 3273 } 3274 return 0; 3275 } 3276 3277 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 3278 int count) 3279 { 3280 struct qeth_qdio_out_buffer *buf; 3281 int rc; 3282 int i; 3283 unsigned int qdio_flags; 3284 3285 for (i = index; i < index + count; ++i) { 3286 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3287 buf = queue->bufs[bidx]; 3288 buf->buffer->element[buf->next_element_to_fill - 1].eflags |= 3289 SBAL_EFLAGS_LAST_ENTRY; 3290 3291 if (queue->bufstates) 3292 queue->bufstates[bidx].user = buf; 3293 3294 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 3295 continue; 3296 3297 if (!queue->do_pack) { 3298 if ((atomic_read(&queue->used_buffers) >= 3299 (QETH_HIGH_WATERMARK_PACK - 3300 QETH_WATERMARK_PACK_FUZZ)) && 3301 !atomic_read(&queue->set_pci_flags_count)) { 3302 /* it's likely that we'll go to packing 3303 * mode soon */ 3304 atomic_inc(&queue->set_pci_flags_count); 3305 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3306 } 3307 } else { 3308 if (!atomic_read(&queue->set_pci_flags_count)) { 3309 /* 3310 * there's no outstanding PCI any more, so we 3311 * have to request a PCI to be sure the the PCI 3312 * will wake at some time in the future then we 3313 * can flush packed buffers that might still be 3314 * hanging around, which can happen if no 3315 * further send was requested by the stack 3316 */ 3317 atomic_inc(&queue->set_pci_flags_count); 3318 buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; 3319 } 3320 } 3321 } 3322 3323 queue->card->dev->trans_start = jiffies; 3324 if (queue->card->options.performance_stats) { 3325 queue->card->perf_stats.outbound_do_qdio_cnt++; 3326 queue->card->perf_stats.outbound_do_qdio_start_time = 3327 qeth_get_micros(); 3328 } 3329 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 3330 if (atomic_read(&queue->set_pci_flags_count)) 3331 qdio_flags |= QDIO_FLAG_PCI_OUT; 3332 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 3333 queue->queue_no, index, count); 3334 if (queue->card->options.performance_stats) 3335 queue->card->perf_stats.outbound_do_qdio_time += 3336 qeth_get_micros() - 3337 queue->card->perf_stats.outbound_do_qdio_start_time; 3338 atomic_add(count, &queue->used_buffers); 3339 if (rc) { 3340 queue->card->stats.tx_errors += count; 3341 /* ignore temporary SIGA errors without busy condition */ 3342 if (rc == QDIO_ERROR_SIGA_TARGET) 3343 return; 3344 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 3345 QETH_CARD_TEXT_(queue->card, 2, " q%d", queue->queue_no); 3346 QETH_CARD_TEXT_(queue->card, 2, " idx%d", index); 3347 QETH_CARD_TEXT_(queue->card, 2, " c%d", count); 3348 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 3349 3350 /* this must not happen under normal circumstances. if it 3351 * happens something is really wrong -> recover */ 3352 qeth_schedule_recovery(queue->card); 3353 return; 3354 } 3355 if (queue->card->options.performance_stats) 3356 queue->card->perf_stats.bufs_sent += count; 3357 } 3358 3359 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 3360 { 3361 int index; 3362 int flush_cnt = 0; 3363 int q_was_packing = 0; 3364 3365 /* 3366 * check if weed have to switch to non-packing mode or if 3367 * we have to get a pci flag out on the queue 3368 */ 3369 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 3370 !atomic_read(&queue->set_pci_flags_count)) { 3371 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 3372 QETH_OUT_Q_UNLOCKED) { 3373 /* 3374 * If we get in here, there was no action in 3375 * do_send_packet. So, we check if there is a 3376 * packing buffer to be flushed here. 3377 */ 3378 netif_stop_queue(queue->card->dev); 3379 index = queue->next_buf_to_fill; 3380 q_was_packing = queue->do_pack; 3381 /* queue->do_pack may change */ 3382 barrier(); 3383 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 3384 if (!flush_cnt && 3385 !atomic_read(&queue->set_pci_flags_count)) 3386 flush_cnt += 3387 qeth_flush_buffers_on_no_pci(queue); 3388 if (queue->card->options.performance_stats && 3389 q_was_packing) 3390 queue->card->perf_stats.bufs_sent_pack += 3391 flush_cnt; 3392 if (flush_cnt) 3393 qeth_flush_buffers(queue, index, flush_cnt); 3394 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3395 } 3396 } 3397 } 3398 3399 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 3400 unsigned long card_ptr) 3401 { 3402 struct qeth_card *card = (struct qeth_card *)card_ptr; 3403 3404 if (card->dev && (card->dev->flags & IFF_UP)) 3405 napi_schedule(&card->napi); 3406 } 3407 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 3408 3409 int qeth_configure_cq(struct qeth_card *card, enum qeth_cq cq) 3410 { 3411 int rc; 3412 3413 if (card->options.cq == QETH_CQ_NOTAVAILABLE) { 3414 rc = -1; 3415 goto out; 3416 } else { 3417 if (card->options.cq == cq) { 3418 rc = 0; 3419 goto out; 3420 } 3421 3422 if (card->state != CARD_STATE_DOWN && 3423 card->state != CARD_STATE_RECOVER) { 3424 rc = -1; 3425 goto out; 3426 } 3427 3428 qeth_free_qdio_buffers(card); 3429 card->options.cq = cq; 3430 rc = 0; 3431 } 3432 out: 3433 return rc; 3434 3435 } 3436 EXPORT_SYMBOL_GPL(qeth_configure_cq); 3437 3438 3439 static void qeth_qdio_cq_handler(struct qeth_card *card, 3440 unsigned int qdio_err, 3441 unsigned int queue, int first_element, int count) { 3442 struct qeth_qdio_q *cq = card->qdio.c_q; 3443 int i; 3444 int rc; 3445 3446 if (!qeth_is_cq(card, queue)) 3447 goto out; 3448 3449 QETH_CARD_TEXT_(card, 5, "qcqhe%d", first_element); 3450 QETH_CARD_TEXT_(card, 5, "qcqhc%d", count); 3451 QETH_CARD_TEXT_(card, 5, "qcqherr%d", qdio_err); 3452 3453 if (qdio_err) { 3454 netif_stop_queue(card->dev); 3455 qeth_schedule_recovery(card); 3456 goto out; 3457 } 3458 3459 if (card->options.performance_stats) { 3460 card->perf_stats.cq_cnt++; 3461 card->perf_stats.cq_start_time = qeth_get_micros(); 3462 } 3463 3464 for (i = first_element; i < first_element + count; ++i) { 3465 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3466 struct qdio_buffer *buffer = &cq->qdio_bufs[bidx]; 3467 int e; 3468 3469 e = 0; 3470 while (buffer->element[e].addr) { 3471 unsigned long phys_aob_addr; 3472 3473 phys_aob_addr = (unsigned long) buffer->element[e].addr; 3474 qeth_qdio_handle_aob(card, phys_aob_addr); 3475 buffer->element[e].addr = NULL; 3476 buffer->element[e].eflags = 0; 3477 buffer->element[e].sflags = 0; 3478 buffer->element[e].length = 0; 3479 3480 ++e; 3481 } 3482 3483 buffer->element[15].eflags = 0; 3484 buffer->element[15].sflags = 0; 3485 } 3486 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, queue, 3487 card->qdio.c_q->next_buf_to_init, 3488 count); 3489 if (rc) { 3490 dev_warn(&card->gdev->dev, 3491 "QDIO reported an error, rc=%i\n", rc); 3492 QETH_CARD_TEXT(card, 2, "qcqherr"); 3493 } 3494 card->qdio.c_q->next_buf_to_init = (card->qdio.c_q->next_buf_to_init 3495 + count) % QDIO_MAX_BUFFERS_PER_Q; 3496 3497 netif_wake_queue(card->dev); 3498 3499 if (card->options.performance_stats) { 3500 int delta_t = qeth_get_micros(); 3501 delta_t -= card->perf_stats.cq_start_time; 3502 card->perf_stats.cq_time += delta_t; 3503 } 3504 out: 3505 return; 3506 } 3507 3508 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 3509 unsigned int queue, int first_elem, int count, 3510 unsigned long card_ptr) 3511 { 3512 struct qeth_card *card = (struct qeth_card *)card_ptr; 3513 3514 QETH_CARD_TEXT_(card, 2, "qihq%d", queue); 3515 QETH_CARD_TEXT_(card, 2, "qiec%d", qdio_err); 3516 3517 if (qeth_is_cq(card, queue)) 3518 qeth_qdio_cq_handler(card, qdio_err, queue, first_elem, count); 3519 else if (qdio_err) 3520 qeth_schedule_recovery(card); 3521 3522 3523 } 3524 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 3525 3526 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 3527 unsigned int qdio_error, int __queue, int first_element, 3528 int count, unsigned long card_ptr) 3529 { 3530 struct qeth_card *card = (struct qeth_card *) card_ptr; 3531 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 3532 struct qeth_qdio_out_buffer *buffer; 3533 int i; 3534 3535 QETH_CARD_TEXT(card, 6, "qdouhdl"); 3536 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 3537 QETH_CARD_TEXT(card, 2, "achkcond"); 3538 netif_stop_queue(card->dev); 3539 qeth_schedule_recovery(card); 3540 return; 3541 } 3542 if (card->options.performance_stats) { 3543 card->perf_stats.outbound_handler_cnt++; 3544 card->perf_stats.outbound_handler_start_time = 3545 qeth_get_micros(); 3546 } 3547 for (i = first_element; i < (first_element + count); ++i) { 3548 int bidx = i % QDIO_MAX_BUFFERS_PER_Q; 3549 buffer = queue->bufs[bidx]; 3550 qeth_handle_send_error(card, buffer, qdio_error); 3551 3552 if (queue->bufstates && 3553 (queue->bufstates[bidx].flags & 3554 QDIO_OUTBUF_STATE_FLAG_PENDING) != 0) { 3555 BUG_ON(card->options.cq != QETH_CQ_ENABLED); 3556 3557 if (atomic_cmpxchg(&buffer->state, 3558 QETH_QDIO_BUF_PRIMED, 3559 QETH_QDIO_BUF_PENDING) == 3560 QETH_QDIO_BUF_PRIMED) { 3561 qeth_notify_skbs(queue, buffer, 3562 TX_NOTIFY_PENDING); 3563 } 3564 buffer->aob = queue->bufstates[bidx].aob; 3565 QETH_CARD_TEXT_(queue->card, 5, "pel%d", bidx); 3566 QETH_CARD_TEXT(queue->card, 5, "aob"); 3567 QETH_CARD_TEXT_(queue->card, 5, "%lx", 3568 virt_to_phys(buffer->aob)); 3569 BUG_ON(bidx < 0 || bidx >= QDIO_MAX_BUFFERS_PER_Q); 3570 if (qeth_init_qdio_out_buf(queue, bidx)) { 3571 QETH_CARD_TEXT(card, 2, "outofbuf"); 3572 qeth_schedule_recovery(card); 3573 } 3574 } else { 3575 if (card->options.cq == QETH_CQ_ENABLED) { 3576 enum iucv_tx_notify n; 3577 3578 n = qeth_compute_cq_notification( 3579 buffer->buffer->element[15].sflags, 0); 3580 qeth_notify_skbs(queue, buffer, n); 3581 } 3582 3583 qeth_clear_output_buffer(queue, buffer, 3584 QETH_QDIO_BUF_EMPTY); 3585 } 3586 qeth_cleanup_handled_pending(queue, bidx, 0); 3587 } 3588 atomic_sub(count, &queue->used_buffers); 3589 /* check if we need to do something on this outbound queue */ 3590 if (card->info.type != QETH_CARD_TYPE_IQD) 3591 qeth_check_outbound_queue(queue); 3592 3593 netif_wake_queue(queue->card->dev); 3594 if (card->options.performance_stats) 3595 card->perf_stats.outbound_handler_time += qeth_get_micros() - 3596 card->perf_stats.outbound_handler_start_time; 3597 } 3598 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 3599 3600 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 3601 int ipv, int cast_type) 3602 { 3603 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 3604 card->info.type == QETH_CARD_TYPE_OSX)) 3605 return card->qdio.default_out_queue; 3606 switch (card->qdio.no_out_queues) { 3607 case 4: 3608 if (cast_type && card->info.is_multicast_different) 3609 return card->info.is_multicast_different & 3610 (card->qdio.no_out_queues - 1); 3611 if (card->qdio.do_prio_queueing && (ipv == 4)) { 3612 const u8 tos = ip_hdr(skb)->tos; 3613 3614 if (card->qdio.do_prio_queueing == 3615 QETH_PRIO_Q_ING_TOS) { 3616 if (tos & IP_TOS_NOTIMPORTANT) 3617 return 3; 3618 if (tos & IP_TOS_HIGHRELIABILITY) 3619 return 2; 3620 if (tos & IP_TOS_HIGHTHROUGHPUT) 3621 return 1; 3622 if (tos & IP_TOS_LOWDELAY) 3623 return 0; 3624 } 3625 if (card->qdio.do_prio_queueing == 3626 QETH_PRIO_Q_ING_PREC) 3627 return 3 - (tos >> 6); 3628 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 3629 /* TODO: IPv6!!! */ 3630 } 3631 return card->qdio.default_out_queue; 3632 case 1: /* fallthrough for single-out-queue 1920-device */ 3633 default: 3634 return card->qdio.default_out_queue; 3635 } 3636 } 3637 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 3638 3639 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 3640 struct sk_buff *skb, int elems) 3641 { 3642 int dlen = skb->len - skb->data_len; 3643 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 3644 PFN_DOWN((unsigned long)skb->data); 3645 3646 elements_needed += skb_shinfo(skb)->nr_frags; 3647 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 3648 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 3649 "(Number=%d / Length=%d). Discarded.\n", 3650 (elements_needed+elems), skb->len); 3651 return 0; 3652 } 3653 return elements_needed; 3654 } 3655 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 3656 3657 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 3658 { 3659 int hroom, inpage, rest; 3660 3661 if (((unsigned long)skb->data & PAGE_MASK) != 3662 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 3663 hroom = skb_headroom(skb); 3664 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3665 rest = len - inpage; 3666 if (rest > hroom) 3667 return 1; 3668 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3669 skb->data -= rest; 3670 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3671 } 3672 return 0; 3673 } 3674 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3675 3676 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3677 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3678 int offset) 3679 { 3680 int length = skb->len - skb->data_len; 3681 int length_here; 3682 int element; 3683 char *data; 3684 int first_lap, cnt; 3685 struct skb_frag_struct *frag; 3686 3687 element = *next_element_to_fill; 3688 data = skb->data; 3689 first_lap = (is_tso == 0 ? 1 : 0); 3690 3691 if (offset >= 0) { 3692 data = skb->data + offset; 3693 length -= offset; 3694 first_lap = 0; 3695 } 3696 3697 while (length > 0) { 3698 /* length_here is the remaining amount of data in this page */ 3699 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3700 if (length < length_here) 3701 length_here = length; 3702 3703 buffer->element[element].addr = data; 3704 buffer->element[element].length = length_here; 3705 length -= length_here; 3706 if (!length) { 3707 if (first_lap) 3708 if (skb_shinfo(skb)->nr_frags) 3709 buffer->element[element].eflags = 3710 SBAL_EFLAGS_FIRST_FRAG; 3711 else 3712 buffer->element[element].eflags = 0; 3713 else 3714 buffer->element[element].eflags = 3715 SBAL_EFLAGS_MIDDLE_FRAG; 3716 } else { 3717 if (first_lap) 3718 buffer->element[element].eflags = 3719 SBAL_EFLAGS_FIRST_FRAG; 3720 else 3721 buffer->element[element].eflags = 3722 SBAL_EFLAGS_MIDDLE_FRAG; 3723 } 3724 data += length_here; 3725 element++; 3726 first_lap = 0; 3727 } 3728 3729 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3730 frag = &skb_shinfo(skb)->frags[cnt]; 3731 buffer->element[element].addr = (char *) 3732 page_to_phys(skb_frag_page(frag)) 3733 + frag->page_offset; 3734 buffer->element[element].length = frag->size; 3735 buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; 3736 element++; 3737 } 3738 3739 if (buffer->element[element - 1].eflags) 3740 buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; 3741 *next_element_to_fill = element; 3742 } 3743 3744 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3745 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3746 struct qeth_hdr *hdr, int offset, int hd_len) 3747 { 3748 struct qdio_buffer *buffer; 3749 int flush_cnt = 0, hdr_len, large_send = 0; 3750 3751 buffer = buf->buffer; 3752 atomic_inc(&skb->users); 3753 skb_queue_tail(&buf->skb_list, skb); 3754 3755 /*check first on TSO ....*/ 3756 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3757 int element = buf->next_element_to_fill; 3758 3759 hdr_len = sizeof(struct qeth_hdr_tso) + 3760 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3761 /*fill first buffer entry only with header information */ 3762 buffer->element[element].addr = skb->data; 3763 buffer->element[element].length = hdr_len; 3764 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3765 buf->next_element_to_fill++; 3766 skb->data += hdr_len; 3767 skb->len -= hdr_len; 3768 large_send = 1; 3769 } 3770 3771 if (offset >= 0) { 3772 int element = buf->next_element_to_fill; 3773 buffer->element[element].addr = hdr; 3774 buffer->element[element].length = sizeof(struct qeth_hdr) + 3775 hd_len; 3776 buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; 3777 buf->is_header[element] = 1; 3778 buf->next_element_to_fill++; 3779 } 3780 3781 __qeth_fill_buffer(skb, buffer, large_send, 3782 (int *)&buf->next_element_to_fill, offset); 3783 3784 if (!queue->do_pack) { 3785 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3786 /* set state to PRIMED -> will be flushed */ 3787 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3788 flush_cnt = 1; 3789 } else { 3790 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3791 if (queue->card->options.performance_stats) 3792 queue->card->perf_stats.skbs_sent_pack++; 3793 if (buf->next_element_to_fill >= 3794 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3795 /* 3796 * packed buffer if full -> set state PRIMED 3797 * -> will be flushed 3798 */ 3799 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3800 flush_cnt = 1; 3801 } 3802 } 3803 return flush_cnt; 3804 } 3805 3806 int qeth_do_send_packet_fast(struct qeth_card *card, 3807 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3808 struct qeth_hdr *hdr, int elements_needed, 3809 int offset, int hd_len) 3810 { 3811 struct qeth_qdio_out_buffer *buffer; 3812 int index; 3813 3814 /* spin until we get the queue ... */ 3815 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3816 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3817 /* ... now we've got the queue */ 3818 index = queue->next_buf_to_fill; 3819 buffer = queue->bufs[queue->next_buf_to_fill]; 3820 /* 3821 * check if buffer is empty to make sure that we do not 'overtake' 3822 * ourselves and try to fill a buffer that is already primed 3823 */ 3824 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3825 goto out; 3826 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3827 QDIO_MAX_BUFFERS_PER_Q; 3828 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3829 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3830 qeth_flush_buffers(queue, index, 1); 3831 return 0; 3832 out: 3833 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3834 return -EBUSY; 3835 } 3836 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3837 3838 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3839 struct sk_buff *skb, struct qeth_hdr *hdr, 3840 int elements_needed) 3841 { 3842 struct qeth_qdio_out_buffer *buffer; 3843 int start_index; 3844 int flush_count = 0; 3845 int do_pack = 0; 3846 int tmp; 3847 int rc = 0; 3848 3849 /* spin until we get the queue ... */ 3850 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3851 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3852 start_index = queue->next_buf_to_fill; 3853 buffer = queue->bufs[queue->next_buf_to_fill]; 3854 /* 3855 * check if buffer is empty to make sure that we do not 'overtake' 3856 * ourselves and try to fill a buffer that is already primed 3857 */ 3858 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3859 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3860 return -EBUSY; 3861 } 3862 /* check if we need to switch packing state of this queue */ 3863 qeth_switch_to_packing_if_needed(queue); 3864 if (queue->do_pack) { 3865 do_pack = 1; 3866 /* does packet fit in current buffer? */ 3867 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3868 buffer->next_element_to_fill) < elements_needed) { 3869 /* ... no -> set state PRIMED */ 3870 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3871 flush_count++; 3872 queue->next_buf_to_fill = 3873 (queue->next_buf_to_fill + 1) % 3874 QDIO_MAX_BUFFERS_PER_Q; 3875 buffer = queue->bufs[queue->next_buf_to_fill]; 3876 /* we did a step forward, so check buffer state 3877 * again */ 3878 if (atomic_read(&buffer->state) != 3879 QETH_QDIO_BUF_EMPTY) { 3880 qeth_flush_buffers(queue, start_index, 3881 flush_count); 3882 atomic_set(&queue->state, 3883 QETH_OUT_Q_UNLOCKED); 3884 return -EBUSY; 3885 } 3886 } 3887 } 3888 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3889 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3890 QDIO_MAX_BUFFERS_PER_Q; 3891 flush_count += tmp; 3892 if (flush_count) 3893 qeth_flush_buffers(queue, start_index, flush_count); 3894 else if (!atomic_read(&queue->set_pci_flags_count)) 3895 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3896 /* 3897 * queue->state will go from LOCKED -> UNLOCKED or from 3898 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3899 * (switch packing state or flush buffer to get another pci flag out). 3900 * In that case we will enter this loop 3901 */ 3902 while (atomic_dec_return(&queue->state)) { 3903 flush_count = 0; 3904 start_index = queue->next_buf_to_fill; 3905 /* check if we can go back to non-packing state */ 3906 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3907 /* 3908 * check if we need to flush a packing buffer to get a pci 3909 * flag out on the queue 3910 */ 3911 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3912 flush_count += qeth_flush_buffers_on_no_pci(queue); 3913 if (flush_count) 3914 qeth_flush_buffers(queue, start_index, flush_count); 3915 } 3916 /* at this point the queue is UNLOCKED again */ 3917 if (queue->card->options.performance_stats && do_pack) 3918 queue->card->perf_stats.bufs_sent_pack += flush_count; 3919 3920 return rc; 3921 } 3922 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3923 3924 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3925 struct qeth_reply *reply, unsigned long data) 3926 { 3927 struct qeth_ipa_cmd *cmd; 3928 struct qeth_ipacmd_setadpparms *setparms; 3929 3930 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3931 3932 cmd = (struct qeth_ipa_cmd *) data; 3933 setparms = &(cmd->data.setadapterparms); 3934 3935 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3936 if (cmd->hdr.return_code) { 3937 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3938 setparms->data.mode = SET_PROMISC_MODE_OFF; 3939 } 3940 card->info.promisc_mode = setparms->data.mode; 3941 return 0; 3942 } 3943 3944 void qeth_setadp_promisc_mode(struct qeth_card *card) 3945 { 3946 enum qeth_ipa_promisc_modes mode; 3947 struct net_device *dev = card->dev; 3948 struct qeth_cmd_buffer *iob; 3949 struct qeth_ipa_cmd *cmd; 3950 3951 QETH_CARD_TEXT(card, 4, "setprom"); 3952 3953 if (((dev->flags & IFF_PROMISC) && 3954 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3955 (!(dev->flags & IFF_PROMISC) && 3956 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3957 return; 3958 mode = SET_PROMISC_MODE_OFF; 3959 if (dev->flags & IFF_PROMISC) 3960 mode = SET_PROMISC_MODE_ON; 3961 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3962 3963 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3964 sizeof(struct qeth_ipacmd_setadpparms)); 3965 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3966 cmd->data.setadapterparms.data.mode = mode; 3967 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3968 } 3969 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3970 3971 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3972 { 3973 struct qeth_card *card; 3974 char dbf_text[15]; 3975 3976 card = dev->ml_priv; 3977 3978 QETH_CARD_TEXT(card, 4, "chgmtu"); 3979 sprintf(dbf_text, "%8x", new_mtu); 3980 QETH_CARD_TEXT(card, 4, dbf_text); 3981 3982 if (new_mtu < 64) 3983 return -EINVAL; 3984 if (new_mtu > 65535) 3985 return -EINVAL; 3986 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3987 (!qeth_mtu_is_valid(card, new_mtu))) 3988 return -EINVAL; 3989 dev->mtu = new_mtu; 3990 return 0; 3991 } 3992 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3993 3994 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3995 { 3996 struct qeth_card *card; 3997 3998 card = dev->ml_priv; 3999 4000 QETH_CARD_TEXT(card, 5, "getstat"); 4001 4002 return &card->stats; 4003 } 4004 EXPORT_SYMBOL_GPL(qeth_get_stats); 4005 4006 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 4007 struct qeth_reply *reply, unsigned long data) 4008 { 4009 struct qeth_ipa_cmd *cmd; 4010 4011 QETH_CARD_TEXT(card, 4, "chgmaccb"); 4012 4013 cmd = (struct qeth_ipa_cmd *) data; 4014 if (!card->options.layer2 || 4015 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 4016 memcpy(card->dev->dev_addr, 4017 &cmd->data.setadapterparms.data.change_addr.addr, 4018 OSA_ADDR_LEN); 4019 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 4020 } 4021 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4022 return 0; 4023 } 4024 4025 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 4026 { 4027 int rc; 4028 struct qeth_cmd_buffer *iob; 4029 struct qeth_ipa_cmd *cmd; 4030 4031 QETH_CARD_TEXT(card, 4, "chgmac"); 4032 4033 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 4034 sizeof(struct qeth_ipacmd_setadpparms)); 4035 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4036 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 4037 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 4038 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 4039 card->dev->dev_addr, OSA_ADDR_LEN); 4040 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 4041 NULL); 4042 return rc; 4043 } 4044 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 4045 4046 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 4047 struct qeth_reply *reply, unsigned long data) 4048 { 4049 struct qeth_ipa_cmd *cmd; 4050 struct qeth_set_access_ctrl *access_ctrl_req; 4051 4052 QETH_CARD_TEXT(card, 4, "setaccb"); 4053 4054 cmd = (struct qeth_ipa_cmd *) data; 4055 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4056 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 4057 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4058 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 4059 cmd->data.setadapterparms.hdr.return_code); 4060 switch (cmd->data.setadapterparms.hdr.return_code) { 4061 case SET_ACCESS_CTRL_RC_SUCCESS: 4062 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 4063 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 4064 { 4065 card->options.isolation = access_ctrl_req->subcmd_code; 4066 if (card->options.isolation == ISOLATION_MODE_NONE) { 4067 dev_info(&card->gdev->dev, 4068 "QDIO data connection isolation is deactivated\n"); 4069 } else { 4070 dev_info(&card->gdev->dev, 4071 "QDIO data connection isolation is activated\n"); 4072 } 4073 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 4074 card->gdev->dev.kobj.name, 4075 access_ctrl_req->subcmd_code, 4076 cmd->data.setadapterparms.hdr.return_code); 4077 break; 4078 } 4079 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 4080 { 4081 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 4082 card->gdev->dev.kobj.name, 4083 access_ctrl_req->subcmd_code, 4084 cmd->data.setadapterparms.hdr.return_code); 4085 dev_err(&card->gdev->dev, "Adapter does not " 4086 "support QDIO data connection isolation\n"); 4087 4088 /* ensure isolation mode is "none" */ 4089 card->options.isolation = ISOLATION_MODE_NONE; 4090 break; 4091 } 4092 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 4093 { 4094 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4095 card->gdev->dev.kobj.name, 4096 access_ctrl_req->subcmd_code, 4097 cmd->data.setadapterparms.hdr.return_code); 4098 dev_err(&card->gdev->dev, 4099 "Adapter is dedicated. " 4100 "QDIO data connection isolation not supported\n"); 4101 4102 /* ensure isolation mode is "none" */ 4103 card->options.isolation = ISOLATION_MODE_NONE; 4104 break; 4105 } 4106 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 4107 { 4108 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 4109 card->gdev->dev.kobj.name, 4110 access_ctrl_req->subcmd_code, 4111 cmd->data.setadapterparms.hdr.return_code); 4112 dev_err(&card->gdev->dev, 4113 "TSO does not permit QDIO data connection isolation\n"); 4114 4115 /* ensure isolation mode is "none" */ 4116 card->options.isolation = ISOLATION_MODE_NONE; 4117 break; 4118 } 4119 default: 4120 { 4121 /* this should never happen */ 4122 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 4123 "==UNKNOWN\n", 4124 card->gdev->dev.kobj.name, 4125 access_ctrl_req->subcmd_code, 4126 cmd->data.setadapterparms.hdr.return_code); 4127 4128 /* ensure isolation mode is "none" */ 4129 card->options.isolation = ISOLATION_MODE_NONE; 4130 break; 4131 } 4132 } 4133 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 4134 return 0; 4135 } 4136 4137 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 4138 enum qeth_ipa_isolation_modes isolation) 4139 { 4140 int rc; 4141 struct qeth_cmd_buffer *iob; 4142 struct qeth_ipa_cmd *cmd; 4143 struct qeth_set_access_ctrl *access_ctrl_req; 4144 4145 QETH_CARD_TEXT(card, 4, "setacctl"); 4146 4147 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 4148 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 4149 4150 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 4151 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4152 sizeof(struct qeth_set_access_ctrl)); 4153 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4154 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 4155 access_ctrl_req->subcmd_code = isolation; 4156 4157 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 4158 NULL); 4159 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 4160 return rc; 4161 } 4162 4163 int qeth_set_access_ctrl_online(struct qeth_card *card) 4164 { 4165 int rc = 0; 4166 4167 QETH_CARD_TEXT(card, 4, "setactlo"); 4168 4169 if ((card->info.type == QETH_CARD_TYPE_OSD || 4170 card->info.type == QETH_CARD_TYPE_OSX) && 4171 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 4172 rc = qeth_setadpparms_set_access_ctrl(card, 4173 card->options.isolation); 4174 if (rc) { 4175 QETH_DBF_MESSAGE(3, 4176 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 4177 card->gdev->dev.kobj.name, 4178 rc); 4179 } 4180 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 4181 card->options.isolation = ISOLATION_MODE_NONE; 4182 4183 dev_err(&card->gdev->dev, "Adapter does not " 4184 "support QDIO data connection isolation\n"); 4185 rc = -EOPNOTSUPP; 4186 } 4187 return rc; 4188 } 4189 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 4190 4191 void qeth_tx_timeout(struct net_device *dev) 4192 { 4193 struct qeth_card *card; 4194 4195 card = dev->ml_priv; 4196 QETH_CARD_TEXT(card, 4, "txtimeo"); 4197 card->stats.tx_errors++; 4198 qeth_schedule_recovery(card); 4199 } 4200 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 4201 4202 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 4203 { 4204 struct qeth_card *card = dev->ml_priv; 4205 int rc = 0; 4206 4207 switch (regnum) { 4208 case MII_BMCR: /* Basic mode control register */ 4209 rc = BMCR_FULLDPLX; 4210 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 4211 (card->info.link_type != QETH_LINK_TYPE_OSN) && 4212 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 4213 rc |= BMCR_SPEED100; 4214 break; 4215 case MII_BMSR: /* Basic mode status register */ 4216 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 4217 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 4218 BMSR_100BASE4; 4219 break; 4220 case MII_PHYSID1: /* PHYS ID 1 */ 4221 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 4222 dev->dev_addr[2]; 4223 rc = (rc >> 5) & 0xFFFF; 4224 break; 4225 case MII_PHYSID2: /* PHYS ID 2 */ 4226 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 4227 break; 4228 case MII_ADVERTISE: /* Advertisement control reg */ 4229 rc = ADVERTISE_ALL; 4230 break; 4231 case MII_LPA: /* Link partner ability reg */ 4232 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 4233 LPA_100BASE4 | LPA_LPACK; 4234 break; 4235 case MII_EXPANSION: /* Expansion register */ 4236 break; 4237 case MII_DCOUNTER: /* disconnect counter */ 4238 break; 4239 case MII_FCSCOUNTER: /* false carrier counter */ 4240 break; 4241 case MII_NWAYTEST: /* N-way auto-neg test register */ 4242 break; 4243 case MII_RERRCOUNTER: /* rx error counter */ 4244 rc = card->stats.rx_errors; 4245 break; 4246 case MII_SREVISION: /* silicon revision */ 4247 break; 4248 case MII_RESV1: /* reserved 1 */ 4249 break; 4250 case MII_LBRERROR: /* loopback, rx, bypass error */ 4251 break; 4252 case MII_PHYADDR: /* physical address */ 4253 break; 4254 case MII_RESV2: /* reserved 2 */ 4255 break; 4256 case MII_TPISTATUS: /* TPI status for 10mbps */ 4257 break; 4258 case MII_NCONFIG: /* network interface config */ 4259 break; 4260 default: 4261 break; 4262 } 4263 return rc; 4264 } 4265 EXPORT_SYMBOL_GPL(qeth_mdio_read); 4266 4267 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 4268 struct qeth_cmd_buffer *iob, int len, 4269 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 4270 unsigned long), 4271 void *reply_param) 4272 { 4273 u16 s1, s2; 4274 4275 QETH_CARD_TEXT(card, 4, "sendsnmp"); 4276 4277 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 4278 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 4279 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 4280 /* adjust PDU length fields in IPA_PDU_HEADER */ 4281 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 4282 s2 = (u32) len; 4283 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 4284 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 4285 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 4286 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 4287 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 4288 reply_cb, reply_param); 4289 } 4290 4291 static int qeth_snmp_command_cb(struct qeth_card *card, 4292 struct qeth_reply *reply, unsigned long sdata) 4293 { 4294 struct qeth_ipa_cmd *cmd; 4295 struct qeth_arp_query_info *qinfo; 4296 struct qeth_snmp_cmd *snmp; 4297 unsigned char *data; 4298 __u16 data_len; 4299 4300 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 4301 4302 cmd = (struct qeth_ipa_cmd *) sdata; 4303 data = (unsigned char *)((char *)cmd - reply->offset); 4304 qinfo = (struct qeth_arp_query_info *) reply->param; 4305 snmp = &cmd->data.setadapterparms.data.snmp; 4306 4307 if (cmd->hdr.return_code) { 4308 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 4309 return 0; 4310 } 4311 if (cmd->data.setadapterparms.hdr.return_code) { 4312 cmd->hdr.return_code = 4313 cmd->data.setadapterparms.hdr.return_code; 4314 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 4315 return 0; 4316 } 4317 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 4318 if (cmd->data.setadapterparms.hdr.seq_no == 1) 4319 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 4320 else 4321 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 4322 4323 /* check if there is enough room in userspace */ 4324 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 4325 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 4326 cmd->hdr.return_code = IPA_RC_ENOMEM; 4327 return 0; 4328 } 4329 QETH_CARD_TEXT_(card, 4, "snore%i", 4330 cmd->data.setadapterparms.hdr.used_total); 4331 QETH_CARD_TEXT_(card, 4, "sseqn%i", 4332 cmd->data.setadapterparms.hdr.seq_no); 4333 /*copy entries to user buffer*/ 4334 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 4335 memcpy(qinfo->udata + qinfo->udata_offset, 4336 (char *)snmp, 4337 data_len + offsetof(struct qeth_snmp_cmd, data)); 4338 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 4339 } else { 4340 memcpy(qinfo->udata + qinfo->udata_offset, 4341 (char *)&snmp->request, data_len); 4342 } 4343 qinfo->udata_offset += data_len; 4344 /* check if all replies received ... */ 4345 QETH_CARD_TEXT_(card, 4, "srtot%i", 4346 cmd->data.setadapterparms.hdr.used_total); 4347 QETH_CARD_TEXT_(card, 4, "srseq%i", 4348 cmd->data.setadapterparms.hdr.seq_no); 4349 if (cmd->data.setadapterparms.hdr.seq_no < 4350 cmd->data.setadapterparms.hdr.used_total) 4351 return 1; 4352 return 0; 4353 } 4354 4355 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 4356 { 4357 struct qeth_cmd_buffer *iob; 4358 struct qeth_ipa_cmd *cmd; 4359 struct qeth_snmp_ureq *ureq; 4360 int req_len; 4361 struct qeth_arp_query_info qinfo = {0, }; 4362 int rc = 0; 4363 4364 QETH_CARD_TEXT(card, 3, "snmpcmd"); 4365 4366 if (card->info.guestlan) 4367 return -EOPNOTSUPP; 4368 4369 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 4370 (!card->options.layer2)) { 4371 return -EOPNOTSUPP; 4372 } 4373 /* skip 4 bytes (data_len struct member) to get req_len */ 4374 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 4375 return -EFAULT; 4376 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 4377 if (IS_ERR(ureq)) { 4378 QETH_CARD_TEXT(card, 2, "snmpnome"); 4379 return PTR_ERR(ureq); 4380 } 4381 qinfo.udata_len = ureq->hdr.data_len; 4382 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 4383 if (!qinfo.udata) { 4384 kfree(ureq); 4385 return -ENOMEM; 4386 } 4387 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 4388 4389 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 4390 QETH_SNMP_SETADP_CMDLENGTH + req_len); 4391 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4392 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 4393 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 4394 qeth_snmp_command_cb, (void *)&qinfo); 4395 if (rc) 4396 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 4397 QETH_CARD_IFNAME(card), rc); 4398 else { 4399 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 4400 rc = -EFAULT; 4401 } 4402 4403 kfree(ureq); 4404 kfree(qinfo.udata); 4405 return rc; 4406 } 4407 EXPORT_SYMBOL_GPL(qeth_snmp_command); 4408 4409 static int qeth_setadpparms_query_oat_cb(struct qeth_card *card, 4410 struct qeth_reply *reply, unsigned long data) 4411 { 4412 struct qeth_ipa_cmd *cmd; 4413 struct qeth_qoat_priv *priv; 4414 char *resdata; 4415 int resdatalen; 4416 4417 QETH_CARD_TEXT(card, 3, "qoatcb"); 4418 4419 cmd = (struct qeth_ipa_cmd *)data; 4420 priv = (struct qeth_qoat_priv *)reply->param; 4421 resdatalen = cmd->data.setadapterparms.hdr.cmdlength; 4422 resdata = (char *)data + 28; 4423 4424 if (resdatalen > (priv->buffer_len - priv->response_len)) { 4425 cmd->hdr.return_code = IPA_RC_FFFF; 4426 return 0; 4427 } 4428 4429 memcpy((priv->buffer + priv->response_len), resdata, 4430 resdatalen); 4431 priv->response_len += resdatalen; 4432 4433 if (cmd->data.setadapterparms.hdr.seq_no < 4434 cmd->data.setadapterparms.hdr.used_total) 4435 return 1; 4436 return 0; 4437 } 4438 4439 int qeth_query_oat_command(struct qeth_card *card, char __user *udata) 4440 { 4441 int rc = 0; 4442 struct qeth_cmd_buffer *iob; 4443 struct qeth_ipa_cmd *cmd; 4444 struct qeth_query_oat *oat_req; 4445 struct qeth_query_oat_data oat_data; 4446 struct qeth_qoat_priv priv; 4447 void __user *tmp; 4448 4449 QETH_CARD_TEXT(card, 3, "qoatcmd"); 4450 4451 if (!qeth_adp_supported(card, IPA_SETADP_QUERY_OAT)) { 4452 rc = -EOPNOTSUPP; 4453 goto out; 4454 } 4455 4456 if (copy_from_user(&oat_data, udata, 4457 sizeof(struct qeth_query_oat_data))) { 4458 rc = -EFAULT; 4459 goto out; 4460 } 4461 4462 priv.buffer_len = oat_data.buffer_len; 4463 priv.response_len = 0; 4464 priv.buffer = kzalloc(oat_data.buffer_len, GFP_KERNEL); 4465 if (!priv.buffer) { 4466 rc = -ENOMEM; 4467 goto out; 4468 } 4469 4470 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_OAT, 4471 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 4472 sizeof(struct qeth_query_oat)); 4473 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 4474 oat_req = &cmd->data.setadapterparms.data.query_oat; 4475 oat_req->subcmd_code = oat_data.command; 4476 4477 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_query_oat_cb, 4478 &priv); 4479 if (!rc) { 4480 if (is_compat_task()) 4481 tmp = compat_ptr(oat_data.ptr); 4482 else 4483 tmp = (void __user *)(unsigned long)oat_data.ptr; 4484 4485 if (copy_to_user(tmp, priv.buffer, 4486 priv.response_len)) { 4487 rc = -EFAULT; 4488 goto out_free; 4489 } 4490 4491 oat_data.response_len = priv.response_len; 4492 4493 if (copy_to_user(udata, &oat_data, 4494 sizeof(struct qeth_query_oat_data))) 4495 rc = -EFAULT; 4496 } else 4497 if (rc == IPA_RC_FFFF) 4498 rc = -EFAULT; 4499 4500 out_free: 4501 kfree(priv.buffer); 4502 out: 4503 return rc; 4504 } 4505 EXPORT_SYMBOL_GPL(qeth_query_oat_command); 4506 4507 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 4508 { 4509 switch (card->info.type) { 4510 case QETH_CARD_TYPE_IQD: 4511 return 2; 4512 default: 4513 return 0; 4514 } 4515 } 4516 4517 static void qeth_determine_capabilities(struct qeth_card *card) 4518 { 4519 int rc; 4520 int length; 4521 char *prcd; 4522 struct ccw_device *ddev; 4523 int ddev_offline = 0; 4524 4525 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 4526 ddev = CARD_DDEV(card); 4527 if (!ddev->online) { 4528 ddev_offline = 1; 4529 rc = ccw_device_set_online(ddev); 4530 if (rc) { 4531 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4532 goto out; 4533 } 4534 } 4535 4536 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 4537 if (rc) { 4538 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 4539 dev_name(&card->gdev->dev), rc); 4540 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4541 goto out_offline; 4542 } 4543 qeth_configure_unitaddr(card, prcd); 4544 if (ddev_offline) 4545 qeth_configure_blkt_default(card, prcd); 4546 kfree(prcd); 4547 4548 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 4549 if (rc) 4550 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 4551 4552 QETH_DBF_TEXT_(SETUP, 2, "qfmt%d", card->ssqd.qfmt); 4553 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac1); 4554 QETH_DBF_TEXT_(SETUP, 2, "%d", card->ssqd.qdioac3); 4555 QETH_DBF_TEXT_(SETUP, 2, "icnt%d", card->ssqd.icnt); 4556 if (!((card->ssqd.qfmt != QDIO_IQDIO_QFMT) || 4557 ((card->ssqd.qdioac1 & CHSC_AC1_INITIATE_INPUTQ) == 0) || 4558 ((card->ssqd.qdioac3 & CHSC_AC3_FORMAT2_CQ_AVAILABLE) == 0))) { 4559 dev_info(&card->gdev->dev, 4560 "Completion Queueing supported\n"); 4561 } else { 4562 card->options.cq = QETH_CQ_NOTAVAILABLE; 4563 } 4564 4565 4566 out_offline: 4567 if (ddev_offline == 1) 4568 ccw_device_set_offline(ddev); 4569 out: 4570 return; 4571 } 4572 4573 static inline void qeth_qdio_establish_cq(struct qeth_card *card, 4574 struct qdio_buffer **in_sbal_ptrs, 4575 void (**queue_start_poll) (struct ccw_device *, int, unsigned long)) { 4576 int i; 4577 4578 if (card->options.cq == QETH_CQ_ENABLED) { 4579 int offset = QDIO_MAX_BUFFERS_PER_Q * 4580 (card->qdio.no_in_queues - 1); 4581 i = QDIO_MAX_BUFFERS_PER_Q * (card->qdio.no_in_queues - 1); 4582 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4583 in_sbal_ptrs[offset + i] = (struct qdio_buffer *) 4584 virt_to_phys(card->qdio.c_q->bufs[i].buffer); 4585 } 4586 4587 queue_start_poll[card->qdio.no_in_queues - 1] = NULL; 4588 } 4589 } 4590 4591 static int qeth_qdio_establish(struct qeth_card *card) 4592 { 4593 struct qdio_initialize init_data; 4594 char *qib_param_field; 4595 struct qdio_buffer **in_sbal_ptrs; 4596 void (**queue_start_poll) (struct ccw_device *, int, unsigned long); 4597 struct qdio_buffer **out_sbal_ptrs; 4598 int i, j, k; 4599 int rc = 0; 4600 4601 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 4602 4603 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 4604 GFP_KERNEL); 4605 if (!qib_param_field) { 4606 rc = -ENOMEM; 4607 goto out_free_nothing; 4608 } 4609 4610 qeth_create_qib_param_field(card, qib_param_field); 4611 qeth_create_qib_param_field_blkt(card, qib_param_field); 4612 4613 in_sbal_ptrs = kzalloc(card->qdio.no_in_queues * 4614 QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 4615 GFP_KERNEL); 4616 if (!in_sbal_ptrs) { 4617 rc = -ENOMEM; 4618 goto out_free_qib_param; 4619 } 4620 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) { 4621 in_sbal_ptrs[i] = (struct qdio_buffer *) 4622 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 4623 } 4624 4625 queue_start_poll = kzalloc(sizeof(void *) * card->qdio.no_in_queues, 4626 GFP_KERNEL); 4627 if (!queue_start_poll) { 4628 rc = -ENOMEM; 4629 goto out_free_in_sbals; 4630 } 4631 for (i = 0; i < card->qdio.no_in_queues; ++i) 4632 queue_start_poll[i] = card->discipline.start_poll; 4633 4634 qeth_qdio_establish_cq(card, in_sbal_ptrs, queue_start_poll); 4635 4636 out_sbal_ptrs = 4637 kzalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 4638 sizeof(void *), GFP_KERNEL); 4639 if (!out_sbal_ptrs) { 4640 rc = -ENOMEM; 4641 goto out_free_queue_start_poll; 4642 } 4643 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 4644 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 4645 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 4646 card->qdio.out_qs[i]->bufs[j]->buffer); 4647 } 4648 4649 memset(&init_data, 0, sizeof(struct qdio_initialize)); 4650 init_data.cdev = CARD_DDEV(card); 4651 init_data.q_format = qeth_get_qdio_q_format(card); 4652 init_data.qib_param_field_format = 0; 4653 init_data.qib_param_field = qib_param_field; 4654 init_data.no_input_qs = card->qdio.no_in_queues; 4655 init_data.no_output_qs = card->qdio.no_out_queues; 4656 init_data.input_handler = card->discipline.input_handler; 4657 init_data.output_handler = card->discipline.output_handler; 4658 init_data.queue_start_poll_array = queue_start_poll; 4659 init_data.int_parm = (unsigned long) card; 4660 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 4661 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 4662 init_data.output_sbal_state_array = card->qdio.out_bufstates; 4663 init_data.scan_threshold = 4664 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 4665 4666 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 4667 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 4668 rc = qdio_allocate(&init_data); 4669 if (rc) { 4670 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4671 goto out; 4672 } 4673 rc = qdio_establish(&init_data); 4674 if (rc) { 4675 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 4676 qdio_free(CARD_DDEV(card)); 4677 } 4678 } 4679 4680 switch (card->options.cq) { 4681 case QETH_CQ_ENABLED: 4682 dev_info(&card->gdev->dev, "Completion Queue support enabled"); 4683 break; 4684 case QETH_CQ_DISABLED: 4685 dev_info(&card->gdev->dev, "Completion Queue support disabled"); 4686 break; 4687 default: 4688 break; 4689 } 4690 out: 4691 kfree(out_sbal_ptrs); 4692 out_free_queue_start_poll: 4693 kfree(queue_start_poll); 4694 out_free_in_sbals: 4695 kfree(in_sbal_ptrs); 4696 out_free_qib_param: 4697 kfree(qib_param_field); 4698 out_free_nothing: 4699 return rc; 4700 } 4701 4702 static void qeth_core_free_card(struct qeth_card *card) 4703 { 4704 4705 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 4706 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 4707 qeth_clean_channel(&card->read); 4708 qeth_clean_channel(&card->write); 4709 if (card->dev) 4710 free_netdev(card->dev); 4711 kfree(card->ip_tbd_list); 4712 qeth_free_qdio_buffers(card); 4713 unregister_service_level(&card->qeth_service_level); 4714 kfree(card); 4715 } 4716 4717 static struct ccw_device_id qeth_ids[] = { 4718 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 4719 .driver_info = QETH_CARD_TYPE_OSD}, 4720 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 4721 .driver_info = QETH_CARD_TYPE_IQD}, 4722 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 4723 .driver_info = QETH_CARD_TYPE_OSN}, 4724 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 4725 .driver_info = QETH_CARD_TYPE_OSM}, 4726 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 4727 .driver_info = QETH_CARD_TYPE_OSX}, 4728 {}, 4729 }; 4730 MODULE_DEVICE_TABLE(ccw, qeth_ids); 4731 4732 static struct ccw_driver qeth_ccw_driver = { 4733 .driver = { 4734 .owner = THIS_MODULE, 4735 .name = "qeth", 4736 }, 4737 .ids = qeth_ids, 4738 .probe = ccwgroup_probe_ccwdev, 4739 .remove = ccwgroup_remove_ccwdev, 4740 }; 4741 4742 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 4743 unsigned long driver_id) 4744 { 4745 return ccwgroup_create_from_string(root_dev, driver_id, 4746 &qeth_ccw_driver, 3, buf); 4747 } 4748 4749 int qeth_core_hardsetup_card(struct qeth_card *card) 4750 { 4751 int retries = 0; 4752 int rc; 4753 4754 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 4755 atomic_set(&card->force_alloc_skb, 0); 4756 qeth_get_channel_path_desc(card); 4757 retry: 4758 if (retries) 4759 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 4760 dev_name(&card->gdev->dev)); 4761 ccw_device_set_offline(CARD_DDEV(card)); 4762 ccw_device_set_offline(CARD_WDEV(card)); 4763 ccw_device_set_offline(CARD_RDEV(card)); 4764 rc = ccw_device_set_online(CARD_RDEV(card)); 4765 if (rc) 4766 goto retriable; 4767 rc = ccw_device_set_online(CARD_WDEV(card)); 4768 if (rc) 4769 goto retriable; 4770 rc = ccw_device_set_online(CARD_DDEV(card)); 4771 if (rc) 4772 goto retriable; 4773 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 4774 retriable: 4775 if (rc == -ERESTARTSYS) { 4776 QETH_DBF_TEXT(SETUP, 2, "break1"); 4777 return rc; 4778 } else if (rc) { 4779 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 4780 if (++retries > 3) 4781 goto out; 4782 else 4783 goto retry; 4784 } 4785 qeth_determine_capabilities(card); 4786 qeth_init_tokens(card); 4787 qeth_init_func_level(card); 4788 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 4789 if (rc == -ERESTARTSYS) { 4790 QETH_DBF_TEXT(SETUP, 2, "break2"); 4791 return rc; 4792 } else if (rc) { 4793 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4794 if (--retries < 0) 4795 goto out; 4796 else 4797 goto retry; 4798 } 4799 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 4800 if (rc == -ERESTARTSYS) { 4801 QETH_DBF_TEXT(SETUP, 2, "break3"); 4802 return rc; 4803 } else if (rc) { 4804 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 4805 if (--retries < 0) 4806 goto out; 4807 else 4808 goto retry; 4809 } 4810 card->read_or_write_problem = 0; 4811 rc = qeth_mpc_initialize(card); 4812 if (rc) { 4813 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 4814 goto out; 4815 } 4816 4817 card->options.ipa4.supported_funcs = 0; 4818 card->options.adp.supported_funcs = 0; 4819 card->info.diagass_support = 0; 4820 qeth_query_ipassists(card, QETH_PROT_IPV4); 4821 if (qeth_is_supported(card, IPA_SETADAPTERPARMS)) 4822 qeth_query_setadapterparms(card); 4823 if (qeth_adp_supported(card, IPA_SETADP_SET_DIAG_ASSIST)) 4824 qeth_query_setdiagass(card); 4825 return 0; 4826 out: 4827 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 4828 "an error on the device\n"); 4829 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 4830 dev_name(&card->gdev->dev), rc); 4831 return rc; 4832 } 4833 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 4834 4835 static inline int qeth_create_skb_frag(struct qeth_qdio_buffer *qethbuffer, 4836 struct qdio_buffer_element *element, 4837 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 4838 { 4839 struct page *page = virt_to_page(element->addr); 4840 if (*pskb == NULL) { 4841 if (qethbuffer->rx_skb) { 4842 /* only if qeth_card.options.cq == QETH_CQ_ENABLED */ 4843 *pskb = qethbuffer->rx_skb; 4844 qethbuffer->rx_skb = NULL; 4845 } else { 4846 *pskb = dev_alloc_skb(QETH_RX_PULL_LEN + ETH_HLEN); 4847 if (!(*pskb)) 4848 return -ENOMEM; 4849 } 4850 4851 skb_reserve(*pskb, ETH_HLEN); 4852 if (data_len <= QETH_RX_PULL_LEN) { 4853 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4854 data_len); 4855 } else { 4856 get_page(page); 4857 memcpy(skb_put(*pskb, QETH_RX_PULL_LEN), 4858 element->addr + offset, QETH_RX_PULL_LEN); 4859 skb_fill_page_desc(*pskb, *pfrag, page, 4860 offset + QETH_RX_PULL_LEN, 4861 data_len - QETH_RX_PULL_LEN); 4862 (*pskb)->data_len += data_len - QETH_RX_PULL_LEN; 4863 (*pskb)->len += data_len - QETH_RX_PULL_LEN; 4864 (*pskb)->truesize += data_len - QETH_RX_PULL_LEN; 4865 (*pfrag)++; 4866 } 4867 } else { 4868 get_page(page); 4869 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4870 (*pskb)->data_len += data_len; 4871 (*pskb)->len += data_len; 4872 (*pskb)->truesize += data_len; 4873 (*pfrag)++; 4874 } 4875 4876 4877 return 0; 4878 } 4879 4880 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4881 struct qeth_qdio_buffer *qethbuffer, 4882 struct qdio_buffer_element **__element, int *__offset, 4883 struct qeth_hdr **hdr) 4884 { 4885 struct qdio_buffer_element *element = *__element; 4886 struct qdio_buffer *buffer = qethbuffer->buffer; 4887 int offset = *__offset; 4888 struct sk_buff *skb = NULL; 4889 int skb_len = 0; 4890 void *data_ptr; 4891 int data_len; 4892 int headroom = 0; 4893 int use_rx_sg = 0; 4894 int frag = 0; 4895 4896 /* qeth_hdr must not cross element boundaries */ 4897 if (element->length < offset + sizeof(struct qeth_hdr)) { 4898 if (qeth_is_last_sbale(element)) 4899 return NULL; 4900 element++; 4901 offset = 0; 4902 if (element->length < sizeof(struct qeth_hdr)) 4903 return NULL; 4904 } 4905 *hdr = element->addr + offset; 4906 4907 offset += sizeof(struct qeth_hdr); 4908 switch ((*hdr)->hdr.l2.id) { 4909 case QETH_HEADER_TYPE_LAYER2: 4910 skb_len = (*hdr)->hdr.l2.pkt_length; 4911 break; 4912 case QETH_HEADER_TYPE_LAYER3: 4913 skb_len = (*hdr)->hdr.l3.length; 4914 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4915 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4916 headroom = TR_HLEN; 4917 else 4918 headroom = ETH_HLEN; 4919 break; 4920 case QETH_HEADER_TYPE_OSN: 4921 skb_len = (*hdr)->hdr.osn.pdu_length; 4922 headroom = sizeof(struct qeth_hdr); 4923 break; 4924 default: 4925 break; 4926 } 4927 4928 if (!skb_len) 4929 return NULL; 4930 4931 if (((skb_len >= card->options.rx_sg_cb) && 4932 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4933 (!atomic_read(&card->force_alloc_skb))) || 4934 (card->options.cq == QETH_CQ_ENABLED)) { 4935 use_rx_sg = 1; 4936 } else { 4937 skb = dev_alloc_skb(skb_len + headroom); 4938 if (!skb) 4939 goto no_mem; 4940 if (headroom) 4941 skb_reserve(skb, headroom); 4942 } 4943 4944 data_ptr = element->addr + offset; 4945 while (skb_len) { 4946 data_len = min(skb_len, (int)(element->length - offset)); 4947 if (data_len) { 4948 if (use_rx_sg) { 4949 if (qeth_create_skb_frag(qethbuffer, element, 4950 &skb, offset, &frag, data_len)) 4951 goto no_mem; 4952 } else { 4953 memcpy(skb_put(skb, data_len), data_ptr, 4954 data_len); 4955 } 4956 } 4957 skb_len -= data_len; 4958 if (skb_len) { 4959 if (qeth_is_last_sbale(element)) { 4960 QETH_CARD_TEXT(card, 4, "unexeob"); 4961 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4962 dev_kfree_skb_any(skb); 4963 card->stats.rx_errors++; 4964 return NULL; 4965 } 4966 element++; 4967 offset = 0; 4968 data_ptr = element->addr; 4969 } else { 4970 offset += data_len; 4971 } 4972 } 4973 *__element = element; 4974 *__offset = offset; 4975 if (use_rx_sg && card->options.performance_stats) { 4976 card->perf_stats.sg_skbs_rx++; 4977 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4978 } 4979 return skb; 4980 no_mem: 4981 if (net_ratelimit()) { 4982 QETH_CARD_TEXT(card, 2, "noskbmem"); 4983 } 4984 card->stats.rx_dropped++; 4985 return NULL; 4986 } 4987 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4988 4989 static void qeth_unregister_dbf_views(void) 4990 { 4991 int x; 4992 for (x = 0; x < QETH_DBF_INFOS; x++) { 4993 debug_unregister(qeth_dbf[x].id); 4994 qeth_dbf[x].id = NULL; 4995 } 4996 } 4997 4998 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4999 { 5000 char dbf_txt_buf[32]; 5001 va_list args; 5002 5003 if (level > id->level) 5004 return; 5005 va_start(args, fmt); 5006 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 5007 va_end(args); 5008 debug_text_event(id, level, dbf_txt_buf); 5009 } 5010 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 5011 5012 static int qeth_register_dbf_views(void) 5013 { 5014 int ret; 5015 int x; 5016 5017 for (x = 0; x < QETH_DBF_INFOS; x++) { 5018 /* register the areas */ 5019 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 5020 qeth_dbf[x].pages, 5021 qeth_dbf[x].areas, 5022 qeth_dbf[x].len); 5023 if (qeth_dbf[x].id == NULL) { 5024 qeth_unregister_dbf_views(); 5025 return -ENOMEM; 5026 } 5027 5028 /* register a view */ 5029 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 5030 if (ret) { 5031 qeth_unregister_dbf_views(); 5032 return ret; 5033 } 5034 5035 /* set a passing level */ 5036 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 5037 } 5038 5039 return 0; 5040 } 5041 5042 int qeth_core_load_discipline(struct qeth_card *card, 5043 enum qeth_discipline_id discipline) 5044 { 5045 int rc = 0; 5046 mutex_lock(&qeth_mod_mutex); 5047 switch (discipline) { 5048 case QETH_DISCIPLINE_LAYER3: 5049 card->discipline.ccwgdriver = try_then_request_module( 5050 symbol_get(qeth_l3_ccwgroup_driver), 5051 "qeth_l3"); 5052 break; 5053 case QETH_DISCIPLINE_LAYER2: 5054 card->discipline.ccwgdriver = try_then_request_module( 5055 symbol_get(qeth_l2_ccwgroup_driver), 5056 "qeth_l2"); 5057 break; 5058 } 5059 if (!card->discipline.ccwgdriver) { 5060 dev_err(&card->gdev->dev, "There is no kernel module to " 5061 "support discipline %d\n", discipline); 5062 rc = -EINVAL; 5063 } 5064 mutex_unlock(&qeth_mod_mutex); 5065 return rc; 5066 } 5067 5068 void qeth_core_free_discipline(struct qeth_card *card) 5069 { 5070 if (card->options.layer2) 5071 symbol_put(qeth_l2_ccwgroup_driver); 5072 else 5073 symbol_put(qeth_l3_ccwgroup_driver); 5074 card->discipline.ccwgdriver = NULL; 5075 } 5076 5077 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 5078 { 5079 struct qeth_card *card; 5080 struct device *dev; 5081 int rc; 5082 unsigned long flags; 5083 char dbf_name[20]; 5084 5085 QETH_DBF_TEXT(SETUP, 2, "probedev"); 5086 5087 dev = &gdev->dev; 5088 if (!get_device(dev)) 5089 return -ENODEV; 5090 5091 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 5092 5093 card = qeth_alloc_card(); 5094 if (!card) { 5095 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 5096 rc = -ENOMEM; 5097 goto err_dev; 5098 } 5099 5100 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 5101 dev_name(&gdev->dev)); 5102 card->debug = debug_register(dbf_name, 2, 1, 8); 5103 if (!card->debug) { 5104 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 5105 rc = -ENOMEM; 5106 goto err_card; 5107 } 5108 debug_register_view(card->debug, &debug_hex_ascii_view); 5109 5110 card->read.ccwdev = gdev->cdev[0]; 5111 card->write.ccwdev = gdev->cdev[1]; 5112 card->data.ccwdev = gdev->cdev[2]; 5113 dev_set_drvdata(&gdev->dev, card); 5114 card->gdev = gdev; 5115 gdev->cdev[0]->handler = qeth_irq; 5116 gdev->cdev[1]->handler = qeth_irq; 5117 gdev->cdev[2]->handler = qeth_irq; 5118 5119 rc = qeth_determine_card_type(card); 5120 if (rc) { 5121 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 5122 goto err_dbf; 5123 } 5124 rc = qeth_setup_card(card); 5125 if (rc) { 5126 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 5127 goto err_dbf; 5128 } 5129 5130 if (card->info.type == QETH_CARD_TYPE_OSN) 5131 rc = qeth_core_create_osn_attributes(dev); 5132 else 5133 rc = qeth_core_create_device_attributes(dev); 5134 if (rc) 5135 goto err_dbf; 5136 switch (card->info.type) { 5137 case QETH_CARD_TYPE_OSN: 5138 case QETH_CARD_TYPE_OSM: 5139 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 5140 if (rc) 5141 goto err_attr; 5142 rc = card->discipline.ccwgdriver->probe(card->gdev); 5143 if (rc) 5144 goto err_disc; 5145 case QETH_CARD_TYPE_OSD: 5146 case QETH_CARD_TYPE_OSX: 5147 default: 5148 break; 5149 } 5150 5151 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5152 list_add_tail(&card->list, &qeth_core_card_list.list); 5153 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5154 5155 qeth_determine_capabilities(card); 5156 return 0; 5157 5158 err_disc: 5159 qeth_core_free_discipline(card); 5160 err_attr: 5161 if (card->info.type == QETH_CARD_TYPE_OSN) 5162 qeth_core_remove_osn_attributes(dev); 5163 else 5164 qeth_core_remove_device_attributes(dev); 5165 err_dbf: 5166 debug_unregister(card->debug); 5167 err_card: 5168 qeth_core_free_card(card); 5169 err_dev: 5170 put_device(dev); 5171 return rc; 5172 } 5173 5174 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 5175 { 5176 unsigned long flags; 5177 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5178 5179 QETH_DBF_TEXT(SETUP, 2, "removedv"); 5180 5181 if (card->info.type == QETH_CARD_TYPE_OSN) { 5182 qeth_core_remove_osn_attributes(&gdev->dev); 5183 } else { 5184 qeth_core_remove_device_attributes(&gdev->dev); 5185 } 5186 5187 if (card->discipline.ccwgdriver) { 5188 card->discipline.ccwgdriver->remove(gdev); 5189 qeth_core_free_discipline(card); 5190 } 5191 5192 debug_unregister(card->debug); 5193 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 5194 list_del(&card->list); 5195 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 5196 qeth_core_free_card(card); 5197 dev_set_drvdata(&gdev->dev, NULL); 5198 put_device(&gdev->dev); 5199 return; 5200 } 5201 5202 static int qeth_core_set_online(struct ccwgroup_device *gdev) 5203 { 5204 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5205 int rc = 0; 5206 int def_discipline; 5207 5208 if (!card->discipline.ccwgdriver) { 5209 if (card->info.type == QETH_CARD_TYPE_IQD) 5210 def_discipline = QETH_DISCIPLINE_LAYER3; 5211 else 5212 def_discipline = QETH_DISCIPLINE_LAYER2; 5213 rc = qeth_core_load_discipline(card, def_discipline); 5214 if (rc) 5215 goto err; 5216 rc = card->discipline.ccwgdriver->probe(card->gdev); 5217 if (rc) 5218 goto err; 5219 } 5220 rc = card->discipline.ccwgdriver->set_online(gdev); 5221 err: 5222 return rc; 5223 } 5224 5225 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 5226 { 5227 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5228 return card->discipline.ccwgdriver->set_offline(gdev); 5229 } 5230 5231 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 5232 { 5233 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5234 if (card->discipline.ccwgdriver && 5235 card->discipline.ccwgdriver->shutdown) 5236 card->discipline.ccwgdriver->shutdown(gdev); 5237 } 5238 5239 static int qeth_core_prepare(struct ccwgroup_device *gdev) 5240 { 5241 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5242 if (card->discipline.ccwgdriver && 5243 card->discipline.ccwgdriver->prepare) 5244 return card->discipline.ccwgdriver->prepare(gdev); 5245 return 0; 5246 } 5247 5248 static void qeth_core_complete(struct ccwgroup_device *gdev) 5249 { 5250 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5251 if (card->discipline.ccwgdriver && 5252 card->discipline.ccwgdriver->complete) 5253 card->discipline.ccwgdriver->complete(gdev); 5254 } 5255 5256 static int qeth_core_freeze(struct ccwgroup_device *gdev) 5257 { 5258 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5259 if (card->discipline.ccwgdriver && 5260 card->discipline.ccwgdriver->freeze) 5261 return card->discipline.ccwgdriver->freeze(gdev); 5262 return 0; 5263 } 5264 5265 static int qeth_core_thaw(struct ccwgroup_device *gdev) 5266 { 5267 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5268 if (card->discipline.ccwgdriver && 5269 card->discipline.ccwgdriver->thaw) 5270 return card->discipline.ccwgdriver->thaw(gdev); 5271 return 0; 5272 } 5273 5274 static int qeth_core_restore(struct ccwgroup_device *gdev) 5275 { 5276 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 5277 if (card->discipline.ccwgdriver && 5278 card->discipline.ccwgdriver->restore) 5279 return card->discipline.ccwgdriver->restore(gdev); 5280 return 0; 5281 } 5282 5283 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 5284 .driver = { 5285 .owner = THIS_MODULE, 5286 .name = "qeth", 5287 }, 5288 .driver_id = 0xD8C5E3C8, 5289 .probe = qeth_core_probe_device, 5290 .remove = qeth_core_remove_device, 5291 .set_online = qeth_core_set_online, 5292 .set_offline = qeth_core_set_offline, 5293 .shutdown = qeth_core_shutdown, 5294 .prepare = qeth_core_prepare, 5295 .complete = qeth_core_complete, 5296 .freeze = qeth_core_freeze, 5297 .thaw = qeth_core_thaw, 5298 .restore = qeth_core_restore, 5299 }; 5300 5301 static ssize_t 5302 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 5303 size_t count) 5304 { 5305 int err; 5306 err = qeth_core_driver_group(buf, qeth_core_root_dev, 5307 qeth_core_ccwgroup_driver.driver_id); 5308 if (err) 5309 return err; 5310 else 5311 return count; 5312 } 5313 5314 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 5315 5316 static struct { 5317 const char str[ETH_GSTRING_LEN]; 5318 } qeth_ethtool_stats_keys[] = { 5319 /* 0 */{"rx skbs"}, 5320 {"rx buffers"}, 5321 {"tx skbs"}, 5322 {"tx buffers"}, 5323 {"tx skbs no packing"}, 5324 {"tx buffers no packing"}, 5325 {"tx skbs packing"}, 5326 {"tx buffers packing"}, 5327 {"tx sg skbs"}, 5328 {"tx sg frags"}, 5329 /* 10 */{"rx sg skbs"}, 5330 {"rx sg frags"}, 5331 {"rx sg page allocs"}, 5332 {"tx large kbytes"}, 5333 {"tx large count"}, 5334 {"tx pk state ch n->p"}, 5335 {"tx pk state ch p->n"}, 5336 {"tx pk watermark low"}, 5337 {"tx pk watermark high"}, 5338 {"queue 0 buffer usage"}, 5339 /* 20 */{"queue 1 buffer usage"}, 5340 {"queue 2 buffer usage"}, 5341 {"queue 3 buffer usage"}, 5342 {"rx poll time"}, 5343 {"rx poll count"}, 5344 {"rx do_QDIO time"}, 5345 {"rx do_QDIO count"}, 5346 {"tx handler time"}, 5347 {"tx handler count"}, 5348 {"tx time"}, 5349 /* 30 */{"tx count"}, 5350 {"tx do_QDIO time"}, 5351 {"tx do_QDIO count"}, 5352 {"tx csum"}, 5353 {"tx lin"}, 5354 {"cq handler count"}, 5355 {"cq handler time"} 5356 }; 5357 5358 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 5359 { 5360 switch (stringset) { 5361 case ETH_SS_STATS: 5362 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 5363 default: 5364 return -EINVAL; 5365 } 5366 } 5367 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 5368 5369 void qeth_core_get_ethtool_stats(struct net_device *dev, 5370 struct ethtool_stats *stats, u64 *data) 5371 { 5372 struct qeth_card *card = dev->ml_priv; 5373 data[0] = card->stats.rx_packets - 5374 card->perf_stats.initial_rx_packets; 5375 data[1] = card->perf_stats.bufs_rec; 5376 data[2] = card->stats.tx_packets - 5377 card->perf_stats.initial_tx_packets; 5378 data[3] = card->perf_stats.bufs_sent; 5379 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 5380 - card->perf_stats.skbs_sent_pack; 5381 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 5382 data[6] = card->perf_stats.skbs_sent_pack; 5383 data[7] = card->perf_stats.bufs_sent_pack; 5384 data[8] = card->perf_stats.sg_skbs_sent; 5385 data[9] = card->perf_stats.sg_frags_sent; 5386 data[10] = card->perf_stats.sg_skbs_rx; 5387 data[11] = card->perf_stats.sg_frags_rx; 5388 data[12] = card->perf_stats.sg_alloc_page_rx; 5389 data[13] = (card->perf_stats.large_send_bytes >> 10); 5390 data[14] = card->perf_stats.large_send_cnt; 5391 data[15] = card->perf_stats.sc_dp_p; 5392 data[16] = card->perf_stats.sc_p_dp; 5393 data[17] = QETH_LOW_WATERMARK_PACK; 5394 data[18] = QETH_HIGH_WATERMARK_PACK; 5395 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 5396 data[20] = (card->qdio.no_out_queues > 1) ? 5397 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 5398 data[21] = (card->qdio.no_out_queues > 2) ? 5399 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 5400 data[22] = (card->qdio.no_out_queues > 3) ? 5401 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 5402 data[23] = card->perf_stats.inbound_time; 5403 data[24] = card->perf_stats.inbound_cnt; 5404 data[25] = card->perf_stats.inbound_do_qdio_time; 5405 data[26] = card->perf_stats.inbound_do_qdio_cnt; 5406 data[27] = card->perf_stats.outbound_handler_time; 5407 data[28] = card->perf_stats.outbound_handler_cnt; 5408 data[29] = card->perf_stats.outbound_time; 5409 data[30] = card->perf_stats.outbound_cnt; 5410 data[31] = card->perf_stats.outbound_do_qdio_time; 5411 data[32] = card->perf_stats.outbound_do_qdio_cnt; 5412 data[33] = card->perf_stats.tx_csum; 5413 data[34] = card->perf_stats.tx_lin; 5414 data[35] = card->perf_stats.cq_cnt; 5415 data[36] = card->perf_stats.cq_time; 5416 } 5417 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 5418 5419 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 5420 { 5421 switch (stringset) { 5422 case ETH_SS_STATS: 5423 memcpy(data, &qeth_ethtool_stats_keys, 5424 sizeof(qeth_ethtool_stats_keys)); 5425 break; 5426 default: 5427 WARN_ON(1); 5428 break; 5429 } 5430 } 5431 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 5432 5433 void qeth_core_get_drvinfo(struct net_device *dev, 5434 struct ethtool_drvinfo *info) 5435 { 5436 struct qeth_card *card = dev->ml_priv; 5437 if (card->options.layer2) 5438 strcpy(info->driver, "qeth_l2"); 5439 else 5440 strcpy(info->driver, "qeth_l3"); 5441 5442 strcpy(info->version, "1.0"); 5443 strcpy(info->fw_version, card->info.mcl_level); 5444 sprintf(info->bus_info, "%s/%s/%s", 5445 CARD_RDEV_ID(card), 5446 CARD_WDEV_ID(card), 5447 CARD_DDEV_ID(card)); 5448 } 5449 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 5450 5451 int qeth_core_ethtool_get_settings(struct net_device *netdev, 5452 struct ethtool_cmd *ecmd) 5453 { 5454 struct qeth_card *card = netdev->ml_priv; 5455 enum qeth_link_types link_type; 5456 5457 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 5458 link_type = QETH_LINK_TYPE_10GBIT_ETH; 5459 else 5460 link_type = card->info.link_type; 5461 5462 ecmd->transceiver = XCVR_INTERNAL; 5463 ecmd->supported = SUPPORTED_Autoneg; 5464 ecmd->advertising = ADVERTISED_Autoneg; 5465 ecmd->duplex = DUPLEX_FULL; 5466 ecmd->autoneg = AUTONEG_ENABLE; 5467 5468 switch (link_type) { 5469 case QETH_LINK_TYPE_FAST_ETH: 5470 case QETH_LINK_TYPE_LANE_ETH100: 5471 ecmd->supported |= SUPPORTED_10baseT_Half | 5472 SUPPORTED_10baseT_Full | 5473 SUPPORTED_100baseT_Half | 5474 SUPPORTED_100baseT_Full | 5475 SUPPORTED_TP; 5476 ecmd->advertising |= ADVERTISED_10baseT_Half | 5477 ADVERTISED_10baseT_Full | 5478 ADVERTISED_100baseT_Half | 5479 ADVERTISED_100baseT_Full | 5480 ADVERTISED_TP; 5481 ecmd->speed = SPEED_100; 5482 ecmd->port = PORT_TP; 5483 break; 5484 5485 case QETH_LINK_TYPE_GBIT_ETH: 5486 case QETH_LINK_TYPE_LANE_ETH1000: 5487 ecmd->supported |= SUPPORTED_10baseT_Half | 5488 SUPPORTED_10baseT_Full | 5489 SUPPORTED_100baseT_Half | 5490 SUPPORTED_100baseT_Full | 5491 SUPPORTED_1000baseT_Half | 5492 SUPPORTED_1000baseT_Full | 5493 SUPPORTED_FIBRE; 5494 ecmd->advertising |= ADVERTISED_10baseT_Half | 5495 ADVERTISED_10baseT_Full | 5496 ADVERTISED_100baseT_Half | 5497 ADVERTISED_100baseT_Full | 5498 ADVERTISED_1000baseT_Half | 5499 ADVERTISED_1000baseT_Full | 5500 ADVERTISED_FIBRE; 5501 ecmd->speed = SPEED_1000; 5502 ecmd->port = PORT_FIBRE; 5503 break; 5504 5505 case QETH_LINK_TYPE_10GBIT_ETH: 5506 ecmd->supported |= SUPPORTED_10baseT_Half | 5507 SUPPORTED_10baseT_Full | 5508 SUPPORTED_100baseT_Half | 5509 SUPPORTED_100baseT_Full | 5510 SUPPORTED_1000baseT_Half | 5511 SUPPORTED_1000baseT_Full | 5512 SUPPORTED_10000baseT_Full | 5513 SUPPORTED_FIBRE; 5514 ecmd->advertising |= ADVERTISED_10baseT_Half | 5515 ADVERTISED_10baseT_Full | 5516 ADVERTISED_100baseT_Half | 5517 ADVERTISED_100baseT_Full | 5518 ADVERTISED_1000baseT_Half | 5519 ADVERTISED_1000baseT_Full | 5520 ADVERTISED_10000baseT_Full | 5521 ADVERTISED_FIBRE; 5522 ecmd->speed = SPEED_10000; 5523 ecmd->port = PORT_FIBRE; 5524 break; 5525 5526 default: 5527 ecmd->supported |= SUPPORTED_10baseT_Half | 5528 SUPPORTED_10baseT_Full | 5529 SUPPORTED_TP; 5530 ecmd->advertising |= ADVERTISED_10baseT_Half | 5531 ADVERTISED_10baseT_Full | 5532 ADVERTISED_TP; 5533 ecmd->speed = SPEED_10; 5534 ecmd->port = PORT_TP; 5535 } 5536 5537 return 0; 5538 } 5539 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 5540 5541 static int __init qeth_core_init(void) 5542 { 5543 int rc; 5544 5545 pr_info("loading core functions\n"); 5546 INIT_LIST_HEAD(&qeth_core_card_list.list); 5547 rwlock_init(&qeth_core_card_list.rwlock); 5548 mutex_init(&qeth_mod_mutex); 5549 5550 rc = qeth_register_dbf_views(); 5551 if (rc) 5552 goto out_err; 5553 rc = ccw_driver_register(&qeth_ccw_driver); 5554 if (rc) 5555 goto ccw_err; 5556 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 5557 if (rc) 5558 goto ccwgroup_err; 5559 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 5560 &driver_attr_group); 5561 if (rc) 5562 goto driver_err; 5563 qeth_core_root_dev = root_device_register("qeth"); 5564 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 5565 if (rc) 5566 goto register_err; 5567 5568 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 5569 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 5570 if (!qeth_core_header_cache) { 5571 rc = -ENOMEM; 5572 goto slab_err; 5573 } 5574 5575 qeth_qdio_outbuf_cache = kmem_cache_create("qeth_buf", 5576 sizeof(struct qeth_qdio_out_buffer), 0, 0, NULL); 5577 if (!qeth_qdio_outbuf_cache) { 5578 rc = -ENOMEM; 5579 goto cqslab_err; 5580 } 5581 5582 return 0; 5583 cqslab_err: 5584 kmem_cache_destroy(qeth_core_header_cache); 5585 slab_err: 5586 root_device_unregister(qeth_core_root_dev); 5587 register_err: 5588 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 5589 &driver_attr_group); 5590 driver_err: 5591 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5592 ccwgroup_err: 5593 ccw_driver_unregister(&qeth_ccw_driver); 5594 ccw_err: 5595 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 5596 qeth_unregister_dbf_views(); 5597 out_err: 5598 pr_err("Initializing the qeth device driver failed\n"); 5599 return rc; 5600 } 5601 5602 static void __exit qeth_core_exit(void) 5603 { 5604 root_device_unregister(qeth_core_root_dev); 5605 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 5606 &driver_attr_group); 5607 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 5608 ccw_driver_unregister(&qeth_ccw_driver); 5609 kmem_cache_destroy(qeth_qdio_outbuf_cache); 5610 kmem_cache_destroy(qeth_core_header_cache); 5611 qeth_unregister_dbf_views(); 5612 pr_info("core functions removed\n"); 5613 } 5614 5615 module_init(qeth_core_init); 5616 module_exit(qeth_core_exit); 5617 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 5618 MODULE_DESCRIPTION("qeth core functions"); 5619 MODULE_LICENSE("GPL"); 5620