1 /* 2 * drivers/s390/net/qeth_core_main.c 3 * 4 * Copyright IBM Corp. 2007, 2009 5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>, 6 * Frank Pavlic <fpavlic@de.ibm.com>, 7 * Thomas Spatzier <tspat@de.ibm.com>, 8 * Frank Blaschka <frank.blaschka@de.ibm.com> 9 */ 10 11 #define KMSG_COMPONENT "qeth" 12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 13 14 #include <linux/module.h> 15 #include <linux/moduleparam.h> 16 #include <linux/string.h> 17 #include <linux/errno.h> 18 #include <linux/kernel.h> 19 #include <linux/ip.h> 20 #include <linux/tcp.h> 21 #include <linux/mii.h> 22 #include <linux/kthread.h> 23 #include <linux/slab.h> 24 25 #include <asm/ebcdic.h> 26 #include <asm/io.h> 27 28 #include "qeth_core.h" 29 30 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = { 31 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */ 32 /* N P A M L V H */ 33 [QETH_DBF_SETUP] = {"qeth_setup", 34 8, 1, 8, 5, &debug_hex_ascii_view, NULL}, 35 [QETH_DBF_MSG] = {"qeth_msg", 36 8, 1, 128, 3, &debug_sprintf_view, NULL}, 37 [QETH_DBF_CTRL] = {"qeth_control", 38 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL}, 39 }; 40 EXPORT_SYMBOL_GPL(qeth_dbf); 41 42 struct qeth_card_list_struct qeth_core_card_list; 43 EXPORT_SYMBOL_GPL(qeth_core_card_list); 44 struct kmem_cache *qeth_core_header_cache; 45 EXPORT_SYMBOL_GPL(qeth_core_header_cache); 46 47 static struct device *qeth_core_root_dev; 48 static unsigned int known_devices[][6] = QETH_MODELLIST_ARRAY; 49 static struct lock_class_key qdio_out_skb_queue_key; 50 51 static void qeth_send_control_data_cb(struct qeth_channel *, 52 struct qeth_cmd_buffer *); 53 static int qeth_issue_next_read(struct qeth_card *); 54 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *); 55 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32); 56 static void qeth_free_buffer_pool(struct qeth_card *); 57 static int qeth_qdio_establish(struct qeth_card *); 58 59 60 static inline const char *qeth_get_cardname(struct qeth_card *card) 61 { 62 if (card->info.guestlan) { 63 switch (card->info.type) { 64 case QETH_CARD_TYPE_OSD: 65 return " Guest LAN QDIO"; 66 case QETH_CARD_TYPE_IQD: 67 return " Guest LAN Hiper"; 68 case QETH_CARD_TYPE_OSM: 69 return " Guest LAN QDIO - OSM"; 70 case QETH_CARD_TYPE_OSX: 71 return " Guest LAN QDIO - OSX"; 72 default: 73 return " unknown"; 74 } 75 } else { 76 switch (card->info.type) { 77 case QETH_CARD_TYPE_OSD: 78 return " OSD Express"; 79 case QETH_CARD_TYPE_IQD: 80 return " HiperSockets"; 81 case QETH_CARD_TYPE_OSN: 82 return " OSN QDIO"; 83 case QETH_CARD_TYPE_OSM: 84 return " OSM QDIO"; 85 case QETH_CARD_TYPE_OSX: 86 return " OSX QDIO"; 87 default: 88 return " unknown"; 89 } 90 } 91 return " n/a"; 92 } 93 94 /* max length to be returned: 14 */ 95 const char *qeth_get_cardname_short(struct qeth_card *card) 96 { 97 if (card->info.guestlan) { 98 switch (card->info.type) { 99 case QETH_CARD_TYPE_OSD: 100 return "GuestLAN QDIO"; 101 case QETH_CARD_TYPE_IQD: 102 return "GuestLAN Hiper"; 103 case QETH_CARD_TYPE_OSM: 104 return "GuestLAN OSM"; 105 case QETH_CARD_TYPE_OSX: 106 return "GuestLAN OSX"; 107 default: 108 return "unknown"; 109 } 110 } else { 111 switch (card->info.type) { 112 case QETH_CARD_TYPE_OSD: 113 switch (card->info.link_type) { 114 case QETH_LINK_TYPE_FAST_ETH: 115 return "OSD_100"; 116 case QETH_LINK_TYPE_HSTR: 117 return "HSTR"; 118 case QETH_LINK_TYPE_GBIT_ETH: 119 return "OSD_1000"; 120 case QETH_LINK_TYPE_10GBIT_ETH: 121 return "OSD_10GIG"; 122 case QETH_LINK_TYPE_LANE_ETH100: 123 return "OSD_FE_LANE"; 124 case QETH_LINK_TYPE_LANE_TR: 125 return "OSD_TR_LANE"; 126 case QETH_LINK_TYPE_LANE_ETH1000: 127 return "OSD_GbE_LANE"; 128 case QETH_LINK_TYPE_LANE: 129 return "OSD_ATM_LANE"; 130 default: 131 return "OSD_Express"; 132 } 133 case QETH_CARD_TYPE_IQD: 134 return "HiperSockets"; 135 case QETH_CARD_TYPE_OSN: 136 return "OSN"; 137 case QETH_CARD_TYPE_OSM: 138 return "OSM_1000"; 139 case QETH_CARD_TYPE_OSX: 140 return "OSX_10GIG"; 141 default: 142 return "unknown"; 143 } 144 } 145 return "n/a"; 146 } 147 148 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads, 149 int clear_start_mask) 150 { 151 unsigned long flags; 152 153 spin_lock_irqsave(&card->thread_mask_lock, flags); 154 card->thread_allowed_mask = threads; 155 if (clear_start_mask) 156 card->thread_start_mask &= threads; 157 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 158 wake_up(&card->wait_q); 159 } 160 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads); 161 162 int qeth_threads_running(struct qeth_card *card, unsigned long threads) 163 { 164 unsigned long flags; 165 int rc = 0; 166 167 spin_lock_irqsave(&card->thread_mask_lock, flags); 168 rc = (card->thread_running_mask & threads); 169 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 170 return rc; 171 } 172 EXPORT_SYMBOL_GPL(qeth_threads_running); 173 174 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads) 175 { 176 return wait_event_interruptible(card->wait_q, 177 qeth_threads_running(card, threads) == 0); 178 } 179 EXPORT_SYMBOL_GPL(qeth_wait_for_threads); 180 181 void qeth_clear_working_pool_list(struct qeth_card *card) 182 { 183 struct qeth_buffer_pool_entry *pool_entry, *tmp; 184 185 QETH_CARD_TEXT(card, 5, "clwrklst"); 186 list_for_each_entry_safe(pool_entry, tmp, 187 &card->qdio.in_buf_pool.entry_list, list){ 188 list_del(&pool_entry->list); 189 } 190 } 191 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list); 192 193 static int qeth_alloc_buffer_pool(struct qeth_card *card) 194 { 195 struct qeth_buffer_pool_entry *pool_entry; 196 void *ptr; 197 int i, j; 198 199 QETH_CARD_TEXT(card, 5, "alocpool"); 200 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) { 201 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL); 202 if (!pool_entry) { 203 qeth_free_buffer_pool(card); 204 return -ENOMEM; 205 } 206 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) { 207 ptr = (void *) __get_free_page(GFP_KERNEL); 208 if (!ptr) { 209 while (j > 0) 210 free_page((unsigned long) 211 pool_entry->elements[--j]); 212 kfree(pool_entry); 213 qeth_free_buffer_pool(card); 214 return -ENOMEM; 215 } 216 pool_entry->elements[j] = ptr; 217 } 218 list_add(&pool_entry->init_list, 219 &card->qdio.init_pool.entry_list); 220 } 221 return 0; 222 } 223 224 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt) 225 { 226 QETH_CARD_TEXT(card, 2, "realcbp"); 227 228 if ((card->state != CARD_STATE_DOWN) && 229 (card->state != CARD_STATE_RECOVER)) 230 return -EPERM; 231 232 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */ 233 qeth_clear_working_pool_list(card); 234 qeth_free_buffer_pool(card); 235 card->qdio.in_buf_pool.buf_count = bufcnt; 236 card->qdio.init_pool.buf_count = bufcnt; 237 return qeth_alloc_buffer_pool(card); 238 } 239 EXPORT_SYMBOL_GPL(qeth_realloc_buffer_pool); 240 241 static int qeth_issue_next_read(struct qeth_card *card) 242 { 243 int rc; 244 struct qeth_cmd_buffer *iob; 245 246 QETH_CARD_TEXT(card, 5, "issnxrd"); 247 if (card->read.state != CH_STATE_UP) 248 return -EIO; 249 iob = qeth_get_buffer(&card->read); 250 if (!iob) { 251 dev_warn(&card->gdev->dev, "The qeth device driver " 252 "failed to recover an error on the device\n"); 253 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob " 254 "available\n", dev_name(&card->gdev->dev)); 255 return -ENOMEM; 256 } 257 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE); 258 QETH_CARD_TEXT(card, 6, "noirqpnd"); 259 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw, 260 (addr_t) iob, 0, 0); 261 if (rc) { 262 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! " 263 "rc=%i\n", dev_name(&card->gdev->dev), rc); 264 atomic_set(&card->read.irq_pending, 0); 265 card->read_or_write_problem = 1; 266 qeth_schedule_recovery(card); 267 wake_up(&card->wait_q); 268 } 269 return rc; 270 } 271 272 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card) 273 { 274 struct qeth_reply *reply; 275 276 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC); 277 if (reply) { 278 atomic_set(&reply->refcnt, 1); 279 atomic_set(&reply->received, 0); 280 reply->card = card; 281 }; 282 return reply; 283 } 284 285 static void qeth_get_reply(struct qeth_reply *reply) 286 { 287 WARN_ON(atomic_read(&reply->refcnt) <= 0); 288 atomic_inc(&reply->refcnt); 289 } 290 291 static void qeth_put_reply(struct qeth_reply *reply) 292 { 293 WARN_ON(atomic_read(&reply->refcnt) <= 0); 294 if (atomic_dec_and_test(&reply->refcnt)) 295 kfree(reply); 296 } 297 298 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc, 299 struct qeth_card *card) 300 { 301 char *ipa_name; 302 int com = cmd->hdr.command; 303 ipa_name = qeth_get_ipa_cmd_name(com); 304 if (rc) 305 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s/%s returned " 306 "x%X \"%s\"\n", 307 ipa_name, com, dev_name(&card->gdev->dev), 308 QETH_CARD_IFNAME(card), rc, 309 qeth_get_ipa_msg(rc)); 310 else 311 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s/%s succeeded\n", 312 ipa_name, com, dev_name(&card->gdev->dev), 313 QETH_CARD_IFNAME(card)); 314 } 315 316 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card, 317 struct qeth_cmd_buffer *iob) 318 { 319 struct qeth_ipa_cmd *cmd = NULL; 320 321 QETH_CARD_TEXT(card, 5, "chkipad"); 322 if (IS_IPA(iob->data)) { 323 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data); 324 if (IS_IPA_REPLY(cmd)) { 325 if (cmd->hdr.command != IPA_CMD_SETCCID && 326 cmd->hdr.command != IPA_CMD_DELCCID && 327 cmd->hdr.command != IPA_CMD_MODCCID && 328 cmd->hdr.command != IPA_CMD_SET_DIAG_ASS) 329 qeth_issue_ipa_msg(cmd, 330 cmd->hdr.return_code, card); 331 return cmd; 332 } else { 333 switch (cmd->hdr.command) { 334 case IPA_CMD_STOPLAN: 335 dev_warn(&card->gdev->dev, 336 "The link for interface %s on CHPID" 337 " 0x%X failed\n", 338 QETH_CARD_IFNAME(card), 339 card->info.chpid); 340 card->lan_online = 0; 341 if (card->dev && netif_carrier_ok(card->dev)) 342 netif_carrier_off(card->dev); 343 return NULL; 344 case IPA_CMD_STARTLAN: 345 dev_info(&card->gdev->dev, 346 "The link for %s on CHPID 0x%X has" 347 " been restored\n", 348 QETH_CARD_IFNAME(card), 349 card->info.chpid); 350 netif_carrier_on(card->dev); 351 card->lan_online = 1; 352 qeth_schedule_recovery(card); 353 return NULL; 354 case IPA_CMD_MODCCID: 355 return cmd; 356 case IPA_CMD_REGISTER_LOCAL_ADDR: 357 QETH_CARD_TEXT(card, 3, "irla"); 358 break; 359 case IPA_CMD_UNREGISTER_LOCAL_ADDR: 360 QETH_CARD_TEXT(card, 3, "urla"); 361 break; 362 default: 363 QETH_DBF_MESSAGE(2, "Received data is IPA " 364 "but not a reply!\n"); 365 break; 366 } 367 } 368 } 369 return cmd; 370 } 371 372 void qeth_clear_ipacmd_list(struct qeth_card *card) 373 { 374 struct qeth_reply *reply, *r; 375 unsigned long flags; 376 377 QETH_CARD_TEXT(card, 4, "clipalst"); 378 379 spin_lock_irqsave(&card->lock, flags); 380 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 381 qeth_get_reply(reply); 382 reply->rc = -EIO; 383 atomic_inc(&reply->received); 384 list_del_init(&reply->list); 385 wake_up(&reply->wait_q); 386 qeth_put_reply(reply); 387 } 388 spin_unlock_irqrestore(&card->lock, flags); 389 atomic_set(&card->write.irq_pending, 0); 390 } 391 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list); 392 393 static int qeth_check_idx_response(struct qeth_card *card, 394 unsigned char *buffer) 395 { 396 if (!buffer) 397 return 0; 398 399 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN); 400 if ((buffer[2] & 0xc0) == 0xc0) { 401 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE " 402 "with cause code 0x%02x%s\n", 403 buffer[4], 404 ((buffer[4] == 0x22) ? 405 " -- try another portname" : "")); 406 QETH_CARD_TEXT(card, 2, "ckidxres"); 407 QETH_CARD_TEXT(card, 2, " idxterm"); 408 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 409 if (buffer[4] == 0xf6) { 410 dev_err(&card->gdev->dev, 411 "The qeth device is not configured " 412 "for the OSI layer required by z/VM\n"); 413 return -EPERM; 414 } 415 return -EIO; 416 } 417 return 0; 418 } 419 420 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob, 421 __u32 len) 422 { 423 struct qeth_card *card; 424 425 card = CARD_FROM_CDEV(channel->ccwdev); 426 QETH_CARD_TEXT(card, 4, "setupccw"); 427 if (channel == &card->read) 428 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 429 else 430 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 431 channel->ccw.count = len; 432 channel->ccw.cda = (__u32) __pa(iob); 433 } 434 435 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel) 436 { 437 __u8 index; 438 439 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "getbuff"); 440 index = channel->io_buf_no; 441 do { 442 if (channel->iob[index].state == BUF_STATE_FREE) { 443 channel->iob[index].state = BUF_STATE_LOCKED; 444 channel->io_buf_no = (channel->io_buf_no + 1) % 445 QETH_CMD_BUFFER_NO; 446 memset(channel->iob[index].data, 0, QETH_BUFSIZE); 447 return channel->iob + index; 448 } 449 index = (index + 1) % QETH_CMD_BUFFER_NO; 450 } while (index != channel->io_buf_no); 451 452 return NULL; 453 } 454 455 void qeth_release_buffer(struct qeth_channel *channel, 456 struct qeth_cmd_buffer *iob) 457 { 458 unsigned long flags; 459 460 QETH_CARD_TEXT(CARD_FROM_CDEV(channel->ccwdev), 6, "relbuff"); 461 spin_lock_irqsave(&channel->iob_lock, flags); 462 memset(iob->data, 0, QETH_BUFSIZE); 463 iob->state = BUF_STATE_FREE; 464 iob->callback = qeth_send_control_data_cb; 465 iob->rc = 0; 466 spin_unlock_irqrestore(&channel->iob_lock, flags); 467 } 468 EXPORT_SYMBOL_GPL(qeth_release_buffer); 469 470 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel) 471 { 472 struct qeth_cmd_buffer *buffer = NULL; 473 unsigned long flags; 474 475 spin_lock_irqsave(&channel->iob_lock, flags); 476 buffer = __qeth_get_buffer(channel); 477 spin_unlock_irqrestore(&channel->iob_lock, flags); 478 return buffer; 479 } 480 481 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel) 482 { 483 struct qeth_cmd_buffer *buffer; 484 wait_event(channel->wait_q, 485 ((buffer = qeth_get_buffer(channel)) != NULL)); 486 return buffer; 487 } 488 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer); 489 490 void qeth_clear_cmd_buffers(struct qeth_channel *channel) 491 { 492 int cnt; 493 494 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 495 qeth_release_buffer(channel, &channel->iob[cnt]); 496 channel->buf_no = 0; 497 channel->io_buf_no = 0; 498 } 499 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers); 500 501 static void qeth_send_control_data_cb(struct qeth_channel *channel, 502 struct qeth_cmd_buffer *iob) 503 { 504 struct qeth_card *card; 505 struct qeth_reply *reply, *r; 506 struct qeth_ipa_cmd *cmd; 507 unsigned long flags; 508 int keep_reply; 509 int rc = 0; 510 511 card = CARD_FROM_CDEV(channel->ccwdev); 512 QETH_CARD_TEXT(card, 4, "sndctlcb"); 513 rc = qeth_check_idx_response(card, iob->data); 514 switch (rc) { 515 case 0: 516 break; 517 case -EIO: 518 qeth_clear_ipacmd_list(card); 519 qeth_schedule_recovery(card); 520 /* fall through */ 521 default: 522 goto out; 523 } 524 525 cmd = qeth_check_ipa_data(card, iob); 526 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN)) 527 goto out; 528 /*in case of OSN : check if cmd is set */ 529 if (card->info.type == QETH_CARD_TYPE_OSN && 530 cmd && 531 cmd->hdr.command != IPA_CMD_STARTLAN && 532 card->osn_info.assist_cb != NULL) { 533 card->osn_info.assist_cb(card->dev, cmd); 534 goto out; 535 } 536 537 spin_lock_irqsave(&card->lock, flags); 538 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) { 539 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) || 540 ((cmd) && (reply->seqno == cmd->hdr.seqno))) { 541 qeth_get_reply(reply); 542 list_del_init(&reply->list); 543 spin_unlock_irqrestore(&card->lock, flags); 544 keep_reply = 0; 545 if (reply->callback != NULL) { 546 if (cmd) { 547 reply->offset = (__u16)((char *)cmd - 548 (char *)iob->data); 549 keep_reply = reply->callback(card, 550 reply, 551 (unsigned long)cmd); 552 } else 553 keep_reply = reply->callback(card, 554 reply, 555 (unsigned long)iob); 556 } 557 if (cmd) 558 reply->rc = (u16) cmd->hdr.return_code; 559 else if (iob->rc) 560 reply->rc = iob->rc; 561 if (keep_reply) { 562 spin_lock_irqsave(&card->lock, flags); 563 list_add_tail(&reply->list, 564 &card->cmd_waiter_list); 565 spin_unlock_irqrestore(&card->lock, flags); 566 } else { 567 atomic_inc(&reply->received); 568 wake_up(&reply->wait_q); 569 } 570 qeth_put_reply(reply); 571 goto out; 572 } 573 } 574 spin_unlock_irqrestore(&card->lock, flags); 575 out: 576 memcpy(&card->seqno.pdu_hdr_ack, 577 QETH_PDU_HEADER_SEQ_NO(iob->data), 578 QETH_SEQ_NO_LENGTH); 579 qeth_release_buffer(channel, iob); 580 } 581 582 static int qeth_setup_channel(struct qeth_channel *channel) 583 { 584 int cnt; 585 586 QETH_DBF_TEXT(SETUP, 2, "setupch"); 587 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) { 588 channel->iob[cnt].data = 589 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL); 590 if (channel->iob[cnt].data == NULL) 591 break; 592 channel->iob[cnt].state = BUF_STATE_FREE; 593 channel->iob[cnt].channel = channel; 594 channel->iob[cnt].callback = qeth_send_control_data_cb; 595 channel->iob[cnt].rc = 0; 596 } 597 if (cnt < QETH_CMD_BUFFER_NO) { 598 while (cnt-- > 0) 599 kfree(channel->iob[cnt].data); 600 return -ENOMEM; 601 } 602 channel->buf_no = 0; 603 channel->io_buf_no = 0; 604 atomic_set(&channel->irq_pending, 0); 605 spin_lock_init(&channel->iob_lock); 606 607 init_waitqueue_head(&channel->wait_q); 608 return 0; 609 } 610 611 static int qeth_set_thread_start_bit(struct qeth_card *card, 612 unsigned long thread) 613 { 614 unsigned long flags; 615 616 spin_lock_irqsave(&card->thread_mask_lock, flags); 617 if (!(card->thread_allowed_mask & thread) || 618 (card->thread_start_mask & thread)) { 619 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 620 return -EPERM; 621 } 622 card->thread_start_mask |= thread; 623 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 624 return 0; 625 } 626 627 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread) 628 { 629 unsigned long flags; 630 631 spin_lock_irqsave(&card->thread_mask_lock, flags); 632 card->thread_start_mask &= ~thread; 633 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 634 wake_up(&card->wait_q); 635 } 636 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit); 637 638 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread) 639 { 640 unsigned long flags; 641 642 spin_lock_irqsave(&card->thread_mask_lock, flags); 643 card->thread_running_mask &= ~thread; 644 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 645 wake_up(&card->wait_q); 646 } 647 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit); 648 649 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 650 { 651 unsigned long flags; 652 int rc = 0; 653 654 spin_lock_irqsave(&card->thread_mask_lock, flags); 655 if (card->thread_start_mask & thread) { 656 if ((card->thread_allowed_mask & thread) && 657 !(card->thread_running_mask & thread)) { 658 rc = 1; 659 card->thread_start_mask &= ~thread; 660 card->thread_running_mask |= thread; 661 } else 662 rc = -EPERM; 663 } 664 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 665 return rc; 666 } 667 668 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread) 669 { 670 int rc = 0; 671 672 wait_event(card->wait_q, 673 (rc = __qeth_do_run_thread(card, thread)) >= 0); 674 return rc; 675 } 676 EXPORT_SYMBOL_GPL(qeth_do_run_thread); 677 678 void qeth_schedule_recovery(struct qeth_card *card) 679 { 680 QETH_CARD_TEXT(card, 2, "startrec"); 681 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0) 682 schedule_work(&card->kernel_thread_starter); 683 } 684 EXPORT_SYMBOL_GPL(qeth_schedule_recovery); 685 686 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb) 687 { 688 int dstat, cstat; 689 char *sense; 690 struct qeth_card *card; 691 692 sense = (char *) irb->ecw; 693 cstat = irb->scsw.cmd.cstat; 694 dstat = irb->scsw.cmd.dstat; 695 card = CARD_FROM_CDEV(cdev); 696 697 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK | 698 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK | 699 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) { 700 QETH_CARD_TEXT(card, 2, "CGENCHK"); 701 dev_warn(&cdev->dev, "The qeth device driver " 702 "failed to recover an error on the device\n"); 703 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x\n", 704 dev_name(&cdev->dev), dstat, cstat); 705 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET, 706 16, 1, irb, 64, 1); 707 return 1; 708 } 709 710 if (dstat & DEV_STAT_UNIT_CHECK) { 711 if (sense[SENSE_RESETTING_EVENT_BYTE] & 712 SENSE_RESETTING_EVENT_FLAG) { 713 QETH_CARD_TEXT(card, 2, "REVIND"); 714 return 1; 715 } 716 if (sense[SENSE_COMMAND_REJECT_BYTE] & 717 SENSE_COMMAND_REJECT_FLAG) { 718 QETH_CARD_TEXT(card, 2, "CMDREJi"); 719 return 1; 720 } 721 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) { 722 QETH_CARD_TEXT(card, 2, "AFFE"); 723 return 1; 724 } 725 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) { 726 QETH_CARD_TEXT(card, 2, "ZEROSEN"); 727 return 0; 728 } 729 QETH_CARD_TEXT(card, 2, "DGENCHK"); 730 return 1; 731 } 732 return 0; 733 } 734 735 static long __qeth_check_irb_error(struct ccw_device *cdev, 736 unsigned long intparm, struct irb *irb) 737 { 738 struct qeth_card *card; 739 740 card = CARD_FROM_CDEV(cdev); 741 742 if (!IS_ERR(irb)) 743 return 0; 744 745 switch (PTR_ERR(irb)) { 746 case -EIO: 747 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n", 748 dev_name(&cdev->dev)); 749 QETH_CARD_TEXT(card, 2, "ckirberr"); 750 QETH_CARD_TEXT_(card, 2, " rc%d", -EIO); 751 break; 752 case -ETIMEDOUT: 753 dev_warn(&cdev->dev, "A hardware operation timed out" 754 " on the device\n"); 755 QETH_CARD_TEXT(card, 2, "ckirberr"); 756 QETH_CARD_TEXT_(card, 2, " rc%d", -ETIMEDOUT); 757 if (intparm == QETH_RCD_PARM) { 758 if (card && (card->data.ccwdev == cdev)) { 759 card->data.state = CH_STATE_DOWN; 760 wake_up(&card->wait_q); 761 } 762 } 763 break; 764 default: 765 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n", 766 dev_name(&cdev->dev), PTR_ERR(irb)); 767 QETH_CARD_TEXT(card, 2, "ckirberr"); 768 QETH_CARD_TEXT(card, 2, " rc???"); 769 } 770 return PTR_ERR(irb); 771 } 772 773 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm, 774 struct irb *irb) 775 { 776 int rc; 777 int cstat, dstat; 778 struct qeth_cmd_buffer *buffer; 779 struct qeth_channel *channel; 780 struct qeth_card *card; 781 struct qeth_cmd_buffer *iob; 782 __u8 index; 783 784 if (__qeth_check_irb_error(cdev, intparm, irb)) 785 return; 786 cstat = irb->scsw.cmd.cstat; 787 dstat = irb->scsw.cmd.dstat; 788 789 card = CARD_FROM_CDEV(cdev); 790 if (!card) 791 return; 792 793 QETH_CARD_TEXT(card, 5, "irq"); 794 795 if (card->read.ccwdev == cdev) { 796 channel = &card->read; 797 QETH_CARD_TEXT(card, 5, "read"); 798 } else if (card->write.ccwdev == cdev) { 799 channel = &card->write; 800 QETH_CARD_TEXT(card, 5, "write"); 801 } else { 802 channel = &card->data; 803 QETH_CARD_TEXT(card, 5, "data"); 804 } 805 atomic_set(&channel->irq_pending, 0); 806 807 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC)) 808 channel->state = CH_STATE_STOPPED; 809 810 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC)) 811 channel->state = CH_STATE_HALTED; 812 813 /*let's wake up immediately on data channel*/ 814 if ((channel == &card->data) && (intparm != 0) && 815 (intparm != QETH_RCD_PARM)) 816 goto out; 817 818 if (intparm == QETH_CLEAR_CHANNEL_PARM) { 819 QETH_CARD_TEXT(card, 6, "clrchpar"); 820 /* we don't have to handle this further */ 821 intparm = 0; 822 } 823 if (intparm == QETH_HALT_CHANNEL_PARM) { 824 QETH_CARD_TEXT(card, 6, "hltchpar"); 825 /* we don't have to handle this further */ 826 intparm = 0; 827 } 828 if ((dstat & DEV_STAT_UNIT_EXCEP) || 829 (dstat & DEV_STAT_UNIT_CHECK) || 830 (cstat)) { 831 if (irb->esw.esw0.erw.cons) { 832 dev_warn(&channel->ccwdev->dev, 833 "The qeth device driver failed to recover " 834 "an error on the device\n"); 835 QETH_DBF_MESSAGE(2, "%s sense data available. cstat " 836 "0x%X dstat 0x%X\n", 837 dev_name(&channel->ccwdev->dev), cstat, dstat); 838 print_hex_dump(KERN_WARNING, "qeth: irb ", 839 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1); 840 print_hex_dump(KERN_WARNING, "qeth: sense data ", 841 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1); 842 } 843 if (intparm == QETH_RCD_PARM) { 844 channel->state = CH_STATE_DOWN; 845 goto out; 846 } 847 rc = qeth_get_problem(cdev, irb); 848 if (rc) { 849 qeth_clear_ipacmd_list(card); 850 qeth_schedule_recovery(card); 851 goto out; 852 } 853 } 854 855 if (intparm == QETH_RCD_PARM) { 856 channel->state = CH_STATE_RCD_DONE; 857 goto out; 858 } 859 if (intparm) { 860 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm); 861 buffer->state = BUF_STATE_PROCESSED; 862 } 863 if (channel == &card->data) 864 return; 865 if (channel == &card->read && 866 channel->state == CH_STATE_UP) 867 qeth_issue_next_read(card); 868 869 iob = channel->iob; 870 index = channel->buf_no; 871 while (iob[index].state == BUF_STATE_PROCESSED) { 872 if (iob[index].callback != NULL) 873 iob[index].callback(channel, iob + index); 874 875 index = (index + 1) % QETH_CMD_BUFFER_NO; 876 } 877 channel->buf_no = index; 878 out: 879 wake_up(&card->wait_q); 880 return; 881 } 882 883 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, 884 struct qeth_qdio_out_buffer *buf) 885 { 886 int i; 887 struct sk_buff *skb; 888 889 /* is PCI flag set on buffer? */ 890 if (buf->buffer->element[0].flags & 0x40) 891 atomic_dec(&queue->set_pci_flags_count); 892 893 skb = skb_dequeue(&buf->skb_list); 894 while (skb) { 895 atomic_dec(&skb->users); 896 dev_kfree_skb_any(skb); 897 skb = skb_dequeue(&buf->skb_list); 898 } 899 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) { 900 if (buf->buffer->element[i].addr && buf->is_header[i]) 901 kmem_cache_free(qeth_core_header_cache, 902 buf->buffer->element[i].addr); 903 buf->is_header[i] = 0; 904 buf->buffer->element[i].length = 0; 905 buf->buffer->element[i].addr = NULL; 906 buf->buffer->element[i].flags = 0; 907 } 908 buf->buffer->element[15].flags = 0; 909 buf->next_element_to_fill = 0; 910 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); 911 } 912 913 void qeth_clear_qdio_buffers(struct qeth_card *card) 914 { 915 int i, j; 916 917 QETH_CARD_TEXT(card, 2, "clearqdbf"); 918 /* clear outbound buffers to free skbs */ 919 for (i = 0; i < card->qdio.no_out_queues; ++i) 920 if (card->qdio.out_qs[i]) { 921 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 922 qeth_clear_output_buffer(card->qdio.out_qs[i], 923 &card->qdio.out_qs[i]->bufs[j]); 924 } 925 } 926 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers); 927 928 static void qeth_free_buffer_pool(struct qeth_card *card) 929 { 930 struct qeth_buffer_pool_entry *pool_entry, *tmp; 931 int i = 0; 932 list_for_each_entry_safe(pool_entry, tmp, 933 &card->qdio.init_pool.entry_list, init_list){ 934 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) 935 free_page((unsigned long)pool_entry->elements[i]); 936 list_del(&pool_entry->init_list); 937 kfree(pool_entry); 938 } 939 } 940 941 static void qeth_free_qdio_buffers(struct qeth_card *card) 942 { 943 int i, j; 944 945 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) == 946 QETH_QDIO_UNINITIALIZED) 947 return; 948 kfree(card->qdio.in_q); 949 card->qdio.in_q = NULL; 950 /* inbound buffer pool */ 951 qeth_free_buffer_pool(card); 952 /* free outbound qdio_qs */ 953 if (card->qdio.out_qs) { 954 for (i = 0; i < card->qdio.no_out_queues; ++i) { 955 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) 956 qeth_clear_output_buffer(card->qdio.out_qs[i], 957 &card->qdio.out_qs[i]->bufs[j]); 958 kfree(card->qdio.out_qs[i]); 959 } 960 kfree(card->qdio.out_qs); 961 card->qdio.out_qs = NULL; 962 } 963 } 964 965 static void qeth_clean_channel(struct qeth_channel *channel) 966 { 967 int cnt; 968 969 QETH_DBF_TEXT(SETUP, 2, "freech"); 970 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) 971 kfree(channel->iob[cnt].data); 972 } 973 974 static void qeth_get_channel_path_desc(struct qeth_card *card) 975 { 976 struct ccw_device *ccwdev; 977 struct channelPath_dsc { 978 u8 flags; 979 u8 lsn; 980 u8 desc; 981 u8 chpid; 982 u8 swla; 983 u8 zeroes; 984 u8 chla; 985 u8 chpp; 986 } *chp_dsc; 987 988 QETH_DBF_TEXT(SETUP, 2, "chp_desc"); 989 990 ccwdev = card->data.ccwdev; 991 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); 992 if (chp_dsc != NULL) { 993 /* CHPP field bit 6 == 1 -> single queue */ 994 if ((chp_dsc->chpp & 0x02) == 0x02) { 995 if ((atomic_read(&card->qdio.state) != 996 QETH_QDIO_UNINITIALIZED) && 997 (card->qdio.no_out_queues == 4)) 998 /* change from 4 to 1 outbound queues */ 999 qeth_free_qdio_buffers(card); 1000 card->qdio.no_out_queues = 1; 1001 if (card->qdio.default_out_queue != 0) 1002 dev_info(&card->gdev->dev, 1003 "Priority Queueing not supported\n"); 1004 card->qdio.default_out_queue = 0; 1005 } else { 1006 if ((atomic_read(&card->qdio.state) != 1007 QETH_QDIO_UNINITIALIZED) && 1008 (card->qdio.no_out_queues == 1)) { 1009 /* change from 1 to 4 outbound queues */ 1010 qeth_free_qdio_buffers(card); 1011 card->qdio.default_out_queue = 2; 1012 } 1013 card->qdio.no_out_queues = 4; 1014 } 1015 card->info.func_level = 0x4100 + chp_dsc->desc; 1016 kfree(chp_dsc); 1017 } 1018 QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); 1019 QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); 1020 return; 1021 } 1022 1023 static void qeth_init_qdio_info(struct qeth_card *card) 1024 { 1025 QETH_DBF_TEXT(SETUP, 4, "intqdinf"); 1026 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 1027 /* inbound */ 1028 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1029 if (card->info.type == QETH_CARD_TYPE_IQD) 1030 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_HSDEFAULT; 1031 else 1032 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT; 1033 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count; 1034 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list); 1035 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list); 1036 } 1037 1038 static void qeth_set_intial_options(struct qeth_card *card) 1039 { 1040 card->options.route4.type = NO_ROUTER; 1041 card->options.route6.type = NO_ROUTER; 1042 card->options.checksum_type = QETH_CHECKSUM_DEFAULT; 1043 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS; 1044 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL; 1045 card->options.fake_broadcast = 0; 1046 card->options.add_hhlen = DEFAULT_ADD_HHLEN; 1047 card->options.performance_stats = 0; 1048 card->options.rx_sg_cb = QETH_RX_SG_CB; 1049 card->options.isolation = ISOLATION_MODE_NONE; 1050 } 1051 1052 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread) 1053 { 1054 unsigned long flags; 1055 int rc = 0; 1056 1057 spin_lock_irqsave(&card->thread_mask_lock, flags); 1058 QETH_CARD_TEXT_(card, 4, " %02x%02x%02x", 1059 (u8) card->thread_start_mask, 1060 (u8) card->thread_allowed_mask, 1061 (u8) card->thread_running_mask); 1062 rc = (card->thread_start_mask & thread); 1063 spin_unlock_irqrestore(&card->thread_mask_lock, flags); 1064 return rc; 1065 } 1066 1067 static void qeth_start_kernel_thread(struct work_struct *work) 1068 { 1069 struct qeth_card *card = container_of(work, struct qeth_card, 1070 kernel_thread_starter); 1071 QETH_CARD_TEXT(card , 2, "strthrd"); 1072 1073 if (card->read.state != CH_STATE_UP && 1074 card->write.state != CH_STATE_UP) 1075 return; 1076 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD)) 1077 kthread_run(card->discipline.recover, (void *) card, 1078 "qeth_recover"); 1079 } 1080 1081 static int qeth_setup_card(struct qeth_card *card) 1082 { 1083 1084 QETH_DBF_TEXT(SETUP, 2, "setupcrd"); 1085 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1086 1087 card->read.state = CH_STATE_DOWN; 1088 card->write.state = CH_STATE_DOWN; 1089 card->data.state = CH_STATE_DOWN; 1090 card->state = CARD_STATE_DOWN; 1091 card->lan_online = 0; 1092 card->read_or_write_problem = 0; 1093 card->dev = NULL; 1094 spin_lock_init(&card->vlanlock); 1095 spin_lock_init(&card->mclock); 1096 card->vlangrp = NULL; 1097 spin_lock_init(&card->lock); 1098 spin_lock_init(&card->ip_lock); 1099 spin_lock_init(&card->thread_mask_lock); 1100 mutex_init(&card->conf_mutex); 1101 mutex_init(&card->discipline_mutex); 1102 card->thread_start_mask = 0; 1103 card->thread_allowed_mask = 0; 1104 card->thread_running_mask = 0; 1105 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread); 1106 INIT_LIST_HEAD(&card->ip_list); 1107 INIT_LIST_HEAD(card->ip_tbd_list); 1108 INIT_LIST_HEAD(&card->cmd_waiter_list); 1109 init_waitqueue_head(&card->wait_q); 1110 /* intial options */ 1111 qeth_set_intial_options(card); 1112 /* IP address takeover */ 1113 INIT_LIST_HEAD(&card->ipato.entries); 1114 card->ipato.enabled = 0; 1115 card->ipato.invert4 = 0; 1116 card->ipato.invert6 = 0; 1117 /* init QDIO stuff */ 1118 qeth_init_qdio_info(card); 1119 return 0; 1120 } 1121 1122 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr) 1123 { 1124 struct qeth_card *card = container_of(slr, struct qeth_card, 1125 qeth_service_level); 1126 if (card->info.mcl_level[0]) 1127 seq_printf(m, "qeth: %s firmware level %s\n", 1128 CARD_BUS_ID(card), card->info.mcl_level); 1129 } 1130 1131 static struct qeth_card *qeth_alloc_card(void) 1132 { 1133 struct qeth_card *card; 1134 1135 QETH_DBF_TEXT(SETUP, 2, "alloccrd"); 1136 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL); 1137 if (!card) 1138 goto out; 1139 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 1140 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL); 1141 if (!card->ip_tbd_list) { 1142 QETH_DBF_TEXT(SETUP, 0, "iptbdnom"); 1143 goto out_card; 1144 } 1145 if (qeth_setup_channel(&card->read)) 1146 goto out_ip; 1147 if (qeth_setup_channel(&card->write)) 1148 goto out_channel; 1149 card->options.layer2 = -1; 1150 card->qeth_service_level.seq_print = qeth_core_sl_print; 1151 register_service_level(&card->qeth_service_level); 1152 return card; 1153 1154 out_channel: 1155 qeth_clean_channel(&card->read); 1156 out_ip: 1157 kfree(card->ip_tbd_list); 1158 out_card: 1159 kfree(card); 1160 out: 1161 return NULL; 1162 } 1163 1164 static int qeth_determine_card_type(struct qeth_card *card) 1165 { 1166 int i = 0; 1167 1168 QETH_DBF_TEXT(SETUP, 2, "detcdtyp"); 1169 1170 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT; 1171 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE; 1172 while (known_devices[i][QETH_DEV_MODEL_IND]) { 1173 if ((CARD_RDEV(card)->id.dev_type == 1174 known_devices[i][QETH_DEV_TYPE_IND]) && 1175 (CARD_RDEV(card)->id.dev_model == 1176 known_devices[i][QETH_DEV_MODEL_IND])) { 1177 card->info.type = known_devices[i][QETH_DEV_MODEL_IND]; 1178 card->qdio.no_out_queues = 1179 known_devices[i][QETH_QUEUE_NO_IND]; 1180 card->info.is_multicast_different = 1181 known_devices[i][QETH_MULTICAST_IND]; 1182 qeth_get_channel_path_desc(card); 1183 return 0; 1184 } 1185 i++; 1186 } 1187 card->info.type = QETH_CARD_TYPE_UNKNOWN; 1188 dev_err(&card->gdev->dev, "The adapter hardware is of an " 1189 "unknown type\n"); 1190 return -ENOENT; 1191 } 1192 1193 static int qeth_clear_channel(struct qeth_channel *channel) 1194 { 1195 unsigned long flags; 1196 struct qeth_card *card; 1197 int rc; 1198 1199 card = CARD_FROM_CDEV(channel->ccwdev); 1200 QETH_CARD_TEXT(card, 3, "clearch"); 1201 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1202 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM); 1203 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1204 1205 if (rc) 1206 return rc; 1207 rc = wait_event_interruptible_timeout(card->wait_q, 1208 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT); 1209 if (rc == -ERESTARTSYS) 1210 return rc; 1211 if (channel->state != CH_STATE_STOPPED) 1212 return -ETIME; 1213 channel->state = CH_STATE_DOWN; 1214 return 0; 1215 } 1216 1217 static int qeth_halt_channel(struct qeth_channel *channel) 1218 { 1219 unsigned long flags; 1220 struct qeth_card *card; 1221 int rc; 1222 1223 card = CARD_FROM_CDEV(channel->ccwdev); 1224 QETH_CARD_TEXT(card, 3, "haltch"); 1225 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1226 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM); 1227 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1228 1229 if (rc) 1230 return rc; 1231 rc = wait_event_interruptible_timeout(card->wait_q, 1232 channel->state == CH_STATE_HALTED, QETH_TIMEOUT); 1233 if (rc == -ERESTARTSYS) 1234 return rc; 1235 if (channel->state != CH_STATE_HALTED) 1236 return -ETIME; 1237 return 0; 1238 } 1239 1240 static int qeth_halt_channels(struct qeth_card *card) 1241 { 1242 int rc1 = 0, rc2 = 0, rc3 = 0; 1243 1244 QETH_CARD_TEXT(card, 3, "haltchs"); 1245 rc1 = qeth_halt_channel(&card->read); 1246 rc2 = qeth_halt_channel(&card->write); 1247 rc3 = qeth_halt_channel(&card->data); 1248 if (rc1) 1249 return rc1; 1250 if (rc2) 1251 return rc2; 1252 return rc3; 1253 } 1254 1255 static int qeth_clear_channels(struct qeth_card *card) 1256 { 1257 int rc1 = 0, rc2 = 0, rc3 = 0; 1258 1259 QETH_CARD_TEXT(card, 3, "clearchs"); 1260 rc1 = qeth_clear_channel(&card->read); 1261 rc2 = qeth_clear_channel(&card->write); 1262 rc3 = qeth_clear_channel(&card->data); 1263 if (rc1) 1264 return rc1; 1265 if (rc2) 1266 return rc2; 1267 return rc3; 1268 } 1269 1270 static int qeth_clear_halt_card(struct qeth_card *card, int halt) 1271 { 1272 int rc = 0; 1273 1274 QETH_CARD_TEXT(card, 3, "clhacrd"); 1275 1276 if (halt) 1277 rc = qeth_halt_channels(card); 1278 if (rc) 1279 return rc; 1280 return qeth_clear_channels(card); 1281 } 1282 1283 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt) 1284 { 1285 int rc = 0; 1286 1287 QETH_CARD_TEXT(card, 3, "qdioclr"); 1288 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED, 1289 QETH_QDIO_CLEANING)) { 1290 case QETH_QDIO_ESTABLISHED: 1291 if (card->info.type == QETH_CARD_TYPE_IQD) 1292 rc = qdio_shutdown(CARD_DDEV(card), 1293 QDIO_FLAG_CLEANUP_USING_HALT); 1294 else 1295 rc = qdio_shutdown(CARD_DDEV(card), 1296 QDIO_FLAG_CLEANUP_USING_CLEAR); 1297 if (rc) 1298 QETH_CARD_TEXT_(card, 3, "1err%d", rc); 1299 qdio_free(CARD_DDEV(card)); 1300 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 1301 break; 1302 case QETH_QDIO_CLEANING: 1303 return rc; 1304 default: 1305 break; 1306 } 1307 rc = qeth_clear_halt_card(card, use_halt); 1308 if (rc) 1309 QETH_CARD_TEXT_(card, 3, "2err%d", rc); 1310 card->state = CARD_STATE_DOWN; 1311 return rc; 1312 } 1313 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card); 1314 1315 static int qeth_read_conf_data(struct qeth_card *card, void **buffer, 1316 int *length) 1317 { 1318 struct ciw *ciw; 1319 char *rcd_buf; 1320 int ret; 1321 struct qeth_channel *channel = &card->data; 1322 unsigned long flags; 1323 1324 /* 1325 * scan for RCD command in extended SenseID data 1326 */ 1327 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD); 1328 if (!ciw || ciw->cmd == 0) 1329 return -EOPNOTSUPP; 1330 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA); 1331 if (!rcd_buf) 1332 return -ENOMEM; 1333 1334 channel->ccw.cmd_code = ciw->cmd; 1335 channel->ccw.cda = (__u32) __pa(rcd_buf); 1336 channel->ccw.count = ciw->count; 1337 channel->ccw.flags = CCW_FLAG_SLI; 1338 channel->state = CH_STATE_RCD; 1339 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1340 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw, 1341 QETH_RCD_PARM, LPM_ANYPATH, 0, 1342 QETH_RCD_TIMEOUT); 1343 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1344 if (!ret) 1345 wait_event(card->wait_q, 1346 (channel->state == CH_STATE_RCD_DONE || 1347 channel->state == CH_STATE_DOWN)); 1348 if (channel->state == CH_STATE_DOWN) 1349 ret = -EIO; 1350 else 1351 channel->state = CH_STATE_DOWN; 1352 if (ret) { 1353 kfree(rcd_buf); 1354 *buffer = NULL; 1355 *length = 0; 1356 } else { 1357 *length = ciw->count; 1358 *buffer = rcd_buf; 1359 } 1360 return ret; 1361 } 1362 1363 static void qeth_configure_unitaddr(struct qeth_card *card, char *prcd) 1364 { 1365 QETH_DBF_TEXT(SETUP, 2, "cfgunit"); 1366 card->info.chpid = prcd[30]; 1367 card->info.unit_addr2 = prcd[31]; 1368 card->info.cula = prcd[63]; 1369 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) && 1370 (prcd[0x11] == _ascebc['M'])); 1371 } 1372 1373 static void qeth_configure_blkt_default(struct qeth_card *card, char *prcd) 1374 { 1375 QETH_DBF_TEXT(SETUP, 2, "cfgblkt"); 1376 1377 if (prcd[74] == 0xF0 && prcd[75] == 0xF0 && prcd[76] == 0xF5) { 1378 card->info.blkt.time_total = 250; 1379 card->info.blkt.inter_packet = 5; 1380 card->info.blkt.inter_packet_jumbo = 15; 1381 } else { 1382 card->info.blkt.time_total = 0; 1383 card->info.blkt.inter_packet = 0; 1384 card->info.blkt.inter_packet_jumbo = 0; 1385 } 1386 } 1387 1388 static void qeth_init_tokens(struct qeth_card *card) 1389 { 1390 card->token.issuer_rm_w = 0x00010103UL; 1391 card->token.cm_filter_w = 0x00010108UL; 1392 card->token.cm_connection_w = 0x0001010aUL; 1393 card->token.ulp_filter_w = 0x0001010bUL; 1394 card->token.ulp_connection_w = 0x0001010dUL; 1395 } 1396 1397 static void qeth_init_func_level(struct qeth_card *card) 1398 { 1399 switch (card->info.type) { 1400 case QETH_CARD_TYPE_IQD: 1401 card->info.func_level = QETH_IDX_FUNC_LEVEL_IQD; 1402 break; 1403 case QETH_CARD_TYPE_OSD: 1404 case QETH_CARD_TYPE_OSN: 1405 card->info.func_level = QETH_IDX_FUNC_LEVEL_OSD; 1406 break; 1407 default: 1408 break; 1409 } 1410 } 1411 1412 static int qeth_idx_activate_get_answer(struct qeth_channel *channel, 1413 void (*idx_reply_cb)(struct qeth_channel *, 1414 struct qeth_cmd_buffer *)) 1415 { 1416 struct qeth_cmd_buffer *iob; 1417 unsigned long flags; 1418 int rc; 1419 struct qeth_card *card; 1420 1421 QETH_DBF_TEXT(SETUP, 2, "idxanswr"); 1422 card = CARD_FROM_CDEV(channel->ccwdev); 1423 iob = qeth_get_buffer(channel); 1424 iob->callback = idx_reply_cb; 1425 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1)); 1426 channel->ccw.count = QETH_BUFSIZE; 1427 channel->ccw.cda = (__u32) __pa(iob->data); 1428 1429 wait_event(card->wait_q, 1430 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1431 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1432 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1433 rc = ccw_device_start(channel->ccwdev, 1434 &channel->ccw, (addr_t) iob, 0, 0); 1435 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1436 1437 if (rc) { 1438 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc); 1439 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 1440 atomic_set(&channel->irq_pending, 0); 1441 wake_up(&card->wait_q); 1442 return rc; 1443 } 1444 rc = wait_event_interruptible_timeout(card->wait_q, 1445 channel->state == CH_STATE_UP, QETH_TIMEOUT); 1446 if (rc == -ERESTARTSYS) 1447 return rc; 1448 if (channel->state != CH_STATE_UP) { 1449 rc = -ETIME; 1450 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 1451 qeth_clear_cmd_buffers(channel); 1452 } else 1453 rc = 0; 1454 return rc; 1455 } 1456 1457 static int qeth_idx_activate_channel(struct qeth_channel *channel, 1458 void (*idx_reply_cb)(struct qeth_channel *, 1459 struct qeth_cmd_buffer *)) 1460 { 1461 struct qeth_card *card; 1462 struct qeth_cmd_buffer *iob; 1463 unsigned long flags; 1464 __u16 temp; 1465 __u8 tmp; 1466 int rc; 1467 struct ccw_dev_id temp_devid; 1468 1469 card = CARD_FROM_CDEV(channel->ccwdev); 1470 1471 QETH_DBF_TEXT(SETUP, 2, "idxactch"); 1472 1473 iob = qeth_get_buffer(channel); 1474 iob->callback = idx_reply_cb; 1475 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1)); 1476 channel->ccw.count = IDX_ACTIVATE_SIZE; 1477 channel->ccw.cda = (__u32) __pa(iob->data); 1478 if (channel == &card->write) { 1479 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE); 1480 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1481 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1482 card->seqno.trans_hdr++; 1483 } else { 1484 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE); 1485 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1486 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1487 } 1488 tmp = ((__u8)card->info.portno) | 0x80; 1489 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1); 1490 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1491 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH); 1492 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data), 1493 &card->info.func_level, sizeof(__u16)); 1494 ccw_device_get_id(CARD_DDEV(card), &temp_devid); 1495 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2); 1496 temp = (card->info.cula << 8) + card->info.unit_addr2; 1497 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2); 1498 1499 wait_event(card->wait_q, 1500 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0); 1501 QETH_DBF_TEXT(SETUP, 6, "noirqpnd"); 1502 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags); 1503 rc = ccw_device_start(channel->ccwdev, 1504 &channel->ccw, (addr_t) iob, 0, 0); 1505 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags); 1506 1507 if (rc) { 1508 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n", 1509 rc); 1510 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 1511 atomic_set(&channel->irq_pending, 0); 1512 wake_up(&card->wait_q); 1513 return rc; 1514 } 1515 rc = wait_event_interruptible_timeout(card->wait_q, 1516 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT); 1517 if (rc == -ERESTARTSYS) 1518 return rc; 1519 if (channel->state != CH_STATE_ACTIVATING) { 1520 dev_warn(&channel->ccwdev->dev, "The qeth device driver" 1521 " failed to recover an error on the device\n"); 1522 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n", 1523 dev_name(&channel->ccwdev->dev)); 1524 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME); 1525 qeth_clear_cmd_buffers(channel); 1526 return -ETIME; 1527 } 1528 return qeth_idx_activate_get_answer(channel, idx_reply_cb); 1529 } 1530 1531 static int qeth_peer_func_level(int level) 1532 { 1533 if ((level & 0xff) == 8) 1534 return (level & 0xff) + 0x400; 1535 if (((level >> 8) & 3) == 1) 1536 return (level & 0xff) + 0x200; 1537 return level; 1538 } 1539 1540 static void qeth_idx_write_cb(struct qeth_channel *channel, 1541 struct qeth_cmd_buffer *iob) 1542 { 1543 struct qeth_card *card; 1544 __u16 temp; 1545 1546 QETH_DBF_TEXT(SETUP , 2, "idxwrcb"); 1547 1548 if (channel->state == CH_STATE_DOWN) { 1549 channel->state = CH_STATE_ACTIVATING; 1550 goto out; 1551 } 1552 card = CARD_FROM_CDEV(channel->ccwdev); 1553 1554 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1555 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == QETH_IDX_ACT_ERR_EXCL) 1556 dev_err(&card->write.ccwdev->dev, 1557 "The adapter is used exclusively by another " 1558 "host\n"); 1559 else 1560 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:" 1561 " negative reply\n", 1562 dev_name(&card->write.ccwdev->dev)); 1563 goto out; 1564 } 1565 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1566 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) { 1567 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: " 1568 "function level mismatch (sent: 0x%x, received: " 1569 "0x%x)\n", dev_name(&card->write.ccwdev->dev), 1570 card->info.func_level, temp); 1571 goto out; 1572 } 1573 channel->state = CH_STATE_UP; 1574 out: 1575 qeth_release_buffer(channel, iob); 1576 } 1577 1578 static void qeth_idx_read_cb(struct qeth_channel *channel, 1579 struct qeth_cmd_buffer *iob) 1580 { 1581 struct qeth_card *card; 1582 __u16 temp; 1583 1584 QETH_DBF_TEXT(SETUP , 2, "idxrdcb"); 1585 if (channel->state == CH_STATE_DOWN) { 1586 channel->state = CH_STATE_ACTIVATING; 1587 goto out; 1588 } 1589 1590 card = CARD_FROM_CDEV(channel->ccwdev); 1591 if (qeth_check_idx_response(card, iob->data)) 1592 goto out; 1593 1594 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) { 1595 switch (QETH_IDX_ACT_CAUSE_CODE(iob->data)) { 1596 case QETH_IDX_ACT_ERR_EXCL: 1597 dev_err(&card->write.ccwdev->dev, 1598 "The adapter is used exclusively by another " 1599 "host\n"); 1600 break; 1601 case QETH_IDX_ACT_ERR_AUTH: 1602 case QETH_IDX_ACT_ERR_AUTH_USER: 1603 dev_err(&card->read.ccwdev->dev, 1604 "Setting the device online failed because of " 1605 "insufficient authorization\n"); 1606 break; 1607 default: 1608 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:" 1609 " negative reply\n", 1610 dev_name(&card->read.ccwdev->dev)); 1611 } 1612 QETH_CARD_TEXT_(card, 2, "idxread%c", 1613 QETH_IDX_ACT_CAUSE_CODE(iob->data)); 1614 goto out; 1615 } 1616 1617 /** 1618 * * temporary fix for microcode bug 1619 * * to revert it,replace OR by AND 1620 * */ 1621 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) || 1622 (card->info.type == QETH_CARD_TYPE_OSD)) 1623 card->info.portname_required = 1; 1624 1625 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2); 1626 if (temp != qeth_peer_func_level(card->info.func_level)) { 1627 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function " 1628 "level mismatch (sent: 0x%x, received: 0x%x)\n", 1629 dev_name(&card->read.ccwdev->dev), 1630 card->info.func_level, temp); 1631 goto out; 1632 } 1633 memcpy(&card->token.issuer_rm_r, 1634 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data), 1635 QETH_MPC_TOKEN_LENGTH); 1636 memcpy(&card->info.mcl_level[0], 1637 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH); 1638 channel->state = CH_STATE_UP; 1639 out: 1640 qeth_release_buffer(channel, iob); 1641 } 1642 1643 void qeth_prepare_control_data(struct qeth_card *card, int len, 1644 struct qeth_cmd_buffer *iob) 1645 { 1646 qeth_setup_ccw(&card->write, iob->data, len); 1647 iob->callback = qeth_release_buffer; 1648 1649 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data), 1650 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH); 1651 card->seqno.trans_hdr++; 1652 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data), 1653 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH); 1654 card->seqno.pdu_hdr++; 1655 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data), 1656 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH); 1657 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1658 } 1659 EXPORT_SYMBOL_GPL(qeth_prepare_control_data); 1660 1661 int qeth_send_control_data(struct qeth_card *card, int len, 1662 struct qeth_cmd_buffer *iob, 1663 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 1664 unsigned long), 1665 void *reply_param) 1666 { 1667 int rc; 1668 unsigned long flags; 1669 struct qeth_reply *reply = NULL; 1670 unsigned long timeout, event_timeout; 1671 struct qeth_ipa_cmd *cmd; 1672 1673 QETH_CARD_TEXT(card, 2, "sendctl"); 1674 1675 if (card->read_or_write_problem) { 1676 qeth_release_buffer(iob->channel, iob); 1677 return -EIO; 1678 } 1679 reply = qeth_alloc_reply(card); 1680 if (!reply) { 1681 return -ENOMEM; 1682 } 1683 reply->callback = reply_cb; 1684 reply->param = reply_param; 1685 if (card->state == CARD_STATE_DOWN) 1686 reply->seqno = QETH_IDX_COMMAND_SEQNO; 1687 else 1688 reply->seqno = card->seqno.ipa++; 1689 init_waitqueue_head(&reply->wait_q); 1690 spin_lock_irqsave(&card->lock, flags); 1691 list_add_tail(&reply->list, &card->cmd_waiter_list); 1692 spin_unlock_irqrestore(&card->lock, flags); 1693 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN); 1694 1695 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ; 1696 qeth_prepare_control_data(card, len, iob); 1697 1698 if (IS_IPA(iob->data)) 1699 event_timeout = QETH_IPA_TIMEOUT; 1700 else 1701 event_timeout = QETH_TIMEOUT; 1702 timeout = jiffies + event_timeout; 1703 1704 QETH_CARD_TEXT(card, 6, "noirqpnd"); 1705 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags); 1706 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw, 1707 (addr_t) iob, 0, 0); 1708 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags); 1709 if (rc) { 1710 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: " 1711 "ccw_device_start rc = %i\n", 1712 dev_name(&card->write.ccwdev->dev), rc); 1713 QETH_CARD_TEXT_(card, 2, " err%d", rc); 1714 spin_lock_irqsave(&card->lock, flags); 1715 list_del_init(&reply->list); 1716 qeth_put_reply(reply); 1717 spin_unlock_irqrestore(&card->lock, flags); 1718 qeth_release_buffer(iob->channel, iob); 1719 atomic_set(&card->write.irq_pending, 0); 1720 wake_up(&card->wait_q); 1721 return rc; 1722 } 1723 1724 /* we have only one long running ipassist, since we can ensure 1725 process context of this command we can sleep */ 1726 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 1727 if ((cmd->hdr.command == IPA_CMD_SETIP) && 1728 (cmd->hdr.prot_version == QETH_PROT_IPV4)) { 1729 if (!wait_event_timeout(reply->wait_q, 1730 atomic_read(&reply->received), event_timeout)) 1731 goto time_err; 1732 } else { 1733 while (!atomic_read(&reply->received)) { 1734 if (time_after(jiffies, timeout)) 1735 goto time_err; 1736 cpu_relax(); 1737 }; 1738 } 1739 1740 if (reply->rc == -EIO) 1741 goto error; 1742 rc = reply->rc; 1743 qeth_put_reply(reply); 1744 return rc; 1745 1746 time_err: 1747 reply->rc = -ETIME; 1748 spin_lock_irqsave(&reply->card->lock, flags); 1749 list_del_init(&reply->list); 1750 spin_unlock_irqrestore(&reply->card->lock, flags); 1751 atomic_inc(&reply->received); 1752 error: 1753 atomic_set(&card->write.irq_pending, 0); 1754 qeth_release_buffer(iob->channel, iob); 1755 card->write.buf_no = (card->write.buf_no + 1) % QETH_CMD_BUFFER_NO; 1756 rc = reply->rc; 1757 qeth_put_reply(reply); 1758 return rc; 1759 } 1760 EXPORT_SYMBOL_GPL(qeth_send_control_data); 1761 1762 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1763 unsigned long data) 1764 { 1765 struct qeth_cmd_buffer *iob; 1766 1767 QETH_DBF_TEXT(SETUP, 2, "cmenblcb"); 1768 1769 iob = (struct qeth_cmd_buffer *) data; 1770 memcpy(&card->token.cm_filter_r, 1771 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data), 1772 QETH_MPC_TOKEN_LENGTH); 1773 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1774 return 0; 1775 } 1776 1777 static int qeth_cm_enable(struct qeth_card *card) 1778 { 1779 int rc; 1780 struct qeth_cmd_buffer *iob; 1781 1782 QETH_DBF_TEXT(SETUP, 2, "cmenable"); 1783 1784 iob = qeth_wait_for_buffer(&card->write); 1785 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE); 1786 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data), 1787 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1788 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data), 1789 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH); 1790 1791 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob, 1792 qeth_cm_enable_cb, NULL); 1793 return rc; 1794 } 1795 1796 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1797 unsigned long data) 1798 { 1799 1800 struct qeth_cmd_buffer *iob; 1801 1802 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb"); 1803 1804 iob = (struct qeth_cmd_buffer *) data; 1805 memcpy(&card->token.cm_connection_r, 1806 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data), 1807 QETH_MPC_TOKEN_LENGTH); 1808 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1809 return 0; 1810 } 1811 1812 static int qeth_cm_setup(struct qeth_card *card) 1813 { 1814 int rc; 1815 struct qeth_cmd_buffer *iob; 1816 1817 QETH_DBF_TEXT(SETUP, 2, "cmsetup"); 1818 1819 iob = qeth_wait_for_buffer(&card->write); 1820 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE); 1821 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data), 1822 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH); 1823 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data), 1824 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH); 1825 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data), 1826 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH); 1827 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob, 1828 qeth_cm_setup_cb, NULL); 1829 return rc; 1830 1831 } 1832 1833 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) 1834 { 1835 switch (card->info.type) { 1836 case QETH_CARD_TYPE_UNKNOWN: 1837 return 1500; 1838 case QETH_CARD_TYPE_IQD: 1839 return card->info.max_mtu; 1840 case QETH_CARD_TYPE_OSD: 1841 switch (card->info.link_type) { 1842 case QETH_LINK_TYPE_HSTR: 1843 case QETH_LINK_TYPE_LANE_TR: 1844 return 2000; 1845 default: 1846 return 1492; 1847 } 1848 case QETH_CARD_TYPE_OSM: 1849 case QETH_CARD_TYPE_OSX: 1850 return 1492; 1851 default: 1852 return 1500; 1853 } 1854 } 1855 1856 static inline int qeth_get_mtu_outof_framesize(int framesize) 1857 { 1858 switch (framesize) { 1859 case 0x4000: 1860 return 8192; 1861 case 0x6000: 1862 return 16384; 1863 case 0xa000: 1864 return 32768; 1865 case 0xffff: 1866 return 57344; 1867 default: 1868 return 0; 1869 } 1870 } 1871 1872 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) 1873 { 1874 switch (card->info.type) { 1875 case QETH_CARD_TYPE_OSD: 1876 case QETH_CARD_TYPE_OSM: 1877 case QETH_CARD_TYPE_OSX: 1878 case QETH_CARD_TYPE_IQD: 1879 return ((mtu >= 576) && 1880 (mtu <= card->info.max_mtu)); 1881 case QETH_CARD_TYPE_OSN: 1882 case QETH_CARD_TYPE_UNKNOWN: 1883 default: 1884 return 1; 1885 } 1886 } 1887 1888 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, 1889 unsigned long data) 1890 { 1891 1892 __u16 mtu, framesize; 1893 __u16 len; 1894 __u8 link_type; 1895 struct qeth_cmd_buffer *iob; 1896 1897 QETH_DBF_TEXT(SETUP, 2, "ulpenacb"); 1898 1899 iob = (struct qeth_cmd_buffer *) data; 1900 memcpy(&card->token.ulp_filter_r, 1901 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), 1902 QETH_MPC_TOKEN_LENGTH); 1903 if (card->info.type == QETH_CARD_TYPE_IQD) { 1904 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); 1905 mtu = qeth_get_mtu_outof_framesize(framesize); 1906 if (!mtu) { 1907 iob->rc = -EINVAL; 1908 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1909 return 0; 1910 } 1911 if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { 1912 /* frame size has changed */ 1913 if (card->dev && 1914 ((card->dev->mtu == card->info.initial_mtu) || 1915 (card->dev->mtu > mtu))) 1916 card->dev->mtu = mtu; 1917 qeth_free_qdio_buffers(card); 1918 } 1919 card->info.initial_mtu = mtu; 1920 card->info.max_mtu = mtu; 1921 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; 1922 } else { 1923 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); 1924 card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( 1925 iob->data); 1926 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; 1927 } 1928 1929 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2); 1930 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) { 1931 memcpy(&link_type, 1932 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1); 1933 card->info.link_type = link_type; 1934 } else 1935 card->info.link_type = 0; 1936 QETH_DBF_TEXT_(SETUP, 2, "link%d", card->info.link_type); 1937 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1938 return 0; 1939 } 1940 1941 static int qeth_ulp_enable(struct qeth_card *card) 1942 { 1943 int rc; 1944 char prot_type; 1945 struct qeth_cmd_buffer *iob; 1946 1947 /*FIXME: trace view callbacks*/ 1948 QETH_DBF_TEXT(SETUP, 2, "ulpenabl"); 1949 1950 iob = qeth_wait_for_buffer(&card->write); 1951 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE); 1952 1953 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) = 1954 (__u8) card->info.portno; 1955 if (card->options.layer2) 1956 if (card->info.type == QETH_CARD_TYPE_OSN) 1957 prot_type = QETH_PROT_OSN2; 1958 else 1959 prot_type = QETH_PROT_LAYER2; 1960 else 1961 prot_type = QETH_PROT_TCPIP; 1962 1963 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1); 1964 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data), 1965 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 1966 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data), 1967 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH); 1968 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data), 1969 card->info.portname, 9); 1970 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob, 1971 qeth_ulp_enable_cb, NULL); 1972 return rc; 1973 1974 } 1975 1976 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply, 1977 unsigned long data) 1978 { 1979 struct qeth_cmd_buffer *iob; 1980 int rc = 0; 1981 1982 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb"); 1983 1984 iob = (struct qeth_cmd_buffer *) data; 1985 memcpy(&card->token.ulp_connection_r, 1986 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1987 QETH_MPC_TOKEN_LENGTH); 1988 if (!strncmp("00S", QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data), 1989 3)) { 1990 QETH_DBF_TEXT(SETUP, 2, "olmlimit"); 1991 dev_err(&card->gdev->dev, "A connection could not be " 1992 "established because of an OLM limit\n"); 1993 iob->rc = -EMLINK; 1994 } 1995 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); 1996 return rc; 1997 } 1998 1999 static int qeth_ulp_setup(struct qeth_card *card) 2000 { 2001 int rc; 2002 __u16 temp; 2003 struct qeth_cmd_buffer *iob; 2004 struct ccw_dev_id dev_id; 2005 2006 QETH_DBF_TEXT(SETUP, 2, "ulpsetup"); 2007 2008 iob = qeth_wait_for_buffer(&card->write); 2009 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE); 2010 2011 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data), 2012 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2013 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data), 2014 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH); 2015 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data), 2016 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH); 2017 2018 ccw_device_get_id(CARD_DDEV(card), &dev_id); 2019 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2); 2020 temp = (card->info.cula << 8) + card->info.unit_addr2; 2021 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2); 2022 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob, 2023 qeth_ulp_setup_cb, NULL); 2024 return rc; 2025 } 2026 2027 static int qeth_alloc_qdio_buffers(struct qeth_card *card) 2028 { 2029 int i, j; 2030 2031 QETH_DBF_TEXT(SETUP, 2, "allcqdbf"); 2032 2033 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED, 2034 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED) 2035 return 0; 2036 2037 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q), 2038 GFP_KERNEL); 2039 if (!card->qdio.in_q) 2040 goto out_nomem; 2041 QETH_DBF_TEXT(SETUP, 2, "inq"); 2042 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *)); 2043 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q)); 2044 /* give inbound qeth_qdio_buffers their qdio_buffers */ 2045 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 2046 card->qdio.in_q->bufs[i].buffer = 2047 &card->qdio.in_q->qdio_bufs[i]; 2048 /* inbound buffer pool */ 2049 if (qeth_alloc_buffer_pool(card)) 2050 goto out_freeinq; 2051 /* outbound */ 2052 card->qdio.out_qs = 2053 kmalloc(card->qdio.no_out_queues * 2054 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL); 2055 if (!card->qdio.out_qs) 2056 goto out_freepool; 2057 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2058 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q), 2059 GFP_KERNEL); 2060 if (!card->qdio.out_qs[i]) 2061 goto out_freeoutq; 2062 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i); 2063 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *)); 2064 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q)); 2065 card->qdio.out_qs[i]->queue_no = i; 2066 /* give outbound qeth_qdio_buffers their qdio_buffers */ 2067 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2068 card->qdio.out_qs[i]->bufs[j].buffer = 2069 &card->qdio.out_qs[i]->qdio_bufs[j]; 2070 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j]. 2071 skb_list); 2072 lockdep_set_class( 2073 &card->qdio.out_qs[i]->bufs[j].skb_list.lock, 2074 &qdio_out_skb_queue_key); 2075 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list); 2076 } 2077 } 2078 return 0; 2079 2080 out_freeoutq: 2081 while (i > 0) 2082 kfree(card->qdio.out_qs[--i]); 2083 kfree(card->qdio.out_qs); 2084 card->qdio.out_qs = NULL; 2085 out_freepool: 2086 qeth_free_buffer_pool(card); 2087 out_freeinq: 2088 kfree(card->qdio.in_q); 2089 card->qdio.in_q = NULL; 2090 out_nomem: 2091 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED); 2092 return -ENOMEM; 2093 } 2094 2095 static void qeth_create_qib_param_field(struct qeth_card *card, 2096 char *param_field) 2097 { 2098 2099 param_field[0] = _ascebc['P']; 2100 param_field[1] = _ascebc['C']; 2101 param_field[2] = _ascebc['I']; 2102 param_field[3] = _ascebc['T']; 2103 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card); 2104 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card); 2105 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card); 2106 } 2107 2108 static void qeth_create_qib_param_field_blkt(struct qeth_card *card, 2109 char *param_field) 2110 { 2111 param_field[16] = _ascebc['B']; 2112 param_field[17] = _ascebc['L']; 2113 param_field[18] = _ascebc['K']; 2114 param_field[19] = _ascebc['T']; 2115 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total; 2116 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet; 2117 *((unsigned int *) (¶m_field[28])) = 2118 card->info.blkt.inter_packet_jumbo; 2119 } 2120 2121 static int qeth_qdio_activate(struct qeth_card *card) 2122 { 2123 QETH_DBF_TEXT(SETUP, 3, "qdioact"); 2124 return qdio_activate(CARD_DDEV(card)); 2125 } 2126 2127 static int qeth_dm_act(struct qeth_card *card) 2128 { 2129 int rc; 2130 struct qeth_cmd_buffer *iob; 2131 2132 QETH_DBF_TEXT(SETUP, 2, "dmact"); 2133 2134 iob = qeth_wait_for_buffer(&card->write); 2135 memcpy(iob->data, DM_ACT, DM_ACT_SIZE); 2136 2137 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data), 2138 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH); 2139 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data), 2140 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2141 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL); 2142 return rc; 2143 } 2144 2145 static int qeth_mpc_initialize(struct qeth_card *card) 2146 { 2147 int rc; 2148 2149 QETH_DBF_TEXT(SETUP, 2, "mpcinit"); 2150 2151 rc = qeth_issue_next_read(card); 2152 if (rc) { 2153 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2154 return rc; 2155 } 2156 rc = qeth_cm_enable(card); 2157 if (rc) { 2158 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 2159 goto out_qdio; 2160 } 2161 rc = qeth_cm_setup(card); 2162 if (rc) { 2163 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 2164 goto out_qdio; 2165 } 2166 rc = qeth_ulp_enable(card); 2167 if (rc) { 2168 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 2169 goto out_qdio; 2170 } 2171 rc = qeth_ulp_setup(card); 2172 if (rc) { 2173 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2174 goto out_qdio; 2175 } 2176 rc = qeth_alloc_qdio_buffers(card); 2177 if (rc) { 2178 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 2179 goto out_qdio; 2180 } 2181 rc = qeth_qdio_establish(card); 2182 if (rc) { 2183 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 2184 qeth_free_qdio_buffers(card); 2185 goto out_qdio; 2186 } 2187 rc = qeth_qdio_activate(card); 2188 if (rc) { 2189 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc); 2190 goto out_qdio; 2191 } 2192 rc = qeth_dm_act(card); 2193 if (rc) { 2194 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc); 2195 goto out_qdio; 2196 } 2197 2198 return 0; 2199 out_qdio: 2200 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 2201 return rc; 2202 } 2203 2204 static void qeth_print_status_with_portname(struct qeth_card *card) 2205 { 2206 char dbf_text[15]; 2207 int i; 2208 2209 sprintf(dbf_text, "%s", card->info.portname + 1); 2210 for (i = 0; i < 8; i++) 2211 dbf_text[i] = 2212 (char) _ebcasc[(__u8) dbf_text[i]]; 2213 dbf_text[8] = 0; 2214 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n" 2215 "with link type %s (portname: %s)\n", 2216 qeth_get_cardname(card), 2217 (card->info.mcl_level[0]) ? " (level: " : "", 2218 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2219 (card->info.mcl_level[0]) ? ")" : "", 2220 qeth_get_cardname_short(card), 2221 dbf_text); 2222 2223 } 2224 2225 static void qeth_print_status_no_portname(struct qeth_card *card) 2226 { 2227 if (card->info.portname[0]) 2228 dev_info(&card->gdev->dev, "Device is a%s " 2229 "card%s%s%s\nwith link type %s " 2230 "(no portname needed by interface).\n", 2231 qeth_get_cardname(card), 2232 (card->info.mcl_level[0]) ? " (level: " : "", 2233 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2234 (card->info.mcl_level[0]) ? ")" : "", 2235 qeth_get_cardname_short(card)); 2236 else 2237 dev_info(&card->gdev->dev, "Device is a%s " 2238 "card%s%s%s\nwith link type %s.\n", 2239 qeth_get_cardname(card), 2240 (card->info.mcl_level[0]) ? " (level: " : "", 2241 (card->info.mcl_level[0]) ? card->info.mcl_level : "", 2242 (card->info.mcl_level[0]) ? ")" : "", 2243 qeth_get_cardname_short(card)); 2244 } 2245 2246 void qeth_print_status_message(struct qeth_card *card) 2247 { 2248 switch (card->info.type) { 2249 case QETH_CARD_TYPE_OSD: 2250 case QETH_CARD_TYPE_OSM: 2251 case QETH_CARD_TYPE_OSX: 2252 /* VM will use a non-zero first character 2253 * to indicate a HiperSockets like reporting 2254 * of the level OSA sets the first character to zero 2255 * */ 2256 if (!card->info.mcl_level[0]) { 2257 sprintf(card->info.mcl_level, "%02x%02x", 2258 card->info.mcl_level[2], 2259 card->info.mcl_level[3]); 2260 2261 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2262 break; 2263 } 2264 /* fallthrough */ 2265 case QETH_CARD_TYPE_IQD: 2266 if ((card->info.guestlan) || 2267 (card->info.mcl_level[0] & 0x80)) { 2268 card->info.mcl_level[0] = (char) _ebcasc[(__u8) 2269 card->info.mcl_level[0]]; 2270 card->info.mcl_level[1] = (char) _ebcasc[(__u8) 2271 card->info.mcl_level[1]]; 2272 card->info.mcl_level[2] = (char) _ebcasc[(__u8) 2273 card->info.mcl_level[2]]; 2274 card->info.mcl_level[3] = (char) _ebcasc[(__u8) 2275 card->info.mcl_level[3]]; 2276 card->info.mcl_level[QETH_MCL_LENGTH] = 0; 2277 } 2278 break; 2279 default: 2280 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1); 2281 } 2282 if (card->info.portname_required) 2283 qeth_print_status_with_portname(card); 2284 else 2285 qeth_print_status_no_portname(card); 2286 } 2287 EXPORT_SYMBOL_GPL(qeth_print_status_message); 2288 2289 static void qeth_initialize_working_pool_list(struct qeth_card *card) 2290 { 2291 struct qeth_buffer_pool_entry *entry; 2292 2293 QETH_CARD_TEXT(card, 5, "inwrklst"); 2294 2295 list_for_each_entry(entry, 2296 &card->qdio.init_pool.entry_list, init_list) { 2297 qeth_put_buffer_pool_entry(card, entry); 2298 } 2299 } 2300 2301 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry( 2302 struct qeth_card *card) 2303 { 2304 struct list_head *plh; 2305 struct qeth_buffer_pool_entry *entry; 2306 int i, free; 2307 struct page *page; 2308 2309 if (list_empty(&card->qdio.in_buf_pool.entry_list)) 2310 return NULL; 2311 2312 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) { 2313 entry = list_entry(plh, struct qeth_buffer_pool_entry, list); 2314 free = 1; 2315 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2316 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2317 free = 0; 2318 break; 2319 } 2320 } 2321 if (free) { 2322 list_del_init(&entry->list); 2323 return entry; 2324 } 2325 } 2326 2327 /* no free buffer in pool so take first one and swap pages */ 2328 entry = list_entry(card->qdio.in_buf_pool.entry_list.next, 2329 struct qeth_buffer_pool_entry, list); 2330 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2331 if (page_count(virt_to_page(entry->elements[i])) > 1) { 2332 page = alloc_page(GFP_ATOMIC); 2333 if (!page) { 2334 return NULL; 2335 } else { 2336 free_page((unsigned long)entry->elements[i]); 2337 entry->elements[i] = page_address(page); 2338 if (card->options.performance_stats) 2339 card->perf_stats.sg_alloc_page_rx++; 2340 } 2341 } 2342 } 2343 list_del_init(&entry->list); 2344 return entry; 2345 } 2346 2347 static int qeth_init_input_buffer(struct qeth_card *card, 2348 struct qeth_qdio_buffer *buf) 2349 { 2350 struct qeth_buffer_pool_entry *pool_entry; 2351 int i; 2352 2353 pool_entry = qeth_find_free_buffer_pool_entry(card); 2354 if (!pool_entry) 2355 return 1; 2356 2357 /* 2358 * since the buffer is accessed only from the input_tasklet 2359 * there shouldn't be a need to synchronize; also, since we use 2360 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off 2361 * buffers 2362 */ 2363 2364 buf->pool_entry = pool_entry; 2365 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) { 2366 buf->buffer->element[i].length = PAGE_SIZE; 2367 buf->buffer->element[i].addr = pool_entry->elements[i]; 2368 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) 2369 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; 2370 else 2371 buf->buffer->element[i].flags = 0; 2372 } 2373 return 0; 2374 } 2375 2376 int qeth_init_qdio_queues(struct qeth_card *card) 2377 { 2378 int i, j; 2379 int rc; 2380 2381 QETH_DBF_TEXT(SETUP, 2, "initqdqs"); 2382 2383 /* inbound queue */ 2384 memset(card->qdio.in_q->qdio_bufs, 0, 2385 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2386 qeth_initialize_working_pool_list(card); 2387 /*give only as many buffers to hardware as we have buffer pool entries*/ 2388 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i) 2389 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]); 2390 card->qdio.in_q->next_buf_to_init = 2391 card->qdio.in_buf_pool.buf_count - 1; 2392 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0, 2393 card->qdio.in_buf_pool.buf_count - 1); 2394 if (rc) { 2395 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 2396 return rc; 2397 } 2398 /* outbound queue */ 2399 for (i = 0; i < card->qdio.no_out_queues; ++i) { 2400 memset(card->qdio.out_qs[i]->qdio_bufs, 0, 2401 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer)); 2402 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) { 2403 qeth_clear_output_buffer(card->qdio.out_qs[i], 2404 &card->qdio.out_qs[i]->bufs[j]); 2405 } 2406 card->qdio.out_qs[i]->card = card; 2407 card->qdio.out_qs[i]->next_buf_to_fill = 0; 2408 card->qdio.out_qs[i]->do_pack = 0; 2409 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0); 2410 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0); 2411 atomic_set(&card->qdio.out_qs[i]->state, 2412 QETH_OUT_Q_UNLOCKED); 2413 } 2414 return 0; 2415 } 2416 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues); 2417 2418 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type) 2419 { 2420 switch (link_type) { 2421 case QETH_LINK_TYPE_HSTR: 2422 return 2; 2423 default: 2424 return 1; 2425 } 2426 } 2427 2428 static void qeth_fill_ipacmd_header(struct qeth_card *card, 2429 struct qeth_ipa_cmd *cmd, __u8 command, 2430 enum qeth_prot_versions prot) 2431 { 2432 memset(cmd, 0, sizeof(struct qeth_ipa_cmd)); 2433 cmd->hdr.command = command; 2434 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST; 2435 cmd->hdr.seqno = card->seqno.ipa; 2436 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type); 2437 cmd->hdr.rel_adapter_no = (__u8) card->info.portno; 2438 if (card->options.layer2) 2439 cmd->hdr.prim_version_no = 2; 2440 else 2441 cmd->hdr.prim_version_no = 1; 2442 cmd->hdr.param_count = 1; 2443 cmd->hdr.prot_version = prot; 2444 cmd->hdr.ipa_supported = 0; 2445 cmd->hdr.ipa_enabled = 0; 2446 } 2447 2448 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card, 2449 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot) 2450 { 2451 struct qeth_cmd_buffer *iob; 2452 struct qeth_ipa_cmd *cmd; 2453 2454 iob = qeth_wait_for_buffer(&card->write); 2455 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2456 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot); 2457 2458 return iob; 2459 } 2460 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer); 2461 2462 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2463 char prot_type) 2464 { 2465 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 2466 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1); 2467 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 2468 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 2469 } 2470 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd); 2471 2472 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob, 2473 int (*reply_cb)(struct qeth_card *, struct qeth_reply*, 2474 unsigned long), 2475 void *reply_param) 2476 { 2477 int rc; 2478 char prot_type; 2479 2480 QETH_CARD_TEXT(card, 4, "sendipa"); 2481 2482 if (card->options.layer2) 2483 if (card->info.type == QETH_CARD_TYPE_OSN) 2484 prot_type = QETH_PROT_OSN2; 2485 else 2486 prot_type = QETH_PROT_LAYER2; 2487 else 2488 prot_type = QETH_PROT_TCPIP; 2489 qeth_prepare_ipa_cmd(card, iob, prot_type); 2490 rc = qeth_send_control_data(card, IPA_CMD_LENGTH, 2491 iob, reply_cb, reply_param); 2492 if (rc == -ETIME) { 2493 qeth_clear_ipacmd_list(card); 2494 qeth_schedule_recovery(card); 2495 } 2496 return rc; 2497 } 2498 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd); 2499 2500 int qeth_send_startlan(struct qeth_card *card) 2501 { 2502 int rc; 2503 struct qeth_cmd_buffer *iob; 2504 2505 QETH_DBF_TEXT(SETUP, 2, "strtlan"); 2506 2507 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_STARTLAN, 0); 2508 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL); 2509 return rc; 2510 } 2511 EXPORT_SYMBOL_GPL(qeth_send_startlan); 2512 2513 int qeth_default_setadapterparms_cb(struct qeth_card *card, 2514 struct qeth_reply *reply, unsigned long data) 2515 { 2516 struct qeth_ipa_cmd *cmd; 2517 2518 QETH_CARD_TEXT(card, 4, "defadpcb"); 2519 2520 cmd = (struct qeth_ipa_cmd *) data; 2521 if (cmd->hdr.return_code == 0) 2522 cmd->hdr.return_code = 2523 cmd->data.setadapterparms.hdr.return_code; 2524 return 0; 2525 } 2526 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb); 2527 2528 static int qeth_query_setadapterparms_cb(struct qeth_card *card, 2529 struct qeth_reply *reply, unsigned long data) 2530 { 2531 struct qeth_ipa_cmd *cmd; 2532 2533 QETH_CARD_TEXT(card, 3, "quyadpcb"); 2534 2535 cmd = (struct qeth_ipa_cmd *) data; 2536 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f) { 2537 card->info.link_type = 2538 cmd->data.setadapterparms.data.query_cmds_supp.lan_type; 2539 QETH_DBF_TEXT_(SETUP, 2, "lnk %d", card->info.link_type); 2540 } 2541 card->options.adp.supported_funcs = 2542 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds; 2543 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 2544 } 2545 2546 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card, 2547 __u32 command, __u32 cmdlen) 2548 { 2549 struct qeth_cmd_buffer *iob; 2550 struct qeth_ipa_cmd *cmd; 2551 2552 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS, 2553 QETH_PROT_IPV4); 2554 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 2555 cmd->data.setadapterparms.hdr.cmdlength = cmdlen; 2556 cmd->data.setadapterparms.hdr.command_code = command; 2557 cmd->data.setadapterparms.hdr.used_total = 1; 2558 cmd->data.setadapterparms.hdr.seq_no = 1; 2559 2560 return iob; 2561 } 2562 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd); 2563 2564 int qeth_query_setadapterparms(struct qeth_card *card) 2565 { 2566 int rc; 2567 struct qeth_cmd_buffer *iob; 2568 2569 QETH_CARD_TEXT(card, 3, "queryadp"); 2570 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED, 2571 sizeof(struct qeth_ipacmd_setadpparms)); 2572 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL); 2573 return rc; 2574 } 2575 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms); 2576 2577 int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, 2578 unsigned int qdio_error, const char *dbftext) 2579 { 2580 if (qdio_error) { 2581 QETH_CARD_TEXT(card, 2, dbftext); 2582 QETH_CARD_TEXT_(card, 2, " F15=%02X", 2583 buf->element[15].flags & 0xff); 2584 QETH_CARD_TEXT_(card, 2, " F14=%02X", 2585 buf->element[14].flags & 0xff); 2586 QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); 2587 if ((buf->element[15].flags & 0xff) == 0x12) { 2588 card->stats.rx_dropped++; 2589 return 0; 2590 } else 2591 return 1; 2592 } 2593 return 0; 2594 } 2595 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors); 2596 2597 void qeth_queue_input_buffer(struct qeth_card *card, int index) 2598 { 2599 struct qeth_qdio_q *queue = card->qdio.in_q; 2600 int count; 2601 int i; 2602 int rc; 2603 int newcount = 0; 2604 2605 count = (index < queue->next_buf_to_init)? 2606 card->qdio.in_buf_pool.buf_count - 2607 (queue->next_buf_to_init - index) : 2608 card->qdio.in_buf_pool.buf_count - 2609 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index); 2610 /* only requeue at a certain threshold to avoid SIGAs */ 2611 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) { 2612 for (i = queue->next_buf_to_init; 2613 i < queue->next_buf_to_init + count; ++i) { 2614 if (qeth_init_input_buffer(card, 2615 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) { 2616 break; 2617 } else { 2618 newcount++; 2619 } 2620 } 2621 2622 if (newcount < count) { 2623 /* we are in memory shortage so we switch back to 2624 traditional skb allocation and drop packages */ 2625 atomic_set(&card->force_alloc_skb, 3); 2626 count = newcount; 2627 } else { 2628 atomic_add_unless(&card->force_alloc_skb, -1, 0); 2629 } 2630 2631 /* 2632 * according to old code it should be avoided to requeue all 2633 * 128 buffers in order to benefit from PCI avoidance. 2634 * this function keeps at least one buffer (the buffer at 2635 * 'index') un-requeued -> this buffer is the first buffer that 2636 * will be requeued the next time 2637 */ 2638 if (card->options.performance_stats) { 2639 card->perf_stats.inbound_do_qdio_cnt++; 2640 card->perf_stats.inbound_do_qdio_start_time = 2641 qeth_get_micros(); 2642 } 2643 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 2644 queue->next_buf_to_init, count); 2645 if (card->options.performance_stats) 2646 card->perf_stats.inbound_do_qdio_time += 2647 qeth_get_micros() - 2648 card->perf_stats.inbound_do_qdio_start_time; 2649 if (rc) { 2650 dev_warn(&card->gdev->dev, 2651 "QDIO reported an error, rc=%i\n", rc); 2652 QETH_CARD_TEXT(card, 2, "qinberr"); 2653 } 2654 queue->next_buf_to_init = (queue->next_buf_to_init + count) % 2655 QDIO_MAX_BUFFERS_PER_Q; 2656 } 2657 } 2658 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); 2659 2660 static int qeth_handle_send_error(struct qeth_card *card, 2661 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) 2662 { 2663 int sbalf15 = buffer->buffer->element[15].flags & 0xff; 2664 2665 QETH_CARD_TEXT(card, 6, "hdsnderr"); 2666 if (card->info.type == QETH_CARD_TYPE_IQD) { 2667 if (sbalf15 == 0) { 2668 qdio_err = 0; 2669 } else { 2670 qdio_err = 1; 2671 } 2672 } 2673 qeth_check_qdio_errors(card, buffer->buffer, qdio_err, "qouterr"); 2674 2675 if (!qdio_err) 2676 return QETH_SEND_ERROR_NONE; 2677 2678 if ((sbalf15 >= 15) && (sbalf15 <= 31)) 2679 return QETH_SEND_ERROR_RETRY; 2680 2681 QETH_CARD_TEXT(card, 1, "lnkfail"); 2682 QETH_CARD_TEXT_(card, 1, "%04x %02x", 2683 (u16)qdio_err, (u8)sbalf15); 2684 return QETH_SEND_ERROR_LINK_FAILURE; 2685 } 2686 2687 /* 2688 * Switched to packing state if the number of used buffers on a queue 2689 * reaches a certain limit. 2690 */ 2691 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue) 2692 { 2693 if (!queue->do_pack) { 2694 if (atomic_read(&queue->used_buffers) 2695 >= QETH_HIGH_WATERMARK_PACK){ 2696 /* switch non-PACKING -> PACKING */ 2697 QETH_CARD_TEXT(queue->card, 6, "np->pack"); 2698 if (queue->card->options.performance_stats) 2699 queue->card->perf_stats.sc_dp_p++; 2700 queue->do_pack = 1; 2701 } 2702 } 2703 } 2704 2705 /* 2706 * Switches from packing to non-packing mode. If there is a packing 2707 * buffer on the queue this buffer will be prepared to be flushed. 2708 * In that case 1 is returned to inform the caller. If no buffer 2709 * has to be flushed, zero is returned. 2710 */ 2711 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue) 2712 { 2713 struct qeth_qdio_out_buffer *buffer; 2714 int flush_count = 0; 2715 2716 if (queue->do_pack) { 2717 if (atomic_read(&queue->used_buffers) 2718 <= QETH_LOW_WATERMARK_PACK) { 2719 /* switch PACKING -> non-PACKING */ 2720 QETH_CARD_TEXT(queue->card, 6, "pack->np"); 2721 if (queue->card->options.performance_stats) 2722 queue->card->perf_stats.sc_p_dp++; 2723 queue->do_pack = 0; 2724 /* flush packing buffers */ 2725 buffer = &queue->bufs[queue->next_buf_to_fill]; 2726 if ((atomic_read(&buffer->state) == 2727 QETH_QDIO_BUF_EMPTY) && 2728 (buffer->next_element_to_fill > 0)) { 2729 atomic_set(&buffer->state, 2730 QETH_QDIO_BUF_PRIMED); 2731 flush_count++; 2732 queue->next_buf_to_fill = 2733 (queue->next_buf_to_fill + 1) % 2734 QDIO_MAX_BUFFERS_PER_Q; 2735 } 2736 } 2737 } 2738 return flush_count; 2739 } 2740 2741 /* 2742 * Called to flush a packing buffer if no more pci flags are on the queue. 2743 * Checks if there is a packing buffer and prepares it to be flushed. 2744 * In that case returns 1, otherwise zero. 2745 */ 2746 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue) 2747 { 2748 struct qeth_qdio_out_buffer *buffer; 2749 2750 buffer = &queue->bufs[queue->next_buf_to_fill]; 2751 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) && 2752 (buffer->next_element_to_fill > 0)) { 2753 /* it's a packing buffer */ 2754 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 2755 queue->next_buf_to_fill = 2756 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q; 2757 return 1; 2758 } 2759 return 0; 2760 } 2761 2762 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, 2763 int count) 2764 { 2765 struct qeth_qdio_out_buffer *buf; 2766 int rc; 2767 int i; 2768 unsigned int qdio_flags; 2769 2770 for (i = index; i < index + count; ++i) { 2771 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2772 buf->buffer->element[buf->next_element_to_fill - 1].flags |= 2773 SBAL_FLAGS_LAST_ENTRY; 2774 2775 if (queue->card->info.type == QETH_CARD_TYPE_IQD) 2776 continue; 2777 2778 if (!queue->do_pack) { 2779 if ((atomic_read(&queue->used_buffers) >= 2780 (QETH_HIGH_WATERMARK_PACK - 2781 QETH_WATERMARK_PACK_FUZZ)) && 2782 !atomic_read(&queue->set_pci_flags_count)) { 2783 /* it's likely that we'll go to packing 2784 * mode soon */ 2785 atomic_inc(&queue->set_pci_flags_count); 2786 buf->buffer->element[0].flags |= 0x40; 2787 } 2788 } else { 2789 if (!atomic_read(&queue->set_pci_flags_count)) { 2790 /* 2791 * there's no outstanding PCI any more, so we 2792 * have to request a PCI to be sure the the PCI 2793 * will wake at some time in the future then we 2794 * can flush packed buffers that might still be 2795 * hanging around, which can happen if no 2796 * further send was requested by the stack 2797 */ 2798 atomic_inc(&queue->set_pci_flags_count); 2799 buf->buffer->element[0].flags |= 0x40; 2800 } 2801 } 2802 } 2803 2804 queue->card->dev->trans_start = jiffies; 2805 if (queue->card->options.performance_stats) { 2806 queue->card->perf_stats.outbound_do_qdio_cnt++; 2807 queue->card->perf_stats.outbound_do_qdio_start_time = 2808 qeth_get_micros(); 2809 } 2810 qdio_flags = QDIO_FLAG_SYNC_OUTPUT; 2811 if (atomic_read(&queue->set_pci_flags_count)) 2812 qdio_flags |= QDIO_FLAG_PCI_OUT; 2813 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags, 2814 queue->queue_no, index, count); 2815 if (queue->card->options.performance_stats) 2816 queue->card->perf_stats.outbound_do_qdio_time += 2817 qeth_get_micros() - 2818 queue->card->perf_stats.outbound_do_qdio_start_time; 2819 atomic_add(count, &queue->used_buffers); 2820 if (rc) { 2821 queue->card->stats.tx_errors += count; 2822 /* ignore temporary SIGA errors without busy condition */ 2823 if (rc == QDIO_ERROR_SIGA_TARGET) 2824 return; 2825 QETH_CARD_TEXT(queue->card, 2, "flushbuf"); 2826 QETH_CARD_TEXT_(queue->card, 2, " err%d", rc); 2827 2828 /* this must not happen under normal circumstances. if it 2829 * happens something is really wrong -> recover */ 2830 qeth_schedule_recovery(queue->card); 2831 return; 2832 } 2833 if (queue->card->options.performance_stats) 2834 queue->card->perf_stats.bufs_sent += count; 2835 } 2836 2837 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue) 2838 { 2839 int index; 2840 int flush_cnt = 0; 2841 int q_was_packing = 0; 2842 2843 /* 2844 * check if weed have to switch to non-packing mode or if 2845 * we have to get a pci flag out on the queue 2846 */ 2847 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) || 2848 !atomic_read(&queue->set_pci_flags_count)) { 2849 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) == 2850 QETH_OUT_Q_UNLOCKED) { 2851 /* 2852 * If we get in here, there was no action in 2853 * do_send_packet. So, we check if there is a 2854 * packing buffer to be flushed here. 2855 */ 2856 netif_stop_queue(queue->card->dev); 2857 index = queue->next_buf_to_fill; 2858 q_was_packing = queue->do_pack; 2859 /* queue->do_pack may change */ 2860 barrier(); 2861 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue); 2862 if (!flush_cnt && 2863 !atomic_read(&queue->set_pci_flags_count)) 2864 flush_cnt += 2865 qeth_flush_buffers_on_no_pci(queue); 2866 if (queue->card->options.performance_stats && 2867 q_was_packing) 2868 queue->card->perf_stats.bufs_sent_pack += 2869 flush_cnt; 2870 if (flush_cnt) 2871 qeth_flush_buffers(queue, index, flush_cnt); 2872 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 2873 } 2874 } 2875 } 2876 2877 void qeth_qdio_start_poll(struct ccw_device *ccwdev, int queue, 2878 unsigned long card_ptr) 2879 { 2880 struct qeth_card *card = (struct qeth_card *)card_ptr; 2881 2882 if (card->dev && (card->dev->flags & IFF_UP)) 2883 napi_schedule(&card->napi); 2884 } 2885 EXPORT_SYMBOL_GPL(qeth_qdio_start_poll); 2886 2887 void qeth_qdio_input_handler(struct ccw_device *ccwdev, unsigned int qdio_err, 2888 unsigned int queue, int first_element, int count, 2889 unsigned long card_ptr) 2890 { 2891 struct qeth_card *card = (struct qeth_card *)card_ptr; 2892 2893 if (qdio_err) 2894 qeth_schedule_recovery(card); 2895 } 2896 EXPORT_SYMBOL_GPL(qeth_qdio_input_handler); 2897 2898 void qeth_qdio_output_handler(struct ccw_device *ccwdev, 2899 unsigned int qdio_error, int __queue, int first_element, 2900 int count, unsigned long card_ptr) 2901 { 2902 struct qeth_card *card = (struct qeth_card *) card_ptr; 2903 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue]; 2904 struct qeth_qdio_out_buffer *buffer; 2905 int i; 2906 2907 QETH_CARD_TEXT(card, 6, "qdouhdl"); 2908 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) { 2909 QETH_CARD_TEXT(card, 2, "achkcond"); 2910 netif_stop_queue(card->dev); 2911 qeth_schedule_recovery(card); 2912 return; 2913 } 2914 if (card->options.performance_stats) { 2915 card->perf_stats.outbound_handler_cnt++; 2916 card->perf_stats.outbound_handler_start_time = 2917 qeth_get_micros(); 2918 } 2919 for (i = first_element; i < (first_element + count); ++i) { 2920 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; 2921 qeth_handle_send_error(card, buffer, qdio_error); 2922 qeth_clear_output_buffer(queue, buffer); 2923 } 2924 atomic_sub(count, &queue->used_buffers); 2925 /* check if we need to do something on this outbound queue */ 2926 if (card->info.type != QETH_CARD_TYPE_IQD) 2927 qeth_check_outbound_queue(queue); 2928 2929 netif_wake_queue(queue->card->dev); 2930 if (card->options.performance_stats) 2931 card->perf_stats.outbound_handler_time += qeth_get_micros() - 2932 card->perf_stats.outbound_handler_start_time; 2933 } 2934 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler); 2935 2936 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb, 2937 int ipv, int cast_type) 2938 { 2939 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSD || 2940 card->info.type == QETH_CARD_TYPE_OSX)) 2941 return card->qdio.default_out_queue; 2942 switch (card->qdio.no_out_queues) { 2943 case 4: 2944 if (cast_type && card->info.is_multicast_different) 2945 return card->info.is_multicast_different & 2946 (card->qdio.no_out_queues - 1); 2947 if (card->qdio.do_prio_queueing && (ipv == 4)) { 2948 const u8 tos = ip_hdr(skb)->tos; 2949 2950 if (card->qdio.do_prio_queueing == 2951 QETH_PRIO_Q_ING_TOS) { 2952 if (tos & IP_TOS_NOTIMPORTANT) 2953 return 3; 2954 if (tos & IP_TOS_HIGHRELIABILITY) 2955 return 2; 2956 if (tos & IP_TOS_HIGHTHROUGHPUT) 2957 return 1; 2958 if (tos & IP_TOS_LOWDELAY) 2959 return 0; 2960 } 2961 if (card->qdio.do_prio_queueing == 2962 QETH_PRIO_Q_ING_PREC) 2963 return 3 - (tos >> 6); 2964 } else if (card->qdio.do_prio_queueing && (ipv == 6)) { 2965 /* TODO: IPv6!!! */ 2966 } 2967 return card->qdio.default_out_queue; 2968 case 1: /* fallthrough for single-out-queue 1920-device */ 2969 default: 2970 return card->qdio.default_out_queue; 2971 } 2972 } 2973 EXPORT_SYMBOL_GPL(qeth_get_priority_queue); 2974 2975 int qeth_get_elements_no(struct qeth_card *card, void *hdr, 2976 struct sk_buff *skb, int elems) 2977 { 2978 int dlen = skb->len - skb->data_len; 2979 int elements_needed = PFN_UP((unsigned long)skb->data + dlen - 1) - 2980 PFN_DOWN((unsigned long)skb->data); 2981 2982 elements_needed += skb_shinfo(skb)->nr_frags; 2983 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) { 2984 QETH_DBF_MESSAGE(2, "Invalid size of IP packet " 2985 "(Number=%d / Length=%d). Discarded.\n", 2986 (elements_needed+elems), skb->len); 2987 return 0; 2988 } 2989 return elements_needed; 2990 } 2991 EXPORT_SYMBOL_GPL(qeth_get_elements_no); 2992 2993 int qeth_hdr_chk_and_bounce(struct sk_buff *skb, int len) 2994 { 2995 int hroom, inpage, rest; 2996 2997 if (((unsigned long)skb->data & PAGE_MASK) != 2998 (((unsigned long)skb->data + len - 1) & PAGE_MASK)) { 2999 hroom = skb_headroom(skb); 3000 inpage = PAGE_SIZE - ((unsigned long) skb->data % PAGE_SIZE); 3001 rest = len - inpage; 3002 if (rest > hroom) 3003 return 1; 3004 memmove(skb->data - rest, skb->data, skb->len - skb->data_len); 3005 skb->data -= rest; 3006 QETH_DBF_MESSAGE(2, "skb bounce len: %d rest: %d\n", len, rest); 3007 } 3008 return 0; 3009 } 3010 EXPORT_SYMBOL_GPL(qeth_hdr_chk_and_bounce); 3011 3012 static inline void __qeth_fill_buffer(struct sk_buff *skb, 3013 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill, 3014 int offset) 3015 { 3016 int length = skb->len - skb->data_len; 3017 int length_here; 3018 int element; 3019 char *data; 3020 int first_lap, cnt; 3021 struct skb_frag_struct *frag; 3022 3023 element = *next_element_to_fill; 3024 data = skb->data; 3025 first_lap = (is_tso == 0 ? 1 : 0); 3026 3027 if (offset >= 0) { 3028 data = skb->data + offset; 3029 length -= offset; 3030 first_lap = 0; 3031 } 3032 3033 while (length > 0) { 3034 /* length_here is the remaining amount of data in this page */ 3035 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE); 3036 if (length < length_here) 3037 length_here = length; 3038 3039 buffer->element[element].addr = data; 3040 buffer->element[element].length = length_here; 3041 length -= length_here; 3042 if (!length) { 3043 if (first_lap) 3044 if (skb_shinfo(skb)->nr_frags) 3045 buffer->element[element].flags = 3046 SBAL_FLAGS_FIRST_FRAG; 3047 else 3048 buffer->element[element].flags = 0; 3049 else 3050 buffer->element[element].flags = 3051 SBAL_FLAGS_MIDDLE_FRAG; 3052 } else { 3053 if (first_lap) 3054 buffer->element[element].flags = 3055 SBAL_FLAGS_FIRST_FRAG; 3056 else 3057 buffer->element[element].flags = 3058 SBAL_FLAGS_MIDDLE_FRAG; 3059 } 3060 data += length_here; 3061 element++; 3062 first_lap = 0; 3063 } 3064 3065 for (cnt = 0; cnt < skb_shinfo(skb)->nr_frags; cnt++) { 3066 frag = &skb_shinfo(skb)->frags[cnt]; 3067 buffer->element[element].addr = (char *)page_to_phys(frag->page) 3068 + frag->page_offset; 3069 buffer->element[element].length = frag->size; 3070 buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG; 3071 element++; 3072 } 3073 3074 if (buffer->element[element - 1].flags) 3075 buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG; 3076 *next_element_to_fill = element; 3077 } 3078 3079 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, 3080 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb, 3081 struct qeth_hdr *hdr, int offset, int hd_len) 3082 { 3083 struct qdio_buffer *buffer; 3084 int flush_cnt = 0, hdr_len, large_send = 0; 3085 3086 buffer = buf->buffer; 3087 atomic_inc(&skb->users); 3088 skb_queue_tail(&buf->skb_list, skb); 3089 3090 /*check first on TSO ....*/ 3091 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) { 3092 int element = buf->next_element_to_fill; 3093 3094 hdr_len = sizeof(struct qeth_hdr_tso) + 3095 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len; 3096 /*fill first buffer entry only with header information */ 3097 buffer->element[element].addr = skb->data; 3098 buffer->element[element].length = hdr_len; 3099 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3100 buf->next_element_to_fill++; 3101 skb->data += hdr_len; 3102 skb->len -= hdr_len; 3103 large_send = 1; 3104 } 3105 3106 if (offset >= 0) { 3107 int element = buf->next_element_to_fill; 3108 buffer->element[element].addr = hdr; 3109 buffer->element[element].length = sizeof(struct qeth_hdr) + 3110 hd_len; 3111 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; 3112 buf->is_header[element] = 1; 3113 buf->next_element_to_fill++; 3114 } 3115 3116 __qeth_fill_buffer(skb, buffer, large_send, 3117 (int *)&buf->next_element_to_fill, offset); 3118 3119 if (!queue->do_pack) { 3120 QETH_CARD_TEXT(queue->card, 6, "fillbfnp"); 3121 /* set state to PRIMED -> will be flushed */ 3122 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3123 flush_cnt = 1; 3124 } else { 3125 QETH_CARD_TEXT(queue->card, 6, "fillbfpa"); 3126 if (queue->card->options.performance_stats) 3127 queue->card->perf_stats.skbs_sent_pack++; 3128 if (buf->next_element_to_fill >= 3129 QETH_MAX_BUFFER_ELEMENTS(queue->card)) { 3130 /* 3131 * packed buffer if full -> set state PRIMED 3132 * -> will be flushed 3133 */ 3134 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED); 3135 flush_cnt = 1; 3136 } 3137 } 3138 return flush_cnt; 3139 } 3140 3141 int qeth_do_send_packet_fast(struct qeth_card *card, 3142 struct qeth_qdio_out_q *queue, struct sk_buff *skb, 3143 struct qeth_hdr *hdr, int elements_needed, 3144 int offset, int hd_len) 3145 { 3146 struct qeth_qdio_out_buffer *buffer; 3147 int index; 3148 3149 /* spin until we get the queue ... */ 3150 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3151 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3152 /* ... now we've got the queue */ 3153 index = queue->next_buf_to_fill; 3154 buffer = &queue->bufs[queue->next_buf_to_fill]; 3155 /* 3156 * check if buffer is empty to make sure that we do not 'overtake' 3157 * ourselves and try to fill a buffer that is already primed 3158 */ 3159 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) 3160 goto out; 3161 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) % 3162 QDIO_MAX_BUFFERS_PER_Q; 3163 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3164 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len); 3165 qeth_flush_buffers(queue, index, 1); 3166 return 0; 3167 out: 3168 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3169 return -EBUSY; 3170 } 3171 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast); 3172 3173 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue, 3174 struct sk_buff *skb, struct qeth_hdr *hdr, 3175 int elements_needed) 3176 { 3177 struct qeth_qdio_out_buffer *buffer; 3178 int start_index; 3179 int flush_count = 0; 3180 int do_pack = 0; 3181 int tmp; 3182 int rc = 0; 3183 3184 /* spin until we get the queue ... */ 3185 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED, 3186 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED); 3187 start_index = queue->next_buf_to_fill; 3188 buffer = &queue->bufs[queue->next_buf_to_fill]; 3189 /* 3190 * check if buffer is empty to make sure that we do not 'overtake' 3191 * ourselves and try to fill a buffer that is already primed 3192 */ 3193 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) { 3194 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED); 3195 return -EBUSY; 3196 } 3197 /* check if we need to switch packing state of this queue */ 3198 qeth_switch_to_packing_if_needed(queue); 3199 if (queue->do_pack) { 3200 do_pack = 1; 3201 /* does packet fit in current buffer? */ 3202 if ((QETH_MAX_BUFFER_ELEMENTS(card) - 3203 buffer->next_element_to_fill) < elements_needed) { 3204 /* ... no -> set state PRIMED */ 3205 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED); 3206 flush_count++; 3207 queue->next_buf_to_fill = 3208 (queue->next_buf_to_fill + 1) % 3209 QDIO_MAX_BUFFERS_PER_Q; 3210 buffer = &queue->bufs[queue->next_buf_to_fill]; 3211 /* we did a step forward, so check buffer state 3212 * again */ 3213 if (atomic_read(&buffer->state) != 3214 QETH_QDIO_BUF_EMPTY) { 3215 qeth_flush_buffers(queue, start_index, 3216 flush_count); 3217 atomic_set(&queue->state, 3218 QETH_OUT_Q_UNLOCKED); 3219 return -EBUSY; 3220 } 3221 } 3222 } 3223 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0); 3224 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) % 3225 QDIO_MAX_BUFFERS_PER_Q; 3226 flush_count += tmp; 3227 if (flush_count) 3228 qeth_flush_buffers(queue, start_index, flush_count); 3229 else if (!atomic_read(&queue->set_pci_flags_count)) 3230 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH); 3231 /* 3232 * queue->state will go from LOCKED -> UNLOCKED or from 3233 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us 3234 * (switch packing state or flush buffer to get another pci flag out). 3235 * In that case we will enter this loop 3236 */ 3237 while (atomic_dec_return(&queue->state)) { 3238 flush_count = 0; 3239 start_index = queue->next_buf_to_fill; 3240 /* check if we can go back to non-packing state */ 3241 flush_count += qeth_switch_to_nonpacking_if_needed(queue); 3242 /* 3243 * check if we need to flush a packing buffer to get a pci 3244 * flag out on the queue 3245 */ 3246 if (!flush_count && !atomic_read(&queue->set_pci_flags_count)) 3247 flush_count += qeth_flush_buffers_on_no_pci(queue); 3248 if (flush_count) 3249 qeth_flush_buffers(queue, start_index, flush_count); 3250 } 3251 /* at this point the queue is UNLOCKED again */ 3252 if (queue->card->options.performance_stats && do_pack) 3253 queue->card->perf_stats.bufs_sent_pack += flush_count; 3254 3255 return rc; 3256 } 3257 EXPORT_SYMBOL_GPL(qeth_do_send_packet); 3258 3259 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card, 3260 struct qeth_reply *reply, unsigned long data) 3261 { 3262 struct qeth_ipa_cmd *cmd; 3263 struct qeth_ipacmd_setadpparms *setparms; 3264 3265 QETH_CARD_TEXT(card, 4, "prmadpcb"); 3266 3267 cmd = (struct qeth_ipa_cmd *) data; 3268 setparms = &(cmd->data.setadapterparms); 3269 3270 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd); 3271 if (cmd->hdr.return_code) { 3272 QETH_CARD_TEXT_(card, 4, "prmrc%2.2x", cmd->hdr.return_code); 3273 setparms->data.mode = SET_PROMISC_MODE_OFF; 3274 } 3275 card->info.promisc_mode = setparms->data.mode; 3276 return 0; 3277 } 3278 3279 void qeth_setadp_promisc_mode(struct qeth_card *card) 3280 { 3281 enum qeth_ipa_promisc_modes mode; 3282 struct net_device *dev = card->dev; 3283 struct qeth_cmd_buffer *iob; 3284 struct qeth_ipa_cmd *cmd; 3285 3286 QETH_CARD_TEXT(card, 4, "setprom"); 3287 3288 if (((dev->flags & IFF_PROMISC) && 3289 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) || 3290 (!(dev->flags & IFF_PROMISC) && 3291 (card->info.promisc_mode == SET_PROMISC_MODE_OFF))) 3292 return; 3293 mode = SET_PROMISC_MODE_OFF; 3294 if (dev->flags & IFF_PROMISC) 3295 mode = SET_PROMISC_MODE_ON; 3296 QETH_CARD_TEXT_(card, 4, "mode:%x", mode); 3297 3298 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE, 3299 sizeof(struct qeth_ipacmd_setadpparms)); 3300 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE); 3301 cmd->data.setadapterparms.data.mode = mode; 3302 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL); 3303 } 3304 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode); 3305 3306 int qeth_change_mtu(struct net_device *dev, int new_mtu) 3307 { 3308 struct qeth_card *card; 3309 char dbf_text[15]; 3310 3311 card = dev->ml_priv; 3312 3313 QETH_CARD_TEXT(card, 4, "chgmtu"); 3314 sprintf(dbf_text, "%8x", new_mtu); 3315 QETH_CARD_TEXT(card, 4, dbf_text); 3316 3317 if (new_mtu < 64) 3318 return -EINVAL; 3319 if (new_mtu > 65535) 3320 return -EINVAL; 3321 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) && 3322 (!qeth_mtu_is_valid(card, new_mtu))) 3323 return -EINVAL; 3324 dev->mtu = new_mtu; 3325 return 0; 3326 } 3327 EXPORT_SYMBOL_GPL(qeth_change_mtu); 3328 3329 struct net_device_stats *qeth_get_stats(struct net_device *dev) 3330 { 3331 struct qeth_card *card; 3332 3333 card = dev->ml_priv; 3334 3335 QETH_CARD_TEXT(card, 5, "getstat"); 3336 3337 return &card->stats; 3338 } 3339 EXPORT_SYMBOL_GPL(qeth_get_stats); 3340 3341 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card, 3342 struct qeth_reply *reply, unsigned long data) 3343 { 3344 struct qeth_ipa_cmd *cmd; 3345 3346 QETH_CARD_TEXT(card, 4, "chgmaccb"); 3347 3348 cmd = (struct qeth_ipa_cmd *) data; 3349 if (!card->options.layer2 || 3350 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) { 3351 memcpy(card->dev->dev_addr, 3352 &cmd->data.setadapterparms.data.change_addr.addr, 3353 OSA_ADDR_LEN); 3354 card->info.mac_bits |= QETH_LAYER2_MAC_READ; 3355 } 3356 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3357 return 0; 3358 } 3359 3360 int qeth_setadpparms_change_macaddr(struct qeth_card *card) 3361 { 3362 int rc; 3363 struct qeth_cmd_buffer *iob; 3364 struct qeth_ipa_cmd *cmd; 3365 3366 QETH_CARD_TEXT(card, 4, "chgmac"); 3367 3368 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS, 3369 sizeof(struct qeth_ipacmd_setadpparms)); 3370 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3371 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC; 3372 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN; 3373 memcpy(&cmd->data.setadapterparms.data.change_addr.addr, 3374 card->dev->dev_addr, OSA_ADDR_LEN); 3375 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb, 3376 NULL); 3377 return rc; 3378 } 3379 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr); 3380 3381 static int qeth_setadpparms_set_access_ctrl_cb(struct qeth_card *card, 3382 struct qeth_reply *reply, unsigned long data) 3383 { 3384 struct qeth_ipa_cmd *cmd; 3385 struct qeth_set_access_ctrl *access_ctrl_req; 3386 3387 QETH_CARD_TEXT(card, 4, "setaccb"); 3388 3389 cmd = (struct qeth_ipa_cmd *) data; 3390 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3391 QETH_DBF_TEXT_(SETUP, 2, "setaccb"); 3392 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3393 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", 3394 cmd->data.setadapterparms.hdr.return_code); 3395 switch (cmd->data.setadapterparms.hdr.return_code) { 3396 case SET_ACCESS_CTRL_RC_SUCCESS: 3397 case SET_ACCESS_CTRL_RC_ALREADY_NOT_ISOLATED: 3398 case SET_ACCESS_CTRL_RC_ALREADY_ISOLATED: 3399 { 3400 card->options.isolation = access_ctrl_req->subcmd_code; 3401 if (card->options.isolation == ISOLATION_MODE_NONE) { 3402 dev_info(&card->gdev->dev, 3403 "QDIO data connection isolation is deactivated\n"); 3404 } else { 3405 dev_info(&card->gdev->dev, 3406 "QDIO data connection isolation is activated\n"); 3407 } 3408 QETH_DBF_MESSAGE(3, "OK:SET_ACCESS_CTRL(%s, %d)==%d\n", 3409 card->gdev->dev.kobj.name, 3410 access_ctrl_req->subcmd_code, 3411 cmd->data.setadapterparms.hdr.return_code); 3412 break; 3413 } 3414 case SET_ACCESS_CTRL_RC_NOT_SUPPORTED: 3415 { 3416 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_CTRL(%s,%d)==%d\n", 3417 card->gdev->dev.kobj.name, 3418 access_ctrl_req->subcmd_code, 3419 cmd->data.setadapterparms.hdr.return_code); 3420 dev_err(&card->gdev->dev, "Adapter does not " 3421 "support QDIO data connection isolation\n"); 3422 3423 /* ensure isolation mode is "none" */ 3424 card->options.isolation = ISOLATION_MODE_NONE; 3425 break; 3426 } 3427 case SET_ACCESS_CTRL_RC_NONE_SHARED_ADAPTER: 3428 { 3429 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3430 card->gdev->dev.kobj.name, 3431 access_ctrl_req->subcmd_code, 3432 cmd->data.setadapterparms.hdr.return_code); 3433 dev_err(&card->gdev->dev, 3434 "Adapter is dedicated. " 3435 "QDIO data connection isolation not supported\n"); 3436 3437 /* ensure isolation mode is "none" */ 3438 card->options.isolation = ISOLATION_MODE_NONE; 3439 break; 3440 } 3441 case SET_ACCESS_CTRL_RC_ACTIVE_CHECKSUM_OFF: 3442 { 3443 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d\n", 3444 card->gdev->dev.kobj.name, 3445 access_ctrl_req->subcmd_code, 3446 cmd->data.setadapterparms.hdr.return_code); 3447 dev_err(&card->gdev->dev, 3448 "TSO does not permit QDIO data connection isolation\n"); 3449 3450 /* ensure isolation mode is "none" */ 3451 card->options.isolation = ISOLATION_MODE_NONE; 3452 break; 3453 } 3454 default: 3455 { 3456 /* this should never happen */ 3457 QETH_DBF_MESSAGE(3, "ERR:SET_ACCESS_MODE(%s,%d)==%d" 3458 "==UNKNOWN\n", 3459 card->gdev->dev.kobj.name, 3460 access_ctrl_req->subcmd_code, 3461 cmd->data.setadapterparms.hdr.return_code); 3462 3463 /* ensure isolation mode is "none" */ 3464 card->options.isolation = ISOLATION_MODE_NONE; 3465 break; 3466 } 3467 } 3468 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd); 3469 return 0; 3470 } 3471 3472 static int qeth_setadpparms_set_access_ctrl(struct qeth_card *card, 3473 enum qeth_ipa_isolation_modes isolation) 3474 { 3475 int rc; 3476 struct qeth_cmd_buffer *iob; 3477 struct qeth_ipa_cmd *cmd; 3478 struct qeth_set_access_ctrl *access_ctrl_req; 3479 3480 QETH_CARD_TEXT(card, 4, "setacctl"); 3481 3482 QETH_DBF_TEXT_(SETUP, 2, "setacctl"); 3483 QETH_DBF_TEXT_(SETUP, 2, "%s", card->gdev->dev.kobj.name); 3484 3485 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_ACCESS_CONTROL, 3486 sizeof(struct qeth_ipacmd_setadpparms_hdr) + 3487 sizeof(struct qeth_set_access_ctrl)); 3488 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3489 access_ctrl_req = &cmd->data.setadapterparms.data.set_access_ctrl; 3490 access_ctrl_req->subcmd_code = isolation; 3491 3492 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_set_access_ctrl_cb, 3493 NULL); 3494 QETH_DBF_TEXT_(SETUP, 2, "rc=%d", rc); 3495 return rc; 3496 } 3497 3498 int qeth_set_access_ctrl_online(struct qeth_card *card) 3499 { 3500 int rc = 0; 3501 3502 QETH_CARD_TEXT(card, 4, "setactlo"); 3503 3504 if ((card->info.type == QETH_CARD_TYPE_OSD || 3505 card->info.type == QETH_CARD_TYPE_OSX) && 3506 qeth_adp_supported(card, IPA_SETADP_SET_ACCESS_CONTROL)) { 3507 rc = qeth_setadpparms_set_access_ctrl(card, 3508 card->options.isolation); 3509 if (rc) { 3510 QETH_DBF_MESSAGE(3, 3511 "IPA(SET_ACCESS_CTRL,%s,%d) sent failed\n", 3512 card->gdev->dev.kobj.name, 3513 rc); 3514 } 3515 } else if (card->options.isolation != ISOLATION_MODE_NONE) { 3516 card->options.isolation = ISOLATION_MODE_NONE; 3517 3518 dev_err(&card->gdev->dev, "Adapter does not " 3519 "support QDIO data connection isolation\n"); 3520 rc = -EOPNOTSUPP; 3521 } 3522 return rc; 3523 } 3524 EXPORT_SYMBOL_GPL(qeth_set_access_ctrl_online); 3525 3526 void qeth_tx_timeout(struct net_device *dev) 3527 { 3528 struct qeth_card *card; 3529 3530 card = dev->ml_priv; 3531 QETH_CARD_TEXT(card, 4, "txtimeo"); 3532 card->stats.tx_errors++; 3533 qeth_schedule_recovery(card); 3534 } 3535 EXPORT_SYMBOL_GPL(qeth_tx_timeout); 3536 3537 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum) 3538 { 3539 struct qeth_card *card = dev->ml_priv; 3540 int rc = 0; 3541 3542 switch (regnum) { 3543 case MII_BMCR: /* Basic mode control register */ 3544 rc = BMCR_FULLDPLX; 3545 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) && 3546 (card->info.link_type != QETH_LINK_TYPE_OSN) && 3547 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH)) 3548 rc |= BMCR_SPEED100; 3549 break; 3550 case MII_BMSR: /* Basic mode status register */ 3551 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS | 3552 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL | 3553 BMSR_100BASE4; 3554 break; 3555 case MII_PHYSID1: /* PHYS ID 1 */ 3556 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) | 3557 dev->dev_addr[2]; 3558 rc = (rc >> 5) & 0xFFFF; 3559 break; 3560 case MII_PHYSID2: /* PHYS ID 2 */ 3561 rc = (dev->dev_addr[2] << 10) & 0xFFFF; 3562 break; 3563 case MII_ADVERTISE: /* Advertisement control reg */ 3564 rc = ADVERTISE_ALL; 3565 break; 3566 case MII_LPA: /* Link partner ability reg */ 3567 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL | 3568 LPA_100BASE4 | LPA_LPACK; 3569 break; 3570 case MII_EXPANSION: /* Expansion register */ 3571 break; 3572 case MII_DCOUNTER: /* disconnect counter */ 3573 break; 3574 case MII_FCSCOUNTER: /* false carrier counter */ 3575 break; 3576 case MII_NWAYTEST: /* N-way auto-neg test register */ 3577 break; 3578 case MII_RERRCOUNTER: /* rx error counter */ 3579 rc = card->stats.rx_errors; 3580 break; 3581 case MII_SREVISION: /* silicon revision */ 3582 break; 3583 case MII_RESV1: /* reserved 1 */ 3584 break; 3585 case MII_LBRERROR: /* loopback, rx, bypass error */ 3586 break; 3587 case MII_PHYADDR: /* physical address */ 3588 break; 3589 case MII_RESV2: /* reserved 2 */ 3590 break; 3591 case MII_TPISTATUS: /* TPI status for 10mbps */ 3592 break; 3593 case MII_NCONFIG: /* network interface config */ 3594 break; 3595 default: 3596 break; 3597 } 3598 return rc; 3599 } 3600 EXPORT_SYMBOL_GPL(qeth_mdio_read); 3601 3602 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card, 3603 struct qeth_cmd_buffer *iob, int len, 3604 int (*reply_cb)(struct qeth_card *, struct qeth_reply *, 3605 unsigned long), 3606 void *reply_param) 3607 { 3608 u16 s1, s2; 3609 3610 QETH_CARD_TEXT(card, 4, "sendsnmp"); 3611 3612 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE); 3613 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data), 3614 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH); 3615 /* adjust PDU length fields in IPA_PDU_HEADER */ 3616 s1 = (u32) IPA_PDU_HEADER_SIZE + len; 3617 s2 = (u32) len; 3618 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2); 3619 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2); 3620 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2); 3621 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2); 3622 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob, 3623 reply_cb, reply_param); 3624 } 3625 3626 static int qeth_snmp_command_cb(struct qeth_card *card, 3627 struct qeth_reply *reply, unsigned long sdata) 3628 { 3629 struct qeth_ipa_cmd *cmd; 3630 struct qeth_arp_query_info *qinfo; 3631 struct qeth_snmp_cmd *snmp; 3632 unsigned char *data; 3633 __u16 data_len; 3634 3635 QETH_CARD_TEXT(card, 3, "snpcmdcb"); 3636 3637 cmd = (struct qeth_ipa_cmd *) sdata; 3638 data = (unsigned char *)((char *)cmd - reply->offset); 3639 qinfo = (struct qeth_arp_query_info *) reply->param; 3640 snmp = &cmd->data.setadapterparms.data.snmp; 3641 3642 if (cmd->hdr.return_code) { 3643 QETH_CARD_TEXT_(card, 4, "scer1%i", cmd->hdr.return_code); 3644 return 0; 3645 } 3646 if (cmd->data.setadapterparms.hdr.return_code) { 3647 cmd->hdr.return_code = 3648 cmd->data.setadapterparms.hdr.return_code; 3649 QETH_CARD_TEXT_(card, 4, "scer2%i", cmd->hdr.return_code); 3650 return 0; 3651 } 3652 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data)); 3653 if (cmd->data.setadapterparms.hdr.seq_no == 1) 3654 data_len -= (__u16)((char *)&snmp->data - (char *)cmd); 3655 else 3656 data_len -= (__u16)((char *)&snmp->request - (char *)cmd); 3657 3658 /* check if there is enough room in userspace */ 3659 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) { 3660 QETH_CARD_TEXT_(card, 4, "scer3%i", -ENOMEM); 3661 cmd->hdr.return_code = -ENOMEM; 3662 return 0; 3663 } 3664 QETH_CARD_TEXT_(card, 4, "snore%i", 3665 cmd->data.setadapterparms.hdr.used_total); 3666 QETH_CARD_TEXT_(card, 4, "sseqn%i", 3667 cmd->data.setadapterparms.hdr.seq_no); 3668 /*copy entries to user buffer*/ 3669 if (cmd->data.setadapterparms.hdr.seq_no == 1) { 3670 memcpy(qinfo->udata + qinfo->udata_offset, 3671 (char *)snmp, 3672 data_len + offsetof(struct qeth_snmp_cmd, data)); 3673 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data); 3674 } else { 3675 memcpy(qinfo->udata + qinfo->udata_offset, 3676 (char *)&snmp->request, data_len); 3677 } 3678 qinfo->udata_offset += data_len; 3679 /* check if all replies received ... */ 3680 QETH_CARD_TEXT_(card, 4, "srtot%i", 3681 cmd->data.setadapterparms.hdr.used_total); 3682 QETH_CARD_TEXT_(card, 4, "srseq%i", 3683 cmd->data.setadapterparms.hdr.seq_no); 3684 if (cmd->data.setadapterparms.hdr.seq_no < 3685 cmd->data.setadapterparms.hdr.used_total) 3686 return 1; 3687 return 0; 3688 } 3689 3690 int qeth_snmp_command(struct qeth_card *card, char __user *udata) 3691 { 3692 struct qeth_cmd_buffer *iob; 3693 struct qeth_ipa_cmd *cmd; 3694 struct qeth_snmp_ureq *ureq; 3695 int req_len; 3696 struct qeth_arp_query_info qinfo = {0, }; 3697 int rc = 0; 3698 3699 QETH_CARD_TEXT(card, 3, "snmpcmd"); 3700 3701 if (card->info.guestlan) 3702 return -EOPNOTSUPP; 3703 3704 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) && 3705 (!card->options.layer2)) { 3706 return -EOPNOTSUPP; 3707 } 3708 /* skip 4 bytes (data_len struct member) to get req_len */ 3709 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int))) 3710 return -EFAULT; 3711 ureq = memdup_user(udata, req_len + sizeof(struct qeth_snmp_ureq_hdr)); 3712 if (IS_ERR(ureq)) { 3713 QETH_CARD_TEXT(card, 2, "snmpnome"); 3714 return PTR_ERR(ureq); 3715 } 3716 qinfo.udata_len = ureq->hdr.data_len; 3717 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL); 3718 if (!qinfo.udata) { 3719 kfree(ureq); 3720 return -ENOMEM; 3721 } 3722 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr); 3723 3724 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL, 3725 QETH_SNMP_SETADP_CMDLENGTH + req_len); 3726 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE); 3727 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len); 3728 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len, 3729 qeth_snmp_command_cb, (void *)&qinfo); 3730 if (rc) 3731 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n", 3732 QETH_CARD_IFNAME(card), rc); 3733 else { 3734 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len)) 3735 rc = -EFAULT; 3736 } 3737 3738 kfree(ureq); 3739 kfree(qinfo.udata); 3740 return rc; 3741 } 3742 EXPORT_SYMBOL_GPL(qeth_snmp_command); 3743 3744 static inline int qeth_get_qdio_q_format(struct qeth_card *card) 3745 { 3746 switch (card->info.type) { 3747 case QETH_CARD_TYPE_IQD: 3748 return 2; 3749 default: 3750 return 0; 3751 } 3752 } 3753 3754 static void qeth_determine_capabilities(struct qeth_card *card) 3755 { 3756 int rc; 3757 int length; 3758 char *prcd; 3759 struct ccw_device *ddev; 3760 int ddev_offline = 0; 3761 3762 QETH_DBF_TEXT(SETUP, 2, "detcapab"); 3763 ddev = CARD_DDEV(card); 3764 if (!ddev->online) { 3765 ddev_offline = 1; 3766 rc = ccw_device_set_online(ddev); 3767 if (rc) { 3768 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3769 goto out; 3770 } 3771 } 3772 3773 rc = qeth_read_conf_data(card, (void **) &prcd, &length); 3774 if (rc) { 3775 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", 3776 dev_name(&card->gdev->dev), rc); 3777 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3778 goto out_offline; 3779 } 3780 qeth_configure_unitaddr(card, prcd); 3781 qeth_configure_blkt_default(card, prcd); 3782 kfree(prcd); 3783 3784 rc = qdio_get_ssqd_desc(ddev, &card->ssqd); 3785 if (rc) 3786 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); 3787 3788 out_offline: 3789 if (ddev_offline == 1) 3790 ccw_device_set_offline(ddev); 3791 out: 3792 return; 3793 } 3794 3795 static int qeth_qdio_establish(struct qeth_card *card) 3796 { 3797 struct qdio_initialize init_data; 3798 char *qib_param_field; 3799 struct qdio_buffer **in_sbal_ptrs; 3800 struct qdio_buffer **out_sbal_ptrs; 3801 int i, j, k; 3802 int rc = 0; 3803 3804 QETH_DBF_TEXT(SETUP, 2, "qdioest"); 3805 3806 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char), 3807 GFP_KERNEL); 3808 if (!qib_param_field) 3809 return -ENOMEM; 3810 3811 qeth_create_qib_param_field(card, qib_param_field); 3812 qeth_create_qib_param_field_blkt(card, qib_param_field); 3813 3814 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *), 3815 GFP_KERNEL); 3816 if (!in_sbal_ptrs) { 3817 kfree(qib_param_field); 3818 return -ENOMEM; 3819 } 3820 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i) 3821 in_sbal_ptrs[i] = (struct qdio_buffer *) 3822 virt_to_phys(card->qdio.in_q->bufs[i].buffer); 3823 3824 out_sbal_ptrs = 3825 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q * 3826 sizeof(void *), GFP_KERNEL); 3827 if (!out_sbal_ptrs) { 3828 kfree(in_sbal_ptrs); 3829 kfree(qib_param_field); 3830 return -ENOMEM; 3831 } 3832 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i) 3833 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) { 3834 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys( 3835 card->qdio.out_qs[i]->bufs[j].buffer); 3836 } 3837 3838 memset(&init_data, 0, sizeof(struct qdio_initialize)); 3839 init_data.cdev = CARD_DDEV(card); 3840 init_data.q_format = qeth_get_qdio_q_format(card); 3841 init_data.qib_param_field_format = 0; 3842 init_data.qib_param_field = qib_param_field; 3843 init_data.no_input_qs = 1; 3844 init_data.no_output_qs = card->qdio.no_out_queues; 3845 init_data.input_handler = card->discipline.input_handler; 3846 init_data.output_handler = card->discipline.output_handler; 3847 init_data.queue_start_poll = card->discipline.start_poll; 3848 init_data.int_parm = (unsigned long) card; 3849 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs; 3850 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs; 3851 init_data.scan_threshold = 3852 (card->info.type == QETH_CARD_TYPE_IQD) ? 8 : 32; 3853 3854 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED, 3855 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) { 3856 rc = qdio_allocate(&init_data); 3857 if (rc) { 3858 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3859 goto out; 3860 } 3861 rc = qdio_establish(&init_data); 3862 if (rc) { 3863 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED); 3864 qdio_free(CARD_DDEV(card)); 3865 } 3866 } 3867 out: 3868 kfree(out_sbal_ptrs); 3869 kfree(in_sbal_ptrs); 3870 kfree(qib_param_field); 3871 return rc; 3872 } 3873 3874 static void qeth_core_free_card(struct qeth_card *card) 3875 { 3876 3877 QETH_DBF_TEXT(SETUP, 2, "freecrd"); 3878 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *)); 3879 qeth_clean_channel(&card->read); 3880 qeth_clean_channel(&card->write); 3881 if (card->dev) 3882 free_netdev(card->dev); 3883 kfree(card->ip_tbd_list); 3884 qeth_free_qdio_buffers(card); 3885 unregister_service_level(&card->qeth_service_level); 3886 kfree(card); 3887 } 3888 3889 static struct ccw_device_id qeth_ids[] = { 3890 {CCW_DEVICE_DEVTYPE(0x1731, 0x01, 0x1732, 0x01), 3891 .driver_info = QETH_CARD_TYPE_OSD}, 3892 {CCW_DEVICE_DEVTYPE(0x1731, 0x05, 0x1732, 0x05), 3893 .driver_info = QETH_CARD_TYPE_IQD}, 3894 {CCW_DEVICE_DEVTYPE(0x1731, 0x06, 0x1732, 0x06), 3895 .driver_info = QETH_CARD_TYPE_OSN}, 3896 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x03), 3897 .driver_info = QETH_CARD_TYPE_OSM}, 3898 {CCW_DEVICE_DEVTYPE(0x1731, 0x02, 0x1732, 0x02), 3899 .driver_info = QETH_CARD_TYPE_OSX}, 3900 {}, 3901 }; 3902 MODULE_DEVICE_TABLE(ccw, qeth_ids); 3903 3904 static struct ccw_driver qeth_ccw_driver = { 3905 .name = "qeth", 3906 .ids = qeth_ids, 3907 .probe = ccwgroup_probe_ccwdev, 3908 .remove = ccwgroup_remove_ccwdev, 3909 }; 3910 3911 static int qeth_core_driver_group(const char *buf, struct device *root_dev, 3912 unsigned long driver_id) 3913 { 3914 return ccwgroup_create_from_string(root_dev, driver_id, 3915 &qeth_ccw_driver, 3, buf); 3916 } 3917 3918 int qeth_core_hardsetup_card(struct qeth_card *card) 3919 { 3920 int retries = 0; 3921 int rc; 3922 3923 QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); 3924 atomic_set(&card->force_alloc_skb, 0); 3925 qeth_get_channel_path_desc(card); 3926 retry: 3927 if (retries) 3928 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", 3929 dev_name(&card->gdev->dev)); 3930 ccw_device_set_offline(CARD_DDEV(card)); 3931 ccw_device_set_offline(CARD_WDEV(card)); 3932 ccw_device_set_offline(CARD_RDEV(card)); 3933 rc = ccw_device_set_online(CARD_RDEV(card)); 3934 if (rc) 3935 goto retriable; 3936 rc = ccw_device_set_online(CARD_WDEV(card)); 3937 if (rc) 3938 goto retriable; 3939 rc = ccw_device_set_online(CARD_DDEV(card)); 3940 if (rc) 3941 goto retriable; 3942 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD); 3943 retriable: 3944 if (rc == -ERESTARTSYS) { 3945 QETH_DBF_TEXT(SETUP, 2, "break1"); 3946 return rc; 3947 } else if (rc) { 3948 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc); 3949 if (++retries > 3) 3950 goto out; 3951 else 3952 goto retry; 3953 } 3954 qeth_determine_capabilities(card); 3955 qeth_init_tokens(card); 3956 qeth_init_func_level(card); 3957 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); 3958 if (rc == -ERESTARTSYS) { 3959 QETH_DBF_TEXT(SETUP, 2, "break2"); 3960 return rc; 3961 } else if (rc) { 3962 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 3963 if (--retries < 0) 3964 goto out; 3965 else 3966 goto retry; 3967 } 3968 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb); 3969 if (rc == -ERESTARTSYS) { 3970 QETH_DBF_TEXT(SETUP, 2, "break3"); 3971 return rc; 3972 } else if (rc) { 3973 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc); 3974 if (--retries < 0) 3975 goto out; 3976 else 3977 goto retry; 3978 } 3979 card->read_or_write_problem = 0; 3980 rc = qeth_mpc_initialize(card); 3981 if (rc) { 3982 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); 3983 goto out; 3984 } 3985 return 0; 3986 out: 3987 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover " 3988 "an error on the device\n"); 3989 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n", 3990 dev_name(&card->gdev->dev), rc); 3991 return rc; 3992 } 3993 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card); 3994 3995 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element, 3996 struct sk_buff **pskb, int offset, int *pfrag, int data_len) 3997 { 3998 struct page *page = virt_to_page(element->addr); 3999 if (*pskb == NULL) { 4000 /* the upper protocol layers assume that there is data in the 4001 * skb itself. Copy a small amount (64 bytes) to make them 4002 * happy. */ 4003 *pskb = dev_alloc_skb(64 + ETH_HLEN); 4004 if (!(*pskb)) 4005 return -ENOMEM; 4006 skb_reserve(*pskb, ETH_HLEN); 4007 if (data_len <= 64) { 4008 memcpy(skb_put(*pskb, data_len), element->addr + offset, 4009 data_len); 4010 } else { 4011 get_page(page); 4012 memcpy(skb_put(*pskb, 64), element->addr + offset, 64); 4013 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64, 4014 data_len - 64); 4015 (*pskb)->data_len += data_len - 64; 4016 (*pskb)->len += data_len - 64; 4017 (*pskb)->truesize += data_len - 64; 4018 (*pfrag)++; 4019 } 4020 } else { 4021 get_page(page); 4022 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len); 4023 (*pskb)->data_len += data_len; 4024 (*pskb)->len += data_len; 4025 (*pskb)->truesize += data_len; 4026 (*pfrag)++; 4027 } 4028 return 0; 4029 } 4030 4031 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card, 4032 struct qdio_buffer *buffer, 4033 struct qdio_buffer_element **__element, int *__offset, 4034 struct qeth_hdr **hdr) 4035 { 4036 struct qdio_buffer_element *element = *__element; 4037 int offset = *__offset; 4038 struct sk_buff *skb = NULL; 4039 int skb_len = 0; 4040 void *data_ptr; 4041 int data_len; 4042 int headroom = 0; 4043 int use_rx_sg = 0; 4044 int frag = 0; 4045 4046 /* qeth_hdr must not cross element boundaries */ 4047 if (element->length < offset + sizeof(struct qeth_hdr)) { 4048 if (qeth_is_last_sbale(element)) 4049 return NULL; 4050 element++; 4051 offset = 0; 4052 if (element->length < sizeof(struct qeth_hdr)) 4053 return NULL; 4054 } 4055 *hdr = element->addr + offset; 4056 4057 offset += sizeof(struct qeth_hdr); 4058 switch ((*hdr)->hdr.l2.id) { 4059 case QETH_HEADER_TYPE_LAYER2: 4060 skb_len = (*hdr)->hdr.l2.pkt_length; 4061 break; 4062 case QETH_HEADER_TYPE_LAYER3: 4063 skb_len = (*hdr)->hdr.l3.length; 4064 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) || 4065 (card->info.link_type == QETH_LINK_TYPE_HSTR)) 4066 headroom = TR_HLEN; 4067 else 4068 headroom = ETH_HLEN; 4069 break; 4070 case QETH_HEADER_TYPE_OSN: 4071 skb_len = (*hdr)->hdr.osn.pdu_length; 4072 headroom = sizeof(struct qeth_hdr); 4073 break; 4074 default: 4075 break; 4076 } 4077 4078 if (!skb_len) 4079 return NULL; 4080 4081 if ((skb_len >= card->options.rx_sg_cb) && 4082 (!(card->info.type == QETH_CARD_TYPE_OSN)) && 4083 (!atomic_read(&card->force_alloc_skb))) { 4084 use_rx_sg = 1; 4085 } else { 4086 skb = dev_alloc_skb(skb_len + headroom); 4087 if (!skb) 4088 goto no_mem; 4089 if (headroom) 4090 skb_reserve(skb, headroom); 4091 } 4092 4093 data_ptr = element->addr + offset; 4094 while (skb_len) { 4095 data_len = min(skb_len, (int)(element->length - offset)); 4096 if (data_len) { 4097 if (use_rx_sg) { 4098 if (qeth_create_skb_frag(element, &skb, offset, 4099 &frag, data_len)) 4100 goto no_mem; 4101 } else { 4102 memcpy(skb_put(skb, data_len), data_ptr, 4103 data_len); 4104 } 4105 } 4106 skb_len -= data_len; 4107 if (skb_len) { 4108 if (qeth_is_last_sbale(element)) { 4109 QETH_CARD_TEXT(card, 4, "unexeob"); 4110 QETH_CARD_HEX(card, 2, buffer, sizeof(void *)); 4111 dev_kfree_skb_any(skb); 4112 card->stats.rx_errors++; 4113 return NULL; 4114 } 4115 element++; 4116 offset = 0; 4117 data_ptr = element->addr; 4118 } else { 4119 offset += data_len; 4120 } 4121 } 4122 *__element = element; 4123 *__offset = offset; 4124 if (use_rx_sg && card->options.performance_stats) { 4125 card->perf_stats.sg_skbs_rx++; 4126 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags; 4127 } 4128 return skb; 4129 no_mem: 4130 if (net_ratelimit()) { 4131 QETH_CARD_TEXT(card, 2, "noskbmem"); 4132 } 4133 card->stats.rx_dropped++; 4134 return NULL; 4135 } 4136 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb); 4137 4138 static void qeth_unregister_dbf_views(void) 4139 { 4140 int x; 4141 for (x = 0; x < QETH_DBF_INFOS; x++) { 4142 debug_unregister(qeth_dbf[x].id); 4143 qeth_dbf[x].id = NULL; 4144 } 4145 } 4146 4147 void qeth_dbf_longtext(debug_info_t *id, int level, char *fmt, ...) 4148 { 4149 char dbf_txt_buf[32]; 4150 va_list args; 4151 4152 if (level > id->level) 4153 return; 4154 va_start(args, fmt); 4155 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args); 4156 va_end(args); 4157 debug_text_event(id, level, dbf_txt_buf); 4158 } 4159 EXPORT_SYMBOL_GPL(qeth_dbf_longtext); 4160 4161 static int qeth_register_dbf_views(void) 4162 { 4163 int ret; 4164 int x; 4165 4166 for (x = 0; x < QETH_DBF_INFOS; x++) { 4167 /* register the areas */ 4168 qeth_dbf[x].id = debug_register(qeth_dbf[x].name, 4169 qeth_dbf[x].pages, 4170 qeth_dbf[x].areas, 4171 qeth_dbf[x].len); 4172 if (qeth_dbf[x].id == NULL) { 4173 qeth_unregister_dbf_views(); 4174 return -ENOMEM; 4175 } 4176 4177 /* register a view */ 4178 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view); 4179 if (ret) { 4180 qeth_unregister_dbf_views(); 4181 return ret; 4182 } 4183 4184 /* set a passing level */ 4185 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level); 4186 } 4187 4188 return 0; 4189 } 4190 4191 int qeth_core_load_discipline(struct qeth_card *card, 4192 enum qeth_discipline_id discipline) 4193 { 4194 int rc = 0; 4195 switch (discipline) { 4196 case QETH_DISCIPLINE_LAYER3: 4197 card->discipline.ccwgdriver = try_then_request_module( 4198 symbol_get(qeth_l3_ccwgroup_driver), 4199 "qeth_l3"); 4200 break; 4201 case QETH_DISCIPLINE_LAYER2: 4202 card->discipline.ccwgdriver = try_then_request_module( 4203 symbol_get(qeth_l2_ccwgroup_driver), 4204 "qeth_l2"); 4205 break; 4206 } 4207 if (!card->discipline.ccwgdriver) { 4208 dev_err(&card->gdev->dev, "There is no kernel module to " 4209 "support discipline %d\n", discipline); 4210 rc = -EINVAL; 4211 } 4212 return rc; 4213 } 4214 4215 void qeth_core_free_discipline(struct qeth_card *card) 4216 { 4217 if (card->options.layer2) 4218 symbol_put(qeth_l2_ccwgroup_driver); 4219 else 4220 symbol_put(qeth_l3_ccwgroup_driver); 4221 card->discipline.ccwgdriver = NULL; 4222 } 4223 4224 static int qeth_core_probe_device(struct ccwgroup_device *gdev) 4225 { 4226 struct qeth_card *card; 4227 struct device *dev; 4228 int rc; 4229 unsigned long flags; 4230 char dbf_name[20]; 4231 4232 QETH_DBF_TEXT(SETUP, 2, "probedev"); 4233 4234 dev = &gdev->dev; 4235 if (!get_device(dev)) 4236 return -ENODEV; 4237 4238 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev)); 4239 4240 card = qeth_alloc_card(); 4241 if (!card) { 4242 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM); 4243 rc = -ENOMEM; 4244 goto err_dev; 4245 } 4246 4247 snprintf(dbf_name, sizeof(dbf_name), "qeth_card_%s", 4248 dev_name(&gdev->dev)); 4249 card->debug = debug_register(dbf_name, 2, 1, 8); 4250 if (!card->debug) { 4251 QETH_DBF_TEXT_(SETUP, 2, "%s", "qcdbf"); 4252 rc = -ENOMEM; 4253 goto err_card; 4254 } 4255 debug_register_view(card->debug, &debug_hex_ascii_view); 4256 4257 card->read.ccwdev = gdev->cdev[0]; 4258 card->write.ccwdev = gdev->cdev[1]; 4259 card->data.ccwdev = gdev->cdev[2]; 4260 dev_set_drvdata(&gdev->dev, card); 4261 card->gdev = gdev; 4262 gdev->cdev[0]->handler = qeth_irq; 4263 gdev->cdev[1]->handler = qeth_irq; 4264 gdev->cdev[2]->handler = qeth_irq; 4265 4266 rc = qeth_determine_card_type(card); 4267 if (rc) { 4268 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); 4269 goto err_dbf; 4270 } 4271 rc = qeth_setup_card(card); 4272 if (rc) { 4273 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc); 4274 goto err_dbf; 4275 } 4276 4277 if (card->info.type == QETH_CARD_TYPE_OSN) 4278 rc = qeth_core_create_osn_attributes(dev); 4279 else 4280 rc = qeth_core_create_device_attributes(dev); 4281 if (rc) 4282 goto err_dbf; 4283 switch (card->info.type) { 4284 case QETH_CARD_TYPE_OSN: 4285 case QETH_CARD_TYPE_OSM: 4286 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2); 4287 if (rc) 4288 goto err_attr; 4289 rc = card->discipline.ccwgdriver->probe(card->gdev); 4290 if (rc) 4291 goto err_disc; 4292 case QETH_CARD_TYPE_OSD: 4293 case QETH_CARD_TYPE_OSX: 4294 default: 4295 break; 4296 } 4297 4298 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4299 list_add_tail(&card->list, &qeth_core_card_list.list); 4300 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4301 4302 qeth_determine_capabilities(card); 4303 return 0; 4304 4305 err_disc: 4306 qeth_core_free_discipline(card); 4307 err_attr: 4308 if (card->info.type == QETH_CARD_TYPE_OSN) 4309 qeth_core_remove_osn_attributes(dev); 4310 else 4311 qeth_core_remove_device_attributes(dev); 4312 err_dbf: 4313 debug_unregister(card->debug); 4314 err_card: 4315 qeth_core_free_card(card); 4316 err_dev: 4317 put_device(dev); 4318 return rc; 4319 } 4320 4321 static void qeth_core_remove_device(struct ccwgroup_device *gdev) 4322 { 4323 unsigned long flags; 4324 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4325 4326 QETH_DBF_TEXT(SETUP, 2, "removedv"); 4327 4328 if (card->info.type == QETH_CARD_TYPE_OSN) { 4329 qeth_core_remove_osn_attributes(&gdev->dev); 4330 } else { 4331 qeth_core_remove_device_attributes(&gdev->dev); 4332 } 4333 4334 if (card->discipline.ccwgdriver) { 4335 card->discipline.ccwgdriver->remove(gdev); 4336 qeth_core_free_discipline(card); 4337 } 4338 4339 debug_unregister(card->debug); 4340 write_lock_irqsave(&qeth_core_card_list.rwlock, flags); 4341 list_del(&card->list); 4342 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags); 4343 qeth_core_free_card(card); 4344 dev_set_drvdata(&gdev->dev, NULL); 4345 put_device(&gdev->dev); 4346 return; 4347 } 4348 4349 static int qeth_core_set_online(struct ccwgroup_device *gdev) 4350 { 4351 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4352 int rc = 0; 4353 int def_discipline; 4354 4355 if (!card->discipline.ccwgdriver) { 4356 if (card->info.type == QETH_CARD_TYPE_IQD) 4357 def_discipline = QETH_DISCIPLINE_LAYER3; 4358 else 4359 def_discipline = QETH_DISCIPLINE_LAYER2; 4360 rc = qeth_core_load_discipline(card, def_discipline); 4361 if (rc) 4362 goto err; 4363 rc = card->discipline.ccwgdriver->probe(card->gdev); 4364 if (rc) 4365 goto err; 4366 } 4367 rc = card->discipline.ccwgdriver->set_online(gdev); 4368 err: 4369 return rc; 4370 } 4371 4372 static int qeth_core_set_offline(struct ccwgroup_device *gdev) 4373 { 4374 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4375 return card->discipline.ccwgdriver->set_offline(gdev); 4376 } 4377 4378 static void qeth_core_shutdown(struct ccwgroup_device *gdev) 4379 { 4380 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4381 if (card->discipline.ccwgdriver && 4382 card->discipline.ccwgdriver->shutdown) 4383 card->discipline.ccwgdriver->shutdown(gdev); 4384 } 4385 4386 static int qeth_core_prepare(struct ccwgroup_device *gdev) 4387 { 4388 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4389 if (card->discipline.ccwgdriver && 4390 card->discipline.ccwgdriver->prepare) 4391 return card->discipline.ccwgdriver->prepare(gdev); 4392 return 0; 4393 } 4394 4395 static void qeth_core_complete(struct ccwgroup_device *gdev) 4396 { 4397 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4398 if (card->discipline.ccwgdriver && 4399 card->discipline.ccwgdriver->complete) 4400 card->discipline.ccwgdriver->complete(gdev); 4401 } 4402 4403 static int qeth_core_freeze(struct ccwgroup_device *gdev) 4404 { 4405 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4406 if (card->discipline.ccwgdriver && 4407 card->discipline.ccwgdriver->freeze) 4408 return card->discipline.ccwgdriver->freeze(gdev); 4409 return 0; 4410 } 4411 4412 static int qeth_core_thaw(struct ccwgroup_device *gdev) 4413 { 4414 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4415 if (card->discipline.ccwgdriver && 4416 card->discipline.ccwgdriver->thaw) 4417 return card->discipline.ccwgdriver->thaw(gdev); 4418 return 0; 4419 } 4420 4421 static int qeth_core_restore(struct ccwgroup_device *gdev) 4422 { 4423 struct qeth_card *card = dev_get_drvdata(&gdev->dev); 4424 if (card->discipline.ccwgdriver && 4425 card->discipline.ccwgdriver->restore) 4426 return card->discipline.ccwgdriver->restore(gdev); 4427 return 0; 4428 } 4429 4430 static struct ccwgroup_driver qeth_core_ccwgroup_driver = { 4431 .owner = THIS_MODULE, 4432 .name = "qeth", 4433 .driver_id = 0xD8C5E3C8, 4434 .probe = qeth_core_probe_device, 4435 .remove = qeth_core_remove_device, 4436 .set_online = qeth_core_set_online, 4437 .set_offline = qeth_core_set_offline, 4438 .shutdown = qeth_core_shutdown, 4439 .prepare = qeth_core_prepare, 4440 .complete = qeth_core_complete, 4441 .freeze = qeth_core_freeze, 4442 .thaw = qeth_core_thaw, 4443 .restore = qeth_core_restore, 4444 }; 4445 4446 static ssize_t 4447 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf, 4448 size_t count) 4449 { 4450 int err; 4451 err = qeth_core_driver_group(buf, qeth_core_root_dev, 4452 qeth_core_ccwgroup_driver.driver_id); 4453 if (err) 4454 return err; 4455 else 4456 return count; 4457 } 4458 4459 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store); 4460 4461 static struct { 4462 const char str[ETH_GSTRING_LEN]; 4463 } qeth_ethtool_stats_keys[] = { 4464 /* 0 */{"rx skbs"}, 4465 {"rx buffers"}, 4466 {"tx skbs"}, 4467 {"tx buffers"}, 4468 {"tx skbs no packing"}, 4469 {"tx buffers no packing"}, 4470 {"tx skbs packing"}, 4471 {"tx buffers packing"}, 4472 {"tx sg skbs"}, 4473 {"tx sg frags"}, 4474 /* 10 */{"rx sg skbs"}, 4475 {"rx sg frags"}, 4476 {"rx sg page allocs"}, 4477 {"tx large kbytes"}, 4478 {"tx large count"}, 4479 {"tx pk state ch n->p"}, 4480 {"tx pk state ch p->n"}, 4481 {"tx pk watermark low"}, 4482 {"tx pk watermark high"}, 4483 {"queue 0 buffer usage"}, 4484 /* 20 */{"queue 1 buffer usage"}, 4485 {"queue 2 buffer usage"}, 4486 {"queue 3 buffer usage"}, 4487 {"rx poll time"}, 4488 {"rx poll count"}, 4489 {"rx do_QDIO time"}, 4490 {"rx do_QDIO count"}, 4491 {"tx handler time"}, 4492 {"tx handler count"}, 4493 {"tx time"}, 4494 /* 30 */{"tx count"}, 4495 {"tx do_QDIO time"}, 4496 {"tx do_QDIO count"}, 4497 {"tx csum"}, 4498 {"tx lin"}, 4499 }; 4500 4501 int qeth_core_get_sset_count(struct net_device *dev, int stringset) 4502 { 4503 switch (stringset) { 4504 case ETH_SS_STATS: 4505 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN); 4506 default: 4507 return -EINVAL; 4508 } 4509 } 4510 EXPORT_SYMBOL_GPL(qeth_core_get_sset_count); 4511 4512 void qeth_core_get_ethtool_stats(struct net_device *dev, 4513 struct ethtool_stats *stats, u64 *data) 4514 { 4515 struct qeth_card *card = dev->ml_priv; 4516 data[0] = card->stats.rx_packets - 4517 card->perf_stats.initial_rx_packets; 4518 data[1] = card->perf_stats.bufs_rec; 4519 data[2] = card->stats.tx_packets - 4520 card->perf_stats.initial_tx_packets; 4521 data[3] = card->perf_stats.bufs_sent; 4522 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets 4523 - card->perf_stats.skbs_sent_pack; 4524 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack; 4525 data[6] = card->perf_stats.skbs_sent_pack; 4526 data[7] = card->perf_stats.bufs_sent_pack; 4527 data[8] = card->perf_stats.sg_skbs_sent; 4528 data[9] = card->perf_stats.sg_frags_sent; 4529 data[10] = card->perf_stats.sg_skbs_rx; 4530 data[11] = card->perf_stats.sg_frags_rx; 4531 data[12] = card->perf_stats.sg_alloc_page_rx; 4532 data[13] = (card->perf_stats.large_send_bytes >> 10); 4533 data[14] = card->perf_stats.large_send_cnt; 4534 data[15] = card->perf_stats.sc_dp_p; 4535 data[16] = card->perf_stats.sc_p_dp; 4536 data[17] = QETH_LOW_WATERMARK_PACK; 4537 data[18] = QETH_HIGH_WATERMARK_PACK; 4538 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers); 4539 data[20] = (card->qdio.no_out_queues > 1) ? 4540 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0; 4541 data[21] = (card->qdio.no_out_queues > 2) ? 4542 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0; 4543 data[22] = (card->qdio.no_out_queues > 3) ? 4544 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0; 4545 data[23] = card->perf_stats.inbound_time; 4546 data[24] = card->perf_stats.inbound_cnt; 4547 data[25] = card->perf_stats.inbound_do_qdio_time; 4548 data[26] = card->perf_stats.inbound_do_qdio_cnt; 4549 data[27] = card->perf_stats.outbound_handler_time; 4550 data[28] = card->perf_stats.outbound_handler_cnt; 4551 data[29] = card->perf_stats.outbound_time; 4552 data[30] = card->perf_stats.outbound_cnt; 4553 data[31] = card->perf_stats.outbound_do_qdio_time; 4554 data[32] = card->perf_stats.outbound_do_qdio_cnt; 4555 data[33] = card->perf_stats.tx_csum; 4556 data[34] = card->perf_stats.tx_lin; 4557 } 4558 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats); 4559 4560 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data) 4561 { 4562 switch (stringset) { 4563 case ETH_SS_STATS: 4564 memcpy(data, &qeth_ethtool_stats_keys, 4565 sizeof(qeth_ethtool_stats_keys)); 4566 break; 4567 default: 4568 WARN_ON(1); 4569 break; 4570 } 4571 } 4572 EXPORT_SYMBOL_GPL(qeth_core_get_strings); 4573 4574 void qeth_core_get_drvinfo(struct net_device *dev, 4575 struct ethtool_drvinfo *info) 4576 { 4577 struct qeth_card *card = dev->ml_priv; 4578 if (card->options.layer2) 4579 strcpy(info->driver, "qeth_l2"); 4580 else 4581 strcpy(info->driver, "qeth_l3"); 4582 4583 strcpy(info->version, "1.0"); 4584 strcpy(info->fw_version, card->info.mcl_level); 4585 sprintf(info->bus_info, "%s/%s/%s", 4586 CARD_RDEV_ID(card), 4587 CARD_WDEV_ID(card), 4588 CARD_DDEV_ID(card)); 4589 } 4590 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo); 4591 4592 int qeth_core_ethtool_get_settings(struct net_device *netdev, 4593 struct ethtool_cmd *ecmd) 4594 { 4595 struct qeth_card *card = netdev->ml_priv; 4596 enum qeth_link_types link_type; 4597 4598 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan)) 4599 link_type = QETH_LINK_TYPE_10GBIT_ETH; 4600 else 4601 link_type = card->info.link_type; 4602 4603 ecmd->transceiver = XCVR_INTERNAL; 4604 ecmd->supported = SUPPORTED_Autoneg; 4605 ecmd->advertising = ADVERTISED_Autoneg; 4606 ecmd->duplex = DUPLEX_FULL; 4607 ecmd->autoneg = AUTONEG_ENABLE; 4608 4609 switch (link_type) { 4610 case QETH_LINK_TYPE_FAST_ETH: 4611 case QETH_LINK_TYPE_LANE_ETH100: 4612 ecmd->supported |= SUPPORTED_10baseT_Half | 4613 SUPPORTED_10baseT_Full | 4614 SUPPORTED_100baseT_Half | 4615 SUPPORTED_100baseT_Full | 4616 SUPPORTED_TP; 4617 ecmd->advertising |= ADVERTISED_10baseT_Half | 4618 ADVERTISED_10baseT_Full | 4619 ADVERTISED_100baseT_Half | 4620 ADVERTISED_100baseT_Full | 4621 ADVERTISED_TP; 4622 ecmd->speed = SPEED_100; 4623 ecmd->port = PORT_TP; 4624 break; 4625 4626 case QETH_LINK_TYPE_GBIT_ETH: 4627 case QETH_LINK_TYPE_LANE_ETH1000: 4628 ecmd->supported |= SUPPORTED_10baseT_Half | 4629 SUPPORTED_10baseT_Full | 4630 SUPPORTED_100baseT_Half | 4631 SUPPORTED_100baseT_Full | 4632 SUPPORTED_1000baseT_Half | 4633 SUPPORTED_1000baseT_Full | 4634 SUPPORTED_FIBRE; 4635 ecmd->advertising |= ADVERTISED_10baseT_Half | 4636 ADVERTISED_10baseT_Full | 4637 ADVERTISED_100baseT_Half | 4638 ADVERTISED_100baseT_Full | 4639 ADVERTISED_1000baseT_Half | 4640 ADVERTISED_1000baseT_Full | 4641 ADVERTISED_FIBRE; 4642 ecmd->speed = SPEED_1000; 4643 ecmd->port = PORT_FIBRE; 4644 break; 4645 4646 case QETH_LINK_TYPE_10GBIT_ETH: 4647 ecmd->supported |= SUPPORTED_10baseT_Half | 4648 SUPPORTED_10baseT_Full | 4649 SUPPORTED_100baseT_Half | 4650 SUPPORTED_100baseT_Full | 4651 SUPPORTED_1000baseT_Half | 4652 SUPPORTED_1000baseT_Full | 4653 SUPPORTED_10000baseT_Full | 4654 SUPPORTED_FIBRE; 4655 ecmd->advertising |= ADVERTISED_10baseT_Half | 4656 ADVERTISED_10baseT_Full | 4657 ADVERTISED_100baseT_Half | 4658 ADVERTISED_100baseT_Full | 4659 ADVERTISED_1000baseT_Half | 4660 ADVERTISED_1000baseT_Full | 4661 ADVERTISED_10000baseT_Full | 4662 ADVERTISED_FIBRE; 4663 ecmd->speed = SPEED_10000; 4664 ecmd->port = PORT_FIBRE; 4665 break; 4666 4667 default: 4668 ecmd->supported |= SUPPORTED_10baseT_Half | 4669 SUPPORTED_10baseT_Full | 4670 SUPPORTED_TP; 4671 ecmd->advertising |= ADVERTISED_10baseT_Half | 4672 ADVERTISED_10baseT_Full | 4673 ADVERTISED_TP; 4674 ecmd->speed = SPEED_10; 4675 ecmd->port = PORT_TP; 4676 } 4677 4678 return 0; 4679 } 4680 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings); 4681 4682 static int __init qeth_core_init(void) 4683 { 4684 int rc; 4685 4686 pr_info("loading core functions\n"); 4687 INIT_LIST_HEAD(&qeth_core_card_list.list); 4688 rwlock_init(&qeth_core_card_list.rwlock); 4689 4690 rc = qeth_register_dbf_views(); 4691 if (rc) 4692 goto out_err; 4693 rc = ccw_driver_register(&qeth_ccw_driver); 4694 if (rc) 4695 goto ccw_err; 4696 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver); 4697 if (rc) 4698 goto ccwgroup_err; 4699 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver, 4700 &driver_attr_group); 4701 if (rc) 4702 goto driver_err; 4703 qeth_core_root_dev = root_device_register("qeth"); 4704 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0; 4705 if (rc) 4706 goto register_err; 4707 4708 qeth_core_header_cache = kmem_cache_create("qeth_hdr", 4709 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL); 4710 if (!qeth_core_header_cache) { 4711 rc = -ENOMEM; 4712 goto slab_err; 4713 } 4714 4715 return 0; 4716 slab_err: 4717 root_device_unregister(qeth_core_root_dev); 4718 register_err: 4719 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4720 &driver_attr_group); 4721 driver_err: 4722 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4723 ccwgroup_err: 4724 ccw_driver_unregister(&qeth_ccw_driver); 4725 ccw_err: 4726 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc); 4727 qeth_unregister_dbf_views(); 4728 out_err: 4729 pr_err("Initializing the qeth device driver failed\n"); 4730 return rc; 4731 } 4732 4733 static void __exit qeth_core_exit(void) 4734 { 4735 root_device_unregister(qeth_core_root_dev); 4736 driver_remove_file(&qeth_core_ccwgroup_driver.driver, 4737 &driver_attr_group); 4738 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver); 4739 ccw_driver_unregister(&qeth_ccw_driver); 4740 kmem_cache_destroy(qeth_core_header_cache); 4741 qeth_unregister_dbf_views(); 4742 pr_info("core functions removed\n"); 4743 } 4744 4745 module_init(qeth_core_init); 4746 module_exit(qeth_core_exit); 4747 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>"); 4748 MODULE_DESCRIPTION("qeth core functions"); 4749 MODULE_LICENSE("GPL"); 4750